[all-commits] [llvm/llvm-project] 85ab2a: [AsmPrinter] Add generic support for verifying ins...

[Nikita Popov via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 85ab2a9706b68272d5413f660a4de978752044ee
      https://github.com/llvm/llvm-project/commit/85ab2a9706b68272d5413f660a4de978752044ee
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2026-03-23 (Mon, 23 Mar 2026)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetInstrInfo.h
    M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
    M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
    M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
    M llvm/lib/Target/PowerPC/PPCInstrInfo.h

  Log Message:
  -----------
  [AsmPrinter] Add generic support for verifying instruction sizes (#187703)

Many backends rely on TII reporting correct instruction sizes for MIR
level branch relaxation passes. Reporting a too small size can result in
MC fixup failures (or silent miscompiles for unvalidated fixups).

Some time ago I added validation to the PPC asm printer to verify that
the TII instruction size matches the actually emitted size. This was
very helpful to systematically fix all incorrectly reported instruction
sizes.

However, the same problem also exists in lots of other backends, so this
moves the validation into AsmPrinter, controlled by a new
getInstSizeVerifyMode() hook in TII, which is disabled by default.

The intention here is to gradually enable this validation for more
backends (which requires fixing them first).



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