[all-commits] [llvm/llvm-project] 7a74c1: [AArch64][llvm] Separate TLBI-only feature gating ...

[Jonathan Thackray via All-commits]

  Branch: refs/heads/users/jthackray/remove_incorrect_tlbip_gating
  Home:   https://github.com/llvm/llvm-project
  Commit: 7a74c1de4e939ad8097341da35f689cc4be77edf
      https://github.com/llvm/llvm-project/commit/7a74c1de4e939ad8097341da35f689cc4be77edf
  Author: Jonathan Thackray <jonathan.thackray at arm.com>
  Date:   2026-03-19 (Thu, 19 Mar 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SystemOperands.td
    M llvm/test/MC/AArch64/armv9a-tlbip.s

  Log Message:
  -----------
  [AArch64][llvm] Separate TLBI-only feature gating from TLBIP aliases

Refactor the TLBI system operand definitions so that TLBI and TLBIP
records are emitted through separate helper multiclasses, whilst keeping
the table layout readable.

The feature-scoped wrappers now apply FeatureTLB_RMI, FeatureRME, and
FeatureTLBIW only to TLBI records (it was previously incorrectly also
applied to TLBIP instructions), while TLBIP aliases remain gated only
by FeatureD128, including their nXS forms.

Update testcases accordingly.


  Commit: 6adbd3acff7fa64dfcc8b6960ff2ad0ae9fb265e
      https://github.com/llvm/llvm-project/commit/6adbd3acff7fa64dfcc8b6960ff2ad0ae9fb265e
  Author: Jonathan Thackray <jonathan.thackray at arm.com>
  Date:   2026-03-19 (Thu, 19 Mar 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SystemOperands.td

  Log Message:
  -----------
  fixup! Change tablegen as suggested


  Commit: 9c44aea73aec282cc117ff83cd15961a51c93dc3
      https://github.com/llvm/llvm-project/commit/9c44aea73aec282cc117ff83cd15961a51c93dc3
  Author: Jonathan Thackray <jonathan.thackray at arm.com>
  Date:   2026-03-20 (Fri, 20 Mar 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SystemOperands.td

  Log Message:
  -----------
  fixup! Refactor TLBI tablegen


Compare: https://github.com/llvm/llvm-project/compare/023d42d56a8c...9c44aea73aec

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