[all-commits] [llvm/llvm-project] 991fd9: [MIR] Support symbolic inline asm operands (#185893)

[Ivan Kosarev via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 991fd93780097d3a8f6a729e2fe2c599ef78b538
      https://github.com/llvm/llvm-project/commit/991fd93780097d3a8f6a729e2fe2c599ef78b538
  Author: Ivan Kosarev <ivan.kosarev at amd.com>
  Date:   2026-03-13 (Fri, 13 Mar 2026)

  Changed paths:
    M llvm/lib/CodeGen/MIRParser/MIParser.cpp
    M llvm/lib/CodeGen/MIRPrinter.cpp
    M llvm/test/CodeGen/AMDGPU/dst-sel-hazard.mir
    A llvm/test/CodeGen/MIR/Generic/inline-asm-bad-mem-constraint.mir
    A llvm/test/CodeGen/MIR/Generic/inline-asm-bad-regclass.mir
    A llvm/test/CodeGen/MIR/Generic/inline-asm-no-constraint.mir

  Log Message:
  -----------
  [MIR] Support symbolic inline asm operands (#185893)

Support parsing and printing inline assembly operands in MIR using the
symbolic form instead of numeric register class IDs, thus removing the
need to update tests when the numbers change.

The numeric form remains supported.

---------

Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>



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