[all-commits] [llvm/llvm-project] f0cba9: [mlir][OpenMP] Translate omp.declare_simd to LLVM IR

[Chi-Chun, Chen via All-commits]

  Branch: refs/heads/users/cchen/declare_simd_mlir_to_llvmir
  Home:   https://github.com/llvm/llvm-project
  Commit: f0cba9da1ad94055ed7b1cf98687599861c6e020
      https://github.com/llvm/llvm-project/commit/f0cba9da1ad94055ed7b1cf98687599861c6e020
  Author: Chi Chun, Chen <chichun.chen at hpe.com>
  Date:   2026-03-11 (Wed, 11 Mar 2026)

  Changed paths:
    M clang/lib/CodeGen/CGOpenMPRuntime.cpp
    M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
    M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
    M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
    A mlir/test/Target/LLVMIR/openmp-declare-simd-x86.mlir

  Log Message:
  -----------
  [mlir][OpenMP] Translate omp.declare_simd to LLVM IR

This mod aim to generate same vector ABI [1] for declare simd as Clang
and reuse function paramater mangling and codegen logic authored by
@alexey-bataev in [2].
Codegen for AArch64 is not included in this patch.

For each omp.declare_simd, lowering computes:

ParamAttrs: one entry per function argument, classifying it as
Vector / Uniform / Linear (+ step or var-stride) / Aligned.
Branch kind: Undefined / Inbranch / Notinbranch.
VLEN: either from simdlen(...) or derived from the CDT size.
llvm then emits x86 declare-simd variants by attaching mangled
function attributes of the form:

_ZGV _

where:

ISA : b (SSE), c (AVX), d (AVX2), e (AVX-512)
Mask : M (inbranch), N (notinbranch), or both if unspecified
VLEN : explicit simdlen or computed from CDT size
ParamAttrs encoding:
v = vector, u = uniform, l = linear
sN = var-stride using argument index N
aN = alignment N

[1] https://sourceware.org/glibc/wiki/libmvec?action=AttachFile&do=view&target=VectorABI.txt
[2] c7a82b4



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