[all-commits] [llvm/llvm-project] c53ee8: [AMDGPU] DPP implementations for Wave Reduction

[Aaditya via All-commits]

  Branch: refs/heads/users/easyonaadit/amdgpu/dpp-wave-reduce-32bit
  Home:   https://github.com/llvm/llvm-project
  Commit: c53ee83f9f9b9f2f7cd2b17dec757e82d140aeac
      https://github.com/llvm/llvm-project/commit/c53ee83f9f9b9f2f7cd2b17dec757e82d140aeac
  Author: Aaditya <Aaditya.AlokDeshpande at amd.com>
  Date:   2026-03-11 (Wed, 11 Mar 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-fp-nosave.ll
    M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
    A llvm/test/CodeGen/AMDGPU/wave-reduce-dpp-i32.mir

  Log Message:
  -----------
  [AMDGPU] DPP implementations for Wave Reduction

Adding DPP reduction support for i32 types.
Supported Ops: `umin`, `min`, `umax`, `max`,
`add`, `sub`, `and`, `or`, `xor`.



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