[all-commits] [llvm/llvm-project] 2311a7: [AArch64][llvm] Gate some `tlbip` insns with +tlbi...

[Jonathan Thackray via All-commits]

  Branch: refs/heads/users/jthackray/update_tlbip_dependency
  Home:   https://github.com/llvm/llvm-project
  Commit: 2311a7176fc8542c7cf43db4b4e91ff34dc5bb62
      https://github.com/llvm/llvm-project/commit/2311a7176fc8542c7cf43db4b4e91ff34dc5bb62
  Author: Jonathan Thackray <jonathan.thackray at arm.com>
  Date:   2026-03-10 (Tue, 10 Mar 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SystemOperands.td
    M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
    M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
    M llvm/test/MC/AArch64/armv9a-tlbip.s
    A llvm/test/MC/AArch64/tlbip-tlbid-or-d128.s

  Log Message:
  -----------
  [AArch64][llvm] Gate some `tlbip` insns with +tlbid or +d128

Change the gating of `tlbip` instructions containing `*E1IS*`, `*E1OS*`,
`*E2IS*` or `*E2OS*` to be used with `+tlbid` or `+d128`. This is because
the 2025 Armv9.7-A MemSys specification says:

```
  All TLBIP *E1IS*, TLBIP*E1OS*, TLBIP*E2IS* and TLBIP*E2OS* instructions
  that are currently dependent on FEAT_D128 are updated to be dependent
  on FEAT_D128 or FEAT_TLBID
```


  Commit: 65094cbdb0207ce4bbc0967a6407d186fa0fabf7
      https://github.com/llvm/llvm-project/commit/65094cbdb0207ce4bbc0967a6407d186fa0fabf7
  Author: Jonathan Thackray <jonathan.thackray at arm.com>
  Date:   2026-03-10 (Tue, 10 Mar 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SystemOperands.td
    M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

  Log Message:
  -----------
  fixup! Simplify logic after suggestions from Marian


  Commit: abb2d9acca08961f659a42e633cd4dd3435bc3aa
      https://github.com/llvm/llvm-project/commit/abb2d9acca08961f659a42e633cd4dd3435bc3aa
  Author: Jonathan Thackray <jonathan.thackray at arm.com>
  Date:   2026-03-10 (Tue, 10 Mar 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SystemOperands.td
    M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
    M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h

  Log Message:
  -----------
  fixup! Don't use ExtraRequires. Instead, set a boolean in TLBITableBase


  Commit: 13c39f8f4f32c7f956cbbbc716c62f445e81474c
      https://github.com/llvm/llvm-project/commit/13c39f8f4f32c7f956cbbbc716c62f445e81474c
  Author: Jonathan Thackray <jonathan.thackray at arm.com>
  Date:   2026-03-10 (Tue, 10 Mar 2026)

  Changed paths:
    M llvm/test/MC/AArch64/armv9a-tlbip.s
    R llvm/test/MC/AArch64/tlbip-tlbid-or-d128.s

  Log Message:
  -----------
  fixup! Fix using Marian's suggestion


  Commit: 4da30173ebcb1df0674731d24d136df66819970a
      https://github.com/llvm/llvm-project/commit/4da30173ebcb1df0674731d24d136df66819970a
  Author: Jonathan Thackray <jonathan.thackray at arm.com>
  Date:   2026-03-10 (Tue, 10 Mar 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SystemOperands.td
    M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
    M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h

  Log Message:
  -----------
  fixup! More optimisations


Compare: https://github.com/llvm/llvm-project/compare/24e96183daa2...4da30173ebcb

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