[all-commits] [llvm/llvm-project] 04c6e4: [AMDGPU] Add ML-oriented coexec scheduler selectio...

Mon Mar 9 16:27:58 PDT 2026

  Branch: refs/heads/users/jebyrnes/DS-FIFO-stalls
  Home:   https://github.com/llvm/llvm-project
  Commit: 04c6e4ee68d9e18682be3896ca5675da2633d01e
      https://github.com/llvm/llvm-project/commit/04c6e4ee68d9e18682be3896ca5675da2633d01e
  Author: Austin Kerbow <Austin.Kerbow at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    A llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
    A llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/CMakeLists.txt
    M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
    M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
    M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
    A llvm/test/CodeGen/AMDGPU/amdgpu-workload-type-scheduler-debug.mir
    A llvm/test/CodeGen/AMDGPU/coexec-sched-effective-stall.mir

  Log Message:
  -----------
  [AMDGPU] Add ML-oriented coexec scheduler selection and queue handling

This patch adds the initial coexec scheduler scaffold for machine
learning workloads on gfx1250.

It introduces function and module-level controls for selecting the
AMDGPU preRA and postRA schedulers, including an `amdgpu-workload-type`
module flag that maps ML workloads to coexec preRA scheduling and a nop
postRA scheduler by default.

It also updates the coexec scheduler to use a simplified top-down
candidate selection path that considers both available and pending
queues through a single flow, setting up follow-on heuristic work.

  Commit: 19977f9c8af70845f8c4e6d0f0018f1d00038df0
      https://github.com/llvm/llvm-project/commit/19977f9c8af70845f8c4e6d0f0018f1d00038df0
  Author: Austin Kerbow <Austin.Kerbow at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
    M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
    R llvm/test/CodeGen/AMDGPU/amdgpu-workload-type-scheduler-debug.mir

  Log Message:
  -----------
  Remove module "workload-type" metadata.

  Commit: bc2d2769cd201fc15c2ea3670f4d039ef982dcc9
      https://github.com/llvm/llvm-project/commit/bc2d2769cd201fc15c2ea3670f4d039ef982dcc9
  Author: Austin Kerbow <Austin.Kerbow at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp

  Log Message:
  -----------
  Formating.

  Commit: 28e38e4373205f88a472ad8531623e33c72f927a
      https://github.com/llvm/llvm-project/commit/28e38e4373205f88a472ad8531623e33c72f927a
  Author: Austin Kerbow <Austin.Kerbow at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
    M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
    M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
    M llvm/test/CodeGen/AMDGPU/coexec-sched-effective-stall.mir

  Log Message:
  -----------
  [AMDGPU] Add structural stall heuristic to scheduling strategies

Implements a structural stall heuristic that considers both resource
hazards and latency constraints when selecting instructions. In coexec,
this changes the pending queue from a binary “not ready to issue”
distinction into part of a unified candidate comparison. Pending
instructions still identify structural stalls in the current cycle, but
they are now evaluated directly against available instructions by stall
cost, making the heuristics both more intuitive and more expressive.

- Add getStructuralStallCycles() to GCNSchedStrategy that computes the
number of cycles an instruction must wait due to:
  - Resource conflicts on unbuffered resources (from the SchedModel)
  - Sequence-dependent hazards (from GCNHazardRecognizer)

- Add getHazardWaitStates() to GCNHazardRecognizer that returns the number
of wait states until all hazards for an instruction are resolved,
providing cycle-accurate hazard information for scheduling heuristics.

  Commit: 8f07552373589bfb51d16180cd1e8ff9e3d3f9df
      https://github.com/llvm/llvm-project/commit/8f07552373589bfb51d16180cd1e8ff9e3d3f9df
  Author: Austin Kerbow <Austin.Kerbow at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/coexec-sched-effective-stall.mir

  Log Message:
  -----------
  Update coexec-sched-effective-stall.mir

  Commit: 1cfd5a4923761e1ac6a7992680207bef9b70082a
      https://github.com/llvm/llvm-project/commit/1cfd5a4923761e1ac6a7992680207bef9b70082a
  Author: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
    M llvm/test/CodeGen/AMDGPU/coexec-sched-effective-stall.mir
    A llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll

  Log Message:
  -----------
  [AMDGPU] Add HWUI pressure heuristics to coexec strategy

Change-Id: I322cc670c8d923a6df23588d8a14cdaec1f49da9

  Commit: e18117ef4d377de2620ddd531d841913d16408a8
      https://github.com/llvm/llvm-project/commit/e18117ef4d377de2620ddd531d841913d16408a8
  Author: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp

  Log Message:
  -----------
  Change old code

Change-Id: I26cff6c0c5743684778f022b264c9930eeff24ce

  Commit: a4ab49a05a4b81a4aa04bfd994cb94d2b96f8e37
      https://github.com/llvm/llvm-project/commit/a4ab49a05a4b81a4aa04bfd994cb94d2b96f8e37
  Author: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/coexec-sched-effective-stall.mir

  Log Message:
  -----------
  Fix mir test

Change-Id: I1b3dba10ea74c98454c433ecd52b165836929075

  Commit: a8caa422e120cdac3b7ba51fe4ffdfebfeba8e58
      https://github.com/llvm/llvm-project/commit/a8caa422e120cdac3b7ba51fe4ffdfebfeba8e58
  Author: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h

  Log Message:
  -----------
  Use AMDGPU namespace + const ref

Change-Id: Ie4ca27528c92dbd0f3cf6293d9bc25d13b7d31fc

  Commit: 2ec0ff7217d1af16bd094504b4b0e5abb16cab6a
      https://github.com/llvm/llvm-project/commit/2ec0ff7217d1af16bd094504b4b0e5abb16cab6a
  Author: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
    M llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll

  Log Message:
  -----------
  [AMDGPU] Add stalls for DS FIFO buffer

Change-Id: I73e56da97a931349e0655e4e20b24aeb97920647

Compare: https://github.com/llvm/llvm-project/compare/04c6e4ee68d9%5E...2ec0ff7217d1

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