[all-commits] [llvm/llvm-project] bd15e6: [mlir][docs] Add LLVM target passes to the docs (#...

Krzysztof Parzyszek via All-commits all-commits at lists.llvm.org
Mon Mar 9 05:58:50 PDT 2026


  Branch: refs/heads/users/kparzysz/e03-move-utils
  Home:   https://github.com/llvm/llvm-project
  Commit: bd15e6b7368ce81028197b8caff709baf1d4a662
      https://github.com/llvm/llvm-project/commit/bd15e6b7368ce81028197b8caff709baf1d4a662
  Author: Markus Böck <markus.boeck02 at gmail.com>
  Date:   2026-03-08 (Sun, 08 Mar 2026)

  Changed paths:
    M mlir/docs/Passes.md

  Log Message:
  -----------
  [mlir][docs] Add LLVM target passes to the docs (#185283)

These passes are useful for translating between LLVM proper and the LLVM
dialect and have so far been missing in the documentation.


  Commit: 8b5331f06f5e58dcb99fd8ebd75d209975f714b7
      https://github.com/llvm/llvm-project/commit/8b5331f06f5e58dcb99fd8ebd75d209975f714b7
  Author: Ezlanding1 <113404035+Ezlanding1 at users.noreply.github.com>
  Date:   2026-03-08 (Sun, 08 Mar 2026)

  Changed paths:
    M clang/docs/ClangFormatStyleOptions.rst
    M clang/include/clang/Format/Format.h
    M clang/lib/Format/Format.cpp
    M clang/lib/Format/UnwrappedLineFormatter.cpp
    M clang/lib/Format/UnwrappedLineParser.cpp
    M clang/lib/Format/UnwrappedLineParser.h
    M clang/unittests/Format/ConfigParseTest.cpp
    M clang/unittests/Format/FormatTest.cpp

  Log Message:
  -----------
  [clang-format] Update goto label indentation styles (#180109)

Updates the goto label indentation styles based on the feature request. 

Resolves #24492.


  Commit: 6b290688f4aef7201d61dde6d283831ee408d9a1
      https://github.com/llvm/llvm-project/commit/6b290688f4aef7201d61dde6d283831ee408d9a1
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2026-03-08 (Sun, 08 Mar 2026)

  Changed paths:
    M llvm/test/CodeGen/X86/setcc-logic.ll

  Log Message:
  -----------
  [X86] setcc-logic.ll - add i128 cmpeq(or(X,Y),X) --> cmpeq(and(~X,Y),0) test (#185289)

Inspired by #157687


  Commit: af22b50fac2311ff3f859e4e8bdec552c7aa8d5a
      https://github.com/llvm/llvm-project/commit/af22b50fac2311ff3f859e4e8bdec552c7aa8d5a
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2026-03-08 (Sun, 08 Mar 2026)

  Changed paths:
    M .ci/monolithic-windows.sh

  Log Message:
  -----------
  [CI] Try lowering max parallel link jobs on Windows (#185255)

It looks like #177477 might be caused by OOMs due to running too many
link jobs at the same time in rare circumstances. It doesn't reproduce
often enough for me to be able to easily check the event logs to confirm
the OOM killer was involved (I did try 192 runs), but it doesn't hurt to
try. This could slightly decrease performance, but given these are
vCPUs, even if we need to run only link jobs, we should take only a
10-20% performance hit for the link phase, which is generally not a
large portion of the build.


  Commit: aa89092c0219709775fdc0957095aeb919afb1c2
      https://github.com/llvm/llvm-project/commit/aa89092c0219709775fdc0957095aeb919afb1c2
  Author: Antonio Frighetto <me at antoniofrighetto.com>
  Date:   2026-03-08 (Sun, 08 Mar 2026)

  Changed paths:
    M llvm/include/llvm/Support/ModRef.h
    M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
    M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
    M llvm/test/Transforms/InferFunctionAttrs/enable-builtin.ll

  Log Message:
  -----------
  [InferAttrs] malloc-family libcalls may write `errnomem` location

A miscompilation issue has been addressed via refined handling.

Fixes: https://github.com/llvm/llvm-project/issues/114772.
Fixes: https://github.com/llvm/llvm-project/issues/63142.


  Commit: 6365d46654543484731c483c73a1b6bafdf8a354
      https://github.com/llvm/llvm-project/commit/6365d46654543484731c483c73a1b6bafdf8a354
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2026-03-08 (Sun, 08 Mar 2026)

  Changed paths:
    M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
    M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel

  Log Message:
  -----------
  [Bazel] Fix af7c352fa38d49096888df6c99d010d274362aa6 (#185308)

This added a user of the ABI library into clang. We did not have the ABI
library set up as a build target yet. This patch does that and also adds
the relevant use in clang.


  Commit: aca4a8f644d12d947ab9b24784a4ea3efaeeeb4f
      https://github.com/llvm/llvm-project/commit/aca4a8f644d12d947ab9b24784a4ea3efaeeeb4f
  Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
    M llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll
    M llvm/test/CodeGen/AMDGPU/vgpr-agpr-limit-gfx90a.ll
    M llvm/test/CodeGen/AMDGPU/vgpr-limit-gfx1250.ll

  Log Message:
  -----------
  [AMDGPU] Add missing -wwm-regalloc=fast to 4 more tests (NFC) (#184966)

Adding the missing wwm-regalloc=fast option in 4 more tests
that already specify -sgpr-regalloc=fast and -vgpr-regalloc=fast.
For consistency, the same preference should be applied to the
wwm-regalloc pipeline as well.
This is a follow-up to #184190 which addressed the same issue in
attr-amdgpu-flat-work-group-size-vgpr-limit.ll.


  Commit: 647b1e38754aff87eeb500af2d061a0898094cbd
      https://github.com/llvm/llvm-project/commit/647b1e38754aff87eeb500af2d061a0898094cbd
  Author: Srinivasa Ravi <srinivasar at nvidia.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
    M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
    M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
    M mlir/test/Target/LLVMIR/nvvm/addf/addf_invalid.mlir
    A mlir/test/Target/LLVMIR/nvvm/subf/subf.mlir
    A mlir/test/Target/LLVMIR/nvvm/subf/subf_invalid.mlir
    A mlir/test/Target/LLVMIR/nvvm/subf/subf_vector.mlir

  Log Message:
  -----------
  [MLIR][NVVM] Add LLVMIR lowering for nvvm.subf (#184968)

This change adds direct LLVMIR lowering to the `nvvm.subf` operation
added in #179162 to prevent translation failures when canonicalization
is not run. Also adds `mlir-translate` tests for `nvvm.subf`.

PTX ISA Reference:
1.
https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-sub
2.
https://docs.nvidia.com/cuda/parallel-thread-execution/#half-precision-floating-point-instructions-sub


  Commit: f7ab364f5e599de1cb1da2be4052e448afe2c8ff
      https://github.com/llvm/llvm-project/commit/f7ab364f5e599de1cb1da2be4052e448afe2c8ff
  Author: David Green <david.green at arm.com>
  Date:   2026-03-08 (Sun, 08 Mar 2026)

  Changed paths:
    M llvm/lib/Target/ARM/ARM.h
    M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
    A llvm/lib/Target/ARM/ARMPassRegistry.def
    M llvm/lib/Target/ARM/ARMTargetMachine.cpp
    M llvm/lib/Target/ARM/ARMTargetMachine.h
    M llvm/test/CodeGen/ARM/ARMLoadStoreDBG.mir
    M llvm/test/CodeGen/ARM/prera-ldst-aliasing.mir

  Log Message:
  -----------
  [ARM] Add basic NPM support for LoadStoreOptimizer (#184139)

This is similar to #184090 for ARM, porting the LoadStoreOptimizer to
the new pass manager. The time there are both a pre-ra and post-ra
variant that are ported.


  Commit: 2207296d3f591c3a668edf84927130e28b9d8461
      https://github.com/llvm/llvm-project/commit/2207296d3f591c3a668edf84927130e28b9d8461
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-03-08 (Sun, 08 Mar 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
    M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll

  Log Message:
  -----------
  [VPlan] Fold constant trunc after EVL simplification.

This fixes a crash for the new test after
6aa115bba55054b0dc81ebfc049e8c7a29e614b2.


  Commit: e25e010b9618157e0e05a387995271581e95b1f1
      https://github.com/llvm/llvm-project/commit/e25e010b9618157e0e05a387995271581e95b1f1
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2026-03-08 (Sun, 08 Mar 2026)

  Changed paths:
    A llvm/test/Transforms/SLPVectorizer/X86/bswap-i64-by-i32-chunks.ll

  Log Message:
  -----------
  [SLP][NFC]Add a test for bswap of i64 by 2 i32 bswaps


  Commit: ecda6d1691b8c743fcc9d059f65dcef7d3308305
      https://github.com/llvm/llvm-project/commit/ecda6d1691b8c743fcc9d059f65dcef7d3308305
  Author: Sergei Lebedev <185856+superbobry at users.noreply.github.com>
  Date:   2026-03-08 (Sun, 08 Mar 2026)

  Changed paths:
    R mlir/lib/Bindings/Python/stubgen_runner.py
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
    M utils/bazel/llvm-project-overlay/mlir/build_defs.bzl
    M utils/bazel/third_party_build/nanobind.BUILD

  Log Message:
  -----------
  [MLIR] [Bazel] Removed the stubgen plumbing added in #179211 (#185292)

The hope was that we would be able to reuse parts of this for
Google-internal builds and for open-source jaxlib builds, but we ended
up with custom plumbing in both cases, so I am now removing this
effectively dead code.


  Commit: ae282974b8a40e20a4c55dfffba84d24db843d74
      https://github.com/llvm/llvm-project/commit/ae282974b8a40e20a4c55dfffba84d24db843d74
  Author: Berkay Sahin <berkaysahindev at gmail.com>
  Date:   2026-03-08 (Sun, 08 Mar 2026)

  Changed paths:
    M clang-tools-extra/clang-tidy/readability/ElseAfterReturnCheck.cpp
    M clang-tools-extra/docs/ReleaseNotes.rst
    A clang-tools-extra/test/clang-tidy/checkers/readability/else-after-return-cxx20.cpp

  Log Message:
  -----------
  [clang-tidy] Fix readability-else-after-return for [[likely]]/[[unlikely]] if (#184684)

Following the PR #181878 I have noticed a false negative when if is
attributed.

Repro:

```cpp
void f()
{
    if (true) {
        return;
    } else {
        // Warns as expected
    }

    if (true) [[likely]] {
        return;
    } else {
        // False-negative
    }
}
```

Godbolt: https://godbolt.org/z/cvGdovjhx


  Commit: 483fc738ff106e22877cf3a1b0ca01ae5cac29ec
      https://github.com/llvm/llvm-project/commit/483fc738ff106e22877cf3a1b0ca01ae5cac29ec
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-03-08 (Sun, 08 Mar 2026)

  Changed paths:
    M llvm/include/llvm/Analysis/Loads.h
    M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
    M llvm/lib/Analysis/Loads.cpp
    M llvm/lib/Analysis/LoopAccessAnalysis.cpp

  Log Message:
  -----------
  [Loads] Add overload for isDerefAndAlignedInLoop that takes SCEVs.(NFC)

Add an overload of isDereferenceableAndAlignedInLoop that directly takes
the pointer and element sizes as SCEVs. This allows using it from
contexts without relying on an underlying load instruction in follow-up
patches.


  Commit: 4df95b1a56b4445ffffd916e0ff551f5ce75d555
      https://github.com/llvm/llvm-project/commit/4df95b1a56b4445ffffd916e0ff551f5ce75d555
  Author: Jakub Kuderski <jakub at nod-labs.com>
  Date:   2026-03-08 (Sun, 08 Mar 2026)

  Changed paths:
    M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
    M mlir/test/Dialect/LLVMIR/nvvm.mlir
    M mlir/test/Target/LLVMIR/nvvmir.mlir
    M mlir/test/python/dialects/nvvm.py

  Log Message:
  -----------
  [mlir][NVVM] Fix double spaces in tests after ODS printer fix. NFC. (#185326)

Follow-up to #184253. Update tests that checked for the old double-space
output of NVVM ops using ReductionKindAttr, ShflKindAttr, and
LoadCacheModifierAttr.

Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>


  Commit: 15e7177f088eeb5aa7be5d30632e7b5e815fa8aa
      https://github.com/llvm/llvm-project/commit/15e7177f088eeb5aa7be5d30632e7b5e815fa8aa
  Author: Jakub Kuderski <jakub at nod-labs.com>
  Date:   2026-03-08 (Sun, 08 Mar 2026)

  Changed paths:
    M mlir/test/Conversion/VectorToGPU/vector-to-mma-ops.mlir
    M mlir/test/Dialect/Affine/ops.mlir
    M mlir/test/Dialect/GPU/subgroup-mma-vector-unroll.mlir
    M mlir/test/Dialect/GPU/subgroupId-rewrite.mlir
    M mlir/test/Dialect/GPU/transform-gpu.mlir
    M mlir/test/Dialect/SparseTensor/GPU/gpu_matmul.mlir
    M mlir/test/Dialect/SparseTensor/GPU/gpu_matvec.mlir
    M mlir/test/Dialect/Vector/vector-warp-distribute.mlir
    M mlir/test/Integration/GPU/CUDA/sm90/cga_cluster.mlir
    M mlir/test/Integration/GPU/CUDA/sm90/gemm_f32_f16_f16_128x128x128.mlir
    M mlir/test/Integration/GPU/CUDA/sm90/gemm_pred_f32_f16_f16_128x128x128.mlir
    M mlir/test/Integration/GPU/CUDA/sm90/tma_load_128x128_stride_noswizzle.mlir
    M mlir/test/Integration/GPU/CUDA/sm90/tma_load_128x64_swizzle128b.mlir
    M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x64_swizzle128b.mlir
    M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x8_8x128_noswizzle.mlir
    M mlir/test/Integration/GPU/CUDA/sm90/transform-dialect/tma_load_64x8_8x128_noswizzle-transform.mlir
    M mlir/test/Integration/GPU/LevelZero/gpu-addf32-to-spirv.mlir
    M mlir/test/Integration/GPU/LevelZero/gpu-addi64-to-spirv.mlir
    M mlir/test/Integration/GPU/LevelZero/gpu-memcpy-addf32-to-spirv.mlir
    M mlir/test/Integration/GPU/LevelZero/gpu-reluf32-to-spirv.mlir
    M mlir/test/Integration/GPU/SYCL/gpu-addf32-to-spirv.mlir
    M mlir/test/Integration/GPU/SYCL/gpu-addi64-to-spirv.mlir
    M mlir/test/Integration/GPU/SYCL/gpu-memcpy-addf32-to-spirv.mlir
    M mlir/test/Integration/GPU/SYCL/gpu-reluf32-to-spirv.mlir
    M mlir/test/python/dialects/gpu/dialect.py

  Log Message:
  -----------
  [mlir][GPU] Fix double spaces in tests after ODS printer fix. NFC. (#185325)

Follow-up to #184253. The ODS attr/type printer fix removed the leading
space from generated print() methods. Update tests that checked for the
old double-space output of GPU ops using GPU_DimensionAttr and
GPU_MmaElementwiseOpAttr.

Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>


  Commit: fac1866cdf58fba3f9ce93835c2dc79858676895
      https://github.com/llvm/llvm-project/commit/fac1866cdf58fba3f9ce93835c2dc79858676895
  Author: SiliconA-Z <gfunni234 at gmail.com>
  Date:   2026-03-08 (Sun, 08 Mar 2026)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/avx512-cmp.ll
    M llvm/test/CodeGen/X86/known-pow2.ll
    M llvm/test/CodeGen/X86/setcc-logic.ll

  Log Message:
  -----------
  [X86] Remove redundant and-not pattern code in X86 (#157687)

These transforms are now handled in DAGCombine, so enable
hasAndNotCompare for all scalar cases on X86, and remove the
platform-specific code that does the same thing.


  Commit: e4160cb52d48f63abb520dcba8d212ea79f617cf
      https://github.com/llvm/llvm-project/commit/e4160cb52d48f63abb520dcba8d212ea79f617cf
  Author: Chi-Chun, Chen <chichun.chen at hpe.com>
  Date:   2026-03-08 (Sun, 08 Mar 2026)

  Changed paths:
    M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
    M flang/lib/Lower/OpenMP/Utils.cpp
    M flang/lib/Lower/OpenMP/Utils.h
    R flang/test/Lower/OpenMP/Todo/affinity-clause.f90
    M flang/test/Lower/OpenMP/task-affinity.f90
    M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
    M mlir/include/mlir/Dialect/OpenMP/OpenMPOpBase.td
    M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
    M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
    M mlir/test/Dialect/OpenMP/ops.mlir
    M mlir/test/Target/LLVMIR/openmp-todo.mlir

  Log Message:
  -----------
  [Flang][mlir][OpenMP] Support affinity clause codegen in Flang (#182222)

This patch translates the Flang AST to the OpenMP dialect for the
affinity clause, including support for the iterator modifier.

2/3 in stack for implementing affinity clause with iterator modifier
1/3 #182218
2/3 #182222
3/3 #182223


  Commit: ade63092295313f991a3d4999eedfe01d3484f69
      https://github.com/llvm/llvm-project/commit/ade63092295313f991a3d4999eedfe01d3484f69
  Author: Jakub Kuderski <jakub at nod-labs.com>
  Date:   2026-03-08 (Sun, 08 Mar 2026)

  Changed paths:
    M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
    M mlir/test/Dialect/XeGPU/sg-to-wi-experimental.mlir
    M mlir/test/Dialect/XeGPU/subgroup-distribute.mlir
    M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
    M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
    M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
    M mlir/test/Integration/Dialect/XeGPU/LANE/no-xegpu-ops.mlir

  Log Message:
  -----------
  [mlir][XeGPU] Fix double spaces in tests after ODS printer fix. NFC. (#185324)

Follow-up to #184253. Update tests that checked for the old double-space
output of gpu.block_id using GPU_DimensionAttr.

Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>


  Commit: 7c13f88ecc0547a045a3726593c3bf716c182f07
      https://github.com/llvm/llvm-project/commit/7c13f88ecc0547a045a3726593c3bf716c182f07
  Author: Jakub Kuderski <jakub at nod-labs.com>
  Date:   2026-03-08 (Sun, 08 Mar 2026)

  Changed paths:
    M mlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm.mlir
    M mlir/test/Dialect/NVGPU/canonicalization.mlir
    M mlir/test/Dialect/NVGPU/tmaload-transform.mlir
    M mlir/test/Dialect/NVGPU/transform-matmul-to-nvvm.mlir
    M mlir/test/Examples/NVGPU/Ch0.py
    M mlir/test/Examples/NVGPU/Ch3.py
    M mlir/test/Examples/NVGPU/Ch4.py
    M mlir/test/Examples/NVGPU/Ch5.py

  Log Message:
  -----------
  [mlir][NVGPU] Fix double spaces in tests after ODS printer fix. NFC. (#185327)

Follow-up to #184253. Update tests that checked for the old double-space
output of GPU and NVVM ops using GPU_DimensionAttr and
SetMaxRegisterActionAttr.

Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>


  Commit: 19018866156f0ca3907d083d9c44047ee7451f7b
      https://github.com/llvm/llvm-project/commit/19018866156f0ca3907d083d9c44047ee7451f7b
  Author: Jim Lin <jim at andestech.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVSchedAndes45.td
    M llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-mask.s
    M llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-permutation.s

  Log Message:
  -----------
  [RISCV] Update Andes45 vector mask scheduling info (#184719)

This PR adds latency/throughput for all RVV mask to the andes45 series
scheduling model.


  Commit: d8474abfc1e7c3856b85b088f1133ae2e90da3d0
      https://github.com/llvm/llvm-project/commit/d8474abfc1e7c3856b85b088f1133ae2e90da3d0
  Author: zhouguangyuan0718 <zhouguangyuan.xian at gmail.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M clang/lib/Driver/ToolChains/Arch/X86.cpp
    M llvm/lib/Target/X86/X86RegisterInfo.cpp
    M llvm/lib/Target/X86/X86Subtarget.cpp
    M llvm/lib/Target/X86/X86Subtarget.h

  Log Message:
  -----------
  [X86] Reduce -ffixed-r compile-time overhead (#184606)

PR #180242 added reserve-r support across the driver and backend, but it
also introduced avoidable compile-time work in hot paths.

In Clang, delay +egpr detection until -ffixed-r16 through -ffixed-r31
are actually queried instead of computing it for every x86_64
invocation.

In LLVM, store X86Subtarget::ReservedRReg in a fixed-size std::bitset
and update X86RegisterInfo::getReservedRegs() to iterate only over the
reserve-r register ranges instead of scanning every target register.

These changes keep reserve-r behavior unchanged while trimming the extra
compile-time overhead introduced by the PR.

Signed-off-by: ZhouGuangyuan <zhouguangyuan.xian at gmail.com>


  Commit: ed5f4afa2b5cbb7ec8b0e3ff1bff0ed2042c4e6d
      https://github.com/llvm/llvm-project/commit/ed5f4afa2b5cbb7ec8b0e3ff1bff0ed2042c4e6d
  Author: Jacques Pienaar <jacques+gh at japienaar.info>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M mlir/include/mlir/Bytecode/BytecodeImplementation.h
    M mlir/include/mlir/IR/BuiltinDialect.h
    M mlir/include/mlir/IR/BuiltinDialect.td
    M mlir/lib/Bytecode/Reader/BytecodeReader.cpp
    M mlir/lib/IR/BuiltinDialectBytecode.cpp
    A mlir/unittests/IR/BuiltinDialectVersionTest.cpp
    M mlir/unittests/IR/CMakeLists.txt
    M utils/bazel/llvm-project-overlay/mlir/unittests/BUILD.bazel

  Log Message:
  -----------
  [mlir][bytecode] Add builtin dialect version (#184678)

This adds a singular Builtin dialect version for use with bytecode
serialization. This version is not currently print unless set and not 0
(not planned a bump until next LLVM version). Created a unit test as
this was easiest way to track.

Additionally add emitWarning virtual method to DialectBytecodeReader,
mirroring emitError.

Tested on old mlir-opt reader, and could read, so should be non-breaking
change.


  Commit: 1e28b7ef9c7480c33de836582611d9d32c84f6c8
      https://github.com/llvm/llvm-project/commit/1e28b7ef9c7480c33de836582611d9d32c84f6c8
  Author: Weibo He <NewSigma at 163.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/lib/Transforms/Coroutines/CoroCleanup.cpp
    M llvm/test/Transforms/Coroutines/coro-cleanup-noop-elide.ll

  Log Message:
  -----------
  [CoroCleanup] Fix stale unwind predecessor when erase noop coro (#185337)

This patch fixes two crashing reports.

Close #185155
Close #185274


  Commit: 95a9647f2ac5827042a4755c8c022bcebaf2bca8
      https://github.com/llvm/llvm-project/commit/95a9647f2ac5827042a4755c8c022bcebaf2bca8
  Author: Srinivasa Ravi <srinivasar at nvidia.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
    M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
    M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
    A mlir/test/Target/LLVMIR/nvvm/fma/fma.mlir
    A mlir/test/Target/LLVMIR/nvvm/fma/fma_invalid.mlir
    A mlir/test/Target/LLVMIR/nvvm/fma/fma_vector.mlir

  Log Message:
  -----------
  [MLIR][NVVM] Add nvvm.fma Op (#184776)

Adds `nvvm.fma` Op to the NVVM dialect to perform fused multiply-add
operations.

PTX ISA Reference:
1.
https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-fma
2.
https://docs.nvidia.com/cuda/parallel-thread-execution/#half-precision-floating-point-instructions-fma


  Commit: f68af65300181e27f097e6b6b4c5bdef9c77cc3c
      https://github.com/llvm/llvm-project/commit/f68af65300181e27f097e6b6b4c5bdef9c77cc3c
  Author: Arun Thangamani <arun.thangamani at intel.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M mlir/lib/Dialect/X86/Transforms/VectorContractToPackedTypeDotProduct.cpp
    M mlir/lib/Dialect/X86/Utils/X86Utils.cpp
    M mlir/test/Dialect/X86/vector-contract-to-packed-type-dotproduct.mlir

  Log Message:
  -----------
  [mlir][x86] Extends vector.contract Flat dot-product lowering for arg offset (#185167)

Extends `vector_contract_to_packed_type_dot_product` transform pass to
include `args` offset check while validating the `vector.contract`.
Eg: `vector.transfer_read %arg1[%arg3, %c0], %0 {in_bounds = [true,
true]} : !memref, !vec`


  Commit: 1d6607d5ef1ea88770fdfd940c2545c36221817b
      https://github.com/llvm/llvm-project/commit/1d6607d5ef1ea88770fdfd940c2545c36221817b
  Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
    M llvm/test/CodeGen/AMDGPU/vgpr-spill.mir

  Log Message:
  -----------
  [AMDGPU] Remove alignment constraint from spill pseudos (#177317)

Spill pseudo opcodes don't require target reg class alignment
constraint.
For targets which do have alignment constraints, lower the spills to
32-bit accesses.
Update the machine verifier accordingly.
Sgpr spill pseudos didn't enforce alignment constraints.
Modify vgpr spills reg class to not enforce them either.


  Commit: e30f9c19464bcf1bf1e9f69b63884fb78ad2d05d
      https://github.com/llvm/llvm-project/commit/e30f9c19464bcf1bf1e9f69b63884fb78ad2d05d
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
    M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs-apple.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/vector-loop-backedge-elimination-with-evl.ll
    M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
    M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-ordered-reduction.ll
    M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
    M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
    M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
    M llvm/test/Transforms/LoopVectorize/load-deref-pred-poison-ub-ops-feeding-pointer.ll
    M llvm/test/Transforms/LoopVectorize/reduction-minmax-users-and-predicated.ll
    M llvm/test/Transforms/LoopVectorize/single-early-exit-cond-poison.ll
    M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
    M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll

  Log Message:
  -----------
  Revert "Reapply "[VPlan] Remove manual region removal when simplifying for VF and UF. (#181252)""

This reverts commit 6aa115bba55054b0dc81ebfc049e8c7a29e614b2.

This is causing crashes. See #185345 for details.


  Commit: 874ef0073aba2498516b06c8f2ec91a14e4d4336
      https://github.com/llvm/llvm-project/commit/874ef0073aba2498516b06c8f2ec91a14e4d4336
  Author: jay0x <90309873+blazie2004 at users.noreply.github.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M flang/lib/Lower/ConvertConstant.cpp
    A flang/test/Lower/pdt-struct-constructor-init.f90

  Log Message:
  -----------
  [Flang] Fix crash in structure constructor lowering for PDT (#183543)

Fixes - [#181278](https://github.com/llvm/llvm-project/issues/181278)
This patch fixes a crash in Flang when parsing array constructors like:
 

`[ty0(2)(4)]`
 
The current implementation parses this as a type constructor ty0(2),
followed by what appears to be another call (4), instead of rejecting it
as invalid syntax. The lowering of` StructureConstructor` attempts to
retrieve the parent derived type using `sym->owner().derivedTypeSpec()`,
which return `nullptr` for PDT cases and lead to a crash.
 
In` flang/lib/Lower/ConvertConstant.cpp`, a safeguard is being added
which ensures that we fall back to the constructor’s derived type
specification when the parent type cannot be obtained, preventing the
null dereference and eliminating the crash. This change addresses only
the immediate crash, proper diagnostic handling for this invalid syntax
is still pending and remains as TODO.

---------

Co-authored-by: Jay Satish Kumar Patel <kumarpat at pe31.hpc.amslabs.hpecorp.net>


  Commit: d0ddae678e3f634c988542dfbdde1dd0afe66344
      https://github.com/llvm/llvm-project/commit/d0ddae678e3f634c988542dfbdde1dd0afe66344
  Author: Sairudra More <sairudra60 at gmail.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M flang/lib/Lower/HlfirIntrinsics.cpp
    M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
    A flang/test/Lower/HLFIR/cshift-optional-dim.f90

  Log Message:
  -----------
  [flang] Fix segfault in CSHIFT/EOSHIFT with dynamically optional DIM (#184431)

When `DIM` is passed as an optional dummy argument and is absent at
runtime, the HLFIR lowering for the `CSHIFT` and `EOSHIFT` intrinsics
treated it as unconditionally present. This resulted in an unconditional
load of the `DIM` reference, causing a null pointer dereference and a
runtime segmentation fault when absent.

The underlying issue was that the `dim` argument for `cshift` and
`eoshift` was not marked with `handleDynamicOptional` during intrinsic
argument lowering setup. As a result, the `isPresent` state was never
populated, and the lowering implementation incorrectly fell through to
an unconditional scalar load.

This patch resolves the issue by:
1. Updating the `dim` entries for `cshift` and `eoshift` in
`IntrinsicCall.cpp` to use `handleDynamicOptional`. This enables
`getOperandVector()` to appropriately emit a guarded load (via
`loadOptionalValue()`) that safely returns a 0 placeholder when `DIM` is
absent.
2. Updating the HLFIR lowering implementations (`HlfirCShiftLowering`
and `HlfirEOShiftLowering`) to use the loaded scalar. It now employs an
`arith.select` to substitute the 0 placeholder with the
standard-mandated default of 1 when `isPresent` is false, matching the
Fortran requirements (§16.9.68 and §16.9.77) without generating
redundant `fir.if` or `fir.load` operations. Explicit `DIM=0` calls
still correctly forward the 0 value to flang-rt to trigger the
appropriate runtime bounds check error.

Co-authored-by: Sairudra More <moresair at pe31.hpc.amslabs.hpecorp.net>


  Commit: 76cfb0b68e6e196bb0421df04554a718c54701c1
      https://github.com/llvm/llvm-project/commit/76cfb0b68e6e196bb0421df04554a718c54701c1
  Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp

  Log Message:
  -----------
  [NFC][AMDGPU] WaitEventSet should only print events that it contains


  Commit: e20ae16ce6723a61f3387867e78f1096399ca74e
      https://github.com/llvm/llvm-project/commit/e20ae16ce6723a61f3387867e78f1096399ca74e
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M libclc/CMakeLists.txt
    A libclc/clc/lib/amdgcn/CMakeLists.txt
    R libclc/clc/lib/amdgcn/SOURCES
    A libclc/clc/lib/amdgpu/CMakeLists.txt
    R libclc/clc/lib/amdgpu/SOURCES
    A libclc/clc/lib/clspv/CMakeLists.txt
    R libclc/clc/lib/clspv/SOURCES
    A libclc/clc/lib/generic/CMakeLists.txt
    R libclc/clc/lib/generic/SOURCES
    A libclc/clc/lib/ptx-nvidiacl/CMakeLists.txt
    R libclc/clc/lib/ptx-nvidiacl/SOURCES
    A libclc/clc/lib/spirv/CMakeLists.txt
    R libclc/clc/lib/spirv/SOURCES
    M libclc/cmake/modules/AddLibclc.cmake
    A libclc/opencl/lib/amdgcn/CMakeLists.txt
    R libclc/opencl/lib/amdgcn/SOURCES
    A libclc/opencl/lib/clspv/CMakeLists.txt
    R libclc/opencl/lib/clspv/SOURCES
    A libclc/opencl/lib/generic/CMakeLists.txt
    R libclc/opencl/lib/generic/SOURCES
    A libclc/opencl/lib/spirv/CMakeLists.txt
    R libclc/opencl/lib/spirv/SOURCES

  Log Message:
  -----------
  [libclc] Use custom CMake handling to overhaul libclc compilation (#185247)

Summary:
This PR uses https://github.com/llvm/llvm-project/pull/185243 to
overhaul compilation of libclc. This brings libclc to the same kind of
compilation flow that the other GPU libraries use (compiler-rt, libc,
libc++, openmp, flang-rt).

The main brunt of this change is simply changing the SOURCES files to
CMake variables and altering the compilation. Now that these are
standard CMake libraries we do not need to bother redefining custom
library handling and targets.

This builds as a static library, which we then consume with `llvm-link`
which converts it into a single `.bc` bitcode file similarly to before.
The final result is then optimized all together.

Hopefully this doesn't break anything.


  Commit: faa1ccce18001d180fd2402f688b91311dbc7e9a
      https://github.com/llvm/llvm-project/commit/faa1ccce18001d180fd2402f688b91311dbc7e9a
  Author: Brandon Wu <brandon.wu at sifive.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M clang/include/clang/Basic/riscv_vector.td
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/non-overloaded/vdota4_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/non-overloaded/vdota4_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/non-overloaded/vdota4su_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/non-overloaded/vdota4su_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/non-overloaded/vdota4u_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/non-overloaded/vdota4u_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/non-overloaded/vdota4us_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/overloaded/vdota4_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/overloaded/vdota4_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/overloaded/vdota4su_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/overloaded/vdota4su_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/overloaded/vdota4u_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/overloaded/vdota4u_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/overloaded/vdota4us_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/non-overloaded/vdota4_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/non-overloaded/vdota4_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/non-overloaded/vdota4su_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/non-overloaded/vdota4su_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/non-overloaded/vdota4u_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/non-overloaded/vdota4u_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/non-overloaded/vdota4us_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/overloaded/vdota4_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/overloaded/vdota4_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/overloaded/vdota4su_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/overloaded/vdota4su_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/overloaded/vdota4u_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/overloaded/vdota4u_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/overloaded/vdota4us_vx.c
    M llvm/include/llvm/IR/IntrinsicsRISCV.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZvdot4a8i.td
    M llvm/test/CodeGen/RISCV/rvv/vdota4.ll
    M llvm/test/CodeGen/RISCV/rvv/vdota4su.ll
    M llvm/test/CodeGen/RISCV/rvv/vdota4u.ll
    M llvm/test/CodeGen/RISCV/rvv/vdota4us.ll

  Log Message:
  -----------
  [RISCV][llvm] Use [u]int32 vector for input arguments for zvdot4a8i (#184089)

intrinsic spec PR:
https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/422


  Commit: 8b0a9d081f203517bae40dcdcceba7f5f7a2c651
      https://github.com/llvm/llvm-project/commit/8b0a9d081f203517bae40dcdcceba7f5f7a2c651
  Author: Fangrui Song <i at maskray.me>
  Date:   2026-03-08 (Sun, 08 Mar 2026)

  Changed paths:
    M llvm/lib/Target/X86/X86InstrAVX10.td
    A llvm/test/MC/X86/Relocations/avx10.2satcvt.s

  Log Message:
  -----------
  [X86] Fix wrong RIP-relative relocations for AVX10.2 saturation conversions (#185254)

AVX10.2 saturation conversion instructions (VCVT{T}{BF16,PH,PS}2I{U}BS)
incorrectly inherited from AVX512{PS,XD,PD}Ii8Base, which sets
ImmT=Imm8. This caused X86MCCodeEmitter to account for a nonexistent
trailing immediate byte when computing RIP-relative displacement fixups,
producing an addend of -5 instead of the correct -4.

Replace AVX512PSIi8Base/AVX512XDIi8Base/AVX512PDIi8Base with just the
needed prefix classes (PS is default, XD, PD), dropping the bogus
ImmT=Imm8. Preserve the original ExeDomain values (SSEPackedSingle,
SSEPackedDouble, SSEPackedInt; verified with `llvm-tblgen
--print-records ./llvm/lib/Target/X86/X86.td -I./llvm/include/
-I./llvm/lib/Target/X86/`). ExeDomain is not covered by any test.

Fix https://github.com/llvm/llvm-project/issues/184251


  Commit: 04dbbd414f542d02cb0eaee79fe8a4f2e32d18bf
      https://github.com/llvm/llvm-project/commit/04dbbd414f542d02cb0eaee79fe8a4f2e32d18bf
  Author: Stefan Gränitz <stefan.graenitz at gmail.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M lldb/source/Plugins/SymbolLocator/Debuginfod/SymbolLocatorDebuginfod.cpp
    M llvm/include/llvm/Debuginfod/Debuginfod.h
    R llvm/include/llvm/Debuginfod/HTTPClient.h
    R llvm/include/llvm/Debuginfod/HTTPServer.h
    A llvm/include/llvm/Support/HTTP/HTTPClient.h
    A llvm/include/llvm/Support/HTTP/HTTPServer.h
    M llvm/lib/Debuginfod/CMakeLists.txt
    M llvm/lib/Debuginfod/Debuginfod.cpp
    R llvm/lib/Debuginfod/HTTPClient.cpp
    R llvm/lib/Debuginfod/HTTPServer.cpp
    M llvm/lib/Support/CMakeLists.txt
    A llvm/lib/Support/HTTP/CMakeLists.txt
    A llvm/lib/Support/HTTP/HTTPClient.cpp
    A llvm/lib/Support/HTTP/HTTPServer.cpp
    M llvm/tools/llvm-cov/CodeCoverage.cpp
    M llvm/tools/llvm-debuginfod-find/llvm-debuginfod-find.cpp
    M llvm/tools/llvm-debuginfod/llvm-debuginfod.cpp
    M llvm/tools/llvm-objdump/llvm-objdump.cpp
    M llvm/tools/llvm-profdata/llvm-profdata.cpp
    M llvm/tools/llvm-symbolizer/llvm-symbolizer.cpp
    M llvm/unittests/Debuginfod/CMakeLists.txt
    M llvm/unittests/Debuginfod/DebuginfodTests.cpp
    R llvm/unittests/Debuginfod/HTTPServerTests.cpp
    M llvm/unittests/Support/CMakeLists.txt
    A llvm/unittests/Support/HTTP/CMakeLists.txt
    A llvm/unittests/Support/HTTP/HTTPServerTests.cpp

  Log Message:
  -----------
  [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (#184572)

Relocate HTTPClient and HTTPServer from the Debuginfod library to
llvm/Support/HTTP so they can be reused by other components.

---------

Co-authored-by: Alexandre Ganea <aganea at havenstudios.com>
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>


  Commit: 5b60283506928f6bae79545b2d8a7a979d7b39b6
      https://github.com/llvm/llvm-project/commit/5b60283506928f6bae79545b2d8a7a979d7b39b6
  Author: Elvis Wang <elvis.wang at sifive.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    A llvm/test/Analysis/CostModel/RISCV/extract-last-active.ll

  Log Message:
  -----------
  [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (#184067)

This patch implements the cost of
llvm.experimental.vector.extract.last.active which will lower to:
 vcpop.m a0, v0
 beqz a0, exit # Return passthru when the entire lane is inactive.
vid v10, v0.t
vredmaxu.vs v10, v10, v10
vmv.v.s a0, v10
zext.b a0, a0
vslidedown v8, v8,

This patch also helps conditional-scalar-assignment (CSA) works for
scalable vector.


  Commit: 443ce5569ee9854cfef1139cf6b9cf05165e0902
      https://github.com/llvm/llvm-project/commit/443ce5569ee9854cfef1139cf6b9cf05165e0902
  Author: Sergei Barannikov <barannikov88 at gmail.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/lib/Target/X86/CMakeLists.txt
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86ISelLowering.h
    M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
    M llvm/lib/Target/X86/X86InstrCompiler.td
    M llvm/lib/Target/X86/X86InstrFragments.td
    M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
    M llvm/lib/Target/X86/X86InstrMMX.td
    M llvm/lib/Target/X86/X86InstrRAOINT.td
    M llvm/lib/Target/X86/X86InstrTSX.td
    M llvm/lib/Target/X86/X86SelectionDAGInfo.cpp
    M llvm/lib/Target/X86/X86SelectionDAGInfo.h

  Log Message:
  -----------
  [X86] TableGen-erate SDNode descriptions (#168421)

This allows SDNodes to be validated against their expected type profiles
and reduces the number of changes required to add a new node.

The first commit contains the main change. There are few nodes that
don't have SDNode records in `*.td` files (see the enum in
`X86SelectionDAGInfo.h`) and several nodes fail verification (see
`X86SelectionDAGInfo::verifyTargetNode`).

The second commit fixes a few bugs in the generic SelectionDAG code that
were detected by the verification functionality.

The third comment moves comments from `X86ISelLowering.h` to `*.td`
files. This is done as separate commit to hopefully simplify the review.
I allowed myself to rearrange some node definitions because they had
block comments in `X86ISelLowering.h`.

Part of #119709.

Pull Request: https://github.com/llvm/llvm-project/pull/168421


  Commit: 3ea93369d139b6e9d045549ceab6a87173a9e583
      https://github.com/llvm/llvm-project/commit/3ea93369d139b6e9d045549ceab6a87173a9e583
  Author: Timm Baeder <tbaeder at redhat.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M clang/lib/AST/ByteCode/Context.cpp
    M clang/lib/AST/ByteCode/Interp.h
    M clang/test/Sema/attr-overflow-behavior-constexpr.cpp
    M clang/test/Sema/attr-overflow-behavior-templates.cpp
    M clang/test/Sema/attr-overflow-behavior.c
    M clang/test/Sema/attr-overflow-behavior.cpp

  Log Message:
  -----------
  [clang][bytecode] Fix new overflow behavior tests (#183761)


  Commit: b9499954205e25038accc94eea23965a23eed86a
      https://github.com/llvm/llvm-project/commit/b9499954205e25038accc94eea23965a23eed86a
  Author: Timm Baeder <tbaeder at redhat.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M clang/lib/AST/ByteCode/InterpBuiltin.cpp

  Log Message:
  -----------
  [clang][bytecode] Remove suspicious usage of local variable (#185360)

There's already already an if statement before ensuring that
UseFieldDesc is false.


  Commit: 0dad68438dc68b9c97b220c1f1647ccdbc6ffff5
      https://github.com/llvm/llvm-project/commit/0dad68438dc68b9c97b220c1f1647ccdbc6ffff5
  Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp

  Log Message:
  -----------
  [SPIRV] In G_SELECT selection path: replace `removeFromParent` with `eraseFromParent` and return early  (#184807)

When selecting an `ASSIGN_TYPE` of a `G_SELECT`, both instructions were
removed but not erased.

The code followed on a code path where the replaced G_SELECT would be
added to a remove set if it was dead. But the select is not in the
function anymore since it is already removed!

Selecting a `selectSelect` always returns `true`. So the
assertions/prints below would have never been triggered.

This patch simplifies this code path to avoid falling through the
asserts and paths where `selectSelect` could have failed (which
trivially doesn't happen).

Guarded `selectSelect` return with an assert in case it changes.

Follow up of https://github.com/llvm/llvm-project/pull/182330


  Commit: c6a14cba5ea172a0252b82529a96f008a207edcf
      https://github.com/llvm/llvm-project/commit/c6a14cba5ea172a0252b82529a96f008a207edcf
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    A libclc/clc/include/clc/subgroup/clc_sub_group_reduce.h
    A libclc/clc/include/clc/subgroup/clc_sub_group_reduce.inc
    M libclc/clc/lib/amdgcn/CMakeLists.txt
    A libclc/clc/lib/amdgcn/subgroup/sub_group_reduce.cl
    M libclc/opencl/lib/generic/CMakeLists.txt
    A libclc/opencl/lib/generic/subgroup/sub_group_reduce.cl
    A libclc/opencl/lib/generic/subgroup/sub_group_reduce.inc

  Log Message:
  -----------
  libclc: Add sub_group_reduce_* functions (#185294)


  Commit: 9d38926d51121c9820d22768bfb498cefc2857e0
      https://github.com/llvm/llvm-project/commit/9d38926d51121c9820d22768bfb498cefc2857e0
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M libclc/clc/lib/amdgcn/synchronization/clc_work_group_barrier.cl

  Log Message:
  -----------
  libclc: Fix logic for fence ordering based on mem flags (#185367)


  Commit: 7c2599a491c26c3191c06e4902aea3db97eac0ce
      https://github.com/llvm/llvm-project/commit/7c2599a491c26c3191c06e4902aea3db97eac0ce
  Author: Marcell Leleszi <mleleszi at google.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M libc/config/baremetal/arm/entrypoints.txt
    M libc/config/baremetal/riscv/entrypoints.txt
    M libc/config/darwin/aarch64/entrypoints.txt
    M libc/config/linux/aarch64/entrypoints.txt
    M libc/config/linux/arm/entrypoints.txt
    M libc/config/linux/riscv/entrypoints.txt
    M libc/config/linux/x86_64/entrypoints.txt
    M libc/src/wctype/CMakeLists.txt
    A libc/src/wctype/iswdigit.cpp
    A libc/src/wctype/iswdigit.h
    M libc/test/src/wctype/CMakeLists.txt
    M libc/test/src/wctype/iswalpha_test.cpp
    A libc/test/src/wctype/iswdigit_test.cpp

  Log Message:
  -----------
  [libc][wctype] Implement public iswdigit (#181635)

https://github.com/llvm/llvm-project/issues/175003

Create public function and entrypoints for iswdigit and add UTF8 test to
iswalpha test. On CI there is no UTF8 build currently, so that test case
will only run locally, but
[wctype_utils_test.cpp](https://github.com/llvm/llvm-project/blob/main/libc/test/src/__support/wctype_utils_test.cpp)
is written in a way that both ASCII and UTF8 tests run regardless of the
build config.


  Commit: d0a8fccfb226c62d9fd4d2bc2ce40a550579a014
      https://github.com/llvm/llvm-project/commit/d0a8fccfb226c62d9fd4d2bc2ce40a550579a014
  Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M lldb/source/Plugins/SymbolLocator/Debuginfod/SymbolLocatorDebuginfod.cpp
    M llvm/include/llvm/Debuginfod/Debuginfod.h
    A llvm/include/llvm/Debuginfod/HTTPClient.h
    A llvm/include/llvm/Debuginfod/HTTPServer.h
    R llvm/include/llvm/Support/HTTP/HTTPClient.h
    R llvm/include/llvm/Support/HTTP/HTTPServer.h
    M llvm/lib/Debuginfod/CMakeLists.txt
    M llvm/lib/Debuginfod/Debuginfod.cpp
    A llvm/lib/Debuginfod/HTTPClient.cpp
    A llvm/lib/Debuginfod/HTTPServer.cpp
    M llvm/lib/Support/CMakeLists.txt
    R llvm/lib/Support/HTTP/CMakeLists.txt
    R llvm/lib/Support/HTTP/HTTPClient.cpp
    R llvm/lib/Support/HTTP/HTTPServer.cpp
    M llvm/tools/llvm-cov/CodeCoverage.cpp
    M llvm/tools/llvm-debuginfod-find/llvm-debuginfod-find.cpp
    M llvm/tools/llvm-debuginfod/llvm-debuginfod.cpp
    M llvm/tools/llvm-objdump/llvm-objdump.cpp
    M llvm/tools/llvm-profdata/llvm-profdata.cpp
    M llvm/tools/llvm-symbolizer/llvm-symbolizer.cpp
    M llvm/unittests/Debuginfod/CMakeLists.txt
    M llvm/unittests/Debuginfod/DebuginfodTests.cpp
    A llvm/unittests/Debuginfod/HTTPServerTests.cpp
    M llvm/unittests/Support/CMakeLists.txt
    R llvm/unittests/Support/HTTP/CMakeLists.txt
    R llvm/unittests/Support/HTTP/HTTPServerTests.cpp

  Log Message:
  -----------
  Revert "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (#185372)

Reverts llvm/llvm-project#184572

Breaks many buildbots.


  Commit: 78ab6026b65eba71c25c539f7b59977065ea8ea7
      https://github.com/llvm/llvm-project/commit/78ab6026b65eba71c25c539f7b59977065ea8ea7
  Author: Luke Lau <luke at igalia.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    R llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll
    R llvm/test/CodeGen/RISCV/intrinsic-cttz-elts.ll
    A llvm/test/CodeGen/RISCV/rvv/cttz-elts.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-elts.ll

  Log Message:
  -----------
  [RISCV] Move llvm.experimental.cttz.elts tests to rvv folder. NFC (#185371)

This brings it inline with other intrinsics that require rvv


  Commit: 4879f1612b0bacf33ee84f679dd5ded7ca70d08e
      https://github.com/llvm/llvm-project/commit/4879f1612b0bacf33ee84f679dd5ded7ca70d08e
  Author: Timm Baeder <tbaeder at redhat.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M clang/lib/AST/ByteCode/Compiler.cpp
    M clang/test/AST/ByteCode/memberpointers.cpp

  Log Message:
  -----------
  [clang][bytecode] Check memberpointer exprs for errors (#185370)


  Commit: 2b811f4a5dff3f03ae5b8d7c991bcb176cbaec17
      https://github.com/llvm/llvm-project/commit/2b811f4a5dff3f03ae5b8d7c991bcb176cbaec17
  Author: Shivam Kunwar <75530356+phyBrackets at users.noreply.github.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M clang/lib/CodeGen/CGDebugInfo.cpp
    A clang/test/DebugInfo/CXX/debug-info-constexpr-array.cpp
    M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
    M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h
    A llvm/test/DebugInfo/X86/debug-info-constexpr-array.ll

  Log Message:
  -----------
  Reland "[DebugInfo] Emit DW_AT_const_value for constexpr array static members" (#184804)

Use `getElementAsAPInt(`) to read array elements and emit via
`addIntAsBlock()` which handles target endianness correctly, instead of
`getRawDataValues()` which exposes host endianness. This fixes test
failures on big-endian hosts cross-compiling for little-endian targets.

Reland of #182442 with endianness fix.


  Commit: 00efc1e5a03142c50819e37d5e2574fc7215fa44
      https://github.com/llvm/llvm-project/commit/00efc1e5a03142c50819e37d5e2574fc7215fa44
  Author: AndiB <sudofortune1 at gmail.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp

  Log Message:
  -----------
  [NFC] Fix spelling mistakes in emitted string replacing word anaylsis with analysis (#185233)

llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp had spelling mistake in error
message string.
This PR fixes the spelling mistake and replaces 'anaylsis' with
'analysis'


  Commit: 05781f40170d8ab1add63a49fc00fbfd8f70a062
      https://github.com/llvm/llvm-project/commit/05781f40170d8ab1add63a49fc00fbfd8f70a062
  Author: Frank Schlimbach <frank.schlimbach at intel.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M mlir/lib/Dialect/Bufferization/Extensions/ShardingExtensions.cpp
    M mlir/lib/Dialect/Shard/Transforms/ShardingPropagation.cpp
    M mlir/test/Dialect/Shard/sharding-propagation-failed.mlir

  Log Message:
  -----------
  [mlir][shard] Small fixes to partition pass (#185050)

- Empty functions (with no blocks) should are skipped by partition pass,
  blocks with more than one continue to get error-flagged
- fixed ShardingInterfaceImpl of bufferization.materialize_in_destination


  Commit: bdde26285f6a2fe1bcb54b1bb26d6772088b9472
      https://github.com/llvm/llvm-project/commit/bdde26285f6a2fe1bcb54b1bb26d6772088b9472
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    A libclc/clc/include/clc/collective/clc_work_group_reduce.h
    A libclc/clc/include/clc/collective/clc_work_group_reduce.inc
    M libclc/clc/lib/generic/CMakeLists.txt
    A libclc/clc/lib/generic/collective/clc_work_group_reduce.cl
    A libclc/clc/lib/generic/collective/clc_work_group_reduce.inc
    M libclc/opencl/lib/generic/CMakeLists.txt
    A libclc/opencl/lib/generic/collective/work_group_reduce.cl
    A libclc/opencl/lib/generic/collective/work_group_reduce.inc

  Log Message:
  -----------
  libclc: Add work_group_reduce_* functions (#185368)


  Commit: a1866b861732de3b324b46e993783cd2a2c1cf49
      https://github.com/llvm/llvm-project/commit/a1866b861732de3b324b46e993783cd2a2c1cf49
  Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
    M mlir/lib/Target/LLVMIR/DebugImporter.cpp
    M mlir/test/Target/LLVMIR/Import/debug-info.ll
    M mlir/test/Target/LLVMIR/llvmir-debug.mlir

  Log Message:
  -----------
  [mlir][llvm] Make name optional for DIBasicTypeAttr and DIStringTypeAttr (#185284)

The name field of DICompositeTypeAttr was already optional, but
DIBasicTypeAttr and DIStringTypeAttr were not handled consistently. Make
the name parameter of both an OptionalParameter to support LLVM debug
info nodes with no name. Update DebugImporter to use getStringAttrOrNull
when translating the name of these types. Add tests for the null-name
cases in the import and export test files.


  Commit: 0d32195c9f98ec27b3f6d958ed7916584e05caa2
      https://github.com/llvm/llvm-project/commit/0d32195c9f98ec27b3f6d958ed7916584e05caa2
  Author: Michael Buch <michaelbuch12 at gmail.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M lldb/unittests/Platform/PlatformDarwinTest.cpp

  Log Message:
  -----------
  [lldb][test][NFC] PlatformDarwinTest.cpp: fix directory creation comment

To be consistent with the other comments in the same test.


  Commit: d840396e20b09244ac3defcc1f2946102e29f030
      https://github.com/llvm/llvm-project/commit/d840396e20b09244ac3defcc1f2946102e29f030
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M clang/include/clang/Options/Options.td
    M clang/lib/CodeGen/CGCall.cpp
    M clang/test/CodeGenCUDA/convergent.cu
    M clang/test/CodeGenCUDA/incomplete-func-ptr-type.cu
    M clang/test/CodeGenHIP/default-attributes.hip
    M clang/test/CodeGenHIP/hip_weak_alias.cpp
    M clang/test/CodeGenOpenCL/cl20-device-side-enqueue-attributes.cl
    M clang/test/CodeGenOpenCL/convergent.cl

  Log Message:
  -----------
  clang: Simplify emission of uniform-work-group-size attribute (#185066)


  Commit: 38d4509caa6536f184ccc9dd29721133b7c2a810
      https://github.com/llvm/llvm-project/commit/38d4509caa6536f184ccc9dd29721133b7c2a810
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
    A llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rootn-codegen.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rootn.ll

  Log Message:
  -----------
  AMDGPU: Fix selection failure on fast vector rootn (#185035)

This was emitting the raw rcp intrinsic, which will fail for any
vector type. This is an afn context anyway, so just emit fdiv
which will select to rcp but also will undergo type legalization.


  Commit: 6bf37b070e75b77b1df0930ce3ffa0c1c6700f60
      https://github.com/llvm/llvm-project/commit/6bf37b070e75b77b1df0930ce3ffa0c1c6700f60
  Author: Karlo Basioli <basioli at google.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel

  Log Message:
  -----------
  Fix bazel build after #168421 (#185387)


  Commit: 0da00c325bd884225d85387ec934d807bcff8777
      https://github.com/llvm/llvm-project/commit/0da00c325bd884225d85387ec934d807bcff8777
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/lib/Analysis/IVDescriptors.cpp
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
    M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
    M llvm/test/Transforms/LoopVectorize/X86/conditional-scalar-assignment.ll
    M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
    M llvm/test/Transforms/LoopVectorize/select-cmp.ll

  Log Message:
  -----------
  [LV] Support float and pointer FindLast reductions  (#184101)

This duplicates #182313 with some very small modifications on top, as
@dheaton-arm is unable
to finish the PR and I'm unable to push to his branch.

Expands support for the `FindLast` Reccurence Kind to floating-point and
pointer types, thereby
enabling conditional scalar assignment (CSA) for these types.

Originally authored by @dheaton-arm

---------

Co-authored-by: Damian Heaton <Damian.Heaton at arm.com>


  Commit: 0be62be1d4c3b63e006678cda007d5edf78ae012
      https://github.com/llvm/llvm-project/commit/0be62be1d4c3b63e006678cda007d5edf78ae012
  Author: Eugene Epshteyn <eepshteyn at nvidia.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M flang/test/Lower/Intrinsics/date_and_time.f90
    M flang/test/Lower/Intrinsics/dconjg.f90
    M flang/test/Lower/Intrinsics/dim.f90
    M flang/test/Lower/Intrinsics/dimag.f90
    M flang/test/Lower/Intrinsics/dprod.f90

  Log Message:
  -----------
  [flang][NFC] Converted five tests from old lowering to new lowering (part 27) (#185340)

Tests converted from test/Lower/Intrinsics: date_and_time.f90,
dconjg.f90, dim.f90, dimag.f90, dprod.f90


  Commit: c73bd3e73450aa1682841c239d13d5bedf5e57e2
      https://github.com/llvm/llvm-project/commit/c73bd3e73450aa1682841c239d13d5bedf5e57e2
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M libclc/CMakeLists.txt

  Log Message:
  -----------
  libclc: Remove old mesa amdgcn targets (#185385)

amdgcn-- was probably dead when clover was being maintained, since
it switched to using amdgcn-mesa-mesa3d. Also remove amdgcn-mesa-mesa3d,
since clover is no longer in mesa.


  Commit: 5d52d2f01602fd72cf88f3f083b981cd4e98b84f
      https://github.com/llvm/llvm-project/commit/5d52d2f01602fd72cf88f3f083b981cd4e98b84f
  Author: Balázs Benics <benicsbalazs at gmail.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    A clang/include/clang/Analysis/Scalable/Frontend/TUSummaryExtractorFrontendAction.h
    A clang/include/clang/Analysis/Scalable/SSAFBuiltinForceLinker.h
    A clang/include/clang/Analysis/Scalable/SSAFForceLinker.h
    M clang/include/clang/Analysis/Scalable/Serialization/SerializationFormatRegistry.h
    M clang/include/clang/Analysis/Scalable/TUSummary/ExtractorRegistry.h
    M clang/include/clang/Basic/DiagnosticFrontendKinds.td
    M clang/include/clang/Basic/DiagnosticGroups.td
    M clang/include/clang/Frontend/FrontendOptions.h
    M clang/include/clang/Options/Options.td
    M clang/lib/Analysis/Scalable/CMakeLists.txt
    A clang/lib/Analysis/Scalable/Frontend/TUSummaryExtractorFrontendAction.cpp
    M clang/lib/Analysis/Scalable/Serialization/JSONFormat/JSONFormatImpl.cpp
    M clang/lib/Driver/ToolChains/Clang.cpp
    M clang/lib/FrontendTool/CMakeLists.txt
    M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
    A clang/test/Analysis/SSAF/command-line-interface.cpp
    A clang/test/Analysis/SSAF/downgradable-errors.cpp
    A clang/test/Analysis/SSAF/help.cpp
    M clang/unittests/Analysis/Scalable/CMakeLists.txt
    A clang/unittests/Analysis/Scalable/Frontend/TUSummaryExtractorFrontendActionTest.cpp
    M clang/unittests/Analysis/Scalable/Registries/FancyAnalysisData.cpp
    M clang/unittests/Analysis/Scalable/Registries/MockSerializationFormat.cpp
    M clang/unittests/Analysis/Scalable/Registries/MockSummaryExtractor1.cpp
    M clang/unittests/Analysis/Scalable/Registries/MockSummaryExtractor2.cpp
    M clang/unittests/Analysis/Scalable/Registries/SerializationFormatRegistryTest.cpp
    M clang/unittests/Analysis/Scalable/Registries/SummaryExtractorRegistryTest.cpp
    A clang/unittests/Analysis/Scalable/SSAFBuiltinTestForceLinker.h
    A clang/unittests/Analysis/Scalable/SSAFTestForceLinker.h
    M clang/unittests/Analysis/Scalable/TestFixture.cpp

  Log Message:
  -----------
  [clang][ssaf] Add --ssaf-extract-summaries= and --ssaf-tu-summary-file= options (#184421)

Along the way, it also fixes the static registration of the builtin
(upstream) formats and extractors.


  Commit: 1e7300fddcc6fa5e40fb770cb9a88e4f8c1f694d
      https://github.com/llvm/llvm-project/commit/1e7300fddcc6fa5e40fb770cb9a88e4f8c1f694d
  Author: Dhruv Srivastava <dhruv.srivastava at ibm.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp

  Log Message:
  -----------
  [PPC64][Linux] Watchpoint configuration for PPC64 (#185192)

On PPC64, SIGTRAP is delivered before the triggering instruction
completes. The previous implementation wrongly assumed that the
instruction gets executed and due to that qHostInfo has the wrong info,
causing the SingleStep being avoided on Linux for PPC64, and the
execution being stuck at the store instruction.
This patch corrects this, making watchpoint work.


  Commit: 83732a29040ca920656b64ca8190a00111a48d1c
      https://github.com/llvm/llvm-project/commit/83732a29040ca920656b64ca8190a00111a48d1c
  Author: Balázs Benics <benicsbalazs at gmail.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    R clang/include/clang/Analysis/Scalable/Frontend/TUSummaryExtractorFrontendAction.h
    R clang/include/clang/Analysis/Scalable/SSAFBuiltinForceLinker.h
    R clang/include/clang/Analysis/Scalable/SSAFForceLinker.h
    M clang/include/clang/Analysis/Scalable/Serialization/SerializationFormatRegistry.h
    M clang/include/clang/Analysis/Scalable/TUSummary/ExtractorRegistry.h
    M clang/include/clang/Basic/DiagnosticFrontendKinds.td
    M clang/include/clang/Basic/DiagnosticGroups.td
    M clang/include/clang/Frontend/FrontendOptions.h
    M clang/include/clang/Options/Options.td
    M clang/lib/Analysis/Scalable/CMakeLists.txt
    R clang/lib/Analysis/Scalable/Frontend/TUSummaryExtractorFrontendAction.cpp
    M clang/lib/Analysis/Scalable/Serialization/JSONFormat/JSONFormatImpl.cpp
    M clang/lib/Driver/ToolChains/Clang.cpp
    M clang/lib/FrontendTool/CMakeLists.txt
    M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
    R clang/test/Analysis/SSAF/command-line-interface.cpp
    R clang/test/Analysis/SSAF/downgradable-errors.cpp
    R clang/test/Analysis/SSAF/help.cpp
    M clang/unittests/Analysis/Scalable/CMakeLists.txt
    R clang/unittests/Analysis/Scalable/Frontend/TUSummaryExtractorFrontendActionTest.cpp
    M clang/unittests/Analysis/Scalable/Registries/FancyAnalysisData.cpp
    M clang/unittests/Analysis/Scalable/Registries/MockSerializationFormat.cpp
    M clang/unittests/Analysis/Scalable/Registries/MockSummaryExtractor1.cpp
    M clang/unittests/Analysis/Scalable/Registries/MockSummaryExtractor2.cpp
    M clang/unittests/Analysis/Scalable/Registries/SerializationFormatRegistryTest.cpp
    M clang/unittests/Analysis/Scalable/Registries/SummaryExtractorRegistryTest.cpp
    R clang/unittests/Analysis/Scalable/SSAFBuiltinTestForceLinker.h
    R clang/unittests/Analysis/Scalable/SSAFTestForceLinker.h
    M clang/unittests/Analysis/Scalable/TestFixture.cpp

  Log Message:
  -----------
  Revert "[clang][ssaf] Add --ssaf-extract-summaries= and --ssaf-tu-summary-file= options" (#185391)

Reverts llvm/llvm-project#184421

Broke build bot:

https://lab.llvm.org/buildbot/#/builders/204/builds/38459/steps/7/logs/stdio

```
[7440/8486] Linking CXX shared library lib/libclangAnalysisScalable.so.23.0git
FAILED: lib/libclangAnalysisScalable.so.23.0git 
: && /usr/bin/c++ -fPIC -fPIC -fno-semantic-interposition -fvisibility-inlines-hidden -Werror=date-time -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wno-missing-field-initializers -pedantic -Wno-long-long -Wimplicit-fallthrough -Wno-uninitialized -Wno-nonnull -Wno-class-memaccess -Wno-array-bounds -Wno-noexcept-type -Wdelete-non-virtual-dtor -Wno-comment -Wno-misleading-indentation -fdiagnostics-color -ffunction-sections -fdata-sections -fno-common -Woverloaded-virtual -O3 -DNDEBUG  -Wl,-z,defs -Wl,-z,nodelete   -Wl,-rpath-link,/home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/build/./lib  -Wl,--gc-sections -shared -Wl,-soname,libclangAnalysisScalable.so.23.0git -o lib/libclangAnalysisScalable.so.23.0git tools/clang/lib/Analysis/Scalable/CMakeFiles/obj.clangAnalysisScalable.dir/ASTEntityMapping.cpp.o tools/clang/lib/Analysis/Scalable/CMakeFiles/obj.clangAnalysisScalable.dir/EntityLinker/EntityLinker.cpp.o tools/clang/lib/Analysis/Scalable/CMakeFiles/obj.clangAnalysisScalable.dir/Frontend/TUSummaryExtractorFrontendAction.cpp.o tools/clang/lib/Analysis/Scalable/CMakeFiles/obj.clangAnalysisScalable.dir/Model/BuildNamespace.cpp.o tools/clang/lib/Analysis/Scalable/CMakeFiles/obj.clangAnalysisScalable.dir/Model/EntityId.cpp.o tools/clang/lib/Analysis/Scalable/CMakeFiles/obj.clangAnalysisScalable.dir/Model/EntityIdTable.cpp.o tools/clang/lib/Analysis/Scalable/CMakeFiles/obj.clangAnalysisScalable.dir/Model/EntityLinkage.cpp.o tools/clang/lib/Analysis/Scalable/CMakeFiles/obj.clangAnalysisScalable.dir/Model/EntityName.cpp.o tools/clang/lib/Analysis/Scalable/CMakeFiles/obj.clangAnalysisScalable.dir/Model/SummaryName.cpp.o tools/clang/lib/Analysis/Scalable/CMakeFiles/obj.clangAnalysisScalable.dir/Serialization/JSONFormat/JSONFormatImpl.cpp.o tools/clang/lib/Analysis/Scalable/CMakeFiles/obj.clangAnalysisScalable.dir/Serialization/JSONFormat/LUSummary.cpp.o tools/clang/lib/Analysis/Scalable/CMakeFiles/obj.clangAnalysisScalable.dir/Serialization/JSONFormat/LUSummaryEncoding.cpp.o tools/clang/lib/Analysis/Scalable/CMakeFiles/obj.clangAnalysisScalable.dir/Serialization/JSONFormat/TUSummary.cpp.o tools/clang/lib/Analysis/Scalable/CMakeFiles/obj.clangAnalysisScalable.dir/Serialization/JSONFormat/TUSummaryEncoding.cpp.o tools/clang/lib/Analysis/Scalable/CMakeFiles/obj.clangAnalysisScalable.dir/Serialization/SerializationFormatRegistry.cpp.o tools/clang/lib/Analysis/Scalable/CMakeFiles/obj.clangAnalysisScalable.dir/Support/ErrorBuilder.cpp.o tools/clang/lib/Analysis/Scalable/CMakeFiles/obj.clangAnalysisScalable.dir/TUSummary/ExtractorRegistry.cpp.o tools/clang/lib/Analysis/Scalable/CMakeFiles/obj.clangAnalysisScalable.dir/TUSummary/TUSummaryBuilder.cpp.o  -Wl,-rpath,"\$ORIGIN/../lib:/home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/build/lib:"  lib/libclangIndex.so.23.0git  lib/libclangFrontend.so.23.0git  lib/libclangASTMatchers.so.23.0git  lib/libclangAST.so.23.0git  lib/libclangLex.so.23.0git  lib/libclangBasic.so.23.0git  lib/libLLVMSupport.so.23.0git  -Wl,-rpath-link,/home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/build/lib && :
tools/clang/lib/Analysis/Scalable/CMakeFiles/obj.clangAnalysisScalable.dir/Frontend/TUSummaryExtractorFrontendAction.cpp.o:(.data.rel.ro._ZTVN12_GLOBAL__N_115TUSummaryRunnerE+0xc0): undefined reference to `clang::SemaConsumer::anchor()'
collect2: error: ld returned 1 exit status
```


  Commit: 3e3c3ab6837c213e4137bd2cd4441d1b5d1ca590
      https://github.com/llvm/llvm-project/commit/3e3c3ab6837c213e4137bd2cd4441d1b5d1ca590
  Author: Alex Duran <alejandro.duran at intel.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/tools/llvm-gpu-loader/llvm-gpu-loader.cpp

  Log Message:
  -----------
  [llvm][tools] Improve llvm-gpu-loader checks (#184791)

When devices are not properly initialized llvm-gpu-loader follows corrupt pointers which
result in hard to debug crashes.

This improves the checks to avoid such situations.


  Commit: 47e31088f3ac829060b653afef2272d0b220f3bd
      https://github.com/llvm/llvm-project/commit/47e31088f3ac829060b653afef2272d0b220f3bd
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
    M clang/test/CodeGen/amdgpu-abi-version.c
    M clang/test/CodeGenCUDA/amdgpu-workgroup-size.cu
    A clang/test/CodeGenOpenCL/builtins-amdgcn-workgroup-size.cl
    M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
    M clang/test/Headers/gpuintrin.c

  Log Message:
  -----------
  clang/AMDGPU: Fix workgroup size builtins for nonuniform work group sizes (#185098)

These were assuming uniform work group sizes. Emit the v4 and v5
sequences to take the remainder group for the nonuniform case.

Currently the device libs uses this builtin on the legacy ABI path with
the same sequence to calculate the remainder, and fully implements the
v5 path. If you perform a franken-build of the library with the updated
builtin, the result is worse. The duplicate sequence does not fully fold out.
However, it does not appear to be wrong. The relevant conformance tests still
pass.


  Commit: 57edc20b1e1b7f346ad913b0b979c05d2594b20e
      https://github.com/llvm/llvm-project/commit/57edc20b1e1b7f346ad913b0b979c05d2594b20e
  Author: Balaji Krishna Yugandhar Atukuri <balaji.k.atukuri at gmail.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp

  Log Message:
  -----------
  [NVPTX][NFC] Fix TODO comment style in NVPTXMCAsmInfo.cpp (#185332)

Replace `@TODO` with `TODO` to follow LLVM comment conventions.

This is an NFC change — no functional impact.


  Commit: 4994bcef135647303a747807d574ef1905d5c19e
      https://github.com/llvm/llvm-project/commit/4994bcef135647303a747807d574ef1905d5c19e
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/include/llvm/ExecutionEngine/Orc/WaitingOnGraph.h

  Log Message:
  -----------
  Fix MSVC "not all control paths return a value" warning. NFC. (#185388)


  Commit: 56fe9097fc83106db2ebfaade93e41a6aefda425
      https://github.com/llvm/llvm-project/commit/56fe9097fc83106db2ebfaade93e41a6aefda425
  Author: Amila Senadheera <amila.15 at cse.mrt.ac.lk>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/examples/Kaleidoscope/Chapter3/toy.cpp

  Log Message:
  -----------
  kaleidoscope: add missing check in the FunctionAST::codegen  (#76322)

kaleidoscope chapter 03 explanation has this function redefine check,
but it was missing in the code sample.

Signed-off-by: amila <amila.15 at cse.mrt.ac.lk>


  Commit: 9f3d9f488450de561176f3adfab5bb9ee1bf5f08
      https://github.com/llvm/llvm-project/commit/9f3d9f488450de561176f3adfab5bb9ee1bf5f08
  Author: Timm Baeder <tbaeder at redhat.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M clang/lib/AST/ByteCode/Compiler.cpp

  Log Message:
  -----------
  [clang][bytecode][NFC] Name all expressions E (#185379)

At least the ones we visit directly via the visitor. This was always the
case, except for BinaryOperator and CastExpr.


  Commit: c54cb1b81482b7edf1a2d8a78188642a5aacb0de
      https://github.com/llvm/llvm-project/commit/c54cb1b81482b7edf1a2d8a78188642a5aacb0de
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
    M mlir/test/Dialect/Linalg/named-ops-fail.mlir
    M mlir/test/Dialect/Linalg/named-ops.mlir

  Log Message:
  -----------
  [mlir][linalg] Emit proper diagnostic instead of crashing in SelectOp with index type (#183652)

`buildTernaryFn` for `TernaryFn::select` called `llvm_unreachable` when
the operand types were not `i1`, integer, or floating-point (e.g.,
`index` type).
Instead delegate this checking to the IR verifier: we don't need to
duplicate the checks from the verifier in an assertion here.

Fixes #179046

Assisted-by: Claude Code


  Commit: 36de257076fd2bdaf90f2391bf5416ad149dc6e5
      https://github.com/llvm/llvm-project/commit/36de257076fd2bdaf90f2391bf5416ad149dc6e5
  Author: tudinhh <103348714+tudinhh at users.noreply.github.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
    M llvm/test/Transforms/InstCombine/get_active_lane_mask.ll

  Log Message:
  -----------
  [InstCombine] Handle fixed-width results in get_active_lane_mask fold (#185317)

The optimization introduced in #183329 incorrectly assumed that any
extraction from a scalable active lane mask used a scalable index. When
the result of a `llvm.vector.extract` is a fixed-width vector, the index
should not be multiplied by vscale.

This PR adds a check to ensure the index is only scaled by VScaleMin
when the return type of the extraction is a scalable vector, not
fixed-width.

Fixes #185271


  Commit: 3833551b1ed915a0545d34713b4a49938a4e48ae
      https://github.com/llvm/llvm-project/commit/3833551b1ed915a0545d34713b4a49938a4e48ae
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
    A mlir/test/Conversion/GPUCommon/lower-launch-func-bare-ptr-invalid.mlir

  Log Message:
  -----------
  [mlir][gpu] Fix crash in gpu-to-llvm with unranked memref and bare-ptr calling convention (#185062)

When using `--gpu-to-llvm` with `use-bare-pointers-for-kernels=true` and
a `gpu.launch_func` whose kernel has an `UnrankedMemRefType` argument,
`LLVMTypeConverter::promoteOperands` would hit an `llvm_unreachable`
because unranked memrefs are not supported with the bare-pointer calling
convention.

Fix this by checking for unranked memref kernel arguments before calling
`promoteOperands` and returning a proper conversion failure with a
diagnostic instead of crashing.

Fixes #184939

Assisted-by: Claude Code


  Commit: 6aa7538a39975fb4b12edb32d058a631646ff053
      https://github.com/llvm/llvm-project/commit/6aa7538a39975fb4b12edb32d058a631646ff053
  Author: CarolineConcatto <caroline.concatto at arm.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-fp-int-fp.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-to-fp.ll

  Log Message:
  -----------
  [LLVM][AArch64] Allow vector converts  to run in streaming mode with … (#177375)

…FPRCVT

Vector Saturated converts fp->int and converts int->fp are now allowed
to run in streaming mode when FEAT_FPRCVT feature is available.

Therefore the patch replaces HasNEONandIsSME2p2StreamingSafe by
HasNEONandIsFPRCVTStreamingSafe following the latest update in [1] for
the Vector CVT instructions.

It also allows the ISD Node FP_TO_SINT_SAT to do custom lowering instead
of expand when it is a fixed lengh data type, because it can use the
Vector CVT instructions. I believe this is correct because there is
always a compatible CVT instruction for the SME core.

Because now the compiler allows the fixed length CVT to run in streaming
mode, I needed to fix the function LowerVectorFP_TO_INT_SAT, the FRINT
instruction were creating a ilegal size for CVT instructions that was
not able to lower to a CVT instruction.

co-author:Amina Chabane<amina.chabane at arm.com>

[1] https://developer.arm.com/documentation/ddi0602/2025-09


  Commit: 9e883b4410415f6c544a8292bba22f350be9908a
      https://github.com/llvm/llvm-project/commit/9e883b4410415f6c544a8292bba22f350be9908a
  Author: Fady Farag <com.webkit.iidmsa at gmail.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M clang/test/Lexer/cxx20-module-directive.cpp

  Log Message:
  -----------
  [clang][test] Add missing FileCheck pipe in cxx20-module-directive.cpp (#185315)

The test had CHECK directives that were never executed because the RUN
line did not pipe output to FileCheck.


  Commit: ff232d67b534f41617effa20abdab0933fe127c6
      https://github.com/llvm/llvm-project/commit/ff232d67b534f41617effa20abdab0933fe127c6
  Author: mitchell <mitchell.xu2 at gmail.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    A clang-tools-extra/test/clang-tidy/checkers/Inputs/Headers/utility
    A clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/init-variables-mathheader.cpp
    A clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/pro-bounds-constant-array-index-includestyle.cpp
    A clang-tools-extra/test/clang-tidy/checkers/performance/inefficient-string-concatenation-strict.cpp
    A clang-tools-extra/test/clang-tidy/checkers/performance/no-automatic-move-allowed-types.cpp
    A clang-tools-extra/test/clang-tidy/checkers/performance/type-promotion-in-math-fn-includestyle.cpp
    A clang-tools-extra/test/clang-tidy/checkers/performance/unnecessary-value-param-includestyle.cpp
    M clang-tools-extra/test/clang-tidy/checkers/performance/unnecessary-value-param.cpp

  Log Message:
  -----------
  [clang-tidy][NFC] Add missing Option tests in cppcoreguidelines and performance [3/N] (#185210)

This PR adds testcases for untested Options in `cppcoreguidelines` and
`performance` modules for better test coverage, specifically:

- `cppcoreguidelines-init-variables`: `IncludeStyle`, `MathHeader`.
- `cppcoreguidelines-pro-bounds-constant-array-index`: `IncludeStyle`.
- `performance-inefficient-string-concatenation`: `StrictMode`.
- `performance-no-automatic-move`: `AllowedTypes`.
- `performance-type-promotion-in-math-fn`: `IncludeStyle`.
- `performance-unnecessary-value-param`: `IncludeStyle`.

As of AI Usage: Assisted by Gemini 3 and Claude (Writing part of the
testcases and pre-commit reviewing).


  Commit: 6b0421426e083a915350fc9d3a2edc75621b0799
      https://github.com/llvm/llvm-project/commit/6b0421426e083a915350fc9d3a2edc75621b0799
  Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M flang/include/flang/Semantics/openmp-utils.h
    M flang/lib/Semantics/check-omp-loop.cpp

  Log Message:
  -----------
  [flang][OpenMP] Import ExecutionPartIterator et al into semantics::om… (#185288)

…p, NFC

Issue: https://github.com/llvm/llvm-project/issues/185287


  Commit: 61a58cfa5c9aafc70f5e2faecc334c9b4373d89f
      https://github.com/llvm/llvm-project/commit/61a58cfa5c9aafc70f5e2faecc334c9b4373d89f
  Author: LeeYoungJoon <dog3hk.dev at gmail.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M clang-tools-extra/clang-tidy/hicpp/CMakeLists.txt
    M clang-tools-extra/clang-tidy/hicpp/HICPPTidyModule.cpp
    R clang-tools-extra/clang-tidy/hicpp/IgnoredRemoveResultCheck.cpp
    R clang-tools-extra/clang-tidy/hicpp/IgnoredRemoveResultCheck.h
    M clang-tools-extra/docs/ReleaseNotes.rst
    M clang-tools-extra/docs/clang-tidy/checks/bugprone/unused-return-value.rst
    M clang-tools-extra/docs/clang-tidy/checks/hicpp/ignored-remove-result.rst
    M clang-tools-extra/docs/clang-tidy/checks/list.rst

  Log Message:
  -----------
  [clang-tidy] Redirect hicpp-ignored-remove-result to bugprone-unused-return-value (#184547)

Part of the work in https://github.com/llvm/llvm-project/issues/183462.

Closes https://github.com/llvm/llvm-project/issues/183518.


  Commit: 0a51a757cf6dcb6c60e60045dbca34fef0c981f8
      https://github.com/llvm/llvm-project/commit/0a51a757cf6dcb6c60e60045dbca34fef0c981f8
  Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M flang/include/flang/Parser/openmp-utils.h
    M flang/lib/Parser/openmp-utils.cpp

  Log Message:
  -----------
  [flang][OpenMP] Remember original range in ExecutionPartIterator (#185290)

Storing the original range (instead of just the "remaining part") will
allow the iterator component to be reused.

Issue: https://github.com/llvm/llvm-project/issues/185287


  Commit: 269362593c4dfd8a9054cc304ed8088038363ce1
      https://github.com/llvm/llvm-project/commit/269362593c4dfd8a9054cc304ed8088038363ce1
  Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M .ci/monolithic-windows.sh
    M clang-tools-extra/clang-tidy/hicpp/CMakeLists.txt
    M clang-tools-extra/clang-tidy/hicpp/HICPPTidyModule.cpp
    R clang-tools-extra/clang-tidy/hicpp/IgnoredRemoveResultCheck.cpp
    R clang-tools-extra/clang-tidy/hicpp/IgnoredRemoveResultCheck.h
    M clang-tools-extra/clang-tidy/readability/ElseAfterReturnCheck.cpp
    M clang-tools-extra/docs/ReleaseNotes.rst
    M clang-tools-extra/docs/clang-tidy/checks/bugprone/unused-return-value.rst
    M clang-tools-extra/docs/clang-tidy/checks/hicpp/ignored-remove-result.rst
    M clang-tools-extra/docs/clang-tidy/checks/list.rst
    A clang-tools-extra/test/clang-tidy/checkers/Inputs/Headers/utility
    A clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/init-variables-mathheader.cpp
    A clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/pro-bounds-constant-array-index-includestyle.cpp
    A clang-tools-extra/test/clang-tidy/checkers/performance/inefficient-string-concatenation-strict.cpp
    A clang-tools-extra/test/clang-tidy/checkers/performance/no-automatic-move-allowed-types.cpp
    A clang-tools-extra/test/clang-tidy/checkers/performance/type-promotion-in-math-fn-includestyle.cpp
    A clang-tools-extra/test/clang-tidy/checkers/performance/unnecessary-value-param-includestyle.cpp
    M clang-tools-extra/test/clang-tidy/checkers/performance/unnecessary-value-param.cpp
    A clang-tools-extra/test/clang-tidy/checkers/readability/else-after-return-cxx20.cpp
    M clang/docs/ClangFormatStyleOptions.rst
    M clang/include/clang/Basic/riscv_vector.td
    M clang/include/clang/Format/Format.h
    M clang/include/clang/Options/Options.td
    M clang/lib/AST/ByteCode/Compiler.cpp
    M clang/lib/AST/ByteCode/Context.cpp
    M clang/lib/AST/ByteCode/Interp.h
    M clang/lib/AST/ByteCode/InterpBuiltin.cpp
    M clang/lib/CodeGen/CGCall.cpp
    M clang/lib/CodeGen/CGDebugInfo.cpp
    M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
    M clang/lib/Driver/ToolChains/Arch/X86.cpp
    M clang/lib/Format/Format.cpp
    M clang/lib/Format/UnwrappedLineFormatter.cpp
    M clang/lib/Format/UnwrappedLineParser.cpp
    M clang/lib/Format/UnwrappedLineParser.h
    M clang/test/AST/ByteCode/memberpointers.cpp
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/non-overloaded/vdota4_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/non-overloaded/vdota4_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/non-overloaded/vdota4su_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/non-overloaded/vdota4su_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/non-overloaded/vdota4u_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/non-overloaded/vdota4u_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/non-overloaded/vdota4us_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/overloaded/vdota4_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/overloaded/vdota4_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/overloaded/vdota4su_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/overloaded/vdota4su_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/overloaded/vdota4u_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/overloaded/vdota4u_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/non-policy/overloaded/vdota4us_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/non-overloaded/vdota4_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/non-overloaded/vdota4_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/non-overloaded/vdota4su_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/non-overloaded/vdota4su_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/non-overloaded/vdota4u_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/non-overloaded/vdota4u_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/non-overloaded/vdota4us_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/overloaded/vdota4_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/overloaded/vdota4_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/overloaded/vdota4su_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/overloaded/vdota4su_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/overloaded/vdota4u_vv.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/overloaded/vdota4u_vx.c
    M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvdot4a8i/policy/overloaded/vdota4us_vx.c
    M clang/test/CodeGen/amdgpu-abi-version.c
    M clang/test/CodeGenCUDA/amdgpu-workgroup-size.cu
    M clang/test/CodeGenCUDA/convergent.cu
    M clang/test/CodeGenCUDA/incomplete-func-ptr-type.cu
    M clang/test/CodeGenHIP/default-attributes.hip
    M clang/test/CodeGenHIP/hip_weak_alias.cpp
    A clang/test/CodeGenOpenCL/builtins-amdgcn-workgroup-size.cl
    M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
    M clang/test/CodeGenOpenCL/cl20-device-side-enqueue-attributes.cl
    M clang/test/CodeGenOpenCL/convergent.cl
    A clang/test/DebugInfo/CXX/debug-info-constexpr-array.cpp
    M clang/test/Headers/gpuintrin.c
    M clang/test/Lexer/cxx20-module-directive.cpp
    M clang/test/Sema/attr-overflow-behavior-constexpr.cpp
    M clang/test/Sema/attr-overflow-behavior-templates.cpp
    M clang/test/Sema/attr-overflow-behavior.c
    M clang/test/Sema/attr-overflow-behavior.cpp
    M clang/unittests/Format/ConfigParseTest.cpp
    M clang/unittests/Format/FormatTest.cpp
    M flang/include/flang/Semantics/openmp-utils.h
    M flang/lib/Lower/ConvertConstant.cpp
    M flang/lib/Lower/HlfirIntrinsics.cpp
    M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
    M flang/lib/Lower/OpenMP/Utils.cpp
    M flang/lib/Lower/OpenMP/Utils.h
    M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
    A flang/test/Lower/HLFIR/cshift-optional-dim.f90
    M flang/test/Lower/Intrinsics/date_and_time.f90
    M flang/test/Lower/Intrinsics/dconjg.f90
    M flang/test/Lower/Intrinsics/dim.f90
    M flang/test/Lower/Intrinsics/dimag.f90
    M flang/test/Lower/Intrinsics/dprod.f90
    R flang/test/Lower/OpenMP/Todo/affinity-clause.f90
    M flang/test/Lower/OpenMP/task-affinity.f90
    A flang/test/Lower/pdt-struct-constructor-init.f90
    M libc/config/baremetal/arm/entrypoints.txt
    M libc/config/baremetal/riscv/entrypoints.txt
    M libc/config/darwin/aarch64/entrypoints.txt
    M libc/config/linux/aarch64/entrypoints.txt
    M libc/config/linux/arm/entrypoints.txt
    M libc/config/linux/riscv/entrypoints.txt
    M libc/config/linux/x86_64/entrypoints.txt
    M libc/src/wctype/CMakeLists.txt
    A libc/src/wctype/iswdigit.cpp
    A libc/src/wctype/iswdigit.h
    M libc/test/src/wctype/CMakeLists.txt
    M libc/test/src/wctype/iswalpha_test.cpp
    A libc/test/src/wctype/iswdigit_test.cpp
    M libclc/CMakeLists.txt
    A libclc/clc/include/clc/collective/clc_work_group_reduce.h
    A libclc/clc/include/clc/collective/clc_work_group_reduce.inc
    A libclc/clc/include/clc/subgroup/clc_sub_group_reduce.h
    A libclc/clc/include/clc/subgroup/clc_sub_group_reduce.inc
    A libclc/clc/lib/amdgcn/CMakeLists.txt
    R libclc/clc/lib/amdgcn/SOURCES
    A libclc/clc/lib/amdgcn/subgroup/sub_group_reduce.cl
    M libclc/clc/lib/amdgcn/synchronization/clc_work_group_barrier.cl
    A libclc/clc/lib/amdgpu/CMakeLists.txt
    R libclc/clc/lib/amdgpu/SOURCES
    A libclc/clc/lib/clspv/CMakeLists.txt
    R libclc/clc/lib/clspv/SOURCES
    A libclc/clc/lib/generic/CMakeLists.txt
    R libclc/clc/lib/generic/SOURCES
    A libclc/clc/lib/generic/collective/clc_work_group_reduce.cl
    A libclc/clc/lib/generic/collective/clc_work_group_reduce.inc
    A libclc/clc/lib/ptx-nvidiacl/CMakeLists.txt
    R libclc/clc/lib/ptx-nvidiacl/SOURCES
    A libclc/clc/lib/spirv/CMakeLists.txt
    R libclc/clc/lib/spirv/SOURCES
    M libclc/cmake/modules/AddLibclc.cmake
    A libclc/opencl/lib/amdgcn/CMakeLists.txt
    R libclc/opencl/lib/amdgcn/SOURCES
    A libclc/opencl/lib/clspv/CMakeLists.txt
    R libclc/opencl/lib/clspv/SOURCES
    A libclc/opencl/lib/generic/CMakeLists.txt
    R libclc/opencl/lib/generic/SOURCES
    A libclc/opencl/lib/generic/collective/work_group_reduce.cl
    A libclc/opencl/lib/generic/collective/work_group_reduce.inc
    A libclc/opencl/lib/generic/subgroup/sub_group_reduce.cl
    A libclc/opencl/lib/generic/subgroup/sub_group_reduce.inc
    A libclc/opencl/lib/spirv/CMakeLists.txt
    R libclc/opencl/lib/spirv/SOURCES
    M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp
    M lldb/unittests/Platform/PlatformDarwinTest.cpp
    M llvm/examples/Kaleidoscope/Chapter3/toy.cpp
    M llvm/include/llvm/Analysis/Loads.h
    M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
    M llvm/include/llvm/ExecutionEngine/Orc/WaitingOnGraph.h
    M llvm/include/llvm/IR/IntrinsicsRISCV.td
    M llvm/include/llvm/Support/ModRef.h
    M llvm/lib/Analysis/IVDescriptors.cpp
    M llvm/lib/Analysis/Loads.cpp
    M llvm/lib/Analysis/LoopAccessAnalysis.cpp
    M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
    M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
    M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
    M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
    M llvm/lib/Target/ARM/ARM.h
    M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
    A llvm/lib/Target/ARM/ARMPassRegistry.def
    M llvm/lib/Target/ARM/ARMTargetMachine.cpp
    M llvm/lib/Target/ARM/ARMTargetMachine.h
    M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoZvdot4a8i.td
    M llvm/lib/Target/RISCV/RISCVSchedAndes45.td
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
    M llvm/lib/Target/X86/CMakeLists.txt
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86ISelLowering.h
    M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
    M llvm/lib/Target/X86/X86InstrAVX10.td
    M llvm/lib/Target/X86/X86InstrCompiler.td
    M llvm/lib/Target/X86/X86InstrFragments.td
    M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
    M llvm/lib/Target/X86/X86InstrMMX.td
    M llvm/lib/Target/X86/X86InstrRAOINT.td
    M llvm/lib/Target/X86/X86InstrTSX.td
    M llvm/lib/Target/X86/X86RegisterInfo.cpp
    M llvm/lib/Target/X86/X86SelectionDAGInfo.cpp
    M llvm/lib/Target/X86/X86SelectionDAGInfo.h
    M llvm/lib/Target/X86/X86Subtarget.cpp
    M llvm/lib/Target/X86/X86Subtarget.h
    M llvm/lib/Transforms/Coroutines/CoroCleanup.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
    M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
    A llvm/test/Analysis/CostModel/RISCV/extract-last-active.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-fp-int-fp.ll
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-to-fp.ll
    A llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rootn-codegen.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rootn.ll
    M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
    M llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll
    M llvm/test/CodeGen/AMDGPU/vgpr-agpr-limit-gfx90a.ll
    M llvm/test/CodeGen/AMDGPU/vgpr-limit-gfx1250.ll
    M llvm/test/CodeGen/AMDGPU/vgpr-spill.mir
    M llvm/test/CodeGen/ARM/ARMLoadStoreDBG.mir
    M llvm/test/CodeGen/ARM/prera-ldst-aliasing.mir
    R llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll
    R llvm/test/CodeGen/RISCV/intrinsic-cttz-elts.ll
    A llvm/test/CodeGen/RISCV/rvv/cttz-elts.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-elts.ll
    M llvm/test/CodeGen/RISCV/rvv/vdota4.ll
    M llvm/test/CodeGen/RISCV/rvv/vdota4su.ll
    M llvm/test/CodeGen/RISCV/rvv/vdota4u.ll
    M llvm/test/CodeGen/RISCV/rvv/vdota4us.ll
    M llvm/test/CodeGen/X86/avx512-cmp.ll
    M llvm/test/CodeGen/X86/known-pow2.ll
    M llvm/test/CodeGen/X86/setcc-logic.ll
    A llvm/test/DebugInfo/X86/debug-info-constexpr-array.ll
    A llvm/test/MC/X86/Relocations/avx10.2satcvt.s
    M llvm/test/Transforms/Coroutines/coro-cleanup-noop-elide.ll
    M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
    M llvm/test/Transforms/InferFunctionAttrs/enable-builtin.ll
    M llvm/test/Transforms/InstCombine/get_active_lane_mask.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs-apple.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/vector-loop-backedge-elimination-with-evl.ll
    M llvm/test/Transforms/LoopVectorize/X86/conditional-scalar-assignment.ll
    M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
    M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-ordered-reduction.ll
    M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
    M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
    M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
    M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
    M llvm/test/Transforms/LoopVectorize/load-deref-pred-poison-ub-ops-feeding-pointer.ll
    M llvm/test/Transforms/LoopVectorize/reduction-minmax-users-and-predicated.ll
    M llvm/test/Transforms/LoopVectorize/select-cmp.ll
    M llvm/test/Transforms/LoopVectorize/single-early-exit-cond-poison.ll
    M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
    M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
    A llvm/test/Transforms/SLPVectorizer/X86/bswap-i64-by-i32-chunks.ll
    M llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-mask.s
    M llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-permutation.s
    M llvm/tools/llvm-gpu-loader/llvm-gpu-loader.cpp
    M mlir/docs/Passes.md
    M mlir/include/mlir/Bytecode/BytecodeImplementation.h
    M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
    M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
    M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
    M mlir/include/mlir/Dialect/OpenMP/OpenMPOpBase.td
    M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
    M mlir/include/mlir/IR/BuiltinDialect.h
    M mlir/include/mlir/IR/BuiltinDialect.td
    R mlir/lib/Bindings/Python/stubgen_runner.py
    M mlir/lib/Bytecode/Reader/BytecodeReader.cpp
    M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
    M mlir/lib/Dialect/Bufferization/Extensions/ShardingExtensions.cpp
    M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
    M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
    M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
    M mlir/lib/Dialect/Shard/Transforms/ShardingPropagation.cpp
    M mlir/lib/Dialect/X86/Transforms/VectorContractToPackedTypeDotProduct.cpp
    M mlir/lib/Dialect/X86/Utils/X86Utils.cpp
    M mlir/lib/IR/BuiltinDialectBytecode.cpp
    M mlir/lib/Target/LLVMIR/DebugImporter.cpp
    M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
    A mlir/test/Conversion/GPUCommon/lower-launch-func-bare-ptr-invalid.mlir
    M mlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm.mlir
    M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
    M mlir/test/Conversion/VectorToGPU/vector-to-mma-ops.mlir
    M mlir/test/Dialect/Affine/ops.mlir
    M mlir/test/Dialect/GPU/subgroup-mma-vector-unroll.mlir
    M mlir/test/Dialect/GPU/subgroupId-rewrite.mlir
    M mlir/test/Dialect/GPU/transform-gpu.mlir
    M mlir/test/Dialect/LLVMIR/nvvm.mlir
    M mlir/test/Dialect/Linalg/named-ops-fail.mlir
    M mlir/test/Dialect/Linalg/named-ops.mlir
    M mlir/test/Dialect/NVGPU/canonicalization.mlir
    M mlir/test/Dialect/NVGPU/tmaload-transform.mlir
    M mlir/test/Dialect/NVGPU/transform-matmul-to-nvvm.mlir
    M mlir/test/Dialect/OpenMP/ops.mlir
    M mlir/test/Dialect/Shard/sharding-propagation-failed.mlir
    M mlir/test/Dialect/SparseTensor/GPU/gpu_matmul.mlir
    M mlir/test/Dialect/SparseTensor/GPU/gpu_matvec.mlir
    M mlir/test/Dialect/Vector/vector-warp-distribute.mlir
    M mlir/test/Dialect/X86/vector-contract-to-packed-type-dotproduct.mlir
    M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
    M mlir/test/Dialect/XeGPU/sg-to-wi-experimental.mlir
    M mlir/test/Dialect/XeGPU/subgroup-distribute.mlir
    M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
    M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
    M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
    M mlir/test/Examples/NVGPU/Ch0.py
    M mlir/test/Examples/NVGPU/Ch3.py
    M mlir/test/Examples/NVGPU/Ch4.py
    M mlir/test/Examples/NVGPU/Ch5.py
    M mlir/test/Integration/Dialect/XeGPU/LANE/no-xegpu-ops.mlir
    M mlir/test/Integration/GPU/CUDA/sm90/cga_cluster.mlir
    M mlir/test/Integration/GPU/CUDA/sm90/gemm_f32_f16_f16_128x128x128.mlir
    M mlir/test/Integration/GPU/CUDA/sm90/gemm_pred_f32_f16_f16_128x128x128.mlir
    M mlir/test/Integration/GPU/CUDA/sm90/tma_load_128x128_stride_noswizzle.mlir
    M mlir/test/Integration/GPU/CUDA/sm90/tma_load_128x64_swizzle128b.mlir
    M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x64_swizzle128b.mlir
    M mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x8_8x128_noswizzle.mlir
    M mlir/test/Integration/GPU/CUDA/sm90/transform-dialect/tma_load_64x8_8x128_noswizzle-transform.mlir
    M mlir/test/Integration/GPU/LevelZero/gpu-addf32-to-spirv.mlir
    M mlir/test/Integration/GPU/LevelZero/gpu-addi64-to-spirv.mlir
    M mlir/test/Integration/GPU/LevelZero/gpu-memcpy-addf32-to-spirv.mlir
    M mlir/test/Integration/GPU/LevelZero/gpu-reluf32-to-spirv.mlir
    M mlir/test/Integration/GPU/SYCL/gpu-addf32-to-spirv.mlir
    M mlir/test/Integration/GPU/SYCL/gpu-addi64-to-spirv.mlir
    M mlir/test/Integration/GPU/SYCL/gpu-memcpy-addf32-to-spirv.mlir
    M mlir/test/Integration/GPU/SYCL/gpu-reluf32-to-spirv.mlir
    M mlir/test/Target/LLVMIR/Import/debug-info.ll
    M mlir/test/Target/LLVMIR/llvmir-debug.mlir
    M mlir/test/Target/LLVMIR/nvvm/addf/addf_invalid.mlir
    A mlir/test/Target/LLVMIR/nvvm/fma/fma.mlir
    A mlir/test/Target/LLVMIR/nvvm/fma/fma_invalid.mlir
    A mlir/test/Target/LLVMIR/nvvm/fma/fma_vector.mlir
    A mlir/test/Target/LLVMIR/nvvm/subf/subf.mlir
    A mlir/test/Target/LLVMIR/nvvm/subf/subf_invalid.mlir
    A mlir/test/Target/LLVMIR/nvvm/subf/subf_vector.mlir
    M mlir/test/Target/LLVMIR/nvvmir.mlir
    M mlir/test/Target/LLVMIR/openmp-todo.mlir
    M mlir/test/python/dialects/gpu/dialect.py
    M mlir/test/python/dialects/nvvm.py
    A mlir/unittests/IR/BuiltinDialectVersionTest.cpp
    M mlir/unittests/IR/CMakeLists.txt
    M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
    M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
    M utils/bazel/llvm-project-overlay/mlir/build_defs.bzl
    M utils/bazel/llvm-project-overlay/mlir/unittests/BUILD.bazel
    M utils/bazel/third_party_build/nanobind.BUILD

  Log Message:
  -----------
  Merge branch 'main' into users/kparzysz/e03-move-utils


Compare: https://github.com/llvm/llvm-project/compare/dfa96281667b...269362593c4d

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