[all-commits] [llvm/llvm-project] 647b1e: [MLIR][NVVM] Add LLVMIR lowering for nvvm.subf (#1...

[Srinivasa Ravi via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 647b1e38754aff87eeb500af2d061a0898094cbd
      https://github.com/llvm/llvm-project/commit/647b1e38754aff87eeb500af2d061a0898094cbd
  Author: Srinivasa Ravi <srinivasar at nvidia.com>
  Date:   2026-03-09 (Mon, 09 Mar 2026)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
    M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
    M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
    M mlir/test/Target/LLVMIR/nvvm/addf/addf_invalid.mlir
    A mlir/test/Target/LLVMIR/nvvm/subf/subf.mlir
    A mlir/test/Target/LLVMIR/nvvm/subf/subf_invalid.mlir
    A mlir/test/Target/LLVMIR/nvvm/subf/subf_vector.mlir

  Log Message:
  -----------
  [MLIR][NVVM] Add LLVMIR lowering for nvvm.subf (#184968)

This change adds direct LLVMIR lowering to the `nvvm.subf` operation
added in #179162 to prevent translation failures when canonicalization
is not run. Also adds `mlir-translate` tests for `nvvm.subf`.

PTX ISA Reference:
1.
https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-sub
2.
https://docs.nvidia.com/cuda/parallel-thread-execution/#half-precision-floating-point-instructions-sub



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