[all-commits] [llvm/llvm-project] 9a4084: [LoongArch] Try to avoid casts around logical vect...

[Zhaoxin Yang via All-commits]

  Branch: refs/heads/users/ylzsx/vxi1-vector-masks
  Home:   https://github.com/llvm/llvm-project
  Commit: 9a4084597ecf34708a221cd54e38a5638e6abab3
      https://github.com/llvm/llvm-project/commit/9a4084597ecf34708a221cd54e38a5638e6abab3
  Author: yangzhaoxin <yangzhaoxin at loongson.cn>
  Date:   2026-03-06 (Fri, 06 Mar 2026)

  Changed paths:
    M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp

  Log Message:
  -----------
  [LoongArch] Try to avoid casts around logical vector ops on lasx

On LASX the type v4i1/v8i1/v16i1 may be legalized to v4i32/v8i16/v16i8,
which is LSX-sized register. In most cases we actually compare or select
LASX-sized registers and mixing the two types creates horrible code.


  Commit: 0f8c00deeac34ed9932f1e0a0d7793254b46823a
      https://github.com/llvm/llvm-project/commit/0f8c00deeac34ed9932f1e0a0d7793254b46823a
  Author: yangzhaoxin <yangzhaoxin at loongson.cn>
  Date:   2026-03-06 (Fri, 06 Mar 2026)

  Changed paths:
    M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp

  Log Message:
  -----------
  Fixes for review


  Commit: 04c985739109707141b35fc5142a597b56387e78
      https://github.com/llvm/llvm-project/commit/04c985739109707141b35fc5142a597b56387e78
  Author: yangzhaoxin <yangzhaoxin at loongson.cn>
  Date:   2026-03-06 (Fri, 06 Mar 2026)

  Changed paths:
    M llvm/test/CodeGen/LoongArch/lasx/vxi1-masks.ll

  Log Message:
  -----------
  rebase


Compare: https://github.com/llvm/llvm-project/compare/ab87a363bd51...04c985739109

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