[all-commits] [llvm/llvm-project] 301597: [RISCV] Support 'f' Inline Assembly Constraint for...

[joshua-arch1 via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 301597950a824fc6b4b009fc09389bc5852aca32
      https://github.com/llvm/llvm-project/commit/301597950a824fc6b4b009fc09389bc5852aca32
  Author: joshua-arch1 <cooper.joshua at linux.alibaba.com>
  Date:   2026-03-05 (Thu, 05 Mar 2026)

  Changed paths:
    M clang/test/CodeGen/RISCV/riscv-inline-asm.c
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    A llvm/test/CodeGen/RISCV/inline-asm-bf-constraint-f.ll

  Log Message:
  -----------
  [RISCV] Support 'f' Inline Assembly Constraint for bfloat16 (#184566)

This patch is to add 'f' and 'cf' Inline Assembly Constraint for the `bfloat16` type, so they are passed in the floating point registers.



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