[all-commits] [llvm/llvm-project] b6b19d: [AArch64] Fold zero-high vector inserts in MI peep...

[Amina Chabane via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b6b19d140bd4f01c196ef45cb86651811f8a80ab
      https://github.com/llvm/llvm-project/commit/b6b19d140bd4f01c196ef45cb86651811f8a80ab
  Author: Amina Chabane <amina.chabane at arm.com>
  Date:   2026-03-05 (Thu, 05 Mar 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
    M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
    M llvm/test/CodeGen/AArch64/ctpop.ll
    M llvm/test/CodeGen/AArch64/fpclamptosat_vec.ll
    M llvm/test/CodeGen/AArch64/neon-lowhalf128-optimisation.ll
    M llvm/test/CodeGen/AArch64/peephole-insvigpr.mir

  Log Message:
  -----------
  [AArch64] Fold zero-high vector inserts in MI peephole optimisation (#182835)

Summary
This patch follows on from #178227.
The previous ISel fold lowers the 64-bit case to:
```
    fmov d0, x0
    fmov d0, d0
```
which is not ideal and could be fmov d0, x0.
A redundant copy comes from the INSERT_SUBREG/INSvi64lane.

This peephole detects <2 x i64> vectors made of a zeroed upper and low
lane produced by FMOVXDr/FMOVDr, then removes the redundant copy.

Further updated tests and added MIR tests.



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