[all-commits] [llvm/llvm-project] 05fdd5: [Clang] Fix the lambda context for constraint eval...
Mariusz Sikora via All-commits
all-commits at lists.llvm.org
Thu Mar 5 00:57:16 PST 2026
Branch: refs/heads/users/mariusz-sikora-at-amd/add-flat-offset-bits-feature
Home: https://github.com/llvm/llvm-project
Commit: 05fdd5383967042c7cb00871de2397d3d5e87b92
https://github.com/llvm/llvm-project/commit/05fdd5383967042c7cb00871de2397d3d5e87b92
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang/lib/Sema/SemaConcept.cpp
M clang/test/SemaTemplate/concepts.cpp
Log Message:
-----------
[Clang] Fix the lambda context for constraint evaluation (#184319)
Constraint lambdas in the requires body need complete template arguments
before they can be evaluated. That was connected by
ImplicitConceptSpecializationDecl which is no longer created naturally
after the normalization patch.
This patch fixes the bug by creating a temporary decl for that purpose.
Though the temporary object should go away once we have the evaluation
context track template arguments.
No release note for being a regression fix.
Fixes #184047
Commit: 1b3545117df0dfcea164d33a2432c66aa3b7f559
https://github.com/llvm/llvm-project/commit/1b3545117df0dfcea164d33a2432c66aa3b7f559
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M mlir/lib/Dialect/IRDL/IR/IRDL.cpp
M mlir/test/Dialect/IRDL/invalid_names.irdl.mlir
Log Message:
-----------
[mlir][irdl] Fix crash in TypeOp/AttributeOp verify on empty sym_name (#184598)
TypeOp::verify() and AttributeOp::verify() called StringRef::front() to
check for leading '\!' or '#' sigils before passing the name to
isValidName(). When sym_name is empty, front() triggers an assertion
failure:
Assertion `\!empty()' failed.
Fix: guard the front() calls with an emptiness check. An empty sym_name
then falls through to isValidName(), which already emits a proper
diagnostic:
error: name of type is empty
Fixes #159949
Commit: 47766d7f8c397da857d9f78db36c71e8a2ca1fbf
https://github.com/llvm/llvm-project/commit/47766d7f8c397da857d9f78db36c71e8a2ca1fbf
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
Log Message:
-----------
[AMDGPU][Clang][Doc] Add documentation for WMMA builtins (#183939)
Commit: c2e22e3b797da806e8d67eb5dafd31b425d0c1af
https://github.com/llvm/llvm-project/commit/c2e22e3b797da806e8d67eb5dafd31b425d0c1af
Author: Ken Matsui <26405363+ken-matsui at users.noreply.github.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang/utils/hmaptool/CMakeLists.txt
Log Message:
-----------
[clang][cmake] Add option to control hmaptool installation (#172725)
Commit: 21c1ba16edc01cc14d8d0f6893beebad5afc3619
https://github.com/llvm/llvm-project/commit/21c1ba16edc01cc14d8d0f6893beebad5afc3619
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-ignore-copies-crash.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
M llvm/test/CodeGen/AMDGPU/coalesce-copy-to-agpr-to-av-registers.mir
M llvm/test/CodeGen/AMDGPU/coalescer-early-clobber-subreg.mir
M llvm/test/CodeGen/AMDGPU/dst-sel-hazard.mir
M llvm/test/CodeGen/AMDGPU/hazards-gfx950.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx10.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx8.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx9.mir
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
M llvm/test/CodeGen/AMDGPU/mai-hazards.mir
M llvm/test/CodeGen/AMDGPU/no-limit-coalesce.mir
M llvm/test/CodeGen/AMDGPU/optimize-exec-mask-pre-ra-no-fold-exec-copy.mir
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/regalloc-failure-overlapping-insert-assert.mir
M llvm/test/CodeGen/AMDGPU/rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-copy-from.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-insert-extract.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-src2-chain.mir
M llvm/test/CodeGen/AMDGPU/sched-assert-dead-def-subreg-use-other-subreg.mir
M llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/subreg-undef-def-with-other-subreg-defs.mir
A llvm/test/TableGen/ArtificialRegs.td
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.h
Log Message:
-----------
[TableGen] Complete the support for artificial registers (#183371)
Artificial registers were added in
eb0c510ecde667cd911682cc1e855f73f341d134
as a means of giving super-registers heavier weights than that
of their subregisters, even when they only contain a single
physical subregister.
Artifical registers thus do exist in code and participate in
register unit weight calculations, but are not supposed to be
available for register allocation.
This patch completes the support for artificial registers to:
- Ignore artificial registers when joining register unit uber
sets. Artificial registers may be members of classes that
together include registers and their sub-registers, making it
impossible to compute normalised weights for uber sets they
belong to.
We have a use case downstream relying on this being supported,
which allows to avoid introducing a large number of additional
register classes.
- Not generate purely artificial register class intersections.
It is critical not to have such classes, as the common LLVM
codegen infrastructure will try to use them to constrain
classes of virtual registers instead of producing COPYs
whenever both the source and target register classes contain
the same artificial registers.
- Not generate sub-classes where classes with the same
non-artificial members already exist. This is mostly for
convenience. For example, the HI16-capable subset of AMDGPU's
AV_32 is VGPR_32, except VGPR_32 also contains the artificial
staging registers. If the staging registers are not ignored,
we'll end up having an additional generated register class,
AV_32_with_hi16_in_VGPR_16, -- harmless, but also useless.
Eliminates a few inferred AMDGPU register classes:
- VS_32_with_hi16
- VS_32_Lo256_with_hi16
- VS_32_Lo128_with_hi16
- VRegOrLds_32_and_VS_32_Lo256
- VRegOrLds_32_and_VS_32_Lo128
- SRegOrLds_32_and_VRegOrLds_32
Causes no register class changes for other targets.
Commit: 71de1e47c012aa4621068634fa955052aa7f56a7
https://github.com/llvm/llvm-project/commit/71de1e47c012aa4621068634fa955052aa7f56a7
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64InstrAtomics.td
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/aarch64-addv.ll
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
M llvm/test/CodeGen/AArch64/aarch64-pmull2.ll
M llvm/test/CodeGen/AArch64/aarch64-scal-to-vec-bitcast-insert.ll
M llvm/test/CodeGen/AArch64/arm64-cvt-simd-intrinsics.ll
M llvm/test/CodeGen/AArch64/arm64-fixed-point-scalar-cvt-dagcombine.ll
M llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
M llvm/test/CodeGen/AArch64/arm64-neon-select_cc.ll
M llvm/test/CodeGen/AArch64/arm64-neon-v8.1a.ll
M llvm/test/CodeGen/AArch64/arm64-vcvt.ll
M llvm/test/CodeGen/AArch64/arm64-vshift.ll
M llvm/test/CodeGen/AArch64/avoid-pre-trunc.ll
M llvm/test/CodeGen/AArch64/bitcast-extend.ll
M llvm/test/CodeGen/AArch64/bitcnt-i256.ll
M llvm/test/CodeGen/AArch64/concat-vector-add-combine.ll
M llvm/test/CodeGen/AArch64/ctpop.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics-vector.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
M llvm/test/CodeGen/AArch64/fsh.ll
M llvm/test/CodeGen/AArch64/ragreedy-local-interval-cost.ll
M llvm/test/CodeGen/AArch64/select-bitcast.ll
M llvm/test/CodeGen/AArch64/sext.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-to-int.ll
M llvm/test/CodeGen/AArch64/sve-fixed-vector-llrint.ll
M llvm/test/CodeGen/AArch64/sve-fixed-vector-lrint.ll
M llvm/test/CodeGen/AArch64/vector-llrint.ll
M llvm/test/CodeGen/AArch64/vector-lrint.ll
M llvm/test/CodeGen/AArch64/zext.ll
Log Message:
-----------
Reapply "[AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (#172837)" (#183380) (#184403)
This reverts commit b7ce37c6703f2d82376f50f82a05b807a0ad90ad.
The
[issue](https://github.com/llvm/llvm-project/pull/172837#issuecomment-3961532435)
this patch revealed was fixed by [this
patch](https://github.com/llvm/llvm-project/pull/183549).
Commit: c6bb6a7e425472d670da80036f39645580668282
https://github.com/llvm/llvm-project/commit/c6bb6a7e425472d670da80036f39645580668282
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/conditional-scalar-assignment-vplan.ll
A llvm/test/Transforms/LoopVectorize/tail-folding-masked-mem-opts.ll
Log Message:
-----------
[LV] Add `-force-target-supports-masked-memory-ops` option (#184325)
This can be used to make target agnostic tail-folding tests much less
verbose, as masked loads/stores can be used rather than scalar
predication.
Commit: 0cbba3ed5f12476140ec1b47b777c743e705bf26
https://github.com/llvm/llvm-project/commit/0cbba3ed5f12476140ec1b47b777c743e705bf26
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M flang-rt/CMakeLists.txt
Log Message:
-----------
[flang-rt] Fix incorrect condition for removing backtrace (#184610)
Commit: 073de3b80375bc510863f4cdeb0b2757676111bb
https://github.com/llvm/llvm-project/commit/073de3b80375bc510863f4cdeb0b2757676111bb
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
Log Message:
-----------
[SPIRV] Rename `selectSelectDefaultArgs` to `selectBoolToInt` (#184120)
The function is used to extend a `bool` (vector or scalar) into `1/-1`
for `true` and `0` for `false` (vector or scalar).
There is no obvious "default" argument for a select operation, so the
original name is confusing.
This patch:
* Renames this function to better signal its intention,
* makes the boolean argument explicit in the function (instead of
implicit through the first register operand of the instruction),
* rename `I` to `InsertAt`.
Commit: 5c274078422435b1c666d99375e958d30c4b77a6
https://github.com/llvm/llvm-project/commit/5c274078422435b1c666d99375e958d30c4b77a6
Author: Tarun Thammisetty <thammisettytarun at gmail.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/VirtualCallChecker.cpp
A clang/test/Analysis/Inputs/virtualcall-system-header.h
M clang/test/Analysis/virtualcall.cpp
Log Message:
-----------
[analyzer] Suppress optin.cplusplus.VirtualCall warnings in system headers (#184183)
Fixes #184178
The optin.cplusplus.VirtualCall checker reports warnings for virtual
method calls during construction/destruction even when the call site is
in a system header (included via -isystem). Users cannot fix such code
and must resort to NOLINT suppressions.
Add a system header check in checkPreCall before emitting the report,
consistent with how other checkers (e.g. MallocChecker) handle this.
Commit: 11c11ec2e9fd825f625fd7fcb8318e72fe1b9e4a
https://github.com/llvm/llvm-project/commit/11c11ec2e9fd825f625fd7fcb8318e72fe1b9e4a
Author: Benjamin Luke <benjamin.luke at sony.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Lex/Lexer.cpp
A clang/test/Preprocessor/miopt-peek-restore-header-guard.cpp
M clang/unittests/Lex/LexerTest.cpp
Log Message:
-----------
[clang][Lex] Preserve MultipleIncludeOpt state in Lexer::peekNextPPToken (#183425)
Fixes https://github.com/llvm/llvm-project/issues/180155.
This is a duplicate of https://github.com/llvm/llvm-project/pull/180700
except that I also added some tests, fine to go with either PR, but we
should add the tests.
peekNextPPToken lexed a token and mutated MIOpt, which could clear the
controlling-macro state for main files in C++20 modules mode.
Save/restore MIOpt in Lexer::peekNextPPToken.
Add regression coverage in
LexerTest.MainFileHeaderGuardedWithCPlusPlusModules that checks to make
sure the controlling macro is properly set in C++20 mode.
Add source level lit test in miopt-peek-restore-header-guard.cpp that
checks to make sure that the warnings that depend on the MIOpt state
machine are emitted in C++20 mode.
Commit: 50653e5a0d1db1b7a9451cb98fb1b56224449d72
https://github.com/llvm/llvm-project/commit/50653e5a0d1db1b7a9451cb98fb1b56224449d72
Author: Sayan Saha <sayans at mathworks.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
[tosa] : Enhance tosa.slice folding for dynamic dims. (#184615)
Source IR:
```
func.func @main(%arg0: tensor<?x112x64x112xf32>) -> tensor<?x113x65x112xf32> {
%0 = tosa.const_shape {values = dense<[0, 0, 1, 1, 1, 1, 0, 0]> : tensor<8xindex>} : () -> !tosa.shape<8>
%1 = "tosa.const"() <{values = dense<0.000000e+00> : tensor<1xf32>}> : () -> tensor<1xf32>
%2 = tosa.pad %arg0, %0, %1 : (tensor<?x112x64x112xf32>, !tosa.shape<8>, tensor<1xf32>) -> tensor<?x114x66x112xf32>
%3 = tosa.const_shape {values = dense<0> : tensor<4xindex>} : () -> !tosa.shape<4>
%4 = tosa.const_shape {values = dense<[-1, 113, 65, 112]> : tensor<4xindex>} : () -> !tosa.shape<4>
%5 = tosa.slice %2, %3, %4 : (tensor<?x114x66x112xf32>, !tosa.shape<4>, !tosa.shape<4>) -> tensor<?x113x65x112xf32>
return %5 : tensor<?x113x65x112xf32>
}
```
when canonicalized produces
```
$> mlir-opt --canonicalize
func.func @main(%arg0: tensor<?x112x64x112xf32>) -> tensor<?x113x65x112xf32> {
%0 = tosa.const_shape {values = dense<0> : tensor<4xindex>} : () -> !tosa.shape<4>
%1 = tosa.const_shape {values = dense<[-1, 113, 65, 112]> : tensor<4xindex>} : () -> !tosa.shape<4>
%2 = "tosa.const"() <{values = dense<0.000000e+00> : tensor<1xf32>}> : () -> tensor<1xf32>
%3 = tosa.const_shape {values = dense<[0, 0, 1, 0, 1, 0, 0, 0]> : tensor<8xindex>} : () -> !tosa.shape<8>
%4 = tosa.pad %arg0, %3, %2 : (tensor<?x112x64x112xf32>, !tosa.shape<8>, tensor<1xf32>) -> tensor<?x113x65x112xf32>
%5 = tosa.slice %4, %0, %1 : (tensor<?x113x65x112xf32>, !tosa.shape<4>, !tosa.shape<4>) -> tensor<?x113x65x112xf32>
return %5 : tensor<?x113x65x112xf32>
}
```
because of the `PadSliceOptimization`. Note that the `tosa.slice` op
after the optimization is essentially a no-op. This change, enhances the
folder to fold such `tosa.slice` ops. After this change canonicalization
produces
```
func.func @main(%arg0: tensor<?x112x64x112xf32>) -> tensor<?x113x65x112xf32> {
%0 = "tosa.const"() <{values = dense<0.000000e+00> : tensor<1xf32>}> : () -> tensor<1xf32>
%1 = tosa.const_shape {values = dense<[0, 0, 1, 0, 1, 0, 0, 0]> : tensor<8xindex>} : () -> !tosa.shape<8>
%2 = tosa.pad %arg0, %1, %0 : (tensor<?x112x64x112xf32>, !tosa.shape<8>, tensor<1xf32>) -> tensor<?x113x65x112xf32>
return %2 : tensor<?x113x65x112xf32>
}
```
Commit: c370f5af6c8d337216b1f86589ab3e48d1c5a598
https://github.com/llvm/llvm-project/commit/c370f5af6c8d337216b1f86589ab3e48d1c5a598
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
Log Message:
-----------
[VPlan] Preserve IsSingleScalar for hoisted predicated load. (#184453)
The predicated loads may be single scalar (e.g. for VF = 1). We should
preserve IsSingleScalar when hoisting them. As all loops access the same
address, IsSingleScalar must match across all loads in the group.
This fixes an assertion when interleaving-only with hoisted loads.
Fixes https://github.com/llvm/llvm-project/issues/184372
PR: https://github.com/llvm/llvm-project/pull/184453
Commit: 56e0b6af1d3948fa2ed56149a02707adaa7a4074
https://github.com/llvm/llvm-project/commit/56e0b6af1d3948fa2ed56149a02707adaa7a4074
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_unsupported.mlir
M mlir/test/lib/Dialect/Affine/TestVectorizationUtils.cpp
Log Message:
-----------
[mlir][affine] Fix crash in vectorizeAffineLoopNest test utility for reduction loops (#184617)
The test utility function `testVecAffineLoopNest` called
`isLoopParallel` with a `reductions` output parameter, which populates
reduction descriptors when the loop performs a reduction. However, these
descriptors were never added to `strategy.reductionLoops` before calling
`vectorizeAffineLoopNest`. When the vectorizer then processed a loop
with `iter_args`, it found no reduction descriptors in the strategy and
hit an assertion failure.
Fix by registering the reduction loop descriptors in the strategy before
vectorization, matching what the production vectorizer code already does
correctly.
Fixes #128334
Commit: c9ca768c88cc2bec4240b8710e6d173e7be278e4
https://github.com/llvm/llvm-project/commit/c9ca768c88cc2bec4240b8710e6d173e7be278e4
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Shape/IR/Shape.cpp
M mlir/test/Dialect/Shape/invalid.mlir
Log Message:
-----------
[mlir][shape] Fix crash when shape.lib array references undefined symbol (#184613)
In verifyOperationAttribute(), the single-symbol path for shape.lib used
SymbolTable::lookupSymbolIn() followed by an explicit null check. The
array path at line 196-197 used dyn_cast<FunctionLibraryOp>() directly
on the lookup result, which asserts when the symbol is not found (null
pointer).
Fix: use dyn_cast_or_null<> instead of dyn_cast<> so that a missing
symbol falls through to the existing "does not refer to
FunctionLibraryOp" error diagnostic instead of asserting.
Fixes #159653
Commit: 33be2d0e7ab2c8874f53df8cbbda07381020b1c4
https://github.com/llvm/llvm-project/commit/33be2d0e7ab2c8874f53df8cbbda07381020b1c4
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/clmul-fixed.ll
M llvm/test/CodeGen/AArch64/clmul.ll
Log Message:
-----------
[AArch64] Update clmul tests after #184403 (#184611)
This was likely a mid-air collision with #183282. Update the tests to
match the current state of HEAD.
Commit: c123642824fdc9e1f2b6fda849b5cde113372229
https://github.com/llvm/llvm-project/commit/c123642824fdc9e1f2b6fda849b5cde113372229
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[CI] Install binutils-dev in pre-merge container (#184608)
This is to get the plugin-api.h file, to allow running tests for the
gold plugin.
Commit: e5a6a0f10856b14ea0956b40305632fbbfea6f16
https://github.com/llvm/llvm-project/commit/e5a6a0f10856b14ea0956b40305632fbbfea6f16
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
A llvm/test/CodeGen/SPIRV/global-var-no-functions.ll
M llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-global.ll
M llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-nested.ll
M llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-struct.ll
M llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-undef.ll
Log Message:
-----------
[SPIRV] Fix global emission for modules with no functions (#183833)
Right now we have a problem where if you have a LLVM module with globals
but no functions, a completely empty SPIR-V module is emitted.
This is because global emission is dependent on tracking intrinsic
functions being emitted in functions.
As a simple fix, just insert a service function, which the backend is
already set up to not actually emit, if there are no real functions.
The current use case of the service function is for function pointers. I
don't think it's possible that we need to both generate a service
function for function pointers and for globals with no functions, so I
just added an error (not an assert) just in case if we do need it for
both cases.
Probably we should rework global handling in the future to work without
these workarounds, but this is a pretty fundamental issue so let's work
around it with this simple change for now.
This change exposed an existing bug:
We consider basic blocks with no successors as fall-through
Also, fix some existing tests. The symptom was:
We previously emitted an empty module, but not that we don't, we hit a
`spirv-val` error about invalid Function StorageClass for globals
because no `addrspace` was specified. Set the `addrspace` to `1`
(`CrossWorkgroup`) in those tests.
Closes: https://github.com/llvm/llvm-project/issues/182899
---------
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: b28ec5ad18080d40f62de0eb5a07c9ebb7649451
https://github.com/llvm/llvm-project/commit/b28ec5ad18080d40f62de0eb5a07c9ebb7649451
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/Func/IR/FuncOps.td
M mlir/lib/Dialect/Func/IR/FuncOps.cpp
M mlir/test/Dialect/Func/invalid.mlir
M mlir/test/lib/Dialect/Test/TestOpDefs.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
Log Message:
-----------
[mlir][Func] Fix FuncOp verifier ordering via hasRegionVerifier (#184612)
FuncOp::verify() iterated over all blocks and called
getMutableSuccessorOperands() on any RegionBranchTerminatorOpInterface
terminator to check return types. This ran during the entrance phase of
verification — before child ops had been verified — so a malformed
terminator whose getMutableSuccessorOperands() assumed invariants
established by its own verify() could crash instead of emitting a clean
diagnostic.
Fix by switching to hasRegionVerifier=1: rename verify() →
verifyRegions() so the return-type checks run in the exit phase, after
all nested ops have already been verified.
To demonstrate the bug and guard against regression, add
TestCrashingReturnOp to the test dialect. The op implements
RegionBranchTerminatorOpInterface and report_fatal_errors in
getMutableSuccessorOperands() when its 'valid' unit-attr is absent,
reproducing the class of crash described above. The accompanying lit
test confirms a clean diagnostic is emitted rather than a crash.
Commit: ded64d2417d4394ae47d69653a5798a3a36dd9c7
https://github.com/llvm/llvm-project/commit/ded64d2417d4394ae47d69653a5798a3a36dd9c7
Author: Mircea Trofin <mtrofin at google.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/include/llvm/Support/GenericDomTreeConstruction.h
M llvm/unittests/Analysis/DomTreeUpdaterTest.cpp
Log Message:
-----------
[DTU] fix dominator tree update eliding reachable nodes (#177683)
The initial CFG looks like this:

After inlining, it looks like this:

It should be sufficient to add and remove the edges shown in the test, i.e.:
- add: `bb3->bb1.i` and `bb3->bb2.i`
- remove: `bb3->bb4`, `bb3->bb5` and `bb5->bb8`
New nodes, like `bb5.body`, get discovered when adding bb3->bb2.i. See the "StepByStep" variant of the test). Without the fix in this patch, however, `bb5.body` gets elided when the deleted edges get taken into account, and `DT` is left invalid.
Commit: a3eb13b5bfd1f216afcc128f9452bbb72daba0d6
https://github.com/llvm/llvm-project/commit/a3eb13b5bfd1f216afcc128f9452bbb72daba0d6
Author: Takashi Idobe <idobetakashi at gmail.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
A llvm/test/CodeGen/X86/mulx64-no-implicit-copy.ll
Log Message:
-----------
[X86] remove unnecessary movs when %rdx is an input to mulx (#184462)
Closes: https://github.com/llvm/llvm-project/issues/174912
When generating a `mulx` instruction for a widening multiplication, even
if one input is placed in %rdx, LLVM won't place it in the implicit
first slot, instead it'll generate two movs before calling mulx to swap
the registers, which are unnecessary. GCC already has this optimization
(as shown in the issue) so this puts the two compilers closer to each
other on that front.
Co-authored-by: Aiden Grossman <aidengrossman at google.com>
Commit: 247a9bfc26ad1f062c52f7b4625ec0e0710a6424
https://github.com/llvm/llvm-project/commit/247a9bfc26ad1f062c52f7b4625ec0e0710a6424
Author: Krzysztof Drewniak <krzysdrewniak at gmail.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M mlir/lib/Dialect/AMDGPU/Transforms/FoldMemRefsOps.cpp
M mlir/test/Dialect/AMDGPU/amdgpu-fold-memrefs.mlir
Log Message:
-----------
[mlir][AMDGPU] Add folders for memref aliases to TDM base creation (#184567)
The TDM base creation (amdgpu.make_tdm_base and
amdgpu.make_gather_tdm_base) take references to a
`%memref[%i0, %i1,, ...]` for the starting point of the tiles in
global/shared memory that the TDM descriptor refers to. Memory alias ops
can be safely folded into these operations, since these two memref
operands are just pointers to a scalar starting pint and don't have
semantics that depend on the memref layout (except to the extent that it
defines a location in memory).
While I'm here, I've cleaned up a few things, like the incorrect file
header and fixed the tests to not use integer address spaces.
Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
Commit: f55080da988a68da6736407b34eafd00817b7143
https://github.com/llvm/llvm-project/commit/f55080da988a68da6736407b34eafd00817b7143
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
A flang/test/Lower/OpenMP/implicit-map-pointer-no-default-mapper.f90
M flang/test/Lower/OpenMP/target-data-skip-mapper-calls.f90
Log Message:
-----------
[flang][OpenMP] Avoid implicit default mapper on pointer captures (#184382)
This change fixes incorrect implicit declare mapper behavior in Flang
OpenMP lowering.
Issue:
Implicit default mappers were being attached/generated for pointer-based
implicit captures, and also on data-motion directives. That could
trigger recursive component mapping that overlaps/conflicts with
explicit user mappings, causing runtime mapping failures.
Fix:
- Skip implicit default mapper generation for implicit pointer captures
(keep support for allocatables).
- Do not auto-attach implicit mappers on target enter data, target exit
data, or target update.
- Apply the same pointer guard in the implicit target-capture lowering
path.
Commit: e8e8d30b229a77d86e97c49a0680ddb7fdf77a14
https://github.com/llvm/llvm-project/commit/e8e8d30b229a77d86e97c49a0680ddb7fdf77a14
Author: Alexey Karyakin <akaryaki at qti.qualcomm.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang/lib/Headers/hvx_hexagon_protos.h
A clang/test/Headers/hexagon-hvx-ieee-headers.c
Log Message:
-----------
[Hexagon] Use __HVX_IEEE_FP__ to guard protos that need -mhvx-ieee-fp (#184422)
Hexagon clang recently started to define __HVX_IEEE_FP__ when the
-mhvx-ieee-fp option is specified. Guard the intrinsic macros for
instructions that should only be available with -mhvx-ieee-fp with
__HVX_IEEE_FP__.
Additionally, the following NFC changes are included:
- NFC: Remove guards around HVX v60 intrinsic macros
Hexagon v60 is the oldest Hexagon version that supports HVX so these
guards were redundant. Presence of HVX is guarded separately, once
per the whole file.
- Remove comments from closing guards (HVX protos)
These comments served very limited function as they only guard
one macro. Also, they were incorrect. Instead of fixing remove them.
This will also reduce by the factor of two the amount of changes
when guarding conditions change.
Commit: 53aa77092ea72b85bec0c8bb1ba11ed1f2f2eefe
https://github.com/llvm/llvm-project/commit/53aa77092ea72b85bec0c8bb1ba11ed1f2f2eefe
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M flang/tools/f18/CMakeLists.txt
Log Message:
-----------
[flang] Fix distribution build of Fortran builtin/intrinsic modules. (#184204)
Currently, `-DLLVM_DISTRIBUTION_COMPONENTS="flang-module-interfaces"`
doesn't work. It failed to build the Fortran builtin/intrinsic modules
as distribution build, `install-distribution`.
This PR is to fix that.
Commit: a40e83b29ce9b1642b0633c726032f1481d83bed
https://github.com/llvm/llvm-project/commit/a40e83b29ce9b1642b0633c726032f1481d83bed
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M libsycl/docs/index.rst
A libsycl/include/sycl/__impl/async_handler.hpp
A libsycl/include/sycl/__impl/detail/default_async_handler.hpp
A libsycl/include/sycl/__impl/property_list.hpp
A libsycl/include/sycl/__impl/queue.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/CMakeLists.txt
A libsycl/src/detail/queue_impl.cpp
A libsycl/src/detail/queue_impl.hpp
A libsycl/src/queue.cpp
Log Message:
-----------
[libsycl] Add sycl::queue stub (#184110)
Part 2 of changes needed for USM alloc/dealloc impl.
This is part of the SYCL support upstreaming effort. The relevant RFCs
can be found here:
https://discourse.llvm.org/t/rfc-add-full-support-for-the-sycl-programming-model/74080
https://discourse.llvm.org/t/rfc-sycl-runtime-upstreaming/74479
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 8486d893bd7960ed6f0be8d2fa18cd96fb329a09
https://github.com/llvm/llvm-project/commit/8486d893bd7960ed6f0be8d2fa18cd96fb329a09
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Log Message:
-----------
[SelectionDAG] Fix -Wunused-variable after #179318 (#184623)
```
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:3572:26: error: unused variable 'NanEnc' [-Werror,-Wunused-variable]
3572 | const fltNanEncoding NanEnc = SrcSem.nanEncoding;
| ^~~~~~
```
Simply inline the definition of the variable given it is not used
anywhere else and the assignment is a simple copy.
Commit: 7b72b5fde414fd7d41653a07ddb87f80038009aa
https://github.com/llvm/llvm-project/commit/7b72b5fde414fd7d41653a07ddb87f80038009aa
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[bazel] Fix building lldb without libedit (#184535)
We were always trying to compile the libedit file even if it wasn't used
because we were missing this conditional from cmake:
https://github.com/llvm/llvm-project/blob/630b9570d199dca19dc85834f583bc8590a21876/lldb/source/Host/CMakeLists.txt#L57-L61
Commit: 613a5c555ebffd7f32ad48de7253e8c25fe627a4
https://github.com/llvm/llvm-project/commit/613a5c555ebffd7f32ad48de7253e8c25fe627a4
Author: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td
M mlir/include/mlir/Dialect/Vector/Transforms/LoweringPatterns.h
M mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorMultiReduction.cpp
M mlir/test/Dialect/LLVM/transform-e2e.mlir
M mlir/test/Dialect/Vector/transform-vector.mlir
R mlir/test/Dialect/Vector/vector-multi-reduction-reorder-and-expand.mlir
A mlir/test/Dialect/Vector/vector-multi-reduction-reorder.mlir
M mlir/test/Dialect/Vector/vector-multi-reduction-unrolling.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/reduce_1d.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/reduce_2d.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-matmul-masked-vec.mlir
M mlir/test/python/dialects/transform_vector_ext.py
Log Message:
-----------
[mlir][vector] Replace OneDimMultiReductionToTwoDim with OneDimMultiReductionToReduction (#184241)
The `OneDimMultiReductionToTwoDim` pattern had some issues. For the
input program:
```mlir
func.func @rank1_multi_reduction(%arg0: vector<8xf32>, %acc: f32) -> f32 {
%0 = vector.multi_reduction <add>, %arg0, %acc [0] : vector<8xf32> to f32
return %0 : f32
}
```
* when lowering using the inner-parallel strategy, the compiler would
essentially produce scalar code:
```mlir
func.func @rank1_multi_reduction(%arg0: vector<8xf32>, %arg1: f32) -> f32 {
%0 = vector.shape_cast %arg0 : vector<8xf32> to vector<1x8xf32>
%1 = vector.broadcast %arg1 : f32 to vector<1xf32>
%2 = vector.transpose %0, [1, 0] : vector<1x8xf32> to vector<8x1xf32>
%3 = vector.extract %2[0] : vector<1xf32> from vector<8x1xf32>
%4 = arith.addf %3, %1 : vector<1xf32>
%5 = vector.extract %2[1] : vector<1xf32> from vector<8x1xf32>
%6 = arith.addf %5, %4 : vector<1xf32>
... (repeats for all 8 elements) ...
%17 = vector.extract %2[7] : vector<1xf32> from vector<8x1xf32>
%18 = arith.addf %17, %16 : vector<1xf32>
%19 = vector.extract %18[0] : f32 from vector<1xf32>
return %19 : f32
}
```
* when lowering using the inner-reduction strategy, the compiler would
first unnecessarily transform it into a 2-D multi_reduction operation
<1x8xf32> and then extract an <8xf32> vector and apply reduction. The
canonicalization and folding would lead to the following final result:
```mlir
func.func @rank1_multi_reduction(%arg0: vector<8xf32>, %arg1: f32) -> f32 {
%0 = vector.reduction <add>, %arg0, %arg1 : vector<8xf32> into f32
return %0 : f32
}
```
Now, after this change:
* when lowering the compiler now produces for both strategies in one
step.
```
func.func @rank1_multi_reduction(%arg0: vector<8xf32>, %arg1: f32) -> f32 {
%0 = vector.reduction <add>, %arg0, %arg1 : vector<8xf32> into f32
return %0 : f32
}
```
This pattern is also useful for an ongoing refactoring that is happening
in the multi_reduction patterns. It is the only pattern that increases
multi_reduction in rank and would lead to an infinite loop when
attempting to reach a fixed point once we generalize other unrolling
patterns.
Assisted-by: Claude
Commit: 39d5aea6df9094c560a98f88231d258885285a6c
https://github.com/llvm/llvm-project/commit/39d5aea6df9094c560a98f88231d258885285a6c
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsLoop.h
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsLoop.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
Log Message:
-----------
[OpenACC] Replace terminators with scf.yield in wrapMultiBlockRegionWithSCFExecuteRegion (#184458)
When wrapping a multi-block region in `scf.execute_region`, replace
`func::ReturnOp` (if flag `convertFuncReturn` is set) and `acc::YieldOp`
in all the blocks with `scf.yield` so the region has a valid SCF
terminator.
Commit: 8f8590e691fe772b321004118ae92f5230c8a94d
https://github.com/llvm/llvm-project/commit/8f8590e691fe772b321004118ae92f5230c8a94d
Author: Xing Xue <xingxue at outlook.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang/lib/Driver/ToolChains/AIX.cpp
Log Message:
-----------
[OpenMP][AIX] Add libpthreads for -fopenmp (#184629)
The compiler uses TLS for OpenMP thread‑private data, which results in
references to symbols such as `__tls_get_addr` in `libpthreads`.
Therefore, this PR adds `libpthreads` to the link command when
`-fopenmp` is specified.
Commit: 4b3a9246a0867e45dfd0ab10aeff68e78ebdce8c
https://github.com/llvm/llvm-project/commit/4b3a9246a0867e45dfd0ab10aeff68e78ebdce8c
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[bazel] Fix more parse_headers cases in lldb (#184534)
CI doesn't have a toolchain that supports this so we don't validate this
there, but locally this fixes some issues if you're using a toolchain
that does. Mostly since lldb has a bunch of circular deps we just have
to disable it for the header only targets we create to avoid those
circular deps.
Commit: 668d09b2846d9794b35daa2744bf6d4c66c5ec42
https://github.com/llvm/llvm-project/commit/668d09b2846d9794b35daa2744bf6d4c66c5ec42
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang/lib/Frontend/CompilerInstance.cpp
A clang/test/Modules/Inputs/pch-config-macros/include/Mod1.h
A clang/test/Modules/Inputs/pch-config-macros/include/module.modulemap
A clang/test/Modules/pch-config-macros.c
Log Message:
-----------
[clang][Modules] Fixing unexpected warnings triggered by a PCH and a module with config macros (#177078)
When a PCH is compiled with macro definitions on the command line, such
as `-DCONFIG1`, an unexpected warning can occur if the macro definitions
happen to belong to an imported module's config macros. The warning may
look like the following:
```
definition of configuration macro 'CONFIG1' has no effect on the import of 'Mod1'; pass '-DCONFIG1=...' on the command line to configure the module
```
while `-DCONFIG1` is clearly on the command line when `clang` compiles
the source that uses the PCH and the module.
The reason this can happen is a combination of two things:
1. The logic that checks for config macros is not aware of any command
line macros passed through the PCH
([here](https://github.com/llvm/llvm-project/blob/7976ac990000a58a7474269a3ca95e16aed8c35b/clang/lib/Frontend/CompilerInstance.cpp#L1562)).
2. `clang` _replaces_ the predefined macros on the command line with the
predefined macros from the PCH, which does not include any builtins
([here](https://github.com/llvm/llvm-project/blob/7976ac990000a58a7474269a3ca95e16aed8c35b/clang/lib/Frontend/CompilerInstance.cpp#L679)).
This PR teaches the preprocessor to recognize the command line macro
definitions passed transitively through the PCH, so that the error check
does not miss these definitions by mistake. The config macro itself
works fine, and it is only the error check that needs fixing.
rdar://95261458
Commit: 77f1480f7ef1af79e3db57be899e73abd1c59a9f
https://github.com/llvm/llvm-project/commit/77f1480f7ef1af79e3db57be899e73abd1c59a9f
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
Log Message:
-----------
[SPIRV] Fix return value of runOnModule for SPIRVPrepareFunctions (#184636)
We need to return `true` if the module is changed by the pass, and we
forgot to do that in this new case.
This fixes a buildbot
[fail](https://lab.llvm.org/buildbot/#/builders/187/builds/17475).
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: 18226e7e2eb8ceeb8a25fb218798f7c9cdbded9d
https://github.com/llvm/llvm-project/commit/18226e7e2eb8ceeb8a25fb218798f7c9cdbded9d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
Log Message:
-----------
[RISCV] Lower i8/i16/i32 scalable vector ISD::CLMUL/CLMULH with Zvbc32e. (#184465)
Commit: a14f9f822f4813a803eb21797fe90b6367683bcb
https://github.com/llvm/llvm-project/commit/a14f9f822f4813a803eb21797fe90b6367683bcb
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/subgroup-distribute-unit.mlir
M mlir/test/Dialect/XeGPU/subgroup-distribute.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
Log Message:
-----------
[mlir][xegpu] Add support for accessing the default order of a layout. (#184451)
Currently, `getOrder` returns null if the user does not provide an
`order` in xegpu layout. This behavior is undesirable when coupled with
utility functions that work on top of layouts (like `isTransposeOf`).
This PR introduce a `getEffectiveOrder` which always returns the true
order, even if user decides to omit it.
Commit: b0b583475a03bbdb34dff0f3783d7c28713de582
https://github.com/llvm/llvm-project/commit/b0b583475a03bbdb34dff0f3783d7c28713de582
Author: Mir Immad <mirimmad17 at gmail.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/X86/known-pow2.ll
Log Message:
-----------
[DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (#182744)
Fixes #181642
Commit: b9f1199581e746152a019a104d22f87ce41f46e1
https://github.com/llvm/llvm-project/commit/b9f1199581e746152a019a104d22f87ce41f46e1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-aggregates.ll
Log Message:
-----------
InstCombine: Support extractvalue in SimplifyDemandedFPClass (#184171)
Previously this only handled extractvalue of frexp.
Commit: 9cd054b0bb3e25ae8eaaa5bdc9d73234cc9b906a
https://github.com/llvm/llvm-project/commit/9cd054b0bb3e25ae8eaaa5bdc9d73234cc9b906a
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-int-neon.ll
M llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
M llvm/test/CodeGen/AArch64/arm64-vqadd.ll
Log Message:
-----------
[AArch64] Add lowering for misc NEON intrinsics (#183050)
This patch adds custom lowering for the following NEON intrinsics to
enable better codegen for convert and load/store operations:
- suqadd
- usqadd
- abs
- sqabs
- sqneg
Commit: 9105d9c24949d8cf9b740cb874027351e7230e70
https://github.com/llvm/llvm-project/commit/9105d9c24949d8cf9b740cb874027351e7230e70
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M lld/ELF/Arch/Hexagon.cpp
A lld/test/ELF/hexagon-duplex-relocs.s
Log Message:
-----------
[lld][Hexagon] Fix findMaskR8 missing duplex support (#183936)
findMaskR8() lacked an isDuplex() check, unlike findMaskR6(),
findMaskR11(), and findMaskR16() which all handle duplex instructions.
When the assembler generates R_HEX_8_X on a duplex SA1_addi instruction
(e.g. `{ r0 = add(r0, ##target); memw(r1+#0) = r2 }`), the wrong mask
0x00001fe0 placed relocation bits at [12:5] instead of [25:20],
corrupting the low sub-instruction (e.g. memw became memb).
Add the isDuplex() check returning 0x03f00000, and add a comprehensive
test covering all duplex instruction x relocation type combinations
across findMaskR6, findMaskR8, findMaskR11, and findMaskR16.
Commit: 3028604556636ad151e0ce57048d19a914179dc8
https://github.com/llvm/llvm-project/commit/3028604556636ad151e0ce57048d19a914179dc8
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[bazel] Add target for `clang-nvlink-wrapper` (#184644)
Commit: c2db12daa171e8f055ba0fb84cd8fd7b434f75b0
https://github.com/llvm/llvm-project/commit/c2db12daa171e8f055ba0fb84cd8fd7b434f75b0
Author: Sean Fertile <sd.fertile at gmail.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/MC/XCOFFObjectWriter.cpp
A llvm/test/CodeGen/PowerPC/aix-reloc-sorting.ll
Log Message:
-----------
[AIX] Sort relocations in XCOFF object writer. (#180807)
Some relocations (like R_REF) are emitted to an offset 0 within the CSECT. If other relocations have already been emitted then the relocations are not in increasing order and the linker will emit an error. Sort the relocations before emitting to fix the problem.
Commit: b80248a0ea35df17ef6f4a2a9df59a0aceb89c79
https://github.com/llvm/llvm-project/commit/b80248a0ea35df17ef6f4a2a9df59a0aceb89c79
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang-tools-extra/clang-doc/CMakeLists.txt
M clang-tools-extra/clang-doc/Generators.cpp
M clang-tools-extra/clang-doc/Generators.h
M clang-tools-extra/clang-doc/JSONGenerator.cpp
A clang-tools-extra/clang-doc/MDMustacheGenerator.cpp
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Representation.h
A clang-tools-extra/clang-doc/assets/md/all-files-template.mustache
A clang-tools-extra/clang-doc/assets/md/class-template.mustache
A clang-tools-extra/clang-doc/assets/md/comments-partial.mustache
A clang-tools-extra/clang-doc/assets/md/index-template.mustache
A clang-tools-extra/clang-doc/assets/md/namespace-template.mustache
M clang-tools-extra/clang-doc/support/Utils.cpp
M clang-tools-extra/clang-doc/support/Utils.h
M clang-tools-extra/clang-doc/tool/CMakeLists.txt
M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
M clang-tools-extra/test/clang-doc/basic-project.mustache.test
M clang-tools-extra/test/clang-doc/builtin_types.cpp
M clang-tools-extra/test/clang-doc/comments-in-macros.cpp
M clang-tools-extra/test/clang-doc/enum.cpp
M clang-tools-extra/test/clang-doc/index.cpp
M clang-tools-extra/test/clang-doc/json/class.cpp
M clang-tools-extra/test/clang-doc/json/namespace.cpp
M clang-tools-extra/test/clang-doc/namespace.cpp
M clang-tools-extra/test/clang-doc/templates.cpp
M clang-tools-extra/unittests/clang-doc/ClangDocTest.cpp
M clang-tools-extra/unittests/clang-doc/HTMLGeneratorTest.cpp
M clang-tools-extra/unittests/clang-doc/JSONGeneratorTest.cpp
Log Message:
-----------
[clang-doc] Add a Mustache Markdown generator (#177221)
Adds a Markdown generator that uses Mustache templates. This patch adds
the templates themselves and implements changes to the JSONGenerator to
allow for the creation of specific files needed by the MD tests like
`all-files.json`.
This backend should be considered experimental. It satisfies all the
same tests that the current MD backend is tested against, but those
don't seem to provide full coverage for all functionality inside that
backend. It also doesn't output everything provided by JSON. It doesn't
use the MD unittests because the Mustache templates must currently be
written to files.
Commit: 56a53550d317ee2345b48374a9fab239ad75a4df
https://github.com/llvm/llvm-project/commit/56a53550d317ee2345b48374a9fab239ad75a4df
Author: Shivam Kunwar <75530356+phyBrackets at users.noreply.github.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
A clang/test/DebugInfo/CXX/debug-info-constexpr-array.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
A llvm/test/DebugInfo/X86/debug-info-constexpr-array.ll
Log Message:
-----------
[DebugInfo] Emit DW_AT_const_value for constexpr array static members (#182442)
Clang does not emit a `DW_AT_const_value` in DWARF, while GCC does. This
patch fixes this issue through handling Array `APValues` and respective
handling in the backend through `ConstantDataSequential`
Fixes #165220
Commit: 937bf9cef69fb79038e135d28bf8d8365720cee5
https://github.com/llvm/llvm-project/commit/937bf9cef69fb79038e135d28bf8d8365720cee5
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/bolt/BUILD.bazel
Log Message:
-----------
[bazel] Fix parse_headers in bolt (#184648)
Commit: ff0220d236dedccb8011873e9b92071fbfa74a0e
https://github.com/llvm/llvm-project/commit/ff0220d236dedccb8011873e9b92071fbfa74a0e
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M flang/docs/OpenACC.md
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
M flang/test/Semantics/OpenACC/acc-cache-validity.f90
Log Message:
-----------
[flang][acc] Allow orphaned acc cache directive (#184448)
While the spec allows the cache directive at the top of a loop body, the
directive has also been utilized at the top of an acc routine. This PR
removes the semantic check that rejects the cache directive outside of a
loop, allowing orphaned `!$acc cache` similar to CIR.
The OpenACC.md deviation document is updated to note this extension.
Commit: d9d6b16cc622dcbf39e8c2ff549704166040b455
https://github.com/llvm/llvm-project/commit/d9d6b16cc622dcbf39e8c2ff549704166040b455
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/Attributor/nofpclass.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-aggregates.ll
Log Message:
-----------
ValueTracking: Handle ConstantDataSequential in computeKnownFPClass (#184191)
Commit: 2b3e30d4c4705dfb21931188540d0c3aa901a7bb
https://github.com/llvm/llvm-project/commit/2b3e30d4c4705dfb21931188540d0c3aa901a7bb
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/test/CodeGen/AArch64/sme-streaming-checkvl.ll
M llvm/test/CodeGen/AMDGPU/iglp-no-clobber.ll
A llvm/test/CodeGen/AMDGPU/machine-sink-fence.ll
M llvm/test/CodeGen/AMDGPU/misched-remat-revert.ll
M llvm/test/CodeGen/Thumb2/mve-postinc-lsr.ll
Log Message:
-----------
[CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (#182000)
This prevents MachineSink from sinking loads past fences (or any other instruction marked as hasSideEffects).
Fixes: #181708
Commit: 2c95b8d5185b064780515bf3d7c89486ee086056
https://github.com/llvm/llvm-project/commit/2c95b8d5185b064780515bf3d7c89486ee086056
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
Log Message:
-----------
AMDGPU: Clean up print handling of AMDGPUTargetID (#184643)
Provide print to raw_ostream method and use it where applicable.
Commit: fbc3a312d69d120d0e594eb8a32bd50222e855cb
https://github.com/llvm/llvm-project/commit/fbc3a312d69d120d0e594eb8a32bd50222e855cb
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp
Log Message:
-----------
[mlir][xevm] Remove unnecessary attach target pass. (#184432)
Commit: 0baf5a0496a50ffa9f47b76087cb66980a1f713e
https://github.com/llvm/llvm-project/commit/0baf5a0496a50ffa9f47b76087cb66980a1f713e
Author: Sam Clegg <sbc at chromium.org>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M libunwind/src/Unwind-wasm.c
Log Message:
-----------
Revert "Silence -Wunused-parameter warnings in Unwind-wasm.c" (#175776)
Reverts llvm/llvm-project#125412
See the discussion in #125412 for why this is necessary. The summary is
that:
- Eliding arguments is the C23 extension, but libunwind builds its C
files with `-std=c99`, so this change broke the build.
- `-Wno-unused-parameter` is part of the build for libunwind, so the
codebase does allow them.
Commit: df52bb4c32e2dde40e096813ec83cc0c8a271a10
https://github.com/llvm/llvm-project/commit/df52bb4c32e2dde40e096813ec83cc0c8a271a10
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
Log Message:
-----------
[LoopUnrollPass] Don't use clang specific syntax in optimization remarks (#182430)
Commit: 9dc65372aa6101bd72be80ca0901cb8dd780d01f
https://github.com/llvm/llvm-project/commit/9dc65372aa6101bd72be80ca0901cb8dd780d01f
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp
M clang-tools-extra/docs/clang-tidy/checks/misc/const-correctness.rst
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-parameters.cpp
Log Message:
-----------
[clang-tidy] Don't report unnamed params for misc-const-correctness (#184388)
Previously misc-const-correctness warned about non-const unnamed
parameters; but this commit excludes them because these warnings are not
actually useful. An unnamed parameter cannot be referenced at all, so
marking them as 'const' doesn't add additional information.
Also the diagnostic messages look awkward without a name.
Fixes #184330
Commit: 64c0f624cd0717c4fdcc94c5d8557173359935a6
https://github.com/llvm/llvm-project/commit/64c0f624cd0717c4fdcc94c5d8557173359935a6
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M lldb/source/Core/PluginManager.cpp
Log Message:
-----------
[lldb] Make the PluginManager thread safe (#184452)
In #184273, John pointed out that the PluginManager is currently not
thread safe. While we don't currently provide any guarantees, it seems
desirable to be able to interact safely with the PluginManager from
different threads. For example, we allow dynamically loading plugins
from the command interpreter, which in theory could be coming from
different threads.
Commit: a7914aecb2db16274ae07d36ae07178707eac89b
https://github.com/llvm/llvm-project/commit/a7914aecb2db16274ae07d36ae07178707eac89b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/MC/RISCV/rv32p-valid.s
M llvm/test/MC/RISCV/rv64p-valid.s
Log Message:
-----------
[RISCV] Allow unsigned immediates for pli.h, pli.dh, pli.w (#184554)
Allow unsigned immediates that look like like simm10 when only
considering the lower 16 or 32 bits. For pli.dh and pli.dh this
[652024,65535]. For pli.w, this is [4294966784,4294967295].
Since we're only inserting 16 or 32 bits, it makes sense to me that only
those 16 or 32 bits matter. This is similar to how we allow `li a0,
0xffffffff` on RV32.
Commit: 2032960b5de1893ca0027102130188664f94bb02
https://github.com/llvm/llvm-project/commit/2032960b5de1893ca0027102130188664f94bb02
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M flang/test/Lower/Intrinsics/atan2d.f90
M flang/test/Lower/Intrinsics/atan2pi.f90
M flang/test/Lower/Intrinsics/atand.f90
M flang/test/Lower/Intrinsics/atanpi.f90
M flang/test/Lower/Intrinsics/bessel_jn.f90
Log Message:
-----------
[flang][NFC] Converted five tests from old lowering to new lowering (part 24) (#184538)
Tests converted from test/Lower/Intrinsics: atan2d.f90, atan2pi.f90,
atand.f90, atanpi.f90, bessel_jn.f90
Commit: 75b2ea57d5f4a5ae0de1b3ca1ca7eec464811b45
https://github.com/llvm/llvm-project/commit/75b2ea57d5f4a5ae0de1b3ca1ca7eec464811b45
Author: Prajwal P J <prajwaljalwadi at gmail.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Analysis/Analyses/UnsafeBufferUsage.h
M clang/include/clang/Analysis/Analyses/UnsafeBufferUsageGadgets.def
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
A clang/test/SemaCXX/warn-unsafe-buffer-usage-string-view.cpp
Log Message:
-----------
[Clang][UnsafeBufferUsage] Warn about two-arg string_view constructors. (#180471)
"This patch extends the unsafe buffer usage warning to cover
std::string_view constructors that take a pointer and size, similar to
the existing check for std::span.
The warning message has been updated to be generic ('container
construction' instead of 'span construction') and existing tests have
been updated to match.
Fixes #166644."
Commit: 34541e5a5400b18d5c75c43f3c0f43cf820117dc
https://github.com/llvm/llvm-project/commit/34541e5a5400b18d5c75c43f3c0f43cf820117dc
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/WaveActiveAllEqual.hlsl
A clang/test/SemaHLSL/BuiltIns/WaveActiveAllEqual-errors.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/DirectX/ShaderFlags/wave-ops.ll
A llvm/test/CodeGen/DirectX/WaveActiveAllEqual.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveActiveAllEqual.ll
Log Message:
-----------
[HLSL] Add WaveActiveAllEqual functions (#183634)
This PR adds the WaveActiveAllEqual function to HLSL.
It also adds extra macro logic to CGHLSLBuiltins so that you can specify
a different intrinsic name for the SPIRV intrinsic.
Fixes https://github.com/llvm/llvm-project/issues/99162
Commit: 20902f0b721ba6cf2fb134362d27144bd8584d53
https://github.com/llvm/llvm-project/commit/20902f0b721ba6cf2fb134362d27144bd8584d53
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
A llvm/test/Transforms/Attributor/nofpclass-bitcast.ll
Log Message:
-----------
ValueTracking: Teach computeKnownFPClass to look at bitcast + integer max (#184073)
The returned class will still be one of the bitpatterns.
This pattern is used in rocm device libraries in assorted functions,
e.g.,
https://github.com/ROCm/llvm-project/blob/amd-staging/amd/device-libs/ocml/src/rlen3F.cl#L20
I believe it is blocking the eliminationg of finite checks in some of
the more complex functions.
Commit: a212ebd471b103e26f9746715b1abb47e5ee27b7
https://github.com/llvm/llvm-project/commit/a212ebd471b103e26f9746715b1abb47e5ee27b7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/Attributor/nofpclass.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-aggregates.ll
Log Message:
-----------
ValueTracking: Handle constant structs in computeKnownFPClass (#184192)
Also fix attributor not bothering to deal with structs.
Commit: d62fbb6a96645c7c0e450bd8fe198e47c44e2ae3
https://github.com/llvm/llvm-project/commit/d62fbb6a96645c7c0e450bd8fe198e47c44e2ae3
Author: Steven Perron <stevenperron at google.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp_const.ll
A llvm/test/CodeGen/SPIRV/pointers/fun-ptr-to-itself.ll
Log Message:
-----------
[SPIRV] Update the global registry when expanding function pointer (#183873)
We do not update the global registry when expanding a G_GLOBAL_VALUE for
a function pointer. Then during pointer validation, we can get a
garbage value from the global registry.
Commit: 6e1aee4276bbd6f84b34ce449a3c88d2013ca5e4
https://github.com/llvm/llvm-project/commit/6e1aee4276bbd6f84b34ce449a3c88d2013ca5e4
Author: Vigneshwar Jayakumar <vigneshwar.jayakumar at amd.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
A llvm/test/CodeGen/AMDGPU/bfe-i8-i16.ll
M llvm/test/CodeGen/AMDGPU/bitcast_vector_bigint.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
Log Message:
-----------
[AMDGPU] Select v_bfe_u32 for i8/i16 (and (srl x, c), mask) (#182446)
Combine i8 and i16 (and (srl x, c), mask) instructions to v_bfe_32. This optimization is skipped true_i16 targets.
resolves issue #179494
Commit: 63074da25d16376d4a5b27661d891623bf797fd3
https://github.com/llvm/llvm-project/commit/63074da25d16376d4a5b27661d891623bf797fd3
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M lld/test/wasm/debuginfo.test
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
M llvm/test/CodeGen/X86/dbg-distringtype-uint.ll
M llvm/test/DebugInfo/AArch64/DW_AT_APPLE_enum_kind.ll
M llvm/test/DebugInfo/AMDGPU/variable-locations.ll
M llvm/test/DebugInfo/Generic/cross-cu-linkonce-distinct.ll
M llvm/test/DebugInfo/Generic/debug-names-linkage-name.ll
M llvm/test/DebugInfo/Generic/dwarf5-debug-info-static-member.ll
M llvm/test/DebugInfo/Generic/inlined-static-var.ll
M llvm/test/DebugInfo/Generic/namespace.ll
M llvm/test/DebugInfo/MSP430/global-var.ll
M llvm/test/DebugInfo/NVPTX/debug-addr-class.ll
M llvm/test/DebugInfo/PowerPC/strict-dwarf.ll
M llvm/test/DebugInfo/WebAssembly/tls_pic_globals.ll
M llvm/test/DebugInfo/X86/2011-09-26-GlobalVarContext.ll
M llvm/test/DebugInfo/X86/DW_AT_calling-convention.ll
M llvm/test/DebugInfo/X86/align_cpp11.ll
M llvm/test/DebugInfo/X86/align_objc.ll
M llvm/test/DebugInfo/X86/arange-and-stub.ll
M llvm/test/DebugInfo/X86/containing-type-extension-rust.ll
M llvm/test/DebugInfo/X86/debug-info-access.ll
M llvm/test/DebugInfo/X86/debug-info-static-member.ll
M llvm/test/DebugInfo/X86/debug-names-dwarf64.ll
M llvm/test/DebugInfo/X86/dwarf-aranges.ll
M llvm/test/DebugInfo/X86/dwarf-linkage-names.ll
M llvm/test/DebugInfo/X86/dwarfdump-DIImportedEntity_elements.ll
M llvm/test/DebugInfo/X86/generate-odr-hash.ll
M llvm/test/DebugInfo/X86/gnu-public-names.ll
M llvm/test/DebugInfo/X86/linkage-name.ll
M llvm/test/DebugInfo/X86/namelist1.ll
M llvm/test/DebugInfo/X86/prototyped.ll
M llvm/test/DebugInfo/X86/ref_addr_relocation.ll
M llvm/test/DebugInfo/X86/string-offsets-multiple-cus.ll
M llvm/test/DebugInfo/X86/string-offsets-table.ll
M llvm/test/DebugInfo/X86/template.ll
M llvm/test/DebugInfo/X86/tls.ll
M llvm/test/DebugInfo/X86/tu-to-non-tu.ll
M llvm/test/DebugInfo/X86/vla-global.ll
M llvm/test/DebugInfo/attr-btf_tag.ll
M llvm/test/MC/WebAssembly/debug-info.ll
M llvm/test/MC/WebAssembly/debug-info64.ll
M llvm/test/MC/WebAssembly/dwarfdump.ll
M llvm/test/MC/WebAssembly/dwarfdump64.ll
M llvm/test/tools/llvm-debuginfo-analyzer/DWARF/crash-thread-local-storage.test
Log Message:
-----------
[DebugInfo][DwarfDebug] Move emission of globals from beginModule() to endModule() (5/7) (#184219)
RFC
https://discourse.llvm.org/t/rfc-dwarfdebug-fix-and-improve-handling-imported-entities-types-and-static-local-in-subprogram-and-lexical-block-scopes/68544
This patch moves the emission of global variables from
`DwarfDebug::beginModule()` to `DwarfDebug::endModule()`.
It has the following effects:
1. The order of debug entities in the resulting DWARF changes.
2. Currently, if a DISubprogram requires emission of both concrete
out-of-line and inlined subprogram DIEs, and such a subprogram contains
a static local variable, the DIE for the variable is emitted into the
concrete out-of-line subprogram DIE. As a result, the variable is not
available in debugger when breaking at the inlined function instance.
It happens because static locals are emitted in
`DwarfDebug::beginModule()`, but abstract DIEs for functions that are
not completely inlined away are created only later during
`DwarfDebug::endFunctionImpl()` calls.
With this patch, DIEs for static local variables of subprograms that
have both inlined and the concrete out-of-line instances are placed into
abstract subprogram DIEs. They become visible in debugger when breaking
at concrete out-of-line and inlined function instances.
`llvm/test/DebugInfo/Generic/inlined-static-var.ll` illustrates that.
3. It will allow to simplify abstract subprogram DIEs creation by
reverting https://github.com/llvm/llvm-project/pull/159104 later.
This is needed to simplify DWARF emission in a context of proper support
of function-local static variables which comes in the next patch
(https://reviews.llvm.org/D144008), making all function-local entities
handled in `DwarfDebug::endModuleImpl()`.
Authored-by: Kristina Bessonova <kbessonova at accesssoftek.com>
Co-authored-by: David Blaikie <dblaikie at gmail.com>
Co-authored-by: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Commit: 56ed7485b75e66ee47eae08ecc3b3cb705b2a4e9
https://github.com/llvm/llvm-project/commit/56ed7485b75e66ee47eae08ecc3b3cb705b2a4e9
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
Log Message:
-----------
[CIR][NFC] Remove unnecessary call to clangCmpToCIRCmp (#184217)
Remove unnecessary call to clangCmpToCIRCmp and use the result from the
previous call L1165
Commit: 149e62c29bf86b045ec8a9941c68ed2f13099b92
https://github.com/llvm/llvm-project/commit/149e62c29bf86b045ec8a9941c68ed2f13099b92
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang-tools-extra/test/clang-doc/namespace.cpp
Log Message:
-----------
[clang-doc] Add DAG directive to MD "All files" test (#184671)
It seems like the order of the all-files.md output might be different on
local machines, so make the check directives `-DAG` for now.
Commit: bb78a0a47083b55147176e878a2363a41c0cd3cc
https://github.com/llvm/llvm-project/commit/bb78a0a47083b55147176e878a2363a41c0cd3cc
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/test/CIR/CodeGen/var-arg-aggregate.c
M clang/test/CIR/CodeGen/var_arg.c
Log Message:
-----------
[CIR] Fix __builtin_va_start handling (#184654)
We were attempting to capture a `count` argument for __builtin_va_start
but the builtin doesn't actually have that as a defined argument. This
change removes the errant handling.
Commit: ade43a54d4419b60eda48cb0ebe84df836893bf6
https://github.com/llvm/llvm-project/commit/ade43a54d4419b60eda48cb0ebe84df836893bf6
Author: Derek Schuff <dschuff at chromium.org>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/include/llvm/BinaryFormat/Wasm.h
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCCodeEmitter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
M llvm/lib/Target/WebAssembly/WebAssembly.td
M llvm/lib/Target/WebAssembly/WebAssemblyInstrAtomics.td
M llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h
M llvm/test/CodeGen/WebAssembly/atomic-fence.mir
A llvm/test/MC/WebAssembly/atomics-orderings-errors.s
A llvm/test/MC/WebAssembly/atomics-orderings.s
Log Message:
-----------
[WebAssembly] MC support for acquire-release atomics (#183656)
Initial support for acquire-release atomics, specified as part of
https://github.com/WebAssembly/shared-everything-threads
This adds an ordering operand to atomic loads, stores, RMWs,
wait/notify,
and fences. It currently defaults to 0 and ISel is not updated yet, so
atomics produced by the compiler will still always be seqcst.
Asm parsing and printing, binary emission and disassembly are all
updated. Binary emission will always use the old encoding because the
encoding is smaller, and to get backwards compatibility for free.
Commit: f986523c5937bd32e1d14a4af6ff5db95c69065c
https://github.com/llvm/llvm-project/commit/f986523c5937bd32e1d14a4af6ff5db95c69065c
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/test/CIR/CodeGen/complex.cpp
Log Message:
-----------
[CIR] Fix Codegen for Complex & Scalar comparisons (#184006)
Fix Codegen for emitting comparisons between Complex & Scalar
Commit: 28b840815c2285edb232ac0d6ca6f70af987f4c2
https://github.com/llvm/llvm-project/commit/28b840815c2285edb232ac0d6ca6f70af987f4c2
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/CodeGenHLSL/group_shared.hlsl
M clang/test/ParserHLSL/group_shared.hlsl
M clang/test/ParserHLSL/group_shared_202x.hlsl
M clang/test/SemaHLSL/Language/ImpCastAddrSpace.hlsl
Log Message:
-----------
[HLSL] groupshared variables should be implicitly extern and should not be initialized (#184459)
Makes groupshared variables have extern storage class which prevents
them from being initialized if no initializer is provided. If one is
provided as below:
```
groupshared uint A = 1;
```
A warning, which is an error by default, is produced that says the
initializer is ignored and the variable is NOT initialized.
Closes #183602
Commit: 5c08616df765da3b225880f7fed824040100ec6d
https://github.com/llvm/llvm-project/commit/5c08616df765da3b225880f7fed824040100ec6d
Author: Manuel Dun <manueldun at users.noreply.github.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/X86/known-pow2.ll
Log Message:
-----------
[DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (#182207)
This is my first pr specifically for llvm
Fixes #181657
Allows the isKnownToBeAPowerOfTwo function to handle BSWAP and
BITREVERSE dag operations.
Commit: 585928482419bb66686ced6931320f1abb72a167
https://github.com/llvm/llvm-project/commit/585928482419bb66686ced6931320f1abb72a167
Author: Teresa Johnson <tejohnson at google.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
M llvm/test/Transforms/PGOProfile/memprof-dump-matched-call-sites.ll
Log Message:
-----------
[MemProf] Add stack IDs to MemProfUse optimization remarks (#184670)
This makes the remarks more equivalent for analysis to what we emit to
stderr under -memprof-print-match-info.
Commit: 933e5368ba02ccb2c09eec1a7159bf3b647ee3ef
https://github.com/llvm/llvm-project/commit/933e5368ba02ccb2c09eec1a7159bf3b647ee3ef
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/test/DebugInfo/Generic/cross-cu-linkonce-distinct.ll
Log Message:
-----------
[DebugInfo] Don't specify target triple for cross-cu-linkonce-distinct.ll (#184685)
Fixes buildbot failures after #184219.
Target triple line was added to this test in https://reviews.llvm.org/D144007, but it's needless.
Commit: f26ff8d86fd8e0e6754e60e4363ee156e856b3f1
https://github.com/llvm/llvm-project/commit/f26ff8d86fd8e0e6754e60e4363ee156e856b3f1
Author: cmtice <cmtice at google.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
A lldb/test/API/linux/linker-symbols/Makefile
A lldb/test/API/linux/linker-symbols/TestLinkerSymbols.py
A lldb/test/API/linux/linker-symbols/linker.script
A lldb/test/API/linux/linker-symbols/main.cpp
Log Message:
-----------
[LLDB] Allow symbols added by linker scripts to be examined. (#184679)
Symbols added by linker scripts do not have debug information or types,
but they do have addresses. Sometimes users need to see the addresses of
these symbols. Currently these symbols end up being assigned
'eSymbolTypeInvalid', so any attempt to look at them fails. This fixes
that issue.
Commit: d8e86a5cc0d5f0775faf5fc039a0c27e16dbdd61
https://github.com/llvm/llvm-project/commit/d8e86a5cc0d5f0775faf5fc039a0c27e16dbdd61
Author: Roy Shi <royitaqi at users.noreply.github.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/docs/CommandGuide/dsymutil.rst
A llvm/test/tools/dsymutil/AArch64/allow-disallow.test
A llvm/test/tools/dsymutil/Inputs/allow-disallow/a.out.arm64
A llvm/test/tools/dsymutil/Inputs/allow-disallow/empty.yaml
A llvm/test/tools/dsymutil/Inputs/allow-disallow/one.yaml
A llvm/test/tools/dsymutil/Inputs/allow-disallow/two.yaml
A llvm/test/tools/dsymutil/Inputs/private/tmp/allow-disallow/1.o
A llvm/test/tools/dsymutil/Inputs/private/tmp/allow-disallow/2.o
A llvm/test/tools/dsymutil/Inputs/private/tmp/allow-disallow/3.o
M llvm/test/tools/dsymutil/cmdline.test
M llvm/tools/dsymutil/DebugMap.cpp
M llvm/tools/dsymutil/DebugMap.h
M llvm/tools/dsymutil/MachODebugMapParser.cpp
M llvm/tools/dsymutil/Options.td
M llvm/tools/dsymutil/dsymutil.cpp
M llvm/tools/dsymutil/dsymutil.h
Log Message:
-----------
[dsymutil] Add option to filter debug map objects by allow/disallow-list (#182083)
# Motivation
When using `dsymutil` to generate dSYM for large binaries, sometimes we
want to keep only some of the object files. This has the benefits of
reduced dSYM size and improved performance of LLDB and other tools which
consume the dSYM.
The current way to achieve this is to use YAML input (the `dsymutil -y`
option). However, it doesn't really solve the problem:
1. The whole debug map has to be parsed somewhere else first, before
filtered down to the wanted parts.
2. Said info is written then read by `dsymutil`. The I/O is redundant.
# Change
This patch propose a new way, by adding new options (`dsymutil --allow
<path>` and `--disallow <path>`), which will only process object files
that pass the allow/disallow list.
Important details:
* The input file is YAML. See test files for format.
* Currently, only object files are filtered. The design allows to extend
the filtering to other aspects of the debug map in the future (e.g.
functions).
* If `--oso-prepend-path` is specified, it applies to the entries in the
input file. I.e. Entries in the input file should exact match that of
N_OSO entries.
Commit: 90c6e6374b9555279d6c31016bd7f4a8ee1861b4
https://github.com/llvm/llvm-project/commit/90c6e6374b9555279d6c31016bd7f4a8ee1861b4
Author: Berkay Sahin <berkaysahindev at gmail.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/ElseAfterReturnCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/else-after-return.cpp
Log Message:
-----------
[clang-tidy] Fix readability-else-after-return for if statements appear in unbraced switch case labels (#181878)
Fixes #160033.
Commit: ec15263cb898c2055f003810848ba590b6e8b42b
https://github.com/llvm/llvm-project/commit/ec15263cb898c2055f003810848ba590b6e8b42b
Author: Sam Clegg <sbc at chromium.org>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
R lld/test/wasm/Inputs/weak-alias.ll
A lld/test/wasm/Inputs/weak-alias.s
R lld/test/wasm/weak-alias-overide.ll
A lld/test/wasm/weak-alias-overide.s
R lld/test/wasm/weak-alias.ll
A lld/test/wasm/weak-alias.s
Log Message:
-----------
[lld][WebAssembly] Convert weak-alias tests to assembly. NFC (#184667)
This actually both improves and simplifies the `Inputs/weak_alias`. With
the `.ll` version we ended up using memory and `__stack_pointer` and
locals, but LLVM ended up generated `call` rather than `call_indirect`
for the `call_alias_ptr` and `call_direct_ptr`. With the assembly tests
we can ensure the usage of `call_indirect` while avoiding all the other
stuff.
Commit: ca0d100e79ef8c5c0a000375ce7652368617ad58
https://github.com/llvm/llvm-project/commit/ca0d100e79ef8c5c0a000375ce7652368617ad58
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Use VPlan::getZero to improve code (NFC) (#184591)
Commit: 954e5e7aa2e23d315a13fc052807d6600b182341
https://github.com/llvm/llvm-project/commit/954e5e7aa2e23d315a13fc052807d6600b182341
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
A clang/test/CIR/CodeGen/replace-global.cpp
Log Message:
-----------
[CIR] Upstream global variable replacement (#184686)
This change upstreams the CIR implementation of global variable
replacement. When we get a call to get or create a global variable using
a type that does not match the previous type for a variable of the same
name, we need to replace the old definition with the new one. In classic
codegen that was as simple as replaceAllUses+eraseFromParent, but in CIR
because we have typed pointers, we need to visit the uses and update
them with bitcasts to reflect the new type.
Commit: 9d1b6214fc0c2ec9794f61a562ed27d914df412d
https://github.com/llvm/llvm-project/commit/9d1b6214fc0c2ec9794f61a562ed27d914df412d
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/MDGenerator.cpp
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/test/clang-doc/namespace.cpp
Log Message:
-----------
[clang-doc] Sort index and avoid non-determinism (#184675)
Consolidate logic to get sorted children from StringMap.
Using the new API makes it more natural to not miss cases
where we missed sorting the children directly.
This also allows us to remove -DAG checks from tests and have
deterministic ordering.
Commit: 271458331747c595881c3768ca7439bd2f3d572c
https://github.com/llvm/llvm-project/commit/271458331747c595881c3768ca7439bd2f3d572c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/split-vectorize-phi-user.ll
Log Message:
-----------
[SLP]Do not consider split vectorize nodes as vector phi nodes
Split vectorize nodes should not be considered as vector PHI nodes, when
trying to find the insertion point for the postpotned nodes.
Fixes #184585
Commit: 5a88dffc40d2ae422127deb75412b8f4dff20d8b
https://github.com/llvm/llvm-project/commit/5a88dffc40d2ae422127deb75412b8f4dff20d8b
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/AArch64/cpu-supports-target.c
M clang/test/CodeGen/AArch64/cpu-supports.c
M clang/test/CodeGen/AArch64/fmv-detection.c
M clang/test/CodeGen/AArch64/fmv-explicit-priority.c
M clang/test/CodeGen/AArch64/fmv-mix-explicit-implicit-default.c
M clang/test/CodeGen/AArch64/fmv-resolver-emission.c
M clang/test/CodeGen/AArch64/fmv-unreachable-version.c
M clang/test/CodeGen/AArch64/ls64.c
M clang/test/CodeGen/AArch64/mixed-target-attributes.c
M clang/test/CodeGen/AArch64/targetattr.c
M clang/test/CodeGen/LoongArch/targetattr-la32.c
M clang/test/CodeGen/LoongArch/targetattr-la64.c
M clang/test/CodeGen/RISCV/ntlh-intrinsics/riscv32-zihintntl.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vlenb.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-00.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-01.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-03b.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-04.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-05.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-06.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-07.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-08.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-08b.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-09.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-09b.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-11.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-12.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-13.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-14.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-15.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-16.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-17.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-17b.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-18.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-19.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-20.cpp
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-21.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-22.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-23.c
M clang/test/CodeGen/amdgpu-abi-version.c
M clang/test/CodeGen/amdgpu-address-spaces.cpp
M clang/test/CodeGen/arm-metadata.c
M clang/test/CodeGen/asm-goto2.c
M clang/test/CodeGen/attr-target-clones-aarch64.c
M clang/test/CodeGen/attr-target-clones-riscv.c
M clang/test/CodeGen/attr-target-version-riscv.c
M clang/test/CodeGen/catch-implicit-integer-sign-changes-incdec.c
M clang/test/CodeGen/linux-kernel-struct-union-initializer.c
M clang/test/CodeGen/linux-kernel-struct-union-initializer2.c
M clang/test/CodeGen/memcpy-inline-builtin.c
M clang/test/CodeGen/nvptx_attributes.c
M clang/test/CodeGen/ptrauth-module-flags.c
M clang/test/CodeGen/sanitize-metadata-ignorelist.c
M clang/test/CodeGen/sanitize-metadata-nosanitize.c
M clang/test/CodeGen/sanitize-type-globals.cpp
M clang/test/CodeGen/stack-protector-guard.c
M clang/test/CodeGen/ubsan-function-sugared.cpp
M clang/test/CodeGen/ubsan-function.cpp
M clang/test/CodeGen/wasm-fp16.c
M clang/test/CodeGen/wchar-size.c
M clang/test/CodeGenCUDA/convergent.cu
M clang/test/CodeGenCXX/attr-target-clones-aarch64.cpp
M clang/test/CodeGenCXX/attr-target-clones-riscv.cpp
M clang/test/CodeGenCXX/attr-target-version-riscv.cpp
M clang/test/CodeGenCXX/attr-target-version.cpp
M clang/test/CodeGenCXX/builtin-invoke.cpp
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M clang/test/CodeGenCXX/fmv-namespace.cpp
M clang/test/CodeGenCXX/pfp-memcpy.cpp
M clang/test/CodeGenHIP/default-attributes.hip
M clang/test/CodeGenHIP/hip_weak_alias.cpp
M clang/test/CodeGenHIP/sanitize-undefined-null.hip
M clang/test/CodeGenOpenCL/amdgpu-cluster-dims.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gws-insts.cl
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue-attributes.cl
M clang/test/CodeGenSYCL/function-attrs.cpp
M clang/test/DebugInfo/CXX/ms-novtable.cpp
M clang/test/OpenMP/amdgcn_target_global_constructor.cpp
M clang/test/OpenMP/amdgcn_weak_alias.c
M clang/test/OpenMP/amdgcn_weak_alias.cpp
M clang/test/OpenMP/irbuilder_safelen.cpp
M clang/test/OpenMP/irbuilder_safelen_order_concurrent.cpp
M clang/test/OpenMP/irbuilder_simd_aligned.cpp
M clang/test/OpenMP/irbuilder_simdlen.cpp
M clang/test/OpenMP/irbuilder_simdlen_safelen.cpp
M clang/test/OpenMP/nvptx_weak_alias.c
M clang/test/OpenMP/tile_codegen_tile_for.cpp
M clang/test/utils/update_cc_test_checks/Inputs/annotations.c.expected
M clang/test/utils/update_cc_test_checks/Inputs/generated-funcs.c.generated.all.expected
M clang/test/utils/update_cc_test_checks/Inputs/generated-funcs.c.generated.expected
M clang/test/utils/update_cc_test_checks/Inputs/generated-funcs.c.no-generated.all.expected
M clang/test/utils/update_cc_test_checks/Inputs/generated-funcs.c.no-generated.expected
M clang/test/utils/update_cc_test_checks/Inputs/resolve-tmp-conflict.cpp.expected
M clang/test/utils/update_cc_test_checks/check-globals.test
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/test/Transforms/InstCombine/wcslen-4.ll
M llvm/unittests/TargetParser/TripleTest.cpp
Log Message:
-----------
[Clang] Only define `wchar_size` module flag if non-standard (#184668)
Summary:
This PR simply changes the behavior of the `wchar_size` flag. Currently,
we emit this in all cases for all targets. This causes problems during
LLVM-IR linking, specifically because this would vary between Linux and
Windows in unintuitive ways. Now we have an llvm::Triple helper to
determine the size from the known values. The module flag will only be
emitted if these do not match (indicating a non-standard environment).
In addition to fixing AMDGCN bitcode linking, this also means we don't
need to bloat *every* IR module compiled by clang with this flag. The
changed tests reflects this, one less unnecessary piece of metadata.
Commit: 2be726dd8e22a328ea664c8e624eb541b173605c
https://github.com/llvm/llvm-project/commit/2be726dd8e22a328ea664c8e624eb541b173605c
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/test/DebugInfo/Generic/dwarf5-debug-info-static-member.ll
Log Message:
-----------
[DebugInfo] Don't match wrong NULL in CHECK lines of dwarf5-debug-info-static-member.ll (#184694)
Fixes failure on clang-ppc64le-rhel buildbot
(https://lab.llvm.org/buildbot/#/builders/145/builds/13080) after
#184219.
On ppc64le, children are not produced for DW_TAG_subprogram "main" in
this test. Therefore, dwarfdump doesn't print NULL after this tag. On
other platforms (AArch64/X86), DW_TAG_subprogram has DW_TAG_variable
"instance_C", which should not be matched by the check lines.
Loosened the check lines (turned CHECK-NEXT into CHECK) to make them
work for all mentioned platforms.
Commit: cd6228983142ef5bf8bf7b5ca45ada749ff91cb0
https://github.com/llvm/llvm-project/commit/cd6228983142ef5bf8bf7b5ca45ada749ff91cb0
Author: Weiwen He <60433849+he-weiwen at users.noreply.github.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/X86/known-never-zero.ll
Log Message:
-----------
[DAG] isKnownNeverZero - add ISD::ADD/SUB DemandedElts handling and tests (#183958)
Closes #183043
Commit: 3a16cbe787885511d75d97f5da6af90858a8c184
https://github.com/llvm/llvm-project/commit/3a16cbe787885511d75d97f5da6af90858a8c184
Author: cmtice <cmtice at google.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M lldb/test/API/linux/linker-symbols/TestLinkerSymbols.py
Log Message:
-----------
[LLDB] Skip linker symbols test on Windows and MacOS. (#184690)
The test was only intended to run on linux.
Currently it's failing on the lldb-x86_64-win builder:
https://lab.llvm.org/buildbot/#/builders/211/builds/6741
Commit: f4a20a00d72901153100064da2bdbf134778d001
https://github.com/llvm/llvm-project/commit/f4a20a00d72901153100064da2bdbf134778d001
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang/test/CIR/CodeGen/complex-compound-assignment.cpp
M clang/test/CIR/CodeGen/complex-mul-div.cpp
M clang/test/CIR/CodeGen/optsize-func-attr.cpp
Log Message:
-----------
[CIR][NFCI] Fixup some test regressions due to OGCG changes (#184699)
Discovered during CI in a different patch, 3 tests started failing for
unknown reasons due to some very mild changes to the IR, but only in
'classic' codgen parts of the tests. These tests were overly specific
for no good reason, so this patch just fixes that.
Commit: 521c2e14957a20bd0f13595cd4262443d841a3a4
https://github.com/llvm/llvm-project/commit/521c2e14957a20bd0f13595cd4262443d841a3a4
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M lldb/unittests/Host/SocketTest.cpp
M lldb/unittests/Interpreter/TestCompletion.cpp
M llvm/include/llvm/Support/FileSystem.h
M llvm/lib/Support/Path.cpp
M llvm/unittests/ExecutionEngine/Orc/LibraryResolverTest.cpp
M llvm/unittests/Support/Path.cpp
M llvm/unittests/Support/raw_socket_stream_test.cpp
Log Message:
-----------
[llvm][Support] Make createUniquePath require at least one wildcard marker (#184688)
The API was a bit easy to accidentally mis-use, as it silently accepted
Model strings without any randomness marker characters (`%`), which
results in a unique path that's not at all unique. To avoid this
foot-gun, we now assert that the model contains at least one, and update
all the broken usages accordingly.
rdar://170349565
Commit: 8c2d6cbc663962f3314b122dc511e0c1ff5e065e
https://github.com/llvm/llvm-project/commit/8c2d6cbc663962f3314b122dc511e0c1ff5e065e
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
M lldb/source/Plugins/Process/Utility/RegisterInfos_arm64_sve.h
Log Message:
-----------
[lldb] Fix the AArch64 CPSR reg defn to list generic reg
My change to remove an incorrect DWARF register number for
CPSR unintentionally dropped the LLDB_REGNUM_GENERIC_FLAGS
generic reg type in the definitions of cpsr.
We need to have a macro (DEFINE_MISC_REGS) for status/control
registers that have no DWARF/eh_frame and no generic reg num.
I added a new macro, DEFINE_GPR_CPSR, for cpsr which is unique
in having no DWARF/eh_frame numbers but does have a generic
flags reg number.
Commit: cee0703cea3bb5cbf8ce9588de854f8b5417d9cc
https://github.com/llvm/llvm-project/commit/cee0703cea3bb5cbf8ce9588de854f8b5417d9cc
Author: John Harrison <harjohn at google.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
R lldb/test/API/python_api/block/TestBlocks.py
A lldb/test/API/python_api/block/TestFrameBlocks.py
M lldb/test/API/python_api/block/fn.c
M lldb/test/API/python_api/block/main.c
Log Message:
-----------
[lldb] Fixing the python_api/block tests. (#184647)
Renaming the file to be unique and updating the symbols for Windows.
Commit: 537f3d3a7588d226b86590f97c4401107585e1ce
https://github.com/llvm/llvm-project/commit/537f3d3a7588d226b86590f97c4401107585e1ce
Author: Jakob Koschel <jakobkoschel at google.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SafeStack.cpp
A llvm/test/CodeGen/AArch64/safestack_scalar.ll
Log Message:
-----------
[SafeStack] Fix crashing with scalable TypeSizes (#180547)
On e.g. aarch64 the TypeSize of scalar types can have a size that is not
known at compile time.
Currently when safestack occurs those it simply crashes as described in
https://github.com/llvm/llvm-project/issues/175868.
Since we cannot verify the size at compile time we simply consider the
access to be unsafe (in regards to safestack).
Reproducer:
```
#include <arm_sve.h>
int main() {
svint32_t vec = svindex_s32(0, 1);
svint32_t res = svadd_s32_z(svptrue_b32(), vec, vec);
int32_t buffer[1024];
svst1_s32(svptrue_b32(), buffer, res);
return 0;
}
```
Commit: 18b648c9f8cfc62c5560565abd702ee1460adccd
https://github.com/llvm/llvm-project/commit/18b648c9f8cfc62c5560565abd702ee1460adccd
Author: Wenju He <wenju.he at intel.com>
Date: 2026-03-05 (Thu, 05 Mar 2026)
Changed paths:
M libclc/CMakeLists.txt
M libclc/clc/lib/generic/async/clc_prefetch.inc
M libclc/clc/lib/generic/math/clc_cosh.inc
M libclc/clc/lib/generic/math/clc_erfc.cl
M libclc/clc/lib/generic/math/clc_expm1.inc
M libclc/clc/lib/generic/math/clc_fmod.cl
M libclc/clc/lib/generic/math/clc_sincos_helpers_fp64.inc
M libclc/clc/lib/generic/workitem/clc_get_sub_group_id.cl
M libclc/clc/lib/ptx-nvidiacl/mem_fence/clc_mem_fence.cl
M libclc/clc/lib/ptx-nvidiacl/synchronization/clc_work_group_barrier.cl
M libclc/opencl/lib/generic/async/wait_group_events.cl
Log Message:
-----------
[libclc][NFC] Add -Wall -Wextra to build flags and fix build warnings (#184549)
Co-authored-by: Copilot <175728472+Copilot at users.noreply.github.com>
Commit: 576c244dc91421a6ac96c14f9bc4cc0975009433
https://github.com/llvm/llvm-project/commit/576c244dc91421a6ac96c14f9bc4cc0975009433
Author: jimingham <jingham at apple.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
A lldb/test/API/functionalities/breakpoint/breakpoint_conditions/crashing_condition/Makefile
A lldb/test/API/functionalities/breakpoint/breakpoint_conditions/crashing_condition/TestCrashingCondition.py
A lldb/test/API/functionalities/breakpoint/breakpoint_conditions/crashing_condition/main.c
Log Message:
-----------
Add a test for handling a crashing breakpoint condition (#184247)
I was working on something and broke the handling of breakpoint
conditions that crash. In fixing that I noticed that there wasn't a test
for this scenario, so this PR adds one.
---------
Co-authored-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: bfe349ccf4b4c8694824dafedb8c9ef78bf80725
https://github.com/llvm/llvm-project/commit/bfe349ccf4b4c8694824dafedb8c9ef78bf80725
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
M llvm/test/CodeGen/AMDGPU/vgpr-setreg-mode-swar.mir
Log Message:
-----------
[AMDGPU] Optimize S_SETREG_IMM32_B32 piggybacking by treating it as a mode scope boundary (#184703)
When `handleSetregMode` encounters an `S_SETREG_IMM32_B32` with `Size <=
12`, the instruction's `imm32[12:19]` bits are "free" for VGPR MSB
piggybacking. Previously, the old mode was eagerly written into these
bits, but the `Rewritten` guard in `setMode` would then block subsequent
piggybacking when the next VGPR instruction needed a different mode,
causing an unnecessary `S_SET_VGPR_MSB` to be emitted.
Model the `S_SETREG_IMM32_B32` as the boundary of the old mode's control
range: reset `CurrentMode` and clear `bits[12:19]` to zero. This lets
the next `setMode` call freely piggyback the required mode without
triggering `Rewritten`.
Commit: 442757579ee4999de8d6f05513de07022f918037
https://github.com/llvm/llvm-project/commit/442757579ee4999de8d6f05513de07022f918037
Author: Emmanuel Antonio <emmanuelac at google.com>
Date: 2026-03-05 (Thu, 05 Mar 2026)
Changed paths:
M llvm/tools/dsymutil/DebugMap.h
Log Message:
-----------
[dsymutil] Add DebugMapObjectFilter destructor (#184701)
Fixes #182083.
Commit: 6b7a3b311a8675f4b82e22d8420e24c7f1612fdc
https://github.com/llvm/llvm-project/commit/6b7a3b311a8675f4b82e22d8420e24c7f1612fdc
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang-tools-extra/clang-tidy/performance/FasterStringFindCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/faster-string-find.rst
M clang-tools-extra/test/clang-tidy/checkers/performance/faster-string-find.cpp
Log Message:
-----------
[clang-tidy] Teach `performance-faster-string-find` about `operator+=` (#182697)
This is a followup to #182633. Like in that PR, `operator+=` doesn't fit
with the check name, but the same optimization is applicable to it:
https://en.cppreference.com/w/cpp/string/basic_string/operator+=.html
Commit: 61d8e5ca791f55753d5aebbd6175dc8c5d6b54ef
https://github.com/llvm/llvm-project/commit/61d8e5ca791f55753d5aebbd6175dc8c5d6b54ef
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-05 (Thu, 05 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
M mlir/test/Dialect/Affine/SuperVectorize/vector_utils.mlir
Log Message:
-----------
[MLIR][Vector] Fix crash in operatesOnSuperVectorsOf on rank-mismatched shaped (#183967)
The `operatesOnSuperVectorsOf` function in VectorUtils.cpp contained an
assertion that fired when a `vector.transfer` operation's vector type
had a different rank (or non-divisible shape) from the sub-vector type
supplied by the caller:
assert((ratio || \!mustDivide) &&
"vector.transfer operation in which super-vector size is not an"
" integer multiple of sub-vector size");
This assertion was incorrect because the function's callers (e.g., the
affine super-vectorizer) legitimately pass transfer ops whose vector
type doesn't match the requested sub-vector shape. In those cases the
correct answer is simply that the op does not operate on a super-vector
of that sub-vector type, so `operatesOnSuperVectorsOf` should return
`false`.
Remove the assert return `false` when `computeShapeRatio` produces no
result, and remove the now-unused `mustDivide` variable.
Fixes #149327
Fixes #131096
Commit: d07ab183b6695a6262c251d24bb86d4b977aff3d
https://github.com/llvm/llvm-project/commit/d07ab183b6695a6262c251d24bb86d4b977aff3d
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-05 (Thu, 05 Mar 2026)
Changed paths:
M mlir/lib/IR/Verifier.cpp
M mlir/unittests/IR/CMakeLists.txt
A mlir/unittests/IR/VerifierTest.cpp
Log Message:
-----------
[mlir] Add cross-context checks to the IR verifier (#184627)
Detect IR where result types, operand types, or discardable attribute
values come from a different MLIRContext than the operation itself.
Mixing contexts is a latent use-after-free hazard when one context is
destroyed before the other; the verifier now reports a clear error
instead of silently allowing the invalid IR through.
Three new unit tests in MLIRIRTests cover each scenario.
Fix #61569
Commit: c32caeec8158d634bb71ab8911a6031248b9fc47
https://github.com/llvm/llvm-project/commit/c32caeec8158d634bb71ab8911a6031248b9fc47
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-05 (Thu, 05 Mar 2026)
Changed paths:
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
M mlir/test/Conversion/ConvertToSPIRV/func-signature-vector-unroll.mlir
Log Message:
-----------
[mlir][spirv] Fix crash in FuncOpVectorUnroll for dynamic-shaped tensor args (#184626)
FuncOpVectorUnroll::matchAndRewrite iterates over all function arguments
and creates a zero-constant placeholder for any non-vector argument via
rewriter.getZeroAttr(type). For dynamically-shaped tensor types such as
tensor<?x2xi8>, getZeroAttr ultimately calls
DenseIntOrFPElementsAttr::getRaw which asserts that the type has a
static shape.
Add an early pre-check that returns failure() for any non-vector
argument with a dynamically-shaped type. This must be done before any IR
modifications are made, since returning failure() after inlining the
function body would leave the IR in an inconsistent state.
Fixes #148369
Commit: 90ba731c496b9ccf7fd3954756f5d096add3d0b5
https://github.com/llvm/llvm-project/commit/90ba731c496b9ccf7fd3954756f5d096add3d0b5
Author: Twice <twice at apache.org>
Date: 2026-03-05 (Thu, 05 Mar 2026)
Changed paths:
M mlir/python/mlir/dialects/ext.py
Log Message:
-----------
[MLIR][Python] Add `replace` parameter to `Dialect.load` (#184604)
In this PR, `replace` keyword parameter is added to `Dialect.load(..)`
in `mlir.dialects.ext`. It's to replace existing registered
operations/types/attrs.
Commit: f0142833b6a542618a19ec9f9836b51c051945cf
https://github.com/llvm/llvm-project/commit/f0142833b6a542618a19ec9f9836b51c051945cf
Author: Twice <twice at apache.org>
Date: 2026-03-05 (Thu, 05 Mar 2026)
Changed paths:
M mlir/lib/Bindings/Python/Rewrite.cpp
Log Message:
-----------
[MLIR][Python] Move operation/dialect name retrieving as a util function (#184605)
We have a common pattern that retrieve an operation name or dialect name
from a `type` or `str` in the rewrite nanobind module, so better to make
it a common util function.
---------
Co-authored-by: Rolf Morel <rolfmorel at gmail.com>
Commit: 82a9948ea45388e78008152748903c619b2a0400
https://github.com/llvm/llvm-project/commit/82a9948ea45388e78008152748903c619b2a0400
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M flang-rt/lib/runtime/execute.cpp
M flang-rt/unittests/Runtime/CommandTest.cpp
Log Message:
-----------
[flang-rt] Fixes EXECUTE_COMMAND_LINE() status management and double buffering (#184285)
EXECUTE_COMMAND_LINE() without CMDSTAT initiated termination in runtime
if the command returned non-zero status code. For example,
EXECUTE_COMMAND_LINE('false') on Linux would cause "fatal Fortran
runtime error... : Command line execution failed with exit code: 1."
This is too strict: EXECUTE_COMMAND_LINE() successfully called 'false',
it's just 'false' happened to return non-zero status code. ifx and
gfortran don't initiate termination in such case. Changed
EXECUTE_COMMAND_LINE() implementation to behave in similar fashion.
Also during testing discovered that when the output of the program that
uses EXECUTE_COMMAND_LINE(... WAIT=.false.) is piped to a file, the
resulting file has duplicated output lines. This was because fork()
command also ends up duplicating parent's buffered output to the child.
Added flush of all units and C stdio before calling fork().
Commit: bbe4853a7b026becdff040933011129549e4484a
https://github.com/llvm/llvm-project/commit/bbe4853a7b026becdff040933011129549e4484a
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-03-05 (Thu, 05 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
Log Message:
-----------
[RISCV] Add findCommutedOpIndices support for Zvabd
Reviewers: preames, topperc, mgudim, lukel97, mshockwave
Pull Request: https://github.com/llvm/llvm-project/pull/184602
Commit: 30086bc246ebf3402856805977ace06951a0f1f8
https://github.com/llvm/llvm-project/commit/30086bc246ebf3402856805977ace06951a0f1f8
Author: Luke Lau <luke at igalia.com>
Date: 2026-03-05 (Thu, 05 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector-shuffle.ll
R llvm/test/CodeGen/RISCV/rvv/reduce-vl-peephole.ll
R llvm/test/CodeGen/RISCV/rvv/reduce-vl-peephole.mir
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-to-vmv.mir
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.mir
Log Message:
-----------
[RISCV] Remove RISCVVectorPeephole::tryToReduceVL (#184297)
Now that RISCVVLOptimizer has been extended to handle the remaining
cases tryToReduceVL handles, we can remove tryToReduceVL to keep all the
reduction logic in one place.
Intended to be NFC but it looks like in
test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector-shuffle.ll we were
previously reducing the vl of a volatile load in
insert_subvector_dag_loop, which RISCVVLOptimizer knows to avoid.
On llvm-test-suite and SPEC CPU 2017 -march=rva23u64 -O3 there are no
changes with this patch.
Commit: 7418d1b1460112c4bd72484d0413675096283da0
https://github.com/llvm/llvm-project/commit/7418d1b1460112c4bd72484d0413675096283da0
Author: quic-k <kushpal at qti.qualcomm.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Driver/ToolChain.h
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChain.cpp
Log Message:
-----------
[Clang] Add clang flag --cstdlib (#183254)
Introduce clang flag --cstdlib based on RFC:
https://discourse.llvm.org/t/rfc-add-command-line-option-for-selecting-c-library/87335
This flag accepts a string i.e. the name of the C library that user
wants to use.
Toolchain drivers can handle this flag as per need or ignore it.
Commit: f49871efdca69caca9b72544fd3a578cf0a2b92f
https://github.com/llvm/llvm-project/commit/f49871efdca69caca9b72544fd3a578cf0a2b92f
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2026-03-05 (Thu, 05 Mar 2026)
Changed paths:
M libc/src/__support/math/CMakeLists.txt
Log Message:
-----------
[libc][math][NFC] Fix dependency for acospif (#184738)
Commit: 22bf237e74b70bf418af0db6df8514f907db36a9
https://github.com/llvm/llvm-project/commit/22bf237e74b70bf418af0db6df8514f907db36a9
Author: John Otken <john at otken.com>
Date: 2026-03-05 (Thu, 05 Mar 2026)
Changed paths:
M flang-rt/lib/runtime/edit-input.cpp
Log Message:
-----------
[flang-rt] Handle NAMELIST logical comments without preceding space (#183202)
If a comment appears immediately after a logical value in a NAMELIST
file, the flang runtime returns IostatGenericError. No error occurs when
a space preceeds the exclamation point. Add code to handle a comment
while parsing logical values.
Co-authored-by: John Otken john.otken at hpe.com
Commit: 7bb3139304fc2c6497639bbb87651ff32f22707f
https://github.com/llvm/llvm-project/commit/7bb3139304fc2c6497639bbb87651ff32f22707f
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang-tools-extra/test/clang-tidy/checkers/abseil/cleanup-ctad.cpp
M clang-tools-extra/test/clang-tidy/checkers/boost/use-ranges-pipe.cpp
M clang-tools-extra/test/clang-tidy/checkers/boost/use-ranges.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/assignment-in-if-condition-cxx20.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/bitwise-pointer-cast-cxx20.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/branch-clone-fallthrough.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/branch-clone-if-constexpr-template.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/default-operator-new-on-overaligned-type-cpp17.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/default-operator-new-on-overaligned-type.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/exception-escape-consteval.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/fold-init-type.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/incorrect-enable-if.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/multiple-new-in-one-expression.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/narrowing-conversions-bitfields.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/nondeterministic-pointer-iteration-order.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/not-null-terminated-result-memcpy-safe-cxx.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/not-null-terminated-result-memcpy-safe-other.c
M clang-tools-extra/test/clang-tidy/checkers/bugprone/not-null-terminated-result-value-dependent-crash.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/not-null-terminated-result-wmemcpy-safe-cxx.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/signal-handler.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/stringview-nullptr.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/suspicious-memory-comparison.c
M clang-tools-extra/test/clang-tidy/checkers/bugprone/suspicious-string-compare.c
M clang-tools-extra/test/clang-tidy/checkers/bugprone/unhandled-exception-at-new.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/use-after-move.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/avoid-reference-coroutine-parameters.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/missing-std-forward-custom-function.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/no-suspend-with-lock.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/rvalue-reference-param-not-moved-custom-function.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/rvalue-reference-param-not-moved.cpp
M clang-tools-extra/test/clang-tidy/checkers/google/readability-namespace-comments-missing-nested-namespaces.cpp
M clang-tools-extra/test/clang-tidy/checkers/hicpp/signed-bitwise-integer-literals.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/coroutine-hostile-raii.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/misplaced-const-cxx17.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/static-assert.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/unconventional-assign-operator-cxx23.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-consteval.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-module.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/avoid-c-arrays-c++20.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/concat-nested-namespaces.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/loop-convert-reverse.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/loop-convert-rewritten-binop.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/make-unique-inaccessible-ctors.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/type-traits-GH153649.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-constraints-first-greatergreater.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-designated-initializers.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-nullptr-cxx20.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-ranges-pipe.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-ranges.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-starts-ends-with.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-format-custom.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-numbers.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-print-absl.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-print-custom.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/noexcept-move-constructor.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/braces-around-statements-consteval-if.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/braces-around-statements-constexpr-if-templates.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/container-size-empty-cxx20.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/else-after-return-if-consteval.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/else-after-return-if-constexpr.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/else-after-return.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/function-cognitive-complexity.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/function-size-variables-c++17.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming-anon-record-fields.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming-case-match.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming-outofline.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/implicit-bool-conversion-cxx20.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/redundant-casting.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/redundant-inline-specifier.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/simplify-boolean-expr-cxx23.cpp
Log Message:
-----------
[clang-tidy][NFC] Run tests in multiple language modes where possible (#184741)
Commit: a2407f6d4c5012c0a0375fb097f96cf726833883
https://github.com/llvm/llvm-project/commit/a2407f6d4c5012c0a0375fb097f96cf726833883
Author: Aleksandr Platonov <platonov.aleksandr at huawei.com>
Date: 2026-03-05 (Thu, 05 Mar 2026)
Changed paths:
M clang-tools-extra/clangd/index/Ref.cpp
M clang-tools-extra/clangd/index/Ref.h
Log Message:
-----------
[clangd][NFC] Add RefKind::Call into RefKind::All and insertion operator (#184677)
Without this patch:
- RefKind output doesn't show RefKind::Call bit.
- RefKind::Call isn't included in RefKind::All.
I don't think these changes require additional tests, as the problems
above mainly appear during testing/debugging (e.g. if in tests
comparison of two RefKinds fails, `Call` isn't shown in the output even
if this bit is set).
Commit: 50826f9c3b9c31bcc77846ba00ef106d0e0abc83
https://github.com/llvm/llvm-project/commit/50826f9c3b9c31bcc77846ba00ef106d0e0abc83
Author: Abhishek Varma <avarma094 at gmail.com>
Date: 2026-03-05 (Thu, 05 Mar 2026)
Changed paths:
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/test/Dialect/MemRef/canonicalize.mlir
M mlir/test/Dialect/MemRef/fold-memref-alias-ops.mlir
Log Message:
-----------
[mlir][MemRef] Add position-based matching heuristics for rank-reduction with dynamic strides (#184334)
When multiple source dimensions have multiple unit dimensions,
stride-based disambiguation can be wrong with dynamic strides. Add
position-based matching: for each result dimension in order, pick the
leftmost unmatched source dimension with the same size; unmatched source
dims are dropped.
Example: subview from memref<1x8x1x3> to memref<1x8x3>. Both dim 0 and
dim 2 have size 1. Stride-based logic cannot distinguish when strides
are dynamic. Position-based matching correctly drops dim 2 (middle unit
dim) instead of dim 0.
When we have non-trivial static strides, we make use of the stride-based
logic, else we fall back to position-based logic as introduced by this
patch.
INPUT :-
```
func.func @fold_rank_reducing_subview_1x8x1x3_to_1x8x3_drop_middle_unit_dim(
%arg0 : memref<?x?x?x?xf32, strided<[?, ?, ?, ?], offset: ?>>,
%arg1 : index, %arg2 : index, %arg3 : index, %arg4 : index) -> f32 {
%c0 = arith.constant 0 : index
%0 = memref.subview %arg0[0, 0, 0, 0][1, 8, 1, 3][1, 1, 1, 1]
: memref<?x?x?x?xf32, strided<[?, ?, ?, ?], offset: ?>> to
memref<1x8x3xf32, strided<[?, ?, ?], offset: ?>>
%1 = memref.load %0[%c0, %arg1, %arg2] : memref<1x8x3xf32, strided<[?, ?, ?], offset: ?>>
return %1 : f32
}
```
WITHOUT this patch we get :-
```
memref.load %0[%c0, %c0, %arg1, %arg2]
```
WITH this patch we get :-
```
memref.load %0[%c0, %arg1, %c0, %arg2]
```
Signed-off-by: Abhishek Varma <abhvarma at amd.com>
Commit: b414d7795d2965ffaa9457a7e56dca76fd07cce1
https://github.com/llvm/llvm-project/commit/b414d7795d2965ffaa9457a7e56dca76fd07cce1
Author: Kirill Vedernikov <kvedernikov at nvidia.com>
Date: 2026-03-05 (Thu, 05 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-block-scale-shared.mlir
M mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-block-scale-tensor.mlir
M mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-invalid.mlir
M mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-block-scale-shared.mlir
M mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-block-scale-tensor.mlir
Log Message:
-----------
[MLIR][NVVM] Unify and move to a single tcgen05_mma_kind attr for all tcgen05.mma Ops (#184433)
This change unifies using of `tcgen05_mma_kind` attribute for
tcgen05.mma Ops in MLIR.
Before this change there were two block scale attributes used for
tcgen05.mma Ops. One was `MMABlockScaleKindAttr` with `mxf8f6f4`, `mxf4`
and `fxf4nvf4` values used for `tcgen05.mma.block_scale` and
`tcgen05.mma.sp.block_scale`. Another one was `Tcgen05MMAKindAttr` with
`f16`, `tf32`, `f8f6f4` and `i8` values used for `tcgen05.mma`,
`tcgen05.mma.sp`, `tcgen05.mma.ws` and `tcgen05.mma.ws.sp`.
`Tcgen05MMAKindAttr` has been extended with values from
`MMABlockScaleKindAttr`. Now there is `tcgen05_mma_kind` attribute only
for all `tcgen05.mma` Ops in MLIR.
Backward compatibility is not supported. Existing tests and scripts
should be updated to use `tcgen05_mma_kind` attribute instead of
`block_scale_kind` for all tcgen05.mma MLIR Ops.
Commit: d998a70c86389a1b9c44413270897c0cb8472374
https://github.com/llvm/llvm-project/commit/d998a70c86389a1b9c44413270897c0cb8472374
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-05 (Thu, 05 Mar 2026)
Changed paths:
M libclc/CMakeLists.txt
Log Message:
-----------
libclc: Fix checking for arch including OS in wrong place (#184683)
Commit: d5378dafa2af38164c2577a36c7a6c6aa0249d9f
https://github.com/llvm/llvm-project/commit/d5378dafa2af38164c2577a36c7a6c6aa0249d9f
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-03-05 (Thu, 05 Mar 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZInstrVector.td
A llvm/test/CodeGen/SystemZ/fminimumnum-fmaximumnum.ll
Log Message:
-----------
[SystemZ] Mark fminimumnum/fmaximumnum as legal (#184595)
In M=4 mode, the behavior matches IEEE 754-2019 minimumNumber, except
that if both operands are sNaN, the result will be sNaN rather than
qNaN. However, this is explicitly allowed for LLVM's minimumnum
intrinsic, as canonicalization can be omitted for non-constrainted FP.
As such, mark fminimumnum/fmaximumnum as legal, and lower them the same
way as fminnum/fmaxnum. In the future, we may wish to switch those to
use M=0 instead, to match IEEE 754-2008 maxNum/minNum instead.
Commit: b0da64ea01d204f3c06d2592f4887b20439a5100
https://github.com/llvm/llvm-project/commit/b0da64ea01d204f3c06d2592f4887b20439a5100
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-03-05 (Thu, 05 Mar 2026)
Changed paths:
M .ci/monolithic-linux.sh
Log Message:
-----------
[CI] Enable LTO linker plugin tests (#184076)
We've recently had two instances of test failures for the LTO linker
plugin being introduced. Build and test the LTO linker plugin in
pre-merge CI to avoid this.
Commit: 825129378e0f1a6671de77aa8e221a4838fd8219
https://github.com/llvm/llvm-project/commit/825129378e0f1a6671de77aa8e221a4838fd8219
Author: Luke Lau <luke at igalia.com>
Date: 2026-03-05 (Thu, 05 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
A llvm/test/Transforms/LoopVectorize/VPlan/tail-folding.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-after-all.ll
Log Message:
-----------
[VPlan] Move tail folding out of VPlanPredicator. NFC (#176143)
Currently the logic for introducing a header mask and predicating the
vector loop region is done inside introduceMasksAndLinearize.
This splits the tail folding part out into an individual VPlan transform
so that VPlanPredicator.cpp doesn't need to worry about tail folding,
which seemed to be a temporary measure according to a comment in
VPlanTransforms.h.
To perform tail folding independently, this splits the "body" of the
vector loop region between the phis in the header and the branch + iv
increment in the latch:
Before:
```
+-------------------------------------------+
|%iv = ... |
|... |
|%iv.next = add %iv, vfxuf |
|branch-on-count %iv.next, vector-trip-count|
+-------------------------------------------+
```
After:
```
+-------------------------------------------+
|%iv = ... |
|%wide.iv = widen-canonical-iv ... |
|%header-mask = icmp ule %wide.iv, BTC |---+
|branch-on-cond %header-mask | |
+-------------------------------------------+ |
| |
v |
+-------------------------------------------+ |
|... | |
+-------------------------------------------+ |
| |
v |
+-------------------------------------------+ |
|%iv.next = add %iv, vfxuf |<--+
|branch-on-count %iv.next, vector-trip-count|
+-------------------------------------------+
```
Phis are then inserted in the latch for any value in the loop body that
have outside uses, with poison as their incoming value from the header
edge.
The motivation for this is to allow us to share the same "predicate all
successor blocks" type of predication we do for tail folding, but for
early-exit loops in #172454. This may also allow us to directly emit an
EVL based header mask, instead of having to match + transform the
existing header mask in addExplicitVectorLength.
This also allows us to eventually handle recurrences in the same
transform, avoiding the need to special case tail folding in
addReductionResultComputation.
Commit: 7691c0b7d16baaf0412ec7b7f0e739ef59cbd0ab
https://github.com/llvm/llvm-project/commit/7691c0b7d16baaf0412ec7b7f0e739ef59cbd0ab
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-03-05 (Thu, 05 Mar 2026)
Changed paths:
M .ci/monolithic-linux.sh
M .github/workflows/containers/github-action-ci/Dockerfile
M clang-tools-extra/clang-doc/CMakeLists.txt
M clang-tools-extra/clang-doc/Generators.cpp
M clang-tools-extra/clang-doc/Generators.h
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/MDGenerator.cpp
A clang-tools-extra/clang-doc/MDMustacheGenerator.cpp
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Representation.h
A clang-tools-extra/clang-doc/assets/md/all-files-template.mustache
A clang-tools-extra/clang-doc/assets/md/class-template.mustache
A clang-tools-extra/clang-doc/assets/md/comments-partial.mustache
A clang-tools-extra/clang-doc/assets/md/index-template.mustache
A clang-tools-extra/clang-doc/assets/md/namespace-template.mustache
M clang-tools-extra/clang-doc/support/Utils.cpp
M clang-tools-extra/clang-doc/support/Utils.h
M clang-tools-extra/clang-doc/tool/CMakeLists.txt
M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp
M clang-tools-extra/clang-tidy/performance/FasterStringFindCheck.cpp
M clang-tools-extra/clang-tidy/readability/ElseAfterReturnCheck.cpp
M clang-tools-extra/clangd/index/Ref.cpp
M clang-tools-extra/clangd/index/Ref.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/const-correctness.rst
M clang-tools-extra/docs/clang-tidy/checks/performance/faster-string-find.rst
M clang-tools-extra/test/clang-doc/basic-project.mustache.test
M clang-tools-extra/test/clang-doc/builtin_types.cpp
M clang-tools-extra/test/clang-doc/comments-in-macros.cpp
M clang-tools-extra/test/clang-doc/enum.cpp
M clang-tools-extra/test/clang-doc/index.cpp
M clang-tools-extra/test/clang-doc/json/class.cpp
M clang-tools-extra/test/clang-doc/json/namespace.cpp
M clang-tools-extra/test/clang-doc/namespace.cpp
M clang-tools-extra/test/clang-doc/templates.cpp
M clang-tools-extra/test/clang-tidy/checkers/abseil/cleanup-ctad.cpp
M clang-tools-extra/test/clang-tidy/checkers/boost/use-ranges-pipe.cpp
M clang-tools-extra/test/clang-tidy/checkers/boost/use-ranges.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/assignment-in-if-condition-cxx20.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/bitwise-pointer-cast-cxx20.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/branch-clone-fallthrough.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/branch-clone-if-constexpr-template.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/default-operator-new-on-overaligned-type-cpp17.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/default-operator-new-on-overaligned-type.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/exception-escape-consteval.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/fold-init-type.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/incorrect-enable-if.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/multiple-new-in-one-expression.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/narrowing-conversions-bitfields.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/nondeterministic-pointer-iteration-order.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/not-null-terminated-result-memcpy-safe-cxx.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/not-null-terminated-result-memcpy-safe-other.c
M clang-tools-extra/test/clang-tidy/checkers/bugprone/not-null-terminated-result-value-dependent-crash.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/not-null-terminated-result-wmemcpy-safe-cxx.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/signal-handler.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/stringview-nullptr.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/suspicious-memory-comparison.c
M clang-tools-extra/test/clang-tidy/checkers/bugprone/suspicious-string-compare.c
M clang-tools-extra/test/clang-tidy/checkers/bugprone/unhandled-exception-at-new.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/use-after-move.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/avoid-reference-coroutine-parameters.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/missing-std-forward-custom-function.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/no-suspend-with-lock.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/rvalue-reference-param-not-moved-custom-function.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/rvalue-reference-param-not-moved.cpp
M clang-tools-extra/test/clang-tidy/checkers/google/readability-namespace-comments-missing-nested-namespaces.cpp
M clang-tools-extra/test/clang-tidy/checkers/hicpp/signed-bitwise-integer-literals.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-parameters.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/coroutine-hostile-raii.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/misplaced-const-cxx17.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/static-assert.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/unconventional-assign-operator-cxx23.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-consteval.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-module.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/avoid-c-arrays-c++20.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/concat-nested-namespaces.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/loop-convert-reverse.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/loop-convert-rewritten-binop.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/make-unique-inaccessible-ctors.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/type-traits-GH153649.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-constraints-first-greatergreater.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-designated-initializers.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-nullptr-cxx20.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-ranges-pipe.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-ranges.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-starts-ends-with.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-format-custom.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-numbers.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-print-absl.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-print-custom.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/faster-string-find.cpp
M clang-tools-extra/test/clang-tidy/checkers/performance/noexcept-move-constructor.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/braces-around-statements-consteval-if.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/braces-around-statements-constexpr-if-templates.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/container-size-empty-cxx20.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/else-after-return-if-consteval.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/else-after-return-if-constexpr.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/else-after-return.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/function-cognitive-complexity.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/function-size-variables-c++17.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming-anon-record-fields.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming-case-match.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming-outofline.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/implicit-bool-conversion-cxx20.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/redundant-casting.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/redundant-inline-specifier.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/simplify-boolean-expr-cxx23.cpp
M clang-tools-extra/unittests/clang-doc/ClangDocTest.cpp
M clang-tools-extra/unittests/clang-doc/HTMLGeneratorTest.cpp
M clang-tools-extra/unittests/clang-doc/JSONGeneratorTest.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Analysis/Analyses/UnsafeBufferUsage.h
M clang/include/clang/Analysis/Analyses/UnsafeBufferUsageGadgets.def
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/Driver/ToolChain.h
M clang/include/clang/Options/Options.td
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AIX.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Headers/hvx_hexagon_protos.h
M clang/lib/Lex/Lexer.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/StaticAnalyzer/Checkers/VirtualCallChecker.cpp
A clang/test/Analysis/Inputs/virtualcall-system-header.h
M clang/test/Analysis/virtualcall.cpp
M clang/test/CIR/CodeGen/complex-compound-assignment.cpp
M clang/test/CIR/CodeGen/complex-mul-div.cpp
M clang/test/CIR/CodeGen/complex.cpp
M clang/test/CIR/CodeGen/optsize-func-attr.cpp
A clang/test/CIR/CodeGen/replace-global.cpp
M clang/test/CIR/CodeGen/var-arg-aggregate.c
M clang/test/CIR/CodeGen/var_arg.c
M clang/test/CodeGen/AArch64/cpu-supports-target.c
M clang/test/CodeGen/AArch64/cpu-supports.c
M clang/test/CodeGen/AArch64/fmv-detection.c
M clang/test/CodeGen/AArch64/fmv-explicit-priority.c
M clang/test/CodeGen/AArch64/fmv-mix-explicit-implicit-default.c
M clang/test/CodeGen/AArch64/fmv-resolver-emission.c
M clang/test/CodeGen/AArch64/fmv-unreachable-version.c
M clang/test/CodeGen/AArch64/ls64.c
M clang/test/CodeGen/AArch64/mixed-target-attributes.c
M clang/test/CodeGen/AArch64/targetattr.c
M clang/test/CodeGen/LoongArch/targetattr-la32.c
M clang/test/CodeGen/LoongArch/targetattr-la64.c
M clang/test/CodeGen/RISCV/ntlh-intrinsics/riscv32-zihintntl.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vlenb.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-00.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-01.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-03b.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-04.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-05.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-06.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-07.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-08.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-08b.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-09.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-09b.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-11.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-12.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-13.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-14.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-15.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-16.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-17.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-17b.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-18.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-19.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-20.cpp
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-21.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-22.c
M clang/test/CodeGen/SystemZ/vec-abi-gnuattr-23.c
M clang/test/CodeGen/amdgpu-abi-version.c
M clang/test/CodeGen/amdgpu-address-spaces.cpp
M clang/test/CodeGen/arm-metadata.c
M clang/test/CodeGen/asm-goto2.c
M clang/test/CodeGen/attr-target-clones-aarch64.c
M clang/test/CodeGen/attr-target-clones-riscv.c
M clang/test/CodeGen/attr-target-version-riscv.c
M clang/test/CodeGen/catch-implicit-integer-sign-changes-incdec.c
M clang/test/CodeGen/linux-kernel-struct-union-initializer.c
M clang/test/CodeGen/linux-kernel-struct-union-initializer2.c
M clang/test/CodeGen/memcpy-inline-builtin.c
M clang/test/CodeGen/nvptx_attributes.c
M clang/test/CodeGen/ptrauth-module-flags.c
M clang/test/CodeGen/sanitize-metadata-ignorelist.c
M clang/test/CodeGen/sanitize-metadata-nosanitize.c
M clang/test/CodeGen/sanitize-type-globals.cpp
M clang/test/CodeGen/stack-protector-guard.c
M clang/test/CodeGen/ubsan-function-sugared.cpp
M clang/test/CodeGen/ubsan-function.cpp
M clang/test/CodeGen/wasm-fp16.c
M clang/test/CodeGen/wchar-size.c
M clang/test/CodeGenCUDA/convergent.cu
M clang/test/CodeGenCXX/attr-target-clones-aarch64.cpp
M clang/test/CodeGenCXX/attr-target-clones-riscv.cpp
M clang/test/CodeGenCXX/attr-target-version-riscv.cpp
M clang/test/CodeGenCXX/attr-target-version.cpp
M clang/test/CodeGenCXX/builtin-invoke.cpp
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M clang/test/CodeGenCXX/fmv-namespace.cpp
M clang/test/CodeGenCXX/pfp-memcpy.cpp
M clang/test/CodeGenHIP/default-attributes.hip
M clang/test/CodeGenHIP/hip_weak_alias.cpp
M clang/test/CodeGenHIP/sanitize-undefined-null.hip
A clang/test/CodeGenHLSL/builtins/WaveActiveAllEqual.hlsl
M clang/test/CodeGenHLSL/group_shared.hlsl
M clang/test/CodeGenOpenCL/amdgpu-cluster-dims.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gws-insts.cl
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue-attributes.cl
M clang/test/CodeGenSYCL/function-attrs.cpp
A clang/test/DebugInfo/CXX/debug-info-constexpr-array.cpp
M clang/test/DebugInfo/CXX/ms-novtable.cpp
A clang/test/Headers/hexagon-hvx-ieee-headers.c
A clang/test/Modules/Inputs/pch-config-macros/include/Mod1.h
A clang/test/Modules/Inputs/pch-config-macros/include/module.modulemap
A clang/test/Modules/pch-config-macros.c
M clang/test/OpenMP/amdgcn_target_global_constructor.cpp
M clang/test/OpenMP/amdgcn_weak_alias.c
M clang/test/OpenMP/amdgcn_weak_alias.cpp
M clang/test/OpenMP/irbuilder_safelen.cpp
M clang/test/OpenMP/irbuilder_safelen_order_concurrent.cpp
M clang/test/OpenMP/irbuilder_simd_aligned.cpp
M clang/test/OpenMP/irbuilder_simdlen.cpp
M clang/test/OpenMP/irbuilder_simdlen_safelen.cpp
M clang/test/OpenMP/nvptx_weak_alias.c
M clang/test/OpenMP/tile_codegen_tile_for.cpp
M clang/test/ParserHLSL/group_shared.hlsl
M clang/test/ParserHLSL/group_shared_202x.hlsl
A clang/test/Preprocessor/miopt-peek-restore-header-guard.cpp
A clang/test/SemaCXX/warn-unsafe-buffer-usage-string-view.cpp
A clang/test/SemaHLSL/BuiltIns/WaveActiveAllEqual-errors.hlsl
M clang/test/SemaHLSL/Language/ImpCastAddrSpace.hlsl
M clang/test/SemaTemplate/concepts.cpp
M clang/test/utils/update_cc_test_checks/Inputs/annotations.c.expected
M clang/test/utils/update_cc_test_checks/Inputs/generated-funcs.c.generated.all.expected
M clang/test/utils/update_cc_test_checks/Inputs/generated-funcs.c.generated.expected
M clang/test/utils/update_cc_test_checks/Inputs/generated-funcs.c.no-generated.all.expected
M clang/test/utils/update_cc_test_checks/Inputs/generated-funcs.c.no-generated.expected
M clang/test/utils/update_cc_test_checks/Inputs/resolve-tmp-conflict.cpp.expected
M clang/test/utils/update_cc_test_checks/check-globals.test
M clang/unittests/Lex/LexerTest.cpp
M clang/utils/hmaptool/CMakeLists.txt
M flang-rt/CMakeLists.txt
M flang-rt/lib/runtime/edit-input.cpp
M flang-rt/lib/runtime/execute.cpp
M flang-rt/unittests/Runtime/CommandTest.cpp
M flang/docs/OpenACC.md
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
M flang/test/Lower/Intrinsics/atan2d.f90
M flang/test/Lower/Intrinsics/atan2pi.f90
M flang/test/Lower/Intrinsics/atand.f90
M flang/test/Lower/Intrinsics/atanpi.f90
M flang/test/Lower/Intrinsics/bessel_jn.f90
A flang/test/Lower/OpenMP/implicit-map-pointer-no-default-mapper.f90
M flang/test/Lower/OpenMP/target-data-skip-mapper-calls.f90
M flang/test/Semantics/OpenACC/acc-cache-validity.f90
M flang/tools/f18/CMakeLists.txt
M libc/src/__support/math/CMakeLists.txt
M libclc/CMakeLists.txt
M libclc/clc/lib/generic/async/clc_prefetch.inc
M libclc/clc/lib/generic/math/clc_cosh.inc
M libclc/clc/lib/generic/math/clc_erfc.cl
M libclc/clc/lib/generic/math/clc_expm1.inc
M libclc/clc/lib/generic/math/clc_fmod.cl
M libclc/clc/lib/generic/math/clc_sincos_helpers_fp64.inc
M libclc/clc/lib/generic/workitem/clc_get_sub_group_id.cl
M libclc/clc/lib/ptx-nvidiacl/mem_fence/clc_mem_fence.cl
M libclc/clc/lib/ptx-nvidiacl/synchronization/clc_work_group_barrier.cl
M libclc/opencl/lib/generic/async/wait_group_events.cl
M libsycl/docs/index.rst
A libsycl/include/sycl/__impl/async_handler.hpp
A libsycl/include/sycl/__impl/detail/default_async_handler.hpp
A libsycl/include/sycl/__impl/property_list.hpp
A libsycl/include/sycl/__impl/queue.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/CMakeLists.txt
A libsycl/src/detail/queue_impl.cpp
A libsycl/src/detail/queue_impl.hpp
A libsycl/src/queue.cpp
M libunwind/src/Unwind-wasm.c
M lld/ELF/Arch/Hexagon.cpp
A lld/test/ELF/hexagon-duplex-relocs.s
R lld/test/wasm/Inputs/weak-alias.ll
A lld/test/wasm/Inputs/weak-alias.s
M lld/test/wasm/debuginfo.test
R lld/test/wasm/weak-alias-overide.ll
A lld/test/wasm/weak-alias-overide.s
R lld/test/wasm/weak-alias.ll
A lld/test/wasm/weak-alias.s
M lldb/source/Core/PluginManager.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
M lldb/source/Plugins/Process/Utility/RegisterInfos_arm64_sve.h
A lldb/test/API/functionalities/breakpoint/breakpoint_conditions/crashing_condition/Makefile
A lldb/test/API/functionalities/breakpoint/breakpoint_conditions/crashing_condition/TestCrashingCondition.py
A lldb/test/API/functionalities/breakpoint/breakpoint_conditions/crashing_condition/main.c
A lldb/test/API/linux/linker-symbols/Makefile
A lldb/test/API/linux/linker-symbols/TestLinkerSymbols.py
A lldb/test/API/linux/linker-symbols/linker.script
A lldb/test/API/linux/linker-symbols/main.cpp
R lldb/test/API/python_api/block/TestBlocks.py
A lldb/test/API/python_api/block/TestFrameBlocks.py
M lldb/test/API/python_api/block/fn.c
M lldb/test/API/python_api/block/main.c
M lldb/unittests/Host/SocketTest.cpp
M lldb/unittests/Interpreter/TestCompletion.cpp
M llvm/docs/CommandGuide/dsymutil.rst
M llvm/include/llvm/BinaryFormat/Wasm.h
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/Support/FileSystem.h
M llvm/include/llvm/Support/GenericDomTreeConstruction.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/SafeStack.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/MC/XCOFFObjectWriter.cpp
M llvm/lib/Support/Path.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrAtomics.td
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZInstrVector.td
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCCodeEmitter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
M llvm/lib/Target/WebAssembly/WebAssembly.td
M llvm/lib/Target/WebAssembly/WebAssemblyInstrAtomics.td
M llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
M llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/CodeGen/AArch64/aarch64-addv.ll
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
M llvm/test/CodeGen/AArch64/aarch64-pmull2.ll
M llvm/test/CodeGen/AArch64/aarch64-scal-to-vec-bitcast-insert.ll
M llvm/test/CodeGen/AArch64/arm64-cvt-simd-intrinsics.ll
M llvm/test/CodeGen/AArch64/arm64-fixed-point-scalar-cvt-dagcombine.ll
M llvm/test/CodeGen/AArch64/arm64-int-neon.ll
M llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
M llvm/test/CodeGen/AArch64/arm64-neon-select_cc.ll
M llvm/test/CodeGen/AArch64/arm64-neon-v8.1a.ll
M llvm/test/CodeGen/AArch64/arm64-vcvt.ll
M llvm/test/CodeGen/AArch64/arm64-vqadd.ll
M llvm/test/CodeGen/AArch64/arm64-vshift.ll
M llvm/test/CodeGen/AArch64/avoid-pre-trunc.ll
M llvm/test/CodeGen/AArch64/bitcast-extend.ll
M llvm/test/CodeGen/AArch64/bitcnt-i256.ll
M llvm/test/CodeGen/AArch64/clmul-fixed.ll
M llvm/test/CodeGen/AArch64/clmul.ll
M llvm/test/CodeGen/AArch64/concat-vector-add-combine.ll
M llvm/test/CodeGen/AArch64/ctpop.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics-vector.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
M llvm/test/CodeGen/AArch64/fsh.ll
M llvm/test/CodeGen/AArch64/ragreedy-local-interval-cost.ll
A llvm/test/CodeGen/AArch64/safestack_scalar.ll
M llvm/test/CodeGen/AArch64/select-bitcast.ll
M llvm/test/CodeGen/AArch64/sext.ll
M llvm/test/CodeGen/AArch64/sme-streaming-checkvl.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-to-int.ll
M llvm/test/CodeGen/AArch64/sve-fixed-vector-llrint.ll
M llvm/test/CodeGen/AArch64/sve-fixed-vector-lrint.ll
M llvm/test/CodeGen/AArch64/vector-llrint.ll
M llvm/test/CodeGen/AArch64/vector-lrint.ll
M llvm/test/CodeGen/AArch64/zext.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-ignore-copies-crash.mir
A llvm/test/CodeGen/AMDGPU/bfe-i8-i16.ll
M llvm/test/CodeGen/AMDGPU/bitcast_vector_bigint.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/coalesce-copy-to-agpr-to-av-registers.mir
M llvm/test/CodeGen/AMDGPU/coalescer-early-clobber-subreg.mir
M llvm/test/CodeGen/AMDGPU/dst-sel-hazard.mir
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/hazards-gfx950.mir
M llvm/test/CodeGen/AMDGPU/iglp-no-clobber.ll
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx10.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx8.mir
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx9.mir
M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
A llvm/test/CodeGen/AMDGPU/machine-sink-fence.ll
M llvm/test/CodeGen/AMDGPU/mai-hazards.mir
M llvm/test/CodeGen/AMDGPU/misched-remat-revert.ll
M llvm/test/CodeGen/AMDGPU/no-limit-coalesce.mir
M llvm/test/CodeGen/AMDGPU/optimize-exec-mask-pre-ra-no-fold-exec-copy.mir
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/regalloc-failure-overlapping-insert-assert.mir
M llvm/test/CodeGen/AMDGPU/rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-copy-from.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-insert-extract.mir
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-src2-chain.mir
M llvm/test/CodeGen/AMDGPU/sched-assert-dead-def-subreg-use-other-subreg.mir
M llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/subreg-undef-def-with-other-subreg-defs.mir
M llvm/test/CodeGen/AMDGPU/vgpr-setreg-mode-swar.mir
M llvm/test/CodeGen/DirectX/ShaderFlags/wave-ops.ll
A llvm/test/CodeGen/DirectX/WaveActiveAllEqual.ll
A llvm/test/CodeGen/PowerPC/aix-reloc-sorting.ll
M llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector-shuffle.ll
R llvm/test/CodeGen/RISCV/rvv/reduce-vl-peephole.ll
R llvm/test/CodeGen/RISCV/rvv/reduce-vl-peephole.mir
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-to-vmv.mir
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.mir
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp_const.ll
A llvm/test/CodeGen/SPIRV/global-var-no-functions.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveActiveAllEqual.ll
M llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-global.ll
M llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-nested.ll
M llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-struct.ll
M llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-undef.ll
A llvm/test/CodeGen/SPIRV/pointers/fun-ptr-to-itself.ll
A llvm/test/CodeGen/SystemZ/fminimumnum-fmaximumnum.ll
M llvm/test/CodeGen/Thumb2/mve-postinc-lsr.ll
M llvm/test/CodeGen/WebAssembly/atomic-fence.mir
M llvm/test/CodeGen/X86/dbg-distringtype-uint.ll
M llvm/test/CodeGen/X86/known-never-zero.ll
M llvm/test/CodeGen/X86/known-pow2.ll
A llvm/test/CodeGen/X86/mulx64-no-implicit-copy.ll
M llvm/test/DebugInfo/AArch64/DW_AT_APPLE_enum_kind.ll
M llvm/test/DebugInfo/AMDGPU/variable-locations.ll
M llvm/test/DebugInfo/Generic/cross-cu-linkonce-distinct.ll
M llvm/test/DebugInfo/Generic/debug-names-linkage-name.ll
M llvm/test/DebugInfo/Generic/dwarf5-debug-info-static-member.ll
M llvm/test/DebugInfo/Generic/inlined-static-var.ll
M llvm/test/DebugInfo/Generic/namespace.ll
M llvm/test/DebugInfo/MSP430/global-var.ll
M llvm/test/DebugInfo/NVPTX/debug-addr-class.ll
M llvm/test/DebugInfo/PowerPC/strict-dwarf.ll
M llvm/test/DebugInfo/WebAssembly/tls_pic_globals.ll
M llvm/test/DebugInfo/X86/2011-09-26-GlobalVarContext.ll
M llvm/test/DebugInfo/X86/DW_AT_calling-convention.ll
M llvm/test/DebugInfo/X86/align_cpp11.ll
M llvm/test/DebugInfo/X86/align_objc.ll
M llvm/test/DebugInfo/X86/arange-and-stub.ll
M llvm/test/DebugInfo/X86/containing-type-extension-rust.ll
M llvm/test/DebugInfo/X86/debug-info-access.ll
A llvm/test/DebugInfo/X86/debug-info-constexpr-array.ll
M llvm/test/DebugInfo/X86/debug-info-static-member.ll
M llvm/test/DebugInfo/X86/debug-names-dwarf64.ll
M llvm/test/DebugInfo/X86/dwarf-aranges.ll
M llvm/test/DebugInfo/X86/dwarf-linkage-names.ll
M llvm/test/DebugInfo/X86/dwarfdump-DIImportedEntity_elements.ll
M llvm/test/DebugInfo/X86/generate-odr-hash.ll
M llvm/test/DebugInfo/X86/gnu-public-names.ll
M llvm/test/DebugInfo/X86/linkage-name.ll
M llvm/test/DebugInfo/X86/namelist1.ll
M llvm/test/DebugInfo/X86/prototyped.ll
M llvm/test/DebugInfo/X86/ref_addr_relocation.ll
M llvm/test/DebugInfo/X86/string-offsets-multiple-cus.ll
M llvm/test/DebugInfo/X86/string-offsets-table.ll
M llvm/test/DebugInfo/X86/template.ll
M llvm/test/DebugInfo/X86/tls.ll
M llvm/test/DebugInfo/X86/tu-to-non-tu.ll
M llvm/test/DebugInfo/X86/vla-global.ll
M llvm/test/DebugInfo/attr-btf_tag.ll
M llvm/test/MC/RISCV/rv32p-valid.s
M llvm/test/MC/RISCV/rv64p-valid.s
A llvm/test/MC/WebAssembly/atomics-orderings-errors.s
A llvm/test/MC/WebAssembly/atomics-orderings.s
M llvm/test/MC/WebAssembly/debug-info.ll
M llvm/test/MC/WebAssembly/debug-info64.ll
M llvm/test/MC/WebAssembly/dwarfdump.ll
M llvm/test/MC/WebAssembly/dwarfdump64.ll
A llvm/test/TableGen/ArtificialRegs.td
A llvm/test/Transforms/Attributor/nofpclass-bitcast.ll
M llvm/test/Transforms/Attributor/nofpclass.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-aggregates.ll
M llvm/test/Transforms/InstCombine/wcslen-4.ll
M llvm/test/Transforms/LoopVectorize/VPlan/conditional-scalar-assignment-vplan.ll
A llvm/test/Transforms/LoopVectorize/VPlan/tail-folding.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-after-all.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
A llvm/test/Transforms/LoopVectorize/tail-folding-masked-mem-opts.ll
M llvm/test/Transforms/PGOProfile/memprof-dump-matched-call-sites.ll
A llvm/test/Transforms/SLPVectorizer/X86/split-vectorize-phi-user.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
A llvm/test/tools/dsymutil/AArch64/allow-disallow.test
A llvm/test/tools/dsymutil/Inputs/allow-disallow/a.out.arm64
A llvm/test/tools/dsymutil/Inputs/allow-disallow/empty.yaml
A llvm/test/tools/dsymutil/Inputs/allow-disallow/one.yaml
A llvm/test/tools/dsymutil/Inputs/allow-disallow/two.yaml
A llvm/test/tools/dsymutil/Inputs/private/tmp/allow-disallow/1.o
A llvm/test/tools/dsymutil/Inputs/private/tmp/allow-disallow/2.o
A llvm/test/tools/dsymutil/Inputs/private/tmp/allow-disallow/3.o
M llvm/test/tools/dsymutil/cmdline.test
M llvm/test/tools/llvm-debuginfo-analyzer/DWARF/crash-thread-local-storage.test
M llvm/tools/dsymutil/DebugMap.cpp
M llvm/tools/dsymutil/DebugMap.h
M llvm/tools/dsymutil/MachODebugMapParser.cpp
M llvm/tools/dsymutil/Options.td
M llvm/tools/dsymutil/dsymutil.cpp
M llvm/tools/dsymutil/dsymutil.h
M llvm/unittests/Analysis/DomTreeUpdaterTest.cpp
M llvm/unittests/ExecutionEngine/Orc/LibraryResolverTest.cpp
M llvm/unittests/Support/Path.cpp
M llvm/unittests/Support/raw_socket_stream_test.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.h
M mlir/include/mlir/Dialect/Func/IR/FuncOps.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsLoop.h
M mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td
M mlir/include/mlir/Dialect/Vector/Transforms/LoweringPatterns.h
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/lib/Bindings/Python/Rewrite.cpp
M mlir/lib/Dialect/AMDGPU/Transforms/FoldMemRefsOps.cpp
M mlir/lib/Dialect/Func/IR/FuncOps.cpp
M mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp
M mlir/lib/Dialect/IRDL/IR/IRDL.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsLoop.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
M mlir/lib/Dialect/Shape/IR/Shape.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorMultiReduction.cpp
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/IR/Verifier.cpp
M mlir/python/mlir/dialects/ext.py
M mlir/test/Conversion/ConvertToSPIRV/func-signature-vector-unroll.mlir
M mlir/test/Dialect/AMDGPU/amdgpu-fold-memrefs.mlir
M mlir/test/Dialect/Affine/SuperVectorize/vector_utils.mlir
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_unsupported.mlir
M mlir/test/Dialect/Func/invalid.mlir
M mlir/test/Dialect/IRDL/invalid_names.irdl.mlir
M mlir/test/Dialect/LLVM/transform-e2e.mlir
M mlir/test/Dialect/MemRef/canonicalize.mlir
M mlir/test/Dialect/MemRef/fold-memref-alias-ops.mlir
M mlir/test/Dialect/Shape/invalid.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Vector/transform-vector.mlir
R mlir/test/Dialect/Vector/vector-multi-reduction-reorder-and-expand.mlir
A mlir/test/Dialect/Vector/vector-multi-reduction-reorder.mlir
M mlir/test/Dialect/Vector/vector-multi-reduction-unrolling.mlir
M mlir/test/Dialect/XeGPU/subgroup-distribute-unit.mlir
M mlir/test/Dialect/XeGPU/subgroup-distribute.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/reduce_1d.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/reduce_2d.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-matmul-masked-vec.mlir
M mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-block-scale-shared.mlir
M mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-block-scale-tensor.mlir
M mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-invalid.mlir
M mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-block-scale-shared.mlir
M mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-block-scale-tensor.mlir
M mlir/test/lib/Dialect/Affine/TestVectorizationUtils.cpp
M mlir/test/lib/Dialect/Test/TestOpDefs.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/python/dialects/transform_vector_ext.py
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
M mlir/unittests/IR/CMakeLists.txt
A mlir/unittests/IR/VerifierTest.cpp
M utils/bazel/llvm-project-overlay/bolt/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
Merge remote-tracking branch 'external-upstream/main' into users/mariusz-sikora-at-amd/add-flat-offset-bits-feature
Compare: https://github.com/llvm/llvm-project/compare/6b64a9f7e923...7691c0b7d16b
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