[all-commits] [llvm/llvm-project] 17e783: [MLIR][NVVM] Add nvvm.addf and nvvm.subf Ops (#179...

[Srinivasa Ravi via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 17e783b241acb3070edde48ae52cc5b4c1b2b03c
      https://github.com/llvm/llvm-project/commit/17e783b241acb3070edde48ae52cc5b4c1b2b03c
  Author: Srinivasa Ravi <srinivasar at nvidia.com>
  Date:   2026-03-05 (Thu, 05 Mar 2026)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
    M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
    M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
    A mlir/test/Dialect/LLVMIR/nvvm-canonicalize.mlir
    A mlir/test/Target/LLVMIR/nvvm/addf/addf.mlir
    A mlir/test/Target/LLVMIR/nvvm/addf/addf_invalid.mlir
    A mlir/test/Target/LLVMIR/nvvm/addf/addf_vector.mlir

  Log Message:
  -----------
  [MLIR][NVVM] Add nvvm.addf and nvvm.subf Ops (#179162)

Adds `nvvm.addf` and `nvvm.subf` Ops to the NVVM dialect. `nvvm.addf`
performs a floating-point addition between two operands. `nvvm.subf`
performs a floating-point subtraction between two operands and is
equivalent to an `llvm.fneg` followed by an `nvvm.addf` operation.

PTX ISA Reference:
1.
https://docs.nvidia.com/cuda/parallel-thread-execution/#floating-point-instructions-add
2.
https://docs.nvidia.com/cuda/parallel-thread-execution/#half-precision-floating-point-instructions-add



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