[all-commits] [llvm/llvm-project] 12f4eb: [mlir][acc] Replace terminators with scf.yield in ...
Susan Tan (ス-ザン タン) via All-commits
all-commits at lists.llvm.org
Tue Mar 3 16:04:55 PST 2026
Branch: refs/heads/users/fmayer/spr/main.hwasan-add-optimization-remark-for-supported-lifetimes
Home: https://github.com/llvm/llvm-project
Commit: 12f4eb2156559c2f8c99fa7dc3b59cb4fef1389d
https://github.com/llvm/llvm-project/commit/12f4eb2156559c2f8c99fa7dc3b59cb4fef1389d
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsLoop.h
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsLoop.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
Log Message:
-----------
[mlir][acc] Replace terminators with scf.yield in wrapMultiBlockRegionWithSCFExecuteRegion (#183758)
When wrapping a multi-block region in `scf.execute_region`, replace
`func::ReturnOp` (if flang `convertFuncReturn` is set) and
`acc::YieldOp` in all the blocks with `scf.yield` so the region has a
valid SCF terminator.
Commit: 24873cb955749c7dea1d28eef5cff3c50fece209
https://github.com/llvm/llvm-project/commit/24873cb955749c7dea1d28eef5cff3c50fece209
Author: tudinhh <103348714+tudinhh at users.noreply.github.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/X86/known-never-zero.ll
Log Message:
-----------
[SelectionDAG] Pass DemandedElts to isKnownNeverZero for extend nodes (#183624)
Fixes #183042
This patch updates `SelectionDAG::isKnownNeverZero` to forward the
`DemandedElts` mask when analyzing `ISD::ZERO_EXTEND` and
`ISD::SIGN_EXTEND` nodes.
Commit: 9aff7b6347f1d97a28550e54075d08c19e024e3d
https://github.com/llvm/llvm-project/commit/9aff7b6347f1d97a28550e54075d08c19e024e3d
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/hip-toolchain-no-rdc.hip
Log Message:
-----------
[HIP] Fix wrong triple being passed to offload-bundler (#184195)
Summary:
I made a previous fix that stopped us from hard-coding x64 host in the
HIP fatbinaries we made. However, this then triggered this failure where
we were passing the wrong host triple. Now we will use the aux-triple
for offloading toolchains.
Commit: 96a02c5eb53c7d1351e774399072e63ea008c8d6
https://github.com/llvm/llvm-project/commit/96a02c5eb53c7d1351e774399072e63ea008c8d6
Author: Kewen Meng <Kewen.Meng at amd.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M clang/include/clang/APINotes/APINotesReader.h
M clang/lib/APINotes/APINotesManager.cpp
M clang/lib/APINotes/APINotesReader.cpp
Log Message:
-----------
Revert "[APINotes] Refactor APINotesReader to propagate llvm::Error " (#184211)
Reverts llvm/llvm-project#183812
Bot failed constantly. Revert this PR to unblock.
https://lab.llvm.org/buildbot/#/builders/140
Commit: 0797a10cc537bb4379df7fa86ba2e420edb5ecd3
https://github.com/llvm/llvm-project/commit/0797a10cc537bb4379df7fa86ba2e420edb5ecd3
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
A mlir/test/Conversion/XeVMToLLVM/rewrite_alloca.mlir
Log Message:
-----------
[MLIR][XeVM] Rewrite llvm.alloca if addr_space is 3 (#183417)
Rewrite llvm.alloca with addr_space 3 into llvm.mlir.global and llvm.mlir.addressof
Commit: ed085573f40279d6b9cc5ff6e53e1b08d3c45df3
https://github.com/llvm/llvm-project/commit/ed085573f40279d6b9cc5ff6e53e1b08d3c45df3
Author: Finn Plummer <mail at inbelic.dev>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/SemaHLSL/local_resource_bindings.hlsl
A clang/test/SemaHLSL/local_resource_bindings_errs.hlsl
Log Message:
-----------
[SemaHLSL] Warn when a local resource is re-assigned to non-unique global resource (#182101)
Generate a warning whenever a local resource is (re-)assigned such that
it is not guaranteed to map to a single unique global resource.
An error is not generated during sema because simple DCE or constant
folding might resolve the assignment to be to a unique global resource.
Instead, an error will be reported when trying to resolve the resource
access in the `dxil-resource-access` pass, implemented
[here](https://github.com/llvm/llvm-project/pull/182106).
Resolves https://github.com/llvm/llvm-project/issues/179303.
Commit: ed524ba0d4582a5017831394913093ae0a8ac15b
https://github.com/llvm/llvm-project/commit/ed524ba0d4582a5017831394913093ae0a8ac15b
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
A clang/test/CodeGen/asm_incbin.c
M llvm/include/llvm/MC/MCParser/MCAsmParser.h
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/Object/ModuleSymbolTable.cpp
Log Message:
-----------
[llvm] Avoid resolving `.incbin` during symbol collection (#172920)
With IO sandboxing enabled, Clang requires all FS accesses happen
through the one "true" VFS instance. That instance is currently not
being propagated into the assembly parser, and doing so would be super
involved. This triggers sandbox violations whenever an `.incbin`
directive is encountered, since the parser needs the VFS to open the
file.
However, it seems that `asm()` directives are only parsed to get the
symbols of an LLVM module, which cannot be affected by `.incbin`
directives. This PR adds an option to the asm parser to avoid resolving
`.incbin` directives when collecting module symbols, avoiding the
sandbox violation.
Commit: f7176ee336624815c732938e8917173dfec509fa
https://github.com/llvm/llvm-project/commit/f7176ee336624815c732938e8917173dfec509fa
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel][mlir][acc] Port 12f4eb2156559c2f8c99fa7dc3b59cb4fef1389d: scf.yield (#184216)
Co-authored-by: Pranav Kant <prka at google.com>
Commit: 8e6e9cb8c20304fd14fbe98176911dbf88c68036
https://github.com/llvm/llvm-project/commit/8e6e9cb8c20304fd14fbe98176911dbf88c68036
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
A clang/test/SemaHLSL/Resources/Texture2D-SampleBias.hlsl
A clang/test/SemaHLSL/Resources/Texture2D-SampleCmp.hlsl
A clang/test/SemaHLSL/Resources/Texture2D-SampleCmpLevelZero.hlsl
A clang/test/SemaHLSL/Resources/Texture2D-SampleGrad.hlsl
A clang/test/SemaHLSL/Resources/Texture2D-SampleLevel.hlsl
A clang/test/SemaHLSL/Resources/Texture2D-Sema.hlsl
A clang/test/SemaHLSL/Resources/packoffset-invalid.hlsl
A clang/test/SemaHLSL/Resources/prohibit_resource_edits.hlsl
A clang/test/SemaHLSL/Resources/resource_binding_attr_error.hlsl
A clang/test/SemaHLSL/Resources/resource_binding_attr_error_basic.hlsl
A clang/test/SemaHLSL/Resources/resource_binding_attr_error_other.hlsl
A clang/test/SemaHLSL/Resources/resource_binding_attr_error_resource.hlsl
A clang/test/SemaHLSL/Resources/resource_binding_attr_error_silence_diags.hlsl
A clang/test/SemaHLSL/Resources/resource_binding_attr_error_space.hlsl
A clang/test/SemaHLSL/Resources/resource_binding_attr_error_udt.hlsl
A clang/test/SemaHLSL/Resources/resource_binding_attr_error_uint32_max.hlsl
A clang/test/SemaHLSL/Resources/resource_binding_implicit.hlsl
A clang/test/SemaHLSL/Resources/static_resources.hlsl
A clang/test/SemaHLSL/Resources/unbounded_resource_arrays.hlsl
R clang/test/SemaHLSL/Texture2D-SampleBias.hlsl
R clang/test/SemaHLSL/Texture2D-SampleCmp.hlsl
R clang/test/SemaHLSL/Texture2D-SampleCmpLevelZero.hlsl
R clang/test/SemaHLSL/Texture2D-SampleGrad.hlsl
R clang/test/SemaHLSL/Texture2D-SampleLevel.hlsl
R clang/test/SemaHLSL/Texture2D-Sema.hlsl
R clang/test/SemaHLSL/packoffset-invalid.hlsl
R clang/test/SemaHLSL/prohibit_resource_edits.hlsl
R clang/test/SemaHLSL/resource_binding_attr_error.hlsl
R clang/test/SemaHLSL/resource_binding_attr_error_basic.hlsl
R clang/test/SemaHLSL/resource_binding_attr_error_other.hlsl
R clang/test/SemaHLSL/resource_binding_attr_error_resource.hlsl
R clang/test/SemaHLSL/resource_binding_attr_error_silence_diags.hlsl
R clang/test/SemaHLSL/resource_binding_attr_error_space.hlsl
R clang/test/SemaHLSL/resource_binding_attr_error_udt.hlsl
R clang/test/SemaHLSL/resource_binding_attr_error_uint32_max.hlsl
R clang/test/SemaHLSL/resource_binding_implicit.hlsl
R clang/test/SemaHLSL/static_resources.hlsl
R clang/test/SemaHLSL/unbounded_resource_arrays.hlsl
Log Message:
-----------
[HLSL][NFC] Move SemaHLSL resource tests to Resources subdir (#183386)
Moves resource tests in clang/test/SemaHLSL to Resources subdirectory.
Commit: 386a3afa553fbf2854ee9d002e83bd456942ad39
https://github.com/llvm/llvm-project/commit/386a3afa553fbf2854ee9d002e83bd456942ad39
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/Vector/Transforms/VectorDistribution.h
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Log Message:
-----------
[mlir] Fix typos that propagate downstream. NFC. (#184220)
Commit: 03773c3b06b2a9a023f8bab892f237fb3b980439
https://github.com/llvm/llvm-project/commit/03773c3b06b2a9a023f8bab892f237fb3b980439
Author: Aditya Medhane <153186739+flash1729 at users.noreply.github.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M clang/include/clang/APINotes/APINotesReader.h
M clang/lib/APINotes/APINotesFormat.h
M clang/lib/APINotes/APINotesYAMLCompiler.cpp
M clang/lib/Sema/SemaAPINotes.cpp
Log Message:
-----------
[APINotes][NFC] Fix typos and header comment errors (#183811)
## Description
Fix minor typos and incorrect comments in the APINotes subsystem (No
functional code is modified)
## Changes Made
- **`APINotesReader.h`** — Fixed `member buffer` → `memory buffer` in
the `Create()` doc comment (`Create()` takes a `llvm::MemoryBuffer`)
- **`APINotesFormat.h`** — Corrected the file header comment which
incorrectly referred to `APINotesWriter.h` instead of `APINotesFormat.h`
- **`APINotesYAMLCompiler.cpp`** — Fixed `it's` → `its` (possessive, not
a contraction)
- **`SemaAPINotes.cpp`** — Fixed `collection` → `collecting` and added a
missing `to` in `defer to the client to select`
## Motivation
First contribution to LLVM, aimed at getting familiar with the
contributing workflow.
Commit: a4d786630c4757ce91aef65fc2744fbde650632d
https://github.com/llvm/llvm-project/commit/a4d786630c4757ce91aef65fc2744fbde650632d
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DYLDRendezvous.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DYLDRendezvous.h
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
M lldb/test/API/lang/c/tls_globals/TestTlsGlobals.py
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb][ARM] Support thread local variables on ARM Linux (#181315)
Currently, `DynamicLoaderPOSIXDYLD::GetThreadLocalData()` only supports
the TLS memory layout where the thread pointer register points to the
start of the `pthread` structure, and the address of the DTV pointer can
be calculated by adding the offset of the `dtv` field to `tp`. On ARM
(and AArch64), the thread pointer points directly to `dtv`. The patch
improves the detection of the actual memory layout in the method and
adjusts the calculations for the new case, thus adding support for
thread-local variables on ARM Linux.
Commit: 8a9049198d180956a5f69c567bf235d36cd215a7
https://github.com/llvm/llvm-project/commit/8a9049198d180956a5f69c567bf235d36cd215a7
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M clang/include/clang/Basic/Diagnostic.h
M clang/include/clang/DependencyScanning/DependencyScannerImpl.h
M clang/include/clang/Frontend/ChainedDiagnosticConsumer.h
M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/SerializedDiagnosticPrinter.cpp
M clang/lib/Frontend/VerifyDiagnosticConsumer.cpp
M clang/lib/Tooling/Tooling.cpp
M clang/tools/driver/cc1_main.cpp
M clang/tools/driver/driver.cpp
M clang/unittests/DependencyScanning/CMakeLists.txt
R clang/unittests/DependencyScanning/DependencyScanningWorkerTest.cpp
Log Message:
-----------
[clang] Replace `finish()` with destructors for `DiagnosticConsumer` (#183831)
The `DiagnosticConsumer::finish()` API has historically been a source of
friction. Lots of different clients must manually ensure it gets called
for all consumers to work correctly. Idiomatic C++ uses destructors for
this. In Clang, there are some cases where destructors don't run
automatically, such as under `-disable-free` or some signal handling
code in `clang_main()`. This PR squeezes the complexity of ensuring
those destructors do run out of library code and into the tools that
already deal with the complexities of `-disable-free` and signal
handling.
Commit: 5ae64c62075036f474224d4c08fa952fdf09eb3c
https://github.com/llvm/llvm-project/commit/5ae64c62075036f474224d4c08fa952fdf09eb3c
Author: Thibault Monnier <thibaultmonni at gmail.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Sema/builtin-allow-sanitize-check.c
Log Message:
-----------
[Clang][Sema][Builtins] Check argument count for `__builtin_allow_sanitize_check` (#183927)
Fixes #183501.
The crash was due to calling `getArg(0)` without validating there was at
least one argument. Since `__builtin_allow_sanitize_check` has the
`CustomTypeChecking` attribute, it requires checking the argument count
explicitely.
Commit: ebe3c1ee991c48a6cc77a4faa80f29e3675f0eb8
https://github.com/llvm/llvm-project/commit/ebe3c1ee991c48a6cc77a4faa80f29e3675f0eb8
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M flang/tools/flang-driver/driver.cpp
Log Message:
-----------
[flang] Remove usage of the `DependencyConsumer::finish()` API (#184229)
This fixes build failures after #183831.
Commit: 501c6fda951b9a50e77ee324015b0b0aea9e2a5b
https://github.com/llvm/llvm-project/commit/501c6fda951b9a50e77ee324015b0b0aea9e2a5b
Author: nextsilicon-itay-bookstein <55076759+nextsilicon-itay-bookstein at users.noreply.github.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M clang/cmake/modules/AddClang.cmake
M lld/tools/lld/CMakeLists.txt
M llvm/cmake/modules/AddLLVM.cmake
M llvm/cmake/modules/LLVM-Config.cmake
M mlir/cmake/modules/AddMLIR.cmake
Log Message:
-----------
[CMake] Propagate dependencies to OBJECT libraries in add_llvm_library (re-land) (#184201)
Previously, transitively inherited calls to
`target_include_directories(foo SYSTEM ...)` were being squashed into a
flat list of includes, effectively stripping off `-isystem` and
unintentionally forwarding warnings from such dependencies.
To correctly propagate `SYSTEM` dependencies, use
`target_link_libraries` to forward the parent target's link dependencies
to the OBJECT library (similar to the `_static` flow below). Unlike a
flat `target_include_directories`, this lets CMake resolve transitive
SYSTEM include directories through the proper dependency chain.
Note that `target_link_libraries` on an OBJECT library propagates all
usage requirements, not just includes. This also brings in transitive
`INTERFACE_COMPILE_DEFINITIONS`, `INTERFACE_COMPILE_OPTIONS`, and
`INTERFACE_COMPILE_FEATURES`. This is arguably more correct, as the
OBJECT library compiles the same sources and should see the same flags.
The existing `target_include_directories` call is retained for include
directories set directly on the target (not through link dependencies).
CMake deduplicates include directories that appear through both paths.
Compile definitions and options may technically appear twice (once via
the OBJECT library, once via the consuming target), but duplicate `-D`
and flag entries are harmless in practice.
Also fix `clang_target_link_libraries` and `mlir_target_link_libraries`
to forward the link type (PUBLIC/PRIVATE/INTERFACE) to `obj.*` targets.
Previously the type keyword was silently dropped, resulting in plain-
signature `target_link_libraries` calls. This is now required because
the new keyword-signature call in `llvm_add_library` would otherwise
conflict (CMake requires all calls on a target to use the same
signature).
Commit: 1a7060a7b07c2fd6e72537781a83f87941d26cda
https://github.com/llvm/llvm-project/commit/1a7060a7b07c2fd6e72537781a83f87941d26cda
Author: Abhinav Gaba <abhinav.gaba at intel.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M offload/include/OpenMP/Mapping.h
M offload/libomptarget/OpenMP/Mapping.cpp
M offload/libomptarget/interface.cpp
M offload/libomptarget/omptarget.cpp
A offload/test/mapping/map_ordering_ptee_tgt_alloc_mapper_alloc_from_to.c
A offload/test/mapping/map_ordering_ptee_tgt_data_alloc_tgt_mapper_present_delete_from_to.c
A offload/test/mapping/map_ordering_tgt_alloc_from_to.c
A offload/test/mapping/map_ordering_tgt_alloc_present_tofrom.c
A offload/test/mapping/map_ordering_tgt_alloc_tofrom.c
A offload/test/mapping/map_ordering_tgt_data_alloc_from.c
A offload/test/mapping/map_ordering_tgt_data_alloc_to_from.c
A offload/test/mapping/map_ordering_tgt_data_alloc_tofrom.c
A offload/test/mapping/map_ordering_tgt_exit_data_always_always.c
A offload/test/mapping/map_ordering_tgt_exit_data_delete_from.c
A offload/test/mapping/map_ordering_tgt_exit_data_delete_from_assumedsize.c
A offload/test/mapping/map_ordering_tgt_exit_data_from_delete_assumedsize.c
A offload/test/mapping/map_ordering_tgt_exit_data_from_mapper_overlap.c
Log Message:
-----------
[OpenMP][Offload] Handle `present/to/from` when a different entry did `alloc/delete`. (#165494)
OpenMP allows cases like the following:
```c
int *p1, *p2, x;
p1 = p2 = &x;
...
#pragma omp target_exit_data map(delete: p1[:]) from(p2[0])
```
Which means, when the runtime encounters the `from` entry, the ref-count
may not be zero, but it will go down to zero at the end of the current
construct, which should cause the "from" transfer to happen.
Similarly, a user may have:
```c
struct S {
int *p;
};
#pragma omp declare_mapper (id1: S s) map(s.p) map(present, alloc: s.p[0:10])
#pragma omp declare_mapper (id2: S s) map(s.p, s.p[0:10])
S s1;
// present-check should fail here
#pragma omp target_enter_data map(alloc: s.p[0:10]) map(mapper(id1), to: s)
// "to" should be honored here
#pragma omp target_enter_data map(alloc: s.p[0:10]) map(mapper(id2), to: s)
```
Where the allocation happens before the "to" entry is encountered by the
runtime. Or, an allocation happens before a "present" entry is
encountered.
To handle cases like this, we need to use the state information of
previously seen new allocations, deletions, "from" entries, when
honoring `to`/`from`/`present` map entries.
Commit: 8107c71511b38f6fecf2c91676e5ed7b55a29b47
https://github.com/llvm/llvm-project/commit/8107c71511b38f6fecf2c91676e5ed7b55a29b47
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
M llvm/include/llvm/Target/TargetLoweringObjectFile.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/Target/Lanai/LanaiTargetObjectFile.cpp
M llvm/lib/Target/Lanai/LanaiTargetObjectFile.h
M llvm/lib/Target/Mips/MipsTargetObjectFile.cpp
M llvm/lib/Target/Mips/MipsTargetObjectFile.h
M llvm/lib/Target/NVPTX/NVPTXTargetObjectFile.h
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.cpp
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.h
M llvm/lib/Target/SPIRV/SPIRVTargetObjectFile.h
M llvm/lib/Target/TargetLoweringObjectFile.cpp
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/XCore/XCoreTargetObjectFile.cpp
M llvm/lib/Target/XCore/XCoreTargetObjectFile.h
A llvm/test/CodeGen/RISCV/large-codemodel-sections.ll
Log Message:
-----------
[RISCV] Put Large Code Model Constant Pools in .text (#151393)
These are required to be close to code, unlike `.rodata` which was being
used before.
Fixes: #145080
Commit: 533f16fe8969ecc5417fe0ac8f9cb54469e08da8
https://github.com/llvm/llvm-project/commit/533f16fe8969ecc5417fe0ac8f9cb54469e08da8
Author: Daniil Dudkin <unterumarmung at yandex.ru>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M clang-tools-extra/clang-tidy/google/ExplicitConstructorCheck.cpp
M clang-tools-extra/clang-tidy/utils/LexerUtils.cpp
M clang-tools-extra/clang-tidy/utils/LexerUtils.h
M clang-tools-extra/unittests/clang-tidy/LexerUtilsTest.cpp
Log Message:
-----------
[clang-tidy][NFC] Add `findTokenInRange` and reuse it (#183941)
Commit: 61310cd72dd2c4b72b899bc577c1722ddf5c0361
https://github.com/llvm/llvm-project/commit/61310cd72dd2c4b72b899bc577c1722ddf5c0361
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
Log Message:
-----------
[Github] Remove force build from windows container
This did not actually bump the LLVM version (see fixes in #184231) and
will not be necessary now that other patches will be going in forcing a
rebuild anyways.
Commit: ea7ff48c3108b8b4d49c252b31712c24f17a4ad9
https://github.com/llvm/llvm-project/commit/ea7ff48c3108b8b4d49c252b31712c24f17a4ad9
Author: Andrei Elovikov <andrei.elovikov at sifive.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M llvm/include/llvm/Analysis/DominanceFrontier.h
M llvm/include/llvm/Analysis/DominanceFrontierImpl.h
M llvm/unittests/Transforms/Vectorize/VPPostDomFrontierTest.cpp
Log Message:
-----------
[DominanceFrontier] Support multiple root nodes for post-dom (#181257)
Post-dominator tree has a notion of a single virtual root node, use that
in the dominance-frontier implementation to support multiple root nodes.
Originally part of https://github.com/llvm/llvm-project/pull/179336 but
split up into a separate later PR to ease review.
---------
Co-authored-by: Luke Lau <luke_lau at icloud.com>
Commit: 183d02d257f6fd94d06f9ddd56d58cff981e5a11
https://github.com/llvm/llvm-project/commit/183d02d257f6fd94d06f9ddd56d58cff981e5a11
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M clang/lib/Sema/SemaTemplateDeduction.cpp
Log Message:
-----------
[clang] NFC: remove unused / untested workaround in pack deduction (#183875)
This snippet was part of what was introduced in
130cc445e46836b28defdce03b1adfdb16ddcf41
However, none of the existing tests require it, including the tests
added in that commit.
One of those tests had a FIXME which was fixed when we switched
frelaxed-template-template-args on by default as well.
Commit: f52a2035548f5978c63b18ac0aa283cc57c99360
https://github.com/llvm/llvm-project/commit/f52a2035548f5978c63b18ac0aa283cc57c99360
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsLoop.h
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsLoop.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
Log Message:
-----------
Revert "[mlir][acc] Replace terminators with scf.yield in wrapMultiBlockRegionWithSCFExecuteRegion (#183758)" (#184228)
This reverts commit 12f4eb2156559c2f8c99fa7dc3b59cb4fef1389d.
https://lab.llvm.org/buildbot/#/builders/55/builds/24871.
Commit: 526a4d4d8a6aa0af93019286eaaa9c860fc49720
https://github.com/llvm/llvm-project/commit/526a4d4d8a6aa0af93019286eaaa9c860fc49720
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M llvm/include/llvm/ADT/EquivalenceClasses.h
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Analysis/LoopAccessAnalysis/different-access-types-rt-checks.ll
M llvm/test/Analysis/LoopAccessAnalysis/retry-runtime-checks-after-dependence-analysis-forked-pointers.ll
M llvm/test/Analysis/LoopAccessAnalysis/unknown-dependence-retry-with-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-difference.ll
Log Message:
-----------
[LAA] Always use DepCands when grouping runtime checks. (#91196)
Update groupChecks to always use DepCands to try and merge runtime
checks. DepCands contains the dependency partition, grouping together
all accessed pointers to he same underlying objects.
If we computed the dependencies, We only need to check accesses to the
same underlying object, if there is an unknown dependency for this
underlying object; otherwise we already proved that all accesses withing
the underlying object are safe w.r.t. vectorization and we only need to
check that accesses to the underlying object don't overlap with accesses
to other underlying objects.
To ensure runtime checks are generated for the case with unknown
dependencies, remove equivalence classes containing accesses involved in
unknown dependencies.
This reduces the number of runtime checks needed in case non-constant
dependence distances are found, and is in preparation for removing the
restriction that the accesses need to have the same stride which was
added in https://github.com/llvm/llvm-project/pull/88039.
PR: https://github.com/llvm/llvm-project/pull/91196
Commit: 895597a1f579c3b6726f1d3eaa15845871e10d51
https://github.com/llvm/llvm-project/commit/895597a1f579c3b6726f1d3eaa15845871e10d51
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M .github/workflows/bazel-checks.yml
Log Message:
-----------
[Github][bazel] Run `buildifier --mode=diff` on error (#184233)
Displaying the diff helps point to what the issue is, including if it's
even related to the change at all.
This also expands the pattern to some other files that don't match
`*BUILD*`, e.g. `*.bzl` files.
Example failure:
https://github.com/llvm/llvm-project/actions/runs/22595929783/job/65465781106
Commit: 3c43fc16b73b1c99ec754e14d83a0b61b09c51c5
https://github.com/llvm/llvm-project/commit/3c43fc16b73b1c99ec754e14d83a0b61b09c51c5
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M clang/include/clang/DependencyScanning/DependencyScannerImpl.h
M clang/include/clang/DependencyScanning/DependencyScanningWorker.h
M clang/include/clang/Tooling/DependencyScanningTool.h
M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanningTool.cpp
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
Log Message:
-----------
[clang][deps] Remove the `finalize()` API for by-module-name scans (#184232)
The `DiagnosticConsumer::finish()` API was removed in #183831. Since
that was the only thing the by-module-name `finalize()` API called, we
can safely remove that and simplify the scanner.
Commit: 4a9e0812c5069e29c21cf2391d93e5f05976859c
https://github.com/llvm/llvm-project/commit/4a9e0812c5069e29c21cf2391d93e5f05976859c
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
M flang/test/Semantics/OpenACC/acc-cache-validity.f90
Log Message:
-----------
[flang] Allow acc cache directive inside acc routine (#184213)
While the spec allows the cache directive "at the top of (inside of) a
loop", the directive has also been utilized at the top of an acc
routine. This PR adds support for that.
Commit: 5156147824be8c86c438958f439fc6a13923408a
https://github.com/llvm/llvm-project/commit/5156147824be8c86c438958f439fc6a13923408a
Author: Roland McGrath <mcgrathr at google.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M libc/include/stdlib-malloc.yaml
Log Message:
-----------
[libc] Declare reallocarray in stdlib.h / malloc.h (#184223)
Scudo now provides reallocarray, so declare it.
Commit: 42a0fbc2c792f414e844328a363dbebe720a5255
https://github.com/llvm/llvm-project/commit/42a0fbc2c792f414e844328a363dbebe720a5255
Author: Abhinav Gaba <abhinav.gaba at intel.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M offload/include/OpenMP/Mapping.h
M offload/libomptarget/OpenMP/Mapping.cpp
M offload/libomptarget/interface.cpp
M offload/libomptarget/omptarget.cpp
R offload/test/mapping/map_ordering_ptee_tgt_alloc_mapper_alloc_from_to.c
R offload/test/mapping/map_ordering_ptee_tgt_data_alloc_tgt_mapper_present_delete_from_to.c
R offload/test/mapping/map_ordering_tgt_alloc_from_to.c
R offload/test/mapping/map_ordering_tgt_alloc_present_tofrom.c
R offload/test/mapping/map_ordering_tgt_alloc_tofrom.c
R offload/test/mapping/map_ordering_tgt_data_alloc_from.c
R offload/test/mapping/map_ordering_tgt_data_alloc_to_from.c
R offload/test/mapping/map_ordering_tgt_data_alloc_tofrom.c
R offload/test/mapping/map_ordering_tgt_exit_data_always_always.c
R offload/test/mapping/map_ordering_tgt_exit_data_delete_from.c
R offload/test/mapping/map_ordering_tgt_exit_data_delete_from_assumedsize.c
R offload/test/mapping/map_ordering_tgt_exit_data_from_delete_assumedsize.c
R offload/test/mapping/map_ordering_tgt_exit_data_from_mapper_overlap.c
Log Message:
-----------
Revert "[OpenMP][Offload] Handle `present/to/from` when a different entry did `alloc/delete`." (#184240)
Reverts llvm/llvm-project#165494
Some buildbots are not happy about CHECKs enforcing strict ordering of
prints inside/after target regions.
Commit: 4f50a725fa1921915f29b5d6603d91aef3dbe589
https://github.com/llvm/llvm-project/commit/4f50a725fa1921915f29b5d6603d91aef3dbe589
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/LangStandard.h
M clang/lib/Basic/LangOptions.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Lex/DependencyDirectivesScanner.cpp
M clang/lib/Lex/Lexer.cpp
M clang/unittests/Lex/DependencyDirectivesScannerTest.cpp
Log Message:
-----------
[clang][clang-scan-deps] Add LangOptions::AllowLiteralDigitSeparator to fix #88896 (#184235)
Fixes #88896 by following the approach described in
https://github.com/llvm/llvm-project/pull/95798#discussion_r1649496882.
This adds `LangOptions::AllowLiteralDigitSeparator`, following the
pattern used for `RawStringLiterals` in #88265.
It is enabled by default for C++14 and C23, and the Scanner sets it
explicitly to always allow literals with digit separators in directives.
Originally authored by @tsfn (Yifan Fang, <gatsfn at gmail.com>) in
#158420.
Co-authored-by: Yifan Fang <gatsfn at gmail.com>
Commit: 4995b2b8591dd58e15392953b6c91b44909b79ec
https://github.com/llvm/llvm-project/commit/4995b2b8591dd58e15392953b6c91b44909b79ec
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
Log Message:
-----------
[Github] Enable long paths in windows CI Container (#184224)
Otherwise we run into issues with file paths >260 characters. This was
preventing us from updating the Windows container as last time we built
the container it came with a MSVC supplied CMake update, which used
absolute paths in more places, bumping us over the limit.
https://github.com/ninja-build/ninja/issues/2400
https://gitlab.kitware.com/cmake/cmake/-/issues/22435
Commit: 78f259fcc14bb0a567d45ba394fcde48de2bc299
https://github.com/llvm/llvm-project/commit/78f259fcc14bb0a567d45ba394fcde48de2bc299
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M mlir/lib/ExecutionEngine/CMakeLists.txt
M mlir/lib/ExecutionEngine/LevelZeroRuntimeWrappers.cpp
Log Message:
-----------
[MLIR] mlir_levelzero_runtime: remove dependency on LLVM (#182942)
L0 runtime can be built standalone without any dependency on LLVM/MLIR
components.
Remove remaining small dependency from L0 runtime
Commit: 49c3cd15e8b4c21dd86eefdc76754ddfc2a7a65e
https://github.com/llvm/llvm-project/commit/49c3cd15e8b4c21dd86eefdc76754ddfc2a7a65e
Author: Jim Ingham <jingham at apple.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
A lldb/test/API/functionalities/breakpoint/breakpoint_conditions/crashing_condition/Makefile
A lldb/test/API/functionalities/breakpoint/breakpoint_conditions/crashing_condition/TestCrashingCondition.py
A lldb/test/API/functionalities/breakpoint/breakpoint_conditions/crashing_condition/main.c
Log Message:
-----------
Add a test that we recover from a crashing breakpoint condition.
Commit: a14d8b2e36d4babd00509e85e79a14a48af148b2
https://github.com/llvm/llvm-project/commit/a14d8b2e36d4babd00509e85e79a14a48af148b2
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenCXXABI.h
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.h
A clang/test/CIR/CodeGen/thunks.cpp
Log Message:
-----------
[CIR] Upstream vtable thunk handling (#183629)
This implements vtable thunk handling in CIR based on the incubator
code, but also compared against the latest Clang LLVM IR codegen.
Eventually, we'll want to create CIR abstractions for all of this and
move the CXXABI-specific details into the CXXABI lowering pass. For now,
we just implement it directly in codegen.
Commit: c433ae7e2e572167b8ddc0c404747a9947f69859
https://github.com/llvm/llvm-project/commit/c433ae7e2e572167b8ddc0c404747a9947f69859
Author: Jim Ingham <jingham at apple.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
R lldb/test/API/functionalities/breakpoint/breakpoint_conditions/crashing_condition/Makefile
R lldb/test/API/functionalities/breakpoint/breakpoint_conditions/crashing_condition/TestCrashingCondition.py
R lldb/test/API/functionalities/breakpoint/breakpoint_conditions/crashing_condition/main.c
Log Message:
-----------
Revert "Add a test that we recover from a crashing breakpoint condition."
This reverts commit 49c3cd15e8b4c21dd86eefdc76754ddfc2a7a65e.
I was going back and forth between llvm.org and my fork to prepare
this PR, but mistakenly pushed it from the wrong checkout.
Let's revert this and do it right...
Commit: abb228af20c95d7d347831453d64da626e3c4392
https://github.com/llvm/llvm-project/commit/abb228af20c95d7d347831453d64da626e3c4392
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenException.cpp
M clang/test/CIR/CodeGen/try-catch-tmp.cpp
Log Message:
-----------
[CIR] Fix handling of cleanup scopes inside a try body (#183869)
We had a problem where scope terminators were not being created
correctly when a cleanup scope appeared inside the body of a try
operation. This was caused by cleanup scope operation not being properly
flushed before the try body scope was completed.
This change fixes the problem by creating a RunCleanupsScope in the
lambda that pupulates the try body and forcing cleanups before adding
the yield terminator to the try body.
The test case also exposed a secondary bug where we were not properly
updating the innermostEHScope variable when popping a cleanup from the
eh stack. That is also fixed here.
Commit: 23f21f3e277dc4a8aa0886444a1e18bd51e0bd3d
https://github.com/llvm/llvm-project/commit/23f21f3e277dc4a8aa0886444a1e18bd51e0bd3d
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/test/CIR/IR/func-attrs.cir
Log Message:
-----------
[CIR] Implement function/call attribute parsing (#184185)
It was brought to my attention that we didn't actually have a parsing
test/parsing failed when attributes were included. This patch adds the
parsing functionality for attributes, and sets them correctly, plus
makes sure we have a test that validates functions, member functions,
calls, member calls, and indirect calls.
Commit: a4f9d43eef7f396e92c6596870736ced4c5ef36b
https://github.com/llvm/llvm-project/commit/a4f9d43eef7f396e92c6596870736ced4c5ef36b
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M clang/test/Analysis/Checkers/WebKit/nodelete-annotation.cpp
Log Message:
-----------
[alpha.webkit.NoDeleteChecker] Add a test for unsafe function override (#184208)
Commit: 6719ec1e951250b3a533f87508628cc33e109c8e
https://github.com/llvm/llvm-project/commit/6719ec1e951250b3a533f87508628cc33e109c8e
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M clang/test/CodeGenCoroutines/coro-suspend-cleanups.cpp
M llvm/include/llvm/Transforms/Coroutines/CoroShape.h
M llvm/lib/Transforms/Coroutines/CoroEarly.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/test/Transforms/Coroutines/ArgAddr.ll
M llvm/test/Transforms/Coroutines/coro-align16.ll
M llvm/test/Transforms/Coroutines/coro-align32.ll
M llvm/test/Transforms/Coroutines/coro-align64-02.ll
M llvm/test/Transforms/Coroutines/coro-align64.ll
M llvm/test/Transforms/Coroutines/coro-align8-02.ll
M llvm/test/Transforms/Coroutines/coro-align8.ll
M llvm/test/Transforms/Coroutines/coro-alloc-with-param-O0.ll
M llvm/test/Transforms/Coroutines/coro-alloc-with-param-O2.ll
M llvm/test/Transforms/Coroutines/coro-alloca-01.ll
M llvm/test/Transforms/Coroutines/coro-alloca-02.ll
M llvm/test/Transforms/Coroutines/coro-alloca-03.ll
M llvm/test/Transforms/Coroutines/coro-alloca-04.ll
M llvm/test/Transforms/Coroutines/coro-alloca-06.ll
M llvm/test/Transforms/Coroutines/coro-alloca-07.ll
M llvm/test/Transforms/Coroutines/coro-alloca-08.ll
M llvm/test/Transforms/Coroutines/coro-alloca-09.ll
M llvm/test/Transforms/Coroutines/coro-alloca-loop-carried-address.ll
M llvm/test/Transforms/Coroutines/coro-alloca-outside-frame.ll
M llvm/test/Transforms/Coroutines/coro-alloca-with-addrspace.ll
M llvm/test/Transforms/Coroutines/coro-async-dyn-align.ll
M llvm/test/Transforms/Coroutines/coro-async.ll
M llvm/test/Transforms/Coroutines/coro-await-suspend-lower-invoke.ll
M llvm/test/Transforms/Coroutines/coro-await-suspend-lower.ll
M llvm/test/Transforms/Coroutines/coro-byval-param.ll
M llvm/test/Transforms/Coroutines/coro-catchswitch.ll
M llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll
M llvm/test/Transforms/Coroutines/coro-eh-aware-edge-split-01.ll
M llvm/test/Transforms/Coroutines/coro-eh-aware-edge-split-02.ll
M llvm/test/Transforms/Coroutines/coro-frame-arrayalloca.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-01.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-02.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-04.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-05.ll
M llvm/test/Transforms/Coroutines/coro-frame.ll
M llvm/test/Transforms/Coroutines/coro-lifetime-end.ll
M llvm/test/Transforms/Coroutines/coro-materialize.ll
M llvm/test/Transforms/Coroutines/coro-noop.ll
M llvm/test/Transforms/Coroutines/coro-padding.ll
M llvm/test/Transforms/Coroutines/coro-param-copy.ll
M llvm/test/Transforms/Coroutines/coro-retcon-once-value.ll
M llvm/test/Transforms/Coroutines/coro-retcon-once-value2.ll
M llvm/test/Transforms/Coroutines/coro-retcon-remat.ll
M llvm/test/Transforms/Coroutines/coro-retcon-resume-values2.ll
M llvm/test/Transforms/Coroutines/coro-retcon.ll
M llvm/test/Transforms/Coroutines/coro-spill-after-phi.ll
M llvm/test/Transforms/Coroutines/coro-spill-corobegin.ll
M llvm/test/Transforms/Coroutines/coro-spill-defs-before-corobegin.ll
M llvm/test/Transforms/Coroutines/coro-spill-promise-02.ll
M llvm/test/Transforms/Coroutines/coro-spill-promise.ll
M llvm/test/Transforms/Coroutines/coro-spill-suspend.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-01.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-02.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-03.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-04.ll
M llvm/test/Transforms/Coroutines/coro-split-tbaa-md.ll
M llvm/test/Transforms/Coroutines/coro-zero-alloca.ll
Log Message:
-----------
[Coroutines] Replace struct alloca frame with byte array and ptradd (#178359)
Replace coroutine frame struct type with a simple byte array and use
offset-based ptradd operations instead of struct GEP for all field
access. Alloca types have largely lost all meaning to LLVM (even this
pass merged them and used an arbitrary type to represent all of them),
and so they just makes the code to construct alloca more difficult and
less flexible.
Key changes:
- Remove LayoutFieldIndex from frame field tracking
- Remove StructType usage - frame is now a byte array
- Replace all CreateStructGEP/CreateConstInBoundsGEP with CreatePtrAdd
- Store ResumeOffset/DestroyOffset in SwitchLowering for reuse
- Remove Shape.FrameTy, use Shape.FrameSize directly
Bug fix: Uses pointer size and alignment from data layout for header
pointer offsets in debug info instead of hardcoded 8 byte.
Optimization: Replaces load+store patterns with CreateMemCpy for copying
allocas to the frame more efficiently.
Optimization: Add missing inbounds annotations on existing ptradd calls.
Improvement: Preserve debug info of every alloca, even overlapping ones.
The frame type is now completely opaque at the IR level. All structure
is implicit through computed offsets. Debug info still provides detailed
field information using explicit offsets.
See further information in dependent PR
https://github.com/llvm/llvm-project/pull/178358 as well.
Co-authored-by: Claude Opus 4.5 <noreply at anthropic.com>
Commit: 4e3e4f25bc4a23de29a358953317dd71e45982e8
https://github.com/llvm/llvm-project/commit/4e3e4f25bc4a23de29a358953317dd71e45982e8
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M clang/lib/Sema/SemaWasm.cpp
M clang/test/CodeGen/WebAssembly/builtins-table-externref.c
Log Message:
-----------
[WASM] add CheckWasmTableElement helper (#181172)
Discard qualifiers from the types (e.g. addrspace, volatile, etc) before
checking that the underlying types are the same, and DRY the code to
emit a consistent Sema.Diag before returning failure.
Commit: 743428688fb0b3e6e6d466688a3930520d741aba
https://github.com/llvm/llvm-project/commit/743428688fb0b3e6e6d466688a3930520d741aba
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M flang/include/flang/Parser/preprocessor.h
M flang/lib/Parser/preprocessor.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/prescan.h
A flang/test/Preprocessing/bug178481.F90
Log Message:
-----------
[flang] Recognize compiler directives after expansion in comment (#183626)
The compiler can recognize a compiler directive when one results from a
macro expansion at the beginning of a non-comment source line, as in
"#define FOO !$OMP". But it can't recognize a compiler directive that
initially appears as a comment line, as in "!BAR" after "#define BAR
$OMP". Extend the prescanner to recognize such cases in free form
source. (Fixed form is a much more complicated case for this recognition
and will be addressed later if needed.)
This is the 2nd version of this patch; the first was reverted after
problems with continuation lines were encountered.
Fixes https://github.com/llvm/llvm-project/issues/178481.
Commit: 0f8aa9610c0ae138bb92a04180787675d732dc72
https://github.com/llvm/llvm-project/commit/0f8aa9610c0ae138bb92a04180787675d732dc72
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M lldb/source/Plugins/Process/minidump/RegisterContextMinidump_ARM64.cpp
Log Message:
-----------
[lldb][NFC] Whitespace cleanup in RegisterContextMinidump_ARM64
Breaking out the whitespace changes turned up in a separate
contentful PR.
Commit: 03e2af7a65ea2db96c934f8a8faa26d631b242ee
https://github.com/llvm/llvm-project/commit/03e2af7a65ea2db96c934f8a8faa26d631b242ee
Author: Akimasa Watanuki <mencotton0410 at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
A clang/test/CIR/CodeGen/bitfield-assignment-loc.c
Log Message:
-----------
[CIR] Fix bitfield store locations for assignment codegen (#184005)
Update bitfield-assignment codegen to emit stores at
assignment-expression source locations.
Keep `cir.set_bitfield` aligned with other store-like operations.
Prevent regressions that reattach bitfield stores to declaration-site
locations.
Add a CIR test on `clang/test/CIR/CodeGen/bitfield-assignment-loc.c`.
Fix https://github.com/llvm/llvm-project/issues/183759
Commit: d4d18248fde64ab8867ca81ecb16f402db7a17e8
https://github.com/llvm/llvm-project/commit/d4d18248fde64ab8867ca81ecb16f402db7a17e8
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M lldb/include/lldb/Utility/LLDBLog.h
M lldb/source/Initialization/SystemInitializerCommon.cpp
M lldb/source/Utility/LLDBLog.cpp
Log Message:
-----------
[lldb] Terminate the LLDB Log in SystemInitializerCommon::Terminate (#184261)
Currently, when calling SBDebugger::Initialize after
SBDebugger::Terminate, you hit an assert in LLDBLog when trying to
register the LLDB log a second time. Also fix the awkward
capitalization.
Commit: 1d1c83ad73977a17b06e34243a9b74f41af6da78
https://github.com/llvm/llvm-project/commit/1d1c83ad73977a17b06e34243a9b74f41af6da78
Author: Abhinav Gaba <abhinav.gaba at intel.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M offload/include/OpenMP/Mapping.h
M offload/libomptarget/OpenMP/Mapping.cpp
M offload/libomptarget/interface.cpp
M offload/libomptarget/omptarget.cpp
A offload/test/mapping/map_ordering_ptee_tgt_alloc_mapper_alloc_from_to.c
A offload/test/mapping/map_ordering_ptee_tgt_data_alloc_tgt_mapper_present_delete_from_to.c
A offload/test/mapping/map_ordering_tgt_alloc_from_to.c
A offload/test/mapping/map_ordering_tgt_alloc_present_tofrom.c
A offload/test/mapping/map_ordering_tgt_alloc_tofrom.c
A offload/test/mapping/map_ordering_tgt_data_alloc_from.c
A offload/test/mapping/map_ordering_tgt_data_alloc_to_from.c
A offload/test/mapping/map_ordering_tgt_data_alloc_tofrom.c
A offload/test/mapping/map_ordering_tgt_exit_data_always_always.c
A offload/test/mapping/map_ordering_tgt_exit_data_delete_from.c
A offload/test/mapping/map_ordering_tgt_exit_data_delete_from_assumedsize.c
A offload/test/mapping/map_ordering_tgt_exit_data_from_delete_assumedsize.c
A offload/test/mapping/map_ordering_tgt_exit_data_from_mapper_overlap.c
Log Message:
-----------
Reland "[OpenMP][Offload] Handle `present/to/from` when a different entry did `alloc/delete`." (#184260)
Some tests that were checking for prints inside/outside `target` regions
needed to be updated to work on systems where the ordering wasn't
deterministic.
Reverts llvm/llvm-project#184240
Original description from #165494:
-----
OpenMP allows cases like the following:
```c
int *p1, *p2, x;
p1 = p2 = &x;
...
#pragma omp target_exit_data map(delete: p1[:]) from(p2[0])
```
Which means, when the runtime encounters the `from` entry, the ref-count
may
not be zero, but it will go down to zero at the end of the current
construct,
which should cause the "from" transfer to happen.
Similarly, a user may have:
```c
struct S {
int *p;
};
#pragma omp declare_mapper (id1: S s) map(s.p) map(present, alloc: s.p[0:10])
#pragma omp declare_mapper (id2: S s) map(s.p, s.p[0:10])
S s1;
// present-check should fail here
#pragma omp target_enter_data map(alloc: s.p[0:10]) map(mapper(id1), to: s)
// "to" should be honored here
#pragma omp target_enter_data map(alloc: s.p[0:10]) map(mapper(id2), to: s)
```
Where the allocation happens before the "to" entry is encountered by the
runtime. Or, an allocation happens before a "present" entry is
encountered.
To handle cases like this, we need to use the state information of
previously
seen new allocations, deletions, "from" entries, when honoring
`to`/`from`/`present` map entries.
-----
Commit: 0ced81f7eabca9c4c640f8a6ebb4089c371d2fb0
https://github.com/llvm/llvm-project/commit/0ced81f7eabca9c4c640f8a6ebb4089c371d2fb0
Author: Abhinav Gaba <abhinav.gaba at intel.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M offload/test/mapping/map_ordering_ptee_tgt_alloc_mapper_alloc_from_to.c
M offload/test/mapping/map_ordering_tgt_alloc_from_to.c
M offload/test/mapping/map_ordering_tgt_alloc_tofrom.c
M offload/test/mapping/map_ordering_tgt_data_alloc_to_from.c
M offload/test/mapping/map_ordering_tgt_data_alloc_tofrom.c
Log Message:
-----------
[NFC][OpenMP] Remove redundant prints in `target` regions from tests added in #184260. (#184266)
Some buildbots don't like them, and the correctness of the values in the
`target` region is ensured via prints after the region.
Commit: 4f91d0b322a85bdad4b7440b35ba270b5277ec8c
https://github.com/llvm/llvm-project/commit/4f91d0b322a85bdad4b7440b35ba270b5277ec8c
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M libcxx/test/benchmarks/numeric/gcd.bench.cpp
M libcxx/test/benchmarks/streams/getline.bench.cpp
M libcxx/test/benchmarks/streams/ofstream.bench.cpp
Log Message:
-----------
[libc++] Give proper names to a few benchmarks (#183333)
Commit: 82319d74aae41bc1bdd59eed0b1c27cfc7b8086f
https://github.com/llvm/llvm-project/commit/82319d74aae41bc1bdd59eed0b1c27cfc7b8086f
Author: Jim Lin <jim at andestech.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedAndes45.td
M llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-reduction.s
Log Message:
-----------
[RISCV] Update Andes45 vector reduction scheduling info (#182980)
This PR adds latency/throughput for all RVV reductions to the andes45
series scheduling model.
Commit: a6fa21c5aabb9e7d47c221aa8403d96cb154d549
https://github.com/llvm/llvm-project/commit/a6fa21c5aabb9e7d47c221aa8403d96cb154d549
Author: Srivarshitha M <mvarshitha17874 at gmail.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
A clang/test/CIR/CodeGen/c89-implicit-int.c
A clang/test/CIR/CodeGen/expressions.cpp
Log Message:
-----------
[CIR] Upstream basic CodeGen tests from incubator (#183998)
This PR upstreams `expressions.cpp` and `c89-implicit-int.c` from the
ClangIR incubator to the mainline.
Following the incremental approach discussed in #156747 and the feedback
from the closed PR #157333, I have:
1. Copied the files directly from the incubator to preserve history.
2. Updated the `RUN` lines to use the `--check-prefix=CIR` flag.
3. Converted `CHECK:` lines to `CIR:`.
4. Standardized variable captures using the `%[[VAR:.*]]` regex syntax
(in `expressions.cpp`).
Verified locally with `llvm-lit`. This is a partial fix for #156747.
*Note: As suggested in previous reviews, I am focusing only on the `CIR`
checks for now to keep the upstreaming incremental. OGCG/LLVM
verification can be added in a follow-up PR once the base tests land.*
Commit: 2407564cbfa18961f465e40ca0fb18fb754151c7
https://github.com/llvm/llvm-project/commit/2407564cbfa18961f465e40ca0fb18fb754151c7
Author: Victor Mustya <victor.mustya at intel.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/include/clang/Basic/OpenCLExtensions.def
M clang/test/SemaOpenCL/extension-version.cl
Log Message:
-----------
[Clang] Add missing extension cl_intel_split_work_group_barrier declaration (#184269)
All the OpenCL extensions must be declared in OpenCLExtensions.def,
otherwise the frontend won't recognize them and won't be able to use
them in the code. This patch adds the missing declaration for the
`cl_intel_split_work_group_barrier` extension.
Commit: 8decfb8a90dfcec032d717c195c5636b1fee7260
https://github.com/llvm/llvm-project/commit/8decfb8a90dfcec032d717c195c5636b1fee7260
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/lib/Conversion/ArithToEmitC/ArithToEmitCPass.cpp
M mlir/lib/Conversion/FuncToEmitC/FuncToEmitCPass.cpp
M mlir/test/Conversion/ArithToEmitC/arith-to-emitc-failed.mlir
A mlir/test/Conversion/FuncToEmitC/func-to-emitc-failed.mlir
Log Message:
-----------
[mlir][emitc] Do not convert illegal types to emitc (#156222)
This PR adds fallbacks for other types instead of converting unsupported
types to emitc.
Commit: 52f32d780fa2da1f5e54e80c91a0e79379e141d0
https://github.com/llvm/llvm-project/commit/52f32d780fa2da1f5e54e80c91a0e79379e141d0
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[Github] Bump Github Runner to v2.332.0 (#184230)
To stay ahead of the support horizon. There were no major feature
changes/bug fixes from a cursory glance at the release notes.
Commit: 92aa2d36f020952087068dee186568c33a77088d
https://github.com/llvm/llvm-project/commit/92aa2d36f020952087068dee186568c33a77088d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
Log Message:
-----------
[Github] Respect LLVM_VERSION when building windows container (#184231)
Otherwise setting LLVM_VERSION does not actually do anything. This
avoids needing to update ~8 different locations in the file when doing a
toolchain bump to just 1 place.
Commit: e63e55cae8ce29150f38a758555d9cc712a1cf4c
https://github.com/llvm/llvm-project/commit/e63e55cae8ce29150f38a758555d9cc712a1cf4c
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.h
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/RegisterOpenACCExtensions.cpp
A flang/test/Transforms/OpenACC/acc-recipe-materialization-firstprivate-derived.fir
A flang/test/Transforms/OpenACC/acc-recipe-materialization-firstprivate.fir
A flang/test/Transforms/OpenACC/acc-recipe-materialization-kernel-private.fir
A flang/test/Transforms/OpenACC/acc-recipe-materialization-parallel.fir
A flang/test/Transforms/OpenACC/acc-recipe-materialization-private.fir
A flang/test/Transforms/OpenACC/acc-recipe-materialization-reduction.fir
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsLoop.h
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/lib/Dialect/OpenACC/IR/OpenACCCG.cpp
A mlir/lib/Dialect/OpenACC/Transforms/ACCRecipeMaterialization.cpp
M mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsLoop.cpp
A mlir/test/Dialect/OpenACC/acc-recipe-materialization-firstprivate.mlir
A mlir/test/Dialect/OpenACC/acc-recipe-materialization-kernel-private.mlir
A mlir/test/Dialect/OpenACC/acc-recipe-materialization-parallel.mlir
A mlir/test/Dialect/OpenACC/acc-recipe-materialization-private.mlir
A mlir/test/Dialect/OpenACC/acc-recipe-materialization-reduction.mlir
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
Log Message:
-----------
[mlir][acc] Add ACCRecipeMaterialization pass and reduction ops (#184252)
Pass
----
Add the `acc-recipe-materialization` pass, which materializes OpenACC
privatization, firstprivate and reduction recipes by inlining their
init, copy, combiner, and destroy regions into the operation for the
construct. The pass runs on acc.parallel, acc.serial, acc.kernels, and
acc.loop.
- Firstprivate: Inserts acc.firstprivate_map so the initial value is
available on the device, then clones the recipe init and copy regions
into the construct and replaces uses with the materialized alloca.
Optional destroy region is cloned before the region terminator.
- Private: Clones the recipe init region into the construct (at region
entry or at the loop op for acc.loop private). Replaces uses of the
recipe result with the materialized alloca. Optional destroy region is
cloned before the region terminator.
- Reduction: Creates acc.reduction_init (init region inlined) and
acc.reduction_combine_region (combiner region inlined). All uses of the
reduction in the region are updated to the reduction init result.
New operations
--------------
- acc.reduction_init: Allocates and initializes a private reduction
variable from a recipe. Takes the original reduction variable and
reduction_operator; has a single region that must yield one value (the
private storage) via acc.yield. Used by the pass to materialize
acc.reduction_recipe init regions inside the compute construct.
- acc.reduction_combine_region: Combines the private reduction value
with the shared reduction variable. Takes the shared and private
memrefs; has a single region (the recipe combiner) terminated by
acc.yield with no operands. Used by the pass to materialize the
reduction recipe combiner.
Both ops implement RegionBranchOpInterface. acc.yield is updated to
allow terminating ReductionInitOp and ReductionCombineRegionOp regions.
Supporting changes
------------------
- OpenACCUtilsLoop: Factor cloneACCRegionInto out of the existing
loop-conversion helper so the pass can clone recipe regions with
optional result replacement; loop conversion now calls the shared
helper.
- Flang: Add ReductionInitOpFortranObjectViewModel
(FortranObjectViewOpInterface) for acc.reduction_init and register it in
OpenACC extensions.
Tests
-----
- MLIR: acc-recipe-materialization-{firstprivate,private,reduction,
kernel-private,parallel}.mlir (memref dialect).
- Flang: acc-recipe-materialization-{firstprivate,firstprivate-derived,
private,reduction,kernel-private,parallel}.fir; firstprivate test has a
second RUN with -acc-optimize-firstprivate-map.
---------
Co-authored-by: Scott Manley <rscottmanley at gmail.com>
Commit: 768240d019523a7887a0032948620d42129fae98
https://github.com/llvm/llvm-project/commit/768240d019523a7887a0032948620d42129fae98
Author: Shoreshen <372660931 at qq.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/ARM/ARMCallLowering.cpp
M llvm/lib/Target/M68k/GISel/M68kCallLowering.cpp
M llvm/lib/Target/M68k/GISel/M68kCallLowering.h
M llvm/lib/Target/Mips/MipsCallLowering.cpp
M llvm/lib/Target/PowerPC/GISel/PPCCallLowering.cpp
M llvm/lib/Target/PowerPC/GISel/PPCCallLowering.h
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/X86/GISel/X86CallLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f64.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/ashr64_reduce.ll
R llvm/test/CodeGen/AMDGPU/call-args-inreg-no-sgpr-for-csrspill-xfail.ll
A llvm/test/CodeGen/AMDGPU/call-args-inreg-no-sgpr-for-csrspill.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll
M llvm/test/CodeGen/AMDGPU/shl64_reduce.ll
M llvm/test/CodeGen/AMDGPU/srl64_reduce.ll
Log Message:
-----------
[AMDGPU] Insert readfirstlane for uniform VGPR arguments (#178198)
Fix inreg argument, which is uniform, but using VGPR due to run out of
SGPR.
---------
Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>
Commit: 6d25af00ac475e0b1f7d2b7a9ca24a223930a8d2
https://github.com/llvm/llvm-project/commit/6d25af00ac475e0b1f7d2b7a9ca24a223930a8d2
Author: Henrik G. Olsson <hnrklssn at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/display.py
Log Message:
-----------
[utils] use annotations from __future__ in lit (#184225)
Commit: 572a0e45c6375a34bef4cd43e30c226d5598fc5f
https://github.com/llvm/llvm-project/commit/572a0e45c6375a34bef4cd43e30c226d5598fc5f
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
AMDGPU: Remove "MBUF" from "loadMBUFScalarOperandsFromVGPR" (#184282)
There is nothing MBUF-specific about this function.
Commit: b23438661c1056bae385daba1501afb762d1e336
https://github.com/llvm/llvm-project/commit/b23438661c1056bae385daba1501afb762d1e336
Author: Jason Van Beusekom <jason.van-beusekom at hpe.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/include/clang/AST/ASTMutationListener.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/Frontend/MultiplexConsumer.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Serialization/ASTCommon.h
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/OpenMP/target_indirect_codegen.cpp
A clang/test/OpenMP/target_vtable_omp_indirect_call_lookup.cpp
M offload/test/api/omp_indirect_call_table_manual.c
A offload/test/api/omp_indirect_func_array.c
A offload/test/api/omp_indirect_func_basic.c
A offload/test/api/omp_indirect_func_struct.c
A offload/test/api/omp_virtual_func.cpp
A offload/test/api/omp_virtual_func_multiple_inheritance_01.cpp
A offload/test/api/omp_virtual_func_multiple_inheritance_02.cpp
A offload/test/api/omp_virtual_func_reference.cpp
Log Message:
-----------
[OpenMP][clang] Indirect and Virtual function call mapping from host to device (#159857)
This patch implements the CodeGen logic for calling __llvm_omp_indirect_call_lookup
on the device when an indirect function call or a virtual function call is made
within an OpenMP target region.
---------
Co-authored-by: Youngsuk Kim
Commit: 198f85ea7c17141f3cd46d0a69044aea52163677
https://github.com/llvm/llvm-project/commit/198f85ea7c17141f3cd46d0a69044aea52163677
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/CodeGenCXX/pfp-member-pointer-offsetof.cpp
Log Message:
-----------
[clang][bytecode] Fix newly added pfp test (#184137)
Do the same thing 370d7ce58011eccfab8105eddbc028cc09c4c5e5 did in
ExprConstant.cpp
Commit: 5a53fce8582b7d558d1e4406406ccc143b3a51ff
https://github.com/llvm/llvm-project/commit/5a53fce8582b7d558d1e4406406ccc143b3a51ff
Author: Kavin Gnanapandithan <kavin.balag at gmail.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
M llvm/test/CodeGen/RISCV/copysign-casts.ll
M llvm/test/CodeGen/RISCV/double-convert.ll
M llvm/test/CodeGen/RISCV/double-mem.ll
M llvm/test/CodeGen/RISCV/double-select-fcmp.ll
M llvm/test/CodeGen/RISCV/double-stack-spill-restore.ll
Log Message:
-----------
[RISCV] Extends RISCVMoveMerger to merge GPRPairs independent of even/odd pair instruction order. (#183657)
This PR addresses post-commit reviews in #182416
Previously, `RISCVMoveMerger` only identified and merged 32-bit moves
into a 64-bit GPRPair move if the even-indexed register most appeared
before the odd-index register move.
This patch extends the pass by disregarding the order of even/odd-index
pair.
Commit: a85dbcfe016d8cce9bfea0d9265f3f69c40572e7
https://github.com/llvm/llvm-project/commit/a85dbcfe016d8cce9bfea0d9265f3f69c40572e7
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode] Reject non-VarDecl DeclRefExprs (#184141)
I have no idea how to test this, but this is what the current
interpreter does.
Commit: da8929bd2404553954394d6b08ae2ad516aea650
https://github.com/llvm/llvm-project/commit/da8929bd2404553954394d6b08ae2ad516aea650
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel][mlir][acc] Port e63e55cae8ce29150f38a758555d9cc712a1cf4c (#184289)
Co-authored-by: Pranav Kant <prka at google.com>
Commit: eba4a76597dd1d655794cb5732ace534b58bd97d
https://github.com/llvm/llvm-project/commit/eba4a76597dd1d655794cb5732ace534b58bd97d
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M compiler-rt/test/cfi/icall/bad-signature.c
Log Message:
-----------
[CFI] Expand test to include minimal runtime (#183646)
`ubsan_minimal` contains some CFI tests, but it would be nice have one
on CFI side.
Commit: 30fc31aa71fa784c9b9e35452653003de93e1dbc
https://github.com/llvm/llvm-project/commit/30fc31aa71fa784c9b9e35452653003de93e1dbc
Author: Jaydeep Chauhan <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/include/llvm/TableGen/CodeGenHelpers.h
Log Message:
-----------
[NFC][TableGen] Add deleted copy operations for RAII guard classes (#184168)
Commit: 84d0f8766de29ee8e4b45f8cdd5278c503a0e20f
https://github.com/llvm/llvm-project/commit/84d0f8766de29ee8e4b45f8cdd5278c503a0e20f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M clang/lib/Headers/CMakeLists.txt
Log Message:
-----------
[RISCV] Alphabetize riscv_files in clang/lib/Headers/CMakeLists.txt. NFC (#184024)
Commit: 75b0cf39b2f85635b37b4be078f65c66e1c0e3d6
https://github.com/llvm/llvm-project/commit/75b0cf39b2f85635b37b4be078f65c66e1c0e3d6
Author: Qihan Cai <caiqihan021 at hotmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rv64p.ll
Log Message:
-----------
[RISCV] Add scalar saturating add/sub operations for i32 for RV64P (#184062)
Commit: 4ea39c43e1338a16cf165f234dd88b8ecb53dcd1
https://github.com/llvm/llvm-project/commit/4ea39c43e1338a16cf165f234dd88b8ecb53dcd1
Author: Junji Watanabe <watanabe0621 at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/utils/lit/lit/LitConfig.py
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/llvm/config.py
M llvm/utils/lit/tests/lit.cfg
M llvm/utils/lit/tests/shtest-readfile.py
M llvm/utils/llvm-lit/llvm-lit.in
Log Message:
-----------
[LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (#179865)
When building with `-DLLVM_WINDOWS_PREFER_FORWARD_SLASH=ON`, tools like
lld output paths with forward slashes on Windows. However, lit's default
substitutions (`%t`, `%p`) typically use backslashes on Windows, causing
FileCheck failures in tests that strictly match path separators.
This patch propagates the `LLVM_WINDOWS_PREFER_FORWARD_SLASH` build flag
to llvm-lit via `builtin_parameters`. It also updates lit's TestRunner
to respect the 'use_normalized_slashes' parameter. When enabled, lit
normalizes paths in substitutions to use forward slashes, ensuring that
test expectations align with the tool output.
With this fix, the number of failed tests with
`-DLLVM_WINDOWS_PREFER_FORWARD_SLASH=ON` changes as follow:
- The total number of failed tests: 303 -> 168
- Break down:
- `Builtins-i386-windows` tests: 99 -> 0
- `Clang` tests: 28 -> 5
- `Clang Tools` tests: 7 -> 1
- `LLVM` tests: 6 -> 4
- `lld` tests: 2 -> 0
- Other failed tests:
- `glang`: 1
- `Clang-Unit`: 5
- `Clangd`: 3
- `Clangd Unit Tests`: 150
- `LLVM-Unit`: 1
Commit: d20395cfa3bb5c4d3a7cc61f28dc4faa2dd57eba
https://github.com/llvm/llvm-project/commit/d20395cfa3bb5c4d3a7cc61f28dc4faa2dd57eba
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-02 (Mon, 02 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/test/CodeGen/AArch64/clmul-fixed.ll
M llvm/test/CodeGen/AArch64/clmul-scalable.ll
M llvm/test/CodeGen/PowerPC/clmul-vector.ll
M llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-clmul.ll
M llvm/test/CodeGen/X86/clmul-vector-256.ll
M llvm/test/CodeGen/X86/clmul-vector-512.ll
M llvm/test/CodeGen/X86/clmul-vector.ll
Log Message:
-----------
[LegalizeVectorOps][RISCV][PowerPC][AArch64][X86] Enable the clmul/clmulr/clmulh expansion code. (#184257)
These opcodes weren't added to the master switch statement that
determines if they should be considered vector ops.
Commit: e4def2d11fb5b482dd4614601fc8018c42a824b9
https://github.com/llvm/llvm-project/commit/e4def2d11fb5b482dd4614601fc8018c42a824b9
Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
Log Message:
-----------
[AMDGPU] Make the options consistent across 3 RA pipelines(NFC) (#184190)
Adding the missing option for the wwm-regalloc in the test
attr-amdgpu-flat-work-group-size-vgpr-limit.ll. The existing
test already specifies -sgpr-regalloc=fast & -vgpr-regalloc=fast
to ensure that the fast register allocator is preferred over
the default greedy allocator. For consistency, the same
preference should also be applied to the wwm-regalloc pipeline.
Commit: 0504af9e3bf76deea13c8a83928de36b3b816355
https://github.com/llvm/llvm-project/commit/0504af9e3bf76deea13c8a83928de36b3b816355
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Analysis/CmpInstAnalysis.cpp
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CAS/OnDiskCommon.cpp
M llvm/lib/CodeGen/RegisterClassInfo.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/LibraryScanner.cpp
M llvm/lib/IR/ConstantRange.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/Support/APFixedPoint.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/NewGVN.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/tools/llvm-dwarfdump/Coverage.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[llvm] Turn misc copy-assign to move-assign (#184143)
That's an automated patch generated from clang-tidy
performance-use-std-move as a follow-up to #184136
Commit: f67c2cd75e256af054919bee68886ebd51155b39
https://github.com/llvm/llvm-project/commit/f67c2cd75e256af054919bee68886ebd51155b39
Author: Luke Lau <luke at igalia.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave2.ll
M llvm/test/CodeGen/RISCV/rvv/vabd.ll
M llvm/test/CodeGen/RISCV/rvv/vabdu.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt.mir
Log Message:
-----------
[RISCV] Handle Zvabd and XRivosVizip EEWs in RISCVVLOptimizer (#184117)
This allows the VL optimizer to handle more cases that
RISCVVectorPeephole currently catches.
The XRivosVizip instructions have ReadsPastVL=true, so only the vl of
the zip instruction itself is reduced, not its inputs.
Commit: 78ac964c47cbdbc64e84c3230ba76fe774e8dd1b
https://github.com/llvm/llvm-project/commit/78ac964c47cbdbc64e84c3230ba76fe774e8dd1b
Author: quic_hchandel <hchandel at qti.qualcomm.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfoSFB.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/test/CodeGen/RISCV/opt-w-instrs.mir
Log Message:
-----------
[RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (#182456)
This NFC patch introduces two key updates:
- It replaces the `gpr` operand type with `sfb_rhs` for the `rhs`
operand in the short forward branch optimization pseudos. The `sfb_rhs`
type supports both register and immediate operands.
- It updates the pseudos to use branch opcodes instead of condition
codes, which were used prior to this change.
Together, these changes prepare the existing codebase to support short
forward branches that compare a register with an immediate value.
Currently, short forward branch support is limited to
register-to-register comparisons
Commit: 0fff939c1aa9eacabd9019b822e399a426ea97fa
https://github.com/llvm/llvm-project/commit/0fff939c1aa9eacabd9019b822e399a426ea97fa
Author: Adam Siemieniuk <adam.siemieniuk at intel.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/test/Dialect/Linalg/transform-lower-pack.mlir
M mlir/test/Dialect/Linalg/transform-tile-and-fuse-pack-unpack.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-unpack-mmt4d.mlir
Log Message:
-----------
[mlir][linalg] Lower unpack - capture handle to created copy op (#183744)
Adds missing copy op created to unpack lowering results. Corresponding
transform op is also updated with the new result value.
Commit: 7fb5a02dcda1018ccc462b114593eca400c3b528
https://github.com/llvm/llvm-project/commit/7fb5a02dcda1018ccc462b114593eca400c3b528
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
A clang/include/clang/AST/pch.h
M clang/lib/AST/CMakeLists.txt
Log Message:
-----------
[CMake][AST] Add PCH (#183358)
Add frequently used expensive headers from clang/AST to a PCH.
Results in a 13% stage2-clang build time improvement.
Commit: a631c3f4077cf84c90f9dfa98a9bdbc1e568f055
https://github.com/llvm/llvm-project/commit/a631c3f4077cf84c90f9dfa98a9bdbc1e568f055
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
Log Message:
-----------
[mlir][spirv] Expand verifier testing for spirv.Tosa ops (#184112)
Also keep test order aligned with op definition order.
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: ecb694de65e87a941f7a0cd658cef7016b0eaa77
https://github.com/llvm/llvm-project/commit/ecb694de65e87a941f7a0cd658cef7016b0eaa77
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
Log Message:
-----------
[Clang][NFCI] Initialize PredefinedNames immediately (#183295)
In isPredefinedUnsafeLibcFunc the set of predefined names is initialized
lazily. However, this pattern is redundant as function-scope static
variables are initialized on first pass through the control flow. This
commit makes the variable constant, makes it a non-heap object, and
initializes it immediately. This has the following benefits:
- The initialization pattern cleaner and potentially easier for the
compiler to optimize.
- Making the variable const avoids it being used as mutable global
state.
- Having immediate initialization removes a potential race condition.
Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
Commit: b67536954eb1ce439b203073ba297f557a153eaa
https://github.com/llvm/llvm-project/commit/b67536954eb1ce439b203073ba297f557a153eaa
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/include/clang/Basic/TargetCXXABI.h
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/RangedConstraintManager.h
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Basic/Targets/AVR.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/ModuleBuilder.cpp
M clang/lib/Driver/Distro.cpp
M clang/lib/Options/DriverOptions.cpp
M clang/lib/Sema/SemaOpenACCClauseAppertainment.cpp
M clang/lib/StaticAnalyzer/Checkers/ErrnoModeling.cpp
M clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
Log Message:
-----------
[Clang][NFCI] Make unchanged global state const (#183478)
To avoid modifications to global state that does not currently need to
be modified, this patch makes a selection of trivial cases const. This
aims to help preserve the intention of these variables and reduce the
potential mutable global state surface of clang.
---------
Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
Commit: 9cda40735a17194fec9cac9689dd5acf1eb1a44f
https://github.com/llvm/llvm-project/commit/9cda40735a17194fec9cac9689dd5acf1eb1a44f
Author: Weibo He <NewSigma at 163.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaCoroutine.cpp
A clang/test/CodeGenCoroutines/coro-gro3.cpp
Log Message:
-----------
[clang][Sema] Fix initialization of GRO when GRO-return type mismatches (CWG2563) (#179156)
This patch implements one piece of proposed solution to
[CWG2563](https://cplusplus.github.io/CWG/issues/2563.html):
> get-return-object-invocation is as follows:
> ...
> otherwise, get-return-object-invocation initializes a variable with
the exposition-only name gro as if by
> decltype(auto) gro = promise.get_return_object();
Close #98744
Commit: eb1e808fdb44fee0cb8beea0ea8f162b82e8d92f
https://github.com/llvm/llvm-project/commit/eb1e808fdb44fee0cb8beea0ea8f162b82e8d92f
Author: Gergo Stomfai <stomfaig at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/CodeGen/X86/AMX/amx-low-intrinsics-no-amx-bitcast.ll
M llvm/test/CodeGen/X86/AMX/amx-low-intrinsics.ll
M llvm/test/Transforms/SLPVectorizer/X86/extracts-non-extendable.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-load-reduced-as-part-of-bv.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
M llvm/test/Transforms/SLPVectorizer/reduction-gather-non-scheduled-extracts.ll
M llvm/unittests/Analysis/ValueTrackingTest.cpp
Log Message:
-----------
[IR] Mark reduction intrinsics as nocreateundeforpoison (#184173)
In investigating #156233, it came up that select folds like here:
https://alive2.llvm.org/ce/z/Y6jzj6 cannot be carried out, or easily
fixed for now, because integer reductions do not propagate noundef, even
if their arguments are noundef. This patch adds this propagation.
Commit: 0933b634c6a272e5f5ed53da21118eecb15ee940
https://github.com/llvm/llvm-project/commit/0933b634c6a272e5f5ed53da21118eecb15ee940
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
Log Message:
-----------
[AMDGPU] IGroupLP: Refactor SchedGroup::initSchedGroup (NFC) (#184122)
There are three overloaded SchedGroup::initSchedGroup functions, two of
which are only used for specific types of SchedGroups, namely
SCHED_BARRIER and SCHED_GROUP_BARRIER. This seems to have a led to some
confusion since the different functions perform checks which are not
needed for their intended restricted use cases. Furthermore, there are
several wrong comments surrounding those functions.
Simplify the functions and inline the actual initialization parts of the
SCHED_BARRIER and SCHED_GROUP_BARRIER variants at their only call sites.
Extract a function that finds the candidate SUnits for a given
SchedGroup and use this instead of initSchedGroup. Fix comments.
Commit: 92bd6eee4db36d931f5c0ca7c9614a22c9b08a63
https://github.com/llvm/llvm-project/commit/92bd6eee4db36d931f5c0ca7c9614a22c9b08a63
Author: Volodymyr Turanskyy <vturanskyy at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/src/stdio/baremetal/CMakeLists.txt
A libc/src/stdio/baremetal/fflush.cpp
A libc/src/stdio/baremetal/file_internal.cpp
M libc/src/stdio/baremetal/file_internal.h
M libc/src/stdio/baremetal/getc.cpp
A libc/src/stdio/baremetal/ungetc.cpp
M libc/src/stdio/baremetal/vfscanf_internal.h
Log Message:
-----------
[libc] Reland add getc, ungetc, fflush to enable libc++ iostream on baremetal (#183556)
After https://github.com/llvm/llvm-project/pull/168931 landed getc,
ungetc and fflush are still missing at link time while trying to make
libc++ std::cout work with LLVM libc on baremetal.
ungetc implementation is very minimal only to cover the current standard
streams implementation from the patch above.
The original PR https://github.com/llvm/llvm-project/pull/175530 caused
build failure on Windows because of too long command line in the
generated *.bat file which was fixed by
https://github.com/llvm/llvm-project/issues/182374
Commit: c4e2f79c22d2e22564cba60a7f4c1b126d6dfad9
https://github.com/llvm/llvm-project/commit/c4e2f79c22d2e22564cba60a7f4c1b126d6dfad9
Author: David Green <david.green at arm.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/srem-vec-crash.ll
Log Message:
-----------
[AArch64][GlobalISel] Limit srem by const of small sizes. (#184066)
The code in SignedDivisionByConstantInfo::get can only handle bitwidths
>= 3. This adds a check for bitwidth==1 for urem too, although it will
already have been simplified.
Commit: 09217ba90459efe47c2309ab51b168a869f377d3
https://github.com/llvm/llvm-project/commit/09217ba90459efe47c2309ab51b168a869f377d3
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M lldb/test/API/lang/cpp/template/TestTemplateArgs.py
M lldb/test/API/python_api/event/TestEvents.py
M lldb/test/API/python_api/type/TestTypeList.py
Log Message:
-----------
[lldb] Disable shared build for TestTemplateArgs,TestEvents,TestTypeList (#184304)
See https://github.com/llvm/llvm-project/pull/181720
Commit: 39f2740faceafb5bb9fc2ad799eb17135faa1a38
https://github.com/llvm/llvm-project/commit/39f2740faceafb5bb9fc2ad799eb17135faa1a38
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
Log Message:
-----------
[AMDGPU] IGroupLP: Avoid repeating reachability checks in greedy algorithm (#182463)
In the greedy pipeline solver, the group cost is found using the
addEdges function and the edges must be removed from the DAG after
processing each group. The best group edges are then reinserted using
the same function. This repeats the costly reachability checks inside
the function which become problematic for pipelines with many
SchedGroups.
The algorithm is changed to remember the best group edges instead of
recomputing them. Additionally, SchedGroup::tryAddEdge is refactored to
avoid a redundant cycle check which is already performed by DAG->addEdge.
Commit: b4743b2641b60fc0f577657be4ee884461e46e33
https://github.com/llvm/llvm-project/commit/b4743b2641b60fc0f577657be4ee884461e46e33
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Introduce VPlan::get(Zero|AllOnes) (NFC) (#184085)
Commit: 5d8c6c198ddefc6b63449fd66b99b83e929da15c
https://github.com/llvm/llvm-project/commit/5d8c6c198ddefc6b63449fd66b99b83e929da15c
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Mention allocation elision (#177592)
allockind / alloc-family enable allocation elision, but this was not
previously mentioned by LangRef.
Related discussion:
https://discourse.llvm.org/t/rfc-clarifying-semantic-assumptions-for-custom-allocators/89469
The semantics here are specified in terms of allowed transforms.
Making the semantics operational is tracked in #184102.
Commit: b4fffcd8e4157b72a19393ff2c2b5fcc5f51bae2
https://github.com/llvm/llvm-project/commit/b4fffcd8e4157b72a19393ff2c2b5fcc5f51bae2
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/docs/NVPTXUsage.rst
Log Message:
-----------
[NFC][Docs] Add documentation for NVPTX conversion intrinsics (#175536)
This change adds documentation for the NVPTX narrow floating-point
conversion intrinsics.
PTX ISA Reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cvt
Commit: 8879ff136c73c201d48d5334a0729d7817a7c643
https://github.com/llvm/llvm-project/commit/8879ff136c73c201d48d5334a0729d7817a7c643
Author: Fuad Ismail <fuad1502 at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
A llvm/test/CodeGen/MIR/Generic/machine-function-empty-name-no-ir-section.mir
A llvm/test/CodeGen/MIR/Generic/machine-function-empty-name-no-matching-ir.mir
A llvm/test/CodeGen/MIR/Generic/machine-function-empty-name.mir
Log Message:
-----------
Support unnamed functions in MIR parser (#183018)
In this PR, unnamed machine functions in an MIR file are associated with
anonymous functions in the embedded LLVM IR according to the order in
which they are specified. If there are more unnamed machine functions
then there are LLVM IR functions, the parsing will fail by reporting the
original error message of `function ‘’ isn’t defined in the provided
LLVM IR`.
Closes #36511
Commit: 91e73b93e881c585b353afc43b8353dc6fda1fe6
https://github.com/llvm/llvm-project/commit/91e73b93e881c585b353afc43b8353dc6fda1fe6
Author: Artem Kroviakov <71938912+akroviakov at users.noreply.github.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/test/Dialect/XeGPU/resolve-layout-conflicts.mlir
Log Message:
-----------
[MLIR][XeGPU] Allow uniform vectors in layout conflict resolution (#183756)
Commit: 4d3bdc0f89475ad5064eb992494be2e3789ae851
https://github.com/llvm/llvm-project/commit/4d3bdc0f89475ad5064eb992494be2e3789ae851
Author: David Spickett <david.spickett at arm.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M lldb/source/Commands/CommandObjectWatchpoint.cpp
Log Message:
-----------
[lldb] Use AppendMessageWithFormatv in ComandObjectWatchpoint (#184128)
All of the AppendMessage... methods of CommandReturnObject automatically
add a newline, apart from AppendMessageWithFormat. This gets very
confusing when reviewing changes to commands.
While there are use cases for building a message as you go, controlling
when the newline is emitted, a lot of calls to AppendMessageWithFormat
include a newline at the end of the format string.
Such as in the watchpoint commands. So I've converted them to equivalent
AppendMessageWithFormatv calls so that:
* They have the less surprising behaviour re. newlines.
* They are in many cases more readable than the printf style notation.
Commit: d1c563beee794b3a967786fd07c437ffc66fb7f0
https://github.com/llvm/llvm-project/commit/d1c563beee794b3a967786fd07c437ffc66fb7f0
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M lldb/unittests/Target/CMakeLists.txt
Log Message:
-----------
[lldb] Don't link TestingSupport as a component (#184310)
This doesn't work with dylib builds, because TestingSupport is not part
of the dylib. Instead, we should link it via LINK_LIBS, like other tests
already do.
Commit: 5e814e26dd72d14ac1118a647210294d38c8d01e
https://github.com/llvm/llvm-project/commit/5e814e26dd72d14ac1118a647210294d38c8d01e
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/lib/Dialect/LLVMIR/Transforms/InlinerInterfaceImpl.cpp
M mlir/test/Dialect/LLVMIR/inlining.mlir
Log Message:
-----------
[mlir][llvm] Fix crash in LLVM inliner when callee has no recognized terminator (#183949)
When the callee of an llvm.call has a body block ending with an
unregistered op (rather than a recognized LLVM terminator like
llvm.return), the LLVM inliner's handleTerminator method was called with
that unregistered op and crashed via a cast<LLVM::ReturnOp>() assertion
or use-after-erase due to unresolved call result uses.
The root cause is that the generic MLIR verifier conservatively treats
unregistered ops as potential terminators (using mightHaveTrait), so
malformed IR of this shape passes verification. The inliner, however,
assumes that the callee's terminator is a recognized LLVM op.
Fix by adding a guard in LLVMInlinerInterface::isLegalToInline() that
refuses to inline a callee containing any block whose last operation
does not have the IsTerminator trait. This prevents the crash and leaves
the call site intact without any IR mutation.
Fixes #108363
Fixes #118766
Commit: 03a9ebc8974bb45d9a48c9016faaf3bb92a1f41b
https://github.com/llvm/llvm-project/commit/03a9ebc8974bb45d9a48c9016faaf3bb92a1f41b
Author: Shekhar <95859857+levi42x at users.noreply.github.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/X86/known-never-zero.ll
Log Message:
-----------
[DAG] isKnownNeverZero - add ISD::UADDSAT/UMAX/UMIN DemandedElts handling and tests (#183992)
Fixes #183038
Adds `isKnownNeverZero` support for `UADDSAT`, `UMAX`, and `UMIN`. This
allows the compiler to prove a vector result is _non-zero_ by analyzing
only the demanded lanes of its operands.
Commit: 0b36d4265e301699aef184e0405da35e4c2461e5
https://github.com/llvm/llvm-project/commit/0b36d4265e301699aef184e0405da35e4c2461e5
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/include/llvm/CodeGen/RuntimeLibcallUtil.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/veclib-llvm.pow.ll
M llvm/test/CodeGen/ARM/pow.ll
M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/armpl.ll
Log Message:
-----------
[AArch64] Add vector expansion support for ISD::FCBRT when using ArmPL (#183750)
This patch teaches the backend how to lower the FCBRT DAG node to the
vector math library function when using ArmPL. This is similar to what
we already do for llvm.pow/FPOW, however the only way to expose this is
via a DAG combine that converts
FPOW(<2 x double> %x, <2 x double> <double 1.0/3.0, double 1.0/3.0>)
into
FCBRT(<2 x double> %x)
when the appropriate fast math flags are present on the node. I've
updated the DAG combine to handle vector types and only perform the
transformation if there exists a vector library variant of cbrt.
Commit: 245887e343d37309f2ce7f728ebd4c71dc9ee4e6
https://github.com/llvm/llvm-project/commit/245887e343d37309f2ce7f728ebd4c71dc9ee4e6
Author: Aadarsh Keshri <120744385+Aadarsh-Keshri at users.noreply.github.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
A llvm/test/CodeGen/X86/veclib-llvm.sincos.ll
Log Message:
-----------
[X86] Added sincos vector lib codegen test coverage (#183702)
Added veclib-llvm.sincos.ll tests for amdlibm and libmvec
Fixes #182847
Commit: 36cced2b8244517778a9b097bd2b60f5b1e690e4
https://github.com/llvm/llvm-project/commit/36cced2b8244517778a9b097bd2b60f5b1e690e4
Author: Nashe Mncube <nashe.mncube at arm.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
R llvm/test/tools/llvm-mca/AArch64/Apple/Inputs/basic-instructions.s
R llvm/test/tools/llvm-mca/AArch64/Apple/Inputs/neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Apple/M1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Apple/M1-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Cortex/A57-basic-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/basic-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/bf16-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/complxnum-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/fp16fml-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/fptoint-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/i8mm-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/mte-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/neon-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/rcpc-immo-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/sve-instructions.s
R llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/basic-instructions.s
R llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/bf16-instructions.s
R llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/complxnum-instructions.s
R llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/fp16fml-instructions.s
R llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/fptoint-instructions.s
R llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/i8mm-instructions.s
R llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/mte-instructions.s
R llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/neon-instructions.s
R llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/rcpc-immo-instructions.s
R llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/sve-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N1-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-bf16-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-complxnum-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-fp16fml-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-fptoint-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-i8mm-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-mte-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-rcpc-immo-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-sve-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-bf16-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-complxnum-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-fp16fml-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-fptoint-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-i8mm-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-mte-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-rcpc-immo-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-sve-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-bf16-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-complxnum-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-fp16fml-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-i8mm-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-rcpc-immo-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-bf16-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-complxnum-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-fp16fml-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-fptoint-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-i8mm-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-mte-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-rcpc-immo-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-sve-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-bf16-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-complxnum-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-fp16fml-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-fptoint-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-i8mm-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-mte-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-rcpc-immo-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-sve-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-bf16-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-complxnum-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-fp16fml-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-fptoint-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-i8mm-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-rcpc-immo-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-sve-instructions.s
Log Message:
-----------
[NFC][AArch64] Refactor Arm llvm-mca tests (#183294)
This patch refactors the llvm-mca tests for AArch64 targets
which make use of the shared "Neoverse/Inputs" directory. For the
sake of making scaling easier, the "Inputs" directory is now on the
toplevel at llvm-mca/AArch64 and all tests referencing this directory
are rewritten to use the new path.
Commit: 6ee48f2ce747c4c9a5371a5746176fd52373de96
https://github.com/llvm/llvm-project/commit/6ee48f2ce747c4c9a5371a5746176fd52373de96
Author: Luke Lau <luke at igalia.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/test/CodeGen/RISCV/rvv/vl-opt.ll
Log Message:
-----------
[RISCV] Remove VL != 1 restriction in RISCVVLOptimizer (#184298)
This was added way back in #112228 when the VLs were reduced in-situ,
and returning false in isSupportedInstr could trim the number of
instructions processed.
However after #124530 the demanded VLs are all computed beforehand as an
analysis so this is no longer an optimization.
This also removes the diff in rvv-peephole-vmerge-vops.ll in #184297
Commit: 263a22e8655664e8b05e212114887ad7d06c67e5
https://github.com/llvm/llvm-project/commit/263a22e8655664e8b05e212114887ad7d06c67e5
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
A mlir/test/Dialect/XeGPU/xegpu-propagate-layout-invalid.mlir
Log Message:
-----------
[mlir][xegpu] Fix crash in XeGPUPropagateLayout when module has llvm.func (#183899)
updateFunctionOpInterface() called
funcOp.setType(FunctionType::get(...)) on every FunctionOpInterface
operation, including llvm.func. However, llvm.func stores its type as
LLVMFunctionType, not the standard FunctionType. Calling
setType(FunctionType{}) on it corrupts the function_type attribute, and
the next call to getFunctionType() (which tries to
cast<LLVMFunctionType> the stored attribute) aborts.
Fix by skipping functions whose type is not a standard FunctionType.
XeGPU layout propagation only applies to functions using MLIR's
FunctionType; other function types (like LLVMFunctionType) are not
expected to carry XeGPU layouts.
Fixes #177846
Fixes #177777
Fixes #181970
Commit: ecec7920c636082708b80d6a603e8d5d7eb5b0a7
https://github.com/llvm/llvm-project/commit/ecec7920c636082708b80d6a603e8d5d7eb5b0a7
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/Func/IR/FuncOps.td
M mlir/lib/Dialect/Func/IR/FuncOps.cpp
M mlir/test/Conversion/FuncToLLVM/func-memref-return.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm-32b.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
M mlir/test/Dialect/EmitC/invalid_types.mlir
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Dialect/Linalg/invalid.mlir
M mlir/test/Dialect/NVGPU/invalid.mlir
M mlir/test/Dialect/SparseTensor/invalid.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Vector/invalid.mlir
M mlir/test/Transforms/print-op-graph.mlir
M mlir/test/Transforms/test-dialect-conversion-pdll.mlir
M mlir/test/Transforms/test-legalizer.mlir
M mlir/test/Transforms/test-merge-blocks.mlir
M mlir/test/Transforms/test-pattern-selective-replacement.mlir
Log Message:
-----------
[mlir][func] Move return-type verification from ReturnOp to FuncOp (#184153)
Move the operand count and type checks for func.return from
ReturnOp::verify() into a new FuncOp::verify(). The verifier iterates
all blocks in the callable region, skipping terminators that are not
func.return (e.g. llvm.return or test.return that may appear during
dialect conversion).
Fix several invalid-IR tests that had func.func return types
inconsistent with the actual func.return operands. Previously these
mismatches were silent because block verification stopped at an earlier
expected error before reaching the func.return; now that
FuncOp::verify() runs before body verification, the return types must be
consistent.
Commit: 7856e98768087e0381b2f700bed544324ecd0984
https://github.com/llvm/llvm-project/commit/7856e98768087e0381b2f700bed544324ecd0984
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/uArch/IntelGpuXe2.h
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToWiDistributeExperimental.cpp
A mlir/test/Dialect/XeGPU/xegpu-subgroup-distribute-no-arch.mlir
Log Message:
-----------
[mlir][XeGPU] Fix crash in getUArch when no chip target attribute is set (#183912)
When running --xegpu-subgroup-distribute (or --xegpu-propagate-layout)
on a gpu.func that lacks a chip target attribute, getChipStr() returns
std::nullopt and the callers pass an empty string to getUArch(). This
function used llvm_unreachable for unrecognised architecture names,
causing an immediate abort instead of gracefully skipping the operation.
Fix by:
1. Changing getUArch() to return nullptr for unknown arch names instead
of calling llvm_unreachable.
2. Adding null-pointer guards to all callers in XeGPUPropagateLayout.cpp
that were missing them. The callers in XeGPUSubgroupDistribute.cpp
already had null checks but they were unreachable due to the unreachable
call.
Add a regression test that runs --xegpu-subgroup-distribute on a
gpu.func without any chip attribute and verifies it no longer crashes.
Fixes #181531
Fixes #179167
Commit: a8a5242bb2dc2949e148e7000230d479be321def
https://github.com/llvm/llvm-project/commit/a8a5242bb2dc2949e148e7000230d479be321def
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
Log Message:
-----------
[mlir][XeGPU] Fix crash in wg-to-sg type converter on non-XeGPU tensors (#183914)
The SCF structural type conversion in XeGPUWgToSgDistributePass
registered a RankedTensorType conversion callback that unconditionally
called VectorType::get() on the tensor's shape. If the tensor had
dynamic dimensions (e.g. tensor<?xi32>) and no XeGPU layout encoding,
getSgShapeAndCount() returned the original shape intact (including the
kDynamic sentinel value), causing VectorType::get() to abort because
VectorType does not support dynamic sizes.
Fix by checking whether the RankedTensorType carries an XeGPU LayoutAttr
encoding before attempting the conversion. Plain tensors without such an
encoding are left unchanged (std::nullopt causes the passthrough
converter to handle them).
Add a regression test for the no-encoding / dynamic-tensor case.
Fixes #182999
Commit: bbd5b1d3bd073c239b36359932c3049b0d5c83bd
https://github.com/llvm/llvm-project/commit/bbd5b1d3bd073c239b36359932c3049b0d5c83bd
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/test/Conversion/VectorToXeGPU/store-to-xegpu.mlir
Log Message:
-----------
[mlir][VectorToXeGPU] Fix crash on memref with non-scalar element type (#183905)
The vector.store and vector.load lowering in --convert-vector-to-xegpu
would crash when the source memref had a non-integer/float element type
(e.g. memref<?xvector<4xf32>>).
The crash occurred inside createNdDescriptor() when computing the byte
offset for dynamic memrefs: srcTy.getElementTypeBitWidth() internally
calls getIntOrFloatBitWidth() which asserts on non-scalar types such as
vector<4xf32>.
Fix by adding a check for the memref's element type in
storeLoadPreconditions(). If the element type is not an integer or
float, the pattern returns notifyMatchFailure() instead of proceeding
and crashing.
The same guard is applied to TransferReadLowering and
TransferWriteLowering which share the same helper and can hit the same
path.
Fixes #181463
Commit: 8d082c7c3144c0a635031387bf7bf6d60960ab9e
https://github.com/llvm/llvm-project/commit/8d082c7c3144c0a635031387bf7bf6d60960ab9e
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorConversion.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenUtils.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenUtils.h
A mlir/test/Dialect/SparseTensor/conversion_invalid.mlir
Log Message:
-----------
[mlir][sparse] Fix crash in sparse_tensor.new with unsupported element type (#183898)
sparse_tensor.new with an element type not supported by the sparse
tensor runtime library (e.g. `index`) would call primaryTypeEncoding(),
which hits an llvm_unreachable("Unknown primary type"). The runtime
library only supports fixed-width types (f64/f32/f16/bf16,
i64/i32/i16/i8, and complex<f32/f64>); platform-dependent types such as
`index` have no corresponding PrimaryType encoding.
Fix by adding an isValidPrimaryType() helper and checking it in
SparseTensorNewConverter::matchAndRewrite() before calling genReader(),
so the conversion fails gracefully instead of crashing.
Fixes #180310
Commit: 6884ff014277bed5b09cd6fb794fed53b09dce37
https://github.com/llvm/llvm-project/commit/6884ff014277bed5b09cd6fb794fed53b09dce37
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
A mlir/test/Dialect/SparseTensor/sparse_foreach_rank0.mlir
Log Message:
-----------
[mlir][sparse] Fix crash in ForeachRewriter for rank-0 dense tensors (#183903)
sparse_tensor.foreach over a rank-0 (scalar) dense tensor crashed
because ForeachRewriter delegated entirely to LoopEmitter, which builds
one loop level per tensor dimension. For rank-0 tensors no loops are
created, so getValPosits() called std::vector::back() on an empty
container.
Add a rank-0 early-return path in ForeachRewriter::matchAndRewrite that
handles dense scalar tensors directly: bufferize the input to a rank-0
memref, load the single element with empty indices, then inline the body
block exactly once. Reduction block-argument values in the yield are
remapped to their post-inline equivalents before the block is inlined to
avoid dangling references.
Sparse rank-0 tensors are left as a notifyMatchFailure (genuinely
unsupported, no crash).
Fixes #177856
Commit: f934db36aa2606054b3e73af7258df3fd8ccdb64
https://github.com/llvm/llvm-project/commit/f934db36aa2606054b3e73af7258df3fd8ccdb64
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
M mlir/test/Dialect/SparseTensor/invalid_encoding.mlir
Log Message:
-----------
[mlir][sparse] Reject dense level after non-unique level in encoding verifier (#184157)
The sparse tensor iteration model for dense levels requires exactly one
parent position to linearize into a contiguous range. However, when a
non-unique level (e.g. compressed(nonunique)) precedes a dense level,
the DedupIterator provides a two-element cursor {posLo, segHi}, causing
DenseLevel::peekRangeAt to assert and crash with:
Assertion `parentPos.size() == 1 && "Dense level can not be
non-unique."'
Fix this by adding a check in SparseTensorEncodingAttr::verify that
rejects any encoding where a dense level directly follows a non-unique
level, emitting a proper diagnostic instead of crashing during lowering.
Fixes #130008
Commit: ee8259dcca82849735225c8ea1b215ed7fef7648
https://github.com/llvm/llvm-project/commit/ee8259dcca82849735225c8ea1b215ed7fef7648
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparseSpaceCollapse.cpp
M mlir/test/Dialect/SparseTensor/sparse_space_collapse.mlir
Log Message:
-----------
[mlir][sparse] Fix use-after-free crash in SparseSpaceCollapsePass (#184001)
The `SparseSpaceCollapsePass::runOnOperation()` was calling
`collapseSparseSpace()` inside the `func->walk(...)` callback. The
collapse erases the outer `IterateOp` (and all its nested ops including
inner `ExtractIterSpaceOp`s), while the walk iterator still holds a
reference to one of those nested ops as its current position. The walk
then tries to advance to the next op, which has already been freed,
causing a segfault.
Fix this by collecting all collapsable groups during the walk without
mutating the IR, then processing them after the walk completes.
Fixes #130021
Commit: a368bd4049db226f093a688b15153a3a6bfb2ee9
https://github.com/llvm/llvm-project/commit/a368bd4049db226f093a688b15153a3a6bfb2ee9
Author: sweiglbosker <stefan at s00.xyz>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
A clang/test/CIR/CodeGenCUDA/kernel-args.cu
Log Message:
-----------
[CIR][CUDA]: Handle duplicate mangled names (#183976)
Replace the NYI for duplicate function defs with the proper diagnostic
logic from OG codegen.
Related: #175871, #179278
Commit: ec7f3503f8d0a927d166b1c608b94e9cae3b0a86
https://github.com/llvm/llvm-project/commit/ec7f3503f8d0a927d166b1c608b94e9cae3b0a86
Author: sweiglbosker <stefan at s00.xyz>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/test/Interfaces/LoopLikeInterface/test-block-loop.mlir
M mlir/test/lib/Interfaces/LoopLikeInterface/TestBlockInLoop.cpp
Log Message:
-----------
[MLIR] Make test-block-is-in-loop pass a module pass (#184036)
This pass can't run in parallel on function as it would trigger race conditions.
Fixes #183999
Commit: d908184487b9d99b249d4238453e91203492888a
https://github.com/llvm/llvm-project/commit/d908184487b9d99b249d4238453e91203492888a
Author: David Green <david.green at arm.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/arm64-neon-select_cc.ll
Log Message:
-----------
[AArch64] Limit support to f32 and f64 in performSelectCombine (#184315)
This prevents a crash with fp128 types, other types (f16) were already
excluded.
Fixes #184300
Commit: 703649554da8f7b92873d21da7f3c51fbc7112ed
https://github.com/llvm/llvm-project/commit/703649554da8f7b92873d21da7f3c51fbc7112ed
Author: Shekhar <95859857+levi42x at users.noreply.github.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/X86/known-never-zero.ll
Log Message:
-----------
[DAG] isKnownNeverZero - add ISD::OR DemandedElts handling (#183228)
This patch updates `SelectionDAG::isKnownNeverZero` to support `ISD::OR`
by forwarding the `DemandedElts` mask to its operands.
Previously, `ISD::OR` dropped the mask, causing the compiler to be
overly conservative if any lane in the vector was zero, even if that
lane wasn't demanded. This change allows the compiler to prove a vector
result is non-zero even if ignored lanes are zero.
Fixes #183037
**Tests:**
- Moved tests from the C++ file to the IR assembly file
(`known-never-zero.ll`) as requested.
- Confirmed the code now correctly tracks which parts of a vector are
actually needed for `ISD::OR`.
- This allows the compiler to prove a result is "never zero" even if
some unused lanes contain zeros.
Commit: fa6eef837831ee6744e6baf0398104f374070470
https://github.com/llvm/llvm-project/commit/fa6eef837831ee6744e6baf0398104f374070470
Author: Lewis Crawford <lcrawford at nvidia.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll
M llvm/test/CodeGen/ARM/fminmax-folds.ll
M llvm/test/CodeGen/X86/fmaxnum.ll
M llvm/test/CodeGen/X86/fminnum.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
M llvm/test/Transforms/InstSimplify/ConstProp/min-max.ll
M llvm/test/Transforms/InstSimplify/fminmax-folds.ll
Log Message:
-----------
Revert "Avoid maxnum(sNaN, x) optimizations / folds (#170181)" (#184125)
This reverts commit ea3fdc5972db7f2d459e543307af05c357f2be26.
Re-enable const-folding for maxnum/minnum in the middle-end, GlobalISel,
and SelectionDAG.
Re-enable optimizations that depend on maxnum/minnum sNaN semantics in
InstCombine and DAGCombiner.
Now that maxnum(x, sNaN) is specified to non-deterministically produce
either NaN or x, these constant-foldings and optimizations are now valid
again according to the newly clarified semantics in #172012 .
Commit: de69348f80f5498c5a42e6fd347ba18239c498a5
https://github.com/llvm/llvm-project/commit/de69348f80f5498c5a42e6fd347ba18239c498a5
Author: Maria Fernanda Guimarães <66797940+mafeguimaraes at users.noreply.github.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/include/clang/APINotes/APINotesReader.h
M clang/lib/APINotes/APINotesManager.cpp
M clang/lib/APINotes/APINotesReader.cpp
Log Message:
-----------
[Reland] [APINotes] Refactor APINotesReader to propagate llvm::Error (#184212)
Reland of #183812 with the explicit `std::move` restored to fix buildbot
failures on older compilers.
Commit: 97043e50ad41c9da94a5cb48417f5139d6a84c8d
https://github.com/llvm/llvm-project/commit/97043e50ad41c9da94a5cb48417f5139d6a84c8d
Author: Artem Gindinson <gindinson at roofline.ai>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/test/Dialect/Vector/vector-warp-distribute.mlir
Log Message:
-----------
[mlir][Vector][GPU] Distribute expanding `shape_cast` ops (#183830)
The initial implementation of `shape_cast` distribution only focused on
scenarios with collapsing shape casts. Within downstream pipelines such
as IREE, commit 962a9a3 exposes an issue with this implementation, where
the rank-expanding cast ops (stemming from the new `vector.broadcast`
canonicalization) silently fall through to the "collapsing-or-no-op"
logic. This brings about bugs with rank mismatches and firing validation
assertions when distributing rather common reshaping sequences
encountered after CSE/ canonicalization, such as below:
```
// Example 1: gather op
%weight = arith.constant dense_resource<__elided__> : tensor<256xi8>
%c0 = arith.constant 0 : index
...
%expand = vector.shape_cast <...> : vector<1xindex> to vector<1x1xindex>
%gather = vector.gather %weight[%c0] [%expand], <...>, <...> : memref<256xi8>, vector<1x1xindex>, vector<1x1xi1>, vector<1x1xi8> into vector<1x1xi8>
%collapse_back = vector.shape_cast %gather : vector<1x1xi8> to vector<1xi8>
// Example 2: multi-reduction
%expand = vector.shape_cast <...>: vector<1x96xi32> to vector<1x2x48xi32>
%reduce = vector.multi_reduction <add>, %expand, <...> [1, 2]: vector<1x2x48xi32> to vector<1x1xi32>
%collapse = vector.shape_cast %reduce : vector<1x1xi32> to vector<1xi32>
```
This commit adds initial handling of expanding `shape_cast`s, going
through the three scenarios:
- if all "excess" dimensions in the front of the destination shape are
unit, it's clear that the work is not distributed across those, so we
strip the same number of unit dimensions from the per-lane yielded type;
- if the source type within the warp code is of rank 1, we still
determine the corresponding output type cleanly by multiplying the
dimensions of the per-lane yield type;
- if neither of the above are true, explicitly fail the pattern for such
expanding `shape_cast`'s. Dimension-specific distribution parameters are
deemed ambiguous, at least from within this pattern's context.
---------
Signed-off-by: Artem Gindinson <gindinson at roofline.ai>
Commit: 534d6e887ff815cdba5f9e2784b6b432faac25c1
https://github.com/llvm/llvm-project/commit/534d6e887ff815cdba5f9e2784b6b432faac25c1
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
Log Message:
-----------
[Analysis][NFC] Store CallbackVH in vector, not in map (#184323)
This avoid non-trivial move operations whenever the map grows.
Commit: 33864efe461e6c71545b009d1a394d2b756784f8
https://github.com/llvm/llvm-project/commit/33864efe461e6c71545b009d1a394d2b756784f8
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M lld/COFF/Driver.cpp
M lld/wasm/OutputSections.cpp
Log Message:
-----------
[lld] Turn misc copy-assign to move-assign (#184145)
That's an automated patch generated from clang-tidy
performance-use-std-move as a follow-up to #184136
Commit: 1eeb2eccf8b2397c49aaeefde61257c5be6fc905
https://github.com/llvm/llvm-project/commit/1eeb2eccf8b2397c49aaeefde61257c5be6fc905
Author: flovent <flbven at protonmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/StdNamespaceModificationCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/Inputs/Headers/system-header-simulation.h
M clang-tools-extra/test/clang-tidy/checkers/bugprone/std-namespace-modification.cpp
Log Message:
-----------
[clang-tidy] Handle specialization of user-defined type in `bugprone-std-namespace-modification` (#183984)
Ignore `templateSpecializationType` based on user-define classes too.
Fixes #183752
Commit: bbde3e3b59c8f7d8eee940a5aeb4eb5a849c05f4
https://github.com/llvm/llvm-project/commit/bbde3e3b59c8f7d8eee940a5aeb4eb5a849c05f4
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
Log Message:
-----------
[VPlan] Preserve IsSingleScalar for sunken predicated stores. (#184329)
The predicated stores may be single scalar (e.g. for VF = 1). We should
preserve IsSingleScalar. As all stores access the same address,
IsSingleScalar must match across all stores in the group.
This fixes an assertion when interleaving-only with sunken stores.
Fixes https://github.com/llvm/llvm-project/issues/184317
PR: https://github.com/llvm/llvm-project/pull/184329
Commit: c782e2d40572ce4ff3a71562265bf6f01857c132
https://github.com/llvm/llvm-project/commit/c782e2d40572ce4ff3a71562265bf6f01857c132
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fun-ptr-service-func.ll
M llvm/test/CodeGen/SPIRV/pointers/fun-with-aggregate-arg-in-const-init.ll
Log Message:
-----------
[SPIRV] Don't emit service function basic block names (#184206)
Right now if a module has a service function we always emit `OpName
entry` for the service function's basic block.
The actual service function isn't emitted and no other instruction uses
the basic block `OpName` instruction, so don't emit it.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: 5b976c930189e54eda134684ef4ea3682bf2ee18
https://github.com/llvm/llvm-project/commit/5b976c930189e54eda134684ef4ea3682bf2ee18
Author: Pengxiang Huang <71998072+Pengxiang-Huang at users.noreply.github.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/key_t.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/CMakeLists.txt
M libc/include/llvm-libc-macros/linux/CMakeLists.txt
A libc/include/llvm-libc-macros/linux/sys-ipc-macros.h
A libc/include/llvm-libc-macros/sys-ipc-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/key_t.h
A libc/include/llvm-libc-types/struct_ipc_perm.h
A libc/include/sys/ipc.yaml
M libc/include/sys/types.yaml
M libc/src/sys/CMakeLists.txt
A libc/src/sys/ipc/CMakeLists.txt
A libc/src/sys/ipc/ftok.h
A libc/src/sys/ipc/linux/CMakeLists.txt
A libc/src/sys/ipc/linux/ftok.cpp
A libc/src/sys/ipc/linux/kernel_statx.h
M libc/test/src/sys/CMakeLists.txt
A libc/test/src/sys/ipc/CMakeLists.txt
A libc/test/src/sys/ipc/linux/CMakeLists.txt
A libc/test/src/sys/ipc/linux/ftok_test.cpp
Log Message:
-----------
[libc][sys] add header and functions for sys ipc (#182700)
Split from a larger change. This PR contains the base impl for sys ipc,
sys sem will come after this. @SchrodingerZhu
this PR implements for:
https://github.com/llvm/llvm-project/issues/182161
see the last PR for more detail:
https://github.com/llvm/llvm-project/pull/182683
Commit: c9d065abc15846deb95a23fb0b3e1855d3d26314
https://github.com/llvm/llvm-project/commit/c9d065abc15846deb95a23fb0b3e1855d3d26314
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
A llvm/test/CodeGen/X86/funnel-shift-i256.ll
M llvm/test/CodeGen/X86/shift-i256.ll
Log Message:
-----------
[X86] Add i256 shift / funnel shift coverage to match i512 tests (#184346)
shift-i256.ll - added x86-64/x86-64-v2/x86-64-v3/x86-64-v4 coverage and retained the x86 test coverage
Commit: acb8a6df19919cf2fa9946b88f5b14c28aa4f7ef
https://github.com/llvm/llvm-project/commit/acb8a6df19919cf2fa9946b88f5b14c28aa4f7ef
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
A llvm/test/CodeGen/AArch64/neon-extractbitcast-mir.ll
Log Message:
-----------
[AArch64] Fix type mismatch in bitconvert + vec_extract patterns (#183549)
This patch fixes mismatch in element width during isel of bitconvert +
vec_extract nodes. This resolves issue reported on
[this](https://github.com/llvm/llvm-project/pull/172837) PR.
Commit: e570faa87ed3afb21504d06d0c22d82686f3a8e3
https://github.com/llvm/llvm-project/commit/e570faa87ed3afb21504d06d0c22d82686f3a8e3
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/spirv-amd-toolchain.c
Log Message:
-----------
[SPIR-V][HIP] Disable SPV_KHR_untyped_pointers (#183530)
SPV_KHR_untyped_pointers in SPIR-V to LLVM translator is incomplete with
few known issues. Therefore we better not to rely on this extension for SPIR-V
generation.
Commit: 81396ebc51c40214465111ede745147989c67e48
https://github.com/llvm/llvm-project/commit/81396ebc51c40214465111ede745147989c67e48
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b16.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b32.mir
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
Log Message:
-----------
[AMDGPU] Generate more swaps (#184164)
Generate more swaps from:
```
mov T, X
...
mov X, Y
...
mov Y, X
```
by being more careful about what use/defs of X, Y, T are allowed in
intervening code and allowing flexibility where the swap is inserted.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 43503c44c8d0d9ec6948c21e5ff79e2ec7babad1
https://github.com/llvm/llvm-project/commit/43503c44c8d0d9ec6948c21e5ff79e2ec7babad1
Author: SiliconA-Z <gfunni234 at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp
Log Message:
-----------
[NFC][AArch64] isPureCmp is a duplicate of canAdjustCmp, so remove the duplicate (#183568)
Just delete the duplicate function.
Commit: e10655eb1dfc5e40387b6389715100a62ba9f806
https://github.com/llvm/llvm-project/commit/e10655eb1dfc5e40387b6389715100a62ba9f806
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/test/CodeGen/X86/known-never-zero.ll
Log Message:
-----------
[X86] known-never-zero.ll - add sdiv/udiv vector test coverage for #183047 (#184350)
Commit: 358f4777202395e19c17f0c4c57a55234ffc37df
https://github.com/llvm/llvm-project/commit/358f4777202395e19c17f0c4c57a55234ffc37df
Author: Shivam Gupta <shivam98.tkg at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/lib/CodeGen/CGStmtOpenMP.cpp
A clang/test/OpenMP/for_range_loop_codegen.cpp
M clang/test/OpenMP/parallel_for_codegen.cpp
Log Message:
-----------
[Clang] Fix clang crash for fopenmp statement(for) inside lambda function (#146772)
C++ range-for statements introduce implicit variables such as `__range`,
`__begin`, and `__end`. When such a loop appears inside an OpenMP
loop-based directive (e.g. `#pragma omp for`) within a lambda, these
implicit variables were not emitted before OpenMP privatization logic
ran.
OMPLoopScope assumes that loop-related variables are already present in
LocalDeclMap and temporarily overrides their addresses. Since the
range-for implicit variables had not yet been emitted, they were treated
as newly introduced entries and later erased during restore(), leading
to missing mappings and a crash during codegen.
Fix this by emitting the range-for implicit variables before OpenMP
privatization (setVarAddr/apply), ensuring that existing mappings are
correctly overridden and restored.
This fixes #146335
Commit: 02b2a1e8fe7f553e49b6dff9ee9b2ba160eea9cb
https://github.com/llvm/llvm-project/commit/02b2a1e8fe7f553e49b6dff9ee9b2ba160eea9cb
Author: Shoreshen <372660931 at qq.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/M68k/GISel/M68kCallLowering.cpp
Log Message:
-----------
Fix `assignValueToReg` function's argument (#184354)
Because of [PR#178198](https://github.com/llvm/llvm-project/pull/178198)
the argument changes for `assignValueToReg`.
This PR aiming at fixing M86k experimental target
Commit: aef962708fe52372debf0ee3773462d5765a6069
https://github.com/llvm/llvm-project/commit/aef962708fe52372debf0ee3773462d5765a6069
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.h
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.h
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.h
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
Log Message:
-----------
Reapply "[SPIRV][NFCI] Use unordered data structures for SPIR-V extensions (#184162)
Reapply https://github.com/llvm/llvm-project/pull/183567 with minor
changes.
Problem causing the revert was we couldn't use the enum in `DenseMap`
directly because of some `TableGen` limitations so I casted made the map
use the underlying type, but that caused some UB, so I
[fixed](https://github.com/llvm/llvm-project/pull/183769) the `TableGen`
limitation so now it just works.
Commit: d61b45cd409d6def96eae8977bab2b0393c96b7e
https://github.com/llvm/llvm-project/commit/d61b45cd409d6def96eae8977bab2b0393c96b7e
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/lib/CodeGen/CGAtomic.cpp
M clang/test/CodeGen/atomic-arm64.c
M clang/test/CodeGen/atomic-ops.c
M clang/test/CodeGen/big-atomic-ops.c
M clang/test/CodeGenOpenCL/atomic-ops.cl
Log Message:
-----------
[Clang] Generate ptr and float atomics without integer casts (#183853)
Summary:
LLVM IR should support these for all cases except for compare-exchange.
Currently the code goes through an integer indirection for these cases.
This PR changes the behavior to use atomics directly to the target
memory type.
Commit: 6cc42b39556d33a968a899fd3243bcb707ae7169
https://github.com/llvm/llvm-project/commit/6cc42b39556d33a968a899fd3243bcb707ae7169
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M libc/src/__support/GPU/allocator.cpp
Log Message:
-----------
[libc] Various GPU allocator tweaks and optimizations (#184368)
Summary:
Some low-hanging fruit tweaks. Mostly preventing redundant loads and
unnecessary widening. Some fixes as well, like nullptr handling,
incorrect rounding, and oversized bitfields.
Commit: e68f696fdae0ce2ae1a0260a7414fbba50430018
https://github.com/llvm/llvm-project/commit/e68f696fdae0ce2ae1a0260a7414fbba50430018
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M .github/workflows/spirv-tests.yml
Log Message:
-----------
[CI][SPIRV][NFC] Remove unneccessary mkdir from workflow (#184353)
The `CMake` command does the `mkdir` automatically.
Pointed out in https://github.com/llvm/llvm-project/pull/184174
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: 3f1d968db946e90c7e29bfa886566957f0e374f4
https://github.com/llvm/llvm-project/commit/3f1d968db946e90c7e29bfa886566957f0e374f4
Author: Matthias Springer <me at m-sp.org>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/include/mlir/IR/Operation.h
M mlir/include/mlir/IR/Region.h
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/Transforms/LegalizeDataValues.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtils.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenUtils.cpp
Log Message:
-----------
[mlir][IR] Add variadic `getParentOfType` overloads (#184071)
Add `getParentOfType` overloads that work with multiple types.
Commit: f82f8cf8d498ea5dc0b20e2cead112d6d2b85894
https://github.com/llvm/llvm-project/commit/f82f8cf8d498ea5dc0b20e2cead112d6d2b85894
Author: Fangrui Song <i at maskray.me>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Config.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Target.h
Log Message:
-----------
[ELF] Add TargetInfo::initTargetSpecificSections hook (#184292)
so that we can move target-specific synthetic section creation from
createSyntheticSections into per-target initTargetSpecificSections
overrides. This reduces target-specific code in the shared
SyntheticSections.cpp. The subsequent commits (split from
https://github.com/llvm/llvm-project/pull/184057) will move these
target-specific classes to Arch/ files.
Commit: 5f8f1e2afe991cd214bff9b3cb68612f594e8596
https://github.com/llvm/llvm-project/commit/5f8f1e2afe991cd214bff9b3cb68612f594e8596
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/test/CIR/Transforms/flatten-try-op.cir
Log Message:
-----------
[CIR] Fix unreachable block generation in EH flattening (#184268)
The previous EH CFG flattening implementation would sometimes create
dispatch handlers in unreachable blocks. This seemed OK until I started
implementing the code to lower the flattened CIR to an ABI-specific form
and those weren't getting updated.
This change fixes the flattening code to avoid generating unreachable
blocks.
Commit: a232b5b96f67b395f52d44cf0e02c52ec658ff40
https://github.com/llvm/llvm-project/commit/a232b5b96f67b395f52d44cf0e02c52ec658ff40
Author: Frank Schlimbach <frank.schlimbach at intel.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/MPI/IR/MPIOps.td
M mlir/include/mlir/Dialect/Shard/IR/ShardOps.td
M mlir/include/mlir/Dialect/Shard/Transforms/Partition.h
M mlir/include/mlir/Dialect/Shard/Transforms/Passes.td
R mlir/include/mlir/Dialect/Shard/Transforms/Simplifications.h
A mlir/include/mlir/Dialect/Shard/Transforms/Simplify.h
M mlir/lib/Conversion/MPIToLLVM/MPIToLLVM.cpp
M mlir/lib/Conversion/ShardToMPI/ShardToMPI.cpp
M mlir/lib/Dialect/MPI/IR/MPIOps.cpp
M mlir/lib/Dialect/Shard/IR/ShardOps.cpp
M mlir/lib/Dialect/Shard/Transforms/CMakeLists.txt
R mlir/lib/Dialect/Shard/Transforms/Simplifications.cpp
A mlir/lib/Dialect/Shard/Transforms/Simplify.cpp
M mlir/test/Conversion/MPIToLLVM/mpitollvm.mlir
M mlir/test/Conversion/ShardToMPI/convert-shard-to-mpi.mlir
M mlir/test/Dialect/MPI/mpiops.mlir
M mlir/test/Dialect/Shard/all-scatter-op-lowering.mlir
M mlir/test/Dialect/Shard/canonicalization.mlir
M mlir/test/Dialect/Shard/folding.mlir
M mlir/test/Dialect/Shard/invalid.mlir
M mlir/test/Dialect/Shard/ops.mlir
R mlir/test/Dialect/Shard/simplifications.mlir
A mlir/test/Dialect/Shard/simplify.mlir
M mlir/test/lib/Dialect/Shard/CMakeLists.txt
M mlir/test/lib/Dialect/Shard/TestReshardingPartition.cpp
R mlir/test/lib/Dialect/Shard/TestSimplifications.cpp
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
[mlir][shard, mpi] Adding Shard/MPI reduce_scatter and simplification (#184189)
- introduces a simplify pass, which finds such patterns and replaces it
with the equivalent `reduce-scatter`
- promotes the test-pass `test-shard-optimizations` to a proper pass and adds
- folding allgather+allslice into reduce_scatter
- sanitizes the `shard.reduce_scatter` op
- adds a new `mpi.reduce_scatter_block` op
- lowers `shard.reduce_scatter` to MPI
- lowers `mpi-reduce_scatter_block` to llvm
---------
Co-authored-by: Copilot <175728472+Copilot at users.noreply.github.com>
Commit: 829da4927bf19c398c3685a8a75d4ccf57269877
https://github.com/llvm/llvm-project/commit/829da4927bf19c398c3685a8a75d4ccf57269877
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[CIR][AArch64] Add lowering for vaba_* and vabd_* builtins (#183595)
Add CIR lowering for the following AdvSIMD (NEON) intrinsic groups:
* vabd_* – Absolute difference
https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#absolute-difference
* vaba_* – Absolute difference and accumulate
https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#absolute-difference-and-accumulate
Tests for these intrinsics were split out from:
* "test/CodeGen/AArch64/neon-intrinsics.c"
and moved to:
* "test/CodeGen/AArch64/neon/intrinsics.c".
The following helper hooks were adapted from the ClangIR project:
* `getNeonType`, `emitNeonCall`, `emitNeonCallToOp`.
Credit to the ClangIR contributors for the original implementation.
Commit: bb2b957c53b0d000d49f83e5cb95bcd8172bf860
https://github.com/llvm/llvm-project/commit/bb2b957c53b0d000d49f83e5cb95bcd8172bf860
Author: walkerkd <keith.walker at arm.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMInstrThumb2.td
A llvm/test/CodeGen/Thumb2/pacbti-m-bxaut.ll
Log Message:
-----------
[Thumb2] Use BXAUT instruction if available (#183056)
Generated a
bxaut r12, lr, sp
instruction rather than
aut r12, lr, sp
bx lr
The bxaut instruction is available when for thumb2 code with the
armv8.1m-main architecture and PACBTI is enabled
This change introduces a new pseudo instruction ARM::t2BXAUT_RET which
is similar to the existing pseudo instruction ARM::tBX_RET.
---------
Co-authored-by: Copilot <175728472+Copilot at users.noreply.github.com>
Commit: b44dba97d059b928f93eeccd7eac3f1e108a4082
https://github.com/llvm/llvm-project/commit/b44dba97d059b928f93eeccd7eac3f1e108a4082
Author: lanluo-nvidia <lanl at nvidia.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/CMakeLists.txt
Log Message:
-----------
[mlir] Install '.pdll' files along with the header files (#183855)
The CMake install configuration was not installing
'include/mlir/Transforms/DialectConversion.pdll`, which is required
by the installed PDLL compiler tools for interacting withthe dialect
conversion infrastructure.
Commit: 779d76c9effd22454a3af48c0a6e922af371eb66
https://github.com/llvm/llvm-project/commit/779d76c9effd22454a3af48c0a6e922af371eb66
Author: David Green <david.green at arm.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
A llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/test/CodeGen/AArch64/stp-opt-with-renaming-ld3.mir
Log Message:
-----------
[AArch64] Add basic NPM support for LoadStoreOptimizer. (#184090)
This adds what I can tell is the the basics for NPM support on LLVM, and
ports the AArch64LoadStoreOpt pass to have NPM support.
Commit: b33c7db8eb630384d40acbd753f5bfbc80d0d2f0
https://github.com/llvm/llvm-project/commit/b33c7db8eb630384d40acbd753f5bfbc80d0d2f0
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang-tools-extra/clang-doc/CMakeLists.txt
A clang-tools-extra/clang-doc/benchmarks/CMakeLists.txt
A clang-tools-extra/clang-doc/benchmarks/ClangDocBenchmark.cpp
Log Message:
-----------
[clang-doc] Add basic benchmarks for library functionality (#182620)
clang-doc's performance is good, but we suspect it could be better. To
track this with more fidelity, we can add a set of GoogleBenchmarks that
exercise portions of the library. To start we try to track high level
items that we monitor via the TimeTrace functions, and give them their
own micro benchmarks. This should give us more confidence that switching
out data structures or updating algorthms will have a positive
performance impact.
Note that an LLM helped generate portions of the benchmarks and
parameterize them. Most of the internal logic was written by me, but
the LLM was used to handle boilerplate and adaptation to the harness.
Commit: 640ba7b05e753d527d238eb6592dca20dbcd4686
https://github.com/llvm/llvm-project/commit/640ba7b05e753d527d238eb6592dca20dbcd4686
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M .github/workflows/containers/github-action-ci-tooling/Dockerfile
Log Message:
-----------
[Github] Bump clang-format/clang-tidy to v22.1.0 (#184374)
Per the version policy for these tools to bump them at the beginning of
the release cycle and at the end of the release cycle.
Commit: 9081ac255a8b82c78c3a8c5a3db4f72ecca21cba
https://github.com/llvm/llvm-project/commit/9081ac255a8b82c78c3a8c5a3db4f72ecca21cba
Author: Finn Plummer <mail at inbelic.dev>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
A llvm/test/CodeGen/DirectX/ResourceAccess/handle-cases.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/handle-to-index.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/non-unique.ll
Log Message:
-----------
[DirectX][ResourceAccess] Resolve resource handles at access (#182106)
This change resolves handles (or corresponding ptr) that all point into
a unique global resource by propagating an index into that global
resource through control flow.
If a unique global resource can't be resolved, an error is reported
instead.
This specifically resolves all handles that point into the same global
resource array.
Resolves: https://github.com/llvm/llvm-project/issues/165288
By reporting an error, this is part of resolving
https://github.com/llvm/llvm-project/issues/179303.
Commit: b6f389e005d7cf4bc0df0c594cd65d625a96ad01
https://github.com/llvm/llvm-project/commit/b6f389e005d7cf4bc0df0c594cd65d625a96ad01
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang-tools-extra/clang-doc/Generators.cpp
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/MDGenerator.cpp
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/YAMLGenerator.cpp
M clang-tools-extra/unittests/clang-doc/ClangDocTest.cpp
M clang-tools-extra/unittests/clang-doc/GeneratorTest.cpp
Log Message:
-----------
[clang-doc] Improve complexity of Index construction (#182621)
The existing implementation ends up with an O(N^2) algorithm due to
repeated linear scans during index construction. Switching to a
StringMap allows us to reduce this to O(N), since we no longer need to
search the vector.
The `BM_Index_Insertion` benchmark measures the time taken to insert N
unique records into the index.
| Scale (N Items) | Baseline (ns) | Patched (ns) | Speedup | Change |
|----------------:|--------------:|-------------:|--------:|-------:|
| 10 | 9,977 | 11,004 | 0.91x | +10.3% |
| 64 | 69,249 | 69,166 | 1.00x | -0.1% |
| 512 | 1,932,714 | 525,877 | 3.68x | -72.8% |
| 4,096 | 92,411,535 | 4,589,030 | 20.1x | -95.0% |
| 10,000 | 577,384,945 | 12,998,039 | 44.4x | -97.7% |
The patch delivers significant improvements to scalability. At 10,000
items, index construction is **~44 times faster**, confirming the
complexity reduction from O(N^2) to O(N). The crossover point where the
new map-based approach beats the vector-based approach appears to be
around N=64.
Since the index is typically larger than 64 for files of non trivial
complexity, and users will typically be building documentation for an
entire project with many files, all normal usage should benefit from
this change.
Other benchmarks show minor regressions, though in a typical build of
LLVM documentation index construction takes up a larger amount of
runtime than any of these other components.
Commit: f95662d159dcf40d4cabce028b5913d8a7330ff6
https://github.com/llvm/llvm-project/commit/f95662d159dcf40d4cabce028b5913d8a7330ff6
Author: Jason Van Beusekom <jason.van-beusekom at hpe.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/include/clang/AST/ASTMutationListener.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/Frontend/MultiplexConsumer.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Serialization/ASTCommon.h
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/OpenMP/target_indirect_codegen.cpp
R clang/test/OpenMP/target_vtable_omp_indirect_call_lookup.cpp
M offload/test/api/omp_indirect_call_table_manual.c
R offload/test/api/omp_indirect_func_array.c
R offload/test/api/omp_indirect_func_basic.c
R offload/test/api/omp_indirect_func_struct.c
R offload/test/api/omp_virtual_func.cpp
R offload/test/api/omp_virtual_func_multiple_inheritance_01.cpp
R offload/test/api/omp_virtual_func_multiple_inheritance_02.cpp
R offload/test/api/omp_virtual_func_reference.cpp
Log Message:
-----------
Revert "[OpenMP][clang] Indirect and Virtual function call mapping from host to device" (#184378)
Reverts llvm/llvm-project#159857
Commit: a8a2f2fe997692ec67e3874c7c23e6d4dc0324ff
https://github.com/llvm/llvm-project/commit/a8a2f2fe997692ec67e3874c7c23e6d4dc0324ff
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/Transforms.h
M mlir/lib/Dialect/XeGPU/Transforms/CMakeLists.txt
R mlir/lib/Dialect/XeGPU/Transforms/XeGPUFoldAliasOps.cpp
R mlir/test/Dialect/XeGPU/xegpu-fold-alias-ops.mlir
Log Message:
-----------
[MLIR][XeGPU] Remove fold alias pass in xegpu (#182802)
Commit: 616656bc5e1ae78625f751d55817e7408526f1dd
https://github.com/llvm/llvm-project/commit/616656bc5e1ae78625f751d55817e7408526f1dd
Author: Fangrui Song <i at maskray.me>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Config.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
Log Message:
-----------
[ELF] Move MIPS synthetic sections into Arch/Mips.cpp (#184384)
Move MipsAbiFlagsSection, MipsOptionsSection, MipsReginfoSection, and
MipsRldMapSection from SyntheticSections.h/cpp into Arch/Mips.cpp.
The MIPS-specific section creation in createSyntheticSections is
replaced
by the initTargetSpecificSections hook.
Commit: 200600a06c20501a8380ab6c60d2158956e6214c
https://github.com/llvm/llvm-project/commit/200600a06c20501a8380ab6c60d2158956e6214c
Author: Fangrui Song <i at maskray.me>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M lld/ELF/Arch/PPC.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
Log Message:
-----------
[ELF] Move PPC32Got2Section into Arch/PPC.cpp (#184383)
Move PPC32Got2Section from SyntheticSections.h/cpp into the anonymous
namespace in Arch/PPC.cpp, renaming it to Got2Section.
Extracted from #184292. Moved initTargetSpecificSections after ctor and
before other hooks to match the linker's pass order.
Commit: 7b7c8b2eb3f1b7f12ea42a9d3ece4cb17bbf969b
https://github.com/llvm/llvm-project/commit/7b7c8b2eb3f1b7f12ea42a9d3ece4cb17bbf969b
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M libc/test/include/CMakeLists.txt
M libc/test/integration/CMakeLists.txt
M libc/utils/libctest/format.py
Log Message:
-----------
[libc] Extend check-libc-lit to cover include, integration, and all src tests (#184366)
The lit-based test runner introduced in c776a52f only discovered
libc.test.src tests with a strict __unit__.__build__ or
__hermetic__.__build__ suffix. This missed four categories of tests:
1. libc.test.include.* tests (e.g. isnan_test, signbit_test)
2. libc.test.integration.* tests (e.g. pthread, unistd, startup)
3. libc.test.src.* tests that have no __unit__/__hermetic__ marker (e.g.
errno_test, dirent_test, htonl)
4. libc.test.src.* tests with extra option suffixes between the type
marker and .__build__ (e.g. __unit__.__NO_FMA_OPT.__build__)
Wire up the two missing build dependencies so that check-libc-lit builds
include and integration tests before running them, and update
_isTestExecutable() to recognise all four patterns.
The pattern documentation was consolidated into the _isTestExecutable()
docstring, where it is next to the code it describes, to avoid the two
diverging in future.
Tested:
Compared the test count from a full `ninja check-libc` run (2765 tests)
against `llvm-lit --show-tests libc/test` after this change and
confirmed the counts match exactly.
Commit: bf680bdf13499860a552f991bb9d11b2b52b8ea8
https://github.com/llvm/llvm-project/commit/bf680bdf13499860a552f991bb9d11b2b52b8ea8
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/RedundantTypenameCheck.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/redundant-typename.cpp
Log Message:
-----------
[clang-tidy] Fix yet another false positive in `readability-redundant-typename` (#184301)
Fixes #184083.
Commit: 7a310b4c5a069141110fda5f9beb4905482ce621
https://github.com/llvm/llvm-project/commit/7a310b4c5a069141110fda5f9beb4905482ce621
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
M mlir/test/Interfaces/TilingInterface/lower-to-loops-using-interface.mlir
Log Message:
-----------
[mlir][linalg] Upstream PackOp/UnPackOp's generateScalarImplementation. (#182838)
The revision upstreams the implementation from IREE. The ops were
upstreamed some time ago, and they are the remaining implementation. The
core implementation is mirrored from IREE and some cleanups and style
nits are fixed.
The mirror is not a pure copy-paste because the op accessors are
different:
| IREE | llvm-project |
|------|--------------|
| `getInputRank()` | `packOp.getSourceRank()` |
| `getOutputRank()` | `packOp.getDestRank()` |
| `getInput()` | `packOp.getSource()` |
| `getOutput()` | `packOp.getDest()` |
And it uses `linalg::createOrFoldDimOp` and `createFoldedDimOp` from
upstream to create DimOp ops.
Closes https://github.com/llvm/llvm-project/pull/128816
Closes https://github.com/llvm/llvm-project/pull/178222
Co-authored-by: lorenzo chelini <l.chelini at icloud.com>
---------
Signed-off-by: hanhanW <hanhan0912 at gmail.com>
Commit: c1bba5ba023aaa1ac76f2eac76961a8b12e4e1b0
https://github.com/llvm/llvm-project/commit/c1bba5ba023aaa1ac76f2eac76961a8b12e4e1b0
Author: calebwat <107081575+calebwat at users.noreply.github.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
Log Message:
-----------
[VPlan][NFC] Remove unnecessary explicit copy constructors (#183863)
VPHierarchicalChildrenIterator has explicitly defined copy and copy
assignment constructors which perform the same operation as the implicit
versions would. As a result, it does not follow the rule of three style,
but also does not need a destructor. This patch avoids that by simply
removing the explicit definitions, since their functionality is the same
as the implicit ones.
Commit: b926acfb341b75fa041b84523b5286644ea0482a
https://github.com/llvm/llvm-project/commit/b926acfb341b75fa041b84523b5286644ea0482a
Author: Kelvin Li <kli at ca.ibm.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
Log Message:
-----------
[flang] remove unused variable (NFC) (#184293)
Commit: 56b5af76cf3c0d369b734c3f51011aec1c918bef
https://github.com/llvm/llvm-project/commit/56b5af76cf3c0d369b734c3f51011aec1c918bef
Author: Emmanuel Antonio <38330347+EmmanuelAC1 at users.noreply.github.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel][mlir] Fix Bazel build for a232b5b (#184394)
Co-authored-by: Pranav Kant <prka at google.com>
Commit: 7161bd94fded2d85e4af5057c4a8b9fbc4d28683
https://github.com/llvm/llvm-project/commit/7161bd94fded2d85e4af5057c4a8b9fbc4d28683
Author: Frank Schlimbach <frank.schlimbach at intel.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/lib/Conversion/MPIToLLVM/CMakeLists.txt
Log Message:
-----------
[mlir][mpi] fixing 184189 build failures (#184399)
Commit: 6b040b0dee9cb8b38e56dbcb7e51182a62703e05
https://github.com/llvm/llvm-project/commit/6b040b0dee9cb8b38e56dbcb7e51182a62703e05
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/hip-save-temps.hip
M clang/test/Driver/hip-spirv-backend-bindings.c
M clang/test/Driver/hip-spirv-backend-phases.c
Log Message:
-----------
[HIP] Fix -save-temps with the new offload driver (#184385)
Summary:
The new offloading driver passes LLVM-IR to the linker phase. This
caused a problem with `-save-temps` passing unoptimized bitcode. We were
supposed to have dedicated handling for this, but it was not firing in
the HIP case like it is supposed to. OpenMP already supports this so
simply identify the cases that skip this support and fix it.
Commit: d0dd371249795ef17fac95dd77444baef1fdf578
https://github.com/llvm/llvm-project/commit/d0dd371249795ef17fac95dd77444baef1fdf578
Author: Alexandra Sidorova <asidorov at amd.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
A mlir/test/Dialect/Vector/canonicalize/vector-to-elements.mlir
Log Message:
-----------
[MLIR][Canonicalization] Add shape_cast folding patterns (#183061)
### Summary
This PR adds two shape_cast-related canonicalization patterns for
`vector.to_elements` and `vector.from_elements`.
### Details
- Added` ToElements(ShapeCast(X)) -> ToElements(X)` as an in-place fold
in `ToElementsOp::fold`.
- Added `ShapeCast(FromElements(X)) -> FromElements(X)` as an
`OpRewritePattern` — it must be a pattern (not a `fold`) because we have
to create new op `FromElementsOp` with updated result type. This cannot
be done with a `fold`, because `fold` cannot create new ops and the
existing `FromElementsOp` result type differs from the `ShapeCastOp`
result type. Mutating the `FromElementsOp` (not root op) would violate
the `fold` contract and break other users.
- Added lit tests for the both ops (new `vector-to-elements.mlir`,
`vector-from-elements.mlir`)
---------
Signed-off-by: Alexandra Sidorova <asidorov at amd.com>
Commit: ea79bcfcc579f940e05ae81d898ef19594dea402
https://github.com/llvm/llvm-project/commit/ea79bcfcc579f940e05ae81d898ef19594dea402
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/composite_simd_linear.f90
M flang/test/Lower/OpenMP/distribute-parallel-do-simd.f90
M flang/test/Lower/OpenMP/distribute-simd.f90
M flang/test/Lower/OpenMP/loop-pointer-variable.f90
M flang/test/Lower/OpenMP/ordered-simd.f90
M flang/test/Lower/OpenMP/wsloop-simd.f90
Log Message:
-----------
[flang][OpenMP] Fix lowering of LINEAR iteration variables (#183794)
Linear iteration variables were being treated as private. This fixes
one of the issues reported in #170784.
Commit: a34d56dee94ba3ce31f3b03bc8bb9f38012a7c89
https://github.com/llvm/llvm-project/commit/a34d56dee94ba3ce31f3b03bc8bb9f38012a7c89
Author: Fangrui Song <i at maskray.me>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
A llvm/test/CodeGen/AArch64/dso_local_equivalent.ll
M llvm/test/MC/ELF/rtti-proxy-gotpcrel.ll
Log Message:
-----------
[AArch64] Fix relative vtable PLT/GOTPCREL specifiers to use MCSpecifierExpr (#184393)
PR #155776 changed S_PLT/S_GOTPCREL printing to
%pltpcrel(x)/%gotpcrel(x)
syntax via MCSpecifierExpr, but lowerSymbolDifference and
getIndirectSymViaGOTPCRel still created MCSymbolRefExpr with these
specifiers, which prints via the @-specifier table as @PLT/@GOTPCREL,
leading to incorrect relocation types.
Fixes: bed89970c3df5e755820708580e405f65ddaa1ba
(AArch64: Replace @plt/%gotpcrel in data directives with %pltpcrel
%gotpcrel (#155776))
Add llvm/test/CodeGen/AArch64/dso_local_equivalent.ll
Commit: 90febba9c4ec8cb7fed9b8b0dafab2458583c0ca
https://github.com/llvm/llvm-project/commit/90febba9c4ec8cb7fed9b8b0dafab2458583c0ca
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
Log Message:
-----------
[X86] vector-shuffle-combining-xop.ll - tests showing failure to combine shuffles with non-uniform rotates (#184397)
We only handle this for VROTLI/VROTRI nodes
Noticed while working on #184002
Commit: 637bb0e37747001eaac08bca4312177f57735f5e
https://github.com/llvm/llvm-project/commit/637bb0e37747001eaac08bca4312177f57735f5e
Author: hanbeom <kese111 at gmail.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/test/CodeGen/WebAssembly/load-ext.ll
Log Message:
-----------
[WebAssembly][FastISel] Call materializeLoadStoreOperands in load fold (#184203)
The `tryToFoldLoadIntoMI` function omitted materializing base registers
for addresses before folding sign-extend instructions into loads. This
left `$noreg` as the base register, crashing subsequent passes.
WebAssembly memory instructions structurally require a valid base
register. Calling the existing `materializeLoadStoreOperands` function
ensures that a `CONST 0` virtual register is generated when addressing
global variables directly without a pre-existing base register.
(before) %1:i32 = LOAD8_S_I32_A32 0, @ch, $noreg ... -> CRASH (after)
%3:i32 = CONST_I32 0
%1:i32 = LOAD8_S_I32_A32 0, @ch, %3:i32 ... -> Folded safely
Commit: f42b8a18d9043f36f173184d1bf1c28dc6a5be2f
https://github.com/llvm/llvm-project/commit/f42b8a18d9043f36f173184d1bf1c28dc6a5be2f
Author: PiJoules <leonardchan at google.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
Log Message:
-----------
[sanitizer][Fuchsia] Define interceptor for reallocarray on Fuchsia (#184410)
Commit: 80acaccbe644ea6c87ca54d4426b4dbdb53e5671
https://github.com/llvm/llvm-project/commit/80acaccbe644ea6c87ca54d4426b4dbdb53e5671
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
Log Message:
-----------
[RISCV] Promote i8/i16/i32 scalable vector CLMUL to i64 CLMUL with Zvbc. (#184265)
This handles the simple case where we can widen to i64 vector
without splitting. More work will be done in follow ups.
Commit: e379ad78203b32bb444c1ceab2869767a0de728c
https://github.com/llvm/llvm-project/commit/e379ad78203b32bb444c1ceab2869767a0de728c
Author: Zhijie Wang <yesterda9 at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeAnnotations.h
M clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
M clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/Sema/warn-lifetime-safety-invalidations.cpp
Log Message:
-----------
[LifetimeSafety] Use per-container invalidation rules to fix false positives (#183000)
- Refactor `isContainerInvalidationMethod()` to per-container
invalidation sets, based on
https://en.cppreference.com/w/cpp/container#Iterator_invalidation.
- Follow reference invalidation rules instead of iterator invalidation
rules. Specifically:
- Methods that only invalidate iterators but not references are excluded
(e.g. `deque::push_back`, `unordered_map::emplace`).
- Methods that only invalidate references to the removed element itself
are excluded (e.g. `vector::pop_back`, `deque::pop_*`, and
`erase`/`extract` on all node-based containers).
- Fix false positives for `insert`/`emplace` etc on ordered associative
containers (`set`, `map`, `multiset`, `multimap`), which never
invalidate iterators per the standard.
- Add previously missing methods: `emplace_hint`, `insert_or_assign`,
`push_range`, `replace_with_range`, `resize_and_overwrite`, `merge`.
- `operator[]` now only invalidates for `flat_map`. `map::operator[]`
and `unordered_map::operator[]` may insert but don't invalidate
references.
Fixes #181912
Commit: c5039c18482765b1499d94231c8b4c5e1a4be485
https://github.com/llvm/llvm-project/commit/c5039c18482765b1499d94231c8b4c5e1a4be485
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[NFC] Refactor the SelectionDAG::getMemcmp etc with a existing helper function getRuntimeCallSDValueHelper (#184200)
Refactor the SelectionDAG::getMemcmp,
SelectionDAG::getStrcpy,SelectionDAG::getStrlen with a existing helper
function SelectionDAG::getRuntimeCallSDValueHelper.
Commit: 6893d277575df9779184cb1b2a1efea31dc0a65c
https://github.com/llvm/llvm-project/commit/6893d277575df9779184cb1b2a1efea31dc0a65c
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M flang/lib/Semantics/canonicalize-acc.cpp
M flang/test/Semantics/OpenACC/acc-canonicalization-validity.f90
Log Message:
-----------
[flang][acc] Improve clause validity check around do concurrent (#184389)
The current validity message prints out both "TILE" and "COLLAPSE" even
if just one of them is used. This makes it confusing if the user only
used one of them. This improves the messages to be precise which clause
is not allowed (and separate messages are issued when both clauses are
used).
Commit: 03bd4ef4ecf9b6e5003a78af34438e978d064cb4
https://github.com/llvm/llvm-project/commit/03bd4ef4ecf9b6e5003a78af34438e978d064cb4
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCXXABI.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.h
A clang/test/CIR/CodeGenCXX/vtable-pure-deleted-funcs.cpp
Log Message:
-----------
[CIR] Handle vtable pure and deleted virtual functions (#183862)
Finding reproducers for these that don't use the deferred vtable (which
we haven't yet implemented) was a bit of a challenge, but I found
this setup to get these to be emitted. Fortunately it is a quite easy
implementation that doesn't do awfully much.
This patch implements both, plus the name through the itanium ABI.
Commit: 2d4c8e0d0fa2279a3d76365c29c63ec03433351c
https://github.com/llvm/llvm-project/commit/2d4c8e0d0fa2279a3d76365c29c63ec03433351c
Author: Jason Van Beusekom <jason.van-beusekom at hpe.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/include/clang/AST/ASTMutationListener.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/Frontend/MultiplexConsumer.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Serialization/ASTCommon.h
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/OpenMP/target_indirect_codegen.cpp
A clang/test/OpenMP/target_vtable_omp_indirect_call_lookup.cpp
M offload/test/api/omp_indirect_call_table_manual.c
A offload/test/api/omp_indirect_func_array.c
A offload/test/api/omp_indirect_func_basic.c
A offload/test/api/omp_indirect_func_struct.c
A offload/test/api/omp_virtual_func.cpp
A offload/test/api/omp_virtual_func_multiple_inheritance_01.cpp
A offload/test/api/omp_virtual_func_multiple_inheritance_02.cpp
A offload/test/api/omp_virtual_func_reference.cpp
Log Message:
-----------
[OpenMP][clang] Indirect and Virtual function call mapping from host to device (#184412)
This patch implements the CodeGen logic for calling __llvm_omp_indirect_call_lookup
on the device when an indirect function call or a virtual function call is made
within an OpenMP target region.
---------
Co-authored-by: Youngsuk Kim
Commit: a5ca0ec16bdd8143bd3d0dd04845a2297b035e5a
https://github.com/llvm/llvm-project/commit/a5ca0ec16bdd8143bd3d0dd04845a2297b035e5a
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M libcxx/utils/libcxx/test/dsl.py
Log Message:
-----------
[libc++] Update documentation for _executeWithFakeConfig (#184420)
Commit: c7c16573b8f3c1842791fadcd916d2eb96347c58
https://github.com/llvm/llvm-project/commit/c7c16573b8f3c1842791fadcd916d2eb96347c58
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/test/CIR/CodeGen/atomic-thread-fence.c
Log Message:
-----------
[CIR] Synchronize CIR with recent changes to atomic ops (#184416)
This synchronizes the CIR atomic expression handling with changes that
were made in https://github.com/llvm/llvm-project/pull/183853
Commit: b5baf5e062b24d0f240aae09fd771aacca891f2d
https://github.com/llvm/llvm-project/commit/b5baf5e062b24d0f240aae09fd771aacca891f2d
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
A clang/test/CIR/CodeGen/gnu-ptr-math.c
Log Message:
-----------
[CIR] Implement func-ptr/void-ptr addition/subtraction/inc/dec. (#184254)
As a GNU extension, clang supports math on void* and function pointers
in C mode only. From a CIR perspective, it makes sense to leave these
types in the IR, since it might be useful to do analysis.
During lowering, we already properly lower these to a size-1 element, so
there is no changes that need to happen besides letting this get through
CIR generation. This patch does that, plus adds some tests.
Commit: 899080a87ad96d5f590ad8bb469b9a33e6de6795
https://github.com/llvm/llvm-project/commit/899080a87ad96d5f590ad8bb469b9a33e6de6795
Author: Finn Plummer <mail at inbelic.dev>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/docs/DirectX/DXILResources.rst
M llvm/lib/Analysis/DXILResource.cpp
A llvm/test/Analysis/DXILResource/buffer-frombinding-unbounded.ll
Log Message:
-----------
[Analysis][DXILResource] Correct bound computation (#184198)
The range is an unsigned integer where a value of `UINT32_MAX` denotes
an unbounded range
The current implementation implied that any size interpreted as a signed
integer that is negative was unbounded, which is incorrect.
Adds a note to the docs
Commit: 17aaa0e590a7e7a741946f166b1ff73023cf8576
https://github.com/llvm/llvm-project/commit/17aaa0e590a7e7a741946f166b1ff73023cf8576
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Use bitfield to store Cmp predicates and GEP wrap flags. (NFC) (#181571)
Instead of storing CmpInst::Predicate/GepNoWrapFlags, only store their
raw bitfield values. This reduces the size of VPIRFlags from 12 to 3
bytes.
PR: https://github.com/llvm/llvm-project/pull/181571
Commit: 8272546f6910e78f255830d9592c6926d93be04c
https://github.com/llvm/llvm-project/commit/8272546f6910e78f255830d9592c6926d93be04c
Author: Kaitlin Peng <kaitlinpeng at microsoft.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVCombinerHelper.cpp
Log Message:
-----------
[HLSL][SPIRV] Fix `faceforward` pattern matcher logic (#183630)
Fixes a logic issue in the `faceforward` pattern matcher in
`SPIRVCombinerHelper.cpp`.
Previously when `mi_match` failed, we would still go through the nested
`Pred == CmpInst::FCMP_OGT || Pred == CmpInst::FCMP_UGT` check. It was
possible that whatever garbage was in Pred could randomly pass this
check and make us continue through the code. This change fixes that
logic issue by returning false as soon as `mi_match` fails.
Likely fixes #177803. Can't confirm since it seems another change has
obscured the crash.
Commit: b4dfa43cb8aea45487033d1f21c49672ac33e02a
https://github.com/llvm/llvm-project/commit/b4dfa43cb8aea45487033d1f21c49672ac33e02a
Author: lihengda861-source <lihengda861 at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
Log Message:
-----------
[RISCV] Fix type inference ambiguity in SwapSysReg pattern (#184305)
Issue:
Building RISCVInstrInfo.td fails with the following TableGen error
during the generation of RISCVGenInstrInfo.inc:
` error: In test: Could not infer all types in pattern!`
Root Cause:
The riscv_swap_csr node has a polymorphic result type (i32 or i64
depending on the target architecture). When used inside the SwapSysReg
class pattern, TableGen's type inference engine cannot automatically
deduce the exact return type solely from the GPR:$rd output, leading to
the ambiguity error.
Fix:
This patch resolves the type ambiguity by explicitly wrapping the
riscv_swap_csr node with XLenVT, allowing TableGen to infer the types
correctly.
Commit: 5586d93a87eff7d6f01564c2ea0dfb82378a7fb2
https://github.com/llvm/llvm-project/commit/5586d93a87eff7d6f01564c2ea0dfb82378a7fb2
Author: Florian Mayer <fmayer at google.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
Log Message:
-----------
[NFC] [HWASan] more meaningful BB names in use-after-scope test (#183867)
Commit: 375d65ee8de7dd65e19faab567db2799a52dfe52
https://github.com/llvm/llvm-project/commit/375d65ee8de7dd65e19faab567db2799a52dfe52
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/Passes.h
M clang/include/clang/CIR/Dialect/Passes.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/Dialect/Transforms/CMakeLists.txt
A clang/lib/CIR/Dialect/Transforms/EHABILowering.cpp
M clang/lib/CIR/Lowering/CIRPasses.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/try-catch-tmp.cpp
M clang/test/CIR/CodeGen/try-catch.cpp
A clang/test/CIR/Transforms/eh-abi-lowering-itanium.cir
M clang/tools/cir-opt/cir-opt.cpp
Log Message:
-----------
[CIR] Implement EH lowering to Itanium form and LLVM IR (#184386)
This introduces a new pass to lower from a flattened, target-independent
form of CIR to a form that uses Itanium-specific representation for
exception handling. It also includes a small amount of code needed to
lower the Itanium form to LLVM IR.
Substantial amounts of this PR were created using agentic AI tools, but
I have carefully reviewed the code, comments, and tests and made changes
as needed.
Commit: 9d0c62c3ddb14f0cc2ed47a6088083257fa68f10
https://github.com/llvm/llvm-project/commit/9d0c62c3ddb14f0cc2ed47a6088083257fa68f10
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/test/CodeGen/X86/known-never-zero.ll
Log Message:
-----------
[X86] known-never-zero.ll - improve demandedelts test coverage for #183227 (#184411)
The original tests from #184350 were recognising every element as
non-zero
Commit: 80a1cf4f80583b688b4a04c83baada31a40b851d
https://github.com/llvm/llvm-project/commit/80a1cf4f80583b688b4a04c83baada31a40b851d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/amdhsa_abi.h
A clang/test/Headers/amdhsa_abi.cl
Log Message:
-----------
clang: Add builtin header for amdhsa abi (#181993)
Commit: 4b06e83885593112ab346c4753cc080ec3ef0ea3
https://github.com/llvm/llvm-project/commit/4b06e83885593112ab346c4753cc080ec3ef0ea3
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[Github][CI] Bump CI containers to LLVM v22.1.0 (#184375)
Commit: df1a53ae242418f5ac22adb5bb2178d3f931565f
https://github.com/llvm/llvm-project/commit/df1a53ae242418f5ac22adb5bb2178d3f931565f
Author: Sean Fertile <sd.fertile at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M compiler-rt/test/lsan/TestCases/create_thread_leak.cpp
Log Message:
-----------
Disable leak sanitizer test on ppc. (#184414)
Test is flaky and fails due to machine load on the build bots. Disable
until we can split the build bots over more machines.
Commit: dc44bcafe08e6644a3f7b98144394d6f3ef5c3c2
https://github.com/llvm/llvm-project/commit/dc44bcafe08e6644a3f7b98144394d6f3ef5c3c2
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M flang-rt/CMakeLists.txt
Log Message:
-----------
[flang-rt] Fix NVPTX builds erroneously using backtrace support (#184415)
Summary:
This is caused by the CMake hacks I had to do to worm around NVIDIA's
proprietary binaries.
Commit: dc1e3e5dbf7805ff060c84135a63fc7239c52814
https://github.com/llvm/llvm-project/commit/dc1e3e5dbf7805ff060c84135a63fc7239c52814
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
Log Message:
-----------
[X86] getFauxShuffleMask - add ISD::ROTL/ROTR handling (#184417)
Very similar to the existing X86ISD::VROTLI/VROTRI handling
Prep work for #184002
Commit: fdc4a982f5d6a41fdb0b00bf49b72446a1f0c5ea
https://github.com/llvm/llvm-project/commit/fdc4a982f5d6a41fdb0b00bf49b72446a1f0c5ea
Author: Yoonseo Choi <yoonchoi at amd.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/test/CodeGen/AMDGPU/implicit-arg-block-count.ll
M llvm/test/CodeGen/AMDGPU/implicit-arg-v5-opt.ll
A llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.implicitarg.ptr.ll
Log Message:
-----------
[AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (#182206)
Commit: fe76fd292cc3815f2cc3877eb1641db0cb40e3fb
https://github.com/llvm/llvm-project/commit/fe76fd292cc3815f2cc3877eb1641db0cb40e3fb
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU][SIInsertWaitcnts][NFC] Call applyWaitcnt() in a loop (#184426)
Commit: 6b5c55ef169cfb19e0159241a5932e593a8e1e3c
https://github.com/llvm/llvm-project/commit/6b5c55ef169cfb19e0159241a5932e593a8e1e3c
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M lldb/source/Core/Debugger.cpp
Log Message:
-----------
[lldb] Fix 10 year old leak of `g_debugger_list_ptr` (#184259)
Roughly 10 years ago, in aacb80853a46bd544fa76a945667302be1de706c, Greg
deleted the call to delete g_debugger_list_ptr because of a race
condition:
> Fixed a threading race condition where we could crash after calling
Debugger::Terminate().
>
> The issue was we have two global variables: one that contains a
DebuggerList pointer and one that contains a std::mutex > pointer. These
get initialized in Debugger::Initialize(), and everywhere that uses
these does:
>
> if (g_debugger_list_ptr && g_debugger_list_mutex_ptr)
> {
> std::lock_guard<std::recursive_mutex>
guard(*g_debugger_list_mutex_ptr);
> // do work while mutex is locked
> }
>
> Debugger::Terminate() was deleting and nulling out g_debugger_list_ptr
which meant we had a race condition where someone might do the if
statement and it evaluates to true, then another thread calls
Debugger::Terminate() and deletes and nulls out g_debugger_list_ptr
while holding the mutex, and another thread then locks the mutex and
tries to use g_debugger_list_ptr. The fix is to just not delete and null
out the g_debugger_list_ptr variable.
However, this isn't necessary as long as we persist ("leak") the mutex
and always check it first. That's exactly what this patch does. Without
it, the assert in Debugger::Initialize is incorrect.
```
assert(g_debugger_list_ptr == nullptr &&
"Debugger::Initialize called more than once!");
```
Commit: c4ea6cc3f736ab5b3feeaf16c448db5217b14306
https://github.com/llvm/llvm-project/commit/c4ea6cc3f736ab5b3feeaf16c448db5217b14306
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
M lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
M lldb/source/Plugins/Process/scripted/ScriptedProcess.cpp
M lldb/source/Plugins/Process/wasm/ProcessWasm.cpp
M lldb/source/Plugins/RegisterTypeBuilder/RegisterTypeBuilderClang.cpp
M lldb/source/Plugins/ScriptInterpreter/Lua/ScriptInterpreterLua.cpp
M lldb/source/Plugins/ScriptInterpreter/None/ScriptInterpreterNone.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
Log Message:
-----------
[lldb] Remove call_once wrappers around PluginManager::RegisterPlugin (#184273)
Remove call_once wrappers around PluginManager::RegisterPlugin. Plugins
can be registered and unregistered in Initialize and Terminate
respectively. In its current state, after having called Terminate, a
plugin can never be re-initialized.
Commit: 89a4bcf023493cb75aded5a70c082c1fa7d46cbc
https://github.com/llvm/llvm-project/commit/89a4bcf023493cb75aded5a70c082c1fa7d46cbc
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
M clang/include/clang/CIR/Interfaces/CIROpInterfaces.td
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerItaniumCXXABI.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/test/CIR/CodeGen/assign-operator.cpp
M clang/test/CIR/CodeGen/atomic.c
M clang/test/CIR/CodeGen/basic.c
M clang/test/CIR/CodeGen/basic.cpp
M clang/test/CIR/CodeGen/binop.cpp
M clang/test/CIR/CodeGen/bitfields.c
M clang/test/CIR/CodeGen/complex-compound-assignment.cpp
M clang/test/CIR/CodeGen/complex-mul-div.cpp
M clang/test/CIR/CodeGen/complex.cpp
M clang/test/CIR/CodeGen/compound_assign.cpp
M clang/test/CIR/CodeGen/if.cpp
M clang/test/CIR/CodeGen/integer-overflow.c
M clang/test/CIR/CodeGen/lambda.cpp
M clang/test/CIR/CodeGen/namespace.cpp
M clang/test/CIR/CodeGen/new.cpp
M clang/test/CIR/CodeGen/no-odr-use.cpp
M clang/test/CIR/CodeGen/non-type-template-param.cpp
M clang/test/CIR/CodeGen/opaque.cpp
M clang/test/CIR/CodeGen/pointer-to-data-member-cast.cpp
M clang/test/CIR/CodeGen/pointer-to-member-func-cast.cpp
M clang/test/CIR/CodeGen/pointer-to-member-func-cmp.cpp
M clang/test/CIR/CodeGen/pointer-to-member-func.cpp
M clang/test/CIR/CodeGen/requires-expr.cpp
M clang/test/CIR/CodeGen/size-of-vla.cpp
M clang/test/CIR/CodeGen/struct-init.cpp
M clang/test/CIR/CodeGen/switch_flat_op.cpp
M clang/test/CIR/CodeGen/ternary.cpp
M clang/test/CIR/CodeGen/throws.cpp
M clang/test/CIR/CodeGen/try-catch.cpp
M clang/test/CIR/CodeGen/variable-decomposition.cpp
M clang/test/CIR/CodeGen/vector-ext-element.cpp
M clang/test/CIR/CodeGen/vector-ext.cpp
M clang/test/CIR/CodeGen/vector.cpp
M clang/test/CIR/CodeGen/vla.c
M clang/test/CIR/CodeGenBuiltins/AArch64/acle_sve_len.c
M clang/test/CIR/CodeGenBuiltins/X86/avx10_2_512bf16-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx10_2bf16-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx2-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512bw-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512dq-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512fp16-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512vldq-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/cmp-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/sse2-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/sse41-builtins.c
M clang/test/CIR/CodeGenOpenACC/atomic-capture.cpp
M clang/test/CIR/CodeGenOpenACC/atomic-update.cpp
M clang/test/CIR/CodeGenOpenACC/atomic-write.cpp
M clang/test/CIR/CodeGenOpenACC/combined-firstprivate-clause.cpp
M clang/test/CIR/CodeGenOpenACC/combined-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined.cpp
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.cpp
M clang/test/CIR/CodeGenOpenACC/compute-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-default-ops.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-float.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-unsigned-int.c
M clang/test/CIR/CodeGenOpenACC/firstprivate-clause-recipes.cpp
M clang/test/CIR/CodeGenOpenACC/loop-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-int.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-int.cpp
M clang/test/CIR/CodeGenOpenACC/reduction-clause-recipes.cpp
M clang/test/CIR/CodeGenOpenMP/omp-llvmir.c
M clang/test/CIR/CodeGenOpenMP/parallel.c
M clang/test/CIR/IR/throw.cir
M clang/test/CIR/IR/vector.cir
M clang/test/CIR/Lowering/binop-bool.cir
M clang/test/CIR/Lowering/binop-fp.cir
M clang/test/CIR/Lowering/binop-signed-int.cir
M clang/test/CIR/Lowering/binop-unsigned-int.cir
M clang/test/CIR/Transforms/switch.cir
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[CIR] Split cir.binop into separate per-operation binary ops (#184227)
Replace the single `cir.binop` operation (dispatched via a `BinOpKind`
enum) with nine distinct ops — `cir.add`, `cir.sub`, `cir.mul`,
`cir.div`, `cir.rem`, `cir.and`, `cir.or`, `cir.xor`, and `cir.max` —
each with precise type constraints and only the attributes it needs
(nsw/nuw/sat on add/sub via `BinaryOverflowOp`).
A new `BinaryOpInterface` provides uniform `getLhs`/`getRhs`/`getResult`
access for passes and analyses.
The monolithic switch-based CIRToLLVMBinOpLowering is replaced by per-op
patterns generated through the existing CIRLowering.inc TableGen
infrastructure, with shared dispatch factored into two helpers:
`lowerSaturatableArithOp` for add/sub and `lowerIntFPBinaryOp` for
div/rem.
Commit: 1953b87a31a9b7de9e34deaa7e94ee59b3e7de39
https://github.com/llvm/llvm-project/commit/1953b87a31a9b7de9e34deaa7e94ee59b3e7de39
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGenBuiltins/builtin-isinf-sign.c
Log Message:
-----------
[CIR][CodeGen] Upstream support for `__builtin_isinf_sign` (#183977)
This adds CIR codegen and lowering support for `__builtin_isinf_sign`.
Commit: 5b144c0aec63fe80a610b77e27de926869391b64
https://github.com/llvm/llvm-project/commit/5b144c0aec63fe80a610b77e27de926869391b64
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-tensor-load-store.cl
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tensor.load.store.ll
M llvm/test/CodeGen/AMDGPU/reg-coalescer-subreg-liveness.mir
Log Message:
-----------
[AMDGPU] Add suffix _d4 to tensor load/store with 4 groups D#, NFC (#184176)
Rename TENSOR_LOAD_TO_LDS to TENSOR_LOAD_TO_LDS_d4;
Rename TENSOR_STORE_FROM_LDS to TENSOR_STORE_FROM_LDS_d4;
Also rename function names in a couple of tests to reflect this change.
Commit: 9264159ae1df6910777ffa94b37a932775ae00c7
https://github.com/llvm/llvm-project/commit/9264159ae1df6910777ffa94b37a932775ae00c7
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M lldb/unittests/DAP/TestBase.cpp
M lldb/unittests/DAP/TestBase.h
M lldb/unittests/DAP/VariablesTest.cpp
Log Message:
-----------
[lldb] Fix the GoogleTest teardown in the DAP unit tests (#184262)
Some of the DAP tests define a static method named `TeatUpTestSuite`
which is calling `SBDebugger::Terminate`. Besides the typo, the correct
method is `TearDownTestSuite`, which GoogleTest calls after running the
last test in the test suite.
When addressing this, I realized that currently you can't really call
Initialize and Terminate multiple times in the same process. This
depends on:
- https://github.com/llvm/llvm-project/pull/184259
- https://github.com/llvm/llvm-project/pull/184261
Commit: 685a65a7f03d40d81d277402f662fec4bb97b325
https://github.com/llvm/llvm-project/commit/685a65a7f03d40d81d277402f662fec4bb97b325
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2026-03-04 (Wed, 04 Mar 2026)
Changed paths:
M clang-tools-extra/Maintainers.rst
Log Message:
-----------
[clang-tidy] Add zeyi2 as maintainer (#183883)
I've been actively contributing to `clang-tidy` for the past 4 months,
reviewing PRs, [fixing
issues](https://github.com/pulls?q=is%3Apr+author%3Azeyi2+archived%3Afalse+user%3Allvm+is%3Aclosed+label%3Aclang-tidy+sort%3Aupdated-desc),
engaging in discourse discussions and building [new testing
tools](https://github.com/clang-tidy-infra/CTIT). I'm passionate about
and project and would like to volunteer as a maintainer to continue
supporting the project's growth :)
Commit: f4e64ceb4bd818b5d6d7a52935e0282847d7b51c
https://github.com/llvm/llvm-project/commit/f4e64ceb4bd818b5d6d7a52935e0282847d7b51c
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M lldb/source/Plugins/ABI/AArch64/ABIAArch64.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
M lldb/source/Plugins/Process/Utility/RegisterInfos_arm64_sve.h
M lldb/source/Plugins/Process/minidump/RegisterContextMinidump_ARM64.cpp
M lldb/source/Utility/ARM64_DWARF_Registers.h
M lldb/source/Utility/ARM64_ehframe_Registers.h
Log Message:
-----------
[lldb] AArch64 register 33 is not cpsr (#183860)
I have an unwind failure where the eh_frame for a
trap handler states that the caller's return address is in eh_frame
register 33, which lldb treats as cpsr.
https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#dwarf-register-names
Register 33 is ELR_mode, which isn't defined as a register in any of the
AArch64 register definition files in lldb today, so I'm not adding it to
the header files.
rdar://170602999
Commit: 28638f519783a705489237f9158ecd4692208b5c
https://github.com/llvm/llvm-project/commit/28638f519783a705489237f9158ecd4692208b5c
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M lldb/include/lldb/Core/Debugger.h
M lldb/include/lldb/Target/Process.h
M lldb/source/Core/Debugger.cpp
M lldb/source/Target/Process.cpp
Log Message:
-----------
[lldb] Remove Debugger::{FindTargetWithProcessID, FindTargetWithProcess} (#184446)
In #184259, Jim noticed that Debugger::FindTargetWithProcess and
Debugger::FindTargetWithProcessID are rather poorly designed APIs as
tehy allow code running in one Debugger to mess with Targets from
another Debugger. The only use is Process::SetProcessExitStatus which
isn't actually used.
Commit: 1b633d6d6d75c172ecd9b9a4e250842468edb137
https://github.com/llvm/llvm-project/commit/1b633d6d6d75c172ecd9b9a4e250842468edb137
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Sema/atomic-ops.c
M clang/test/Sema/scoped-atomic-ops.c
Log Message:
-----------
[Clang] Permit floating point and pointer values in most atomic ops (#183843)
Summary:
We already support floating point arguments for the standard atomic
functions. LLVM supports these in most cases as well. This PR unifies
the handling and allows this in the cases that the LLVM IR supports.
Commit: e71f327b46059fe232b205414a3e8c1fc537c80f
https://github.com/llvm/llvm-project/commit/e71f327b46059fe232b205414a3e8c1fc537c80f
Author: zhouguangyuan0718 <89333397+zhouguangyuan0718 at users.noreply.github.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Basic/Targets/X86.h
M clang/lib/Driver/ToolChains/Arch/X86.cpp
A clang/test/Driver/x86_64-fixed-r-register.c
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86Subtarget.cpp
M llvm/lib/Target/X86/X86Subtarget.h
A llvm/test/CodeGen/X86/reserveRreg.ll
Log Message:
-----------
[X86] support reserve r8~r15 on X86_64 (#180242)
Which is under discussion in
https://github.com/llvm/llvm-project/issues/179036
Add new options -ffixed_r{8-15} for clang X86 target, like option
"-ffixed_x" for RISCV/AArch64 target.
Also, add target-feature +reserve-r{8-15} for the X86 backend.
The registers which are specified reserved will not be used in
RegAlloc/CalleeSave. Then the reserved registers can be maintained by
user. It will be useful for the runtime/interpreter implementation.
Other registers are used in specific instructions or mechanism, so they
can't be reserved.
Commit: 87a4b36fbe7f46082c7ddb30ccf702a0913c1e08
https://github.com/llvm/llvm-project/commit/87a4b36fbe7f46082c7ddb30ccf702a0913c1e08
Author: Derek Schuff <dschuff at chromium.org>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
A llvm/test/CodeGen/WebAssembly/simd-memcmp.ll
Log Message:
-----------
[WebAssembly] Use MVT::i32 instead of i1 in performAnyAllCombine (#183866)
The CombineSetCC helpers and performAnyAllCombine generate MVT::i1
results.
However MVT::i1 is an illegal type in WebAssembly, and this combiner can
run either before or after legalization. Directly creating the intrinsic
and negating its result using XOR instead of i1 and a NOT operation
avoids this problem.
Fixes #183842
Commit: 0c9734f120550f4984363c7cf0a33453f2154721
https://github.com/llvm/llvm-project/commit/0c9734f120550f4984363c7cf0a33453f2154721
Author: Florian Mayer <fmayer at google.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[NFC] [doc] fix invalid comment syntax in IR (#184457)
Commit: 393bbd55201abdf327f7fc0aab90269393c71d67
https://github.com/llvm/llvm-project/commit/393bbd55201abdf327f7fc0aab90269393c71d67
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/performance/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Analysis/Scalable/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Analysis/Scalable/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/DependencyScanning/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/X86/AsmParser/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
Log Message:
-----------
[gn build] Port commits (#184454)
282a2b77c358
60eac414b794
6d82f143dee1
80a1cf4f8058
8a9049198d18
a171b8d4d523
f3e8508ac771
Move X86GenAsmMatcher into llvm/lib/Target/X86
Commit: 62144f48d43fc33d7e73fff68aea31dd287d5349
https://github.com/llvm/llvm-project/commit/62144f48d43fc33d7e73fff68aea31dd287d5349
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M flang/lib/Lower/PFTBuilder.cpp
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/do-while-to-scf-while.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/mixed_loops.f90
M flang/test/Lower/pre-fir-tree02.f90
M flang/test/Lower/while_loop.f90
Log Message:
-----------
[flang] make lowering to scf.while default (#184234)
We've tested the implementation of fortran do-while loops being lowered
to scf.while and want to make it the default option.
Commit: efdfb6a676d9b81248b1e81b88aef40ecae65a87
https://github.com/llvm/llvm-project/commit/efdfb6a676d9b81248b1e81b88aef40ecae65a87
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2026-03-03 (Tue, 03 Mar 2026)
Changed paths:
M .github/workflows/bazel-checks.yml
M .github/workflows/containers/github-action-ci-tooling/Dockerfile
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/spirv-tests.yml
M clang-tools-extra/Maintainers.rst
M clang-tools-extra/clang-doc/CMakeLists.txt
M clang-tools-extra/clang-doc/Generators.cpp
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/MDGenerator.cpp
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/YAMLGenerator.cpp
A clang-tools-extra/clang-doc/benchmarks/CMakeLists.txt
A clang-tools-extra/clang-doc/benchmarks/ClangDocBenchmark.cpp
M clang-tools-extra/clang-tidy/bugprone/StdNamespaceModificationCheck.cpp
M clang-tools-extra/clang-tidy/google/ExplicitConstructorCheck.cpp
M clang-tools-extra/clang-tidy/readability/RedundantTypenameCheck.cpp
M clang-tools-extra/clang-tidy/utils/LexerUtils.cpp
M clang-tools-extra/clang-tidy/utils/LexerUtils.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/Inputs/Headers/system-header-simulation.h
M clang-tools-extra/test/clang-tidy/checkers/bugprone/std-namespace-modification.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/redundant-typename.cpp
M clang-tools-extra/unittests/clang-doc/ClangDocTest.cpp
M clang-tools-extra/unittests/clang-doc/GeneratorTest.cpp
M clang-tools-extra/unittests/clang-tidy/LexerUtilsTest.cpp
M clang/cmake/modules/AddClang.cmake
M clang/docs/ReleaseNotes.rst
M clang/include/clang/APINotes/APINotesReader.h
M clang/include/clang/AST/ASTMutationListener.h
A clang/include/clang/AST/pch.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeAnnotations.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/Diagnostic.h
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/LangStandard.h
M clang/include/clang/Basic/OpenCLExtensions.def
M clang/include/clang/Basic/TargetCXXABI.h
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
M clang/include/clang/CIR/Dialect/Passes.h
M clang/include/clang/CIR/Dialect/Passes.td
M clang/include/clang/CIR/Interfaces/CIROpInterfaces.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/DependencyScanning/DependencyScannerImpl.h
M clang/include/clang/DependencyScanning/DependencyScanningWorker.h
M clang/include/clang/Frontend/ChainedDiagnosticConsumer.h
M clang/include/clang/Options/Options.td
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/RangedConstraintManager.h
M clang/include/clang/Tooling/DependencyScanningTool.h
M clang/lib/APINotes/APINotesFormat.h
M clang/lib/APINotes/APINotesReader.cpp
M clang/lib/APINotes/APINotesYAMLCompiler.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/CMakeLists.txt
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/LangOptions.cpp
M clang/lib/Basic/Targets/AVR.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/lib/CIR/CodeGen/CIRGenCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenCXXABI.h
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenException.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CMakeLists.txt
A clang/lib/CIR/Dialect/Transforms/EHABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerItaniumCXXABI.cpp
M clang/lib/CIR/Lowering/CIRPasses.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/ModuleBuilder.cpp
M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Driver/Distro.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Arch/X86.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/MultiplexConsumer.cpp
M clang/lib/Frontend/SerializedDiagnosticPrinter.cpp
M clang/lib/Frontend/VerifyDiagnosticConsumer.cpp
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/amdhsa_abi.h
M clang/lib/Lex/DependencyDirectivesScanner.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Options/DriverOptions.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaOpenACCClauseAppertainment.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaWasm.cpp
M clang/lib/Serialization/ASTCommon.h
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/StaticAnalyzer/Checkers/ErrnoModeling.cpp
M clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
M clang/lib/Tooling/DependencyScanningTool.cpp
M clang/lib/Tooling/Tooling.cpp
M clang/test/Analysis/Checkers/WebKit/nodelete-annotation.cpp
M clang/test/CIR/CodeGen/assign-operator.cpp
M clang/test/CIR/CodeGen/atomic-thread-fence.c
M clang/test/CIR/CodeGen/atomic.c
M clang/test/CIR/CodeGen/basic.c
M clang/test/CIR/CodeGen/basic.cpp
M clang/test/CIR/CodeGen/binop.cpp
A clang/test/CIR/CodeGen/bitfield-assignment-loc.c
M clang/test/CIR/CodeGen/bitfields.c
A clang/test/CIR/CodeGen/c89-implicit-int.c
M clang/test/CIR/CodeGen/complex-compound-assignment.cpp
M clang/test/CIR/CodeGen/complex-mul-div.cpp
M clang/test/CIR/CodeGen/complex.cpp
M clang/test/CIR/CodeGen/compound_assign.cpp
A clang/test/CIR/CodeGen/expressions.cpp
A clang/test/CIR/CodeGen/gnu-ptr-math.c
M clang/test/CIR/CodeGen/if.cpp
M clang/test/CIR/CodeGen/integer-overflow.c
M clang/test/CIR/CodeGen/lambda.cpp
M clang/test/CIR/CodeGen/namespace.cpp
M clang/test/CIR/CodeGen/new.cpp
M clang/test/CIR/CodeGen/no-odr-use.cpp
M clang/test/CIR/CodeGen/non-type-template-param.cpp
M clang/test/CIR/CodeGen/opaque.cpp
M clang/test/CIR/CodeGen/pointer-to-data-member-cast.cpp
M clang/test/CIR/CodeGen/pointer-to-member-func-cast.cpp
M clang/test/CIR/CodeGen/pointer-to-member-func-cmp.cpp
M clang/test/CIR/CodeGen/pointer-to-member-func.cpp
M clang/test/CIR/CodeGen/requires-expr.cpp
M clang/test/CIR/CodeGen/size-of-vla.cpp
M clang/test/CIR/CodeGen/struct-init.cpp
M clang/test/CIR/CodeGen/switch_flat_op.cpp
M clang/test/CIR/CodeGen/ternary.cpp
M clang/test/CIR/CodeGen/throws.cpp
A clang/test/CIR/CodeGen/thunks.cpp
M clang/test/CIR/CodeGen/try-catch-tmp.cpp
M clang/test/CIR/CodeGen/try-catch.cpp
M clang/test/CIR/CodeGen/variable-decomposition.cpp
M clang/test/CIR/CodeGen/vector-ext-element.cpp
M clang/test/CIR/CodeGen/vector-ext.cpp
M clang/test/CIR/CodeGen/vector.cpp
M clang/test/CIR/CodeGen/vla.c
M clang/test/CIR/CodeGenBuiltins/AArch64/acle_sve_len.c
M clang/test/CIR/CodeGenBuiltins/X86/avx10_2_512bf16-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx10_2bf16-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx2-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512bw-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512dq-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512fp16-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512vldq-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/cmp-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/sse2-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/sse41-builtins.c
A clang/test/CIR/CodeGenBuiltins/builtin-isinf-sign.c
A clang/test/CIR/CodeGenCUDA/kernel-args.cu
A clang/test/CIR/CodeGenCXX/vtable-pure-deleted-funcs.cpp
M clang/test/CIR/CodeGenOpenACC/atomic-capture.cpp
M clang/test/CIR/CodeGenOpenACC/atomic-update.cpp
M clang/test/CIR/CodeGenOpenACC/atomic-write.cpp
M clang/test/CIR/CodeGenOpenACC/combined-firstprivate-clause.cpp
M clang/test/CIR/CodeGenOpenACC/combined-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined.cpp
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.cpp
M clang/test/CIR/CodeGenOpenACC/compute-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-default-ops.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-float.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-unsigned-int.c
M clang/test/CIR/CodeGenOpenACC/firstprivate-clause-recipes.cpp
M clang/test/CIR/CodeGenOpenACC/loop-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-int.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-int.cpp
M clang/test/CIR/CodeGenOpenACC/reduction-clause-recipes.cpp
M clang/test/CIR/CodeGenOpenMP/omp-llvmir.c
M clang/test/CIR/CodeGenOpenMP/parallel.c
A clang/test/CIR/IR/func-attrs.cir
M clang/test/CIR/IR/throw.cir
M clang/test/CIR/IR/vector.cir
M clang/test/CIR/Lowering/binop-bool.cir
M clang/test/CIR/Lowering/binop-fp.cir
M clang/test/CIR/Lowering/binop-signed-int.cir
M clang/test/CIR/Lowering/binop-unsigned-int.cir
A clang/test/CIR/Transforms/eh-abi-lowering-itanium.cir
M clang/test/CIR/Transforms/flatten-try-op.cir
M clang/test/CIR/Transforms/switch.cir
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/WebAssembly/builtins-table-externref.c
A clang/test/CodeGen/asm_incbin.c
M clang/test/CodeGen/atomic-arm64.c
M clang/test/CodeGen/atomic-ops.c
M clang/test/CodeGen/big-atomic-ops.c
M clang/test/CodeGenCXX/pfp-member-pointer-offsetof.cpp
A clang/test/CodeGenCoroutines/coro-gro3.cpp
M clang/test/CodeGenCoroutines/coro-suspend-cleanups.cpp
M clang/test/CodeGenOpenCL/atomic-ops.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-tensor-load-store.cl
M clang/test/Driver/hip-save-temps.hip
M clang/test/Driver/hip-spirv-backend-bindings.c
M clang/test/Driver/hip-spirv-backend-phases.c
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/spirv-amd-toolchain.c
A clang/test/Driver/x86_64-fixed-r-register.c
A clang/test/Headers/amdhsa_abi.cl
A clang/test/OpenMP/for_range_loop_codegen.cpp
M clang/test/OpenMP/parallel_for_codegen.cpp
M clang/test/OpenMP/target_indirect_codegen.cpp
A clang/test/OpenMP/target_vtable_omp_indirect_call_lookup.cpp
M clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/atomic-ops.c
M clang/test/Sema/builtin-allow-sanitize-check.c
M clang/test/Sema/scoped-atomic-ops.c
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/Sema/warn-lifetime-safety-invalidations.cpp
A clang/test/SemaHLSL/Resources/Texture2D-SampleBias.hlsl
A clang/test/SemaHLSL/Resources/Texture2D-SampleCmp.hlsl
A clang/test/SemaHLSL/Resources/Texture2D-SampleCmpLevelZero.hlsl
A clang/test/SemaHLSL/Resources/Texture2D-SampleGrad.hlsl
A clang/test/SemaHLSL/Resources/Texture2D-SampleLevel.hlsl
A clang/test/SemaHLSL/Resources/Texture2D-Sema.hlsl
A clang/test/SemaHLSL/Resources/packoffset-invalid.hlsl
A clang/test/SemaHLSL/Resources/prohibit_resource_edits.hlsl
A clang/test/SemaHLSL/Resources/resource_binding_attr_error.hlsl
A clang/test/SemaHLSL/Resources/resource_binding_attr_error_basic.hlsl
A clang/test/SemaHLSL/Resources/resource_binding_attr_error_other.hlsl
A clang/test/SemaHLSL/Resources/resource_binding_attr_error_resource.hlsl
A clang/test/SemaHLSL/Resources/resource_binding_attr_error_silence_diags.hlsl
A clang/test/SemaHLSL/Resources/resource_binding_attr_error_space.hlsl
A clang/test/SemaHLSL/Resources/resource_binding_attr_error_udt.hlsl
A clang/test/SemaHLSL/Resources/resource_binding_attr_error_uint32_max.hlsl
A clang/test/SemaHLSL/Resources/resource_binding_implicit.hlsl
A clang/test/SemaHLSL/Resources/static_resources.hlsl
A clang/test/SemaHLSL/Resources/unbounded_resource_arrays.hlsl
R clang/test/SemaHLSL/Texture2D-SampleBias.hlsl
R clang/test/SemaHLSL/Texture2D-SampleCmp.hlsl
R clang/test/SemaHLSL/Texture2D-SampleCmpLevelZero.hlsl
R clang/test/SemaHLSL/Texture2D-SampleGrad.hlsl
R clang/test/SemaHLSL/Texture2D-SampleLevel.hlsl
R clang/test/SemaHLSL/Texture2D-Sema.hlsl
A clang/test/SemaHLSL/local_resource_bindings.hlsl
A clang/test/SemaHLSL/local_resource_bindings_errs.hlsl
R clang/test/SemaHLSL/packoffset-invalid.hlsl
R clang/test/SemaHLSL/prohibit_resource_edits.hlsl
R clang/test/SemaHLSL/resource_binding_attr_error.hlsl
R clang/test/SemaHLSL/resource_binding_attr_error_basic.hlsl
R clang/test/SemaHLSL/resource_binding_attr_error_other.hlsl
R clang/test/SemaHLSL/resource_binding_attr_error_resource.hlsl
R clang/test/SemaHLSL/resource_binding_attr_error_silence_diags.hlsl
R clang/test/SemaHLSL/resource_binding_attr_error_space.hlsl
R clang/test/SemaHLSL/resource_binding_attr_error_udt.hlsl
R clang/test/SemaHLSL/resource_binding_attr_error_uint32_max.hlsl
R clang/test/SemaHLSL/resource_binding_implicit.hlsl
R clang/test/SemaHLSL/static_resources.hlsl
R clang/test/SemaHLSL/unbounded_resource_arrays.hlsl
M clang/test/SemaOpenCL/extension-version.cl
M clang/tools/cir-opt/cir-opt.cpp
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/driver/cc1_main.cpp
M clang/tools/driver/driver.cpp
M clang/unittests/DependencyScanning/CMakeLists.txt
R clang/unittests/DependencyScanning/DependencyScanningWorkerTest.cpp
M clang/unittests/Lex/DependencyDirectivesScannerTest.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
M compiler-rt/test/cfi/icall/bad-signature.c
M compiler-rt/test/lsan/TestCases/create_thread_leak.cpp
M flang-rt/CMakeLists.txt
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.h
M flang/include/flang/Parser/preprocessor.h
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/RegisterOpenACCExtensions.cpp
M flang/lib/Parser/preprocessor.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/prescan.h
M flang/lib/Semantics/canonicalize-acc.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
M flang/test/Lower/OpenMP/composite_simd_linear.f90
M flang/test/Lower/OpenMP/distribute-parallel-do-simd.f90
M flang/test/Lower/OpenMP/distribute-simd.f90
M flang/test/Lower/OpenMP/loop-pointer-variable.f90
M flang/test/Lower/OpenMP/ordered-simd.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/wsloop-simd.f90
M flang/test/Lower/do-while-to-scf-while.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/mixed_loops.f90
M flang/test/Lower/pre-fir-tree02.f90
M flang/test/Lower/while_loop.f90
A flang/test/Preprocessing/bug178481.F90
M flang/test/Semantics/OpenACC/acc-cache-validity.f90
M flang/test/Semantics/OpenACC/acc-canonicalization-validity.f90
A flang/test/Transforms/OpenACC/acc-recipe-materialization-firstprivate-derived.fir
A flang/test/Transforms/OpenACC/acc-recipe-materialization-firstprivate.fir
A flang/test/Transforms/OpenACC/acc-recipe-materialization-kernel-private.fir
A flang/test/Transforms/OpenACC/acc-recipe-materialization-parallel.fir
A flang/test/Transforms/OpenACC/acc-recipe-materialization-private.fir
A flang/test/Transforms/OpenACC/acc-recipe-materialization-reduction.fir
M flang/tools/flang-driver/driver.cpp
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/key_t.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/CMakeLists.txt
M libc/include/llvm-libc-macros/linux/CMakeLists.txt
A libc/include/llvm-libc-macros/linux/sys-ipc-macros.h
A libc/include/llvm-libc-macros/sys-ipc-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/key_t.h
A libc/include/llvm-libc-types/struct_ipc_perm.h
M libc/include/stdlib-malloc.yaml
A libc/include/sys/ipc.yaml
M libc/include/sys/types.yaml
M libc/src/__support/GPU/allocator.cpp
M libc/src/stdio/baremetal/CMakeLists.txt
A libc/src/stdio/baremetal/fflush.cpp
A libc/src/stdio/baremetal/file_internal.cpp
M libc/src/stdio/baremetal/file_internal.h
M libc/src/stdio/baremetal/getc.cpp
A libc/src/stdio/baremetal/ungetc.cpp
M libc/src/stdio/baremetal/vfscanf_internal.h
M libc/src/sys/CMakeLists.txt
A libc/src/sys/ipc/CMakeLists.txt
A libc/src/sys/ipc/ftok.h
A libc/src/sys/ipc/linux/CMakeLists.txt
A libc/src/sys/ipc/linux/ftok.cpp
A libc/src/sys/ipc/linux/kernel_statx.h
M libc/test/include/CMakeLists.txt
M libc/test/integration/CMakeLists.txt
M libc/test/src/sys/CMakeLists.txt
A libc/test/src/sys/ipc/CMakeLists.txt
A libc/test/src/sys/ipc/linux/CMakeLists.txt
A libc/test/src/sys/ipc/linux/ftok_test.cpp
M libc/utils/libctest/format.py
M libcxx/test/benchmarks/numeric/gcd.bench.cpp
M libcxx/test/benchmarks/streams/getline.bench.cpp
M libcxx/test/benchmarks/streams/ofstream.bench.cpp
M libcxx/utils/libcxx/test/dsl.py
M lld/COFF/Driver.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Config.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Target.h
M lld/tools/lld/CMakeLists.txt
M lld/wasm/OutputSections.cpp
M lldb/include/lldb/Core/Debugger.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Utility/LLDBLog.h
M lldb/source/Commands/CommandObjectWatchpoint.cpp
M lldb/source/Core/Debugger.cpp
M lldb/source/Initialization/SystemInitializerCommon.cpp
M lldb/source/Plugins/ABI/AArch64/ABIAArch64.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DYLDRendezvous.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DYLDRendezvous.h
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
M lldb/source/Plugins/Process/Utility/RegisterInfos_arm64_sve.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
M lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
M lldb/source/Plugins/Process/minidump/RegisterContextMinidump_ARM64.cpp
M lldb/source/Plugins/Process/scripted/ScriptedProcess.cpp
M lldb/source/Plugins/Process/wasm/ProcessWasm.cpp
M lldb/source/Plugins/RegisterTypeBuilder/RegisterTypeBuilderClang.cpp
M lldb/source/Plugins/ScriptInterpreter/Lua/ScriptInterpreterLua.cpp
M lldb/source/Plugins/ScriptInterpreter/None/ScriptInterpreterNone.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Utility/ARM64_DWARF_Registers.h
M lldb/source/Utility/ARM64_ehframe_Registers.h
M lldb/source/Utility/LLDBLog.cpp
M lldb/test/API/lang/c/tls_globals/TestTlsGlobals.py
M lldb/test/API/lang/cpp/template/TestTemplateArgs.py
M lldb/test/API/python_api/event/TestEvents.py
M lldb/test/API/python_api/type/TestTypeList.py
M lldb/unittests/DAP/TestBase.cpp
M lldb/unittests/DAP/TestBase.h
M lldb/unittests/DAP/VariablesTest.cpp
M lldb/unittests/Target/CMakeLists.txt
M llvm/cmake/modules/AddLLVM.cmake
M llvm/cmake/modules/LLVM-Config.cmake
M llvm/docs/DirectX/DXILResources.rst
M llvm/docs/LangRef.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/ADT/EquivalenceClasses.h
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
M llvm/include/llvm/Analysis/DominanceFrontier.h
M llvm/include/llvm/Analysis/DominanceFrontierImpl.h
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
M llvm/include/llvm/CodeGen/RuntimeLibcallUtil.h
M llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/MC/MCParser/MCAsmParser.h
M llvm/include/llvm/TableGen/CodeGenHelpers.h
M llvm/include/llvm/Target/TargetLoweringObjectFile.h
M llvm/include/llvm/Transforms/Coroutines/CoroShape.h
M llvm/lib/Analysis/CmpInstAnalysis.cpp
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/DXILResource.cpp
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CAS/OnDiskCommon.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/RegisterClassInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/LibraryScanner.cpp
M llvm/lib/IR/ConstantRange.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/Object/ModuleSymbolTable.cpp
M llvm/lib/Support/APFixedPoint.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
A llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/AArch64TargetObjectFile.cpp
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMCallLowering.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
M llvm/lib/Target/Lanai/LanaiTargetObjectFile.cpp
M llvm/lib/Target/Lanai/LanaiTargetObjectFile.h
M llvm/lib/Target/M68k/GISel/M68kCallLowering.cpp
M llvm/lib/Target/M68k/GISel/M68kCallLowering.h
M llvm/lib/Target/Mips/MipsCallLowering.cpp
M llvm/lib/Target/Mips/MipsTargetObjectFile.cpp
M llvm/lib/Target/Mips/MipsTargetObjectFile.h
M llvm/lib/Target/NVPTX/NVPTXTargetObjectFile.h
M llvm/lib/Target/PowerPC/GISel/PPCCallLowering.cpp
M llvm/lib/Target/PowerPC/GISel/PPCCallLowering.h
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoSFB.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/lib/Target/RISCV/RISCVSchedAndes45.td
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.cpp
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.h
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.h
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/lib/Target/SPIRV/SPIRVCombinerHelper.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.h
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.h
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
M llvm/lib/Target/SPIRV/SPIRVTargetObjectFile.h
M llvm/lib/Target/TargetLoweringObjectFile.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/X86/GISel/X86CallLowering.cpp
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86Subtarget.cpp
M llvm/lib/Target/X86/X86Subtarget.h
M llvm/lib/Target/XCore/XCoreTargetObjectFile.cpp
M llvm/lib/Target/XCore/XCoreTargetObjectFile.h
M llvm/lib/Transforms/Coroutines/CoroEarly.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/NewGVN.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
A llvm/test/Analysis/DXILResource/buffer-frombinding-unbounded.ll
M llvm/test/Analysis/LoopAccessAnalysis/different-access-types-rt-checks.ll
M llvm/test/Analysis/LoopAccessAnalysis/retry-runtime-checks-after-dependence-analysis-forked-pointers.ll
M llvm/test/Analysis/LoopAccessAnalysis/unknown-dependence-retry-with-runtime-checks.ll
M llvm/test/CodeGen/AArch64/arm64-neon-select_cc.ll
M llvm/test/CodeGen/AArch64/clmul-fixed.ll
M llvm/test/CodeGen/AArch64/clmul-scalable.ll
A llvm/test/CodeGen/AArch64/dso_local_equivalent.ll
A llvm/test/CodeGen/AArch64/neon-extractbitcast-mir.ll
M llvm/test/CodeGen/AArch64/srem-vec-crash.ll
M llvm/test/CodeGen/AArch64/stp-opt-with-renaming-ld3.mir
M llvm/test/CodeGen/AArch64/veclib-llvm.pow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f64.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/ashr64_reduce.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
R llvm/test/CodeGen/AMDGPU/call-args-inreg-no-sgpr-for-csrspill-xfail.ll
A llvm/test/CodeGen/AMDGPU/call-args-inreg-no-sgpr-for-csrspill.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/implicit-arg-block-count.ll
M llvm/test/CodeGen/AMDGPU/implicit-arg-v5-opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tensor.load.store.ll
M llvm/test/CodeGen/AMDGPU/reg-coalescer-subreg-liveness.mir
M llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll
M llvm/test/CodeGen/AMDGPU/shl64_reduce.ll
M llvm/test/CodeGen/AMDGPU/srl64_reduce.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b16.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b32.mir
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/ARM/fminmax-folds.ll
M llvm/test/CodeGen/ARM/pow.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/handle-cases.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/handle-to-index.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/non-unique.ll
A llvm/test/CodeGen/MIR/Generic/machine-function-empty-name-no-ir-section.mir
A llvm/test/CodeGen/MIR/Generic/machine-function-empty-name-no-matching-ir.mir
A llvm/test/CodeGen/MIR/Generic/machine-function-empty-name.mir
M llvm/test/CodeGen/PowerPC/clmul-vector.ll
M llvm/test/CodeGen/RISCV/copysign-casts.ll
M llvm/test/CodeGen/RISCV/double-convert.ll
M llvm/test/CodeGen/RISCV/double-mem.ll
M llvm/test/CodeGen/RISCV/double-select-fcmp.ll
M llvm/test/CodeGen/RISCV/double-stack-spill-restore.ll
A llvm/test/CodeGen/RISCV/large-codemodel-sections.ll
M llvm/test/CodeGen/RISCV/opt-w-instrs.mir
M llvm/test/CodeGen/RISCV/rv64p.ll
M llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-clmul.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave2.ll
M llvm/test/CodeGen/RISCV/rvv/vabd.ll
M llvm/test/CodeGen/RISCV/rvv/vabdu.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt.mir
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fun-ptr-service-func.ll
M llvm/test/CodeGen/SPIRV/pointers/fun-with-aggregate-arg-in-const-init.ll
A llvm/test/CodeGen/Thumb2/pacbti-m-bxaut.ll
M llvm/test/CodeGen/WebAssembly/load-ext.ll
A llvm/test/CodeGen/WebAssembly/simd-memcmp.ll
M llvm/test/CodeGen/X86/AMX/amx-low-intrinsics-no-amx-bitcast.ll
M llvm/test/CodeGen/X86/AMX/amx-low-intrinsics.ll
M llvm/test/CodeGen/X86/clmul-vector-256.ll
M llvm/test/CodeGen/X86/clmul-vector-512.ll
M llvm/test/CodeGen/X86/clmul-vector.ll
M llvm/test/CodeGen/X86/fmaxnum.ll
M llvm/test/CodeGen/X86/fminnum.ll
A llvm/test/CodeGen/X86/funnel-shift-i256.ll
M llvm/test/CodeGen/X86/known-never-zero.ll
A llvm/test/CodeGen/X86/reserveRreg.ll
M llvm/test/CodeGen/X86/shift-i256.ll
A llvm/test/CodeGen/X86/veclib-llvm.sincos.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
M llvm/test/MC/ELF/rtti-proxy-gotpcrel.ll
M llvm/test/Transforms/Coroutines/ArgAddr.ll
M llvm/test/Transforms/Coroutines/coro-align16.ll
M llvm/test/Transforms/Coroutines/coro-align32.ll
M llvm/test/Transforms/Coroutines/coro-align64-02.ll
M llvm/test/Transforms/Coroutines/coro-align64.ll
M llvm/test/Transforms/Coroutines/coro-align8-02.ll
M llvm/test/Transforms/Coroutines/coro-align8.ll
M llvm/test/Transforms/Coroutines/coro-alloc-with-param-O0.ll
M llvm/test/Transforms/Coroutines/coro-alloc-with-param-O2.ll
M llvm/test/Transforms/Coroutines/coro-alloca-01.ll
M llvm/test/Transforms/Coroutines/coro-alloca-02.ll
M llvm/test/Transforms/Coroutines/coro-alloca-03.ll
M llvm/test/Transforms/Coroutines/coro-alloca-04.ll
M llvm/test/Transforms/Coroutines/coro-alloca-06.ll
M llvm/test/Transforms/Coroutines/coro-alloca-07.ll
M llvm/test/Transforms/Coroutines/coro-alloca-08.ll
M llvm/test/Transforms/Coroutines/coro-alloca-09.ll
M llvm/test/Transforms/Coroutines/coro-alloca-loop-carried-address.ll
M llvm/test/Transforms/Coroutines/coro-alloca-outside-frame.ll
M llvm/test/Transforms/Coroutines/coro-alloca-with-addrspace.ll
M llvm/test/Transforms/Coroutines/coro-async-dyn-align.ll
M llvm/test/Transforms/Coroutines/coro-async.ll
M llvm/test/Transforms/Coroutines/coro-await-suspend-lower-invoke.ll
M llvm/test/Transforms/Coroutines/coro-await-suspend-lower.ll
M llvm/test/Transforms/Coroutines/coro-byval-param.ll
M llvm/test/Transforms/Coroutines/coro-catchswitch.ll
M llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll
M llvm/test/Transforms/Coroutines/coro-eh-aware-edge-split-01.ll
M llvm/test/Transforms/Coroutines/coro-eh-aware-edge-split-02.ll
M llvm/test/Transforms/Coroutines/coro-frame-arrayalloca.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-01.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-02.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-04.ll
M llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-05.ll
M llvm/test/Transforms/Coroutines/coro-frame.ll
M llvm/test/Transforms/Coroutines/coro-lifetime-end.ll
M llvm/test/Transforms/Coroutines/coro-materialize.ll
M llvm/test/Transforms/Coroutines/coro-noop.ll
M llvm/test/Transforms/Coroutines/coro-padding.ll
M llvm/test/Transforms/Coroutines/coro-param-copy.ll
M llvm/test/Transforms/Coroutines/coro-retcon-once-value.ll
M llvm/test/Transforms/Coroutines/coro-retcon-once-value2.ll
M llvm/test/Transforms/Coroutines/coro-retcon-remat.ll
M llvm/test/Transforms/Coroutines/coro-retcon-resume-values2.ll
M llvm/test/Transforms/Coroutines/coro-retcon.ll
M llvm/test/Transforms/Coroutines/coro-spill-after-phi.ll
M llvm/test/Transforms/Coroutines/coro-spill-corobegin.ll
M llvm/test/Transforms/Coroutines/coro-spill-defs-before-corobegin.ll
M llvm/test/Transforms/Coroutines/coro-spill-promise-02.ll
M llvm/test/Transforms/Coroutines/coro-spill-promise.ll
M llvm/test/Transforms/Coroutines/coro-spill-suspend.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-01.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-02.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-03.ll
M llvm/test/Transforms/Coroutines/coro-split-sink-lifetime-04.ll
M llvm/test/Transforms/Coroutines/coro-split-tbaa-md.ll
M llvm/test/Transforms/Coroutines/coro-zero-alloca.ll
A llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.implicitarg.ptr.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
M llvm/test/Transforms/InstSimplify/ConstProp/min-max.ll
M llvm/test/Transforms/InstSimplify/fminmax-folds.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-difference.ll
M llvm/test/Transforms/SLPVectorizer/X86/extracts-non-extendable.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-load-reduced-as-part-of-bv.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
M llvm/test/Transforms/SLPVectorizer/reduction-gather-non-scheduled-extracts.ll
M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/armpl.ll
R llvm/test/tools/llvm-mca/AArch64/Apple/Inputs/basic-instructions.s
R llvm/test/tools/llvm-mca/AArch64/Apple/Inputs/neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Apple/M1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Apple/M1-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Cortex/A57-basic-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/basic-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/bf16-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/complxnum-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/fp16fml-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/fptoint-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/i8mm-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/mte-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/neon-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/rcpc-immo-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/sve-instructions.s
R llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/basic-instructions.s
R llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/bf16-instructions.s
R llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/complxnum-instructions.s
R llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/fp16fml-instructions.s
R llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/fptoint-instructions.s
R llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/i8mm-instructions.s
R llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/mte-instructions.s
R llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/neon-instructions.s
R llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/rcpc-immo-instructions.s
R llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/sve-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N1-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-bf16-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-complxnum-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-fp16fml-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-fptoint-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-i8mm-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-mte-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-rcpc-immo-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-sve-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-bf16-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-complxnum-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-fp16fml-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-fptoint-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-i8mm-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-mte-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-rcpc-immo-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-sve-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-bf16-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-complxnum-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-fp16fml-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-i8mm-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-rcpc-immo-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-bf16-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-complxnum-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-fp16fml-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-fptoint-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-i8mm-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-mte-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-rcpc-immo-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-sve-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-bf16-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-complxnum-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-fp16fml-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-fptoint-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-i8mm-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-mte-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-rcpc-immo-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-sve-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-bf16-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-complxnum-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-fp16fml-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-fptoint-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-i8mm-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-rcpc-immo-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-sve-instructions.s
M llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-reduction.s
M llvm/tools/llvm-dwarfdump/Coverage.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/unittests/Analysis/ValueTrackingTest.cpp
M llvm/unittests/Transforms/Vectorize/VPPostDomFrontierTest.cpp
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/performance/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Analysis/Scalable/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Analysis/Scalable/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/DependencyScanning/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/X86/AsmParser/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
M llvm/utils/lit/lit/LitConfig.py
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/display.py
M llvm/utils/lit/lit/llvm/config.py
M llvm/utils/lit/tests/lit.cfg
M llvm/utils/lit/tests/shtest-readfile.py
M llvm/utils/llvm-lit/llvm-lit.in
M mlir/CMakeLists.txt
M mlir/cmake/modules/AddMLIR.cmake
M mlir/include/mlir/Dialect/Func/IR/FuncOps.td
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/include/mlir/Dialect/MPI/IR/MPIOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsLoop.h
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/include/mlir/Dialect/Shard/IR/ShardOps.td
M mlir/include/mlir/Dialect/Shard/Transforms/Partition.h
M mlir/include/mlir/Dialect/Shard/Transforms/Passes.td
R mlir/include/mlir/Dialect/Shard/Transforms/Simplifications.h
A mlir/include/mlir/Dialect/Shard/Transforms/Simplify.h
M mlir/include/mlir/Dialect/Vector/Transforms/VectorDistribution.h
M mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/Transforms.h
M mlir/include/mlir/Dialect/XeGPU/uArch/IntelGpuXe2.h
M mlir/include/mlir/IR/Operation.h
M mlir/include/mlir/IR/Region.h
M mlir/lib/Conversion/ArithToEmitC/ArithToEmitCPass.cpp
M mlir/lib/Conversion/FuncToEmitC/FuncToEmitCPass.cpp
M mlir/lib/Conversion/MPIToLLVM/CMakeLists.txt
M mlir/lib/Conversion/MPIToLLVM/MPIToLLVM.cpp
M mlir/lib/Conversion/ShardToMPI/ShardToMPI.cpp
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/lib/Dialect/Func/IR/FuncOps.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/InlinerInterfaceImpl.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/MPI/IR/MPIOps.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACCCG.cpp
A mlir/lib/Dialect/OpenACC/Transforms/ACCRecipeMaterialization.cpp
M mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
M mlir/lib/Dialect/OpenACC/Transforms/LegalizeDataValues.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtils.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsLoop.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/Shard/IR/ShardOps.cpp
M mlir/lib/Dialect/Shard/Transforms/CMakeLists.txt
R mlir/lib/Dialect/Shard/Transforms/Simplifications.cpp
A mlir/lib/Dialect/Shard/Transforms/Simplify.cpp
M mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseSpaceCollapse.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorConversion.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenUtils.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenUtils.h
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/CMakeLists.txt
R mlir/lib/Dialect/XeGPU/Transforms/XeGPUFoldAliasOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToWiDistributeExperimental.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/ExecutionEngine/CMakeLists.txt
M mlir/lib/ExecutionEngine/LevelZeroRuntimeWrappers.cpp
M mlir/test/Conversion/ArithToEmitC/arith-to-emitc-failed.mlir
A mlir/test/Conversion/FuncToEmitC/func-to-emitc-failed.mlir
M mlir/test/Conversion/FuncToLLVM/func-memref-return.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm-32b.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
M mlir/test/Conversion/MPIToLLVM/mpitollvm.mlir
M mlir/test/Conversion/ShardToMPI/convert-shard-to-mpi.mlir
M mlir/test/Conversion/VectorToXeGPU/store-to-xegpu.mlir
A mlir/test/Conversion/XeVMToLLVM/rewrite_alloca.mlir
M mlir/test/Dialect/EmitC/invalid_types.mlir
M mlir/test/Dialect/LLVMIR/inlining.mlir
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Dialect/Linalg/invalid.mlir
M mlir/test/Dialect/Linalg/transform-lower-pack.mlir
M mlir/test/Dialect/Linalg/transform-tile-and-fuse-pack-unpack.mlir
M mlir/test/Dialect/MPI/mpiops.mlir
M mlir/test/Dialect/NVGPU/invalid.mlir
A mlir/test/Dialect/OpenACC/acc-recipe-materialization-firstprivate.mlir
A mlir/test/Dialect/OpenACC/acc-recipe-materialization-kernel-private.mlir
A mlir/test/Dialect/OpenACC/acc-recipe-materialization-parallel.mlir
A mlir/test/Dialect/OpenACC/acc-recipe-materialization-private.mlir
A mlir/test/Dialect/OpenACC/acc-recipe-materialization-reduction.mlir
M mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
M mlir/test/Dialect/Shard/all-scatter-op-lowering.mlir
M mlir/test/Dialect/Shard/canonicalization.mlir
M mlir/test/Dialect/Shard/folding.mlir
M mlir/test/Dialect/Shard/invalid.mlir
M mlir/test/Dialect/Shard/ops.mlir
R mlir/test/Dialect/Shard/simplifications.mlir
A mlir/test/Dialect/Shard/simplify.mlir
A mlir/test/Dialect/SparseTensor/conversion_invalid.mlir
M mlir/test/Dialect/SparseTensor/invalid.mlir
M mlir/test/Dialect/SparseTensor/invalid_encoding.mlir
A mlir/test/Dialect/SparseTensor/sparse_foreach_rank0.mlir
M mlir/test/Dialect/SparseTensor/sparse_space_collapse.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
A mlir/test/Dialect/Vector/canonicalize/vector-to-elements.mlir
M mlir/test/Dialect/Vector/invalid.mlir
M mlir/test/Dialect/Vector/vector-warp-distribute.mlir
M mlir/test/Dialect/XeGPU/resolve-layout-conflicts.mlir
R mlir/test/Dialect/XeGPU/xegpu-fold-alias-ops.mlir
A mlir/test/Dialect/XeGPU/xegpu-propagate-layout-invalid.mlir
A mlir/test/Dialect/XeGPU/xegpu-subgroup-distribute-no-arch.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-unpack-mmt4d.mlir
M mlir/test/Interfaces/LoopLikeInterface/test-block-loop.mlir
M mlir/test/Interfaces/TilingInterface/lower-to-loops-using-interface.mlir
M mlir/test/Transforms/print-op-graph.mlir
M mlir/test/Transforms/test-dialect-conversion-pdll.mlir
M mlir/test/Transforms/test-legalizer.mlir
M mlir/test/Transforms/test-merge-blocks.mlir
M mlir/test/Transforms/test-pattern-selective-replacement.mlir
M mlir/test/lib/Dialect/Shard/CMakeLists.txt
M mlir/test/lib/Dialect/Shard/TestReshardingPartition.cpp
R mlir/test/lib/Dialect/Shard/TestSimplifications.cpp
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
M mlir/test/lib/Interfaces/LoopLikeInterface/TestBlockInLoop.cpp
M mlir/tools/mlir-opt/mlir-opt.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
M offload/include/OpenMP/Mapping.h
M offload/libomptarget/OpenMP/Mapping.cpp
M offload/libomptarget/interface.cpp
M offload/libomptarget/omptarget.cpp
M offload/test/api/omp_indirect_call_table_manual.c
A offload/test/api/omp_indirect_func_array.c
A offload/test/api/omp_indirect_func_basic.c
A offload/test/api/omp_indirect_func_struct.c
A offload/test/api/omp_virtual_func.cpp
A offload/test/api/omp_virtual_func_multiple_inheritance_01.cpp
A offload/test/api/omp_virtual_func_multiple_inheritance_02.cpp
A offload/test/api/omp_virtual_func_reference.cpp
A offload/test/mapping/map_ordering_ptee_tgt_alloc_mapper_alloc_from_to.c
A offload/test/mapping/map_ordering_ptee_tgt_data_alloc_tgt_mapper_present_delete_from_to.c
A offload/test/mapping/map_ordering_tgt_alloc_from_to.c
A offload/test/mapping/map_ordering_tgt_alloc_present_tofrom.c
A offload/test/mapping/map_ordering_tgt_alloc_tofrom.c
A offload/test/mapping/map_ordering_tgt_data_alloc_from.c
A offload/test/mapping/map_ordering_tgt_data_alloc_to_from.c
A offload/test/mapping/map_ordering_tgt_data_alloc_tofrom.c
A offload/test/mapping/map_ordering_tgt_exit_data_always_always.c
A offload/test/mapping/map_ordering_tgt_exit_data_delete_from.c
A offload/test/mapping/map_ordering_tgt_exit_data_delete_from_assumedsize.c
A offload/test/mapping/map_ordering_tgt_exit_data_from_delete_assumedsize.c
A offload/test/mapping/map_ordering_tgt_exit_data_from_mapper_overlap.c
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/ec723a924609...efdfb6a676d9
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