[all-commits] [llvm/llvm-project] e68867: [lldb][RISCV][test] Add RVV API tests

[daniilavdeev via All-commits]

  Branch: refs/heads/users/da/rvv_regs_3
  Home:   https://github.com/llvm/llvm-project
  Commit: e68867a8b04de97c26873c41a7ff464d7cde2163
      https://github.com/llvm/llvm-project/commit/e68867a8b04de97c26873c41a7ff464d7cde2163
  Author: Daniil Avdeev <daniilavdeev237 at gmail.com>
  Date:   2026-03-03 (Tue, 03 Mar 2026)

  Changed paths:
    M lldb/packages/Python/lldbsuite/test/lldbtest.py
    A lldb/packages/Python/lldbsuite/test/rvvutil.py
    A lldb/test/API/riscv/rvv-availability/Makefile
    A lldb/test/API/riscv/rvv-availability/TestRVVAvailability.py
    A lldb/test/API/riscv/rvv-availability/main.cpp
    A lldb/test/API/riscv/rvv-consistency/Makefile
    A lldb/test/API/riscv/rvv-consistency/TestRVVConsistency.py
    A lldb/test/API/riscv/rvv-consistency/main.cpp
    A lldb/test/API/riscv/rvv-printout/Makefile
    A lldb/test/API/riscv/rvv-printout/TestRVVPrintout.py
    A lldb/test/API/riscv/rvv-printout/main.cpp
    A lldb/test/API/riscv/rvv-rwr/Makefile
    A lldb/test/API/riscv/rvv-rwr/TestRVVReadWrite.py
    A lldb/test/API/riscv/rvv-rwr/main.cpp
    A lldb/test/API/riscv/rvv-side-effects/Makefile
    A lldb/test/API/riscv/rvv-side-effects/TestRVVSideEffects.py
    A lldb/test/API/riscv/rvv-side-effects/main.cpp
    A lldb/test/API/riscv/rvv-unsupported/Makefile
    A lldb/test/API/riscv/rvv-unsupported/TestRVVUnsupported.py
    A lldb/test/API/riscv/rvv-unsupported/main.cpp
    A lldb/test/API/riscv/rvv-vcsr-consistency/Makefile
    A lldb/test/API/riscv/rvv-vcsr-consistency/TestRVVConsistencyVCSR.py
    A lldb/test/API/riscv/rvv-vcsr-consistency/main.cpp

  Log Message:
  -----------
  [lldb][RISCV][test] Add RVV API tests

Support RISC-V vector register context (3/3)

Add API tests for RISC-V vector extension support, covering:
- Register availability detection
- VCSR register consistency checks
- Register access



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