[all-commits] [llvm/llvm-project] 75b0cf: [RISCV] Add scalar saturating add/sub operations f...

[Qihan Cai via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 75b0cf39b2f85635b37b4be078f65c66e1c0e3d6
      https://github.com/llvm/llvm-project/commit/75b0cf39b2f85635b37b4be078f65c66e1c0e3d6
  Author: Qihan Cai <caiqihan021 at hotmail.com>
  Date:   2026-03-03 (Tue, 03 Mar 2026)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rv64p.ll

  Log Message:
  -----------
  [RISCV] Add scalar saturating add/sub operations for i32 for RV64P (#184062)



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications