[all-commits] [llvm/llvm-project] 61faf7: [AArch64][GlobalISel] Use GPR for illegal fconstan...

[Ryan Cowan via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 61faf7d3db72dcfe8d19f9bd926133be1be0f62b
      https://github.com/llvm/llvm-project/commit/61faf7d3db72dcfe8d19f9bd926133be1be0f62b
  Author: Ryan Cowan <ryan.cowan at arm.com>
  Date:   2026-03-02 (Mon, 02 Mar 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/AArch64/GISel/AArch64GlobalISelUtils.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/inttoptr_add.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/preselect-process-phis.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-build-vector.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-constant.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-dup.mir
    M llvm/test/CodeGen/AArch64/aarch64-mops.ll
    M llvm/test/CodeGen/AArch64/arm64-fp-imm-size.ll
    M llvm/test/CodeGen/AArch64/arm64-fp-imm.ll
    M llvm/test/CodeGen/AArch64/arm64-fp128.ll
    M llvm/test/CodeGen/AArch64/arm64-vhadd.ll
    M llvm/test/CodeGen/AArch64/dup.ll
    M llvm/test/CodeGen/AArch64/fcvt_combine.ll
    M llvm/test/CodeGen/AArch64/fpimm.ll
    M llvm/test/CodeGen/AArch64/fptoui-sat-scalar.ll
    M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
    M llvm/test/CodeGen/AArch64/frem-power2.ll
    M llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
    M llvm/test/CodeGen/AArch64/neon-extadd-extract.ll
    M llvm/test/CodeGen/AArch64/rem-by-const.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (#178692)

In a similar fashion to
https://github.com/llvm/llvm-project/pull/175810, this PR aims to
simplify the handling of constants by extending smaller than 32 bit
integer constants to 32 bits in regbankselect. This is only done for
constants that were going to be assigned to a GPR and aims to simplify
the selection of these.

In addition, fconstants that would have lead to a constant pool load
because they are illegal as immediates (except for 128 bit) are now
converted to a constant on GPR registers before being copied to the FPR.
This hopefully reduces cache pressure & simplifies selection.

I have tried to rely on tablegen as much as possible for selecting the
instructions for this.



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