[all-commits] [llvm/llvm-project] 105304: [SandboxVec][NFC] Update test checks (#183216)
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Fri Feb 27 17:53:50 PST 2026
Branch: refs/heads/users/alexey-bataev/spr/slpprefer-copyable-over-alternate
Home: https://github.com/llvm/llvm-project
Commit: 1053047a4be7d1fece3adaf5e7597f838058c947
https://github.com/llvm/llvm-project/commit/1053047a4be7d1fece3adaf5e7597f838058c947
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/test/Transforms/SandboxVectorizer/bottomup_seed_slice.ll
M llvm/test/Transforms/SandboxVectorizer/bottomup_seed_slice_pow2.ll
M llvm/test/Transforms/SandboxVectorizer/cross_bbs.ll
M llvm/test/Transforms/SandboxVectorizer/pack.ll
M llvm/test/Transforms/SandboxVectorizer/regions-from-metadata.ll
M llvm/test/Transforms/SandboxVectorizer/repeated_instrs.ll
M llvm/test/Transforms/SandboxVectorizer/scheduler.ll
M llvm/test/Transforms/SandboxVectorizer/special_opcodes.ll
M llvm/test/Transforms/SandboxVectorizer/stop_at.ll
M llvm/test/Transforms/SandboxVectorizer/stop_bndl.ll
M llvm/test/Transforms/SandboxVectorizer/user_pass_pipeline.ll
Log Message:
-----------
[SandboxVec][NFC] Update test checks (#183216)
Many of the tests were written before we had region metadata, so they
are missing the metadata checks. This patch fixes it. I just reran
update_test_checks.
Commit: a59b4fca866a4a913d11a45358e096cc40d7d016
https://github.com/llvm/llvm-project/commit/a59b4fca866a4a913d11a45358e096cc40d7d016
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/test/CodeGen/RISCV/rvv/vl-opt.mir
Log Message:
-----------
[RISCV] Replace whitelist with elementsDependOnVL in RISCVVLOptimizer. NFC (#181619)
Currently we have a whitelist of pseudos which can have their VL reduced
safely.
We want to eventually replace RISCVVectorPeephole::tryToReduceVL with
RISCVVLOptimizer, but the former doesn't use a whitelist and instead
checks for the elementsDependOn TSFlag.
This moves RISCVVLOptimizer to use the same TSFlag instead of using a
whitelist since it handles more pseudos, e.g. Zvabd.
However on its own this patch is NFC since we still need to handle the
operand info. A test for vabs.v was added to show how it still doesn't
get reduced.
vmv.s.x/vfmv.s.x and stores have been excluded to match the previous
behaviour of isSupportedInstr.
Stacked on #181601, but not included in this PR.
Commit: 31dacdc1f5d486da6ef6d8b2f7e3b6126d92c9ff
https://github.com/llvm/llvm-project/commit/31dacdc1f5d486da6ef6d8b2f7e3b6126d92c9ff
Author: Sunil Shrestha <sunil.shrestha at hpe.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
A flang/test/Lower/OpenMP/ordered-simd.f90
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/openmp-simd-ordered.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
A mlir/test/Target/LLVMIR/openmp-wsloop-simd-ordered.mlir
Log Message:
-----------
[flang][openmp] Add support for ordered regions in SIMD directives (#181012)
Add support for ordered regions within SIMD directives (!$omp simd
ordered and !$omp do simd ordered). This initial implementation matches
Clang's behavior.
In SIMD directives, loop induction variables have an implicit linear
clause with deferred store semantics (storing to .linear_result). To
properly support ordered regions, the LinearClauseProcessor rewrites
variable references to use .linear_result in:
- omp.ordered.region: Code inside ordered blocks
- omp_region.finalize: Code after ordered blocks
Note: The vectorizer cannot currently vectorize loops with ordered
regions. Future enhancement would require generating lane loops or
unrolling ordered regions across SIMD lanes while maintaining ordering
semantics.
Commit: a8f5f4a9fc3eef5ef9882e3fda619b165bbe8aba
https://github.com/llvm/llvm-project/commit/a8f5f4a9fc3eef5ef9882e3fda619b165bbe8aba
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
Log Message:
-----------
[VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (#182254)
Currently if -vplan-verify-each is enabled and a pass fails the
verifier, it will output the failure to stderr but will still finish
with a zero exit code.
This adds an assert that the verification fails so that e.g. lit will
pick up verifier failures in the in-tree tests with an EXPENSIVE_CHECKS
build.
Currently the LastActiveLane verification fails in several tests, so
this also includes a fix to handle more prefix masks. All of the prefix
masks that the verifier encounters are of the form `icmp ult/ule
monotonically-increasing-sequence, uniform`, which always generate a
prefix mask.
Tested that llvm-test-suite + SPEC CPU 2017 now pass with
-vplan-verify-each enabled for RISC-V.
Commit: 94d9f1b3cbb02700d9cd3339c1dbf44c0d13b550
https://github.com/llvm/llvm-project/commit/94d9f1b3cbb02700d9cd3339c1dbf44c0d13b550
Author: barsolo2000 <barsolo at meta.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M lldb/include/lldb/Target/ThreadList.h
M lldb/include/lldb/Target/ThreadPlanStepOverBreakpoint.h
M lldb/source/Target/ThreadList.cpp
M lldb/source/Target/ThreadPlanStepOverBreakpoint.cpp
A lldb/test/API/functionalities/gdb_remote_client/TestBatchedBreakpointStepOver.py
A lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentBatchedBreakpointStepOver.py
Log Message:
-----------
[lldb] Batch breakpoint step-over for threads stopped at the same site (re-land) (#182944)
Re-land https://github.com/llvm/llvm-project/pull/180101 since it was
reverted here https://github.com/llvm/llvm-project/pull/182431 because
of a flaky test. This PR include the modified test that should pass from
https://github.com/llvm/llvm-project/pull/182415 :
When multiple threads are stopped at the same breakpoint, LLDB currently
steps each thread over the breakpoint one at a time. Each step requires
disabling the breakpoint, single-stepping one thread, and re-enabling
it, resulting in N disable/enable cycles and N individual vCont packets
for N threads. This is a common scenario for hot breakpoints in
multithreaded programs and scales poorly.
This patch batches the step-over so that all threads at the same
breakpoint site are stepped together in a single vCont packet, with the
breakpoint disabled once at the start and re-enabled once after the last
thread finishes.
At the top of WillResume, any leftover StepOverBreakpoint plans from a
previous cycle are popped with their re-enable side effect suppressed
via SetReenabledBreakpointSite, giving a clean slate.
SetupToStepOverBreakpointIfNeeded then creates fresh plans for all
threads that still need to step over a breakpoint, and these are grouped
by breakpoint address.
For groups with multiple threads, each plan is set to defer its
re-enable through SetDeferReenableBreakpointSite. Instead of re-enabling
the breakpoint directly when a plan completes, it calls
ThreadFinishedSteppingOverBreakpoint, which decrements a per-address
tracking count. The breakpoint is only re-enabled when the count reaches
zero.
All threads in the largest group are resumed together in a single
batched vCont packet. If some threads don't complete their step in one
cycle, the pop-and-recreate logic naturally re-batches the remaining
threads on the next WillResume call.
For 10 threads at the same breakpoint, this reduces the operation from
10 z0/Z0 pairs and 10 vCont packets to 1 z0 + 1 Z0 and a few
progressively smaller batched vCont packets.
Co-authored-by: Bar Soloveychik <barsolo at fb.com>
Commit: af1bdad42ceb25ce4ad4eb0fdb2b39cbbe8f4207
https://github.com/llvm/llvm-project/commit/af1bdad42ceb25ce4ad4eb0fdb2b39cbbe8f4207
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/nextup.h
A libc/shared/math/nextupbf16.h
A libc/shared/math/nextupf.h
A libc/shared/math/nextupf128.h
A libc/shared/math/nextupf16.h
A libc/shared/math/nextupl.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/nextup.h
A libc/src/__support/math/nextupbf16.h
A libc/src/__support/math/nextupf.h
A libc/src/__support/math/nextupf128.h
A libc/src/__support/math/nextupf16.h
A libc/src/__support/math/nextupl.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/nextup.cpp
M libc/src/math/generic/nextupbf16.cpp
M libc/src/math/generic/nextupf.cpp
M libc/src/math/generic/nextupf128.cpp
M libc/src/math/generic/nextupf16.cpp
M libc/src/math/generic/nextupl.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor nextup family to header-only (#181688)
Closes https://github.com/llvm/llvm-project/issues/181687
Commit: f6135213d78c053df933008264f385a15dad034d
https://github.com/llvm/llvm-project/commit/f6135213d78c053df933008264f385a15dad034d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/include/llvm/Support/KnownFPClass.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Support/KnownFPClass.cpp
Log Message:
-----------
ValueTracking: Move fmul constant special case to KnownFPClass (#183157)
Commit: 752b9803d51adef77c8e61e0a0b03cefa1badc69
https://github.com/llvm/llvm-project/commit/752b9803d51adef77c8e61e0a0b03cefa1badc69
Author: Fangrui Song <i at maskray.me>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/include/llvm/MC/MCTargetOptions.h
M llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
A llvm/test/MC/ELF/reloc-section-sym.s
Log Message:
-----------
[MC] Add --reloc-section-sym option to control section symbol conversion (#182725)
When generating relocations for non-ifunc local symbols that satisfies
several conditions, the integrated assembler converts them to reference
the section symbol (STT_SECTION) instead, folding the original symbol's
offset into the addend. This allows the original local symbol to be
omitted from .symtab, but the STT_SECTION symbol itself must be present,
so the conversion saves .symtab entries only when a section has more
than one local symbol referenced by relocations.
As GAS will likely add --reloc-section-sym, add --reloc-section-sym to
control this
conversion:
- all (default): convert all eligible local symbols.
(Note: There are many ineligible conditions, see
ELFObjectWriter::useSectionSymbol)
- internal: only convert .L prefix local symbols (usually
compiler-generated)
- none: never convert; keep all symbols as-is in relocations
This is useful for debugging and for tools that benefit from preserved
symbol names.
Original feature request:
<https://discourse.llvm.org/t/mc-how-why-does-converting-relocation-against-symbol-to-relocation-against-section-work/88786/7>
Note: We have to use name check instead of `isTemporary()`, because
--save-temp-labels makes all symbols non-temporary.
Commit: 1e560c181abbeae11c08759dc452effe30929569
https://github.com/llvm/llvm-project/commit/1e560c181abbeae11c08759dc452effe30929569
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
Log Message:
-----------
[LV] Remove CheckNeededWithTailFolding from addMinimumIterationCheck. NFC (#183066)
The IV can no longer overflow with tail folding after #183080.
Commit: f1a9dee996afc6655357884eaab91756def78fa7
https://github.com/llvm/llvm-project/commit/f1a9dee996afc6655357884eaab91756def78fa7
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M lldb/source/Host/windows/ConnectionGenericFileWindows.cpp
Log Message:
-----------
[lldb][windows] refactor ConnectionGenericFile's Read and Write methods (#183332)
Commit: e07a5542c7bbd211ad54397b1e44ca6285579bce
https://github.com/llvm/llvm-project/commit/e07a5542c7bbd211ad54397b1e44ca6285579bce
Author: SiliconA-Z <gfunni234 at gmail.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp
A llvm/test/CodeGen/AArch64/aarch64-condopt-unsigned.mir
M llvm/test/CodeGen/AArch64/combine-comparisons-by-cse.ll
Log Message:
-----------
[AArch64] Extend condition optimizer to support unsigned comparisons (#144380)
We have to be extra careful to not allow unsigned wraps, however. This
also required some adjusting of the logic in adjustCmp, as well as
compare the true imm value with add or sub taken into effect.
Because SIGNED_MIN and SIGNED_MAX cannot be an immediate, we do not need
to worry about those edge cases when dealing with unsigned comparisons.
Commit: d2d862a54457d5518d81acda4f56483b8c89ccc1
https://github.com/llvm/llvm-project/commit/d2d862a54457d5518d81acda4f56483b8c89ccc1
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/nexttoward.h
A libc/shared/math/nexttowardbf16.h
A libc/shared/math/nexttowardf.h
A libc/shared/math/nexttowardf16.h
A libc/shared/math/nexttowardl.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/nexttoward.h
A libc/src/__support/math/nexttowardbf16.h
A libc/src/__support/math/nexttowardf.h
A libc/src/__support/math/nexttowardf16.h
A libc/src/__support/math/nexttowardl.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/nexttoward.cpp
M libc/src/math/generic/nexttowardbf16.cpp
M libc/src/math/generic/nexttowardf.cpp
M libc/src/math/generic/nexttowardf16.cpp
M libc/src/math/generic/nexttowardl.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor nexttoward family to header-only (#181685)
Closes https://github.com/llvm/llvm-project/issues/181684
Commit: a52f6110ec8952bca4b7679d32cc2e5422bff1e0
https://github.com/llvm/llvm-project/commit/a52f6110ec8952bca4b7679d32cc2e5422bff1e0
Author: Fatih BAKIR <mfatihbakir at gmail.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
A lld/test/wasm/large-debug-section.test
A lld/test/wasm/large-section.test
A lld/test/wasm/section-too-large.test
M lld/wasm/InputChunks.h
M lld/wasm/OutputSections.cpp
Log Message:
-----------
[lld][Webassembly] Avoid a signed overflow on large sections (#183225)
wasm sections sizes are specified as u32s, and thus can be as large as
4GB. wasm-ld currently stores the offset into a section as an int32_t
which overflows on large sections and results in a crash. This change
makes it a int64_t to accommodate any valid wasm section and allow
catching even larger sections instead of wrapping around.
This PR fixes the issue by storing the offset as a int64_t, as well as
adding extra checks to handle un-encodeable sections to fail instead of
producing garbage wasm binaries, and also adds lit tests to make sure it
works. I confirmed the test fails on main but passes with this fix.
This is the same as https://github.com/llvm/llvm-project/pull/178287 but
deletes the temporary files the tests create and requires the tests run
on a 64-bit platform to avoid OOM issues due to the large binaries it
creates.
Commit: 545c2a7ce86165f151591b2f220047ddd40b537f
https://github.com/llvm/llvm-project/commit/545c2a7ce86165f151591b2f220047ddd40b537f
Author: PiJoules <leonardchan at google.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
A llvm/test/Instrumentation/AddressSanitizer/fuchsia.ll
Log Message:
-----------
[clang][ASan][Fuchsia] Have Fuchsia use a dynamic shadow start (#182917)
These are the compiler changes that depend on the runtime changes in
https://github.com/llvm/llvm-project/pull/183154. The runtime changes
need to have landed first. The dynamic shadow global is still set to
zero, but this will change in the future.
Commit: da10c25e42d21cb46e09614d655485b98c2773c2
https://github.com/llvm/llvm-project/commit/da10c25e42d21cb46e09614d655485b98c2773c2
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M clang/include/clang/AST/ASTDumperUtils.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/lib/AST/ASTDumper.cpp
M clang/lib/AST/TextNodeDumper.cpp
Log Message:
-----------
[AST][NFC] Move AST dump colors into separate namespace (#183341)
Preparatory work for Clang AST PCH, which will include ASTDumperUtils.h.
Polluting the clang namespace with colors would lead to a collision with
clang/lib/Frontend/TextDiagnostic.cpp.
Commit: ae76def7695156cd8d5ee0a2325de943fe1a0612
https://github.com/llvm/llvm-project/commit/ae76def7695156cd8d5ee0a2325de943fe1a0612
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
Log Message:
-----------
[clang][ARM] Refactor argument handling in `EmitAArch64BuiltinExpr` (3/N) (NFC) (#183315)
Remove the outstanding calls to `EmitScalarExpr` in
`EmitAArch64BuiltinExpr` that are no longer required.
This is a follow-up for #181794 and #181974 - please refer to
those PRs for more context.
Commit: b8743de6c5431aaae73a0138e2a2b09795fc29e2
https://github.com/llvm/llvm-project/commit/b8743de6c5431aaae73a0138e2a2b09795fc29e2
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M .github/workflows/libcxx-run-benchmarks.yml
Log Message:
-----------
[libc++] Add link to the running job from the benchmarking bot (#180217)
This allows following the progress of the benchmarking job and also
spotting when it fails.
Fixes #158296
Commit: 5524ce826d326f30ec6fc220b6e8cc839b910a17
https://github.com/llvm/llvm-project/commit/5524ce826d326f30ec6fc220b6e8cc839b910a17
Author: ykhatav <yashasvi.khatavkar at intel.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
A clang/test/OpenMP/num_teams_clause_ast.cpp
M clang/test/OpenMP/target_teams_ast_print.cpp
M clang/test/OpenMP/target_teams_distribute_num_teams_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_num_teams_messages.cpp
M clang/test/OpenMP/teams_num_teams_messages.cpp
Log Message:
-----------
[OpenMP][Clang] Parsing support for num_teams lower bound (#180608)
According to OpenMP 5.2 the num_teams clause should support a
lower-bound as modifier for its argument. This PR adds Parsing support
for the lower bound in num_teams clause.
Commit: a224ba068997785daa237eaabb3d11867b898f3d
https://github.com/llvm/llvm-project/commit/a224ba068997785daa237eaabb3d11867b898f3d
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M flang/include/flang/Lower/CUDA.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/CUDA.cpp
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
Log Message:
-----------
[flang][cuda] Support data transfer with parenthesis around rhs (#183201)
Commit: 09d7b890e035c8ace45642f27edc0ff5768311eb
https://github.com/llvm/llvm-project/commit/09d7b890e035c8ace45642f27edc0ff5768311eb
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M libcxx/include/__math/gamma.h
M libcxx/include/__random/binomial_distribution.h
Log Message:
-----------
[libc++] Add a thread-safe version of std::lgamma in the dylib (#153631)
Libc++ currently redeclares ::lgamma_r on platforms that provide it.
This causes issues when building with modules, and redeclaring functions
provided by another library (here the C library) is bad hygiene.
Instead, use an asm declaration to call the right function without
having to redeclare it.
Commit: 81afd93a5153af024ef32aa8e597a5fc3b54c3a4
https://github.com/llvm/llvm-project/commit/81afd93a5153af024ef32aa8e597a5fc3b54c3a4
Author: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOpsInterfaces.td
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Dialect/Arith/canonicalize.mlir
M mlir/test/Dialect/Arith/ops.mlir
Log Message:
-----------
[mlir][arith] Add nneg to extui and uitofp. (#183165)
This patchset adds missing the missing flag nneg (non-negative) to extui
and uitofp which denotes that the operand is known to be non-negative.
Semantics for this flag mirrors LLVM semantics.
[From:](https://discourse.llvm.org/t/rfc-add-zext-nneg-flag/73914)
> If the nneg flag is set, and the zext argument is negative, the result
is a poison value.
> A corollary is that replacing a zext nneg with sext is a refinement.
[and](https://discourse.llvm.org/t/rfc-support-nneg-flag-with-uitofp/77988):
> uitofp nneg iN %x to fM returns poison if %x is negative
> A corollary is that uitofp nneg iN %x to fM is equivilent to sitofp iN
%x to fM.
* Adds ArithNonNegFlagInterface
* Adds AttrConvertNonNegToLLVM
* Updates definitions of arith.extui and arith.uitofp to declare
ArithNonNegFlagInterface
* Updates canonicalization patterns to propagate nneg where applicable
* Adds roundtrip, lowering, and canonicalization tests.
Assisted-by: claude
Commit: ed1a1eda0ff9c5d59b13551c0447793e92d375bd
https://github.com/llvm/llvm-project/commit/ed1a1eda0ff9c5d59b13551c0447793e92d375bd
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M compiler-rt/test/fuzzer/reduce_inputs.test
Log Message:
-----------
[compiler-rt][Fuzzer] Relax reduce_inputs.test to account for non-determinism (#182495)
I have seen that very occasionally this test is failing on a bot, with
only 3 files in the corpus. After running the test in a loop 4000+
times, I witnessed this same failure twice.
In both cases the first corpus member was some string not containing a
'F'; the second corpus member was 'F[' or 'FZ'; and the final corpus
member 'FUZ'.
In a normal run there is an intermediate corpus member 'FU.' - so this
test is failing in very rare cases where the fuzzer gets lucky and
matches 2 branch conditions in one mutation.
This patch allows the FileCheck condition to match 3 or 4 corpus files.
It may be possible for the fuzzer to reach the target in 2 files, but I
think that if that is possible, it will be exceptionally rare.
rdar://170440934
Commit: bfaa15ee564065097fb96d48f90957c4f4f98f2c
https://github.com/llvm/llvm-project/commit/bfaa15ee564065097fb96d48f90957c4f4f98f2c
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/f16div.h
A libc/shared/math/f16divf.h
A libc/shared/math/f16divf128.h
A libc/shared/math/f16divl.h
A libc/shared/math/f16mul.h
A libc/shared/math/f16mulf.h
A libc/shared/math/f16mulf128.h
A libc/shared/math/f16mull.h
A libc/shared/math/f16sub.h
A libc/shared/math/f16subf.h
A libc/shared/math/f16subf128.h
A libc/shared/math/f16subl.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/f16div.h
A libc/src/__support/math/f16divf.h
A libc/src/__support/math/f16divf128.h
A libc/src/__support/math/f16divl.h
A libc/src/__support/math/f16mul.h
A libc/src/__support/math/f16mulf.h
A libc/src/__support/math/f16mulf128.h
A libc/src/__support/math/f16mull.h
A libc/src/__support/math/f16sub.h
A libc/src/__support/math/f16subf.h
A libc/src/__support/math/f16subf128.h
A libc/src/__support/math/f16subl.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/f16div.cpp
M libc/src/math/generic/f16divf.cpp
M libc/src/math/generic/f16divf128.cpp
M libc/src/math/generic/f16divl.cpp
M libc/src/math/generic/f16mul.cpp
M libc/src/math/generic/f16mulf.cpp
M libc/src/math/generic/f16mulf128.cpp
M libc/src/math/generic/f16mull.cpp
M libc/src/math/generic/f16sub.cpp
M libc/src/math/generic/f16subf.cpp
M libc/src/math/generic/f16subf128.cpp
M libc/src/math/generic/f16subl.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor float16 basic operations to header-only (#181745)
closes: #181744
Commit: 6d5e051be9e133dbb15791ebe630b2218dde0657
https://github.com/llvm/llvm-project/commit/6d5e051be9e133dbb15791ebe630b2218dde0657
Author: Samrudh Nelli <samrudhnelli at gmail.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/assets/clang-doc-mustache.css
M clang-tools-extra/clang-doc/assets/function-template.mustache
M clang-tools-extra/test/clang-doc/json/class-requires.cpp
M clang-tools-extra/test/clang-doc/json/class-specialization.cpp
M clang-tools-extra/test/clang-doc/json/class-template.cpp
M clang-tools-extra/test/clang-doc/json/class.cpp
M clang-tools-extra/test/clang-doc/json/concept.cpp
M clang-tools-extra/test/clang-doc/json/function-requires.cpp
M clang-tools-extra/test/clang-doc/json/method-template.cpp
M clang-tools-extra/test/clang-doc/json/namespace.cpp
M clang-tools-extra/test/clang-doc/templates.cpp
M clang-tools-extra/unittests/clang-doc/JSONGeneratorTest.cpp
Log Message:
-----------
[clang-doc]: Enable horizontal wrapping on longer function definitions (#181417)
This patch enables wrapping for longer function and template definitions
in the generated HTML. Currently uses the no. of parameters to
determine the need to wrap the function. If a function or template has
more than 2 parameters, they are printed one per line. Also fixes a styling
bug where a trailing comma was left after the last parameter.
Commit: 5734d978d006a63f4eec6d76087ef8ac1664e30e
https://github.com/llvm/llvm-project/commit/5734d978d006a63f4eec6d76087ef8ac1664e30e
Author: Amina Chabane <amina.chabane at arm.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/lib/Target/AArch64/aarch64-tensorflow-isel-regression.ll
M llvm/test/CodeGen/AArch64/aarch64-addv.ll
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
M llvm/test/CodeGen/AArch64/arm64-vector-insertion.ll
M llvm/test/CodeGen/AArch64/bitcast-extend.ll
M llvm/test/CodeGen/AArch64/ctpop.ll
M llvm/test/CodeGen/AArch64/implicitly-set-zero-high-64-bits.ll
A llvm/test/CodeGen/AArch64/neon-lowhalf128-optimisation.ll
Log Message:
-----------
[AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (#178227)
Revised #166962.
This patch aims to fix the original compile time regression by
restricting the optimisation to run only on non-constant splats. Without
the guard, an infinite loop is caused because the
`CONCAT(SCALAR_TO_VECTOR, zero)` folds back into the same `BUILD_VECTOR`
and immediately re-enters `LowerBUILD_VECTOR`.
This patch was tested with the original TensorFlow reproduction provided
on the PR and shows a (very) slight improvement on compile-time.
Commit: f94ad564f528776516d75476f19c33993b4c5687
https://github.com/llvm/llvm-project/commit/f94ad564f528776516d75476f19c33993b4c5687
Author: Sy Brand <tartanllama at gmail.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M lld/test/wasm/tls-export.s
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/ObjectYAML/WasmEmitter.cpp
A llvm/test/ObjectYAML/wasm/dylink_tls_exports.yaml
M llvm/test/tools/llvm-nm/wasm/dylink.yaml
M llvm/test/tools/llvm-objdump/wasm/dylink-symbol-table.yaml
Log Message:
-----------
[WebAssembly] Take symbol flags for exports from the dylink section for shared objects (#183079)
Currently, WASM symbols taken from the export section of shared objects
lose their flags. This can result in link failures. For example, if a
TLS symbol is exported from a shared object, relocation fails because
`wasm-ld` thinks that the symbol is not flagged as a TLS symbol.
This PR populates symbol flags for symbols in the export section from
the flags stored in the dylink0 section.
The export info section was also not serialized by the WASM emitter for
YAML, which this PR fixes
Commit: efe0b2f993cff3809d8e26d996432e98c600600e
https://github.com/llvm/llvm-project/commit/efe0b2f993cff3809d8e26d996432e98c600600e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
R flang/test/Lower/OpenMP/ordered-simd.f90
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
R mlir/test/Target/LLVMIR/openmp-simd-ordered.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
R mlir/test/Target/LLVMIR/openmp-wsloop-simd-ordered.mlir
Log Message:
-----------
Revert "[flang][openmp] Add support for ordered regions in SIMD directives (#181012)"
This reverts commit 31dacdc1f5d486da6ef6d8b2f7e3b6126d92c9ff.
See the PR for test failure details.
Commit: 85a1fe692c123683bb16dd39f50c295198e7a819
https://github.com/llvm/llvm-project/commit/85a1fe692c123683bb16dd39f50c295198e7a819
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/CMakeLists.txt
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.h
A lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCoreProperties.td
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (#183237)
Implement `ProcessFreeBSDKernelCore::DoWriteMemory()` to write data on
kernel dump or `/dev/mem`. Due to security concerns (e.g. writing wrong
value on `/dev/mem` can trigger kernel panic), this feature is only
enabled when `plugin.process.freebsd-kernel-core.read-only` is set to
false (true by default).
---------
Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
Commit: 4919be702907eb9de73466e3d29f476ac5cdf5ad
https://github.com/llvm/llvm-project/commit/4919be702907eb9de73466e3d29f476ac5cdf5ad
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-obj-arg.cpp
Log Message:
-----------
[WebKit Checkers] Handle CXXRewrittenBinaryOperator in trivial analysis. (#183278)
Visit the semantic form when encountering CXXRewrittenBinaryOperator in
the trivial function analysis / no-delete analysis.
Commit: 8d625621eb5ddc1e0e1e0a06af03b9e076c1d642
https://github.com/llvm/llvm-project/commit/8d625621eb5ddc1e0e1e0a06af03b9e076c1d642
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M lldb/source/Plugins/ScriptInterpreter/Lua/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/CMakeLists.txt
Log Message:
-----------
[lldb] Fix spurious indentation in CMakeLists.txt (NFC) (#183368)
Fix spurious indentation in ScriptInterpreter/*/CMakeLists.txt.
Commit: 0c53a89b228a2c1b4d2d02cb80d674b2b20a9c7c
https://github.com/llvm/llvm-project/commit/0c53a89b228a2c1b4d2d02cb80d674b2b20a9c7c
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
M llvm/test/CodeGen/Hexagon/isel/trunc-vNi1-HVX.ll
Log Message:
-----------
[Hexagon] Fix truncation to boolean vector that need widening (#182528)
When truncating a sub-HVX-width vector to a boolean vector (e.g., v64i8
-> v64i1 in 128-byte HVX mode), the operation would crash with
"Unhandled HVX operation" UNREACHABLE. This happened because the
condition in LowerHvxOperationWrapper/ReplaceHvxNodeResults did not
handle the case where the input vector needs widening and the result is
a boolean vector.
The fix adds WidenHvxTruncateToBool which widens the input to HVX
register width (e.g., v64i8 -> v128i8), performs the truncate to widened
bool type (v128i8 -> v128i1), extracts the result subvector (v128i1 ->
v64i1).
This allows the widened truncate to match the existing V6_vandvrt
pattern in HexagonPatternsHVX.td.
Commit: 9ab13eef8df9cc4b0bb36cb9e1e091338f10b853
https://github.com/llvm/llvm-project/commit/9ab13eef8df9cc4b0bb36cb9e1e091338f10b853
Author: Ehsan Amiri <ehsan.amiri at huawei.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
Log Message:
-----------
[LoopFusion] clear FusionCandidates more often (#183353)
A LoopVector contains all the loops with the same parent loop (or all
loops with no parent). Once loop fusion is done with the transformation
for candidates extracted from one LoopVector we can safely clear
FusionCandidates. This avoids unnecssary work and results in more
meaningful statistics.
Commit: b1325cb709f73ba107b06a98a716297e45acc3d9
https://github.com/llvm/llvm-project/commit/b1325cb709f73ba107b06a98a716297e45acc3d9
Author: Oleksandr Tarasiuk <oleksandr.tarasiuk at outlook.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Analysis/CFG.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/Analysis/auto-obj-dtors-cfg-output.cpp
M clang/test/Analysis/misc-ps-region-store.cpp
M clang/test/SemaCXX/return-noreturn.cpp
Log Message:
-----------
Revert [Clang] eliminate -Winvalid-noreturn false positive after throw + unreachable try/catch blocks (#183365)
Reverts https://github.com/llvm/llvm-project/pull/175443
---
Reverting for now because the CFG `try` connectivity change caused
additional analysis regressions (`-Wthread-safety-analysis` etc.) beyond
the original fix.
Commit: 4832c33f665cc48500801f64cc220cdebd1335a4
https://github.com/llvm/llvm-project/commit/4832c33f665cc48500801f64cc220cdebd1335a4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AMDGPU/exp.ll
M llvm/test/Analysis/CostModel/AMDGPU/exp10.ll
M llvm/test/Analysis/CostModel/AMDGPU/exp2.ll
A llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
A llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
A llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
Log Message:
-----------
AMDGPU: Implement expansion for f64 exp (#182539)
I asked AI to port the device libs reference implementation.
It mostly worked, though it got the compares wrong and also
missed a fold that happened in compiler. With that fixed I get
identical DAG output, and almost the same globalisel output (differing
by an inverted compare and select). Also adjusted some stylistic
choices.
Commit: 84594d7539a51c17288201869a8952b8aec260ff
https://github.com/llvm/llvm-project/commit/84594d7539a51c17288201869a8952b8aec260ff
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/test/Dialect/XeGPU/resolve-layout-conflicts.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
Log Message:
-----------
[mlir][xegpu] Add vector layout conflict handling in XeGPU layout propagation pass. (#182402)
This PR adds support for layout conflict handling for vector operands. A
conflict for a vector operand occurs when a value consumed at a given
operand is not in the expected layout in the context of the consumer
(for example `vector.multi_reduction` op's source require a specific
layout inferred from its current result layout). To resolve this
conflict, we insert an `xegpu.convert_layout` right after the producer
(essentially duplicating the producer with expected layout) and use the
new value in the consumer.
Commit: b68307569bb955fb2f613bd239ad7a92e805035f
https://github.com/llvm/llvm-project/commit/b68307569bb955fb2f613bd239ad7a92e805035f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/test/CodeGen/RISCV/bswap-bitreverse.ll
Log Message:
-----------
[RISCV] Support scalar bitreverse using P extension rev instruction. (#183245)
Commit: c51a926d9811b8d27ac3642c08420b51640600c3
https://github.com/llvm/llvm-project/commit/c51a926d9811b8d27ac3642c08420b51640600c3
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
A llvm/include/llvm/CodeGen/pch.h
M llvm/lib/CodeGen/CMakeLists.txt
Log Message:
-----------
[CMake][CodeGen] Add PCH (#183346)
Add PCH for expensive and most-used headers from llvm/CodeGen.
Commit: 7be9d66c29a7af78c36a6807d0d71efd6420099c
https://github.com/llvm/llvm-project/commit/7be9d66c29a7af78c36a6807d0d71efd6420099c
Author: satyanarayana reddy janga <satyajanga at fb.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M lldb/include/lldb/Target/ThreadList.h
M lldb/include/lldb/Target/ThreadPlanStepOverBreakpoint.h
M lldb/source/Target/ThreadList.cpp
M lldb/source/Target/ThreadPlanStepOverBreakpoint.cpp
R lldb/test/API/functionalities/gdb_remote_client/TestBatchedBreakpointStepOver.py
R lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentBatchedBreakpointStepOver.py
Log Message:
-----------
Revert "[lldb] Batch breakpoint step-over for threads stopped at the … (#183378)
…same site (re-land) (#182944)"
This reverts commit 94d9f1b3cbb02700d9cd3339c1dbf44c0d13b550.
Commit: 84764dfc2ad3c1fa7c074d6089302f094e7df037
https://github.com/llvm/llvm-project/commit/84764dfc2ad3c1fa7c074d6089302f094e7df037
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Driver/Job.h
A clang/include/clang/Driver/ModulesDriver.h
M clang/include/clang/Options/Options.td
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Driver.cpp
A clang/lib/Driver/ModulesDriver.cpp
A clang/test/Driver/modules-driver-malformed-manifest.cpp
A clang/test/Driver/modules-driver-manifest-input-args.cpp
A clang/test/Driver/modules-driver-manifest-not-found.cpp
Log Message:
-----------
[clang][modules-driver] Generate jobs from Standard library module manifest entries (#182182)
This patch is part of a series to support driver-managed module builds.
To support imports of the Standard library modules (std and
std.compat), the driver must generate frontend jobs for each module
before performing the dependency scan.
The source paths for these modules, along with additional information
required to precompile them, are provided by the Standard library
modules manifest.
This change implements the parsing and handling of the manifest in the
modules-driver.
This change is part of an effort to split #152770 into smaller, more
manageable pieces.
RFC for driver-managed module builds:
https://discourse.llvm.org/t/rfc-modules-support-simple-c-20-modules-use-from-the-clang-driver-without-a-build-system
Commit: 524fff5a51b86c35825405a9789672609e1ce99e
https://github.com/llvm/llvm-project/commit/524fff5a51b86c35825405a9789672609e1ce99e
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/cl-options.c
Log Message:
-----------
[win] Control Flow Guard: Add support for the MSVC /d2guardnochecks command (#182967)
This adds support for MSVC's `/d2guardnochecks` undocumented flag. This
flag is similar to `-guard:cf,nochecks` and `-cfguard-no-checks` in that
it instructs the compiler to emit the metadata for Control Flow Guard
WITHOUT emitting checks (aka: "table only" mode), but it differs from
those existing flags because if only takes effect if another flag is
used to enable Control Flow Guard (i.e., `/d2guardnochecks` by itself
does nothing, `/d2guardnochecks /guard:cf` enables table-only mode for
Control Flow Guard).
Commit: d7cdfa10963391c69dd12d673fe85ebd0d8cbcf3
https://github.com/llvm/llvm-project/commit/d7cdfa10963391c69dd12d673fe85ebd0d8cbcf3
Author: Mohamed Emad <hulxxv at gmail.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/fdim.h
A libc/shared/math/fdimbf16.h
A libc/shared/math/fdimf.h
A libc/shared/math/fdimf128.h
A libc/shared/math/fdimf16.h
A libc/shared/math/fdiml.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/fdim.h
A libc/src/__support/math/fdimbf16.h
A libc/src/__support/math/fdimf.h
A libc/src/__support/math/fdimf128.h
A libc/src/__support/math/fdimf16.h
A libc/src/__support/math/fdiml.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/fdim.cpp
M libc/src/math/generic/fdimbf16.cpp
M libc/src/math/generic/fdimf.cpp
M libc/src/math/generic/fdimf128.cpp
M libc/src/math/generic/fdimf16.cpp
M libc/src/math/generic/fdiml.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor fdim family to header-only (#182190)
Refactors the fdim math family to be header-only.
Closes https://github.com/llvm/llvm-project/issues/182188
Target Functions:
- fdim
- fdimbf16
- fdimf
- fdimf128
- fdimf16
- fdiml
Commit: f2e3f564037d36acd8460b675cc6f5cbba937721
https://github.com/llvm/llvm-project/commit/f2e3f564037d36acd8460b675cc6f5cbba937721
Author: Joe Nash <joseph.nash at amd.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
Log Message:
-----------
[AMDGPU] Make slow VOPD assert under EXPENSIVE_CHECKS (#183166)
The assert is algorithmically slow. To preserve the usability of release_assert
builds, move it under EXPENSIVE_CHECKS. On some workloads it increased compile
time by 40-50x.
Commit: 2981f5f045de2066148375cd24e79440643be911
https://github.com/llvm/llvm-project/commit/2981f5f045de2066148375cd24e79440643be911
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
A llvm/test/CodeGen/Generic/shadow-stack-gc-lowering.ll
Log Message:
-----------
[CodeGen] Add tests for ShadowStackGCLowering IR pass (#183167)
Add llvm/test/CodeGen/Generic/shadow-stack-gc-lowering.ll testing the
opt-level behavior of the shadow-stack-gc-lowering module pass,
covering:
- Single root: frame push/pop at entry and return
- Two roots: multi-slot frame, NumRoots=2/NumMeta=0 in the frame map
- Root with non-null metadata: NumMeta=1, metadata array in gc_map
- Mixed metadata: CollectRoots ordering (metadata roots sorted first)
- No roots: pass must leave the function unchanged
- Invoke: EscapeEnumerator inserts pop on both normal and unwind exits
As requested in https://github.com/llvm/llvm-project/pull/178436, since
the only existing tests seem to be that llc doesn't crash (in
llvm/test/CodeGen/X86/GC)
Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
Commit: af2b6ed6aabd9015d5725afed749a218912a7fcc
https://github.com/llvm/llvm-project/commit/af2b6ed6aabd9015d5725afed749a218912a7fcc
Author: Sunil Shrestha <sunil.shrestha at hpe.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
A flang/test/Lower/OpenMP/ordered-simd.f90
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/openmp-simd-ordered.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
A mlir/test/Target/LLVMIR/openmp-wsloop-simd-ordered.mlir
Log Message:
-----------
[flang][openmp] Add support for ordered regions in SIMD directives (#… (#183379)
Add support for ordered regions within SIMD directives (!$omp simd
ordered and !$omp do simd ordered). This initial implementation matches
Clang's behavior.
In SIMD directives, loop induction variables have an implicit linear
clause with deferred store semantics (storing to .linear_result). To
properly support ordered regions, the LinearClauseProcessor rewrites
variable references to use .linear_result in:
- omp.ordered.region: Code inside ordered blocks
- omp_region.finalize: Code after ordered blocks
Note: The vectorizer cannot currently vectorize loops with ordered
regions. Future enhancement would require generating lane loops or
unrolling ordered regions across SIMD lanes while maintaining ordering
semantics.
This PR is a reland for https://github.com/llvm/llvm-project/pull/181012
and fixes the regression caused by syntax change in IR for linear clause
Commit: 9f4636210deb2e94b5b3cd2d3cbf1cccc34543d1
https://github.com/llvm/llvm-project/commit/9f4636210deb2e94b5b3cd2d3cbf1cccc34543d1
Author: Johannes Doerfert <jdoerfert.llvm at gmail.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M offload/liboffload/src/OffloadImpl.cpp
Log Message:
-----------
[Offload] Fix type mismatch by using `uint64_t` instead of `size_t` (#183375)
The variant uses uint64_t, so should the get.
Commit: 33fd75f55d1f72ea8a5b8bbecda56be3b99d92e0
https://github.com/llvm/llvm-project/commit/33fd75f55d1f72ea8a5b8bbecda56be3b99d92e0
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M clang/include/clang/Basic/OffloadArch.h
M clang/lib/Basic/OffloadArch.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Driver/amdgpu-mcpu.cl
M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/TargetParser/TargetParser.h
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
M llvm/test/CodeGen/AMDGPU/generic-targets-require-v6.ll
M llvm/test/CodeGen/AMDGPU/hsa-generic-target-features.ll
M llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
M llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[AMDGPU] Add gfx12-5-generic subtarget (#183381)
This is functionally equivalent to gfx1250.
Commit: 4a8d5327ff69e43f35ea516a372fb59c30a3e2cb
https://github.com/llvm/llvm-project/commit/4a8d5327ff69e43f35ea516a372fb59c30a3e2cb
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M clang/docs/ClangIRCleanupAndEHDesign.md
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenException.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/test/CIR/CodeGen/try-catch-tmp.cpp
M clang/test/CIR/IR/invalid-eh-flat.cir
M clang/test/CIR/IR/invalid-try-catch.cir
M clang/test/CIR/IR/try-catch.cir
M clang/test/CIR/Transforms/flatten-cleanup-scope-eh.cir
M clang/test/CIR/Transforms/flatten-cleanup-scope-nyi.cir
Log Message:
-----------
[CIR] Update cir::ResumeOp to require an EH token (#183192)
This updates the cir::ResumeOp operation to require an EH token operand.
We already had the token available at both locations where the operation
was being created. Adding this operand makes finding the token more
robust during CFG flattening.
This change was entirely AI generated, but I have reviewed it closely.
Commit: b7ce37c6703f2d82376f50f82a05b807a0ad90ad
https://github.com/llvm/llvm-project/commit/b7ce37c6703f2d82376f50f82a05b807a0ad90ad
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64InstrAtomics.td
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/aarch64-addv.ll
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
M llvm/test/CodeGen/AArch64/aarch64-pmull2.ll
M llvm/test/CodeGen/AArch64/aarch64-scal-to-vec-bitcast-insert.ll
M llvm/test/CodeGen/AArch64/arm64-cvt-simd-intrinsics.ll
M llvm/test/CodeGen/AArch64/arm64-fixed-point-scalar-cvt-dagcombine.ll
M llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
M llvm/test/CodeGen/AArch64/arm64-neon-select_cc.ll
M llvm/test/CodeGen/AArch64/arm64-neon-v8.1a.ll
M llvm/test/CodeGen/AArch64/arm64-vcvt.ll
M llvm/test/CodeGen/AArch64/arm64-vshift.ll
M llvm/test/CodeGen/AArch64/avoid-pre-trunc.ll
M llvm/test/CodeGen/AArch64/bitcast-extend.ll
M llvm/test/CodeGen/AArch64/concat-vector-add-combine.ll
M llvm/test/CodeGen/AArch64/ctpop.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics-vector.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
M llvm/test/CodeGen/AArch64/fsh.ll
M llvm/test/CodeGen/AArch64/ragreedy-local-interval-cost.ll
M llvm/test/CodeGen/AArch64/sext.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-to-int.ll
M llvm/test/CodeGen/AArch64/sve-fixed-vector-llrint.ll
M llvm/test/CodeGen/AArch64/sve-fixed-vector-lrint.ll
M llvm/test/CodeGen/AArch64/vector-llrint.ll
M llvm/test/CodeGen/AArch64/vector-lrint.ll
M llvm/test/CodeGen/AArch64/zext.ll
Log Message:
-----------
Revert "[AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (#172837)" (#183380)
This reverts commit eff183b6a7e351e10444977fc2110edc2a518e6f.
And followup commit commit 87d9dad579b9d947f6181d1736fb11e8f683e246.
Causes breakages, see
https://github.com/llvm/llvm-project/pull/172837#issuecomment-3961532435.
Commit: 5cd6bb04e2d8b0712353a7dcd9729b217c35b12f
https://github.com/llvm/llvm-project/commit/5cd6bb04e2d8b0712353a7dcd9729b217c35b12f
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M clang/lib/Driver/ModulesDriver.cpp
Log Message:
-----------
[Clang][Modules] Fix -Wunused-variable from #182182
https://lab.llvm.org/staging/#/builders/227/builds/1093
Commit: 3031ba95456c95e123d0f9f7dc61c0b45c2d8762
https://github.com/llvm/llvm-project/commit/3031ba95456c95e123d0f9f7dc61c0b45c2d8762
Author: Daniil Fukalov <dfukalov at gmail.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/ExpandIRInsts.cpp
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/RISCV/div_minsize.ll
M llvm/test/CodeGen/X86/div_i129_v_pow2k.ll
M llvm/test/CodeGen/X86/i128-sdiv.ll
A llvm/test/Transforms/ExpandIRInsts/X86/divrem-pow2.ll
Log Message:
-----------
[CodeGen] Expand power-of-2 div/rem at IR level in ExpandIRInsts. (#180654)
Previously, power-of-2 div/rem operations wider than
MaxLegalDivRemBitWidth were excluded from IR expansion and left for
backend peephole optimizations. Some backends can fail to process such
instructions in case we switch off DAGCombiner.
Now ExpandIRInsts expands them into shift/mask sequences:
- udiv X, 2^C -> lshr X, C
- urem X, 2^C -> and X, (2^C - 1)
- sdiv X, 2^C -> bias adjustment + ashr X, C
- srem X, 2^C -> X - (((X + Bias) >> C) << C)
Special cases handled:
- Division/remainder by 1 or -1 (identity, negation, or zero)
- Exact division (sdiv exact skips bias, produces ashr exact)
- Negative power-of-2 divisors (result is negated)
- INT_MIN divisor (correct via countr_zero on bit pattern)
Proofs: https://alive2.llvm.org/ce/z/Y-iWm-
Assisted-by: Cursor // Claude Opus 4.6
Commit: 642763c553fdf6e699a3dd867b984b5c8044c07e
https://github.com/llvm/llvm-project/commit/642763c553fdf6e699a3dd867b984b5c8044c07e
Author: Zhuoran Yin <zhuoryin at amd.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M mlir/lib/Dialect/AMDGPU/Transforms/FoldMemRefsOps.cpp
M mlir/test/Dialect/AMDGPU/amdgpu-fold-memrefs.mlir
Log Message:
-----------
[AMDGPU] Adding FoldMemRefOpsIntoTransposeLoadOp pattern (#183330)
Before the fix we wouldn't fold a trivial expand_shape as index
computation. This will later force expand_shape to materialize into a
extract_stride_metadata and a reinterpret_cast unnecessarily. The
example below showcase the motivation of a source IR that won't be able
to fold today.
```mlir
%expanded = memref.expand_shape %buf [[0, 1], [2, 3]]
: memref<32x128xf16, strided<[128, 1], offset: ?>, #gpu.address_space<workgroup>>
into memref<1x32x8x16xf16, strided<..., offset: ?>, #gpu.address_space<workgroup>>
amdgpu.transpose_load %expanded[%i, %j, %k, %l]
: memref<1x32x8x16xf16, ...> -> vector<4xf16>
```
With this pattern that matches the more generic
`FoldMemRefAliasOpsPass`, the expand_shape can now fold into
transpose_load op like other load/stores.
The current `FoldMemRefAliasOps` pass doesn't use a more generic
interface yet — it still uses the hardcoded overloads. This PR continues
the pragmatic approach in providing its own folding pass (like
`GatherToLDSOp`).
Commit: 30969cc6441261a4281bdb9811c36a2348137d61
https://github.com/llvm/llvm-project/commit/30969cc6441261a4281bdb9811c36a2348137d61
Author: Alex Langford <alangford at apple.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/stopped-events/TestDAP_stopped_events.py
Log Message:
-----------
[lldb] Fix logic issue in TestDAP_stopped_events.py (#183382)
The subset should actually be the expected data because the real thread
data may have additional information.
Commit: 0668d9939fa29ee224e34ede1352a368286dfa94
https://github.com/llvm/llvm-project/commit/0668d9939fa29ee224e34ede1352a368286dfa94
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M lldb/examples/python/formatter_bytecode.py
Log Message:
-----------
[lldb] Improve unittest invocation in formatter_bytecode.py (#183394)
Commit: 5a629e606275c1c8eb2148da44958286e6903397
https://github.com/llvm/llvm-project/commit/5a629e606275c1c8eb2148da44958286e6903397
Author: Sam Clegg <sbc at chromium.org>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
Log Message:
-----------
[MC] Remove redundant setting of AllowDollarAtStartOfIdentifier. NFC (#183339)
This setting defaults to false so there is no need to set it unless we
want it to be true.
This makes it easy to see at a glace which backends support this, and
matches the existing behaviour of other fields such as
`AllowAtAtStartOfIdentifier`, `AllowQuestionAtStartOfIdentifier`,
`UseAssignmentForEHBegin` and `AllowAtInName`. These are all only ever
set to true in subclasses, never false.
Commit: fa3b86b72b6307d90ce38fd0cf2ea261e9452596
https://github.com/llvm/llvm-project/commit/fa3b86b72b6307d90ce38fd0cf2ea261e9452596
Author: Kavin Gnanapandithan <kavin.balag at gmail.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
M llvm/test/CodeGen/RISCV/calling-conv-p-ext-vector.ll
M llvm/test/CodeGen/RISCV/double-imm.ll
M llvm/test/CodeGen/RISCV/double-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/double-select-fcmp.ll
M llvm/test/CodeGen/RISCV/double-select-icmp.ll
M llvm/test/CodeGen/RISCV/double-stack-spill-restore.ll
M llvm/test/CodeGen/RISCV/fold-addi-loadstore-zilsd.ll
M llvm/test/CodeGen/RISCV/inline-asm-zdinx-constraint-r.ll
A llvm/test/CodeGen/RISCV/rv32-merge-non-arg-reg.mir
A llvm/test/CodeGen/RISCV/rv32-move-merge.ll
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/zicond-fp-select-zfinx.ll
Log Message:
-----------
[RISCV] Enhance RISCVMoveMerger for GPRPair Moves on RV32 #180831 (#182416)
Extends RISCVMoveMerger to identify adjacent 32-bit moves that can be
combined into a single 64-bit move instruction. In particular, this
patch adds support for extension zdinx (`fmv.d`) and p(`padd.dw`).
Fixes #180831
Commit: 8539dca8c65ad103b20bc4e02eccdf9642c9a8d5
https://github.com/llvm/llvm-project/commit/8539dca8c65ad103b20bc4e02eccdf9642c9a8d5
Author: Sam Clegg <sbc at chromium.org>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/lib/MC/MCAsmInfo.cpp
Log Message:
-----------
[MC] Consistent use of inline field initializers in MCAsmInfo (#183343)
Commit: 25ebf5e9d27510566dda2cba6585a6064beec878
https://github.com/llvm/llvm-project/commit/25ebf5e9d27510566dda2cba6585a6064beec878
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/test/MC/RISCV/rv32p-valid.s
M llvm/test/MC/RISCV/rv64p-valid.s
Log Message:
-----------
[RISCV] Add missing immediates to check lines in rv32p-valid.s and rv64p-valid.s. NFC (#183238)
Commit: 6272d5ac2afdc6808692e5d8ff3d73321942bccd
https://github.com/llvm/llvm-project/commit/6272d5ac2afdc6808692e5d8ff3d73321942bccd
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M .github/workflows/libcxx-run-benchmarks.yml
Log Message:
-----------
[libc++] Use the Github context instead of env to access the run ID & friends
Commit: 122e79c35fdbf7e75fd4059b6f32ddee616b62da
https://github.com/llvm/llvm-project/commit/122e79c35fdbf7e75fd4059b6f32ddee616b62da
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/schedule-barrier-latency-gfx9.mir
M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
Log Message:
-----------
[MISched] Advance HazardRec past stalls before calling EmitInstruction (#182977)
There are three calls to bumpCycle in bumpNode. Prior to the first call,
we calculate NextCycle as the next cycle in which all of a given
instruction's required hardware resources (as defined by the SchedModel)
are available. Any gap between this calculated NextCycle and CurrCycle
measures stalls that must occur before we can schedule the given
instruction.
The second and third call handle adjustments that occur during or after
issuing of the instruction (e.g. if the number of microops exceeds the
issue width).
According to the documentation of HazardRec->EmitInstruction, we should
call this method when an instruction is emitted: "This callback is
invoked when an instruction is emitted, to advance the hazard state."
In the context of bumpNode, this implies that it should be called after
we bumpCycle for stalls that must occur before issue of the
instructions, but before those that occur during or after. This PR moves
the placement to do that.
In practice, this affects schedulers that use both the SchedModel and
HazardRec. Suppose we have instructions A, B and C, and partial schedule
AB. Also, suppose instruction A exclusively holds ProcResource X for 2
cycles, and B uses ProcResource X, and there is a HazardRec hazard
between B and C which requires 1 cycle stall.
Currently, we call HazardRec->EmitInstruction on B before we call
HazardRec->AdvanceCycle for the stall between A->B. Then, when deciding
whether to schedule C, HazardRec sees that a cycle has already occurred
after B, so we do not need to stall.
After this change, we HazardRec->EmitInstruction on B after we call
HazardRec->AdvanceCycle for the stall between A->B. So, HazardRec
accurately places the stall cycle between A and B. Then, when deciding
whether to schedule C, HazardRec accurately sees that no cycles have
occurred after B, so we do need to stall for 1 cycle.
Commit: 2acb24eb9525ab6e6024e6de8466076a3ff078e6
https://github.com/llvm/llvm-project/commit/2acb24eb9525ab6e6024e6de8466076a3ff078e6
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/test/CodeGen/ARM/shift-combine.ll
Log Message:
-----------
[ARM] optimize to `vsri`/`vsli` (#182051)
fixes https://github.com/llvm/llvm-project/issues/181495
Commit: 2370063c8603f68e446617efd849bbcd546fde5a
https://github.com/llvm/llvm-project/commit/2370063c8603f68e446617efd849bbcd546fde5a
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsLoop.h
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsLoop.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
Log Message:
-----------
[openacc] Change function wrapMultiBlockRegionWithSCFExecuteRegion to non-static (#183409)
This change updates function `wrapMultiBlockRegionWithSCFExecuteRegion`
to be non-static.
Commit: f01f0f01d8302d31385cd5fc4aec687a3b4d2671
https://github.com/llvm/llvm-project/commit/f01f0f01d8302d31385cd5fc4aec687a3b4d2671
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M .github/workflows/libcxx-run-benchmarks.yml
Log Message:
-----------
[libc++] Try using job.check_run_id instead of github.job
According to https://github.com/orgs/community/discussions/8945,
it seems I'm not the only one who is confused by the documentation.
Commit: b3ec476c702a1cd8ada8686a2be4fed7cccf81ef
https://github.com/llvm/llvm-project/commit/b3ec476c702a1cd8ada8686a2be4fed7cccf81ef
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M lldb/test/API/lang/objc/failing-description/TestObjCFailingDescription.py
M lldb/test/API/lang/objc/struct-description/TestObjCStructDescription.py
Log Message:
-----------
[lldb/test] Fix tests reading log from remote platform instead of host (#183413)
Some tests are using logs to validate that a test behaves correctly
however they used `platform shell cat {log}` to read the logfile.
This doesn't work when running the testsuite against a remote platform
since the logs are saved on the host's filesystem.
This patch addresses those failures by making sure we read the log file
from the host platform.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: f38e7b1da20641a41e281cc2a87c289669656d3a
https://github.com/llvm/llvm-project/commit/f38e7b1da20641a41e281cc2a87c289669656d3a
Author: Sam Clegg <sbc at chromium.org>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M lld/docs/WebAssembly.rst
M lld/docs/index.rst
Log Message:
-----------
[lld][WebAssembly] Remove comment about wasm-ld being WIP. NFC (#183410)
wasm-ld has been feature complete for a while now.
Commit: 3211ce1ecd457d357b744fdd8fb10b059b6ba1cd
https://github.com/llvm/llvm-project/commit/3211ce1ecd457d357b744fdd8fb10b059b6ba1cd
Author: Alexis Perry-Holby <aperry at lanl.gov>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
A flang/docs/MeetingNotes/2026/2026-02-25.md
Log Message:
-----------
[flang] Added minutes from the 2-25-2026 Flang Community Call (#183389)
Commit: bf388fa8888f516d5190ab3f0f81e28a3d1d5b2c
https://github.com/llvm/llvm-project/commit/bf388fa8888f516d5190ab3f0f81e28a3d1d5b2c
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Analysis/Scalable/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Analysis/Scalable/BUILD.gn
Log Message:
-----------
[gn build] Port commits (#183420)
$ llvm/utils/gn/build/sync_source_lists_from_cmake.py --write
84764dfc2ad3
8bdef33e6ae9
a8989c08a87e
de3034b1c14d
Commit: ae80f343e6f6548a35ebb16a97420a53b48717c5
https://github.com/llvm/llvm-project/commit/ae80f343e6f6548a35ebb16a97420a53b48717c5
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ThreadFreeBSDKernelCore.h
Log Message:
-----------
[lldb][Process/FreeBSDKernelCore] Reorder ThreadFreeBSDKernelCore members (#183414)
Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
Commit: 2f46255485b44a3583ce4d64e84d0583fbb1c94a
https://github.com/llvm/llvm-project/commit/2f46255485b44a3583ce4d64e84d0583fbb1c94a
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M lldb/test/API/lang/objc/failing-description/TestObjCFailingDescription.py
M lldb/test/API/lang/objc/struct-description/TestObjCStructDescription.py
Log Message:
-----------
Revert "[lldb/test] Fix tests reading log from remote platform instead of host" (#183419)
Reverts llvm/llvm-project#183413 because this is still fragile.
Commit: 358b1d597ad4a418bb6eda1770b0ee4deeca7687
https://github.com/llvm/llvm-project/commit/358b1d597ad4a418bb6eda1770b0ee4deeca7687
Author: Henrik G. Olsson <hnrklssn at gmail.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M libcxx/utils/libcxx/test/dsl.py
M libcxx/utils/libcxx/test/format.py
M llvm/utils/lit/lit/DiffUpdater.py
M llvm/utils/lit/lit/Test.py
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/cl_arguments.py
M llvm/utils/lit/lit/display.py
M llvm/utils/lit/lit/reports.py
A llvm/utils/lit/tests/Inputs/diff-test-update-retry/1.in
A llvm/utils/lit/tests/Inputs/diff-test-update-retry/lit.cfg
A llvm/utils/lit/tests/Inputs/diff-test-update-retry/multiple-split-file-enough-retries.in
A llvm/utils/lit/tests/Inputs/diff-test-update-retry/multiple-split-file-enough-retries.out
A llvm/utils/lit/tests/Inputs/diff-test-update-retry/multiple-split-file-no-enough-retries.out
A llvm/utils/lit/tests/Inputs/diff-test-update-retry/multiple-split-file-not-enough-retries.in
A llvm/utils/lit/tests/Inputs/diff-test-update-retry/multiple-split-file-not-enough-retries.out
A llvm/utils/lit/tests/Inputs/diff-test-update-retry/multiple-split-file-unrelated-failure.in
A llvm/utils/lit/tests/Inputs/diff-test-update-retry/multiple-split-file-unrelated-failure.out
A llvm/utils/lit/tests/Inputs/diff-test-update-retry/single-split-file.in
A llvm/utils/lit/tests/Inputs/diff-test-update-retry/single-split-file.out
A llvm/utils/lit/tests/diff-test-update-retry-default-verbosity.py
A llvm/utils/lit/tests/diff-test-update-retry-failed-or-flaky.py
A llvm/utils/lit/tests/diff-test-update-retry-quiet.py
A llvm/utils/lit/tests/diff-test-update-retry.py
M llvm/utils/lit/tests/diff-test-update.py
Log Message:
-----------
[utils] update how auto-updated tests are displayed when the test is retried (#181097)
This changes how test updater output is displayed to make it less
confusing for tests with ALLOW_RETRIES. Previously it was merged into
the output string for the test result, but that hides it in many less
verbose modes, so now it's displayed separately. The FIXED status is
added, which is the same as FLAKYPASS except it highlights that a test
was auto-updated before it passed.
>From PR https://github.com/llvm/llvm-project/pull/181097
Commit: 0d476b1ae4793d0e8cc3d04be1177399947668db
https://github.com/llvm/llvm-project/commit/0d476b1ae4793d0e8cc3d04be1177399947668db
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/include/llvm/ADT/StringRef.h
Log Message:
-----------
[NFC][ADT] Remove indentation of StringRef class (#183317)
Apply https://llvm.org/docs/CodingStandards.html#namespace-indentation
rule to StringRef class.
Commit: c57352995bdc4e376babb8d91d3dd7369aefb880
https://github.com/llvm/llvm-project/commit/c57352995bdc4e376babb8d91d3dd7369aefb880
Author: Sam Clegg <sbc at chromium.org>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/lib/MC/MCAsmInfo.cpp
Log Message:
-----------
[MC] Use inline field initializers in MCAsmInfo. NFC (#183407)
Followup to #183343.
Commit: dc2dad65764b29b81444b0a2a72a6c3963f0e9b8
https://github.com/llvm/llvm-project/commit/dc2dad65764b29b81444b0a2a72a6c3963f0e9b8
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
A llvm/test/Transforms/IROutliner/illegal-typeid-for.ll
Log Message:
-----------
[NFC][IROutliner] Add test showing llvm.typeid.for not Outlined (#183406)
This intrinsic is not valid to outline because it relies on
function-local information about types and landing pads during
lowering/codegen. The code is currently correct because the IROutliner
uses the CodeExtractor, which will not extract this intrinsic.
See llvm/llvm-project#38893 (aka llvm.org/PR39545)
Commit: 564f433083d1f723ee8157afffa1f1313fb596b4
https://github.com/llvm/llvm-project/commit/564f433083d1f723ee8157afffa1f1313fb596b4
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/test/API/lang/objc/failing-description/TestObjCFailingDescription.py
M lldb/test/API/lang/objc/struct-description/TestObjCStructDescription.py
Log Message:
-----------
[lldb/test] Use filecheck_log to read log files from the host platform (#183422)
Some tests were using `self.filecheck` with `platform shell cat {log}`
to validate test behavior through log inspection.
This doesn't work when running the testsuite against a remote platform
since the logs are saved on the host's filesystem.
This patch refactors those call sites to use the new `filecheck_log`
helper, which ensures the log file is always read from the host
platform.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: a703a9153be57e5fad34494d54e3446a9cf51604
https://github.com/llvm/llvm-project/commit/a703a9153be57e5fad34494d54e3446a9cf51604
Author: Henrik G. Olsson <hnrklssn at gmail.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/utils/lit/lit/display.py
Log Message:
-----------
[utils] update type hint for python 3.8-3.9 compatibility (#183427)
Type hints before 3.10 require importing, and are spelled with a leading
capital.
Commit: d7bd36d7e9f5ed493888672c46ff0ce405d627b0
https://github.com/llvm/llvm-project/commit/d7bd36d7e9f5ed493888672c46ff0ce405d627b0
Author: Twice <twice at apache.org>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M mlir/lib/Bindings/Python/Rewrite.cpp
M mlir/test/python/rewrite.py
Log Message:
-----------
[MLIR][Python] Handle errors in dialect conversion properly (#183320)
Before this, MLIR error capture in `apply_partial_conversion` and
`apply_full_conversion` wasn’t handled, which meant any `emitError`
would crash the entire program. This PR adds the handling.
Commit: 765c4e6e8fb25ca999bc19654b5f324df62879ad
https://github.com/llvm/llvm-project/commit/765c4e6e8fb25ca999bc19654b5f324df62879ad
Author: Jan Kokemüller <jan.kokemueller at gmail.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/lib/Sema/SemaLambda.cpp
A clang/test/Modules/pr178893.cppm
Log Message:
-----------
[clang] Don't use `VarDecl` of local variables as `ManglingContextDecl` for lambdas (#179035)
Currently, in a C++20 modules context, a `VarDecl` of a local variable
can wrongly end up as a `ManglingContextDecl` for a lambda.
Fix this by removing `ContextKind::NonInlineInModulePurview` in
`Sema::getCurrentMangleNumberContext` and add
`IsExternallyVisibleInModulePurview` checks in the appropriate places:
- For externally visible functions defined in a module purview, add a
check to `isInInlineFunction`, renaming it to
`IsInFunctionThatRequiresMangling`
- For externally visible variables defined in a module purview, add a
new `ContextKind::ExternallyVisibleVariableInModulePurview` and an
appropriate check to the `VarDecl` case
Fixes #178893
---------
Co-authored-by: Corentin Jabot <corentinjabot at gmail.com>
Co-authored-by: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Commit: 8f3dd82a0a1fd3395e903c8b44e2e5f9f2118ff5
https://github.com/llvm/llvm-project/commit/8f3dd82a0a1fd3395e903c8b44e2e5f9f2118ff5
Author: Mohamed Emad <hulxxv at gmail.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/windows/entrypoints.txt
M libc/docs/headers/math/index.rst
M libc/shared/math.h
A libc/shared/math/asinpif.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/asinpif.h
M libc/src/math/CMakeLists.txt
A libc/src/math/asinpif.h
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/asinpif.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/asinpif_test.cpp
M libc/test/src/math/exhaustive/CMakeLists.txt
A libc/test/src/math/exhaustive/asinpif_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/asinpif_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math][c23] implement `asinpif` function (#181511)
Implementing `asinpi` for single-precision. it continues what is done in
#152690 that implemented `asinpif16` with header-only approach that is
followed since #147386
Commit: dd9d242b14d501d3828af1e4d5a0887e23be193e
https://github.com/llvm/llvm-project/commit/dd9d242b14d501d3828af1e4d5a0887e23be193e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/test/MC/RISCV/rv32p-valid.s
A llvm/test/MC/RISCV/rv32zcb-zbkb-valid.s
A llvm/test/MC/RISCV/rv64zcb-zbkb-valid.s
Log Message:
-----------
[RISCV] Treat zext.h as a separate instruction from pack(w) with Zbkb. (#183364)
The Zbb encoding for zext.h is a subset of the encoding for pack(w).
There is a statement in the ISA manual that says "For RV32, the pack
instruction with rs2=x0 is the zext.h instruction. Hence, for RV32, any
extension that contains the pack instruction also contains the zext.h
instruction"
This patch makes the zext.h instruction mnemonic canonical when only
Zbkb is enabled. -Mno-aliases will not disable the printing of zext.h. I
believe this matches binutils.
I've taught the assembler to remap PACK/PACKW to ZEXT_H to make printing
parsed assembly match the disassembler output.
Commit: 8533889a54907afe8b6ac9d3fb87b640b48d015e
https://github.com/llvm/llvm-project/commit/8533889a54907afe8b6ac9d3fb87b640b48d015e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-unaligned-load-store.ll
Log Message:
-----------
[RISCV] Partial support for using PPAIRE.B/H to optimize unaligned load sequences. (#183423)
Patterns are based on patterns we use for Zbkb. We can't copy all
patterns because PPAIRE.B/H are a little different than PACKW/PACKH.
PACKW packs the first 16 bits of rs1 and rs2 and sign extends the upper
32 bits of rd. PACKH packs the first 8 bits of rs1 and rs2 and puts
zeros in bits 16 of rd.
PPAIRE.B copies the even bytes of rs1 to the even bytes of rd and copies
the even bytes of rs2 to the odd bytes of rd. PPAIRE.H is similar, but
copys halfwords instead of bytes. We can treat them equivalently to
PACKH/PACKW when we know that we only care about the lower halfword or
word, respectively of the result.
Commit: d12870ea96befd5b5ec69c753c82a3e4af13e472
https://github.com/llvm/llvm-project/commit/d12870ea96befd5b5ec69c753c82a3e4af13e472
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
A llvm/test/CodeGen/RISCV/opt-w-instrs-p-ext.mir
Log Message:
-----------
[RISCV] Add MERGE, MVM, and MVMN to isSignExtendedW in RISCVOptWInstrs. (#183433)
These instructions are a combination of AND/OR/XOR which return sign
extended values if all inputs are sign extended.
Commit: 143664fcd3df825befdb9586151d53aefef3d7d0
https://github.com/llvm/llvm-project/commit/143664fcd3df825befdb9586151d53aefef3d7d0
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M bolt/test/merge-fdata-bat-no-lbr.test
M bolt/test/merge-fdata-mixed-bat-no-lbr.test
M bolt/test/merge-fdata-mixed-mode.test
M bolt/test/merge-fdata-no-lbr-mode.test
A bolt/test/merge-fdata-skip-truncated.test
M bolt/tools/merge-fdata/merge-fdata.cpp
Log Message:
-----------
[BOLT][merge-fdata] Skip truncated lines in raw profile data (#183187)
Raw profile data file may contain lines truncated due to unexpected
app exit. This change is to have merge_fdata check number of fields
in each line of raw profile data file and ignore a line if the number
is not expected.
Commit: fb371ce258d390716a653b8c63649526b9b5831f
https://github.com/llvm/llvm-project/commit/fb371ce258d390716a653b8c63649526b9b5831f
Author: eiytoq <eiytoq at outlook.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/TreeTransform.h
A clang/test/SemaCXX/typeid-incomplete-local-crash.cpp
Log Message:
-----------
[clang][Sema] Guard polymorphic check in TransformCXXTypeidExpr for incomplete record types (#180442)
This ensures that when querying the typeid of a record type, it is fully defined.
Fixes #176397
Fixes #63242
Commit: b7c2dda501b1484b6d069312666fdd3b4d9d16ce
https://github.com/llvm/llvm-project/commit/b7c2dda501b1484b6d069312666fdd3b4d9d16ce
Author: Wang Yaduo <wangyaduo at linux.alibaba.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
A clang/test/Driver/print-enabled-extensions/riscv-xt-c910v2.c
A clang/test/Driver/print-enabled-extensions/riscv-xt-c920v2.c
M clang/test/Driver/riscv-cpus.c
M clang/test/Misc/target-invalid-cpu-note/riscv.c
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVProcessors.td
Log Message:
-----------
[RISCV] Add processor definitions for XuanTie C910V2 and C920V2 (#174056)
XuanTie C910V2 and C920V2 are 64-bit superscalar out-of-order CPUs:
https://www.xrvm.com/community/download?id=4530178488929423360
C910V2 is a C920V2 version without vector, zvfbfmin, zvfbfwma, zvfh and
xtheadvdot extensions.
Scheduling model will be added in a further PR.
Commit: 0a9d7ffc037489d6047eff8052abdd35d025536c
https://github.com/llvm/llvm-project/commit/0a9d7ffc037489d6047eff8052abdd35d025536c
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/fminimum-fmaximum.ll
M llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
Log Message:
-----------
[X86][AVX10] Change MINMAX sign control to select the sign of compare result (#183452)
The imm8[3:2] controls the sign bit behavior. 0b01 represents to select
the sign of compare result, while 0b00 select the sign of Src1.
Commit: ab0823c9c765972ab62497391df96b10e5b4471f
https://github.com/llvm/llvm-project/commit/ab0823c9c765972ab62497391df96b10e5b4471f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-25 (Wed, 25 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/RISCV/avgflooru.ll
Log Message:
-----------
[TargetLowering][RISCV] Disable the special illegal type expansion of ISD::AVGFLOORU on RV32 (#181073)
RISC-V doesn't have a carry flag which makes the UADDO expansion
expensive to emulate.
I've disabled the code by checking if UADDO is not supported for the
type that will be legalized too. Unfortunatley, we have custom lowering
of UADDO on RV64 so this doesn't disable this code there.
Commit: 1ccb026e56774cf5d677eaf7bd06dcdc1ba00c8c
https://github.com/llvm/llvm-project/commit/1ccb026e56774cf5d677eaf7bd06dcdc1ba00c8c
Author: David Green <david.green at arm.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
A llvm/test/CodeGen/Thumb2/mve-sli-sri.ll
Log Message:
-----------
[ARM] Add sli / sri codegen tests. NFC
These ones are taken from the AArch64 equivalent tests.
Commit: 5dd160058f68d4df22ead31d8e1fab657e5bb8fc
https://github.com/llvm/llvm-project/commit/5dd160058f68d4df22ead31d8e1fab657e5bb8fc
Author: Jaydeep Chauhan <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-vpmadd52.ll
Log Message:
-----------
[X86] Handle VPMADD52L for smaller min-legal-vector-width (#183250)
There is crash as below https://godbolt.org/z/qdE1EE4Y9, After
https://github.com/llvm/llvm-project/pull/171760 .
```
ReplaceNodeResults: t32: v8i64 = X86ISD::VPMADD52L t10, t22, t2
Do not know how to custom type legalize this operation!
```
For ```"min-legal-vector-width"="512"```, it works fine, but for smaller
value it is crash.
Commit: c5339b7025863d4e1368c93ec66043cc8a222d2b
https://github.com/llvm/llvm-project/commit/c5339b7025863d4e1368c93ec66043cc8a222d2b
Author: Petr Hosek <phosek at google.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCHeaderRules.cmake
M libc/utils/hdrgen/hdrgen/main.py
Log Message:
-----------
[libc] Use response files for hdrgen entry points (#183267)
This avoids the build failure when the command line ends up being too
long which can be especially problematic on Windows.
Fixes #182374
Commit: 3c566a698ad0cb52ee814156f09ccdfa81266771
https://github.com/llvm/llvm-project/commit/3c566a698ad0cb52ee814156f09ccdfa81266771
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/VPlan/conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-fold-tail.ll
Log Message:
-----------
[LV] Fix miscompile with conditional scalar assignment + tail folding (#182492)
Previously, we could miscompile when vectorizing conditional scalar
assignments with forced tail folding, as the backedge select could be
based on the header mask, not the assignment conditional.
This resulted in a number of failures in the LLVM test suite when
building with `-O3 -march=armv8-a+sve -mllvm
-prefer-predicate-over-epilogue=predicate-dont-vectorize`.
The patch reworks `handleFindLastReductions()` to correctly handle tail
folding.
Commit: 7aa74c918a1e9a9da079a1ba472acc643956dfef
https://github.com/llvm/llvm-project/commit/7aa74c918a1e9a9da079a1ba472acc643956dfef
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/LowerVectorMultiReduction.cpp
Log Message:
-----------
[mlir][vector] Refactor multi-reduction patterns (NFC) (#183048)
Refactor the following patterns to inherit from
`MaskableOpRewritePattern`:
* `TwoDimMultiReductionToReduction`
* `TwoDimMultiReductionToElementWise`
This improves code reuse, enables small simplifications, and unifies the
structure of the patterns. Add high-level comments to clarify the
overall lowering strategy.
Prepares for future refactoring (e.g. #182301) and helps maintain a
uniform implementation.
Commit: 72215a43ad3a0c057785b407b91005cdcd5e3745
https://github.com/llvm/llvm-project/commit/72215a43ad3a0c057785b407b91005cdcd5e3745
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h
Log Message:
-----------
[DwarfUnit] Fix comment mistake in shouldPlaceInUnitDIE() (#183481)
Subprogram definition DIEs (for which `SP->getDeclaration() != nullptr`)
are placed at the CU scope, while subprogram declaration DIEs are placed
in their corresponding (local) scopes.
Commit: ede6ef4de3ca48c2198635052673f212a2247adc
https://github.com/llvm/llvm-project/commit/ede6ef4de3ca48c2198635052673f212a2247adc
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CIR/CodeGenBuiltins/AArch64/acle_sve_dup.c
Log Message:
-----------
[CIR][AArch64] Add lowering + tests for predicated SVE svdup_lane builtins (#183276)
This PR adds CIR lowering + tests for SVE `svdup_lane` builtins on
AArch64. The corresponding ACLE intrinsics are documented at:
https://developer.arm.com/architectures/instruction-sets/intrinsics
Commit: 0d8b3362f821c1b6ee11668c64441bf3a4b6ecdc
https://github.com/llvm/llvm-project/commit/0d8b3362f821c1b6ee11668c64441bf3a4b6ecdc
Author: David Spickett <david.spickett at arm.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M lldb/include/lldb/Utility/AnsiTerminal.h
M lldb/unittests/Utility/AnsiTerminalTest.cpp
Log Message:
-----------
[lldb] Fix partial Unicode handling in TrimAndPad (#183299)
This fixes an issue I found while writing a variant of TrimAndPad for
word wrapping purposes.
TrimAndPad relies on llvm::sys::locale::ColumnWidth returning an error
value, when there is a partial uft8 character. This error code is
ErrorInvalidUTF8, which is -2.
The idea was that when you cast that into a size_t, it was always going
to be larger than our target visible width.
The check for this was:
result_visibile_length + column_width <= visible_length
Where result_visible_length and column_width are size_ts.
And the idea is correct, as long as result_visible_width is not large
enough to cause the result to wrap to be lower than visible_length.
In other words: when we have accumulated some part of the string
already, if we have to trim the next part, sometimes we would return an
incomplete Unicode character. When we should instead carry on trimming.
To fix this, I've made TrimAndPad check explicitly for the error code.
Only if it's not found, will it cast to do the second check.
Commit: bc653c4f21d5ccaa884715d3faa84ef1c4761598
https://github.com/llvm/llvm-project/commit/bc653c4f21d5ccaa884715d3faa84ef1c4761598
Author: Romaric Jodin <rjodin at google.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M libclc/opencl/lib/clspv/SOURCES
Log Message:
-----------
[libclc] add subnormals back to clspv (#183469)
Commit: 7a2bb5ff76fc7c5db1ceb79aa18027512fb20ab2
https://github.com/llvm/llvm-project/commit/7a2bb5ff76fc7c5db1ceb79aa18027512fb20ab2
Author: Ryan Cowan <ryan.cowan at arm.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp
A llvm/test/CodeGen/AArch64/complex-deinterleaving-opt-crash-178671.ll
Log Message:
-----------
[AArch64] ComplexDeinterleavingPass: instruction does not dominate all uses! (#182494)
https://github.com/llvm/llvm-project/issues/178671 highlights IR in
which ComplexDeinterleavingPass places a deinterleave2 after it's use
due to the real and imaginary parts ending up in different basic blocks.
This change modifies ComplexDeinterleavingPass to to insert the
deinterleave into the exit block.
Commit: 850b0457b232fd4b6cfeaee97e51a7426d48f85d
https://github.com/llvm/llvm-project/commit/850b0457b232fd4b6cfeaee97e51a7426d48f85d
Author: David Spickett <david.spickett at arm.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/CMakeLists.txt
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.h
R lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCoreProperties.td
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
Revert "[lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory()" (#183485)
Reverts llvm/llvm-project#183237
This was landed without addressing review comments.
Commit: 6d7ec4b7c3a7bd85f19e71a5fc8253c47651bfe8
https://github.com/llvm/llvm-project/commit/6d7ec4b7c3a7bd85f19e71a5fc8253c47651bfe8
Author: Aadarsh Keshri <120744385+Aadarsh-Keshri at users.noreply.github.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/X86/known-pow2.ll
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
Log Message:
-----------
[DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (#181882)
Fixes #181650
Commit: 67ac275fee185e271b7ab2bcc2fe7da79dfa9b48
https://github.com/llvm/llvm-project/commit/67ac275fee185e271b7ab2bcc2fe7da79dfa9b48
Author: Adam Siemieniuk <adam.siemieniuk at intel.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M mlir/Maintainers.md
M mlir/docs/TargetLLVMIR.md
A mlir/include/mlir-c/Dialect/X86.h
R mlir/include/mlir-c/Dialect/X86Vector.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/CMakeLists.txt
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h
A mlir/include/mlir/Dialect/X86/CMakeLists.txt
A mlir/include/mlir/Dialect/X86/TransformOps/CMakeLists.txt
A mlir/include/mlir/Dialect/X86/TransformOps/X86TransformOps.h
A mlir/include/mlir/Dialect/X86/TransformOps/X86TransformOps.td
A mlir/include/mlir/Dialect/X86/Transforms.h
A mlir/include/mlir/Dialect/X86/Utils/X86Utils.h
A mlir/include/mlir/Dialect/X86/X86.td
A mlir/include/mlir/Dialect/X86/X86Dialect.h
A mlir/include/mlir/Dialect/X86/X86Interfaces.td
R mlir/include/mlir/Dialect/X86Vector/CMakeLists.txt
R mlir/include/mlir/Dialect/X86Vector/TransformOps/CMakeLists.txt
R mlir/include/mlir/Dialect/X86Vector/TransformOps/X86VectorTransformOps.h
R mlir/include/mlir/Dialect/X86Vector/TransformOps/X86VectorTransformOps.td
R mlir/include/mlir/Dialect/X86Vector/Transforms.h
R mlir/include/mlir/Dialect/X86Vector/Utils/X86VectorUtils.h
R mlir/include/mlir/Dialect/X86Vector/X86Vector.td
R mlir/include/mlir/Dialect/X86Vector/X86VectorDialect.h
R mlir/include/mlir/Dialect/X86Vector/X86VectorInterfaces.td
M mlir/lib/CAPI/Dialect/CMakeLists.txt
A mlir/lib/CAPI/Dialect/X86.cpp
R mlir/lib/CAPI/Dialect/X86Vector.cpp
M mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
M mlir/lib/Dialect/CMakeLists.txt
M mlir/lib/Dialect/Math/Transforms/CMakeLists.txt
M mlir/lib/Dialect/Math/Transforms/PolynomialApproximation.cpp
M mlir/lib/Dialect/Vector/TransformOps/CMakeLists.txt
M mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
A mlir/lib/Dialect/X86/CMakeLists.txt
A mlir/lib/Dialect/X86/IR/CMakeLists.txt
A mlir/lib/Dialect/X86/IR/X86Dialect.cpp
A mlir/lib/Dialect/X86/TransformOps/CMakeLists.txt
A mlir/lib/Dialect/X86/TransformOps/X86TransformOps.cpp
A mlir/lib/Dialect/X86/Transforms/AVXTranspose.cpp
A mlir/lib/Dialect/X86/Transforms/CMakeLists.txt
A mlir/lib/Dialect/X86/Transforms/LegalizeForLLVMExport.cpp
A mlir/lib/Dialect/X86/Transforms/ShuffleVectorFMAOps.cpp
A mlir/lib/Dialect/X86/Transforms/SinkVectorProducerOps.cpp
A mlir/lib/Dialect/X86/Transforms/VectorContractBF16ToFMA.cpp
A mlir/lib/Dialect/X86/Transforms/VectorContractToFMA.cpp
A mlir/lib/Dialect/X86/Transforms/VectorContractToPackedTypeDotProduct.cpp
A mlir/lib/Dialect/X86/Utils/CMakeLists.txt
A mlir/lib/Dialect/X86/Utils/X86Utils.cpp
R mlir/lib/Dialect/X86Vector/CMakeLists.txt
R mlir/lib/Dialect/X86Vector/IR/CMakeLists.txt
R mlir/lib/Dialect/X86Vector/IR/X86VectorDialect.cpp
R mlir/lib/Dialect/X86Vector/TransformOps/CMakeLists.txt
R mlir/lib/Dialect/X86Vector/TransformOps/X86VectorTransformOps.cpp
R mlir/lib/Dialect/X86Vector/Transforms/AVXTranspose.cpp
R mlir/lib/Dialect/X86Vector/Transforms/CMakeLists.txt
R mlir/lib/Dialect/X86Vector/Transforms/LegalizeForLLVMExport.cpp
R mlir/lib/Dialect/X86Vector/Transforms/ShuffleVectorFMAOps.cpp
R mlir/lib/Dialect/X86Vector/Transforms/SinkVectorProducerOps.cpp
R mlir/lib/Dialect/X86Vector/Transforms/VectorContractBF16ToFMA.cpp
R mlir/lib/Dialect/X86Vector/Transforms/VectorContractToFMA.cpp
R mlir/lib/Dialect/X86Vector/Transforms/VectorContractToPackedTypeDotProduct.cpp
R mlir/lib/Dialect/X86Vector/Utils/CMakeLists.txt
R mlir/lib/Dialect/X86Vector/Utils/X86VectorUtils.cpp
M mlir/lib/RegisterAllDialects.cpp
M mlir/lib/RegisterAllExtensions.cpp
M mlir/python/CMakeLists.txt
A mlir/python/mlir/dialects/X86.td
A mlir/python/mlir/dialects/X86TransformOps.td
R mlir/python/mlir/dialects/X86Vector.td
R mlir/python/mlir/dialects/X86VectorTransformOps.td
A mlir/python/mlir/dialects/transform/x86.py
R mlir/python/mlir/dialects/transform/x86vector.py
A mlir/python/mlir/dialects/x86.py
R mlir/python/mlir/dialects/x86vector.py
M mlir/test/CMakeLists.txt
M mlir/test/Conversion/VectorToLLVM/pass-option-serialization.mlir
M mlir/test/Dialect/Math/polynomial-approximation.mlir
M mlir/test/Dialect/Vector/CPU/X86/vector-transpose-lowering.mlir
A mlir/test/Dialect/X86/cvt-packed-f32-to-bf16.mlir
A mlir/test/Dialect/X86/dot-bf16.mlir
A mlir/test/Dialect/X86/legalize-for-llvm.mlir
A mlir/test/Dialect/X86/roundtrip.mlir
A mlir/test/Dialect/X86/shuffle-vector-fmas.mlir
A mlir/test/Dialect/X86/sink-vector-producer-ops.mlir
A mlir/test/Dialect/X86/vector-contract-bf16-to-fma.mlir
A mlir/test/Dialect/X86/vector-contract-to-fma.mlir
A mlir/test/Dialect/X86/vector-contract-to-packed-type-dotproduct.mlir
R mlir/test/Dialect/X86Vector/cvt-packed-f32-to-bf16.mlir
R mlir/test/Dialect/X86Vector/dot-bf16.mlir
R mlir/test/Dialect/X86Vector/legalize-for-llvm.mlir
R mlir/test/Dialect/X86Vector/roundtrip.mlir
R mlir/test/Dialect/X86Vector/shuffle-vector-fmas.mlir
R mlir/test/Dialect/X86Vector/sink-vector-producer-ops.mlir
R mlir/test/Dialect/X86Vector/vector-contract-bf16-to-fma.mlir
R mlir/test/Dialect/X86Vector/vector-contract-to-fma.mlir
R mlir/test/Dialect/X86Vector/vector-contract-to-packed-type-dotproduct.mlir
A mlir/test/Integration/Dialect/Vector/CPU/X86/dot.mlir
A mlir/test/Integration/Dialect/Vector/CPU/X86/inline-asm-vector-avx512.mlir
A mlir/test/Integration/Dialect/Vector/CPU/X86/lit.local.cfg
A mlir/test/Integration/Dialect/Vector/CPU/X86/mask-compress.mlir
A mlir/test/Integration/Dialect/Vector/CPU/X86/rsqrt.mlir
A mlir/test/Integration/Dialect/Vector/CPU/X86/sparse-dot-product.mlir
A mlir/test/Integration/Dialect/Vector/CPU/X86/vp2intersect-i32.mlir
R mlir/test/Integration/Dialect/Vector/CPU/X86Vector/dot.mlir
R mlir/test/Integration/Dialect/Vector/CPU/X86Vector/inline-asm-vector-avx512.mlir
R mlir/test/Integration/Dialect/Vector/CPU/X86Vector/lit.local.cfg
R mlir/test/Integration/Dialect/Vector/CPU/X86Vector/mask-compress.mlir
R mlir/test/Integration/Dialect/Vector/CPU/X86Vector/rsqrt.mlir
R mlir/test/Integration/Dialect/Vector/CPU/X86Vector/sparse-dot-product.mlir
R mlir/test/Integration/Dialect/Vector/CPU/X86Vector/vp2intersect-i32.mlir
A mlir/test/Target/LLVMIR/x86.mlir
R mlir/test/Target/LLVMIR/x86vector.mlir
M mlir/test/lib/Dialect/Math/CMakeLists.txt
M mlir/test/lib/Dialect/Math/TestPolynomialApproximation.cpp
M mlir/test/lib/Dialect/Vector/CMakeLists.txt
M mlir/test/lit.site.cfg.py.in
M mlir/test/mlir-opt/commandline.mlir
A mlir/test/mlir-runner/X86/lit.local.cfg
A mlir/test/mlir-runner/X86/math-polynomial-approx-avx2.mlir
R mlir/test/mlir-runner/X86Vector/lit.local.cfg
R mlir/test/mlir-runner/X86Vector/math-polynomial-approx-avx2.mlir
A mlir/test/python/dialects/transform_x86_ext.py
R mlir/test/python/dialects/transform_x86vector_ext.py
A mlir/test/python/dialects/x86.py
R mlir/test/python/dialects/x86vector.py
Log Message:
-----------
[mlir][x86] Rename x86vector to x86 (#183311)
Renames 'x86vector' dialect to 'x86'.
This is the first PR in series of cleanups around dialects targeting x86
platforms.
The new naming scheme is shorter, cleaner, and opens possibility of
integrating other x86-specific operations not strictly fitting pure
vector representation. For example, the generalization will allow for
future merger of AMX dialect into the x86 dialect to create one-stop x86
operations collection and boost discoverability.
Commit: bff5ef6b232d9c7459dee333c09e70e9f965e5a1
https://github.com/llvm/llvm-project/commit/bff5ef6b232d9c7459dee333c09e70e9f965e5a1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
A llvm/test/CodeGen/X86/funnel-shift-i512.ll
Log Message:
-----------
[X86] Add i512 funnel shift / rotate test coverage (#183486)
Commit: ec585757a1c2a1b10730252ae904b3f74bd8bd65
https://github.com/llvm/llvm-project/commit/ec585757a1c2a1b10730252ae904b3f74bd8bd65
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Target/Mips/MicroMipsInstrFPU.td
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsInstrFPU.td
M llvm/lib/Target/Mips/MipsInstrInfo.td
M llvm/test/CodeGen/Mips/fabs.ll
M llvm/test/CodeGen/Mips/fmadd1.ll
M llvm/test/CodeGen/Mips/llvm-ir/nan-fp-attr.ll
Log Message:
-----------
[Mips] Remove NoNaNsFPMath uses (#183045)
Remove `NoNaNsFPMath` by using `PatFrag`, we should only use `nnan`.
Duplicate tests in `CodeGen/Mips/llvm-ir/nan-fp-attr.ll` are removed.
Commit: 230481c3db95e93736d1e3cd49d7bbf16f9a2d15
https://github.com/llvm/llvm-project/commit/230481c3db95e93736d1e3cd49d7bbf16f9a2d15
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
Log Message:
-----------
CodeGen: Change error messages to follow phrasing guidance (#183488)
Avoid contractions and starting with a capital. These seem to be
missing tests.
Commit: 23dffff41070af5c9447aa5d9fc4f7eceb0f4743
https://github.com/llvm/llvm-project/commit/23dffff41070af5c9447aa5d9fc4f7eceb0f4743
Author: David Spickett <david.spickett at arm.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M lldb/include/lldb/Utility/AnsiTerminal.h
M lldb/test/API/commands/help/TestHelp.py
M lldb/unittests/Utility/AnsiTerminalTest.cpp
Log Message:
-----------
[lldb] Fix issues handling ANSI codes and Unicode in option help (#183314)
Fixes #177570, and a bunch of FIXMEs for other tests known to be
incorrect.
To do this, I have adapted code from the existing ansi::TrimAndPad. At
first I tried a wrapper function, but there's a few things we need to
handle that cannot be done with a simple wrapper.
We must only split at word boundaries. This requires knowing whether the
last adjustment, which may be the final adjustment, was made at, or just
before, a word boundary. Also it must check for single words wider than
the requested width (though this you could do with a wrapper).
For this reason, the new TrimAtWordBoundary has more special case checks
and a more complex inner loop. Though the core is the same split into
left, ansi escape code and right that TrimAndPad uses.
It is that splitting that implements the "bias" we need to print
correctly formatted characters. When you have a preceeding ANSI code,
this must be included in the printed range, same for proceeding.
TrimAndPad already handled this, and I've copied that logic over.
TrimAndPad also used Unicode aware functions, which fixes the known
issues with Unicode (though no command option actually uses Unicode at
the moment).
This PR replaces PR #181860, where I tried to implement all this using a
strategy that used "visible indexes" to decide where to cut the lines,
and then converted those into "actual indexes" to know what to print.
This worked for most cases, but adding the "bias" was very complex. The
preceeding codes were quite easy to do, but proceeding proved to be too
complex.
I also had the feeling I was revinventing TrimAndPad and though it
didn't turn out to be that simple, it wasn't far off.
As the majority of the work is now done in TrimAtWordBoundary, I have
reused some existing OutputWordWrappedLines tests for the new function.
Commit: b101f01382d6ff53cebeedbcbf114d02947b10ce
https://github.com/llvm/llvm-project/commit/b101f01382d6ff53cebeedbcbf114d02947b10ce
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/include/__iterator/ostreambuf_iterator.h
M libcxx/include/__locale_dir/pad_and_output.h
A libcxx/test/benchmarks/streams/copy.bench.cpp
M libcxx/test/libcxx/algorithms/specialized_algorithms.compile.pass.cpp
A libcxx/test/std/algorithms/alg.modifying.operations/alg.copy/ostreambuf.copy.pass.cpp
M libcxx/test/support/stream_types.h
Log Message:
-----------
[libc++] Optimize using std::copy with an ostreambuf_iterator (#181815)
```
Benchmark old new Difference % Difference
---------------------------------------------- -------------- -------------- ------------ --------------
std::copy(CharT*,_CharT*,_ostreambuf_iterator) 8115.45 329.54 -7785.91 -95.94%
```
Commit: d46a400767199b24b9cf26ba6d1d00001df8d38c
https://github.com/llvm/llvm-project/commit/d46a400767199b24b9cf26ba6d1d00001df8d38c
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/test/CodeGen/PowerPC/fma-combine.ll
Log Message:
-----------
[PowerPC] Remove `NoSignedZerosFPMath` uses (#180087)
Users should use `nsz` flag only.
Commit: ff5dcb1bc58930b8beefb40a04c64bfcfe348162
https://github.com/llvm/llvm-project/commit/ff5dcb1bc58930b8beefb40a04c64bfcfe348162
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
Log Message:
-----------
[SPIRV] Simplify `selectPhi` and remove unreachable code (#183060)
Before it created a `OpPhi` with a Type argument, to immediately remove
this Type and change the opcode to `PHI`.
Only `TargetOpcode::PHI` get to `SPIRVTargetLowering::finalizeLowering`.
The `TargetOpcode::PHI` gets lowered to `SPIRV::OpPhi` much later, by
`patchPhi` in the `SPIRVModuleAnalysis`.
`SPIRVModuleAnalysis` is requested by the
`SPIRVAsmPrinter` through `getAnalysisUsage` (which is ugly).
```
Commit: 90b3fd71013a010e3bbcaf9f06b8bad32947da29
https://github.com/llvm/llvm-project/commit/90b3fd71013a010e3bbcaf9f06b8bad32947da29
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/X86/known-pow2.ll
Log Message:
-----------
[DAG] Move (X +/- Y) & Y --> ~X & Y fold from visitAnd to SimplifyDemandedBits (#183270)
Add DemandedElts handling to allow better vector support
To prevent RISCV falling back to a mul call in known-never-zero.ll I've
had to tweak the (mul step_vector(C0), C1) to (step_vector(C0 * C1))
fold to only occur if C0 is already non-power-of-2, C0 * C1 is a
power-of-2 or the target has good mul support.
Commit: cd68939326ed073ad6d50e034310cc295eddd72e
https://github.com/llvm/llvm-project/commit/cd68939326ed073ad6d50e034310cc295eddd72e
Author: David Stuttard <david.stuttard at amd.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
Log Message:
-----------
[AMDGPU] Add attribute for FWD_PROGRESS (#181675)
Added an attribute for FWD_PROGRESS that allows it to be
turned off for some shaders.
Commit: f02c6ea833a6953be593500ff248c843d5179b04
https://github.com/llvm/llvm-project/commit/f02c6ea833a6953be593500ff248c843d5179b04
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-trig-preop.ll
Log Message:
-----------
AMDGPU: llvm.amdgcn.trig.preop cannot return negative values (#183306)
This returns a positive value less than 1.
Commit: 32b8b9ba1e22e4d2bde05a8a1284531702908f7c
https://github.com/llvm/llvm-project/commit/32b8b9ba1e22e4d2bde05a8a1284531702908f7c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/AArch64/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/X86/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags-interleave.ll
M llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll
M llvm/test/Transforms/LoopVectorize/use-scalar-epilogue-if-tp-fails.ll
Log Message:
-----------
[VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (#182507)
Now that we have ExitingIVValue, we can also use it for tail-folded
loops; the only difference is that we have to compute the end value with
the original trip count instead the vector trip count.
This allows removing the induction increment operand only used when
tail-folding.
PR: https://github.com/llvm/llvm-project/pull/182507
Commit: 254cb2a32649098b11edaac2cc6eb31ea9bfe117
https://github.com/llvm/llvm-project/commit/254cb2a32649098b11edaac2cc6eb31ea9bfe117
Author: Dark Steve <Prasoon.Mishra at amd.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/CodeGen/PostRAHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/test/CodeGen/AMDGPU/wmma-nop-hoisting.mir
Log Message:
-----------
[AMDGPU] Hoist WMMA coexecution hazard V_NOPs from loops to preheaders (#176895)
On GFX1250, V_NOPs inserted for WMMA coexecution hazards are placed at
the use-site. When the hazard-consuming instruction is inside a loop and
the WMMA is outside, these NOPs execute every iteration even though the
hazard only needs to be covered once.
This patch hoists the V_NOPs to the loop preheader, reducing executions
from N iterations to 1.
```
Example (assuming a hazard requiring K V_NOPs):
Before:
bb.0 (preheader): WMMA writes vgpr0
bb.1 (loop): V_NOP xK, VALU reads vgpr0, branch bb.1
-> K NOPs executed per iteration
After:
bb.0 (preheader): WMMA writes vgpr0, V_NOP xK
bb.1 (loop): VALU reads vgpr0, branch bb.1
-> K NOPs executed once
```
For nested loops, V_NOPs are hoisted to the outermost preheader where no
WMMA hazard exists within the loop.
Hoisting is restricted to strict preheaders (not any single predecessor)
to avoid introducing V_NOPs on unrelated control flow paths.
The optimization is controlled by `-amdgpu-wmma-vnop-hoisting` (default:
on).
Fixes: SWDEV-573407
Commit: d8ce0e729997f7b49bd291388b901613cc678bdd
https://github.com/llvm/llvm-project/commit/d8ce0e729997f7b49bd291388b901613cc678bdd
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.h
Log Message:
-----------
[flang][OpenMP] Inline CheckNestedBlock, NFC (#181732)
CheckNestedBlock no longer calls itself, which was the primary reason
for the code to be in a separate function.
Commit: bfa3da861342372bbfd7ee8e2d80bc52feb8d57e
https://github.com/llvm/llvm-project/commit/bfa3da861342372bbfd7ee8e2d80bc52feb8d57e
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Record.cpp
M clang/lib/AST/ByteCode/Record.h
Log Message:
-----------
[clang][bytecode] Optimize `interp::Record` a bit (#183494)
And things around it.
Remove the `FieldMap`, since we can use the field's index instead and
only keep an array around. `reserve()` the sizes and use
`emplace_back()`.
Commit: c5d6feb3152bf39d820935df0d0490f90364d44c
https://github.com/llvm/llvm-project/commit/c5d6feb3152bf39d820935df0d0490f90364d44c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-scalable.ll
Log Message:
-----------
[VPlan] Limit interleave group narrowing to consecutive wide loads.
Tighten check in canNarrowLoad to require consecutive wide loads; we
cannot properly narrow gathers at the moment.
Fixe https://github.com/llvm/llvm-project/issues/183345.
Commit: b7989de510ef17af1e7853632ee220bd7d9c09b1
https://github.com/llvm/llvm-project/commit/b7989de510ef17af1e7853632ee220bd7d9c09b1
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M libc/test/shared/CMakeLists.txt
Log Message:
-----------
[libc][math] Disable shared math tests on AArch64
Commit: 841d5111bfdcb8fb1ba8d2ebd3c18005c063fab8
https://github.com/llvm/llvm-project/commit/841d5111bfdcb8fb1ba8d2ebd3c18005c063fab8
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
A llvm/test/Transforms/SimplifyCFG/AArch64/switch-to-lookup-table-vector-constants.ll
R llvm/test/Transforms/SimplifyCFG/AArch64/switch-to-lookup-table-vector-splat.ll
Log Message:
-----------
[LLVM][SimplifyCFG] Allow switch-to-table for some vector constants. (#183057)
Only applies to fixed length vector constants that are made up of either
ConstantInt or ConstantFP elements.
Commit: ffc8780d1aedb866c7ba62dc820ba51ed8d62d18
https://github.com/llvm/llvm-project/commit/ffc8780d1aedb866c7ba62dc820ba51ed8d62d18
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/Affine/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/ArmNeon/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/ArmSME/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/ArmSVE/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/Bufferization/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/DLTI/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/Func/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/Func/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/GPU/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/GPU/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/LLVMIR/CMakeLists.txt
M mlir/include/mlir/Dialect/Linalg/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/Linalg/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/MemRef/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/MemRef/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/SCF/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/SPIRV/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/Tensor/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/Tosa/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/Transform/DebugExtension/CMakeLists.txt
M mlir/include/mlir/Dialect/Transform/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/Transform/IRDLExtension/CMakeLists.txt
M mlir/include/mlir/Dialect/Transform/LoopExtension/CMakeLists.txt
M mlir/include/mlir/Dialect/Transform/PDLExtension/CMakeLists.txt
M mlir/include/mlir/Dialect/Transform/SMTExtension/CMakeLists.txt
M mlir/include/mlir/Dialect/Transform/TuneExtension/CMakeLists.txt
M mlir/include/mlir/Dialect/Vector/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/XeGPU/TransformOps/CMakeLists.txt
Log Message:
-----------
[MLIR] Fix mlir-doc build failures by adding -dialect to add_mlir_doc calls
Add -dialect=<name> to all add_mlir_doc() calls that were missing it, fixing
failures after a8f2e80d5fe3 made findDialectToGenerate() require -dialect when
multiple dialects are present in a .td file.
Commit: 327f06053599a2cfc9692ca7d5ce3283ce206cf8
https://github.com/llvm/llvm-project/commit/327f06053599a2cfc9692ca7d5ce3283ce206cf8
Author: Abhijeet <abhijeetsharma2002 at gmail.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/X86/known-pow2.ll
Log Message:
-----------
[DAG] Fix OrZero in isKnownToBeAPowerOfTwo ISD::AND (#182934)
Fixes #181653
Commit: d3f69024a54fb95ebf95dc7ed36750ff33f6fa1e
https://github.com/llvm/llvm-project/commit/d3f69024a54fb95ebf95dc7ed36750ff33f6fa1e
Author: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Dialect/Arith/canonicalize.mlir
M mlir/test/Dialect/Arith/ops.mlir
Log Message:
-----------
[mlir][arith] Add `nneg` to index_castui. (#183383)
Follow up to #183165
`nneg` is added to `arith.index_castui`.
> When the `nneg` flag is present, the operand is assumed to be
non-negative.
> In this case, zero extension is equivalent to sign extension. When
this
> assumption is violated, the result is poison.
* Updates op definition to add assembly format and `nneg` flag.
* Updates canonicalization patterns to take into account `nneg` in
`arith.index_castui`.
* Updates arith-to-llvm lowering to preserve `nneg` when lowering
`arith.index_castui` to `zext`
* Adds roundtrip, canonicalization, and lowering tests
Assisted-by: claude
---------
Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>
Commit: ff3e4a6fa3fd07a63f63b0fec87106caa38f972a
https://github.com/llvm/llvm-project/commit/ff3e4a6fa3fd07a63f63b0fec87106caa38f972a
Author: Gergo Stomfai <stomfaig at gmail.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-binop.ll
Log Message:
-----------
[InstCombine] Fold shift of boolean zext to logic sequence (#180596)
Alive2 proofs:
- `eq` case:
https://alive2.llvm.org/ce/z/09hPk-
- `ne` case:
https://alive2.llvm.org/ce/z/zrof4X
Resolves llvm/llvm-project#180492
Commit: 58e3eae2b3592113b32d9af94ff7fe1ffeb1df81
https://github.com/llvm/llvm-project/commit/58e3eae2b3592113b32d9af94ff7fe1ffeb1df81
Author: Emilio Cota <ecg at google.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[bazel] Fix build for 67ac275 (#183510)
Commit: aa3d6b37c7945bfb4c261dd994689de2a2de25bf
https://github.com/llvm/llvm-project/commit/aa3d6b37c7945bfb4c261dd994689de2a2de25bf
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.h
M clang/test/AST/ByteCode/codegen-constexpr-unknown.cpp
Log Message:
-----------
[clang][bytecode] Attach block scope variables to the root scope (#183279)
... if we don't have a block scope available. This can happen in
`EvalEmitter` scenarios and can cause local variable blocks to be
prematurely converted to dead blocks. Attach `ScopeKind::Block` variable
to the root scope instead.
Commit: 9ec7b025cf1806c4d1a9ab7541c7695e7453558f
https://github.com/llvm/llvm-project/commit/9ec7b025cf1806c4d1a9ab7541c7695e7453558f
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
A llvm/test/Transforms/JumpTableToSwitch/stats.ll
Log Message:
-----------
[JTS] Add statistics (#183431)
This patch adds some statistics to the jump-table-to-switch pass. This
will make it easier to see in aggregate how changing the profitability
heuristics impacts how often the optimization fires.
Commit: 7516bc1a57d4e07c25f62b3d35573617648f82ca
https://github.com/llvm/llvm-project/commit/7516bc1a57d4e07c25f62b3d35573617648f82ca
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/vector-shuffle-concatenation.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
Log Message:
-----------
[X86] Clearout unused FALLBACK check prefixes from vector extension/concatenation tests. NFC. (#183527)
These were used before update_llc_test_checks reported when we had lost check coverage - we've cleaned up a lot of check prefixes since then
Commit: fad15b9b12b71a6f900329224d24dbaecbed99f8
https://github.com/llvm/llvm-project/commit/fad15b9b12b71a6f900329224d24dbaecbed99f8
Author: idubinov <idubinov at amd.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/exp10-glsl.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/exp10-opencl.ll
Log Message:
-----------
[SPIR-V] Add lowering for G_FEXP10 (#182466)
Use opencl exp10 and exp10(x) = exp2(x * log2(10)) formula for GLSL
Commit: bd5f9384d831c01b5f388de0be910c385562ed77
https://github.com/llvm/llvm-project/commit/bd5f9384d831c01b5f388de0be910c385562ed77
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops-and-casts.ll
M llvm/test/Transforms/LoopVectorize/pr128062-interleaved-accesses-narrow-group.ll
Log Message:
-----------
[VPlan] Extend interleave-group-narrowing to WidenCast (#183204)
WidenCast is very similar to Widen recipes.
Fixes #128062.
Commit: 8b41ad4430537e595ea82e0c84de9a24ee20ca1f
https://github.com/llvm/llvm-project/commit/8b41ad4430537e595ea82e0c84de9a24ee20ca1f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-accesslist-offsetbins-out-of-sync.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-flat-scratch-init-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-intrinsic-missing-nocallback.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-min-agpr-alloc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-nocallback-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-trap-leaf.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.ll
M llvm/test/CodeGen/AMDGPU/annotate-existing-abi-attributes.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-max-num-workgroups-propagate.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit.ll
M llvm/test/CodeGen/AMDGPU/attributor-loop-issue-58639.ll
M llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
M llvm/test/CodeGen/AMDGPU/implicitarg-offset-attributes.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-set-from-other-function.ll
M llvm/test/CodeGen/AMDGPU/inline-attr.ll
M llvm/test/CodeGen/AMDGPU/issue120256-annotate-constexpr-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/pal-simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/propagate-amdgpu-cluster-dims.ll
M llvm/test/CodeGen/AMDGPU/propagate-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/propagate-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/recursive_global_initializer.ll
M llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call-2.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-attribute-missing.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-multistep.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-nested-function-calls.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-prevent-attribute-propagation.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-propagate-attribute.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-recursion-test.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-test.ll
M llvm/test/Transforms/PhaseOrdering/AMDGPU/infer-address-space.ll
Log Message:
-----------
AMDGPU: Stop adding uniform-work-group-size=false (#183502)
This is one of the string attributes that takes a boolean
value for no reason. There is no point in ever writing this
with an explicit false. Stop adding the noise and reporting
an unnecessary change.
Commit: 7ed40b525937ba59284d1f1a4bb7fcc3f129190d
https://github.com/llvm/llvm-project/commit/7ed40b525937ba59284d1f1a4bb7fcc3f129190d
Author: Ryan Cowan <ryan.cowan at arm.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/aarch64-inline-asm-bitcast-crash.ll
Log Message:
-----------
[AArch64] When lowering 16 bit vector bitcasts, convert to i16. (#178249)
https://github.com/llvm/llvm-project/issues/173483 constrains some
registers to be f16. A bitcast is inserted to bitcast a v2i8 to an f16
due to this constrain. Eventually this bitcast is routed through
`LowerBITCAST` due to the type being illegal. This would cause a crash.
By converting this v2i8 to an i16, we can continue to use the existing
path to lower the bitcast.
Commit: a10e77b1a52f56c3c5fd16631a024441ac7c805e
https://github.com/llvm/llvm-project/commit/a10e77b1a52f56c3c5fd16631a024441ac7c805e
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M flang-rt/include/flang-rt/runtime/environment.h
M flang-rt/lib/runtime/descriptor.cpp
M flang-rt/lib/runtime/environment.cpp
M flang/docs/RuntimeEnvironment.md
Log Message:
-----------
[flang][runtime] Conditionally fail empty ALLOCATE (#182918)
Add an environment variable (FORT_NO_EMPTY_ALLOCATION) that, when set to
1, changes the behavior of an ALLOCATE statement so that it will fail on
an empty allocation rather than its default behavior of allocating one
byte.
Commit: b56137d2a074a52ef49c405195104dd7f1192d03
https://github.com/llvm/llvm-project/commit/b56137d2a074a52ef49c405195104dd7f1192d03
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/CodeGen/AMDGPU/convergent.mir
Log Message:
-----------
[AMDGPU] Ensure all DPP instructions are convergent (#183334)
All DPP instructions in AMDGPUGenInstrInfo.inc are verified to now be
marked as convergent. This is necessary to prevent DPP instructions from
being incorrectly sunk by machine-sink.
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: b313988735105d2664a87d6d1444a57414002d14
https://github.com/llvm/llvm-project/commit/b313988735105d2664a87d6d1444a57414002d14
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/call03.f90
Log Message:
-----------
[flang] Catch missed error cases of assumed-rank actual arguments (#182932)
Assumed-rank actual arguments are acceptable to some intrinsic
procedures, and for association with assumed-rank dummy arguments, but
other cases are not allowed. We catch some, namely ELEMENTAL callees and
CHARACTER arguments, but not the general case error of an assumed-rank
array being associated with a non-assumed-rank dummy.
Commit: 1c2e9b1ea680ef4d37c409f78a6b6b25eef5d25f
https://github.com/llvm/llvm-project/commit/1c2e9b1ea680ef4d37c409f78a6b6b25eef5d25f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-256.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-512.ll
Log Message:
-----------
[X86] Clearout unused FALLBACK check prefixes from vector midpoint tests. NFC. (#183534)
These were used before update_llc_test_checks reported when we had lost
check coverage - we've cleaned up a lot of check prefixes since then
Commit: cbcaae2b5c33ef316f25538bc5cb4c88b71d2f22
https://github.com/llvm/llvm-project/commit/cbcaae2b5c33ef316f25538bc5cb4c88b71d2f22
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M flang/docs/Extensions.md
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Semantics/check-io.cpp
M flang/lib/Semantics/check-io.h
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Semantics/io16.f90
Log Message:
-----------
[flang] Warn about assumed-rank items in I/O lists (#182957)
An assumed-rank dummy argument is not a conforming I/O list or NAMELIST
group item. Add a -pedantic warning and some documentation.
Commit: 0d6f6584622fee13f003bc4be8fe21532163ba40
https://github.com/llvm/llvm-project/commit/0d6f6584622fee13f003bc4be8fe21532163ba40
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M flang/lib/Semantics/expression.cpp
M flang/test/Semantics/call01.f90
Log Message:
-----------
[flang] Catch recursive call to non_recursive ENTRY (#182971)
The check for a recursive call to a non-recursive subprogram doesn't
allow for the case of an alternate ENTRY point.
Commit: 62d473bd01192157493e5bc96e4a8d299ce2594d
https://github.com/llvm/llvm-project/commit/62d473bd01192157493e5bc96e4a8d299ce2594d
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/test/CIR/CodeGenCXX/global-refs.cpp
Log Message:
-----------
[CIR] Implement 1 more global-ref variable fixup (#183403)
This is related to #182608, and I discovered this doing something else.
This patch adds 1 missing call/removes 1 NYI to get references to a
global reference that weren't caught elsewhere to correctly codegen.
Commit: 35db91c0d8295b8cef3d27502a4354ff8f508075
https://github.com/llvm/llvm-project/commit/35db91c0d8295b8cef3d27502a4354ff8f508075
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M flang/include/flang/Common/format.h
M flang/test/Semantics/io08.f90
Log Message:
-----------
[flang] Catch empty nested parenthsized format item list (#183097)
While a completely empty format item list is meaningful -- it does
nothing when there are no data items -- an empty nested parenthesized
format item list is neither conforming nor useful, and will cause a
runtime error if it is interpreted as unlimited repetition. We
essentially catch these cases as parsing errors when they appear in a
FORMAT statement, but the format string checker used for character
constants is missing them.
Commit: cfa7ba7d7c01d75a2267b362cb5179e36ab585a8
https://github.com/llvm/llvm-project/commit/cfa7ba7d7c01d75a2267b362cb5179e36ab585a8
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaTypes.td
M mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
M mlir/test/Dialect/SPIRV/IR/tosa-ops.mlir
M mlir/test/Target/SPIRV/tosa-ops.mlir
Log Message:
-----------
[mlir][spirv] Add 6 Element Binary operators to TOSA Ext Inst Set (#179627)
This patch introduces the following element binary operators:
* spirv.Tosa.Add
* spirv.Tosa.ArithmeticRightShift
* spirv.Tosa.BitwiseAnd
* spirv.Tosa.BitwiseOr
* spirv.Tosa.BitwiseXor
* spirv.Tosa.IntDiv
Also dialect and serialization round-trip tests have been added.
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: a8198bdd91f5daf751627c8b759680470979c26b
https://github.com/llvm/llvm-project/commit/a8198bdd91f5daf751627c8b759680470979c26b
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
Log Message:
-----------
[mlir][SPIRV][NFC] Refactor getElementTypeForStoragePointer for load/store lowering. (#183459)
The revision refactors the repeated logic for extracting the storage
element type from a SPIR-V pointer type into a shared helper function.
This pattern was duplicated in AtomicRMWOpPattern, LoadOpPattern, and
StoreOpPattern.
The helper handles both Kernel capability (direct array/scalar) and
Vulkan (struct-wrapped array/runtime array) cases.
It is a follow-up for
https://github.com/llvm/llvm-project/commit/f80205becd384e73e3dfc6ece97297ab1e8a35f9
Signed-off-by: hanhanW <hanhan0912 at gmail.com>
Commit: 8a7e718a789666dfec784c611b837cf9f0e2511a
https://github.com/llvm/llvm-project/commit/8a7e718a789666dfec784c611b837cf9f0e2511a
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M flang/lib/Evaluate/characteristics.cpp
M flang/test/Semantics/associated.f90
A flang/test/Semantics/bug2273.f90
Log Message:
-----------
[flang] Silence confusing spurious error message (#183105)
The procedure characterization module unconditionally emits a "'foobar'
is not a procedure" when asked to analyze a symbol that is, well, not a
procedure -- even when called with a flag to suppress errors from
analysis, since the calling context is going to handle failure. This
leads to some error messages that have source positions completely
unrelated to the symbol in question. Make this error sensitive to the
suppression flag.
Commit: 9d075d271ff15ec153ada3413d294540206a15ed
https://github.com/llvm/llvm-project/commit/9d075d271ff15ec153ada3413d294540206a15ed
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
M flang/test/Driver/intrinsic-module-path.f90
A flang/test/Semantics/Inputs/modfile83.mod
A flang/test/Semantics/modfile83.f90
Log Message:
-----------
[flang] Fail more gracefully when asked to read a bogus module file (#183119)
Flang-new emits a torrent of Fortran tokenization error messages when
asked to read a module file from another compiler. Handle this case with
a better error message.
Commit: 67eb750225e331c22c924145605b4a0b9ab25427
https://github.com/llvm/llvm-project/commit/67eb750225e331c22c924145605b4a0b9ab25427
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M flang-rt/lib/runtime/descriptor-io.cpp
M flang-rt/lib/runtime/io-api.cpp
M flang-rt/lib/runtime/iostat.cpp
M flang/include/flang/Runtime/iostat-consts.h
Log Message:
-----------
[flang][runtime] Catch asynchronous parent or child I/O (#183161)
ASYNCHRONOUS="YES" is not permitted for either a parent or child data
transfer statement in ISO Fortran (F'2023 12.6.4.8.3 p19). Not that it
matters much -- we don't support true asynchronous I/O anyway -- but
someday we might, and in the meantime it's nice to be able to pass tests
that check conformance.
Commit: 7acc02ff7a1dd83b247bfdf97f9336d0ac02220e
https://github.com/llvm/llvm-project/commit/7acc02ff7a1dd83b247bfdf97f9336d0ac02220e
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M flang-rt/lib/runtime/transformational.cpp
Log Message:
-----------
[flang][runtime] Catch EOSHIFT ARRAY/BOUNDARY type mismatch (#183168)
The ARRAY= and optional BOUNDARY= arguments to EOSHIFT must have the
same dynamic type. Add a runtime check.
Commit: 41f36ee62d6e5ecbbf1696a3c255133e772e7b17
https://github.com/llvm/llvm-project/commit/41f36ee62d6e5ecbbf1696a3c255133e772e7b17
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M flang/lib/Parser/unparse.cpp
A flang/test/Parser/bug2280.f90
Log Message:
-----------
[flang] Don't unparse 1X or X format as X (#183196)
The unparsing code emits a bare X control edit descriptor when its
repetition count is 1, since a bare X control edit descriptor defaults
to 1X. But it's not conforming usage, so it might cause a warning if
unparsed code is recompiled with -pedantic. So don't do that.
Commit: 8bae572c62407c6678699594953e4bd8ab218474
https://github.com/llvm/llvm-project/commit/8bae572c62407c6678699594953e4bd8ab218474
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M flang/lib/Evaluate/check-expression.cpp
A flang/test/Semantics/bug2292.f90
Log Message:
-----------
[flang] Fix crash on error case (#183338)
A named constant implicit-shape array with a non-constant lower bound is
an error case. Emit an error message rather than crashing.
Commit: df2f3460da63dccd96c343dad44619fce09c57a8
https://github.com/llvm/llvm-project/commit/df2f3460da63dccd96c343dad44619fce09c57a8
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M flang/include/flang/Semantics/expression.h
Log Message:
-----------
[flang] Silence build warning (#183393)
Add a [[maybe_unused]] to a parameter of a function with several
constexpr ifs, some of whose branches don't use the parameter.
Commit: 6df45ed1b837449079a7a40090961e5d2a52734e
https://github.com/llvm/llvm-project/commit/6df45ed1b837449079a7a40090961e5d2a52734e
Author: Brox Chen <guochen2 at amd.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
A llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-sgpr32-to-vgpr16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.e5m3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
Log Message:
-----------
[AMDGPU][True16] change vdst_in regclass and remove opsel for cvt_pk_f8_fp32 pattern (#179995)
Two changes:
1. int_amdgcn_cvt_pk_fp/bf8_f32 takes a i32 as a tied input, and this
tied input is passed to cvt_pk_f8_fp32 as a tied vdst_in. In true16 mode
the vdst_in is in vgpr16. Since this i32 could be in sreg32, need to
copy it to vgpr32 first before extract_subreg.
2. remove SRCMODS.DST_OP_SEL from cvt_pk_f8_fp32 pattern in true16 mode.
The opsel is not needed since the hi/lo16 will be clobbered by the
following register rewrite/allocation pass and this const opsel causes
conflictions
Commit: 5de92856bd6c238eb703202a8934f03480e80ee5
https://github.com/llvm/llvm-project/commit/5de92856bd6c238eb703202a8934f03480e80ee5
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/include/__tree
M libcxx/include/__utility/lazy_synth_three_way_comparator.h
A libcxx/test/libcxx/containers/associative/debug.non-strict-weak-ordering.pass.cpp
A libcxx/test/libcxx/containers/associative/lower_upper_bound_non_strict_weak_order.pass.cpp
Log Message:
-----------
[libc++] Introduce a escape hatch for the changed behavior of map and set search operations (#183190)
In #155245, we implemented an optimization to std::map and std::set
search operations. That optimization took advantage of something that is
guaranteed by the Standard, namely that the comparator provided to the
associative container is a valid strict weak ordering.
Sadly, some code in the wild did not satisfy this requirement, such as
Boost.ICL: boostorg/icl#51
Since this can have extremely tricky runtime consequences, this patch
introduces a temporary escape hatch for the LLVM 22 release that allows
reverting to the previous behavior. It also explicitly calls out the
change in the release notes, adds some regression tests and adds debug
mode support for catching some of these invalid predicates.
Fixes #183189
Commit: d161a220bc4a089038425c43904dd8e4d4ff2898
https://github.com/llvm/llvm-project/commit/d161a220bc4a089038425c43904dd8e4d4ff2898
Author: Brox Chen <guochen2 at amd.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
Log Message:
-----------
[AMDGPU] lower fptrunc.round(rtz) to cvt_pkrtz_f16_f32 (#177069)
Lower fptrunc.round(rtz) to cvt_pkrtz_f16_f32 and remove setreg
Commit: 6f736e2cd9933aed1c8b72f2fe370f7d60bd3709
https://github.com/llvm/llvm-project/commit/6f736e2cd9933aed1c8b72f2fe370f7d60bd3709
Author: pkarveti <quic_pkarveti at quicinc.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Target/Hexagon/Hexagon.td
A llvm/test/CodeGen/Hexagon/v81-early-arch-features.ll
Log Message:
-----------
[Hexagon] Add missing early architecture features to V81 processor (#183499)
V81 was missing ArchV5, ArchV55, ArchV60, and ArchV62 in its feature
list, causing instructions requiring these architecture versions to fail
during compilation.
Commit: 78689630b38076fa67caae02766b789d2e7871ab
https://github.com/llvm/llvm-project/commit/78689630b38076fa67caae02766b789d2e7871ab
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.h
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_relaxed_printf_string_address_space/non-constant-printf.ll
Log Message:
-----------
[SPIRV] Fix disabling of default extensions (#183325)
If you pass `-ExtName` to the `--spirv-ext` command line option. that
should disable the extension. However some vendors have some extensions
enabled by default when using a triple with that vendor, and disabling
an extension with the option did not effect the default extensions.
This PR makes it so disabling an extension with the `--spirv-ext` option
actually disables the extension.
The problem was we only considered the disabled extension when parsing
the arguments for `--spirv-ext`, but the default extensions are added
separately, so we need to store the disabled extensions and factor them
in when computing the final extension set to use.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: 46aae011880428279b1b9e2df801d62ac4843a8b
https://github.com/llvm/llvm-project/commit/46aae011880428279b1b9e2df801d62ac4843a8b
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
Log Message:
-----------
[Driver][SPIRV] Fix SPIR-V build for AMD. (#183529)
The AMD path doesn't use spirv-link, and the driver was incorrectly
adding flags for it, which broke the build. The regression was
introduced in
https://github.com/llvm/llvm-project/commit/1870f3face71d6da2bc0095f751dd1b961b7e4c0.
Without this PR's fix, the following assertion is triggered
[here](https://github.com/llvm/llvm-project/blob/aa3d6b37c7945bfb4c261dd994689de2a2de25bf/clang/lib/Driver/ToolChains/HIPAMD.cpp#L43)
when the LLVM bitcode is linked because unexpected flags are forwarded:
```clang::driver::InputInfo::getFilename() const: Assertion
`isFilename() && "Invalid accessor."' failed.```
The bug was triggered by:
`clang++ --offload-new-driver -x hip -O3 --offload-arch=amdgcnspirv
-use-spirv-backend -fvisibility=default -v ./repro/foo.hip -o out
-save-temps`.
This eventually invoked: `clang --no-default-config -o
foo.hip-hip-spirv64-amd-amdhsa.hipfb.spirv64.amdgcnspirv.img -dumpdir
foo.hip-hip-spirv64-amd-amdhsa.hipfb.spirv64.amdgcnspirv.img.
--target=spirv64-amd-amdhsa -march=amdgcnspirv
foo-hip-spirv64-amd-amdhsa-spirv64-amd-amdhsa-amdgcnspirv.o -Xlinker
--allow-partial-linkage -O3 -use-spirv-backend -save-temps=cwd
-flto-partitions=8 -###`.
It triggered the crash due to the incorrect flags.
Commit: bbaf723d863704017226b0f6fb4af26b779c0e89
https://github.com/llvm/llvm-project/commit/bbaf723d863704017226b0f6fb4af26b779c0e89
Author: Lidong Yan <yldhome2d2 at gmail.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/docs/HowToSetUpLLVMStyleRTTI.rst
Log Message:
-----------
[llvm/docs] Add advanced RTTI techniques to HowToSetUpLLVMStyleRTTI (#181863)
The `HowToSetUpLLVMStyleRTTI.rst` document contained a TODO requesting
documentation for advanced RTTI usage, such as the `isa_impl` and
`simplify_type` templates. This patch resolves and removes that TODO by
adding the relevant usage introductions for `simplify_type`.
Since `isa_impl` will be moved to `namespace detail` in the future we
are not including it in the documentation.
CC: @nikic @zwuis
Signed-off-by: Lidong Yan <yldhome2d2 at gmail.com>
Commit: ea52e855f2a29943f7461a76f80fe90120704fe9
https://github.com/llvm/llvm-project/commit/ea52e855f2a29943f7461a76f80fe90120704fe9
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CoreEngine.h
M clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
Log Message:
-----------
[NFCI][analyzer] Spread use of CoreEngine::makeNode (#183540)
Simplify the code of `CoreEngine` by using the method
`CoreEngine::makeNode` (which was introduced recently in commit
1a81673922a3f5b75f342e416e925a69822c4613) and removing two similar, but
less practical utility methods.
This is technically speaking not an NFC change, because previously these
were able to generate non-sink nodes with `PosteriorlyOverconstrained`
state (which is logically unsound) and now the check in `makeNode`
prevents that.
However I labelled this as an NFCI change, as I'm fairly confident that
this won't lead to any observable changes because:
- `PosteriorlyOverconstrained` states are very rare.
- A state derived from a `PosteriorlyOverconstrained` state is also
posteriorly overconstrained, so even without this commit
`PosteriorlyOverconstrained` paths would been sunk soon at the next
transition that properly checks for it.
Note that simulated paths with a `PosteriorlyOverconstrained` state do
not correspond to real paths that can occur during the actual execution
of the program, so the analyzer should stop following them as soon as
possible. For more explanation see the doc-comment above the data member
`bool PosteriorlyOverconstrained` within `ProgramState`.
Commit: fd8b45c396678d6f233e1c026b5df05c8b970818
https://github.com/llvm/llvm-project/commit/fd8b45c396678d6f233e1c026b5df05c8b970818
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
Log Message:
-----------
[X86] vector-replicaton-i1-mask.ll - simplify check prefixes. NFC. (#183547)
Add common check prefixes and remove redundant ones
Commit: 0141d82463e3f334fa6d8e3b98f5766438570f0d
https://github.com/llvm/llvm-project/commit/0141d82463e3f334fa6d8e3b98f5766438570f0d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/test/CodeGen/X86/single_elt_vector_memory_operation.ll
Log Message:
-----------
[X86] single_elt_vector_memory_operation.ll - simplify check prefixes. NFC. (#183545)
Add common check prefixes and remove redundant ones
Commit: 73dec8293b8624668965c5fcf80baa9456fbd0c6
https://github.com/llvm/llvm-project/commit/73dec8293b8624668965c5fcf80baa9456fbd0c6
Author: Ravil Dorozhinskii <ravil.aviva.com at gmail.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
Log Message:
-----------
[ROCDL] Hot fix of mem trait in l2 prefetch (#183550)
Commit: 3a8081cedccddb7e74351da2b534b5ad800c1ad8
https://github.com/llvm/llvm-project/commit/3a8081cedccddb7e74351da2b534b5ad800c1ad8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/opencl-printf.ll
Log Message:
-----------
AMDGPU: Stop checking for r600 in printf pass (#183536)
Avoid adding the pass to the pipeline in the first place.
Commit: 8d23abe4153e37b10f1a5c4963a9ed0b7d7850f6
https://github.com/llvm/llvm-project/commit/8d23abe4153e37b10f1a5c4963a9ed0b7d7850f6
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/include/llvm/Transforms/IPO/IROutliner.h
A llvm/test/Transforms/IROutliner/illegal-nomerge.ll
Log Message:
-----------
[IROutliner] Don't outline callsites with nomerge (#183387)
`nomerge` states that calls to this function should never be merged
during optimisation. Outlining would have the effect of merging
callsites from separate functions into a single callsite in the outlined
function, so this attribute should prevent outlining.
Commit: d44e41794540d7fa85f857228a7616ec8592a7c4
https://github.com/llvm/llvm-project/commit/d44e41794540d7fa85f857228a7616ec8592a7c4
Author: Joachim <jenke at itc.rwth-aachen.de>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M openmp/runtime/test/parallel/bug63197.c
Log Message:
-----------
[openmp][tests] Fix bug63197.c (#183508)
#183269 tried to fix the test, but the test can still randomly fail. The
OpenMP spec does not prevent the runtime to chose a smaller team size
than returned from omp_max_threads() for the second parallel region.
Using a larger value than `omp_max_threads()` in a `num_threads` clause
is valid OpenMP code. With a correct OpenMP implementation, the
team-size of the second parallel region must still be smaller or equal
the value returned from `omp_max_threads()`.
Commit: e2d2b23a5aeb6292fd135f7677a8655800ea7c20
https://github.com/llvm/llvm-project/commit/e2d2b23a5aeb6292fd135f7677a8655800ea7c20
Author: Twice <twice at apache.org>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/include/mlir-c/Rewrite.h
M mlir/lib/Bindings/Python/Rewrite.cpp
M mlir/lib/CAPI/Transforms/Rewrite.cpp
M mlir/test/python/rewrite.py
Log Message:
-----------
[MLIR][Python] Add `convert_type` API for TypeConverter (#183561)
This PR adds the `convert_type` API for `TypeConverter`.
Commit: b654416f2ca958545f9c1e619d724fe2fd460d63
https://github.com/llvm/llvm-project/commit/b654416f2ca958545f9c1e619d724fe2fd460d63
Author: lntue <lntue at google.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M libc/src/__support/math/atan2f128.h
M libc/test/src/math/smoke/atan2f128_test.cpp
Log Message:
-----------
[libc][math] Fix atan2f128 when the exponent difference is larger than the precision. (#183552)
Commit: f14875f3f690f4aa2e387ba19122494eb0481486
https://github.com/llvm/llvm-project/commit/f14875f3f690f4aa2e387ba19122494eb0481486
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M llvm/test/tools/llvm-offload-binary/llvm-offload-binary.ll
Log Message:
-----------
[Clang] Enable response file support for 'llvm-offload-binary' (#183548)
Summary:
These command line invocations can become so large that they no longer
fit, we should support response files in this case so the build on
Windows can be unblocked with the new driver.
Commit: a17349f7870ba0543aa50b7ec9db80222d644123
https://github.com/llvm/llvm-project/commit/a17349f7870ba0543aa50b7ec9db80222d644123
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-casts.ll
Log Message:
-----------
[VectorCombine][X86] shuffle-of-casts.ll - add x86-64-v2 and x86-64-v4 test coverage (#183562)
Prep work for #165813
Commit: 11ed282b7a761c802b714a4b745b1311e8deb756
https://github.com/llvm/llvm-project/commit/11ed282b7a761c802b714a4b745b1311e8deb756
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/include/llvm/ADT/APFloat.h
M llvm/lib/Support/KnownFPClass.cpp
M llvm/test/Transforms/Attributor/nofpclass-fmul.ll
Log Message:
-----------
ValueTracking: Teach computeKnownFPClass that multiply by <= 1 cannot overflow (#183159)
Commit: b9ad15feb58ddd555539441b3b2b8e0fa8c9722d
https://github.com/llvm/llvm-project/commit/b9ad15feb58ddd555539441b3b2b8e0fa8c9722d
Author: Wang Yaduo <wangyaduo at linux.alibaba.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
Log Message:
-----------
[NFC][LICM] Update the comment about hoisting depend on block frequency (#183437)
It seems that the commit 1a25d0 remove the implementation but the
comment is left.
Commit: 2a6a62ac33287eb96eb8dd9bae7ebc765b68d185
https://github.com/llvm/llvm-project/commit/2a6a62ac33287eb96eb8dd9bae7ebc765b68d185
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M mlir/lib/Analysis/SliceAnalysis.cpp
M mlir/test/Analysis/test-match-reduction.mlir
Log Message:
-----------
[MLIR] Fix out-of-bounds crash in matchReduction for ops with fewer yield operands (#183555)
`mlir::matchReduction()` accessed `terminatorOp->getOperand(redPos)`
without checking that `redPos` is within the terminator's operand count.
This caused an assertion failure when the region's block-argument count
exceeds the terminator's yield count, e.g. for `linalg.pooling_nhwc_sum`
whose kernel region has three block args but yields only one value.
Add a bounds check before the operand access so the function returns
nullptr gracefully instead of crashing.
Fixes #131437
Commit: a7723994a9a0642d24cb4fa554dc92918df62b9f
https://github.com/llvm/llvm-project/commit/a7723994a9a0642d24cb4fa554dc92918df62b9f
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M flang-rt/include/flang-rt/runtime/memory.h
M flang-rt/lib/runtime/unit.cpp
M flang-rt/lib/runtime/unit.h
Log Message:
-----------
[flang-rt] Get rid of cyclic call chain in ChildIo. (#183369)
This is a follow up on #182635
It was suggested to place `static_assert(std::is_trivially_destructible_c<A>)`
for the `OwningPtr` class. This cannot be done, because there are
non-trivially destructible types used with `OwnerPtr` (e.g. lots of types
that inherit from `IoErrorHandler`, which is not trivially destructible).
This patch brings back the desctructor call into `OwningPtr::delete_ptr`
just to be on the safe side (though, I do not think we had any memory
leaks even without the destructor call), and removes the cyclic
dependency for the `~ChildIo()` caused by `previous_` member.
Commit: a6a77fd1a7a95098bc3bc530683cc5609f800f54
https://github.com/llvm/llvm-project/commit/a6a77fd1a7a95098bc3bc530683cc5609f800f54
Author: Kirill Stoimenov <87100199+kstoimenov at users.noreply.github.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/lib/AST/ItaniumMangle.cpp
A clang/test/CodeGen/cfi-icall-with-abi-tag.cpp
Log Message:
-----------
[clang] Fixed a bug causing failure with CFI icalls enabled. (#183428)
This is fixing a regression when abi_tag is used in conjunction with CFI.
Commit: f5c3a8e99d87639b29572726abf13716482a680b
https://github.com/llvm/llvm-project/commit/f5c3a8e99d87639b29572726abf13716482a680b
Author: David Green <david.green at arm.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
R llvm/test/Transforms/VectorCombine/AArch64/shuffle-of-intrinscis.ll
A llvm/test/Transforms/VectorCombine/AArch64/shuffle-of-intrinsics.ll
Log Message:
-----------
[AArch64] Rename shuffle-of-intrinscis.ll to shuffle-of-intrinsics.ll. NFC
Commit: 7cc976cf0931cca42cfcb52d909ac8240b252520
https://github.com/llvm/llvm-project/commit/7cc976cf0931cca42cfcb52d909ac8240b252520
Author: Amina Chabane <amina.chabane at arm.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
R llvm/lib/Target/AArch64/aarch64-tensorflow-isel-regression.ll
A llvm/test/CodeGen/AArch64/aarch64-tensorflow-isel-regression.ll
Log Message:
-----------
Move AArch64 regression test to CodeGen (#183566)
Corrected directory of regression test in #178227
Commit: 1ad3a030a819e405bf0bdcd032744ab9e57ba972
https://github.com/llvm/llvm-project/commit/1ad3a030a819e405bf0bdcd032744ab9e57ba972
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-casts.ll
Log Message:
-----------
[VectorCombine][X86] shuffle-of-casts.ll - add #165813 test coverage (#183569)
Commit: 9608d0a561192718698f03fe733c38453a9be2ae
https://github.com/llvm/llvm-project/commit/9608d0a561192718698f03fe733c38453a9be2ae
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
R llvm/test/CodeGen/AMDGPU/wmma-coececution-valu-hazards.mir
A llvm/test/CodeGen/AMDGPU/wmma-coexecution-valu-hazards.mir
Log Message:
-----------
[AMDGPU] Fix typo in test file name. NFC. (#183570)
Commit: af15474262100ade9a8fcfd05f9e05c7ba23ff8c
https://github.com/llvm/llvm-project/commit/af15474262100ade9a8fcfd05f9e05c7ba23ff8c
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/FoldInitTypeCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/fold-init-type.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/fold-init-type.cpp
Log Message:
-----------
[clang-tidy] Improve bugprone-fold-init-type to support overloads (#183300)
This PR extends the AST matchers to handle the overloaded versions of
`std::accumulate`, `std::reduce` and `std::inner_product`.
Closes https://github.com/llvm/llvm-project/issues/85757
---------
Co-authored-by: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Co-authored-by: Baranov Victor <bar.victor.2002 at gmail.com>
Commit: f55416b6308a4a89f71d7610e993a20404d11841
https://github.com/llvm/llvm-project/commit/f55416b6308a4a89f71d7610e993a20404d11841
Author: accauble <accauble at users.noreply.github.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
A clang/test/CodeGenHIP/debug-info-language-hip.hip
Log Message:
-----------
[DebugInfo][HIP] Set DW_AT_language field to DW_LANG_HIP when AMD clang is used (#181738)
Before this change, HIP applications compiled with AMD clang would set
the `DW_AT_language` field to `DW_LANG_C_plus_plus_14`:
```
llvm-dwarfdump hello
hello: file format elf64-x86-64
.debug_info contents:
0x00000000: ...
0x0000000c: DW_TAG_compile_unit
...
------> DW_AT_language (DW_LANG_C_plus_plus_14)
DW_AT_name ("helloworld.cpp")
...
```
This change update the language tag to `DW_LANG_HIP` for these
applications:
```
llvm-dwarfdump hello
hello: file format elf64-x86-64
.debug_info contents:
0x00000000: ...
0x0000000c: DW_TAG_compile_unit
...
------> DW_AT_language (DW_LANG_HIP)
DW_AT_name ("helloworld.cpp")
...
```
Also added a test to check for the new tag
(`debug-info-language-hip.hip`).
The primary motivation for this change is that ROCgdb has to use a
workaround to detect that a program is a HIP application. This removes
the guessing and allows proper detection of the HIP language.
ROCgdb [already has support for
DW_LANG_HIP](https://github.com/ROCm/ROCgdb/commit/316e8393f2ad).
Commit: 3839878d206059cda07cdd0eb93004330188e306
https://github.com/llvm/llvm-project/commit/3839878d206059cda07cdd0eb93004330188e306
Author: Weiwen He <60433849+he-weiwen at users.noreply.github.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/tanpif16.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/tanpif16.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/tanpif16.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor tanpif16 to header-only (#181240)
Part of #147386
in preparation for:
https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Closes #181207
Commit: da851db4bbe5783d0a87a325641b82ddee9bc73d
https://github.com/llvm/llvm-project/commit/da851db4bbe5783d0a87a325641b82ddee9bc73d
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.cpp
M llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h
M llvm/test/CodeGen/PowerPC/milicode32.ll
M llvm/test/CodeGen/PowerPC/milicode64.ll
Log Message:
-----------
[PowerPC] using milicode call for memccpy instead of lib call (#182563)
AIX has "millicode" routines, which are functions loaded at boot time
into fixed addresses in kernel memory. This allows them to be customized
for the processor. The __memccpy routine is a millicode implementation;
we use millicode for the memccpy function instead of a library call to
improve performance
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 8e5b9cab5892b05443a7b817ca8c00bfa9f776cc
https://github.com/llvm/llvm-project/commit/8e5b9cab5892b05443a7b817ca8c00bfa9f776cc
Author: Vishruth Thimmaiah <vishruththimmaiah at gmail.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/test/CIR/CodeGen/virtual-destructor-calls.cpp
Log Message:
-----------
[CIR] Upstream support for pure virtual destructors (#182857)
Upstreams support for emitting traps for abstract destructors.
Signed-off-by: vishruth-thimmaiah <vishruththimmaiah at gmail.com>
Commit: cc1f66d5df85ce420ba7934cb15585d1f0bd89ed
https://github.com/llvm/llvm-project/commit/cc1f66d5df85ce420ba7934cb15585d1f0bd89ed
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/test/CIR/Transforms/flatten-cleanup-scope-eh.cir
M clang/test/CIR/Transforms/flatten-cleanup-scope-nyi.cir
Log Message:
-----------
[CIR] Implement flattening of nested EH cleanup scopes (#183404)
This implements flattening of nested EH cleanup scopes, rewriting the
inner scope's resume to branch to the outer scope's EH cleanup block.
I used AI tools to generate many of the changes in this PR, but I have
carefully reviewed the changes and updated as needed.
Commit: ab3f7cb4e9dc4a12e42325be5899f6ccf15d3723
https://github.com/llvm/llvm-project/commit/ab3f7cb4e9dc4a12e42325be5899f6ccf15d3723
Author: NagaChaitanya Vellanki <pnagato at protonmail.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/test/SemaCXX/constexpr-x86-avx-builtins.cpp
M clang/test/SemaCXX/constexpr-x86-avx512f-builtins.cpp
M clang/test/SemaCXX/constexpr-x86-sse2-builtins.cpp
Log Message:
-----------
[NFC][clang][X86] Add tests for NaN,Denormal,Inf and rounding modes (#180013)
Follow up: #171966
Commit: bdddc1683ae000df3a49189125e7e4c14e6bb579
https://github.com/llvm/llvm-project/commit/bdddc1683ae000df3a49189125e7e4c14e6bb579
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M mlir/lib/Target/LLVM/XeVM/Target.cpp
Log Message:
-----------
[MLIR][XeVM] Enable some SPIRV extensions by default for XeVM target. (#182399)
Enable,
SPV_EXT_relaxed_printf_string_address_space
SPV_INTEL_cache_controls
SPV_INTEL_variable_length_array
Commit: d9a45dc2fc2b01f42a4b3b95bf5f718a974c5f91
https://github.com/llvm/llvm-project/commit/d9a45dc2fc2b01f42a4b3b95bf5f718a974c5f91
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
A llvm/test/Transforms/FunctionAttrs/nofpclass-callsite-prop.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
Log Message:
-----------
FunctionAttrs: Propagate nofpclass from callsite arguments (#183277)
Commit: 186c54ec917625d413a2dad33720409e5210c56f
https://github.com/llvm/llvm-project/commit/186c54ec917625d413a2dad33720409e5210c56f
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizeZeroSizeArrays.cpp
A llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-extern.ll
Log Message:
-----------
[SPIRV] Fix legalization of zero-size external global (#183130)
`getInitializer` asserts if there's no initializer, so check first.
I found this compiling some `liboffload` unit tests.
---------
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: e3735ce4b344a5b6177546ecf40904bedb852f09
https://github.com/llvm/llvm-project/commit/e3735ce4b344a5b6177546ecf40904bedb852f09
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M libc/include/llvm-libc-macros/float16-macros.h
M libc/test/shared/CMakeLists.txt
Log Message:
-----------
[libc][math] Disable float16 on Clang 11 and older (#183574)
This also reverts
https://github.com/llvm/llvm-project/commit/c5d6feb3152bf39d820935df0d0490f90364d44c
Commit: 3490d28c8cab9541e57c31c0809d3fe09da43a4b
https://github.com/llvm/llvm-project/commit/3490d28c8cab9541e57c31c0809d3fe09da43a4b
Author: Alex Langford <alangford at apple.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M lldb/include/lldb/Host/Config.h.cmake
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/source/Core/Debugger.cpp
R lldb/test/API/functionalities/postmortem/FreeBSD-Kernel-Core/tools/README.rst
R lldb/test/API/functionalities/postmortem/FreeBSD-Kernel-Core/tools/copy-sparse.py
R lldb/test/API/functionalities/postmortem/FreeBSD-Kernel-Core/tools/libfbsdvmcore-hacks.patch
R lldb/test/API/functionalities/postmortem/FreeBSD-Kernel-Core/tools/lldb-minimize-processes.patch
R lldb/test/API/functionalities/postmortem/FreeBSD-Kernel-Core/tools/test.script
Log Message:
-----------
[lldb] Remove last references to fbsdvm (#183418)
Support was removed in #181283
(a8cd1ac7058efdf7a9be823182da884243ca6c0b)
Commit: 27905b119669d257a67e9312c1de46edb33b7e44
https://github.com/llvm/llvm-project/commit/27905b119669d257a67e9312c1de46edb33b7e44
Author: Zorojuro <sawantsukumar at gmail.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/f16sqrtf128.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/f16sqrtf128.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/f16sqrtf128.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor f16sqrtf128 to Header Only. (#183542)
closes #175328
part of https://github.com/llvm/llvm-project/issues/147386
Commit: f6917fa6c90a9d55d3bfd9d8aa4583834771565d
https://github.com/llvm/llvm-project/commit/f6917fa6c90a9d55d3bfd9d8aa4583834771565d
Author: Thibault Monnier <thibaultmonni at gmail.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/lib/Lex/Lexer.cpp
Log Message:
-----------
[Clang][Lexer][Performance] Optimize Lexer whitespace skipping logic (#180819)
... by extracting the check for space character and marking it as
`LLVM_LIKELY`. This increases performance because the space is by far
the most common horizontal character, so in most cases, this change
allows to replace a lookup table check with a simple comparison,
reducing latency and helping the cache.
This does not reduce instruction count, as a lookup table and a
comparison are both a single instruction. However, it _does_ reduce
cycles in a consistent manner, around `0.2` - `0.3`%:
[benchmark](https://llvm-compile-time-tracker.com/compare.php?from=3192fe2c7b08912cc72c86471a593165b615dc28&to=faa899a6ce518c1176f2bf59f199eb42e59d840e&stat=cycles).
I tested this locally and am able to confirm this is not noise (at least
not entirely, it does feel weird that this impacts `O3` more than
`O0`...), as I achieved almost `2`% faster PP speed in my tests.
Commit: b8618ff61e719c9328f5198bbb9c5734223d5a37
https://github.com/llvm/llvm-project/commit/b8618ff61e719c9328f5198bbb9c5734223d5a37
Author: Aleksandr Nogikh <nogikh at google.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/lib/AST/InferAlloc.cpp
M clang/test/CodeGenCXX/alloc-token-pointer.cpp
Log Message:
-----------
[AllocToken] [Clang] Fix type inference for atomic types (#183571)
When evaluating whether an allocated type contains a pointer to generate
the `alloc_token` metadata, `typeContainsPointer` incorrectly stopped
recursion upon encountering an `AtomicType`. This resulted in types like
`_Atomic(int *)` (or `std::atomic<int *>` under libc++) being
incorrectly evaluated as not containing a pointer.
Add support for `AtomicType` in `typeContainsPointer` by recursively
checking the contained type.
Add tests for structs containing `_Atomic(int *)` and `_Atomic(int)`.
Commit: bf8e006c8438a2c953a0e1863ed1f0138c0b74b2
https://github.com/llvm/llvm-project/commit/bf8e006c8438a2c953a0e1863ed1f0138c0b74b2
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/docs/ClangIRCleanupAndEHDesign.md
Log Message:
-----------
[CIR][docs] Fix table of contents for CIR eh and cleanups doc (#183594)
When this document was converted from rst to markdown, the contents
didn't get updated correctly.
Commit: 8702c6bab34f036798d52ba6c28769934a1e5b1e
https://github.com/llvm/llvm-project/commit/8702c6bab34f036798d52ba6c28769934a1e5b1e
Author: Ryan Mansfield <ryan_mansfield at apple.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
A clang/test/Driver/crash-report-no-integrated-cc1.c
M clang/tools/driver/driver.cpp
Log Message:
-----------
[clang] Fix driver resignaling when cc1 runs out-of-process (#183560)
When cc1 runs out-of-process and crashes, sys::ExecuteAndWait returns -2
for signal-killed children. The resignaling block added in 15488a7f78ce
only handled CommandRes > 128, so the driver would exit normally with
code 1 instead of dying by signal.
Commit: e05b6cb6e11ae1a64673effbcc018f20adfeccf7
https://github.com/llvm/llvm-project/commit/e05b6cb6e11ae1a64673effbcc018f20adfeccf7
Author: Nirvedh Meshram <96096277+nirvedhmeshram at users.noreply.github.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/SCF/TransformOps/SCFTransformOps.td
M mlir/lib/Dialect/SCF/TransformOps/SCFTransformOps.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/test/Dialect/SCF/transform-op-coalesce.mlir
Log Message:
-----------
[SCF] allow indexing operations for loop coalesceing (#183180)
Currently if there are operations between the loops we get a dominance
issue as the delinearlized index is added after the operations. This PR
fixes that.
For testing we also add a transform pattern that makes a direct call to
coalesceLoops as the existing pattern calls
coalescePerfectlyNestedSCFForLoops which does not consider the loop nest
perfectly nested if there are operations between them which is safer for
that usage.
Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
Commit: c4e2891a1dca8ae7753f1913417ceddd9c90616e
https://github.com/llvm/llvm-project/commit/c4e2891a1dca8ae7753f1913417ceddd9c90616e
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[MLIR][Vector] Fix crash in BitCastOp::fold for index element type (#183572)
`BitCastOp::fold` called `Type::getIntOrFloatBitWidth()` on the source
element type without first verifying it satisfies `isIntOrFloat()`. When
the source vector has `index` element type (e.g. `vector<16xindex>`),
the assertion `only integers and floats have a bitwidth` fires.
Add an `srcElemType.isIntOrFloat()` guard to the condition so that the
constant-folding path is skipped for non-integer/float element types.
Fixes #177835
Commit: ea0b65d4706904bbc630b5376c8103c86944a35a
https://github.com/llvm/llvm-project/commit/ea0b65d4706904bbc630b5376c8103c86944a35a
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Dialect/Arith/canonicalize.mlir
Log Message:
-----------
[mlir][arith] Fix crash in AddUIExtendedOp::fold when operand is ub.poison (#183596)
When `constFoldBinaryOp<IntegerAttr>` is called with a `ub.poison`
operand, it propagates the poison attribute as its result. The fold
method for `arith.addui_extended` then attempted to cast this result to
`TypedAttr` via `llvm::cast<TypedAttr>(sumAttr)`, which failed with an
assertion because `PoisonAttr` does not implement the `TypedAttr`
interface.
Fix this by checking whether the folded sum is a poison attribute before
the cast. When poison is detected, it is propagated to both the sum and
overflow results.
Fixes #181534
Commit: 72daf0c02303c64dbd27f3e93667319829b05519
https://github.com/llvm/llvm-project/commit/72daf0c02303c64dbd27f3e93667319829b05519
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/lib/AST/DeclTemplate.cpp
A clang/test/SemaTemplate/GH181062.cpp
Log Message:
-----------
[clang] fix transformation of substituted constant template parameters of partial specializations (#183348)
This fixes a helper so it implements retrieval of the argument replaced
for a template parameter for partial spcializations.
This was left out of the original patch, since it's quite hard to
actually test.
This helper implements the retrieval for variable templates, but only
for completeness sake, as no current users rely on this, as I don't
think a similar test case is possible to implement with variable
templates.
This fixes a regression introduced in #161029 which will be backported
to llvm-22, so there are no release notes.
Fixes #181062
Fixes #181410
Commit: b13718cd104fb0e70dc19093be3c3eb7af10e106
https://github.com/llvm/llvm-project/commit/b13718cd104fb0e70dc19093be3c3eb7af10e106
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-bf16.ll
Log Message:
-----------
[AMDGPU] Fix encoding of inline constants in v_fma_mix_f32_bf16 (#183487)
BF16 source operands use F32 inline constant values, so set OP_SEL to
select the high half of the constant, since BF16 encoding matches the
high 16 bits of F32 encoding. This behaviour is different from F16
source operands which use F16 constant values in the low 16 bits.
Fixes: #183337
Commit: 5bbfce06e0d16722ff2bca5feedb10c1ebc530be
https://github.com/llvm/llvm-project/commit/5bbfce06e0d16722ff2bca5feedb10c1ebc530be
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-trig-preop.ll
Log Message:
-----------
ValueTracking: Special case fmul by llvm.amdgcn.trig.preop (#183373)
This is another instance of the logic from #183159. If we know
one source is not-infinity, and the other source is less than or
equal to 1, this cannot overflow. Special case llvm.amdgcn.trig.preop,
as a substitute for proper range tracking. This almost enables pruning
edge case handling in trig function implementations, if not for the
recursion depth limit (but that's a problem for another day).
Commit: 32f9a40d3a801821fa4b083e76492be26fb72755
https://github.com/llvm/llvm-project/commit/32f9a40d3a801821fa4b083e76492be26fb72755
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/include/llvm/IR/FMF.h
M llvm/include/llvm/IR/PatternMatch.h
Log Message:
-----------
Add remaining patterns for floating-point flag matches (#173912)
As in title. Only `reassoc` pattern was supplied -- for completeness all
should be supplied. Make FastMathFlag ctor public as well.
Commit: 3d469665a286cac528c2ef2fb018032d80843716
https://github.com/llvm/llvm-project/commit/3d469665a286cac528c2ef2fb018032d80843716
Author: Chris B <chris.bieneman at me.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/HLSL.cpp
A clang/test/Driver/HLSL/fre-errors.hlsl
M clang/test/Driver/HLSL/metal-converter.hlsl
Log Message:
-----------
[Metal][HLSL] Add support for dumping reflection (#181258)
The Metal Shader converter can output shader reflection information into
a JSON file. This connects the -Fre flag (DXC's flag for reflection) to
the Metal Shader Converter tool step to produce the JSON file. As a
temporary state the -Fre flag will error when used without the -metal
flag.
This is required to address
https://github.com/llvm/offload-test-suite/issues/452
Commit: 25e15775da1c3e607f13bd40e85c54474f2f1ef7
https://github.com/llvm/llvm-project/commit/25e15775da1c3e607f13bd40e85c54474f2f1ef7
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Log Message:
-----------
[Clang] Add response file support to clang-linker-wrapper (#183598)
Summary:
This is needed on some platforms like Windows when the generated command
line becomes too large. This seems to be occurring in practice so we
need to support this. Uses the same basic support clang does.
No test because there isn't any current infrastructure to support it,
will likely be "tested" by ROCBLAS builds not failing anymore on
Windows.
Commit: 19c862dd277b386bffb18247d53c801ae441390b
https://github.com/llvm/llvm-project/commit/19c862dd277b386bffb18247d53c801ae441390b
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenAsm.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
Log Message:
-----------
[CIR][NFC] Fix unused variable warnings (#183604)
We have accumulated four places where variables were only being used in
asserts. This change silences the warnings for that.
Commit: aae3843c77e4d18a716945fa1a7b2159acf5539d
https://github.com/llvm/llvm-project/commit/aae3843c77e4d18a716945fa1a7b2159acf5539d
Author: Thibault Monnier <thibaultmonni at gmail.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/ExprConstant.cpp
M clang/test/SemaCXX/vector.cpp
Log Message:
-----------
[Clang][AST] Fix extending an unsigned to signed in `ExprConstant.cpp` (#180563)
Fixes #154713.
The crash was due to `Index` sometimes being an unsigned 64-bit integer
which was being zero-extended to a signed 64-bit, triggering an
assertion failure in `APSInt::getExtValue`. This patch zero-extends it
to a unsigned 64-bit integer instead, since `HandleLValueVectorElement`
takes in a `uint64_t` anyway.
Commit: dc66b51a700ec6980afee4e43b913f871b759d0b
https://github.com/llvm/llvm-project/commit/dc66b51a700ec6980afee4e43b913f871b759d0b
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPC.td
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/test/CodeGen/PowerPC/fmf-propagation.ll
Log Message:
-----------
[PowerPC] Remove `NoNaNsFPMath` uses (#183449)
Commit: 6c532a621a555c07da30e34b7956745d33c9dd79
https://github.com/llvm/llvm-project/commit/6c532a621a555c07da30e34b7956745d33c9dd79
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
Log Message:
-----------
[OpenMP] Remove NVPTX local addrspace on parameters (#183195)
In CGOpenMPRuntimeGPU::translateParameter, reference-type captured
variables were translated to pointer parameters with two address-space
annotations:
1. LangAS::opencl_global on the pointee (for map'd variables), which
correctly produces ptr addrspace(1) in NVPTX IR.
2. getLangASFromTargetAS(NVPTX_local_addr=5) on the pointer itself,
annotating the parameter as living in NVPTX local (stack) memory.
The second annotation is incorrect at the Clang type-system level:
EmitParmDecl only supports parameters to be in LangAS::Default (or the
special cases for OpenCL).
Temporarily add an assert in EmitParmDecl that catches parameters with
non-default address spaces in non-OpenCL compilations, and fix the
violation by dropping the NVPTX_local_addr addAddressSpace call.
Should fix the issue noticed in
https://github.com/llvm/llvm-project/pull/181256#discussion_r2821894122,
allowing removing that special case there for OpenMP, though I haven't
tested the combination yet. That PR would fix EmitParmDecl to actually
support non-default address spaces from Sema, and will remove this
assert again.
Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
Commit: 60eac414b79462122e2d33658f6a0bcb610f8f5d
https://github.com/llvm/llvm-project/commit/60eac414b79462122e2d33658f6a0bcb610f8f5d
Author: Aviral Goel <aviralg at users.noreply.github.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/include/clang/Analysis/Scalable/Model/BuildNamespace.h
M clang/include/clang/Analysis/Scalable/Model/EntityLinkage.h
M clang/include/clang/Analysis/Scalable/Serialization/JSONFormat.h
M clang/include/clang/Analysis/Scalable/Support/FormatProviders.h
M clang/lib/Analysis/Scalable/EntityLinker/EntityLinker.cpp
M clang/lib/Analysis/Scalable/Model/BuildNamespace.cpp
M clang/lib/Analysis/Scalable/Model/EntityLinkage.cpp
A clang/lib/Analysis/Scalable/ModelStringConversions.h
M clang/lib/Analysis/Scalable/Serialization/JSONFormat.cpp
M clang/unittests/Analysis/Scalable/BuildNamespaceTest.cpp
M clang/unittests/Analysis/Scalable/CMakeLists.txt
M clang/unittests/Analysis/Scalable/EntityIdTest.cpp
M clang/unittests/Analysis/Scalable/EntityLinkageTest.cpp
M clang/unittests/Analysis/Scalable/EntityLinkerTest.cpp
M clang/unittests/Analysis/Scalable/EntityNameTest.cpp
A clang/unittests/Analysis/Scalable/ModelStringConversionsTest.cpp
M clang/unittests/Analysis/Scalable/Serialization/JSONFormatTest/TUSummaryTest.cpp
M clang/unittests/Analysis/Scalable/SummaryNameTest.cpp
Log Message:
-----------
[clang][ssaf] Improve serialization for Model types and error messages in `JSONFormat`
This changes fixes the diagnostic infrastructure in `JSONFormat`
implementation to pass model objects (`EntityId`, `EntityLinkage`,
`BuildNamespace`, `NestedBuildNamespace`, `SummaryName`) directly to
`ErrorBuilder` instead of manually extracting their components. This
relies on existing `llvm::format_provider` specializations for these
objects.
To support consistent string conversion for `BuildNamespaceKind` and
`EntityLinkageType`, across both serialization and `operator<<`,
`toString`/`fromString` functions have been introduced in an internal
header `ModelStringConversions.h`.
`EntityLinkage::LinkageType` is promoted to a standalone enum class
`EntityLinkageType` at namespace scope, following the same pattern as
`BuildNamespaceKind`.
Tests have been added for `operator<<` and `format_provider` for all
affected types, and a new `ModelStringConversionsTest.cpp` directly
unit-tests the `toString/fromString` functions including round-trip and
unknown-input cases.
Commit: 4c60c0164688f798bade20379b4cddaaf75eb233
https://github.com/llvm/llvm-project/commit/4c60c0164688f798bade20379b4cddaaf75eb233
Author: Fateme Hosseini <Fhossein at qti.qualcomm.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp
A llvm/test/CodeGen/Hexagon/constp-const32-signbit.mir
Log Message:
-----------
[Hexagon] Fix assert on sign-bit CONST32 immediates (#182118)
This patch fixes a HexagonConstPropagation assert when evaluating
sign-bit CONST32/CONST64 immediates (e.g. 0x80000000) after ConstantInt
stopped implicitly truncating, by allowing truncation for that signed
case.
Commit: 52f76c035aaab0854990e49bc629be3f833f2088
https://github.com/llvm/llvm-project/commit/52f76c035aaab0854990e49bc629be3f833f2088
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToWiDistributeExperimental.cpp
M mlir/test/Dialect/XeGPU/sg-to-wi-experimental-unit.mlir
Log Message:
-----------
[MLIR][XeGPU] Add distribution pattern for xegpu.load & store for sg to wi pass (#181917)
This PR adds distribution pattern for xegpu.load & store ops for the new
sg-to-wi pass
Commit: 4efc6a9378394ecb5dd28898d92c9a34153db019
https://github.com/llvm/llvm-project/commit/4efc6a9378394ecb5dd28898d92c9a34153db019
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
[cmake] Don't use PCH when clang-cache launcher is used (#183620)
Fix incremental build failure when using PCH build and clang-cache
together.
Commit: c5f40ef7fe7f1fa616d28b46334cf60579d4893c
https://github.com/llvm/llvm-project/commit/c5f40ef7fe7f1fa616d28b46334cf60579d4893c
Author: Oleksandr Tarasiuk <oleksandr.tarasiuk at outlook.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParsePragma.cpp
M clang/test/FixIt/fixit-pragma-attribute.cpp
M clang/test/Parser/pragma-attribute.cpp
Log Message:
-----------
[Clang] fix crash parsing forbidden attribute args in pragma attributes (#182362)
Fixes #182122
---
This patch resolves a crash when parsing `#pragma clang attribute`
arguments for attributes that forbid arguments. The root cause is that
the `#pragma` attribute path doesn't pass `EndLoc` to
https://github.com/llvm/llvm-project/blob/413cafa4624eb37e586e266f44abd64896e1c598/clang/lib/Parse/ParsePragma.cpp#L1982-L1985
unlike the normal attribute parsing flow
https://github.com/llvm/llvm-project/blob/413cafa4624eb37e586e266f44abd64896e1c598/clang/lib/Parse/ParseDeclCXX.cpp#L4706
Without `EndLoc`, argument parsing cannot update the parsed end token
https://github.com/llvm/llvm-project/blob/413cafa4624eb37e586e266f44abd64896e1c598/clang/lib/Parse/ParseDecl.cpp#L621-L622
and `fix-it` gets an invalid end location
https://github.com/llvm/llvm-project/blob/0dafeb97a4687c29f5182fa0239c7fa39ee23091/clang/lib/Parse/ParseDeclCXX.cpp#L4537
This change makes the pragma path pass `EndLoc` the same way as the
regular flow does, preventing the crash and preserving valid fix-it
ranges.
Commit: 5007dd9d0945938f2177142e9784e240490e7050
https://github.com/llvm/llvm-project/commit/5007dd9d0945938f2177142e9784e240490e7050
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M lldb/include/lldb/Expression/REPL.h
M lldb/source/Expression/REPL.cpp
M lldb/source/Plugins/REPL/Clang/ClangREPL.cpp
M lldb/source/Plugins/REPL/Clang/ClangREPL.h
Log Message:
-----------
[lldb][repl] fix output interleaving with the status line (#183600)
This patch fixes the REPL's output from interleaving with the status
line by locking the stream before printing.
Commit: 2576ee1fd93fb87699650734ffafdb8092062d59
https://github.com/llvm/llvm-project/commit/2576ee1fd93fb87699650734ffafdb8092062d59
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Use VPInstructionWithType for Load in VPlan0 (NFC)
VPInstructionWithType directly allows modeling the loaded type.
Commit: fb81e59ccbea6753d6ccd87f113bcc7a77440b72
https://github.com/llvm/llvm-project/commit/fb81e59ccbea6753d6ccd87f113bcc7a77440b72
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/test/AST/HLSL/WaveSize.hlsl
M clang/test/CodeGen/aix-builtin-cpu-supports.c
M clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp
M clang/test/CodeGenCXX/vtable-assume-load.cpp
Log Message:
-----------
[Clang] Fix typo "LABLE" in test checks (#178449)
Commit: dbaa4d117aac3bf25505ca78a4b9752e1bb9c3dc
https://github.com/llvm/llvm-project/commit/dbaa4d117aac3bf25505ca78a4b9752e1bb9c3dc
Author: yasmincs <ysarita at nvidia.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/reserved-smem-offset.ll
Log Message:
-----------
[NVPTX] Support intrinsics for reserved shared memory special registers (#182354)
Added reserved_smem_offset_{begin|end|cap|0} intrinsics to expose shared
memory special registers and NVPTX TableGen support for these
intrinsics.
Commit: 97835516393311d681d1ff6bec67e1093f94890e
https://github.com/llvm/llvm-project/commit/97835516393311d681d1ff6bec67e1093f94890e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
Revert "[VPlan] Use VPInstructionWithType for Load in VPlan0 (NFC)"
This reverts commit 2576ee1fd93fb87699650734ffafdb8092062d59.
This was causing test failures when running check-llvm-unit.
Commit: 46c06a34f1de56142935a305f0461cd0e54e1772
https://github.com/llvm/llvm-project/commit/46c06a34f1de56142935a305f0461cd0e54e1772
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
Log Message:
-----------
[VPlan] Fixup C++ unit test output after 2576ee1fd93f.
Commit: d5e501725e31d99467a40e8b951b530c215c8519
https://github.com/llvm/llvm-project/commit/d5e501725e31d99467a40e8b951b530c215c8519
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
Reapply "[VPlan] Use VPInstructionWithType for Load in VPlan0 (NFC)"
This reverts commit 97835516393311d681d1ff6bec67e1093f94890e.
Unit tests have been updated
Commit: 10abb231d6b4cbda74b2bd92921403ba361bb4c6
https://github.com/llvm/llvm-project/commit/10abb231d6b4cbda74b2bd92921403ba361bb4c6
Author: Alexis Perry-Holby <aperry at lanl.gov>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M flang/docs/GettingInvolved.md
Log Message:
-----------
[flang] Update the Flang Community Call to the new MS Teams series (#183576)
Commit: 6bc9ba786d0f705ebb1c8a08cef9f0552fb86f1d
https://github.com/llvm/llvm-project/commit/6bc9ba786d0f705ebb1c8a08cef9f0552fb86f1d
Author: Fateme Hosseini <Fhossein at qti.qualcomm.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
A llvm/test/CodeGen/Hexagon/vgather-memvt.ll
Log Message:
-----------
[Hexagon] Fix memory type for vgather intrinsics (#183563)
Some of the Hexagon vgather intrinsics were picking the memory type
(memVT) from a fixed argument position, but for several variants (e.g.
the predicated ones), that argument isn’t actually the data vector being
gathered. As a result, LLVM could end up recording the wrong memory type
or size (e.g. i32 or mask instead of the vector arg). This patch fixes
that by always taking memVT from the last intrinsic argument, which is
the actual data vector.
Commit: c6db35fd343e43f6574062b6b580ec16ff9fb67a
https://github.com/llvm/llvm-project/commit/c6db35fd343e43f6574062b6b580ec16ff9fb67a
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPeepHoleOptimizer.cpp
M mlir/test/Dialect/XeGPU/peephole-optimize.mlir
Log Message:
-----------
[mlir][xegpu] Retain order attribute during load + transpose optimization. (#183608)
As described in the title `order` attribute is ignored in this
transformation causing downstream test failures.
Commit: e92dd71f44c3eae4280693a5cf28e6ae2b94eb80
https://github.com/llvm/llvm-project/commit/e92dd71f44c3eae4280693a5cf28e6ae2b94eb80
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Add Defs = VXSAT to P extension instructions. (#183455)
Commit: 2fc0733805e3bdd8d37d35ba39763e646df88f52
https://github.com/llvm/llvm-project/commit/2fc0733805e3bdd8d37d35ba39763e646df88f52
Author: Guy David <guyda96 at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/faddv-fp16.ll
A llvm/test/CodeGen/AArch64/faddv.ll
M llvm/test/CodeGen/AArch64/vecreduce-fadd.ll
Log Message:
-----------
[AArch64] Decompose FADD reductions with known zero elements (#167313)
FADDV is matched into FADDPv4f32 + FADDPv2i32p but this can be relaxed
when one element (usually the 4th) or more are known to be zero.
Before:
```
movi d1, #0000000000000000
mov v0.s[3], v1.s[0]
faddp v0.4s, v0.4s, v0.4s
faddp s0, v0.2s
```
After:
```
mov s1, v0.s[2]
faddp s0, v0.2s
fadd s0, s0, s1
```
When all of the elements are zero, the intrinsic now simply reduces into
a constant instead of emitting two additions.
Commit: e55945556a1e99a7d6618735873d513a0239b2a0
https://github.com/llvm/llvm-project/commit/e55945556a1e99a7d6618735873d513a0239b2a0
Author: Tamas Kaman <tamas.kaman at arm.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/secondary.h
Log Message:
-----------
[scudo] Change header tagging for the secondary allocator (#182487)
When secondary allocator allocates a new chunk, the allocation is
prepended with a chunk header (common with the primary allocator)
and large header (only used for secondary).
Only the headers are tagged, the data is not, and the headers are
tagged individually as different tags are used for them.
In the current implementation while tagging the large header the unused
area is tagged with it, so the allocator can tag up to a page size (in
worst case), which is costly and does not bring security benefit (as the
area is unused).
With the current fix we can get rid of around 97-98% of the tagging for
the secondary allocator, measured with random benchmarks.
Co-authored-by: Christopher Ferris <cferris1000 at users.noreply.github.com>
Commit: 20ec9a9bb72560fe73706f46415dcfb118f9d265
https://github.com/llvm/llvm-project/commit/20ec9a9bb72560fe73706f46415dcfb118f9d265
Author: Saleem Abdulrasool <compnerd at compnerd.org>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/cmake/modules/AddClang.cmake
Log Message:
-----------
build: correct `MSVC` and Windows mixup for `CLANG_BUILD_STATIC` (#183609)
The build incorrectly used `MSVC` to determine that we were building for
Windows (MS ABI). This prevents the use of the GNU driver for building
LLVM for Windows. Adjust the condition to `WIN32 AND NOT MINGW` to
correctly identify that we are building for Windows MS ABI.
Commit: 7e39b280e8607e4bd09b87fb3271963803b4d02f
https://github.com/llvm/llvm-project/commit/7e39b280e8607e4bd09b87fb3271963803b4d02f
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/nextafter.h
A libc/shared/math/nextafterbf16.h
A libc/shared/math/nextafterf.h
A libc/shared/math/nextafterf128.h
A libc/shared/math/nextafterf16.h
A libc/shared/math/nextafterl.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/nextafter.h
A libc/src/__support/math/nextafterbf16.h
A libc/src/__support/math/nextafterf.h
A libc/src/__support/math/nextafterf128.h
A libc/src/__support/math/nextafterf16.h
A libc/src/__support/math/nextafterl.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/nextafter.cpp
M libc/src/math/generic/nextafterbf16.cpp
M libc/src/math/generic/nextafterf.cpp
M libc/src/math/generic/nextafterf128.cpp
M libc/src/math/generic/nextafterf16.cpp
M libc/src/math/generic/nextafterl.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor nextafter family to header-only (#181673)
closes #181672
Commit: 7c022af37ef2bc9deb60c6be93b7925028d39e8a
https://github.com/llvm/llvm-project/commit/7c022af37ef2bc9deb60c6be93b7925028d39e8a
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/report.cpp
M compiler-rt/lib/scudo/standalone/report.h
M compiler-rt/lib/scudo/standalone/tests/report_test.cpp
M compiler-rt/lib/scudo/standalone/tests/wrappers_c_test.cpp
M compiler-rt/lib/scudo/standalone/wrappers_c.inc
M compiler-rt/lib/scudo/standalone/wrappers_c_checks.h
Log Message:
-----------
[scudo] Add reallocarray C wrapper. (#183385)
`reallocarray()` is a POSIX extension to C standard which wraps
`realloc` function and adds `calloc`-like overflow detection. It is
available in glibc and some other standard library implementations. Add
`reallocarray` to the list of Scudo C wrappers, so that the code that
depends on `reallocarray` presence will continue to work.
Commit: 5e6f0c45a851ccb53a7bf1847b967d3cd42de724
https://github.com/llvm/llvm-project/commit/5e6f0c45a851ccb53a7bf1847b967d3cd42de724
Author: Ankit Aggarwal <aankit at qti.qualcomm.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/OSTargets.h
M clang/test/Preprocessor/hexagon-predefines.c
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/TargetParser/Triple.cpp
Log Message:
-----------
[Clang][Hexagon] Add QURT as recognized OS in target triple (#183622)
Add support for the QURT as a recognized OS type in the LLVM triple
system, and define the __qurt__ predefined macro when targeting it.
Commit: 26b4c25b8bceb414471d825395e418636d9d17e7
https://github.com/llvm/llvm-project/commit/26b4c25b8bceb414471d825395e418636d9d17e7
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M flang-rt/lib/cuda/allocator.cpp
M flang-rt/lib/cuda/stream.cpp
M flang-rt/unittests/Runtime/CUDA/Allocatable.cpp
M flang/include/flang/Optimizer/Builder/CUDAIntrinsicCall.h
M flang/include/flang/Runtime/CUDA/allocator.h
M flang/include/flang/Runtime/CUDA/stream.h
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M flang/module/cuda_runtime_api.f90
M flang/test/Lower/CUDA/cuda-default-stream.cuf
Log Message:
-----------
[flang][cuda] Add support for cudaStreamDestroy (#183648)
Add specific lowering and entry point for cudaStreamDestroy. Since we
keep associated stream for some allocation, we need to reset it when the
stream is destroy so we don't use it anymore.
Commit: d149830b98f89787faa8a8cd2387e20b7cd7b0f2
https://github.com/llvm/llvm-project/commit/d149830b98f89787faa8a8cd2387e20b7cd7b0f2
Author: Ruiling, Song <ruiling.song at amd.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
A llvm/test/CodeGen/AMDGPU/load-saddr-offset-imm.ll
Log Message:
-----------
[AMDGPU] Pre-Commit tests for handle mbcnt in computeKnownBitsFromOperator (#178607)
For PR #183229
Commit: 99c463512a0458ff1a1928d670cded3b320eb990
https://github.com/llvm/llvm-project/commit/99c463512a0458ff1a1928d670cded3b320eb990
Author: Shashi Shankar <shashishankar1687 at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/lib/Debug/DebugCounter.cpp
A mlir/test/mlir-opt/debugcounter-invalid-cl-options.mlir
Log Message:
-----------
[MLIR] Do not abort on invalid --mlir-debug-counter values (#181751)
Use `cl::Option::error()` diagnostics for invalid `--mlir-debug-counter`
arguments and exit with status 1 (no stack dump).
Added `mlir/test/mlir-opt/debugcounter-invalid-cl-options.mlir`
covering:
- non-numeric value (`-1n`)
- missing `=`
- missing `-skip`/`-count` suffix
Fixes #180117
Commit: 9b708b0032745ca6f8bbd0c6d39a7ecb9fad0310
https://github.com/llvm/llvm-project/commit/9b708b0032745ca6f8bbd0c6d39a7ecb9fad0310
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv-unsupported.mlir
Log Message:
-----------
[mlir][arith-to-spirv] Fix null dereference when converting trunci/extui with tensor types (#183654)
`getScalarOrVectorConstInt` only handles `VectorType` and `IntegerType`,
returning `nullptr` for any other type (e.g., a `RankedTensorType` that
slips through after type emulation maps `tensor<Nxi16>` to
`tensor<Nxi32>` with the same destination type). The callers in
`TruncIPattern` and `ExtUIPattern` passed this null value directly to
`spirv::BitwiseAndOp::create`, causing a null-pointer dereference in
`OperandStorage`.
Similarly, the signed-extension pattern passes the result of
`getScalarOrVectorConstInt` as a shift amount to
`ShiftLeftLogicalOp::create` without a null check.
Add `if (\!mask)` / `if (\!shiftSize)` guards that return a match
failure in all three cases, converting the crash into a proper
legalization failure.
Fixes #178214
Commit: 361e2359860e332ea669f53717c9759f8b3ca7e0
https://github.com/llvm/llvm-project/commit/361e2359860e332ea669f53717c9759f8b3ca7e0
Author: Twice <twice at apache.org>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/python/mlir/dialects/ext.py
M mlir/test/python/dialects/ext.py
Log Message:
-----------
[MLIR][Python] Support op adaptor for Python-defined operations (#183528)
Previously, in #177782, we added support for dialect conversion and
generated an `OpAdaptor` subtype for every ODS-defined operation. In
this PR, we will also generate `OpAdaptor` subtypes for Python-defined
operations, so that they can be applied in dialect conversion as well.
Commit: decb5d3ff6a1351fa16c1a6850c553d416b1495e
https://github.com/llvm/llvm-project/commit/decb5d3ff6a1351fa16c1a6850c553d416b1495e
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.h
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/EHScopeStack.h
M clang/test/CIR/CodeGen/goto.cpp
M clang/test/CIR/CodeGen/label-values.c
M clang/test/CIR/CodeGen/label.c
M clang/test/CIR/CodeGen/nrvo.cpp
M clang/test/CIR/CodeGen/vla.c
Log Message:
-----------
[CIR] Remove branch through cleanup fixups (#182953)
Because we are using a structured representation of cleanups in CIR, we
don't need to handle branching through cleanups during codegen. These
branches are created during CFG flattening instead. However, we had
already committed some code that copied the classic codegen behavior for
branching through cleanups. This change deletes that unneeded code.
The most significant change here is that when we encounter a return
statement we emit the return directly in the current location.
The coroutine implementation still creates a return block in the current
lexical scope and branches to that block. Cleaning up that
representation is left as future work.
The popCleanupBlock handling still has a significant amount of logic
that is carried over from the classic codegen implementation. It is left
in place until we can be sure we won't need it.
Commit: 408209275e63765d69ad752a55b15df5f6063f0a
https://github.com/llvm/llvm-project/commit/408209275e63765d69ad752a55b15df5f6063f0a
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/test/Transforms/LoopUnrollAndJam/dependencies.ll
Log Message:
-----------
[LoopUnrollAndJam] Update test dependencies.ll (NFC) (#183509)
Recent on-going works to fix the correctness issues in DA will affect
some existing regression tests for passes that rely on it. As a result,
the original intent of several tests will be lost.
This patch updates `dependencies.ll` to avoid such issues and preserve
its intent. Specifically, this patch changes the loop bounds from
parameters to constants, which allows SCEV to infer no-wrap flags for
the addrecs. Also this patch updates other minor issues in the test,
such as adding pseudo codes and removing some `nuw` to avoid UB.
Commit: b28ad9cb96c29bb3a4fab187a64a20a70709e2da
https://github.com/llvm/llvm-project/commit/b28ad9cb96c29bb3a4fab187a64a20a70709e2da
Author: Sam James <sam at gentoo.org>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/tools/llvm-dwp/Opts.td
Log Message:
-----------
[llvm-dwp] Fix typo in --help
Commit: c1d33452468d2728005ced20be550e617f24e6dd
https://github.com/llvm/llvm-project/commit/c1d33452468d2728005ced20be550e617f24e6dd
Author: Yue Huang <30948580+AdUhTkJm at users.noreply.github.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/lib/Analysis/Presburger/PWMAFunction.cpp
Log Message:
-----------
[MLIR][Presburger][NFC] Don't add empty regions when unioning PWMA functions (#182468)
This will prevent exponential behaviour in lexicographic maximum
computation, where the `tiebreak` predicate is very likely to return
empty regions.
Commit: 46b6c9744f840981fb06504c3bf5583021064402
https://github.com/llvm/llvm-project/commit/46b6c9744f840981fb06504c3bf5583021064402
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/test/Transforms/LoopUnrollAndJam/unroll-and-jam.ll
Log Message:
-----------
[LoopUnrollAndJam] Update test unroll-and-jam.ll (NFC) (#183520)
The test `unroll-and-jam.ll` has the following issues:
- Some functions use `%i` and `%I` as variable names, which UTC fails to
distinguish, causing it to update the assertions incorrectly.
- Some tests use parameters for loop bounds, which means they will start
failing in the near future due to the ongoing changes in DA.
To address these issues, this patch updates the test as follows:
- Renames certain variables to avoid the naming conflict.
- For the tests that will be affected by the DA changes, adds variants
with constant loop bounds.
Commit: c056d7c5d6ea076b38fa937c54ab44ce2e5a95e1
https://github.com/llvm/llvm-project/commit/c056d7c5d6ea076b38fa937c54ab44ce2e5a95e1
Author: Neha <151068751+nehaGautam07 at users.noreply.github.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
A clang/test/SemaCXX/crash-invalid-operator-template.cpp
Log Message:
-----------
[Sema] Fix crash on invalid operator template-id (#181404)
Add checks in GetNameFromUnqualifiedId to handle invalid TemplateId
cases safely. This avoids a crash when handling an invalid template-id
during error recovery and allows normal error reporting to continue.
Fixes #177549
Commit: 8f9c926868d1e9a53e392f430f7cd68bd49bb997
https://github.com/llvm/llvm-project/commit/8f9c926868d1e9a53e392f430f7cd68bd49bb997
Author: theRonShark <ron.lieberman at amd.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
R llvm/test/Transforms/LoopUnroll/AMDGPU/unroll-runtime.ll
Log Message:
-----------
Revert "AMDGPU: Fix runtime unrolling when cascaded GEPs present (#14… (#183641)
…7700)"
slows down llama.cpp
This reverts commit cff4a00d3f7d91c0dd3a93eb81db66be178273d3.
Commit: 8d5b74db2d8f54da2609d18040504153c1afe5df
https://github.com/llvm/llvm-project/commit/8d5b74db2d8f54da2609d18040504153c1afe5df
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[DenseMap] Add memory barrier for sanitizers in getInlineBuckets/getLargeRep
Add a compiler memory barrier to prevent optimizations from triggering
false positives on partially poisoned buckets in (HW)ASan.
Fixes #182720.
Pull Request: https://github.com/llvm/llvm-project/pull/183457
Commit: 5929c9040fac0b9044080e50d683110104d600f4
https://github.com/llvm/llvm-project/commit/5929c9040fac0b9044080e50d683110104d600f4
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
Log Message:
-----------
[mlir][vector] Fix fold result for empty vector.mask with no results (#180345)
This PR fixes `foldEmptyMaskOp` to return `failure` when folding an
empty vector.mask whose terminatorhas no operands. Previously this case
returned success without producing any folded results, which violates
the folding contract. Fixes #177825.
Commit: b354b206d3bef08d254713c027e235c0251eebdb
https://github.com/llvm/llvm-project/commit/b354b206d3bef08d254713c027e235c0251eebdb
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/lib/Driver/SanitizerArgs.cpp
M clang/test/Driver/fsanitize-minimal-runtime.c
M compiler-rt/test/safestack/overflow.c
Log Message:
-----------
[SafeStack] Allow -fsanitize-minimal-runtime with -fsanitize=safestack (#183644)
SafeStack does not require a full sanitizer runtime, so it should be
compatible
with the minimal runtime flag.
Commit: f30dfe7de4c3c584ae470425e96bac41676ddc69
https://github.com/llvm/llvm-project/commit/f30dfe7de4c3c584ae470425e96bac41676ddc69
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/tools/mlir-tblgen/OpDocGen.cpp
Log Message:
-----------
Revert "[mlir-tblgen] Remove `namespace {}` around OpDocGroup (#182721)" (#183458)
Reverts #182721, it's not needed after #183457.
It was a work around for #182720.
This reverts commit a0f344f69d7eb5d87dd78c628a196a3a7440e792.
Commit: 77600cbd9798bfde4949d047609866ebb6a7fd25
https://github.com/llvm/llvm-project/commit/77600cbd9798bfde4949d047609866ebb6a7fd25
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
Log Message:
-----------
[MLIR][XeGPU] XeGPU Layout adds support for fractional-subgroup-size vector (#183434)
This PR enhances the layout assignment for XeGPU load/store operations
to handle vector size smaller than subgroup size.
Say for vector[4], in case of lane_data=[1], lane_layout=[4] and
inst_data=[4].
The fractional-subgroup-size vector support is required to support the
cross-subgroup reduction case. The number of participant subgroups in
reduction can be small, so it causes each subgroup needs to reduce a
small vector size, often a fraction of subgroup size.
Most layout-based subgroup distribution patterns support
fraction-subgroup-size without no change except a few: reduction,
insert/extract, constant. We don't expect ND operations (like
load_nd/store_nd/dpas) accept fractional-subgroup-size vector.
Commit: 07007b7c8d9eb4d3c4da4eb150aeae8d83c0f1f3
https://github.com/llvm/llvm-project/commit/07007b7c8d9eb4d3c4da4eb150aeae8d83c0f1f3
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-02-26 (Thu, 26 Feb 2026)
Changed paths:
M lldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm
Log Message:
-----------
[lldb] Don't add remap entries for empty segments (#183651)
There are some binaries in the shared cache with a zero-length segment,
or segments who get mapped to lldb address 0 to indicate a failure. Do
not add entries to the VirtualDataExtractor's LookupTablefor those -
they
are not readable.
rdar://171106338
Commit: 86b99eff8c4d2fc8b3391a67d2ba88b0840f6fea
https://github.com/llvm/llvm-project/commit/86b99eff8c4d2fc8b3391a67d2ba88b0840f6fea
Author: Yanzuo Liu <zwuis at outlook.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
R clang/test/SemaCXX/crash-invalid-operator-template.cpp
Log Message:
-----------
Revert "[Sema] Fix crash on invalid operator template-id (#181404)" (#183682)
Reverts llvm/llvm-project#181404
(c056d7c5d6ea076b38fa937c54ab44ce2e5a95e1) because of post-commit ci
failure.
Commit: ed8f080737dec39212cad72100670c3a21de7720
https://github.com/llvm/llvm-project/commit/ed8f080737dec39212cad72100670c3a21de7720
Author: raycppwizard <raycppwizard at foxmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/www/cxx_status.html
Log Message:
-----------
[Clang][docs] Fix proposal number typo for P1847R4 (#183671)
This PR fixes a typo in `clang/www/cxx_status.html`.
The link text for the feature "Make declaration order layout mandated"
incorrectly referred to **P1874R4**, while the actual URL
(https://wg21.link/p1847r4) and the feature name correctly point to
**P1847R4**.
This change corrects the displayed text to match the proposal number.
Commit: 32134a64b195f7804698418b6f416e761d890dea
https://github.com/llvm/llvm-project/commit/32134a64b195f7804698418b6f416e761d890dea
Author: Jacques Pienaar <jacques+gh at japienaar.info>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialectBytecode.cpp
A mlir/test/mlir-tblgen/bytecode-write.td
M mlir/tools/mlir-tblgen/BytecodeDialectGen.cpp
Log Message:
-----------
[mlirbc] Switch generator to enable write's with failures. (#182464)
Previously one had to have a matching case per entry (e.g., one could
use a printer predicate, but the assumption was one woujld never
fallback) and just always return success.
Commit: 192acd6d536cbbb57f778bd996401716ec51d439
https://github.com/llvm/llvm-project/commit/192acd6d536cbbb57f778bd996401716ec51d439
Author: Rana Pratap Reddy <109514914+ranapratap55 at users.noreply.github.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
A clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-wmma-f16.hip
Log Message:
-----------
[Clang][AMDGPU] Change __fp16 to _Float16 in GFX1250 WMMA/SWMMAC builtin definitions (#183493)
Change the type signature of `gfx1250 WMMA/SWMMAC` builtins from
`__fp16` to `_Float16` in the tablegen builtin definitions.
Commit: b0b3e3e1c7f6387eabc2ef9ff1fea311e63a4299
https://github.com/llvm/llvm-project/commit/b0b3e3e1c7f6387eabc2ef9ff1fea311e63a4299
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/ARM/active-lane-mask.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-hoist-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reg-pressure-vmla.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/bf16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/f16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/predicated-reverse-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-complex-mask.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-iv32.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-known-no-overflow.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-masked-loadstore.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-ordered-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/VPlan/PowerPC/vplan-force-tail-with-evl.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-vp-intrinsics-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/VPlan/X86/vplan-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/VPlan/conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-force-tail-with-evl.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags-interleave.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/no-fold-tail-by-masking-iv-external-uses.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/store-reduction-results-in-tail-folded-loop.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-iv-outside-user.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-optimize-vector-induction-width.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
M llvm/test/Transforms/LoopVectorize/use-scalar-epilogue-if-tp-fails.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_add_q7.ll
Log Message:
-----------
[VPlan] Don't drop NUW flag on tail folded canonical IVs (#183301)
After #183080 vscale can no longer be a non-power of 2, which means the
canonical IV can't overflow with tail folding w/ scalable vectors
anymore. Therefore we don't need to drop the NUW flag.
IVUpdateMayOverflow is left to be removed in a separate PR since it
removes further runtime checks.
Commit: a5bbedf522d4f75d4e4e5c0a9c8a92349f3b5a4b
https://github.com/llvm/llvm-project/commit/a5bbedf522d4f75d4e4e5c0a9c8a92349f3b5a4b
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions-tf.ll
Log Message:
-----------
[LV] Convert test to UTC. NFC
Commit: 92704064e585247bbdd77be24ca3e8b8080f1580
https://github.com/llvm/llvm-project/commit/92704064e585247bbdd77be24ca3e8b8080f1580
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-casts.ll
Log Message:
-----------
[VectorCombine][X86] Ensure we recognise free sign extends of vector comparison results (#183575)
Unless we're working with AVX512 mask predicate types, sign extending a
vXi1 comparison result back to the width of the comparison source types
is free.
VectorCombine::foldShuffleOfCastops - pass the original CastInst in the
getCastInstrCost calls to track the source comparison instruction.
Fixes #165813
Commit: 058705bf76af61b5f8bba3005073331cecb8733e
https://github.com/llvm/llvm-project/commit/058705bf76af61b5f8bba3005073331cecb8733e
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/lib/StaticAnalyzer/Core/ProgramState.cpp
Log Message:
-----------
[Clang][NFCI] Make program state GDM key const pointer (#183477)
This commit makes the GDM key in ProgramState a constant pointer. This
is done to better reflect the intention of the key as a unique
identifier for the data stored in the GDM, and to prevent the use of the
storage pointed to by the key as global state.
Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
Commit: 5af5bd4f9867336b2616aa84ad73368d18b945eb
https://github.com/llvm/llvm-project/commit/5af5bd4f9867336b2616aa84ad73368d18b945eb
Author: Mahesh-Attarde <mahesh.attarde at intel.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAMX.td
M llvm/lib/Target/X86/X86PreTileConfig.cpp
Log Message:
-----------
[AMX][NFC] Match pseudo name with isa (#182235)
Adds missing suffix to clear intent for isa.
we switch from `TILEMOVROWrre` to `TILEMOVROWrte` in
https://github.com/llvm/llvm-project/pull/168193 , however pseudo was
same, updating pseudo to intent right isa version, This patch makes
changes `PTILEMOVROWrre` to `PTILEMOVROWrte`, even though pseudo does
not actually have any tile register.
---------
Co-authored-by: mattarde <mattarde at intel.com>
Commit: a1f83ba1b6a7b78ffa1a02b3ededab44be08150f
https://github.com/llvm/llvm-project/commit/a1f83ba1b6a7b78ffa1a02b3ededab44be08150f
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[LV] NFCI: Move extend optimization to transformToPartialReduction. (#182860)
The reason for doing this in `transformToPartialReduction` is so that we
can create the VPExpressions directly when transforming reductions into
partial reductions (to be done in a follow-up PR).
I also intent to see if we can merge the in-loop reductions with partial
reductions, so that there will be no need for the separate
`convertToAbstractRecipes` VPlan Transform pass.
Commit: c690414f83695d2000c31bc9eafb941a1f84aae9
https://github.com/llvm/llvm-project/commit/c690414f83695d2000c31bc9eafb941a1f84aae9
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode][NFC] Refactor visitDeclRef() (#183690)
Move the `!VD` case up so we can assume `VD` to be non-null earlier and
use a local variable instead of calling `D->getType()` several times.
Commit: 16aa1900ef8fe0ac64a60d681adf4bcbaa7d864b
https://github.com/llvm/llvm-project/commit/16aa1900ef8fe0ac64a60d681adf4bcbaa7d864b
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Pointer.h
Log Message:
-----------
[clang][bytecode][NFC] Print more info in Pointer::operator<< (#183691)
So we know whether a pointer is a dummy and alive.
Commit: d43213fe801213beb23b03f9d5297e791b4e8826
https://github.com/llvm/llvm-project/commit/d43213fe801213beb23b03f9d5297e791b4e8826
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/ARM/active-lane-mask.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-hoist-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reg-pressure-vmla.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/bf16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/f16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/predicated-reverse-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-complex-mask.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-iv32.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-known-no-overflow.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-masked-loadstore.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-ordered-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/VPlan/PowerPC/vplan-force-tail-with-evl.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-vp-intrinsics-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/VPlan/X86/vplan-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/VPlan/conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-force-tail-with-evl.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags-interleave.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/no-fold-tail-by-masking-iv-external-uses.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/store-reduction-results-in-tail-folded-loop.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-iv-outside-user.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-optimize-vector-induction-width.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
M llvm/test/Transforms/LoopVectorize/use-scalar-epilogue-if-tp-fails.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_add_q7.ll
Log Message:
-----------
Revert "[VPlan] Don't drop NUW flag on tail folded canonical IVs (#183301)" (#183698)
This reverts commit b0b3e3e1c7f6387eabc2ef9ff1fea311e63a4299.
After thinking about this for a bit, I don't think this is correct.
vscale being a power-of-2 only guarantees the canonical IV increment
overflows to zero, but not overflows in general.
Commit: f71bd1c74fe8d86b007bbe683012e5b5b072091b
https://github.com/llvm/llvm-project/commit/f71bd1c74fe8d86b007bbe683012e5b5b072091b
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Record.cpp
M clang/lib/AST/ByteCode/Record.h
Log Message:
-----------
[clang][bytecode] Add `Record::hasPtrField()` (#183513)
So we can short-circuit the checking in
`EvaluationResult::collectBlock()`. This improves the compile time of
`X86Disassembler.cpp` by roughly 3.8%:
https://llvm-compile-time-tracker.com/compare_clang.php?from=d69c6a8528c60a8f8013651ff18ed4882f6e6836&to=b8b6333551d7c644e3c1b00ed19aceea09da40cc&stat=instructions%3Au
Commit: 4147cd29e1f2ecbc3bcd609b23d02ddd7fab4502
https://github.com/llvm/llvm-project/commit/4147cd29e1f2ecbc3bcd609b23d02ddd7fab4502
Author: hanbeom <kese111 at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/test/CodeGen/WebAssembly/load-ext.ll
M llvm/test/CodeGen/WebAssembly/offset-fastisel.ll
Log Message:
-----------
[WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (#182767)
FastISel currently defaults to unsigned loads for i8/i16/i32 types,
leaving any sign-extension to be handled by a separate instruction. This
patch optimizes this by folding the SExtInst into the LoadInst, directly
emitting a signed load (e.g., i32.load8_s).
When a load has a single SExtInst use, selectLoad emits a signed load
and safely removes the redundantly emitted SExtInst.
Fixed: #180783
Commit: 28cbc682a9117013bcbdeeb24f0ad4f83f94a7c3
https://github.com/llvm/llvm-project/commit/28cbc682a9117013bcbdeeb24f0ad4f83f94a7c3
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CoreEngine.h
M clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
Log Message:
-----------
[NFC][analyzer] Remove NodeBuilders: part I (#183354)
This commit simplifies some parts of the engine by replacing short-lived
`NodeBuilder`s with `CoreEngine::makeNode`.
Additionally, the three-argument overload of `CoreEngine::enqueue` is
renamed to `enqueueStmtNodes` to highlight that it just calls
`enqueueStmtNode` in a loop.
Commit: 9e95cff5155a0a8524f2181dc9545ed7902ef6c1
https://github.com/llvm/llvm-project/commit/9e95cff5155a0a8524f2181dc9545ed7902ef6c1
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
A llvm/test/CodeGen/AArch64/veclib-llvm.pow.ll
M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/armpl.ll
Log Message:
-----------
[AArch64] Add vector expansion support for ISD::FPOW when using ArmPL (#183526)
This patch is split off from PR #183319 and teaches the backend how to
lower the FPOW DAG node to the vector math library function when using
ArmPL. This is similar to what we already do for llvm.sincos/FSINCOS
today.
Commit: 7a5ba652f08b890217b1d551b6c8e686a7b5379f
https://github.com/llvm/llvm-project/commit/7a5ba652f08b890217b1d551b6c8e686a7b5379f
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/select-bitcast.ll
Log Message:
-----------
[AArch64] optimize vselect of bitcast (#180375)
Using code/ideas from the x86 backend to optimize a select on a bitcast
integer. The previous aarch64 approach was to individually extract the
bits from the mask, which is kind of terrible.
https://rust.godbolt.org/z/576sndT66
```llvm
define void @if_then_else8(ptr %out, i8 %mask, ptr %if_true, ptr %if_false) {
start:
%t = load <8 x i32>, ptr %if_true, align 4
%f = load <8 x i32>, ptr %if_false, align 4
%m = bitcast i8 %mask to <8 x i1>
%s = select <8 x i1> %m, <8 x i32> %t, <8 x i32> %f
store <8 x i32> %s, ptr %out, align 4
ret void
}
```
turned into
```asm
if_then_else8: // @if_then_else8
sub sp, sp, #16
ubfx w8, w1, #4, #1
and w11, w1, #0x1
ubfx w9, w1, #5, #1
fmov s1, w11
ubfx w10, w1, #1, #1
fmov s0, w8
ubfx w8, w1, #6, #1
ldp q5, q2, [x3]
mov v1.h[1], w10
ldp q4, q3, [x2]
mov v0.h[1], w9
ubfx w9, w1, #2, #1
mov v1.h[2], w9
ubfx w9, w1, #3, #1
mov v0.h[2], w8
ubfx w8, w1, #7, #1
mov v1.h[3], w9
mov v0.h[3], w8
ushll v1.4s, v1.4h, #0
ushll v0.4s, v0.4h, #0
shl v1.4s, v1.4s, #31
shl v0.4s, v0.4s, #31
cmlt v1.4s, v1.4s, #0
cmlt v0.4s, v0.4s, #0
bsl v1.16b, v4.16b, v5.16b
bsl v0.16b, v3.16b, v2.16b
stp q1, q0, [x0]
add sp, sp, #16
ret
```
With this PR that instead emits
```asm
if_then_else8:
adrp x8, .LCPI0_1
dup v0.4s, w1
ldr q1, [x8, :lo12:.LCPI0_1]
adrp x8, .LCPI0_0
ldr q2, [x8, :lo12:.LCPI0_0]
ldp q4, q3, [x2]
and v1.16b, v0.16b, v1.16b
and v0.16b, v0.16b, v2.16b
ldp q5, q2, [x3]
cmeq v1.4s, v1.4s, #0
cmeq v0.4s, v0.4s, #0
bsl v1.16b, v2.16b, v3.16b
bsl v0.16b, v5.16b, v4.16b
stp q0, q1, [x0]
ret
```
So substantially shorter. Instead of building the mask
element-by-element, this approach (by virtue of not splitting) instead
splats the mask value into all vector lanes, performs a bitwise and with
powers of 2, and compares with zero to construct the mask vector.
cc https://github.com/rust-lang/rust/issues/122376
cc https://github.com/llvm/llvm-project/pull/175769
Commit: 10b48e41e7d7455a68c00ac52442f994d7c51ffe
https://github.com/llvm/llvm-project/commit/10b48e41e7d7455a68c00ac52442f994d7c51ffe
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/get_active_lane_mask.ll
Log Message:
-----------
[InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (#183329)
When extracting a subvector from the result of a get_active_lane_mask, return
a constant zero vector if it can be proven that all lanes will be inactive.
For example, the result of the extract below will be a subvector where
every lane is inactive if X & Y are const, and `Y * VScale >= X`:
vector.extract(get.active.lane.mask(Start, X), Y)
Commit: 294cf1f6b49b56795757f1392d705cdb78cd1d06
https://github.com/llvm/llvm-project/commit/294cf1f6b49b56795757f1392d705cdb78cd1d06
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/test/CodeGen/X86/fnabs.ll
Log Message:
-----------
[X86] fnabs.ll - regenerate test checks and add AVX512 test coverage (#183709)
Commit: 5e1d99158e0bccc1b1de34c66f7b48a65c5a6116
https://github.com/llvm/llvm-project/commit/5e1d99158e0bccc1b1de34c66f7b48a65c5a6116
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/test/CodeGen/X86/stack-align.ll
Log Message:
-----------
[X86] stack-align.ll - regenerate test checks with no address scrubing (#183712)
Commit: d6fcf47a893475f6f3dbcace29093297b7e9f366
https://github.com/llvm/llvm-project/commit/d6fcf47a893475f6f3dbcace29093297b7e9f366
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M libcxx/include/__vector/vector.h
M libcxx/test/std/containers/sequences/vector/vector.modifiers/append_range.pass.cpp
Log Message:
-----------
[libc++] Fix vector::append_range growing before the capacity is reached (#183264)
Currently `vector::append_range` grows even when appending a number of
elements that is exactly equal to its spare capacity, which is
guaranteed by the standard to _not_ happen.
Fixes #183256
Commit: 250ebfc3068819b22706010940724822ac6a426d
https://github.com/llvm/llvm-project/commit/250ebfc3068819b22706010940724822ac6a426d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/test/CodeGen/X86/vec-copysign-avx512.ll
M llvm/test/CodeGen/X86/vec_fcopysign.ll
Log Message:
-----------
[X86] regenerate fcopysign test checks (#183710)
Fix vpternlog comments
Commit: 1afd7d40afe33c2e7256210e07390cc0903a7069
https://github.com/llvm/llvm-project/commit/1afd7d40afe33c2e7256210e07390cc0903a7069
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-gep.ll
Log Message:
-----------
[AMDGPU] Support i8/i16 GEP indices when promoting allocas to vectors (#175489)
Allow promote alloca to vector to form a vector element index from
i8/i16
GEPs when the dynamic offset is known to be element size aligned.
Example:
```llvm
%alloca = alloca <3 x float>, addrspace(5)
%idx = select i1 %idx_select, i32 0, i32 4
%p = getelementptr inbounds i8, ptr addrspace(5) %alloca, i32 %idx
```
Or:
```llvm
%alloca = alloca <3 x float>, addrspace(5)
%idx = select i1 %idx_select, i32 0, i32 2
%p = getelementptr inbounds i16, ptr addrspace(5) %alloca, i32 %idx
```
Commit: 5e30ff9e70becff834e1e0bbe22d3821630460e2
https://github.com/llvm/llvm-project/commit/5e30ff9e70becff834e1e0bbe22d3821630460e2
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M lldb/test/API/functionalities/dyld-launch-linux/TestDyldLaunchLinux.py
Log Message:
-----------
[lldb][test] Re-enable TestDyldLaunchLinux.py for Linux/Arm (#181221)
The test was disabled in c55e021d, but it now passes, with both remote
and local runs.
Commit: b9f2a489607cc8e9d7717450b1e32145cdb93ee9
https://github.com/llvm/llvm-project/commit/b9f2a489607cc8e9d7717450b1e32145cdb93ee9
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/include/llvm/Analysis/MemorySSA.h
M llvm/lib/Analysis/MemorySSA.cpp
M llvm/lib/Analysis/MemorySSAUpdater.cpp
Log Message:
-----------
[MemorySSA] Make `getBlockDefs` and `getBlockAccesses` return a non-const list (NFC)
As per discussion at https://github.com/llvm/llvm-project/pull/181709#discussion_r2847595945,
users may already get a non-const MemoryAccess pointer via
`getMemoryAccess` for a given instruction. Drop the restriction
on directly iterate over them by modifying public `getBlockDefs`/
`getBlockAccesses` APIs to return a mutable list, thus dropping the
now obsolete distinction with `getWritableBlockDefs` and
`getWritableBlockAccesses` helpers.
Commit: 49f4232a7d73062de3796dec06bb34bf6842245b
https://github.com/llvm/llvm-project/commit/49f4232a7d73062de3796dec06bb34bf6842245b
Author: idubinov <53053614+idubinov at users.noreply.github.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULaneMaskUtils.h
Log Message:
-----------
[AMDGPU] Remove unused CmpLGOp instruction (#180195)
The instruction was accidentally added, remove it.
Rename OrN2Op to OrN2Opc for consistency with other names
Commit: e7bc02d9a49fe988daa5f149f30a8b3e06cbe348
https://github.com/llvm/llvm-project/commit/e7bc02d9a49fe988daa5f149f30a8b3e06cbe348
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/trip-count-scalable-stride.ll
Log Message:
-----------
[SCEV] Always return true for isKnownToBeAPowerOfTwo for SCEVVScale (#183693)
After #183080 vscale is always a power of two, so we don't need to check
for the vscale_range attribute.
Commit: 98825908fc51f0226b38381520ba2a4f5f1f36e9
https://github.com/llvm/llvm-project/commit/98825908fc51f0226b38381520ba2a4f5f1f36e9
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/test/Dialect/Affine/canonicalize.mlir
Log Message:
-----------
[mlir][affine] Fix crash in linearize_index fold when basis is ub.poison (#183650)
`foldCstValueToCstAttrBasis` iterates the folded dynamic basis values
and erases any operand whose folded attribute is non-null (i.e., was
constant- folded). When an operand folds to `ub.PoisonAttr`, the
attribute is non-null so the operand was erased from the dynamic operand
list. However, `getConstantIntValue` on the corresponding `OpFoldResult`
in `mixedBasis` returns `std::nullopt` for poison (it is not an integer
constant), so the position was left as `ShapedType::kDynamic` in the
returned static basis.
This left the op in an inconsistent state: the static basis claimed one
more dynamic entry than actually existed. A subsequent call to
`getMixedBasis()` triggered the assertion inside `getMixedValues`.
Fix by skipping poison attributes in the erasure loop, treating them
like non-constant values. This keeps the dynamic operand and its
matching `kDynamic` entry in the static basis consistent.
Fixes #179265
Commit: c5c0fe663c7ba55982422940a489cde15f8d2497
https://github.com/llvm/llvm-project/commit/c5c0fe663c7ba55982422940a489cde15f8d2497
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Remove non-power-of-2 scalable VF comment. NFC (#183719)
No longer holds after #183080
Commit: 14f73345ff0caa0694e9033d0c805f9cfa7ff519
https://github.com/llvm/llvm-project/commit/14f73345ff0caa0694e9033d0c805f9cfa7ff519
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/lib/Analysis/DataFlow/IntegerRangeAnalysis.cpp
M mlir/test/Dialect/Arith/int-range-narrowing.mlir
Log Message:
-----------
[mlir][dataflow] Fix crash in IntegerRangeAnalysis with non-constant loop bounds (#183660)
When visiting non-control-flow arguments of a LoopLikeOpInterface op,
IntegerRangeAnalysis assumed that getLoopLowerBounds(),
getLoopUpperBounds(), and getLoopSteps() always return non-null values
when getLoopInductionVars() is non-null. This assumption is incorrect:
for example, AffineForOp returns nullopt from getLoopUpperBounds() when
the upper bound is not a constant affine expression (e.g., a dynamic
index from a tensor.dim).
Fix this by checking whether the bound optionals are engaged before
dereferencing them and falling back to the generic analysis if any bound
is unavailable.
Fixes #180312
Commit: 1a6bd39fd49868c5024db908cc194397f3415029
https://github.com/llvm/llvm-project/commit/1a6bd39fd49868c5024db908cc194397f3415029
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M flang/test/Lower/HLFIR/goto-do-body.f90
M flang/test/Lower/volatile3.f90
Log Message:
-----------
[flang] Use CHECK-DAG to check constants (NFC) (#183687)
It is part of https://github.com/llvm/llvm-project/pull/180556, as a
separate NFC PR
Commit: 4d169f38cab5071cd0e6233c1170cc02c95edff1
https://github.com/llvm/llvm-project/commit/4d169f38cab5071cd0e6233c1170cc02c95edff1
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Clarify in vscale_range that vscale is a power-of-two without the attribute (#183689)
Previously vscale_range used to add the constraint that vscale is a
power-of-two, but after #183080 it's already a power-of-two to begin
with.
This clarifies the sentence about assumptions when there is no attribute
Commit: 6b91049f44d21c5810703ccee23672875001d5ad
https://github.com/llvm/llvm-project/commit/6b91049f44d21c5810703ccee23672875001d5ad
Author: Oleksandr Tarasiuk <oleksandr.tarasiuk at outlook.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/ExprConstant.cpp
A clang/test/CodeGen/c23-constexpr-member-access.c
A clang/test/Sema/constexpr-member-access.c
Log Message:
-----------
[Clang] support C23 constexpr struct member access in constant expressions (#182770)
Fixes #178349
---
This patch resolves an issue where accessing C23 `constexpr` struct
members using the dot operator was not recognized as a constant
expression.
According to C23 spec:
> 6.6p7:
>
> An identifier that is:
> — an enumeration constant,
> — a predefined constant, or
> — declared with storage-class specifier constexpr and has an object
type,
> is a named constant, as is a postfix expression that applies the .
member access operator to a named
> constant of structure or union type, even recursively. For enumeration
and predefined constants,
> their value and type are defined in the respective clauses; for
constexpr objects, such a named
> constant is a constant expression with the type and value of the
declared object.
>
> § 6.6p13:
>
> A structure or union constant is a named constant or compound literal
constant with structure or
> union type, respectively
>
> § 6.6p15:
>
> Starting from a structure or union constant, the member-access .
operator may be used to form a
> named constant or compound literal constant as described previously in
this subclause
Commit: 3676ae43bff9159ab509654bd13c9145752a05b9
https://github.com/llvm/llvm-project/commit/3676ae43bff9159ab509654bd13c9145752a05b9
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
Log Message:
-----------
[NFC][SPIRV] Remove dead code from `SPIRVPostLegalizer.cpp` (#183585)
Both `visit` functions are unused in the file and outside of it.
Commit: d8671280d4bf4a598e0bc640a4608f7ac0089842
https://github.com/llvm/llvm-project/commit/d8671280d4bf4a598e0bc640a4608f7ac0089842
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs-apple.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-constant-known-via-scev.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/pr131359-dead-for-splice.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/X86/widened-value-used-as-scalar-and-first-lane.ll
M llvm/test/Transforms/LoopVectorize/assume.ll
M llvm/test/Transforms/LoopVectorize/cse-gep-source-element-type.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-interleave.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags-interleave.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/metadata.ll
M llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/scalable-assume.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
M llvm/test/Transforms/LoopVectorize/select-index-interleaving.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
Log Message:
-----------
[VPlan] Add nuw to unrolled canonical IVs (#183716)
After #183080, the canonical IV (not the increment!) can't overflow. So
now canonical IVs that are unrolled will have steps that don't overflow,
so we can add the nuw flag.
This allows us to tighten the VPlanVerifier isKnownMonotonic check by
restricting it to adds with nuw.
Commit: fc69531254ca9e81fd4371c68e7fd74fe4b9527a
https://github.com/llvm/llvm-project/commit/fc69531254ca9e81fd4371c68e7fd74fe4b9527a
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/ExecutionEngine/ExecutionEngine.cpp
M llvm/test/ExecutionEngine/Interpreter/test-interp-vec-insertelement.ll
Log Message:
-----------
[LLVM][ExecutionEngine] Add vector ConstantInt/FP support to getConstantValue(). (#182538)
Unify vector constant handling via calls to getAggregateElement rather
than handling each constant type separately.
Commit: e3dda81e2a802112fb9b3129ec34d1103e5ed5d6
https://github.com/llvm/llvm-project/commit/e3dda81e2a802112fb9b3129ec34d1103e5ed5d6
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M flang/include/flang/Parser/openmp-utils.h
Log Message:
-----------
[flang][OpenMP] Add `is_range<R>` trait to detect classes with begin/end, NFC (#183615)
Commit: 2f4624613d05b2982dccc99ac0a06e87e6f3efd0
https://github.com/llvm/llvm-project/commit/2f4624613d05b2982dccc99ac0a06e87e6f3efd0
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/test/Analysis/malloc-annotations.c
Log Message:
-----------
[analyzer] Fix crash in MallocChecker when a function has both ownership_returns and ownership_takes (#183583)
When a function was annotated with both `ownership_returns` and
`ownership_takes` (or `ownership_holds`), MallocChecker::evalCall would
fall into the freeing-only branch (isFreeingOwnershipAttrCall) and call
checkOwnershipAttr without first calling MallocBindRetVal. That meant no
heap symbol had been conjured for the return value, so
checkOwnershipAttr later dereferenced a null/invalid symbol and crashed.
Fix: merge the two dispatch branches so that MallocBindRetVal is always
called first whenever ownership_returns is present, regardless of
whether the function also carries ownership_takes/ownership_holds.
The crash was introduced in #106081
339282d49f5310a2837da45c0ccc19da15675554.
Released in clang-20, and crashing ever since.
Fixes #183344.
Assisted-By: claude
Commit: 8a0be0bc3772e8ed06b9a17255e0cfb25539f125
https://github.com/llvm/llvm-project/commit/8a0be0bc3772e8ed06b9a17255e0cfb25539f125
Author: bala-bhargav <penugondabalabharghav at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/gfni-xor-fold-avx512.ll
M llvm/test/CodeGen/X86/gfni-xor-fold.ll
Log Message:
-----------
[X86] Fold XOR of two vgf2p8affineqb instructions with same input (#179900)
This patch implements an optimization to fold XOR of two
`vgf2p8affineqb` instructions operating on the same input.
This optimization:
Reduces instruction count from 3 to 2
Eliminates one vgf2p8affineqb instruction
Added combineXorWithTwoGF2P8AFFINEQB function in X86ISelLowering.cpp
Uses sd_match pattern matching for consistency with existing code
Checks that both operations have single use to avoid code bloat
Verifies both operations use the same input
Handles commutative XOR patterns automatically
Commit: dc2ec04342de45b29ac7a170952776b2b3a0011f
https://github.com/llvm/llvm-project/commit/dc2ec04342de45b29ac7a170952776b2b3a0011f
Author: Nico Weber <thakis at chromium.org>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/include/lldb/Host/BUILD.gn
Log Message:
-----------
[gn] port 3490d28c8cab
Commit: 20df251af50b4cb8cad2fcdb94e723f1debaddc4
https://github.com/llvm/llvm-project/commit/20df251af50b4cb8cad2fcdb94e723f1debaddc4
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
[LLVM][Runtimes] Add 'llvm-gpu-loader' to dependency list (#183601)
Summary:
This is used to run the unit tests in libc / libc++. It must exist in
the build directory's binary path, but without this dependnecy we may
not build it before running the runtimes build. This should ensure that
it's present, and only if we have tests enabled.
Commit: bf3ab0d873bf72dd0d73cb8975e642429ab95ea1
https://github.com/llvm/llvm-project/commit/bf3ab0d873bf72dd0d73cb8975e642429ab95ea1
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
Log Message:
-----------
[AMDGPU][Scheduler] Add `GCNRegPressure`-based methods to `GCNRPTarget` (#182853)
This adds a few methods to `GCNRPTarget` that can estimate/perform RP
savings based on `GCNRegPressure` instead of a single `Register`,
opening the door to model/incorporate more complex savings made up of
multiple registers of potentially different classes. The scheduler's
rematerialization stage now uses this new API.
Although there are no test changes this is not really NFC since register
pressure savings in the rematerialization stage are now computed through
`GCNRegPressure` instead of the stage itself. If anything this makes
them more consistent with the rest of the RP-tracking infrastructure.
Commit: 9210d701cbf07dad8a08743c953e0faf4f938699
https://github.com/llvm/llvm-project/commit/9210d701cbf07dad8a08743c953e0faf4f938699
Author: Scott Linder <scott.linder at amd.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
A llvm/test/CodeGen/MIR/Generic/expected-unsigned.mir
Log Message:
-----------
[MIR] Error on signed integer in getUnsigned (#183171)
Previously we effectively took the absolute value of the APSInt, instead
diagnose the unexpected negative value.
Change-Id: I4efe961e7b29fdf1d5f97df12f8139aac12c9219
Commit: 7402312ae12d91df436486ca296119607a81edd0
https://github.com/llvm/llvm-project/commit/7402312ae12d91df436486ca296119607a81edd0
Author: idubinov <igor.dubinov at amd.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
Log Message:
-----------
[NFC][SPIRV] Fix compile warnings (#183725)
Fix compile warnings in SPIR-V
```
llvm-project/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp:2882:26: warning: enumerated and non-enumerated type in conditional expression [-Wextra]
2882 | return IsFloatTy ? SPIRV::OpGroupNonUniformFMax : IntOp;
| ~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
llvm-project/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp: In lambda function:
llvm-project/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp:2897:26: warning: enumerated and non-enumerated type in conditional expression [-Wextra]
2897 | return IsFloatTy ? SPIRV::OpGroupNonUniformFMin : IntOp;
| ~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
```
Commit: a8a6613cc4235c8cbd473927f8567b74b9030c6b
https://github.com/llvm/llvm-project/commit/a8a6613cc4235c8cbd473927f8567b74b9030c6b
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
Log Message:
-----------
[AMDGPU][Scheduler] Fix compilation fail in EXPENSIVE_CHECKS (#183745)
Bug introduced by #182853 (`Remat` is now a pointer).
Commit: 9c2a3ca4949ee2e29a155efa9c69aea801b41813
https://github.com/llvm/llvm-project/commit/9c2a3ca4949ee2e29a155efa9c69aea801b41813
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/test/Dialect/OpenACC/ops.mlir
Log Message:
-----------
[MLIR] Fix OpenACC parser crash with opaque pointers (#183521)
Fixes #181453
Fixes #181589
Commit: 7cc27e28db97a9b2fd145d35044b7dbe6c8426f2
https://github.com/llvm/llvm-project/commit/7cc27e28db97a9b2fd145d35044b7dbe6c8426f2
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/test/Dialect/Vector/vector-unroll-options.mlir
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Log Message:
-----------
[MLIR][Vector] Enhance shape_cast unrolling support in case the target shape is [1, 1, ..1] (#183436)
This PR fixes a minor issue in shape_cast unrolling: when all target
dimensions are unit-sized, it no longer removes all leading unit
dimensions.
Commit: 370273382035097069c5472378df84e10e6fa66b
https://github.com/llvm/llvm-project/commit/370273382035097069c5472378df84e10e6fa66b
Author: AbdallahRashed <63146988+AbdallahRashed at users.noreply.github.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/clmul-fixed.ll
Log Message:
-----------
[SelectionDAG] Fix CLMULR/CLMULH expansion (#183537)
For v8i8 on AArch64, `expandCLMUL` picked the zext path (ExtVT=v8i16) since ZERO_EXTEND/SRL were legal, but CLMUL on v8i16 is not, resulting in a bit-by-bit expansion (~42 insns). Prefer the bitreverse path when CLMUL is legal on VT but not ExtVT.
v8i8 CLMULR: 42 → 4 instructions.
Fixes #182780
Commit: f55b86258c913669a143e466adc43afb851bcbfb
https://github.com/llvm/llvm-project/commit/f55b86258c913669a143e466adc43afb851bcbfb
Author: RattataKing <amilywu2 at amd.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/lib/Bindings/Python/IRAttributes.cpp
M mlir/lib/Bindings/Python/IRCore.cpp
Log Message:
-----------
[mlir][Python] Drop Python <=3.9 compatibility path (#183416)
According to PR #163499, minimum Python version for mlir-py is now 3.10,
we no longer need patches for py<=3.9.
This change aligns with the Python version bump policy discussed
[here](https://discourse.llvm.org/t/rfc-adopt-regularly-scheduled-python-minimum-version-bumps/88841).
Commit: 620425a884388947ae691f3b80545e47c8687840
https://github.com/llvm/llvm-project/commit/620425a884388947ae691f3b80545e47c8687840
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/test/Dialect/Tensor/canonicalize.mlir
Log Message:
-----------
[mlir][tensor] Fix crash in tensor.from_elements fold with non-scalar element types (#183659)
The fold for tensor.from_elements attempted to always produce a
DenseElementsAttr by calling DenseElementsAttr::get(type, elements).
However, DenseElementsAttr::get only handles basic scalar element types
(integer, index, float, complex) directly. For other element types such
as vector types, it expects StringAttr (raw bytes) for each element,
which folded constants won't provide — triggering an assertion.
Fix this by guarding the fold: only attempt the DenseElementsAttr fold
when the tensor element type is integer, index, float, or complex.
Fixes #180459
Commit: bcd8819aee057f483c040743a6e8ccb2ecd7d44a
https://github.com/llvm/llvm-project/commit/bcd8819aee057f483c040743a6e8ccb2ecd7d44a
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/test/Transforms/remove-dead-values.mlir
Log Message:
-----------
[mlir][transforms] Fix crash in remove-dead-values when function has non-call users (#183655)
`processFuncOp` asserts that all symbol uses of a function are
`CallOpInterface` operations. This is violated when a function is
referenced by a non-call operation such as `spirv.EntryPoint`, which
uses the function symbol for metadata purposes without calling it.
Fix this by replacing the assertion with an early return: if any user of
the function symbol is not a `CallOpInterface`, skip the function
entirely. This is safe because the pass cannot determine the semantics
of arbitrary non-call references, so it should leave such functions
alone.
Fixes #180416
Commit: ef05d06109405fa4080f9dad762c7a5523a4b8b7
https://github.com/llvm/llvm-project/commit/ef05d06109405fa4080f9dad762c7a5523a4b8b7
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/CMakeLists.txt
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.h
A lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCoreProperties.td
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (#183553)
Implement `ProcessFreeBSDKernelCore::DoWriteMemory()` to write data on
kernel crash dump or `/dev/mem`. Due to safety reasons (e.g. writing
wrong value on `/dev/mem` can trigger kernel panic), this feature is
only enabled when `plugin.process.freebsd-kernel-core.read-only` is set
to false (true by default).
Since 85a1fe6 (#183237) was reverted as it was prematurely merged, I'm
committing changes again with corrections here.
---------
Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
Commit: d8956d7796bb2d7e5feb7945dffb2dbcf372aaa3
https://github.com/llvm/llvm-project/commit/d8956d7796bb2d7e5feb7945dffb2dbcf372aaa3
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.h
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.h
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.h
Log Message:
-----------
[SPIRV][NFCI] Use unordered data structures for SPIR-V extensions (#183567)
Review follow-up from https://github.com/llvm/llvm-project/pull/183325
No reason for these data structures to be ordered.
Minor annoyance when trying to use `DenseMap` because of the C++ code
for enums generated by TableGen, but not too bad.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: 53656d1a2fad6765e69dbdc6613d44013d7bfcbd
https://github.com/llvm/llvm-project/commit/53656d1a2fad6765e69dbdc6613d44013d7bfcbd
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/test/DebugInfo/CXX/vtable-external.cpp
M clang/test/DebugInfo/CXX/vtable-inheritance-diamond.cpp
M clang/test/DebugInfo/CXX/vtable-inheritance-multiple.cpp
M clang/test/DebugInfo/CXX/vtable-inheritance-simple-main.cpp
M clang/test/DebugInfo/CXX/vtable-inheritance-simple.cpp
M clang/test/DebugInfo/CXX/vtable-inheritance-virtual.cpp
M clang/test/DebugInfo/CXX/vtable-template-instantiation.cpp
Log Message:
-----------
[clang][DebugInfo] Rename _vtable$ to __clang_vtable (#183617)
Discussion is a follow-up from
https://github.com/llvm/llvm-project/issues/182762#issuecomment-3965207289
(where we're discussing how LLDB could make use of this symbol for
vtable detection).
`_vtable$` is not a reserved identifier in C or C++. In order for
debuggers to reliably use this symbol without accidentally reaching into
user-identifiers, this patch renames it such that it is reserved. The
naming follows the style of the recently added `__clang_trap_msg`
debug-info symbol.
Commit: 4eab75e21fdf1f180ef46f00591cc30cf72df69a
https://github.com/llvm/llvm-project/commit/4eab75e21fdf1f180ef46f00591cc30cf72df69a
Author: Akash Dutta <137309513+akadutta at users.noreply.github.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AMDGPU/zext-duplicate-shift.ll
Log Message:
-----------
[SLP][NFC] Precommit test for zext reorder with duplicate shifts (#183748)
This is a pre-commit test for
https://github.com/llvm/llvm-project/pull/183627,
Commit: 11a92a9305a79548449731e3be989a3ffaa8ae53
https://github.com/llvm/llvm-project/commit/11a92a9305a79548449731e3be989a3ffaa8ae53
Author: Amy Kwan <amy.kwan1 at ibm.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/include/llvm/MC/MCGOFFAttributes.h
M llvm/include/llvm/MC/MCSymbolGOFF.h
M llvm/lib/MC/GOFFObjectWriter.cpp
M llvm/lib/MC/MCSymbolGOFF.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.cpp
Log Message:
-----------
[SystemZ] Add indirect reference bit XATTR REFERENCE(INDIRECT) for indirect symbol handling support (#183441)
This is the first of three patches aimed to support indirect symbol
handling for the SystemZ backend. This PR introduces a `GOFF:ERAttr` to
represent indirect references, handles indirect symbols within
`setSymbolAttribute()` by setting the indirect reference bit, and also
updates the HLASM streamer to emit `XATTR REFERENCE(INDIRECT)` and
various other combinations.
Commit: ed05f7012fe93af8b2b230f7059d0162d8aed126
https://github.com/llvm/llvm-project/commit/ed05f7012fe93af8b2b230f7059d0162d8aed126
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorMultiReduction.cpp
M mlir/test/Dialect/Vector/vector-multi-reduction-flattening.mlir
Log Message:
-----------
[mlir][vector] Rename `ReduceMultiDimReductionRank` -> `FlattenMultiReduction` (NFC) (#183721)
The updated name better captures what the pattern does and matches the
coresponding `populat*` hook,
`populateVectorMultiReductionFlatteningPatterns`, that only contains
this pattern.
Commit: 2265d3240f23c1c6ff7b4d0fa2711a9ed36fdc8a
https://github.com/llvm/llvm-project/commit/2265d3240f23c1c6ff7b4d0fa2711a9ed36fdc8a
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/DebugInfo/PDB/Native/GSIStreamBuilder.cpp
Log Message:
-----------
[pdb] Fix libc++ strict-weak-ordering assertion failures from gsiRecordCmp (#183749)
Builds using libc++ hardening was hitting asserts like
libc++ Hardening assertion
!__comp(*(__first + __a), *(__first + __b)) failed:
Your comparator is not a valid strict-weak ordering
printf-debugging revealed that symbols like "?ST@@3JA" were not
comparing equal with themselves. It turns out the comparison was done
with
return S1.compare_insensitive(S2.data());
and even when &S1 == &S2, S1 and S2.data() may not refer to identical
strings, since data() may not have a null terminator where the StringRef
locally ends.
This fixes the ordering, simplifies the code, and makes it a little
faster :)
Fixes: #163755
Commit: 4b10a4c17781e389e5e67a0aa274ba00382ac149
https://github.com/llvm/llvm-project/commit/4b10a4c17781e389e5e67a0aa274ba00382ac149
Author: Jacques Pienaar <jacques+gh at japienaar.info>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/include/mlir/Tools/mlir-opt/MlirOptMain.h
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
A mlir/test/Bytecode/bytecode_producer.mlir
M mlir/test/CMakeLists.txt
M mlir/test/lit.cfg.py
Log Message:
-----------
[mlir] Enable specifying bytecode producer in mlir-opt. (#182846)
Commit: 9c53215d213189d1f62e8f6ee7ba73a089ac2269
https://github.com/llvm/llvm-project/commit/9c53215d213189d1f62e8f6ee7ba73a089ac2269
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs-apple.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vector-loop-backedge-elimination-with-evl.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-poison-ub-ops-feeding-pointer.ll
M llvm/test/Transforms/LoopVectorize/reduction-minmax-users-and-predicated.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-cond-poison.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
Log Message:
-----------
[VPlan] Remove manual region removal when simplifying for VF and UF. (#181252)
Replace manual region dissolution code in
simplifyBranchConditionForVFAndUF with using general
removeBranchOnConst. simplifyBranchConditionForVFAndUF now just creates
a (BranchOnCond true) or updates BranchOnTwoConds.
The loop then gets automatically removed by running removeBranchOnConst.
This removes a bunch of special logic to handle header phi replacements
and CFG updates. With the new code, there's no restriction on what kind
of header phi recipes the loop contains.
Note that VPEVLBasedIVRecipe needs to be marked as readnone. This is
technically unrelated, but I could not find an independent test that
would be impacted.
The code to deal with epilogue resume values now needs updating, because
we may simplify a reduction directly to the start value.
PR: https://github.com/llvm/llvm-project/pull/181252
Commit: 975dba28633d2f3746a8a370741b17024b0f5f9b
https://github.com/llvm/llvm-project/commit/975dba28633d2f3746a8a370741b17024b0f5f9b
Author: yonghong-song <yhs at fb.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/test/CodeGen/distributed-thin-lto/cfi-devirt.ll
M clang/test/CodeGen/distributed-thin-lto/cfi.ll
M clang/test/CodeGen/thinlto-funcattr-prop.ll
M lld/test/ELF/lto/comdat-nodeduplicate.ll
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/IR/ModuleSummaryIndexYAML.h
M llvm/include/llvm/LTO/LTO.h
M llvm/include/llvm/Transforms/IPO/WholeProgramDevirt.h
M llvm/include/llvm/Transforms/Utils/FunctionImportUtils.h
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/ModuleSummaryIndex.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/Utils/FunctionImportUtils.cpp
M llvm/test/Assembler/thinlto-memprof-summary.ll
M llvm/test/Assembler/thinlto-multiple-summaries-for-guid.ll
M llvm/test/Assembler/thinlto-summary-visibility.ll
M llvm/test/Assembler/thinlto-summary.ll
M llvm/test/Assembler/thinlto-vtable-summary.ll
M llvm/test/Bitcode/thinlto-alias.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-profile-summary.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-relbf.ll
M llvm/test/Bitcode/thinlto-function-summary-refgraph.ll
M llvm/test/Bitcode/thinlto-index-disassembled-by-llvm-dis.ll
M llvm/test/Bitcode/thinlto-type-tests.ll
M llvm/test/Bitcode/thinlto-type-vcalls.ll
A llvm/test/ThinLTO/X86/Inputs/reduce-promotion-same-file-local-name.ll
M llvm/test/ThinLTO/X86/funcattrs-prop-maythrow.ll
M llvm/test/ThinLTO/X86/funcimport_alwaysinline.ll
M llvm/test/ThinLTO/X86/import_callee_declaration.ll
M llvm/test/ThinLTO/X86/load-store-caching.ll
A llvm/test/ThinLTO/X86/reduce-promotion-devirt.ll
A llvm/test/ThinLTO/X86/reduce-promotion-same-file-local-name.ll
A llvm/test/ThinLTO/X86/reduce-promotion-same-local-name.ll
A llvm/test/ThinLTO/X86/reduce-promotion.ll
M llvm/test/Transforms/LowerTypeTests/import-unsat.ll
M llvm/test/Transforms/WholeProgramDevirt/Inputs/import-indir.yaml
M llvm/test/Transforms/WholeProgramDevirt/import-indir.ll
Log Message:
-----------
[ThinLTO] Reduce the number of renaming due to promotions (#178587)
Currently for thin-lto, the imported static global values (functions,
variables, etc) will be promoted/renamed from e.g., foo() to
foo.llvm.<hash>(). Such a renaming caused difficulties in live patching
since function name is changed ([1]).
It is possible that some global value names have to be promoted to avoid
name collision and linker failure. But in practice, majority of name
promotions can be avoided.
In [2], the suggestion is that thin-lto pre-link decides whether
a particular global value needs name promotion or not. If yes, later on
in thinBackend() the name will be promoted.
I compiled a particular linux kernel version (latest bpf-next tree)
and found 1216 global values with suffix .llvm.<hash>. With this patch,
the number of promoted functions is 2, 98% reduction from the
original kernel build.
If some native objects are not participating with LTO, name promotions
have to be done to avoid potential linker issues. So the current
implementation cannot be on by default. But in certain cases, e.g., linux kernel
build, people can enable lld flag --lto-whole-program-visibility to reduce the
number of functions like foo.llvm.<hash>().
For ThinLTOCodeGenerator.cpp which is used by llvm-lto tool and a
few other rare cases, reducing the number of renaming due to promotion,
is not implemented as lld flag '-lto-whole-program-visibility' is not supported
in ThinLTOCodeGenerator.cpp for now. In summary, this pull request
only supports llvm-lto2 style workflow.
[1] https://lpc.events/event/19/contributions/2212
[2] https://discourse.llvm.org/t/rfc-avoid-functions-like-foo-llvm-for-kernel-live-patch/89400
Commit: 729602e81009460a67dae3b8d1d8466b3c83211d
https://github.com/llvm/llvm-project/commit/729602e81009460a67dae3b8d1d8466b3c83211d
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.h
M llvm/lib/Target/SPIRV/SPIRVAPI.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.h
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.h
Log Message:
-----------
Revert "[SPIRV][NFCI] Use unordered data structures for SPIR-V extensions" (#183774)
Reverts llvm/llvm-project#183567
UBSan failure.
Commit: a703d91091ec6f61bc044413a2799349b2214a0d
https://github.com/llvm/llvm-project/commit/a703d91091ec6f61bc044413a2799349b2214a0d
Author: John Harrison <harjohn at google.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/cancel/TestDAP_cancel.py
A lldb/test/API/tools/lldb-dap/cancel/busy_loop.py
Log Message:
-----------
[lldb-dap] Improve test performance for 'cancel' request. (#183632)
Update the test to more cleanly handle making a 'blocking' call using a
custom command instead of python `time.sleep`, which we cannot easily
interrupt.
This should improve the overall performance of the tests, locally they
took around 30s and now finish in around 6s.
Commit: d1da7f6ee5d7ee8729ade96209d8b19bdef69d52
https://github.com/llvm/llvm-project/commit/d1da7f6ee5d7ee8729ade96209d8b19bdef69d52
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
A clang/test/ClangScanDeps/modules-symlink-dir-from-module-incremental.c
Log Message:
-----------
[clang-scan-deps] Add test for symlink-aliased module map PCM reuse across incremental scans (#183328)
Add a test that verifies symlink aliases to a module map directory
produce the same PCM across incremental scans.
Commit: 0617623858054a3533b3ed44d355dee7f9102c1c
https://github.com/llvm/llvm-project/commit/0617623858054a3533b3ed44d355dee7f9102c1c
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
Log Message:
-----------
[SPIR-V] Fix non-deterministic compiler output for debug type pointer (#182773)
Fixes: https://github.com/llvm/llvm-project/issues/123791
Commit: de4a1a77e1476e9105a6143a8d3b8760b61ff95f
https://github.com/llvm/llvm-project/commit/de4a1a77e1476e9105a6143a8d3b8760b61ff95f
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/include/clang/DependencyScanning/InProcessModuleCache.h
M clang/include/clang/Frontend/FrontendOptions.h
M clang/include/clang/Options/Options.td
M clang/lib/DependencyScanning/InProcessModuleCache.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Lex/Pragma.cpp
A clang/test/ClangScanDeps/modules-cycle-deadlock.c
A clang/test/Modules/implicit-cycle-deadlock.c
M llvm/include/llvm/Support/AdvisoryLock.h
M llvm/include/llvm/Support/LockFileManager.h
M llvm/lib/Support/LockFileManager.cpp
M llvm/lib/Support/VirtualOutputBackends.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
Log Message:
-----------
[clang][modules] Prevent deadlock in module cache (#182722)
When there's a dependency cycle between modules, the dependency scanner
may encounter a deadlock. This was caused by not respecting the lock
timeout. But even with the timeout implemented, leaving
`unsafeMaybeUnlock()` unimplemented means trying to take a lock after a
timeout would still fail and prevent making progress. This PR implements
this API in a way to avoid UB on `std::mutex` (when it's unlocked by
someone else than the owner). Lastly, this PR makes sure that
`unsafeUnlock()` ends the wait of existing threads, so that they don't
need to hit the full timeout amount.
This PR also implements `-fimplicit-modules-lock-timeout=<seconds>` that
allows tweaking the default 90-second lock timeout, and adds `#pragma
clang __debug sleep` that makes it easier to achieve desired execution
ordering.
rdar://170738600
Commit: 35f8ca8b76c63b47a6c5a7aa041310f42947a838
https://github.com/llvm/llvm-project/commit/35f8ca8b76c63b47a6c5a7aa041310f42947a838
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M flang/test/Lower/Intrinsics/abs.f90
M flang/test/Lower/Intrinsics/achar.f90
M flang/test/Lower/Intrinsics/acospi.f90
M flang/test/Lower/Intrinsics/adjustl.f90
M flang/test/Lower/intentout-deallocate.f90
Log Message:
-----------
[flang][NFC] Converted five tests from old lowering to new lowering (part 22) (#183681)
Tests converted from test/Lower: intentout-deallocate.f90
Tests converted from test/Lower/Intrinsics: abs.f90, achar.f90,
acospi.f90, adjustl.f90
Commit: bad56dbb23853e1413d8df13a26b6a1dc02907a1
https://github.com/llvm/llvm-project/commit/bad56dbb23853e1413d8df13a26b6a1dc02907a1
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M libsycl/docs/index.rst
A libsycl/include/sycl/__impl/context.hpp
M libsycl/include/sycl/__impl/device.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/CMakeLists.txt
A libsycl/src/context.cpp
A libsycl/src/detail/context_impl.cpp
A libsycl/src/detail/context_impl.hpp
M libsycl/src/detail/device_impl.cpp
M libsycl/src/detail/device_impl.hpp
M libsycl/src/detail/offload/offload_utils.hpp
M libsycl/src/detail/platform_impl.cpp
M libsycl/src/detail/platform_impl.hpp
M libsycl/src/device.cpp
M libsycl/src/platform.cpp
Log Message:
-----------
[libsycl] Add sycl::context stub (#182826)
Part 1 of changes needed for USM alloc/dealloc impl.
This is part of the SYCL support upstreaming effort. The relevant RFCs
can be found here:
https://discourse.llvm.org/t/rfc-add-full-support-for-the-sycl-programming-model/74080
https://discourse.llvm.org/t/rfc-sycl-runtime-upstreaming/74479
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 7f0a343a8ec48b41e3866cdbabfc8740985a44f3
https://github.com/llvm/llvm-project/commit/7f0a343a8ec48b41e3866cdbabfc8740985a44f3
Author: Yangyu Chen <cyy at cyyself.name>
Date: 2026-02-28 (Sat, 28 Feb 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M flang/include/flang/Frontend/CodeGenOptions.h
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
A flang/test/Driver/grecord-command-line.f90
A flang/test/Transforms/debug-dwarf-debug-flags.fir
Log Message:
-----------
[flang] Implement -grecord-command-line for Flang (#181686)
Enable Flang to match Clang behavior for command-line recording in DWARF
producer strings when using -grecord-command-line.
Signed-off-by: Yangyu Chen <cyy at cyyself.name>
Commit: dc26edd9b6602857b67f35c8d2f6fe4ed13c8137
https://github.com/llvm/llvm-project/commit/dc26edd9b6602857b67f35c8d2f6fe4ed13c8137
Author: Amit Kumar Pandey <pandey.kumaramit2023 at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/test/Driver/amdgpu-openmp-sanitize-options.c
M clang/test/Driver/hip-sanitize-options.hip
M clang/test/Driver/rocm-device-libs.cl
Log Message:
-----------
[ASan] Enable Internalization for 'asanrtl.bc' in Driver (#182825)
Just like other bitcode libs such as ockl.bc ocml.bc, link asanrtl.bc
with '-mlink-builtin-bitcode' in the driver when GPU ASan is enabled.
Commit: 5661ed60e37d63d5deff6f4c943b928b6b957049
https://github.com/llvm/llvm-project/commit/5661ed60e37d63d5deff6f4c943b928b6b957049
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][vector] Fix crashes in MaskOp::fold and CanonializeEmptyMaskOp (#183781)
Two related crashes were fixed in vector.mask handling:
1. MaskOp::fold() crashes with a null pointer dereference when the mask
is all-true and the mask body has no maskable operation (only a
vector.yield). getMaskableOp() returns nullptr in this case, and the
fold was calling nullptr->dropAllUses(). Fixed by returning failure()
when there is no maskable op, deferring to the canonicalizer.
2. CanonializeEmptyMaskOp creates an invalid arith.select when the mask
type is a vector (e.g., vector<1xi1>) but the result type is a scalar
(e.g., i32). arith.select with a vector condition requires the value
types to be vectors of the same shape. Fixed by bailing out when any
result type doesn't match the mask shape.
Regression tests are added for both cases.
Fixes #177833
Commit: 55d62abadbc5e6bf129378fe9d0b87f124aefee5
https://github.com/llvm/llvm-project/commit/55d62abadbc5e6bf129378fe9d0b87f124aefee5
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M lldb/docs/dil-expr-lang.ebnf
M lldb/include/lldb/ValueObject/DILAST.h
M lldb/include/lldb/ValueObject/DILEval.h
M lldb/include/lldb/ValueObject/DILParser.h
M lldb/source/ValueObject/DILAST.cpp
M lldb/source/ValueObject/DILEval.cpp
M lldb/source/ValueObject/DILParser.cpp
M lldb/test/API/commands/frame/var-dil/expr/Arithmetic/TestFrameVarDILArithmetic.py
M lldb/test/API/commands/frame/var-dil/expr/Arithmetic/main.cpp
Log Message:
-----------
[lldb] Add arithmetic binary addition to DIL (#177208)
Commit: d2c545266b8b0216b51c7b87e3ca0980c47c5342
https://github.com/llvm/llvm-project/commit/d2c545266b8b0216b51c7b87e3ca0980c47c5342
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/unittests/Target/RISCV/RISCVSelectionDAGTest.cpp
Log Message:
-----------
[RISCV] Use getCopyFromReg in unit test to match comment. NFC (#183199)
Using physical register 0, aka NoRegister, also just looked suspicious.
Commit: cd50a3074bdfcd2d9ba45d99b0129b1c1d68d58d
https://github.com/llvm/llvm-project/commit/cd50a3074bdfcd2d9ba45d99b0129b1c1d68d58d
Author: yonghong-song <yhs at fb.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/test/CodeGen/distributed-thin-lto/cfi-devirt.ll
M clang/test/CodeGen/distributed-thin-lto/cfi.ll
M clang/test/CodeGen/thinlto-funcattr-prop.ll
M lld/test/ELF/lto/comdat-nodeduplicate.ll
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/IR/ModuleSummaryIndexYAML.h
M llvm/include/llvm/LTO/LTO.h
M llvm/include/llvm/Transforms/IPO/WholeProgramDevirt.h
M llvm/include/llvm/Transforms/Utils/FunctionImportUtils.h
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/ModuleSummaryIndex.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/Utils/FunctionImportUtils.cpp
M llvm/test/Assembler/thinlto-memprof-summary.ll
M llvm/test/Assembler/thinlto-multiple-summaries-for-guid.ll
M llvm/test/Assembler/thinlto-summary-visibility.ll
M llvm/test/Assembler/thinlto-summary.ll
M llvm/test/Assembler/thinlto-vtable-summary.ll
M llvm/test/Bitcode/thinlto-alias.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-profile-summary.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-relbf.ll
M llvm/test/Bitcode/thinlto-function-summary-refgraph.ll
M llvm/test/Bitcode/thinlto-index-disassembled-by-llvm-dis.ll
M llvm/test/Bitcode/thinlto-type-tests.ll
M llvm/test/Bitcode/thinlto-type-vcalls.ll
R llvm/test/ThinLTO/X86/Inputs/reduce-promotion-same-file-local-name.ll
M llvm/test/ThinLTO/X86/funcattrs-prop-maythrow.ll
M llvm/test/ThinLTO/X86/funcimport_alwaysinline.ll
M llvm/test/ThinLTO/X86/import_callee_declaration.ll
M llvm/test/ThinLTO/X86/load-store-caching.ll
R llvm/test/ThinLTO/X86/reduce-promotion-devirt.ll
R llvm/test/ThinLTO/X86/reduce-promotion-same-file-local-name.ll
R llvm/test/ThinLTO/X86/reduce-promotion-same-local-name.ll
R llvm/test/ThinLTO/X86/reduce-promotion.ll
M llvm/test/Transforms/LowerTypeTests/import-unsat.ll
M llvm/test/Transforms/WholeProgramDevirt/Inputs/import-indir.yaml
M llvm/test/Transforms/WholeProgramDevirt/import-indir.ll
Log Message:
-----------
Revert "[ThinLTO] Reduce the number of renaming due to promotions (#178587)" (#183782)
There is a conflict with existing code. See
https://github.com/llvm/llvm-project/pull/178587
Revert and resolve the conflict and then will submit later.
Commit: 179c25eaefe651f815f4a32328d8e51dfcda1d34
https://github.com/llvm/llvm-project/commit/179c25eaefe651f815f4a32328d8e51dfcda1d34
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
M llvm/test/CodeGen/AArch64/stack-tagging.ll
M llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
Log Message:
-----------
[MTE] [HWASan] support more complicated lifetimes
This allows us to support more lifetimes, and also gets rid of
the quadratic call to isPotentiallyReachable.
Reviewers: pcc, usama54321
Reviewed By: pcc
Pull Request: https://github.com/llvm/llvm-project/pull/182425
Commit: 1269a74db9ffde19f8230edeac0ddbcafc3a4d66
https://github.com/llvm/llvm-project/commit/1269a74db9ffde19f8230edeac0ddbcafc3a4d66
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Enable `parse_headers` for llvm/BUILD.bazel (#183680)
Instead of excluding the whole package, push any existing parse_headers
failures to individual targets. In some cases we can avoid suppressing a
target by adding a few missing deps.
Commit: c3b3f4195219e368bd18fc1a1bab18d0dae45d8f
https://github.com/llvm/llvm-project/commit/c3b3f4195219e368bd18fc1a1bab18d0dae45d8f
Author: Amy Kwan <amy.kwan1 at ibm.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/include/llvm/MC/MCSectionGOFF.h
M llvm/include/llvm/MC/MCSymbolGOFF.h
M llvm/lib/MC/GOFFObjectWriter.cpp
M llvm/lib/MC/MCAsmInfoGOFF.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.h
Log Message:
-----------
[SystemZ] Emit external aliases required for indirect symbol handling support (#183442)
This is the second of three patches aimed to support indirect symbol
handling for the SystemZ backend. An external name is added for both MC
sections and symbols and makes the relevant printers and writers utilize
the external name when present. Furthermore, the ALIAS HLASM instruction
is emitted after every XATTR instruction.
Depends on https://github.com/llvm/llvm-project/pull/183441.
Commit: 0d95dda1eeee690bb7c3ec425ebfed5a8a80517b
https://github.com/llvm/llvm-project/commit/0d95dda1eeee690bb7c3ec425ebfed5a8a80517b
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/test/Transforms/LoopDeletion/invalidate-scev-after-hoisting.ll
A llvm/test/Transforms/LoopSimplify/profile-info.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[LoopInfo] Preserve profile information in makeLoopInvariant (#174171)
When hoisting loop invariant instructions, we can preserve profile
metadata because it depends solely on the condition (which is loop
invariant) rather than where we are in the control flow graph.
Commit: 67a51ea34d25b4be246791af5df858167dce901c
https://github.com/llvm/llvm-project/commit/67a51ea34d25b4be246791af5df858167dce901c
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
A llvm/test/CodeGen/PowerPC/bit_floor.ll
Log Message:
-----------
[NFC][POWER] add Pre-Commit test case for Inefficient std::bit_floor(x) (#183363)
add a pre-commit test case for Inefficient asm of std::bit_floor(x) for
powerpc.
Commit: c49460bae76c873725ae77d5f9b4d6239b7c40a7
https://github.com/llvm/llvm-project/commit/c49460bae76c873725ae77d5f9b4d6239b7c40a7
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M flang-rt/include/flang-rt/runtime/lock.h
M flang-rt/include/flang-rt/runtime/tools.h
M flang-rt/lib/runtime/CMakeLists.txt
M flang-rt/lib/runtime/descriptor.cpp
M flang-rt/lib/runtime/environment.cpp
M flang-rt/lib/runtime/stop.cpp
M flang-rt/lib/runtime/terminator.cpp
M flang/include/flang/Common/api-attrs.h
A offload/test/offloading/fortran/target-descriptor-ops.f90
Log Message:
-----------
[flang-rt] Enable more runtime functions for the GPU target (#183649)
Summary:
This enables primarily `stop.cpp` and `descriptor.cpp`. Requires a
little bit of wrangling to get it to compile. Unlike the CUDA build,
this build uses an in-tree libc++ configured for the GPU. This is
configured without thread support, environment, or filesystem, and it is
not POSIX at all. So, no mutexes, pthreads, or get/setenv.
I tested stop, but i don't know if it's actually legal to exit from
OpenMP offloading.
Commit: 6301243a5d69146b4b76ac4233b0b2f6a3c31616
https://github.com/llvm/llvm-project/commit/6301243a5d69146b4b76ac4233b0b2f6a3c31616
Author: Kshitij Paranjape <kshitijvparanjape at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/lib/Analysis/ValueTracking.cpp
A llvm/test/Transforms/AggressiveInstCombine/X86/pr175590.ll
Log Message:
-----------
Reapply "[ValueTracking] Propagate sign information out of loop" (#182512)
LLVM converts sqrt libcall to intrinsic call if the argument is within
the range(greater than or equal to 0.0). In this case the compiler is
not able to deduce the non-negativity on its own. Extended ValueTracking
to understand such loops.
Have created new ABI's for matching Intrinsics with three operands
(those existed only for 2 operands)
`matchSimpleTernaryIntrinsicRecurrence` and `matchThreeInputRecurrence`.
Fixes https://github.com/llvm/llvm-project/issues/174813
Commit: ca0e7d31d05bea7b6d29a420e9b1c756a1845e95
https://github.com/llvm/llvm-project/commit/ca0e7d31d05bea7b6d29a420e9b1c756a1845e95
Author: kwyatt-ext <kwyatt.external at hpe.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M flang-rt/lib/runtime/character.cpp
M flang-rt/unittests/Runtime/CharacterTest.cpp
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Character.h
M flang/include/flang/Runtime/character.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Character.cpp
A flang/test/Lower/Intrinsics/tokenize.f90
A flang/test/Semantics/tokenize-errors.f90
Log Message:
-----------
[flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (#181030)
This implements the TOKENIZE intrinsic per the Fortran 2023 Standard.
TOKENIZE is a more complicated addition to the flang intrinsics, as it
is the first subroutine that has multiple unique footprints. Intrinsic
functions have already addressed this challenge, however subroutines and
functions are processed slightly differently and the function code was
not a good 1:1 solution for the subroutines. To solve this the function
code was used as an example to create error buffering within the
intrinsics Process and select the most appropriate error message for a
given subroutine footprint.
A simple FIR compile test was added to show the proper compilation of
each case. A thorough negative path test has also been added, ensuring
that all possible errors are reported as expected.
Testing prior to commit:
= check-flang ==========================================
```
Testing Time: 139.51s
Total Discovered Tests: 4153
Unsupported : 77 (1.85%)
Passed : 4065 (97.88%)
Expectedly Failed: 11 (0.26%)
FLANG Container Test completed 2 minutes (160 s).
Total Time: 2 minutes (160 s)
Completed : Wed Feb 11 04:05:50 PM CST 2026
```
= check-flang-rt ==========================================
```
Testing Time: 1.55s
Total Discovered Tests: 258
Passed: 258 (100.00%)
FLANG Container Test completed 0 minutes (55 s).
Total Time: 0 minutes (56 s)
Completed : Wed Feb 11 04:08:32 PM CST 2026
```
= llvm-test-suite ==========================================
```
Testing Time: 1886.64s
Total Discovered Tests: 6926
Passed: 6926 (100.00%)
CCE SLES Container debug compile completed 31 minutes (1895 s).
CCE SLES Container debug install completed in 0 minutes (0 s).
Total Time: 31 minutes (1895 s)
Completed : Wed Feb 11 05:46:52 PM CST 2026
```
Additionally, (FYI) an executable test has been written and will be
added to the llvm-test-suite under a separate PR.
---------
Co-authored-by: Kevin Wyatt <kwyatt at hpe.com>
Commit: 48eb40bee0248423fd6175ecd192ab15a71fb27b
https://github.com/llvm/llvm-project/commit/48eb40bee0248423fd6175ecd192ab15a71fb27b
Author: John Harrison <harjohn at google.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/test/API/tools/lldb-dap/variables/children/TestDAP_variables_children.py
M lldb/tools/lldb-dap/Handler/EvaluateRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ScopesRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SetVariableRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/VariablesRequestHandler.cpp
M lldb/tools/lldb-dap/Protocol/DAPTypes.h
M lldb/tools/lldb-dap/SBAPIExtras.h
M lldb/tools/lldb-dap/Variables.cpp
M lldb/tools/lldb-dap/Variables.h
M lldb/unittests/DAP/DAPTypesTest.cpp
M lldb/unittests/DAP/Inputs/linux-x86_64.core.yaml
M lldb/unittests/DAP/Inputs/linux-x86_64.out.yaml
M lldb/unittests/DAP/VariablesTest.cpp
Log Message:
-----------
[lldb-dap] Adjust VariableReferenceStorage lifetime management. (#183176)
Adjusting `VariableReferenceStorage` to only need to track permanent vs
temporary storage by making `VariableStore` the common base class.
Moved the subclasses of `VariableStore` into the Variables.cpp file,
since they're no long referenced externally.
Expanding on the tests by adding an updated core dump with variables in
the argument scope we can use to validate variable storage.
Commit: 852c6ef5aca60c17c2b0972d44b4664759884927
https://github.com/llvm/llvm-project/commit/852c6ef5aca60c17c2b0972d44b4664759884927
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/include/mlir/Conversion/LLVMCommon/Pattern.h
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
M mlir/lib/Conversion/LLVMCommon/Pattern.cpp
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
Log Message:
-----------
[mlir][LLVM] Let decomposeValue/composeValue handle aggregates (#183405)
This commit updates the LLVM::decomposeValue and LLVM::composeValue
methods to handle aggregate types - LLVM arrays and structs, and to have
different behaviors on dealing with types like pointers that can't be
bitcast to fixed-size integers. This allows the "any type" on
gpu.subgroup_broadcast to be more comprehensive - you can broadcast a
memref to a subgroup by decomposing it, for example.
(This branched off of getting an LLM to implement
ValueuboundsOpInterface on subgroup_broadcast, having it add handling
for the dimensions of shaped types, and realizing that there's no
fundamental reason you can't broadcast a memref or the like)
---------
Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
Commit: c05e323be7caaadff6fdd09a2336be60e3041af1
https://github.com/llvm/llvm-project/commit/c05e323be7caaadff6fdd09a2336be60e3041af1
Author: Demetrius Kanios <demetrius at kanios.net>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp
Log Message:
-----------
[WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (#181755)
Rather than mapping out full "reachability" between blocks in a region
to find loops and using `LoopBlocks` to find the bodies of said loops,
use SCCs (strongly-connected components) to provide this information.
This brings in LLVM's generic `SCCIterator` (which uses Tarjan's
algorithm) as the implementation for sorting the basic blocks of the CFG
into their SCCs.
This PR greatly reduces the compile-time footprint of the pass, making
memory use and time taken negliable where it might have previously
caused stalls and OOM before (e.g. #47793,
usagi-coffee/tree-sitter-abl#114)
------
Supersedes #179722
Fixes #47793
Fixes #165041 (probably)
Thanks to @jkbz64 for the initial investigations (w/ AI; see #179722)
into why this pass was slow and memory consuming and showing that SCCs
were the key.
Also thanks to the Cheerp compiler project for bringing `SCCIterator` to
light in this context ([blog
post](https://cheerp.io/blog/control-flow#fix-the-irreducible-control-flow),
[implementation](https://github.com/leaningtech/cheerp-compiler/blob/master/llvm/lib/CheerpUtils/FixIrreducibleControlFlow.cpp)).
Commit: dce48f2653cb81883a24ff5babdcac5bcb91725c
https://github.com/llvm/llvm-project/commit/dce48f2653cb81883a24ff5babdcac5bcb91725c
Author: Amit Kumar Pandey <pandey.kumaramit2023 at gmail.com>
Date: 2026-02-28 (Sat, 28 Feb 2026)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/test/Driver/amdgpu-openmp-sanitize-options.c
Log Message:
-----------
[OpenMP] Enable internalization of 'ockl.bc' for OpenMP (#183685)
Fix linking of 'ockl.bc' for OpenMP by switching from
`-mlink-bitcode-file` to `-mlink-builtin-bitcode`
Commit: 403fd7679f80c97c13e992b32a6762bfc92641cb
https://github.com/llvm/llvm-project/commit/403fd7679f80c97c13e992b32a6762bfc92641cb
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/SlotIndexes.cpp
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/remat-sop.mir
M llvm/test/CodeGen/X86/statepoint-live-in.ll
M llvm/test/CodeGen/X86/statepoint-regs.ll
Log Message:
-----------
[SlotIndexes] Further pack indices to improve spill placement time (#182640)
This patch makes it so that renumbering indices when inserting
instructions into the SlotIndexes analysis renumbers the entire list if
the list is otherwise densely packed. This fixes a case we saw on
AArch64 with a lot of spills where every single spill instruction
insertion required a renumbering of most of the instructions in a large
function, making the operation approximately quadratic.
This is not NFC as heuristics depend on the SlotIndex numbers, although
this should mostly be a wash as LRs should be extended ~equally.
Commit: 282a2b77c358c4509f8fcc97c2f0f2b8cdc9b915
https://github.com/llvm/llvm-project/commit/282a2b77c358c4509f8fcc97c2f0f2b8cdc9b915
Author: Aviral Goel <aviralg at users.noreply.github.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/include/clang/Analysis/Scalable/Serialization/JSONFormat.h
M clang/include/clang/Analysis/Scalable/Serialization/SerializationFormat.h
M clang/lib/Analysis/Scalable/CMakeLists.txt
R clang/lib/Analysis/Scalable/Serialization/JSONFormat.cpp
A clang/lib/Analysis/Scalable/Serialization/JSONFormat/JSONFormatImpl.cpp
A clang/lib/Analysis/Scalable/Serialization/JSONFormat/JSONFormatImpl.h
A clang/lib/Analysis/Scalable/Serialization/JSONFormat/TUSummary.cpp
A clang/lib/Analysis/Scalable/Serialization/JSONFormat/TUSummaryEncoding.cpp
M clang/unittests/Analysis/Scalable/Registries/MockSerializationFormat.cpp
M clang/unittests/Analysis/Scalable/Registries/MockSerializationFormat.h
M clang/unittests/Analysis/Scalable/Serialization/JSONFormatTest/TUSummaryTest.cpp
Log Message:
-----------
[clang][ssaf] Add `JSONFormat` support for `TUSummaryEncoding`
This PR adds `JSONFormat` support for reading and writing
`TUSummaryEncoding`. The implementation exploits similarities in the
structures of `TUSummary` and `TUSummaryEncoding` by reusing existing
`JSONFormat` support for `TUSummary`. Duplication of tests has been
avoided by parameterizing the test fixture that runs all relevant
read/write tests against `TUSummary`, for `TUSummaryEncoding`. This
ensures that the two serialization paths remain in lockstep.
Commit: cf28f23f10133f0419768ce8284fe05fa079f93c
https://github.com/llvm/llvm-project/commit/cf28f23f10133f0419768ce8284fe05fa079f93c
Author: Akash Dutta <137309513+akadutta at users.noreply.github.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AMDGPU/zext-duplicate-shift.ll
Log Message:
-----------
[SLP] Reject duplicate shift amounts in matchesShlZExt reorder path (#183627)
In the reordered RHS path of matchesShlZExt, the code never checked that
each shift amount (0, Stride, 2×Stride, …) appears at most once. When
the same shift appeared in multiple lanes, it still filled Order,
producing a non-permutation (e.g. Order = [0,0,0,1]). That led to bad
shuffle masks and miscompilation (e.g. shuffles with poison).
The patch adds an explicit duplicate check: before setting Order[Idx] =
Pos, it ensures Pos has not been seen before, using a SmallBitVector
SeenPositions(VF). If a position is seen twice, the function returns
false and the optimization is not applied.
Commit: 25d709e72c976f8f7420a342e7916b46b6c23e28
https://github.com/llvm/llvm-project/commit/25d709e72c976f8f7420a342e7916b46b6c23e28
Author: Amy Kwan <amy.kwan1 at ibm.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/test/CodeGen/SystemZ/zos-ada-relocations.ll
Log Message:
-----------
[SystemZ] Emit external aliases for indirect function descriptors in the ADA section (#183443)
This is the last of the three patches aimed to support indirect symbol
handling for the SystemZ backend.
An external alias is emitted for indirect function descriptors within
the ADA section, rather than a temporary alias, while also setting all
of the appropriate symbol attributes that are needed for the HLASM
streamer to emit the correct XATTR and ALIAS instructions for the
indirect symbols.
Moreover, this patch updates the
`CodeGen/SystemZ/zos-ada-relocations.ll` test as the ADA section is
currently the only user of indirect symbols on z/OS.
Depends on https://github.com/llvm/llvm-project/pull/183442.
Commit: ee6f5f386f95753d869045acbe54a6b3ec38dde9
https://github.com/llvm/llvm-project/commit/ee6f5f386f95753d869045acbe54a6b3ec38dde9
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
A llvm/test/Transforms/InstCombine/alloca-poison-size.ll
Log Message:
-----------
[InstCombine] Replace alloca with undef size with poison instead of null (#182919)
InstCombine previously replaced an alloca instruction with a null
pointer when the array size operand was undef. While this replacement
may be legal, it still caused invalid IR in cases where the original
alloca was used by `@llvm.lifetime` intrinsics.
The spec requires that the pointer operand of `@llvm.lifetime.*` must be
either:
- a pointer to an alloca instruction, or
- a poison value.
Replacing the pointer with null violated this requirement and triggered
verifier errors.
These new changes update InstCombine so that in this scenario the alloca
is replaced with poison instead of null.
Commit: 8ce2b9cbc2bcde50189e74650cf994e8f549f58d
https://github.com/llvm/llvm-project/commit/8ce2b9cbc2bcde50189e74650cf994e8f549f58d
Author: Tommy Chiang <ototot at google.com>
Date: 2026-02-28 (Sat, 28 Feb 2026)
Changed paths:
M clang/include/clang/AST/DeclCXX.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/test/CodeGenCXX/mangle-lambdas.cpp
Log Message:
-----------
[Clang][ItaniumMangle] Fix recursive mangling for lambda init-captures (#182667)
[Clang][ItaniumMangle] Fix recursive mangling for lambda init-captures
Mangle computation for lambda signatures can recurse when a call
operator type
references an init-capture (for example via decltype(init-capture)). In
these
cases, mangling can re-enter the init-capture declaration and cycle back
through
operator() mangling.
Make lambda context publication explicit and independent from numbering
state,
then use that context uniformly during mangling:
* Publish lambda `ContextDecl` in `Sema::handleLambdaNumbering()` before
numbering, so dependent type mangling can resolve the lambda context
without
recursing through the call operator.
* Introduce `CXXRecordDecl::setLambdaContextDecl()` and remove
`ContextDecl`
from `CXXRecordDecl::LambdaNumbering`.
* Update `ASTImporter` to import/set lambda context separately from
numbering.
* In Itanium mangling, derive init-capture handling from context
computation:
- map local-lambda init-captures to the enclosing local context in
`getEffectiveDeclContext()`
- support init-capture variables in `getClosurePrefix()`
- keep `mangleLocalName()` generic and rely on the computed context
Add mangling regression coverage in mangle-lambdas.cpp, including:
* local init-captures used through decltype
* non-local variable-template init-captures in decltype
* non-local static inline member init-captures in decltype
* Fixes https://github.com/llvm/llvm-project/issues/63271
* Fixes https://github.com/llvm/llvm-project/issues/86240
* Fixes https://github.com/llvm/llvm-project/issues/139089
Commit: df5bee6afc79eb393c6dcbaad1b2ab3665f3a853
https://github.com/llvm/llvm-project/commit/df5bee6afc79eb393c6dcbaad1b2ab3665f3a853
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/test/CIR/Transforms/flatten-cleanup-scope-nyi.cir
A clang/test/CIR/Transforms/flatten-try-op.cir
Log Message:
-----------
[CIR] Implement TryOp flattening (#183591)
This updates the FlattenCFG pass to add flattening for cir::TryOp in
cases where the TryOp contains catch or unwind handlers.
Substantial amounts of this PR were created using agentic AI tools, but
I have carefully reviewed the code, comments, and tests and made changes
as needed. I've left intermediate commits in the initial PR if you'd
like to see the progression.
Commit: 3d889c464eb19f3c9d5dd00caab37be19a81efa3
https://github.com/llvm/llvm-project/commit/3d889c464eb19f3c9d5dd00caab37be19a81efa3
Author: Ben Dunkin <108952361+bdunkin at users.noreply.github.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix SpaceBeforeParens with explicit template instantiations (#183183)
This fixes explicit template instantiated functions not having spaces
added/removed based on the value of `SpaceBeforeParens`.
Attribution Note - I have been authorized to contribute this change on
behalf of my company: ArenaNet LLC
Commit: 4f05592bc01ca0252e904a59f8e321e254cd0473
https://github.com/llvm/llvm-project/commit/4f05592bc01ca0252e904a59f8e321e254cd0473
Author: Srividya Sundaram <srividya.sundaram at intel.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
A clang/test/Driver/sycl-offload-jit-xarch.cpp
Log Message:
-----------
[Driver][SYCL] Add tests for -Xarch_<arch> option forwarding to SYCL JIT compilation. (#178025)
This change adds test coverage to verify that options passed via
`-Xarch_<arch> <option>` are correctly forwarded to SYCL JIT
compilations.
Commit: d1f4f9453c78619af334dfe59f812fe54f70459b
https://github.com/llvm/llvm-project/commit/d1f4f9453c78619af334dfe59f812fe54f70459b
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M flang/include/flang/Semantics/expression.h
M flang/lib/Semantics/expression.cpp
A flang/test/Semantics/bug2295.f90
Log Message:
-----------
[flang] Fix explanatory messages for generic resolution error (#183565)
The compiler emits messages to explain why each of a generic procedure's
specific procedures is not a match for a given set of actual arguments.
In the case of specific procedures with PASS arguments in derived type
procedure bindings or procedure components, these explanatory messages
are often bogus, because the re-analysis didn't adjust the actual
arguments to account for the PASS argument. Fix.
Commit: 6f612cfbd921f48f28d228689cabd8722ad47368
https://github.com/llvm/llvm-project/commit/6f612cfbd921f48f28d228689cabd8722ad47368
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/lib/Sema/SemaOverload.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx11.cpp
Log Message:
-----------
[clang] stop error recovery in SFINAE for narrowing in converted constant expressions (#183614)
A narrowing conversion in a converted constant expression should produce
an invalid expression so that [temp.deduct.general]p7 is satisfied, by
stopping substitution at this point.
This regression was introduced in #164703, and this will be backported
to clang-22, so no release notes.
Fixes #167709
Commit: ca04a70891fbc1ce97f3abd3479848c3731fe8c8
https://github.com/llvm/llvm-project/commit/ca04a70891fbc1ce97f3abd3479848c3731fe8c8
Author: Mohamed Emad <hulxxv at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/bf16sub.h
A libc/shared/math/bf16subf.h
A libc/shared/math/bf16subf128.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/bf16sub.h
A libc/src/__support/math/bf16subf.h
A libc/src/__support/math/bf16subf128.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/bf16sub.cpp
M libc/src/math/generic/bf16subf.cpp
M libc/src/math/generic/bf16subf128.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor bf16sub family to header-only (#182115)
Refactors the bf16sub math family to be header-only.
Closes https://github.com/llvm/llvm-project/issues/182114
Target Functions:
- bf16sub
- bf16subf
- bf16subf128
Commit: fc153b1e254fcdab9fa6c2c477f7ba3dec187454
https://github.com/llvm/llvm-project/commit/fc153b1e254fcdab9fa6c2c477f7ba3dec187454
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/test/Analysis/Checkers/WebKit/nodelete-annotation.cpp
Log Message:
-----------
[alpha.webkit.NoDeleteChecker] Check if each field is trivially destructive (#183711)
This PR fixes the bug that NoDeleteChecker and trivial function analysis
were not detecting any non-trivial destruction of class member
variables.
When evaluating a delete expression or calling a destructor directly for
triviality, check if each field in the class and its base classes is
trivially destructive.
Commit: fff2f0ba78fe0a7073dd971c0db48d6d0f17975c
https://github.com/llvm/llvm-project/commit/fff2f0ba78fe0a7073dd971c0db48d6d0f17975c
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/test/CodeGen/AMDGPU/wmma-coexecution-valu-hazards.mir
Log Message:
-----------
[AMDGPU] Handle GFX1250 hazards between WMMA and VOPD (#183573)
Hazards between WMMA and VALU were handled in #149865 but this only
worked for regular VOP* VALU encodings, not for VOPD.
Fixes: #183546
Commit: 02ebe23163c03a2a4f470f9b3073b35046926a99
https://github.com/llvm/llvm-project/commit/02ebe23163c03a2a4f470f9b3073b35046926a99
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/docs/AddressSanitizer.rst
Log Message:
-----------
[ASan] Document limitations of container overflow checks (#183590)
Mention that partially poisoning stack objects can
lead to false positives and negatives.
See #182720.
---------
Co-authored-by: Saleem Abdulrasool <compnerd at compnerd.org>
Commit: 2c98566900f09aa329c41abd164766e7a7e76968
https://github.com/llvm/llvm-project/commit/2c98566900f09aa329c41abd164766e7a7e76968
Author: Daniel Thornburgh <mysterymath at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/HLSL.cpp
R clang/test/Driver/HLSL/fre-errors.hlsl
M clang/test/Driver/HLSL/metal-converter.hlsl
Log Message:
-----------
Revert "[Metal][HLSL] Add support for dumping reflection" (#183818)
Reverts llvm/llvm-project#181258
`env PATH=""` will prevent finding any binary run by `env`.
Commit: 977702ccc40dbaad64a453e75239914f3dff0761
https://github.com/llvm/llvm-project/commit/977702ccc40dbaad64a453e75239914f3dff0761
Author: Serosh <janmejayapanda400 at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaExpr.cpp
A clang/test/SemaCXX/gh183505.cpp
Log Message:
-----------
[clang] fix crash when casting a parenthesized unresolved template-id (#183633)
this fix uses ignoreparens() in checkplaceholderexpr to prevent a crash
when an unresolved template-id is wrapped in parentheses. fixes #183505
Commit: d0afaeadecd06849b3d9cf107cf23c583b5a7736
https://github.com/llvm/llvm-project/commit/d0afaeadecd06849b3d9cf107cf23c583b5a7736
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/include/clang/Lex/HeaderSearch.h
M clang/include/clang/Lex/HeaderSearchOptions.h
M clang/include/clang/Lex/ModuleMap.h
M clang/include/clang/Options/Options.td
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Serialization/ASTReader.cpp
A clang/test/Modules/lazy-by-header-extern.c
A clang/test/Modules/lazy-by-header-lookup.c
A clang/test/Modules/lazy-by-header-nested.c
A clang/test/Modules/lazy-by-header-private.c
A clang/test/Modules/lazy-by-header-umbrella-dir.c
A clang/test/Modules/lazy-by-header-umbrella-header.c
M clang/test/Modules/lazy-by-name-lookup.c
Log Message:
-----------
[clang][modulemap] Lazily load module maps by header name (#181916)
After header search has found a header it looks for module maps that
cover that header. This patch uses the parsed representation of module
maps to do this search instead of relying on FileEntryRef lookups after
stating headers in module maps.
This behavior is currently gated behind the
`-fmodules-lazy-load-module-maps` `-cc1` flag.
Commit: 1073951bdb8e12552a5d9b9fffa806ffe187e475
https://github.com/llvm/llvm-project/commit/1073951bdb8e12552a5d9b9fffa806ffe187e475
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/test/Dialect/ControlFlow/canonicalize.mlir
Log Message:
-----------
[mlir][cf] Fix crash in simplifyBrToBlockWithSinglePred when branch operand is a block argument of its successor (#183797)
When `simplifyBrToBlockWithSinglePred` merges a block into its sole
predecessor, it calls `inlineBlockBefore` which replaces each block
argument with the corresponding value passed by the branch. If one of
those values is itself a block argument of the successor block, the call
`replaceAllUsesWith(arg, arg)` is a no-op. Any uses of that argument
outside the block (e.g. in a downstream block) are therefore not
replaced, and when the successor block is erased the argument is
destroyed while those uses are still live, triggering the assertion
`use_empty() && "Cannot destroy a value that still has uses\!"` in
`IRObjectWithUseList::~IRObjectWithUseList`.
Guard against this by returning early when any branch operand is a block
argument owned by the destination block.
Fixes #126213
Commit: a71ded3861aafd88cc8abd672a24901d73e5624a
https://github.com/llvm/llvm-project/commit/a71ded3861aafd88cc8abd672a24901d73e5624a
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M bolt/unittests/Core/MCPlusBuilder.cpp
Log Message:
-----------
[BOLT][AArch64] Add a unittest for compare-and-branch inversion. (#181177)
Checks that isReversibleBranch() returns false
- when the immediate value is 63 and needs +1 adjustment
- when the immediate value is 0 and needs -1 adjustment
Checks that reverseBranchCondition() adjusts
- the opcode
- the immediate operand if necessary (+/-1)
- the register operands if necessary (swap)
Commit: c2f66f2a940e8c7edca2264ae207db5711432070
https://github.com/llvm/llvm-project/commit/c2f66f2a940e8c7edca2264ae207db5711432070
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp
Log Message:
-----------
[WebAseembly] Fix -Wunused-variable in #181755
This variable ends up being unused in builds without assertions. Mark it
[[maybe_unused]] per the coding standards.
Commit: 63ab568070c757ad9c4a4ba8c34f12f69e3ccc6d
https://github.com/llvm/llvm-project/commit/63ab568070c757ad9c4a4ba8c34f12f69e3ccc6d
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
Log Message:
-----------
[NFC] [HWASan] add test for duplicated lifetime end
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/183807
Commit: 94bd8b9444be293dbed98b0c3c2adaeac796e31f
https://github.com/llvm/llvm-project/commit/94bd8b9444be293dbed98b0c3c2adaeac796e31f
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/stack-tagging.ll
Log Message:
-----------
[NFC] [MTE] add test for duplicated lifetime end
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/183808
Commit: d7e037c8383e66e5c07897f144f6d8ef47258682
https://github.com/llvm/llvm-project/commit/d7e037c8383e66e5c07897f144f6d8ef47258682
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs-apple.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vector-loop-backedge-elimination-with-evl.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-poison-ub-ops-feeding-pointer.ll
M llvm/test/Transforms/LoopVectorize/reduction-minmax-users-and-predicated.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-cond-poison.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
Log Message:
-----------
Revert "[VPlan] Remove manual region removal when simplifying for VF and UF. (#181252)"
This reverts commit 9c53215d213189d1f62e8f6ee7ba73a089ac2269.
Appears to cause crashes with ordered reductions, revert while I
investigate
Commit: cdd4313183184e0741cce3b425779fcce16cc39b
https://github.com/llvm/llvm-project/commit/cdd4313183184e0741cce3b425779fcce16cc39b
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/include/mlir/Conversion/LLVMCommon/Pattern.h
M mlir/lib/Conversion/LLVMCommon/Pattern.cpp
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
Log Message:
-----------
[mlir][LLVM] Let decomposeValue/composeVale pad out larger types (#183825)
Currently, as pointed out in the reviews for #183405, decomposeValues
and composeValues should be able to emit zexts and truncations for cases
like i48 and vector<3xi16> becoming i32s but currently that's an assert.
This commit fixes that limitation.
Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 8f268e63e484106f25e2a5740c8a38b587218387
https://github.com/llvm/llvm-project/commit/8f268e63e484106f25e2a5740c8a38b587218387
Author: Hansang Bae <hansang.bae at intel.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/include/L0Program.h
Log Message:
-----------
[Offload] Remove unused data type (#183840)
Commit: 73d655a598d7743a2d415c4c85110c591414a08b
https://github.com/llvm/llvm-project/commit/73d655a598d7743a2d415c4c85110c591414a08b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
A llvm/test/Transforms/LoopVectorize/predicated-early-exits-interleave.ll
Log Message:
-----------
[VPlan] Support unrolling/cloning masked VPInstructions.
Account for masked VPInstruction when verifying the operands in the
constructor. Fixes a crash when trying to unroll VPlans for predicated
early exits.
Commit: 7ad2c6db54a0e77249f2edb3c589ccf4c930d455
https://github.com/llvm/llvm-project/commit/7ad2c6db54a0e77249f2edb3c589ccf4c930d455
Author: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOpsInterfaces.td
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Dialect/Arith/canonicalize.mlir
M mlir/test/Dialect/Arith/ops.mlir
M mlir/test/Transforms/canonicalize.mlir
Log Message:
-----------
[mlir][arith] Add `exact` to `index_cast{,ui}` (#183395)
The `exact` flag with the following semantics
> If the `exact` attribute is present, it is assumed that the index type
width
> is such that the conversion does not lose information. When this
assumption
> is violated, the result is poison.
can be added to index_cast and index_castui operations. This unlocks
the following lowerings:
* index_cast (signed) exact -> trunc nsw
* index_castui (unsigned) exact -> trunc nuw
* index_castui nneg exact -> trunc nuw nsw
Changes:
* Adds ArithExactFlagInterface.
* Updates Arith_IntBinaryOpWithExactFlag to use ArithExactFlagInterface
* Update IndexCastOp and IndexCastUIOp to declare
`ArithExactFlagInterface`
* Update canonicalization patterns
* Update roundtrip, lowering, and canonicalization tests.
Commit: abbba22f45665b25b01693fc7a41712660b3c124
https://github.com/llvm/llvm-project/commit/abbba22f45665b25b01693fc7a41712660b3c124
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M lldb/examples/python/formatter_bytecode.py
M lldb/test/Shell/ScriptInterpreter/Python/bytecode.test
Log Message:
-----------
[lldb] Add synthetic support to formatter_bytecode.py (#183804)
Updates formatter_bytecode.py to support compilation and disassembly for
synthetic formatters, in other words support for multiple functions
(signatures).
This includes a number of other changes:
* String parsing and encoding have bugs fixed
* CLI args are updated, primarily to support an output file
* Added uleb encoding/decoding support
This work is a prelude the ongoing work of a Python to formatter
bytecode compiler. The python compiler to emit assembly, and this module
(formatter_bytecode) will compile it into binary bytecode.
Commit: c5588becb8dd0c9dd0e81bd29bb39d098f8df572
https://github.com/llvm/llvm-project/commit/c5588becb8dd0c9dd0e81bd29bb39d098f8df572
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M lldb/test/API/lang/cpp/gmodules/alignment/TestPchAlignment.py
M lldb/test/API/lang/cpp/gmodules/basic/TestWithModuleDebugging.py
M lldb/test/API/macosx/add-dsym/TestAddDsymDownload.py
M lldb/test/API/macosx/add-dsym/TestAddDsymMidExecutionCommand.py
Log Message:
-----------
[lldb] Add skip shared build to more API tests
Fixing test failures on my local desktop with incremental
building.
Commit: 0a9b5d52188f96b29cacbfee3bac8e1438035b32
https://github.com/llvm/llvm-project/commit/0a9b5d52188f96b29cacbfee3bac8e1438035b32
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M libcxx/include/__algorithm/find.h
M libcxx/include/__algorithm/find_if.h
M libcxx/include/__algorithm/find_if_not.h
M libcxx/include/__algorithm/ranges_find_if.h
M libcxx/include/__algorithm/ranges_find_if_not.h
M libcxx/include/__algorithm/ranges_remove_if.h
Log Message:
-----------
[libc++] Forward find* algorithms to find_if (#179938)
This propagates any optimizations to the whole family of `find`
functions.
Commit: e35fc30cb8f52a1d5a011649c47760845b5d14c0
https://github.com/llvm/llvm-project/commit/e35fc30cb8f52a1d5a011649c47760845b5d14c0
Author: Kaitlin Peng <kaitlinpeng at microsoft.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
Log Message:
-----------
Fix `BuiltinTypeMethodBuilder` uninitialized pointer (#183814)
>From [this
comment](https://github.com/llvm/llvm-project/pull/176058/changes/BASE..50c5be4bdf19a8a80b7e6e9d3ae46e11ff20a6e0#r2856661750)
on PR #176058, static analysis was flagging `TemplateParams` as not
initialized on all paths. This change fixes it by initializing to
`nullptr` at declaration.
Commit: 788625757ea4a7de562461dfea9b7a59b050ec91
https://github.com/llvm/llvm-project/commit/788625757ea4a7de562461dfea9b7a59b050ec91
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
Log Message:
-----------
[NFC] Fix use-after-free: track TargetLibraryAnalysis in BasicAAResult invalidation (#183852)
`BasicAAResult` holds a reference to `TargetLibraryInfo` but its
`invalidate()` function did not check `TargetLibraryAnalysis`. When the
pass manager destroyed and re-created `TLI` (e.g. during `CGSCC`
invalidation or `FAM.clear()`), `BasicAAResult` survived with a dangling
`TLI` reference.
This was exposed by #157495 which added `aliasErrno()`, the first code
path that dereferences `TLI` from `BasicAAResult` during the `CGSCC`
pipeline, causing a AV when compiling Rust's core library on Arm64
Windows.
This change adds `TargetLibraryAnalysis` to the invalidation check so
`BasicAAResult` is properly invalidated when its `TLI` reference becomes
stale.
Commit: 329c52c1004f2d0f487577f73387c8dd8b47fd9a
https://github.com/llvm/llvm-project/commit/329c52c1004f2d0f487577f73387c8dd8b47fd9a
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M lldb/include/lldb/Host/HostInfoBase.h
M lldb/include/lldb/Host/aix/HostInfoAIX.h
M lldb/include/lldb/Host/linux/HostInfoLinux.h
M lldb/include/lldb/Host/windows/HostInfoWindows.h
M lldb/include/lldb/Initialization/SystemInitializerCommon.h
M lldb/source/API/SystemInitializerFull.cpp
M lldb/source/Host/aix/HostInfoAIX.cpp
M lldb/source/Host/common/HostInfoBase.cpp
M lldb/source/Host/linux/HostInfoLinux.cpp
M lldb/source/Host/windows/HostInfoWindows.cpp
M lldb/source/Initialization/SystemInitializerCommon.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/tools/lldb-mcp/lldb-mcp.cpp
M lldb/tools/lldb-server/SystemInitializerLLGS.h
M lldb/tools/lldb-test/SystemInitializerTest.cpp
Log Message:
-----------
[lldb] Change the way the shlib directory helper is set (#183637)
This PR changes the way we set the shlib directory helper. Instead of
setting it while initializing the Host plugin, we register it when
initializing the Python plugin. The motivation is that the current
approach is incompatible with the dynamically linked script
interpreters, as they will not have been loaded at the time the Host
plugin is initialized.
The downside of the new approach is that we set the helper after having
initialized the Host plugin, which theoretically introduces a small
window where someone could query the helper before it has been set.
Fortunately the window is pretty small and limited to when we're
initializing plugins, but it's less "pure" than what we had previously.
That said, I think it balances out with removing the plugin include.
Commit: 07891ab5901cb25ac47afa99ead9eafea4d1cf2c
https://github.com/llvm/llvm-project/commit/07891ab5901cb25ac47afa99ead9eafea4d1cf2c
Author: Eric Christopher <echristo at gmail.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
[cmake] Disable -Wdangling-pointer on GCC 12+ (#183593)
GCC 12 started warning on the RAII DAGUpdateListener pattern in
SelectionDAG.h (storing `this` in the constructor). It's a false
positive -- suppress it the same way we handle -Wno-dangling-reference
(GCC 13+) and -Wno-stringop-overread (GCC 11+).
Commit: c78f37fdebd852f567e6380382a8eda8a28f382f
https://github.com/llvm/llvm-project/commit/c78f37fdebd852f567e6380382a8eda8a28f382f
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/test/CIR/CodeGen/cleanup.cpp
M clang/test/CIR/CodeGen/coro-task.cpp
M clang/test/CIR/CodeGen/defaultarg.cpp
M clang/test/CIR/CodeGen/dtors.cpp
M clang/test/CIR/CodeGen/lambda-static-invoker.cpp
M clang/test/CIR/CodeGen/stmt-expr.cpp
M clang/test/CIR/CodeGen/struct.cpp
Log Message:
-----------
[CIR] Fix dominance problems with values defined in cleanup scopes (#183810)
We currently encounter dominance verification errors when a value is
defined inside a cleanup scope but used outside the scope. This occurs
when forceCleanup() is used to exit a cleanup scope while a variable is
holding a value that was created in the scope body. Classic codegen
solved this problem by passing a list of values to spill and reload to
forceCleanup(). This change implements that same solution for CIR.
I have also aligned the ScalarExprEmitter::VisitExprWithCleanups
implementation with that of classic codegen, eliminating an extra
lexical scope. This causes temporary allocas to be created at the next
higher existing lexical scope, but I think that's OK since they would be
hoisted there anyway by a later pass.
Commit: dc520a5f493aac270315304be10b9b8bc5119dfe
https://github.com/llvm/llvm-project/commit/dc520a5f493aac270315304be10b9b8bc5119dfe
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/GPU/IR/ValueBoundsOpInterfaceImpl.cpp
M mlir/test/Dialect/GPU/value-bounds-op-interface-impl.mlir
Log Message:
-----------
[mlir][GPU] Add ValueBoundsOphinterface to gpu.subgroup_broadcast (#183848)
This commit adds an ValueBoundsOpInterface to gpu.subgroup_broadcast,
matching its integer range interface implementation, so that affine
analysis can peek through subgroup broadcast ops.
Commit: 136ba6e208b2b670e999ce77c2b4c85771a0bdf2
https://github.com/llvm/llvm-project/commit/136ba6e208b2b670e999ce77c2b4c85771a0bdf2
Author: Ankit Aggarwal <aankit at qti.qualcomm.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M clang/lib/Basic/Targets/Hexagon.cpp
M clang/lib/Basic/Targets/Hexagon.h
M clang/test/Preprocessor/hexagon-predefines.c
Log Message:
-----------
[Hexagon] Define __HVX_IEEE_FP__ when -mhvx-ieee-fp is enabled (#183829)
Add a __HVX_IEEE_FP__ define when the compiler is invoked with
-mhvx-ieee-fp flag
Commit: e3c045415ae52167e197d4a6ed4ad5a04e49423a
https://github.com/llvm/llvm-project/commit/e3c045415ae52167e197d4a6ed4ad5a04e49423a
Author: Johannes de Fine Licht <johannes.definelicht at nextsilicon.com>
Date: 2026-02-28 (Sat, 28 Feb 2026)
Changed paths:
M clang/cmake/modules/AddClang.cmake
M llvm/cmake/modules/AddLLVM.cmake
M mlir/cmake/modules/AddMLIR.cmake
Log Message:
-----------
[CMake] Propagate dependencies to OBJECT libraries in `add_llvm_library` (#183541)
Previously, transitively inherited calls to
`target_include_directories(foo SYSTEM ...)` were being squashed into a
flat list of includes, effectively stripping off `-isystem` and
unintentionally forwarding warnings from such dependencies.
To correctly propagate `SYSTEM` dependencies, use
`target_link_libraries` to forward the parent target's link dependencies
to the OBJECT library (similar to the `_static` flow below). Unlike a
flat `target_include_directories`, this lets CMake resolve transitive
SYSTEM include directories through the proper dependency chain.
Note that `target_link_libraries` on an OBJECT library propagates all
usage requirements, not just includes. This also brings in transitive
`INTERFACE_COMPILE_DEFINITIONS`, `INTERFACE_COMPILE_OPTIONS`, and
`INTERFACE_COMPILE_FEATURES`. This is arguably more correct, as the
OBJECT library compiles the same sources and should see the same flags.
The existing `target_include_directories` call is retained for include
directories set directly on the target (not through link dependencies).
CMake deduplicates include directories that appear through both paths.
Compile definitions and options may technically appear twice (once via
the OBJECT library, once via the consuming target), but duplicate `-D`
and flag entries should be harmless in practice.
Also fix `clang_target_link_libraries` and `mlir_target_link_libraries`
to forward the link type (PUBLIC/PRIVATE/INTERFACE) to `obj.*` targets.
Previously the type keyword was silently dropped, resulting in
plain-signature `target_link_libraries` calls. This is now required
because the new keyword-signature call in `llvm_add_library` would
otherwise conflict (CMake requires all calls on a target to use the same
signature).
Commit: fd9421cccd0bc11b312485542cfc7e88b4d3c7b5
https://github.com/llvm/llvm-project/commit/fd9421cccd0bc11b312485542cfc7e88b4d3c7b5
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-02-28 (Sat, 28 Feb 2026)
Changed paths:
M lldb/examples/python/formatter_bytecode.py
Log Message:
-----------
[lldb] Fix sys.path manipulation failure in formatter_bytecode.py (#183868)
Fix bug in #183804.
Commit: 12e1075b6495a448fd985bfad1c35382aa0e0e42
https://github.com/llvm/llvm-project/commit/12e1075b6495a448fd985bfad1c35382aa0e0e42
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/bv-root-part-of-graph.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-node-with-non-schedulable-parent.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-vectorize-gathered-def-after-use.ll
M llvm/test/Transforms/SLPVectorizer/extract-many-users-buildvector.ll
Log Message:
-----------
[SLP]Fix operand reordering when estimating profitability of operands
Need to swap operand for a single instruction, not for the the same lane
of the first and second instruction in the list
Commit: c1f47d1cdf705cd359e014af6d772110edeb7053
https://github.com/llvm/llvm-project/commit/c1f47d1cdf705cd359e014af6d772110edeb7053
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-02-27 (Fri, 27 Feb 2026)
Changed paths:
M .github/workflows/libcxx-run-benchmarks.yml
M bolt/test/merge-fdata-bat-no-lbr.test
M bolt/test/merge-fdata-mixed-bat-no-lbr.test
M bolt/test/merge-fdata-mixed-mode.test
M bolt/test/merge-fdata-no-lbr-mode.test
A bolt/test/merge-fdata-skip-truncated.test
M bolt/tools/merge-fdata/merge-fdata.cpp
M bolt/unittests/Core/MCPlusBuilder.cpp
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/assets/clang-doc-mustache.css
M clang-tools-extra/clang-doc/assets/function-template.mustache
M clang-tools-extra/clang-tidy/bugprone/FoldInitTypeCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/fold-init-type.rst
M clang-tools-extra/test/clang-doc/json/class-requires.cpp
M clang-tools-extra/test/clang-doc/json/class-specialization.cpp
M clang-tools-extra/test/clang-doc/json/class-template.cpp
M clang-tools-extra/test/clang-doc/json/class.cpp
M clang-tools-extra/test/clang-doc/json/concept.cpp
M clang-tools-extra/test/clang-doc/json/function-requires.cpp
M clang-tools-extra/test/clang-doc/json/method-template.cpp
M clang-tools-extra/test/clang-doc/json/namespace.cpp
M clang-tools-extra/test/clang-doc/templates.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/fold-init-type.cpp
M clang-tools-extra/unittests/clang-doc/JSONGeneratorTest.cpp
M clang/cmake/modules/AddClang.cmake
M clang/docs/AddressSanitizer.rst
M clang/docs/ClangIRCleanupAndEHDesign.md
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTDumperUtils.h
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/Analysis/Scalable/Model/BuildNamespace.h
M clang/include/clang/Analysis/Scalable/Model/EntityLinkage.h
M clang/include/clang/Analysis/Scalable/Serialization/JSONFormat.h
M clang/include/clang/Analysis/Scalable/Serialization/SerializationFormat.h
M clang/include/clang/Analysis/Scalable/Support/FormatProviders.h
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OffloadArch.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/DependencyScanning/InProcessModuleCache.h
M clang/include/clang/Driver/Job.h
A clang/include/clang/Driver/ModulesDriver.h
M clang/include/clang/Frontend/FrontendOptions.h
M clang/include/clang/Lex/HeaderSearch.h
M clang/include/clang/Lex/HeaderSearchOptions.h
M clang/include/clang/Lex/ModuleMap.h
M clang/include/clang/Options/Options.td
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CoreEngine.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/lib/AST/ASTDumper.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Record.cpp
M clang/lib/AST/ByteCode/Record.h
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/InferAlloc.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Analysis/CFG.cpp
M clang/lib/Analysis/Scalable/CMakeLists.txt
M clang/lib/Analysis/Scalable/EntityLinker/EntityLinker.cpp
M clang/lib/Analysis/Scalable/Model/BuildNamespace.cpp
M clang/lib/Analysis/Scalable/Model/EntityLinkage.cpp
A clang/lib/Analysis/Scalable/ModelStringConversions.h
R clang/lib/Analysis/Scalable/Serialization/JSONFormat.cpp
A clang/lib/Analysis/Scalable/Serialization/JSONFormat/JSONFormatImpl.cpp
A clang/lib/Analysis/Scalable/Serialization/JSONFormat/JSONFormatImpl.h
A clang/lib/Analysis/Scalable/Serialization/JSONFormat/TUSummary.cpp
A clang/lib/Analysis/Scalable/Serialization/JSONFormat/TUSummaryEncoding.cpp
M clang/lib/Basic/OffloadArch.cpp
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/Hexagon.cpp
M clang/lib/Basic/Targets/Hexagon.h
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/CIR/CodeGen/CIRGenAsm.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.h
M clang/lib/CIR/CodeGen/CIRGenException.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/EHScopeStack.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/DependencyScanning/InProcessModuleCache.cpp
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Driver.cpp
A clang/lib/Driver/ModulesDriver.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParsePragma.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ProgramState.cpp
M clang/test/AST/ByteCode/codegen-constexpr-unknown.cpp
M clang/test/AST/HLSL/WaveSize.hlsl
M clang/test/Analysis/Checkers/WebKit/nodelete-annotation.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-obj-arg.cpp
M clang/test/Analysis/auto-obj-dtors-cfg-output.cpp
M clang/test/Analysis/malloc-annotations.c
M clang/test/Analysis/misc-ps-region-store.cpp
M clang/test/CIR/CodeGen/cleanup.cpp
M clang/test/CIR/CodeGen/coro-task.cpp
M clang/test/CIR/CodeGen/defaultarg.cpp
M clang/test/CIR/CodeGen/dtors.cpp
M clang/test/CIR/CodeGen/goto.cpp
M clang/test/CIR/CodeGen/label-values.c
M clang/test/CIR/CodeGen/label.c
M clang/test/CIR/CodeGen/lambda-static-invoker.cpp
M clang/test/CIR/CodeGen/nrvo.cpp
M clang/test/CIR/CodeGen/stmt-expr.cpp
M clang/test/CIR/CodeGen/struct.cpp
M clang/test/CIR/CodeGen/try-catch-tmp.cpp
M clang/test/CIR/CodeGen/virtual-destructor-calls.cpp
M clang/test/CIR/CodeGen/vla.c
M clang/test/CIR/CodeGenBuiltins/AArch64/acle_sve_dup.c
M clang/test/CIR/CodeGenCXX/global-refs.cpp
M clang/test/CIR/IR/invalid-eh-flat.cir
M clang/test/CIR/IR/invalid-try-catch.cir
M clang/test/CIR/IR/try-catch.cir
M clang/test/CIR/Transforms/flatten-cleanup-scope-eh.cir
M clang/test/CIR/Transforms/flatten-cleanup-scope-nyi.cir
A clang/test/CIR/Transforms/flatten-try-op.cir
A clang/test/ClangScanDeps/modules-cycle-deadlock.c
A clang/test/ClangScanDeps/modules-symlink-dir-from-module-incremental.c
M clang/test/CodeGen/aix-builtin-cpu-supports.c
A clang/test/CodeGen/c23-constexpr-member-access.c
A clang/test/CodeGen/cfi-icall-with-abi-tag.cpp
M clang/test/CodeGenCXX/alloc-token-pointer.cpp
M clang/test/CodeGenCXX/mangle-lambdas.cpp
M clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp
M clang/test/CodeGenCXX/vtable-assume-load.cpp
A clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-wmma-f16.hip
A clang/test/CodeGenHIP/debug-info-language-hip.hip
M clang/test/DebugInfo/CXX/vtable-external.cpp
M clang/test/DebugInfo/CXX/vtable-inheritance-diamond.cpp
M clang/test/DebugInfo/CXX/vtable-inheritance-multiple.cpp
M clang/test/DebugInfo/CXX/vtable-inheritance-simple-main.cpp
M clang/test/DebugInfo/CXX/vtable-inheritance-simple.cpp
M clang/test/DebugInfo/CXX/vtable-inheritance-virtual.cpp
M clang/test/DebugInfo/CXX/vtable-template-instantiation.cpp
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Driver/amdgpu-mcpu.cl
M clang/test/Driver/amdgpu-openmp-sanitize-options.c
M clang/test/Driver/cl-options.c
A clang/test/Driver/crash-report-no-integrated-cc1.c
M clang/test/Driver/fsanitize-minimal-runtime.c
M clang/test/Driver/hip-sanitize-options.hip
A clang/test/Driver/modules-driver-malformed-manifest.cpp
A clang/test/Driver/modules-driver-manifest-input-args.cpp
A clang/test/Driver/modules-driver-manifest-not-found.cpp
A clang/test/Driver/print-enabled-extensions/riscv-xt-c910v2.c
A clang/test/Driver/print-enabled-extensions/riscv-xt-c920v2.c
M clang/test/Driver/riscv-cpus.c
M clang/test/Driver/rocm-device-libs.cl
A clang/test/Driver/sycl-offload-jit-xarch.cpp
M clang/test/FixIt/fixit-pragma-attribute.cpp
M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
M clang/test/Misc/target-invalid-cpu-note/riscv.c
A clang/test/Modules/implicit-cycle-deadlock.c
A clang/test/Modules/lazy-by-header-extern.c
A clang/test/Modules/lazy-by-header-lookup.c
A clang/test/Modules/lazy-by-header-nested.c
A clang/test/Modules/lazy-by-header-private.c
A clang/test/Modules/lazy-by-header-umbrella-dir.c
A clang/test/Modules/lazy-by-header-umbrella-header.c
M clang/test/Modules/lazy-by-name-lookup.c
A clang/test/Modules/pr178893.cppm
A clang/test/OpenMP/num_teams_clause_ast.cpp
M clang/test/OpenMP/target_teams_ast_print.cpp
M clang/test/OpenMP/target_teams_distribute_num_teams_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_num_teams_messages.cpp
M clang/test/OpenMP/teams_num_teams_messages.cpp
M clang/test/Parser/pragma-attribute.cpp
M clang/test/Preprocessor/hexagon-predefines.c
A clang/test/Sema/constexpr-member-access.c
M clang/test/SemaCXX/constexpr-x86-avx-builtins.cpp
M clang/test/SemaCXX/constexpr-x86-avx512f-builtins.cpp
M clang/test/SemaCXX/constexpr-x86-sse2-builtins.cpp
A clang/test/SemaCXX/gh183505.cpp
M clang/test/SemaCXX/return-noreturn.cpp
A clang/test/SemaCXX/typeid-incomplete-local-crash.cpp
M clang/test/SemaCXX/vector.cpp
A clang/test/SemaTemplate/GH181062.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx11.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/driver/driver.cpp
M clang/unittests/Analysis/Scalable/BuildNamespaceTest.cpp
M clang/unittests/Analysis/Scalable/CMakeLists.txt
M clang/unittests/Analysis/Scalable/EntityIdTest.cpp
M clang/unittests/Analysis/Scalable/EntityLinkageTest.cpp
M clang/unittests/Analysis/Scalable/EntityLinkerTest.cpp
M clang/unittests/Analysis/Scalable/EntityNameTest.cpp
A clang/unittests/Analysis/Scalable/ModelStringConversionsTest.cpp
M clang/unittests/Analysis/Scalable/Registries/MockSerializationFormat.cpp
M clang/unittests/Analysis/Scalable/Registries/MockSerializationFormat.h
M clang/unittests/Analysis/Scalable/Serialization/JSONFormatTest/TUSummaryTest.cpp
M clang/unittests/Analysis/Scalable/SummaryNameTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/www/cxx_status.html
M compiler-rt/lib/scudo/standalone/report.cpp
M compiler-rt/lib/scudo/standalone/report.h
M compiler-rt/lib/scudo/standalone/secondary.h
M compiler-rt/lib/scudo/standalone/tests/report_test.cpp
M compiler-rt/lib/scudo/standalone/tests/wrappers_c_test.cpp
M compiler-rt/lib/scudo/standalone/wrappers_c.inc
M compiler-rt/lib/scudo/standalone/wrappers_c_checks.h
M compiler-rt/test/fuzzer/reduce_inputs.test
M compiler-rt/test/safestack/overflow.c
M flang-rt/include/flang-rt/runtime/environment.h
M flang-rt/include/flang-rt/runtime/lock.h
M flang-rt/include/flang-rt/runtime/memory.h
M flang-rt/include/flang-rt/runtime/tools.h
M flang-rt/lib/cuda/allocator.cpp
M flang-rt/lib/cuda/stream.cpp
M flang-rt/lib/runtime/CMakeLists.txt
M flang-rt/lib/runtime/character.cpp
M flang-rt/lib/runtime/descriptor-io.cpp
M flang-rt/lib/runtime/descriptor.cpp
M flang-rt/lib/runtime/environment.cpp
M flang-rt/lib/runtime/io-api.cpp
M flang-rt/lib/runtime/iostat.cpp
M flang-rt/lib/runtime/stop.cpp
M flang-rt/lib/runtime/terminator.cpp
M flang-rt/lib/runtime/transformational.cpp
M flang-rt/lib/runtime/unit.cpp
M flang-rt/lib/runtime/unit.h
M flang-rt/unittests/Runtime/CUDA/Allocatable.cpp
M flang-rt/unittests/Runtime/CharacterTest.cpp
M flang/docs/Extensions.md
M flang/docs/GettingInvolved.md
A flang/docs/MeetingNotes/2026/2026-02-25.md
M flang/docs/RuntimeEnvironment.md
M flang/include/flang/Common/api-attrs.h
M flang/include/flang/Common/format.h
M flang/include/flang/Frontend/CodeGenOptions.h
M flang/include/flang/Lower/CUDA.h
M flang/include/flang/Optimizer/Builder/CUDAIntrinsicCall.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Character.h
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Parser/openmp-utils.h
M flang/include/flang/Runtime/CUDA/allocator.h
M flang/include/flang/Runtime/CUDA/stream.h
M flang/include/flang/Runtime/character.h
M flang/include/flang/Runtime/iostat-consts.h
M flang/include/flang/Semantics/expression.h
M flang/include/flang/Support/Fortran-features.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/CUDA.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Character.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-io.cpp
M flang/lib/Semantics/check-io.h
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/module/cuda_runtime_api.f90
A flang/test/Driver/grecord-command-line.f90
M flang/test/Driver/intrinsic-module-path.f90
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
M flang/test/Lower/CUDA/cuda-default-stream.cuf
M flang/test/Lower/HLFIR/goto-do-body.f90
M flang/test/Lower/Intrinsics/abs.f90
M flang/test/Lower/Intrinsics/achar.f90
M flang/test/Lower/Intrinsics/acospi.f90
M flang/test/Lower/Intrinsics/adjustl.f90
A flang/test/Lower/Intrinsics/tokenize.f90
A flang/test/Lower/OpenMP/ordered-simd.f90
M flang/test/Lower/intentout-deallocate.f90
M flang/test/Lower/volatile3.f90
A flang/test/Parser/bug2280.f90
A flang/test/Semantics/Inputs/modfile83.mod
M flang/test/Semantics/associated.f90
A flang/test/Semantics/bug2273.f90
A flang/test/Semantics/bug2292.f90
A flang/test/Semantics/bug2295.f90
M flang/test/Semantics/call01.f90
M flang/test/Semantics/call03.f90
M flang/test/Semantics/io08.f90
A flang/test/Semantics/io16.f90
A flang/test/Semantics/modfile83.f90
A flang/test/Semantics/tokenize-errors.f90
A flang/test/Transforms/debug-dwarf-debug-flags.fir
M libc/cmake/modules/LLVMLibCHeaderRules.cmake
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/windows/entrypoints.txt
M libc/docs/headers/math/index.rst
M libc/include/llvm-libc-macros/float16-macros.h
M libc/shared/math.h
A libc/shared/math/asinpif.h
A libc/shared/math/bf16sub.h
A libc/shared/math/bf16subf.h
A libc/shared/math/bf16subf128.h
A libc/shared/math/f16div.h
A libc/shared/math/f16divf.h
A libc/shared/math/f16divf128.h
A libc/shared/math/f16divl.h
A libc/shared/math/f16mul.h
A libc/shared/math/f16mulf.h
A libc/shared/math/f16mulf128.h
A libc/shared/math/f16mull.h
A libc/shared/math/f16sqrtf128.h
A libc/shared/math/f16sub.h
A libc/shared/math/f16subf.h
A libc/shared/math/f16subf128.h
A libc/shared/math/f16subl.h
A libc/shared/math/fdim.h
A libc/shared/math/fdimbf16.h
A libc/shared/math/fdimf.h
A libc/shared/math/fdimf128.h
A libc/shared/math/fdimf16.h
A libc/shared/math/fdiml.h
A libc/shared/math/nextafter.h
A libc/shared/math/nextafterbf16.h
A libc/shared/math/nextafterf.h
A libc/shared/math/nextafterf128.h
A libc/shared/math/nextafterf16.h
A libc/shared/math/nextafterl.h
A libc/shared/math/nexttoward.h
A libc/shared/math/nexttowardbf16.h
A libc/shared/math/nexttowardf.h
A libc/shared/math/nexttowardf16.h
A libc/shared/math/nexttowardl.h
A libc/shared/math/nextup.h
A libc/shared/math/nextupbf16.h
A libc/shared/math/nextupf.h
A libc/shared/math/nextupf128.h
A libc/shared/math/nextupf16.h
A libc/shared/math/nextupl.h
A libc/shared/math/tanpif16.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/asinpif.h
M libc/src/__support/math/atan2f128.h
A libc/src/__support/math/bf16sub.h
A libc/src/__support/math/bf16subf.h
A libc/src/__support/math/bf16subf128.h
A libc/src/__support/math/f16div.h
A libc/src/__support/math/f16divf.h
A libc/src/__support/math/f16divf128.h
A libc/src/__support/math/f16divl.h
A libc/src/__support/math/f16mul.h
A libc/src/__support/math/f16mulf.h
A libc/src/__support/math/f16mulf128.h
A libc/src/__support/math/f16mull.h
A libc/src/__support/math/f16sqrtf128.h
A libc/src/__support/math/f16sub.h
A libc/src/__support/math/f16subf.h
A libc/src/__support/math/f16subf128.h
A libc/src/__support/math/f16subl.h
A libc/src/__support/math/fdim.h
A libc/src/__support/math/fdimbf16.h
A libc/src/__support/math/fdimf.h
A libc/src/__support/math/fdimf128.h
A libc/src/__support/math/fdimf16.h
A libc/src/__support/math/fdiml.h
A libc/src/__support/math/nextafter.h
A libc/src/__support/math/nextafterbf16.h
A libc/src/__support/math/nextafterf.h
A libc/src/__support/math/nextafterf128.h
A libc/src/__support/math/nextafterf16.h
A libc/src/__support/math/nextafterl.h
A libc/src/__support/math/nexttoward.h
A libc/src/__support/math/nexttowardbf16.h
A libc/src/__support/math/nexttowardf.h
A libc/src/__support/math/nexttowardf16.h
A libc/src/__support/math/nexttowardl.h
A libc/src/__support/math/nextup.h
A libc/src/__support/math/nextupbf16.h
A libc/src/__support/math/nextupf.h
A libc/src/__support/math/nextupf128.h
A libc/src/__support/math/nextupf16.h
A libc/src/__support/math/nextupl.h
A libc/src/__support/math/tanpif16.h
M libc/src/math/CMakeLists.txt
A libc/src/math/asinpif.h
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/asinpif.cpp
M libc/src/math/generic/bf16sub.cpp
M libc/src/math/generic/bf16subf.cpp
M libc/src/math/generic/bf16subf128.cpp
M libc/src/math/generic/f16div.cpp
M libc/src/math/generic/f16divf.cpp
M libc/src/math/generic/f16divf128.cpp
M libc/src/math/generic/f16divl.cpp
M libc/src/math/generic/f16mul.cpp
M libc/src/math/generic/f16mulf.cpp
M libc/src/math/generic/f16mulf128.cpp
M libc/src/math/generic/f16mull.cpp
M libc/src/math/generic/f16sqrtf128.cpp
M libc/src/math/generic/f16sub.cpp
M libc/src/math/generic/f16subf.cpp
M libc/src/math/generic/f16subf128.cpp
M libc/src/math/generic/f16subl.cpp
M libc/src/math/generic/fdim.cpp
M libc/src/math/generic/fdimbf16.cpp
M libc/src/math/generic/fdimf.cpp
M libc/src/math/generic/fdimf128.cpp
M libc/src/math/generic/fdimf16.cpp
M libc/src/math/generic/fdiml.cpp
M libc/src/math/generic/nextafter.cpp
M libc/src/math/generic/nextafterbf16.cpp
M libc/src/math/generic/nextafterf.cpp
M libc/src/math/generic/nextafterf128.cpp
M libc/src/math/generic/nextafterf16.cpp
M libc/src/math/generic/nextafterl.cpp
M libc/src/math/generic/nexttoward.cpp
M libc/src/math/generic/nexttowardbf16.cpp
M libc/src/math/generic/nexttowardf.cpp
M libc/src/math/generic/nexttowardf16.cpp
M libc/src/math/generic/nexttowardl.cpp
M libc/src/math/generic/nextup.cpp
M libc/src/math/generic/nextupbf16.cpp
M libc/src/math/generic/nextupf.cpp
M libc/src/math/generic/nextupf128.cpp
M libc/src/math/generic/nextupf16.cpp
M libc/src/math/generic/nextupl.cpp
M libc/src/math/generic/tanpif16.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/asinpif_test.cpp
M libc/test/src/math/exhaustive/CMakeLists.txt
A libc/test/src/math/exhaustive/asinpif_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/asinpif_test.cpp
M libc/test/src/math/smoke/atan2f128_test.cpp
M libc/utils/hdrgen/hdrgen/main.py
M libclc/opencl/lib/clspv/SOURCES
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/include/__algorithm/find.h
M libcxx/include/__algorithm/find_if.h
M libcxx/include/__algorithm/find_if_not.h
M libcxx/include/__algorithm/ranges_find_if.h
M libcxx/include/__algorithm/ranges_find_if_not.h
M libcxx/include/__algorithm/ranges_remove_if.h
M libcxx/include/__iterator/ostreambuf_iterator.h
M libcxx/include/__locale_dir/pad_and_output.h
M libcxx/include/__math/gamma.h
M libcxx/include/__random/binomial_distribution.h
M libcxx/include/__tree
M libcxx/include/__utility/lazy_synth_three_way_comparator.h
M libcxx/include/__vector/vector.h
A libcxx/test/benchmarks/streams/copy.bench.cpp
M libcxx/test/libcxx/algorithms/specialized_algorithms.compile.pass.cpp
A libcxx/test/libcxx/containers/associative/debug.non-strict-weak-ordering.pass.cpp
A libcxx/test/libcxx/containers/associative/lower_upper_bound_non_strict_weak_order.pass.cpp
A libcxx/test/std/algorithms/alg.modifying.operations/alg.copy/ostreambuf.copy.pass.cpp
M libcxx/test/std/containers/sequences/vector/vector.modifiers/append_range.pass.cpp
M libcxx/test/support/stream_types.h
M libcxx/utils/libcxx/test/dsl.py
M libcxx/utils/libcxx/test/format.py
M libsycl/docs/index.rst
A libsycl/include/sycl/__impl/context.hpp
M libsycl/include/sycl/__impl/device.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/CMakeLists.txt
A libsycl/src/context.cpp
A libsycl/src/detail/context_impl.cpp
A libsycl/src/detail/context_impl.hpp
M libsycl/src/detail/device_impl.cpp
M libsycl/src/detail/device_impl.hpp
M libsycl/src/detail/offload/offload_utils.hpp
M libsycl/src/detail/platform_impl.cpp
M libsycl/src/detail/platform_impl.hpp
M libsycl/src/device.cpp
M libsycl/src/platform.cpp
M lld/docs/WebAssembly.rst
M lld/docs/index.rst
A lld/test/wasm/large-debug-section.test
A lld/test/wasm/large-section.test
A lld/test/wasm/section-too-large.test
M lld/test/wasm/tls-export.s
M lld/wasm/InputChunks.h
M lld/wasm/OutputSections.cpp
M lldb/docs/dil-expr-lang.ebnf
M lldb/examples/python/formatter_bytecode.py
M lldb/include/lldb/Expression/REPL.h
M lldb/include/lldb/Host/Config.h.cmake
M lldb/include/lldb/Host/HostInfoBase.h
M lldb/include/lldb/Host/aix/HostInfoAIX.h
M lldb/include/lldb/Host/linux/HostInfoLinux.h
M lldb/include/lldb/Host/windows/HostInfoWindows.h
M lldb/include/lldb/Initialization/SystemInitializerCommon.h
M lldb/include/lldb/Utility/AnsiTerminal.h
M lldb/include/lldb/ValueObject/DILAST.h
M lldb/include/lldb/ValueObject/DILEval.h
M lldb/include/lldb/ValueObject/DILParser.h
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/source/API/SystemInitializerFull.cpp
M lldb/source/Core/Debugger.cpp
M lldb/source/Expression/REPL.cpp
M lldb/source/Host/aix/HostInfoAIX.cpp
M lldb/source/Host/common/HostInfoBase.cpp
M lldb/source/Host/linux/HostInfoLinux.cpp
M lldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm
M lldb/source/Host/windows/ConnectionGenericFileWindows.cpp
M lldb/source/Host/windows/HostInfoWindows.cpp
M lldb/source/Initialization/SystemInitializerCommon.cpp
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/CMakeLists.txt
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.h
A lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCoreProperties.td
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ThreadFreeBSDKernelCore.h
M lldb/source/Plugins/REPL/Clang/ClangREPL.cpp
M lldb/source/Plugins/REPL/Clang/ClangREPL.h
M lldb/source/Plugins/ScriptInterpreter/Lua/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/ValueObject/DILAST.cpp
M lldb/source/ValueObject/DILEval.cpp
M lldb/source/ValueObject/DILParser.cpp
M lldb/test/API/commands/frame/var-dil/expr/Arithmetic/TestFrameVarDILArithmetic.py
M lldb/test/API/commands/frame/var-dil/expr/Arithmetic/main.cpp
M lldb/test/API/commands/help/TestHelp.py
M lldb/test/API/functionalities/dyld-launch-linux/TestDyldLaunchLinux.py
R lldb/test/API/functionalities/postmortem/FreeBSD-Kernel-Core/tools/README.rst
R lldb/test/API/functionalities/postmortem/FreeBSD-Kernel-Core/tools/copy-sparse.py
R lldb/test/API/functionalities/postmortem/FreeBSD-Kernel-Core/tools/libfbsdvmcore-hacks.patch
R lldb/test/API/functionalities/postmortem/FreeBSD-Kernel-Core/tools/lldb-minimize-processes.patch
R lldb/test/API/functionalities/postmortem/FreeBSD-Kernel-Core/tools/test.script
M lldb/test/API/lang/cpp/gmodules/alignment/TestPchAlignment.py
M lldb/test/API/lang/cpp/gmodules/basic/TestWithModuleDebugging.py
M lldb/test/API/lang/objc/failing-description/TestObjCFailingDescription.py
M lldb/test/API/lang/objc/struct-description/TestObjCStructDescription.py
M lldb/test/API/macosx/add-dsym/TestAddDsymDownload.py
M lldb/test/API/macosx/add-dsym/TestAddDsymMidExecutionCommand.py
M lldb/test/API/tools/lldb-dap/cancel/TestDAP_cancel.py
A lldb/test/API/tools/lldb-dap/cancel/busy_loop.py
M lldb/test/API/tools/lldb-dap/stopped-events/TestDAP_stopped_events.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/test/API/tools/lldb-dap/variables/children/TestDAP_variables_children.py
M lldb/test/Shell/ScriptInterpreter/Python/bytecode.test
M lldb/tools/lldb-dap/Handler/EvaluateRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ScopesRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/SetVariableRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/VariablesRequestHandler.cpp
M lldb/tools/lldb-dap/Protocol/DAPTypes.h
M lldb/tools/lldb-dap/SBAPIExtras.h
M lldb/tools/lldb-dap/Variables.cpp
M lldb/tools/lldb-dap/Variables.h
M lldb/tools/lldb-mcp/lldb-mcp.cpp
M lldb/tools/lldb-server/SystemInitializerLLGS.h
M lldb/tools/lldb-test/SystemInitializerTest.cpp
M lldb/unittests/DAP/DAPTypesTest.cpp
M lldb/unittests/DAP/Inputs/linux-x86_64.core.yaml
M lldb/unittests/DAP/Inputs/linux-x86_64.out.yaml
M lldb/unittests/DAP/VariablesTest.cpp
M lldb/unittests/Utility/AnsiTerminalTest.cpp
M llvm/cmake/modules/AddLLVM.cmake
M llvm/cmake/modules/HandleLLVMOptions.cmake
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/HowToSetUpLLVMStyleRTTI.rst
M llvm/docs/LangRef.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/ADT/StringRef.h
M llvm/include/llvm/Analysis/MemorySSA.h
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
A llvm/include/llvm/CodeGen/pch.h
M llvm/include/llvm/IR/FMF.h
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCGOFFAttributes.h
M llvm/include/llvm/MC/MCSectionGOFF.h
M llvm/include/llvm/MC/MCSymbolGOFF.h
M llvm/include/llvm/MC/MCTargetOptions.h
M llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h
M llvm/include/llvm/Support/AdvisoryLock.h
M llvm/include/llvm/Support/KnownFPClass.h
M llvm/include/llvm/Support/LockFileManager.h
M llvm/include/llvm/TargetParser/TargetParser.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/Transforms/IPO/IROutliner.h
M llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/LoopInfo.cpp
M llvm/lib/Analysis/MemorySSA.cpp
M llvm/lib/Analysis/MemorySSAUpdater.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp
M llvm/lib/CodeGen/ExpandIRInsts.cpp
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/PostRAHazardRecognizer.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/SlotIndexes.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/DebugInfo/PDB/Native/GSIStreamBuilder.cpp
M llvm/lib/ExecutionEngine/ExecutionEngine.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/GOFFObjectWriter.cpp
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCAsmInfoGOFF.cpp
M llvm/lib/MC/MCSymbolGOFF.cpp
M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/lib/ObjectYAML/WasmEmitter.cpp
M llvm/lib/Support/KnownFPClass.cpp
M llvm/lib/Support/LockFileManager.cpp
M llvm/lib/Support/VirtualOutputBackends.cpp
M llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrAtomics.td
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPULaneMaskUtils.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/Hexagon/Hexagon.td
M llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
M llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/Mips/MicroMipsInstrFPU.td
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsInstrFPU.td
M llvm/lib/Target/Mips/MipsInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/PPC.td
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.cpp
M llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.h
M llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizeZeroSizeArrays.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.h
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAMX.td
M llvm/lib/Target/X86/X86PreTileConfig.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/runtimes/CMakeLists.txt
M llvm/test/Analysis/CostModel/AMDGPU/exp.ll
M llvm/test/Analysis/CostModel/AMDGPU/exp10.ll
M llvm/test/Analysis/CostModel/AMDGPU/exp2.ll
M llvm/test/Analysis/ScalarEvolution/trip-count-scalable-stride.ll
M llvm/test/CodeGen/AArch64/aarch64-addv.ll
A llvm/test/CodeGen/AArch64/aarch64-condopt-unsigned.mir
A llvm/test/CodeGen/AArch64/aarch64-inline-asm-bitcast-crash.ll
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
M llvm/test/CodeGen/AArch64/aarch64-pmull2.ll
M llvm/test/CodeGen/AArch64/aarch64-scal-to-vec-bitcast-insert.ll
A llvm/test/CodeGen/AArch64/aarch64-tensorflow-isel-regression.ll
M llvm/test/CodeGen/AArch64/arm64-cvt-simd-intrinsics.ll
M llvm/test/CodeGen/AArch64/arm64-fixed-point-scalar-cvt-dagcombine.ll
M llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
M llvm/test/CodeGen/AArch64/arm64-neon-select_cc.ll
M llvm/test/CodeGen/AArch64/arm64-neon-v8.1a.ll
M llvm/test/CodeGen/AArch64/arm64-vcvt.ll
M llvm/test/CodeGen/AArch64/arm64-vector-insertion.ll
M llvm/test/CodeGen/AArch64/arm64-vshift.ll
M llvm/test/CodeGen/AArch64/avoid-pre-trunc.ll
M llvm/test/CodeGen/AArch64/bitcast-extend.ll
M llvm/test/CodeGen/AArch64/clmul-fixed.ll
M llvm/test/CodeGen/AArch64/combine-comparisons-by-cse.ll
A llvm/test/CodeGen/AArch64/complex-deinterleaving-opt-crash-178671.ll
M llvm/test/CodeGen/AArch64/concat-vector-add-combine.ll
M llvm/test/CodeGen/AArch64/ctpop.ll
A llvm/test/CodeGen/AArch64/faddv-fp16.ll
A llvm/test/CodeGen/AArch64/faddv.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics-vector.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
M llvm/test/CodeGen/AArch64/fsh.ll
M llvm/test/CodeGen/AArch64/implicitly-set-zero-high-64-bits.ll
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
A llvm/test/CodeGen/AArch64/neon-lowhalf128-optimisation.ll
M llvm/test/CodeGen/AArch64/ragreedy-local-interval-cost.ll
A llvm/test/CodeGen/AArch64/select-bitcast.ll
M llvm/test/CodeGen/AArch64/sext.ll
M llvm/test/CodeGen/AArch64/stack-tagging.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-to-int.ll
M llvm/test/CodeGen/AArch64/sve-fixed-vector-llrint.ll
M llvm/test/CodeGen/AArch64/sve-fixed-vector-lrint.ll
A llvm/test/CodeGen/AArch64/veclib-llvm.pow.ll
M llvm/test/CodeGen/AArch64/vecreduce-fadd.ll
M llvm/test/CodeGen/AArch64/vector-llrint.ll
M llvm/test/CodeGen/AArch64/vector-lrint.ll
M llvm/test/CodeGen/AArch64/zext.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-accesslist-offsetbins-out-of-sync.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-flat-scratch-init-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-intrinsic-missing-nocallback.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-min-agpr-alloc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-nocallback-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-trap-leaf.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.ll
M llvm/test/CodeGen/AMDGPU/annotate-existing-abi-attributes.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-max-num-workgroups-propagate.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit.ll
M llvm/test/CodeGen/AMDGPU/attributor-loop-issue-58639.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/convergent.mir
M llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
A llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-sgpr32-to-vgpr16.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/AMDGPU/generic-targets-require-v6.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/hsa-generic-target-features.ll
M llvm/test/CodeGen/AMDGPU/implicitarg-offset-attributes.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-set-from-other-function.ll
M llvm/test/CodeGen/AMDGPU/inline-attr.ll
M llvm/test/CodeGen/AMDGPU/issue120256-annotate-constexpr-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.e5m3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
A llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
A llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
A llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
A llvm/test/CodeGen/AMDGPU/load-saddr-offset-imm.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-bf16.ll
M llvm/test/CodeGen/AMDGPU/opencl-printf.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
M llvm/test/CodeGen/AMDGPU/pal-simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-gep.ll
M llvm/test/CodeGen/AMDGPU/propagate-amdgpu-cluster-dims.ll
M llvm/test/CodeGen/AMDGPU/propagate-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/propagate-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/recursive_global_initializer.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/remat-sop.mir
M llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/schedule-barrier-latency-gfx9.mir
M llvm/test/CodeGen/AMDGPU/simple-indirect-call-2.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-attribute-missing.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-multistep.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-nested-function-calls.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-prevent-attribute-propagation.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-propagate-attribute.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-recursion-test.ll
M llvm/test/CodeGen/AMDGPU/uniform-work-group-test.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
R llvm/test/CodeGen/AMDGPU/wmma-coececution-valu-hazards.mir
A llvm/test/CodeGen/AMDGPU/wmma-coexecution-valu-hazards.mir
M llvm/test/CodeGen/AMDGPU/wmma-nop-hoisting.mir
M llvm/test/CodeGen/ARM/shift-combine.ll
A llvm/test/CodeGen/Generic/shadow-stack-gc-lowering.ll
A llvm/test/CodeGen/Hexagon/constp-const32-signbit.mir
M llvm/test/CodeGen/Hexagon/isel/trunc-vNi1-HVX.ll
A llvm/test/CodeGen/Hexagon/v81-early-arch-features.ll
A llvm/test/CodeGen/Hexagon/vgather-memvt.ll
A llvm/test/CodeGen/MIR/Generic/expected-unsigned.mir
M llvm/test/CodeGen/Mips/fabs.ll
M llvm/test/CodeGen/Mips/fmadd1.ll
M llvm/test/CodeGen/Mips/llvm-ir/nan-fp-attr.ll
A llvm/test/CodeGen/NVPTX/reserved-smem-offset.ll
A llvm/test/CodeGen/PowerPC/bit_floor.ll
M llvm/test/CodeGen/PowerPC/fma-combine.ll
M llvm/test/CodeGen/PowerPC/fmf-propagation.ll
M llvm/test/CodeGen/PowerPC/milicode32.ll
M llvm/test/CodeGen/PowerPC/milicode64.ll
M llvm/test/CodeGen/RISCV/avgflooru.ll
M llvm/test/CodeGen/RISCV/bswap-bitreverse.ll
M llvm/test/CodeGen/RISCV/calling-conv-p-ext-vector.ll
M llvm/test/CodeGen/RISCV/div_minsize.ll
M llvm/test/CodeGen/RISCV/double-imm.ll
M llvm/test/CodeGen/RISCV/double-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/double-select-fcmp.ll
M llvm/test/CodeGen/RISCV/double-select-icmp.ll
M llvm/test/CodeGen/RISCV/double-stack-spill-restore.ll
M llvm/test/CodeGen/RISCV/fold-addi-loadstore-zilsd.ll
M llvm/test/CodeGen/RISCV/inline-asm-zdinx-constraint-r.ll
A llvm/test/CodeGen/RISCV/opt-w-instrs-p-ext.mir
A llvm/test/CodeGen/RISCV/rv32-merge-non-arg-reg.mir
A llvm/test/CodeGen/RISCV/rv32-move-merge.ll
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rvp-unaligned-load-store.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt.mir
M llvm/test/CodeGen/RISCV/zicond-fp-select-zfinx.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_relaxed_printf_string_address_space/non-constant-printf.ll
A llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-extern.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/exp10-glsl.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/exp10-opencl.ll
M llvm/test/CodeGen/SystemZ/zos-ada-relocations.ll
A llvm/test/CodeGen/Thumb2/mve-sli-sri.ll
M llvm/test/CodeGen/WebAssembly/load-ext.ll
M llvm/test/CodeGen/WebAssembly/offset-fastisel.ll
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/combine-vpmadd52.ll
M llvm/test/CodeGen/X86/div_i129_v_pow2k.ll
M llvm/test/CodeGen/X86/fminimum-fmaximum.ll
M llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
M llvm/test/CodeGen/X86/fnabs.ll
A llvm/test/CodeGen/X86/funnel-shift-i512.ll
M llvm/test/CodeGen/X86/gfni-xor-fold-avx512.ll
M llvm/test/CodeGen/X86/gfni-xor-fold.ll
M llvm/test/CodeGen/X86/i128-sdiv.ll
M llvm/test/CodeGen/X86/known-pow2.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-256.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-512.ll
M llvm/test/CodeGen/X86/single_elt_vector_memory_operation.ll
M llvm/test/CodeGen/X86/stack-align.ll
M llvm/test/CodeGen/X86/statepoint-live-in.ll
M llvm/test/CodeGen/X86/statepoint-regs.ll
M llvm/test/CodeGen/X86/vec-copysign-avx512.ll
M llvm/test/CodeGen/X86/vec_fcopysign.ll
M llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
M llvm/test/CodeGen/X86/vector-shuffle-concatenation.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
M llvm/test/ExecutionEngine/Interpreter/test-interp-vec-insertelement.ll
A llvm/test/Instrumentation/AddressSanitizer/fuchsia.ll
M llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
A llvm/test/MC/ELF/reloc-section-sym.s
M llvm/test/MC/RISCV/rv32p-valid.s
A llvm/test/MC/RISCV/rv32zcb-zbkb-valid.s
M llvm/test/MC/RISCV/rv64p-valid.s
A llvm/test/MC/RISCV/rv64zcb-zbkb-valid.s
M llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
A llvm/test/ObjectYAML/wasm/dylink_tls_exports.yaml
A llvm/test/Transforms/AggressiveInstCombine/X86/pr175590.ll
M llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-trig-preop.ll
M llvm/test/Transforms/Attributor/nofpclass-fmul.ll
A llvm/test/Transforms/ExpandIRInsts/X86/divrem-pow2.ll
A llvm/test/Transforms/FunctionAttrs/nofpclass-callsite-prop.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
A llvm/test/Transforms/IROutliner/illegal-nomerge.ll
A llvm/test/Transforms/IROutliner/illegal-typeid-for.ll
A llvm/test/Transforms/InstCombine/alloca-poison-size.ll
M llvm/test/Transforms/InstCombine/get_active_lane_mask.ll
M llvm/test/Transforms/InstCombine/icmp-binop.ll
A llvm/test/Transforms/JumpTableToSwitch/stats.ll
M llvm/test/Transforms/LoopDeletion/invalidate-scev-after-hoisting.ll
A llvm/test/Transforms/LoopSimplify/profile-info.ll
R llvm/test/Transforms/LoopUnroll/AMDGPU/unroll-runtime.ll
M llvm/test/Transforms/LoopUnrollAndJam/dependencies.ll
M llvm/test/Transforms/LoopUnrollAndJam/unroll-and-jam.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
A llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs-apple.ll
M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions-tf.ll
M llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops-and-casts.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/VPlan/conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-constant-known-via-scev.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/pr131359-dead-for-splice.ll
M llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/X86/widened-value-used-as-scalar-and-first-lane.ll
M llvm/test/Transforms/LoopVectorize/assume.ll
M llvm/test/Transforms/LoopVectorize/cse-gep-source-element-type.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-interleave.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags-interleave.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll
M llvm/test/Transforms/LoopVectorize/metadata.ll
M llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/pr128062-interleaved-accesses-narrow-group.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
A llvm/test/Transforms/LoopVectorize/predicated-early-exits-interleave.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/scalable-assume.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
M llvm/test/Transforms/LoopVectorize/select-index-interleaving.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
M llvm/test/Transforms/LoopVectorize/use-scalar-epilogue-if-tp-fails.ll
M llvm/test/Transforms/PhaseOrdering/AMDGPU/infer-address-space.ll
A llvm/test/Transforms/SLPVectorizer/AMDGPU/zext-duplicate-shift.ll
M llvm/test/Transforms/SLPVectorizer/X86/bv-root-part-of-graph.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-node-with-non-schedulable-parent.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-vectorize-gathered-def-after-use.ll
M llvm/test/Transforms/SLPVectorizer/extract-many-users-buildvector.ll
M llvm/test/Transforms/SandboxVectorizer/bottomup_basic.ll
M llvm/test/Transforms/SandboxVectorizer/bottomup_seed_slice.ll
M llvm/test/Transforms/SandboxVectorizer/bottomup_seed_slice_pow2.ll
M llvm/test/Transforms/SandboxVectorizer/cross_bbs.ll
M llvm/test/Transforms/SandboxVectorizer/pack.ll
M llvm/test/Transforms/SandboxVectorizer/regions-from-metadata.ll
M llvm/test/Transforms/SandboxVectorizer/repeated_instrs.ll
M llvm/test/Transforms/SandboxVectorizer/scheduler.ll
M llvm/test/Transforms/SandboxVectorizer/special_opcodes.ll
M llvm/test/Transforms/SandboxVectorizer/stop_at.ll
M llvm/test/Transforms/SandboxVectorizer/stop_bndl.ll
M llvm/test/Transforms/SandboxVectorizer/user_pass_pipeline.ll
A llvm/test/Transforms/SimplifyCFG/AArch64/switch-to-lookup-table-vector-constants.ll
R llvm/test/Transforms/SimplifyCFG/AArch64/switch-to-lookup-table-vector-splat.ll
M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/armpl.ll
R llvm/test/Transforms/VectorCombine/AArch64/shuffle-of-intrinscis.ll
A llvm/test/Transforms/VectorCombine/AArch64/shuffle-of-intrinsics.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-casts.ll
M llvm/test/tools/llvm-nm/wasm/dylink.yaml
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
M llvm/test/tools/llvm-objdump/wasm/dylink-symbol-table.yaml
M llvm/test/tools/llvm-offload-binary/llvm-offload-binary.ll
M llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
M llvm/tools/llvm-dwp/Opts.td
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
M llvm/unittests/Target/RISCV/RISCVSelectionDAGTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
M llvm/utils/gn/secondary/clang/lib/Analysis/Scalable/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Analysis/Scalable/BUILD.gn
M llvm/utils/gn/secondary/lldb/include/lldb/Host/BUILD.gn
M llvm/utils/lit/lit/DiffUpdater.py
M llvm/utils/lit/lit/Test.py
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/cl_arguments.py
M llvm/utils/lit/lit/display.py
M llvm/utils/lit/lit/reports.py
A llvm/utils/lit/tests/Inputs/diff-test-update-retry/1.in
A llvm/utils/lit/tests/Inputs/diff-test-update-retry/lit.cfg
A llvm/utils/lit/tests/Inputs/diff-test-update-retry/multiple-split-file-enough-retries.in
A llvm/utils/lit/tests/Inputs/diff-test-update-retry/multiple-split-file-enough-retries.out
A llvm/utils/lit/tests/Inputs/diff-test-update-retry/multiple-split-file-no-enough-retries.out
A llvm/utils/lit/tests/Inputs/diff-test-update-retry/multiple-split-file-not-enough-retries.in
A llvm/utils/lit/tests/Inputs/diff-test-update-retry/multiple-split-file-not-enough-retries.out
A llvm/utils/lit/tests/Inputs/diff-test-update-retry/multiple-split-file-unrelated-failure.in
A llvm/utils/lit/tests/Inputs/diff-test-update-retry/multiple-split-file-unrelated-failure.out
A llvm/utils/lit/tests/Inputs/diff-test-update-retry/single-split-file.in
A llvm/utils/lit/tests/Inputs/diff-test-update-retry/single-split-file.out
A llvm/utils/lit/tests/diff-test-update-retry-default-verbosity.py
A llvm/utils/lit/tests/diff-test-update-retry-failed-or-flaky.py
A llvm/utils/lit/tests/diff-test-update-retry-quiet.py
A llvm/utils/lit/tests/diff-test-update-retry.py
M llvm/utils/lit/tests/diff-test-update.py
M llvm/utils/profcheck-xfail.txt
M mlir/Maintainers.md
M mlir/cmake/modules/AddMLIR.cmake
M mlir/docs/TargetLLVMIR.md
A mlir/include/mlir-c/Dialect/X86.h
R mlir/include/mlir-c/Dialect/X86Vector.h
M mlir/include/mlir-c/Rewrite.h
M mlir/include/mlir/Conversion/ArithCommon/AttrToLLVMConverter.h
M mlir/include/mlir/Conversion/LLVMCommon/Pattern.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/Affine/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/Affine/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOpsInterfaces.td
M mlir/include/mlir/Dialect/ArmNeon/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/ArmSME/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/ArmSVE/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/Bufferization/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/CMakeLists.txt
M mlir/include/mlir/Dialect/DLTI/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/Func/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/Func/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/GPU/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/GPU/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/LLVMIR/CMakeLists.txt
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/Linalg/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/Linalg/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/include/mlir/Dialect/MemRef/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/MemRef/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsLoop.h
M mlir/include/mlir/Dialect/SCF/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/SCF/TransformOps/SCFTransformOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaTypes.td
M mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h
M mlir/include/mlir/Dialect/Tensor/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/Tosa/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/Transform/DebugExtension/CMakeLists.txt
M mlir/include/mlir/Dialect/Transform/IR/CMakeLists.txt
M mlir/include/mlir/Dialect/Transform/IRDLExtension/CMakeLists.txt
M mlir/include/mlir/Dialect/Transform/LoopExtension/CMakeLists.txt
M mlir/include/mlir/Dialect/Transform/PDLExtension/CMakeLists.txt
M mlir/include/mlir/Dialect/Transform/SMTExtension/CMakeLists.txt
M mlir/include/mlir/Dialect/Transform/TuneExtension/CMakeLists.txt
M mlir/include/mlir/Dialect/Vector/IR/CMakeLists.txt
A mlir/include/mlir/Dialect/X86/CMakeLists.txt
A mlir/include/mlir/Dialect/X86/TransformOps/CMakeLists.txt
A mlir/include/mlir/Dialect/X86/TransformOps/X86TransformOps.h
A mlir/include/mlir/Dialect/X86/TransformOps/X86TransformOps.td
A mlir/include/mlir/Dialect/X86/Transforms.h
A mlir/include/mlir/Dialect/X86/Utils/X86Utils.h
A mlir/include/mlir/Dialect/X86/X86.td
A mlir/include/mlir/Dialect/X86/X86Dialect.h
A mlir/include/mlir/Dialect/X86/X86Interfaces.td
R mlir/include/mlir/Dialect/X86Vector/CMakeLists.txt
R mlir/include/mlir/Dialect/X86Vector/TransformOps/CMakeLists.txt
R mlir/include/mlir/Dialect/X86Vector/TransformOps/X86VectorTransformOps.h
R mlir/include/mlir/Dialect/X86Vector/TransformOps/X86VectorTransformOps.td
R mlir/include/mlir/Dialect/X86Vector/Transforms.h
R mlir/include/mlir/Dialect/X86Vector/Utils/X86VectorUtils.h
R mlir/include/mlir/Dialect/X86Vector/X86Vector.td
R mlir/include/mlir/Dialect/X86Vector/X86VectorDialect.h
R mlir/include/mlir/Dialect/X86Vector/X86VectorInterfaces.td
M mlir/include/mlir/Dialect/XeGPU/TransformOps/CMakeLists.txt
M mlir/include/mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h
M mlir/include/mlir/Tools/mlir-opt/MlirOptMain.h
M mlir/lib/Analysis/DataFlow/IntegerRangeAnalysis.cpp
M mlir/lib/Analysis/Presburger/PWMAFunction.cpp
M mlir/lib/Analysis/SliceAnalysis.cpp
M mlir/lib/Bindings/Python/IRAttributes.cpp
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/Rewrite.cpp
M mlir/lib/CAPI/Dialect/CMakeLists.txt
A mlir/lib/CAPI/Dialect/X86.cpp
R mlir/lib/CAPI/Dialect/X86Vector.cpp
M mlir/lib/CAPI/Transforms/Rewrite.cpp
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
M mlir/lib/Conversion/LLVMCommon/Pattern.cpp
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
M mlir/lib/Debug/DebugCounter.cpp
M mlir/lib/Dialect/AMDGPU/Transforms/FoldMemRefsOps.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/CMakeLists.txt
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/GPU/IR/ValueBoundsOpInterfaceImpl.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialectBytecode.cpp
M mlir/lib/Dialect/Math/Transforms/CMakeLists.txt
M mlir/lib/Dialect/Math/Transforms/PolynomialApproximation.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsLoop.cpp
M mlir/lib/Dialect/SCF/TransformOps/SCFTransformOps.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/TransformOps/CMakeLists.txt
M mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorMultiReduction.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
A mlir/lib/Dialect/X86/CMakeLists.txt
A mlir/lib/Dialect/X86/IR/CMakeLists.txt
A mlir/lib/Dialect/X86/IR/X86Dialect.cpp
A mlir/lib/Dialect/X86/TransformOps/CMakeLists.txt
A mlir/lib/Dialect/X86/TransformOps/X86TransformOps.cpp
A mlir/lib/Dialect/X86/Transforms/AVXTranspose.cpp
A mlir/lib/Dialect/X86/Transforms/CMakeLists.txt
A mlir/lib/Dialect/X86/Transforms/LegalizeForLLVMExport.cpp
A mlir/lib/Dialect/X86/Transforms/ShuffleVectorFMAOps.cpp
A mlir/lib/Dialect/X86/Transforms/SinkVectorProducerOps.cpp
A mlir/lib/Dialect/X86/Transforms/VectorContractBF16ToFMA.cpp
A mlir/lib/Dialect/X86/Transforms/VectorContractToFMA.cpp
A mlir/lib/Dialect/X86/Transforms/VectorContractToPackedTypeDotProduct.cpp
A mlir/lib/Dialect/X86/Utils/CMakeLists.txt
A mlir/lib/Dialect/X86/Utils/X86Utils.cpp
R mlir/lib/Dialect/X86Vector/CMakeLists.txt
R mlir/lib/Dialect/X86Vector/IR/CMakeLists.txt
R mlir/lib/Dialect/X86Vector/IR/X86VectorDialect.cpp
R mlir/lib/Dialect/X86Vector/TransformOps/CMakeLists.txt
R mlir/lib/Dialect/X86Vector/TransformOps/X86VectorTransformOps.cpp
R mlir/lib/Dialect/X86Vector/Transforms/AVXTranspose.cpp
R mlir/lib/Dialect/X86Vector/Transforms/CMakeLists.txt
R mlir/lib/Dialect/X86Vector/Transforms/LegalizeForLLVMExport.cpp
R mlir/lib/Dialect/X86Vector/Transforms/ShuffleVectorFMAOps.cpp
R mlir/lib/Dialect/X86Vector/Transforms/SinkVectorProducerOps.cpp
R mlir/lib/Dialect/X86Vector/Transforms/VectorContractBF16ToFMA.cpp
R mlir/lib/Dialect/X86Vector/Transforms/VectorContractToFMA.cpp
R mlir/lib/Dialect/X86Vector/Transforms/VectorContractToPackedTypeDotProduct.cpp
R mlir/lib/Dialect/X86Vector/Utils/CMakeLists.txt
R mlir/lib/Dialect/X86Vector/Utils/X86VectorUtils.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPeepHoleOptimizer.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToWiDistributeExperimental.cpp
M mlir/lib/RegisterAllDialects.cpp
M mlir/lib/RegisterAllExtensions.cpp
M mlir/lib/Target/LLVM/XeVM/Target.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
M mlir/lib/Transforms/RemoveDeadValues.cpp
M mlir/python/CMakeLists.txt
A mlir/python/mlir/dialects/X86.td
A mlir/python/mlir/dialects/X86TransformOps.td
R mlir/python/mlir/dialects/X86Vector.td
R mlir/python/mlir/dialects/X86VectorTransformOps.td
M mlir/python/mlir/dialects/ext.py
A mlir/python/mlir/dialects/transform/x86.py
R mlir/python/mlir/dialects/transform/x86vector.py
A mlir/python/mlir/dialects/x86.py
R mlir/python/mlir/dialects/x86vector.py
M mlir/test/Analysis/test-match-reduction.mlir
A mlir/test/Bytecode/bytecode_producer.mlir
M mlir/test/CMakeLists.txt
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv-unsupported.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
M mlir/test/Conversion/VectorToLLVM/pass-option-serialization.mlir
M mlir/test/Dialect/AMDGPU/amdgpu-fold-memrefs.mlir
M mlir/test/Dialect/Affine/canonicalize.mlir
M mlir/test/Dialect/Arith/canonicalize.mlir
M mlir/test/Dialect/Arith/int-range-narrowing.mlir
M mlir/test/Dialect/Arith/ops.mlir
M mlir/test/Dialect/ControlFlow/canonicalize.mlir
M mlir/test/Dialect/GPU/value-bounds-op-interface-impl.mlir
M mlir/test/Dialect/Math/polynomial-approximation.mlir
M mlir/test/Dialect/OpenACC/ops.mlir
M mlir/test/Dialect/SCF/transform-op-coalesce.mlir
M mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
M mlir/test/Dialect/SPIRV/IR/tosa-ops.mlir
M mlir/test/Dialect/Tensor/canonicalize.mlir
M mlir/test/Dialect/Vector/CPU/X86/vector-transpose-lowering.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/Vector/vector-multi-reduction-flattening.mlir
M mlir/test/Dialect/Vector/vector-unroll-options.mlir
A mlir/test/Dialect/X86/cvt-packed-f32-to-bf16.mlir
A mlir/test/Dialect/X86/dot-bf16.mlir
A mlir/test/Dialect/X86/legalize-for-llvm.mlir
A mlir/test/Dialect/X86/roundtrip.mlir
A mlir/test/Dialect/X86/shuffle-vector-fmas.mlir
A mlir/test/Dialect/X86/sink-vector-producer-ops.mlir
A mlir/test/Dialect/X86/vector-contract-bf16-to-fma.mlir
A mlir/test/Dialect/X86/vector-contract-to-fma.mlir
A mlir/test/Dialect/X86/vector-contract-to-packed-type-dotproduct.mlir
R mlir/test/Dialect/X86Vector/cvt-packed-f32-to-bf16.mlir
R mlir/test/Dialect/X86Vector/dot-bf16.mlir
R mlir/test/Dialect/X86Vector/legalize-for-llvm.mlir
R mlir/test/Dialect/X86Vector/roundtrip.mlir
R mlir/test/Dialect/X86Vector/shuffle-vector-fmas.mlir
R mlir/test/Dialect/X86Vector/sink-vector-producer-ops.mlir
R mlir/test/Dialect/X86Vector/vector-contract-bf16-to-fma.mlir
R mlir/test/Dialect/X86Vector/vector-contract-to-fma.mlir
R mlir/test/Dialect/X86Vector/vector-contract-to-packed-type-dotproduct.mlir
M mlir/test/Dialect/XeGPU/peephole-optimize.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Dialect/XeGPU/resolve-layout-conflicts.mlir
M mlir/test/Dialect/XeGPU/sg-to-wi-experimental-unit.mlir
A mlir/test/Integration/Dialect/Vector/CPU/X86/dot.mlir
A mlir/test/Integration/Dialect/Vector/CPU/X86/inline-asm-vector-avx512.mlir
A mlir/test/Integration/Dialect/Vector/CPU/X86/lit.local.cfg
A mlir/test/Integration/Dialect/Vector/CPU/X86/mask-compress.mlir
A mlir/test/Integration/Dialect/Vector/CPU/X86/rsqrt.mlir
A mlir/test/Integration/Dialect/Vector/CPU/X86/sparse-dot-product.mlir
A mlir/test/Integration/Dialect/Vector/CPU/X86/vp2intersect-i32.mlir
R mlir/test/Integration/Dialect/Vector/CPU/X86Vector/dot.mlir
R mlir/test/Integration/Dialect/Vector/CPU/X86Vector/inline-asm-vector-avx512.mlir
R mlir/test/Integration/Dialect/Vector/CPU/X86Vector/lit.local.cfg
R mlir/test/Integration/Dialect/Vector/CPU/X86Vector/mask-compress.mlir
R mlir/test/Integration/Dialect/Vector/CPU/X86Vector/rsqrt.mlir
R mlir/test/Integration/Dialect/Vector/CPU/X86Vector/sparse-dot-product.mlir
R mlir/test/Integration/Dialect/Vector/CPU/X86Vector/vp2intersect-i32.mlir
A mlir/test/Target/LLVMIR/openmp-simd-ordered.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
A mlir/test/Target/LLVMIR/openmp-wsloop-simd-ordered.mlir
A mlir/test/Target/LLVMIR/x86.mlir
R mlir/test/Target/LLVMIR/x86vector.mlir
M mlir/test/Target/SPIRV/tosa-ops.mlir
M mlir/test/Transforms/canonicalize.mlir
M mlir/test/Transforms/remove-dead-values.mlir
M mlir/test/lib/Dialect/Math/CMakeLists.txt
M mlir/test/lib/Dialect/Math/TestPolynomialApproximation.cpp
M mlir/test/lib/Dialect/Vector/CMakeLists.txt
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
M mlir/test/lit.cfg.py
M mlir/test/lit.site.cfg.py.in
M mlir/test/mlir-opt/commandline.mlir
A mlir/test/mlir-opt/debugcounter-invalid-cl-options.mlir
A mlir/test/mlir-runner/X86/lit.local.cfg
A mlir/test/mlir-runner/X86/math-polynomial-approx-avx2.mlir
R mlir/test/mlir-runner/X86Vector/lit.local.cfg
R mlir/test/mlir-runner/X86Vector/math-polynomial-approx-avx2.mlir
A mlir/test/mlir-tblgen/bytecode-write.td
M mlir/test/python/dialects/ext.py
A mlir/test/python/dialects/transform_x86_ext.py
R mlir/test/python/dialects/transform_x86vector_ext.py
A mlir/test/python/dialects/x86.py
R mlir/test/python/dialects/x86vector.py
M mlir/test/python/rewrite.py
M mlir/tools/mlir-tblgen/BytecodeDialectGen.cpp
M mlir/tools/mlir-tblgen/OpDocGen.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
M offload/liboffload/src/OffloadImpl.cpp
M offload/plugins-nextgen/level_zero/include/L0Program.h
A offload/test/offloading/fortran/target-descriptor-ops.f90
M openmp/runtime/test/parallel/bug63197.c
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
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