[all-commits] [llvm/llvm-project] 665473: [AArch64] Optimize 64-bit constant vector builds (...
Karthika Devi C via All-commits
all-commits at lists.llvm.org
Mon Feb 23 21:42:25 PST 2026
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 6654737d9af69df8b27483b66690fb44456fe567
https://github.com/llvm/llvm-project/commit/6654737d9af69df8b27483b66690fb44456fe567
Author: Karthika Devi C <quic_kartc at quicinc.com>
Date: 2026-02-24 (Tue, 24 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/arm64-neon-simd-ldst-one.ll
M llvm/test/CodeGen/AArch64/arm64-sli-sri-opt.ll
M llvm/test/CodeGen/AArch64/arm64-tbl.ll
A llvm/test/CodeGen/AArch64/const-vector-big-endian.ll
M llvm/test/CodeGen/AArch64/constant-pool-partition.ll
M llvm/test/CodeGen/AArch64/extract-vector-elt.ll
M llvm/test/CodeGen/AArch64/fcvt_combine.ll
M llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
M llvm/test/CodeGen/AArch64/neon-abd.ll
M llvm/test/CodeGen/AArch64/neon-mov.ll
M llvm/test/CodeGen/AArch64/neon-stepvector.ll
M llvm/test/CodeGen/AArch64/pr58350.ll
M llvm/test/CodeGen/AArch64/shuffle-tbl34.ll
M llvm/test/CodeGen/AArch64/shuffles.ll
M llvm/test/CodeGen/AArch64/srem-vector-lkk.ll
M llvm/test/CodeGen/AArch64/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/AArch64/urem-vector-lkk.ll
M llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
M llvm/test/CodeGen/AArch64/vec-combine-compare-truncate-store.ll
M llvm/test/CodeGen/AArch64/vector-extract-last-active.ll
Log Message:
-----------
[AArch64] Optimize 64-bit constant vector builds (#177076)
This patch optimizes the creation of constant 64-bit vectors (e.g.,
v2i32, v4i16) by avoiding expensive loads from the constant pool. The
optimization works by packing the constant vector elements into a single
i64 immediate and bitcasting the result to the target vector type. This
replaces a memory access with more efficient immediate materialization.
To ensure this transformation is efficient, a check is performed to
verify that the immediate can be generated in two or fewer mov
instructions. If it requires more, the compiler falls back to using the
constant pool.
The optimization is disabled for bigendian targets for now.
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