[all-commits] [llvm/llvm-project] 04914f: [AArch64][llvm] Remove `+d128` gating on `sysp`, `...

[Jonathan Thackray via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 04914f1e5f46585ad75691c762931335479df8f2
      https://github.com/llvm/llvm-project/commit/04914f1e5f46585ad75691c762931335479df8f2
  Author: Jonathan Thackray <jonathan.thackray at arm.com>
  Date:   2026-02-19 (Thu, 19 Feb 2026)

  Changed paths:
    M llvm/docs/ReleaseNotes.md
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/lib/Target/AArch64/AArch64SystemOperands.td
    M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
    M llvm/test/MC/AArch64/armv9-mrrs.s
    M llvm/test/MC/AArch64/armv9-msrr.s
    M llvm/test/MC/AArch64/armv9a-sysp.s
    A llvm/test/MC/AArch64/armv9a-tlbip.s
    M llvm/test/MC/AArch64/directive-arch_extension-negative.s
    M llvm/test/MC/AArch64/directive-arch_extension.s

  Log Message:
  -----------
  [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (#178912)

Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions.

We removed gating for `sys`, `mrs` and `mrs` instructions previously,
on the basis that it doesn't add value, as it doesn't indicate that
any particular system registers or system instructions are available.

Therefore, remove `+d128` gating for these instructions too.

(In upcoming change #178913, some `tlbip` instructions, which are `sysp`
aliases are allowed to be used with either `+d128` or `tlbid`. If we don't
remove this gating, then it would require some ugly work-arounds in the
code to support the relaxation mandated by the 2025 MemSys specification.

In this change, retain `+d128` gating for all `tlbip` instructions, which
will then be loosened to either `+d128` or `+tlbid` in a subsequent
change)



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