[all-commits] [llvm/llvm-project] e43143: InstCombine: Fold bitcast of vector with constant ...
Matt Arsenault via All-commits
all-commits at lists.llvm.org
Thu Feb 19 07:22:02 PST 2026
Branch: refs/heads/users/arsenm/instcombine/fold-bitcast-through-select-const-vector
Home: https://github.com/llvm/llvm-project
Commit: e43143c86823916df7788db16553a195a11bce42
https://github.com/llvm/llvm-project/commit/e43143c86823916df7788db16553a195a11bce42
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-19 (Thu, 19 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
A llvm/test/Transforms/InstCombine/bitcast-select-const-vector.ll
M llvm/test/Transforms/InstCombine/copysign.ll
M llvm/test/Transforms/InstCombine/fold-bin-operand.ll
Log Message:
-----------
InstCombine: Fold bitcast of vector with constant to scalar
Fold bitcast (select cond, val, const) ->
select cond, (bitcast val), (bitcast const)
Rocm device libs has an unfortunate amount of code that does bithacking
on the sign bit of double values by casting to <2 x i32> and operation
on the high element. This breaks value tracking optimizations on the
fp value.
The existing transform would only do this if the input to the select was
also a bitcast with a single use, and if it didn't convert between vector
and scalar.
Commit: c6126562081c155b9f0ac4e5935c2442023a95f3
https://github.com/llvm/llvm-project/commit/c6126562081c155b9f0ac4e5935c2442023a95f3
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-19 (Thu, 19 Feb 2026)
Changed paths:
M llvm/test/Transforms/InstCombine/bitcast-select-const-vector.ll
Log Message:
-----------
Add negative vselect test
Commit: ae7d28c7106b2c93d98be2479baf0440380c9aa8
https://github.com/llvm/llvm-project/commit/ae7d28c7106b2c93d98be2479baf0440380c9aa8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-19 (Thu, 19 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/bitcast-select-const-vector.ll
Log Message:
-----------
Restrict to not introduce select of vector
Allow reducing the number of vector elements, but
not increase.
Compare: https://github.com/llvm/llvm-project/compare/fd146bef1b1a...ae7d28c7106b
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