[all-commits] [llvm/llvm-project] 323924: [CodeGen] Introduce MIR-level target-independent r...

[Lucas Ramirez via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 32392468d713985434f48b0cf27d205cafe98a4c
      https://github.com/llvm/llvm-project/commit/32392468d713985434f48b0cf27d205cafe98a4c
  Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
  Date:   2026-02-19 (Thu, 19 Feb 2026)

  Changed paths:
    A llvm/include/llvm/CodeGen/Rematerializer.h
    M llvm/lib/CodeGen/CMakeLists.txt
    A llvm/lib/CodeGen/Rematerializer.cpp
    M llvm/unittests/CodeGen/CMakeLists.txt
    A llvm/unittests/CodeGen/RematerializerTest.cpp

  Log Message:
  -----------
  [CodeGen] Introduce MIR-level target-independent rematerialization helper (#177080)

This introduces a `Rematerializer` class that identifies register
rematerialization opportunities within a machine function and provides
an API to easily perform those rematerializations with a high level of
control. Its key feature is its ability to model relationships between
rematerializable registers and rematerialize arbitrarily complex groups
of registers at once to specific locations. The class comment describes
the underlying model in details.

This includes unit tests for the class to both verify its correct
behavior and showcase its current rematerialization capabilities.

This hopefully can be a step toward addressing long-standing
rematerialization limitations in LLVM backends. In the future, the goal
is to pair this support with generic or target-dependent strategies for
picking the best rematerialization opportunities to perform to achieve
some kind of objective (e.g., a specific register pressure target in
scheduling regions). As a concrete example, I intend to use this in the
AMDGPU scheduler to help in reducing spilling and/or increasing
occupancy in kernels.



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