[all-commits] [llvm/llvm-project] 5dc9f1: [clang][ARM] Refactor argument handling in `EmitAA...

[Andrzej Warzyński via All-commits]

  Branch: refs/heads/users/banach-space/clang/arm_builtins_extra_args
  Home:   https://github.com/llvm/llvm-project
  Commit: 5dc9f1a3aee2873a5169f35e1d3e97dfbcf1ef25
      https://github.com/llvm/llvm-project/commit/5dc9f1a3aee2873a5169f35e1d3e97dfbcf1ef25
  Author: Andrzej Warzynski <andrzej.warzynski at arm.com>
  Date:   2026-02-18 (Wed, 18 Feb 2026)

  Changed paths:
    M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
    M clang/test/CodeGen/arm64-microsoft-intrinsics.c

  Log Message:
  -----------
  [clang][ARM] Refactor argument handling in `EmitAArch64BuiltinExpr` (1/2) (NFC)

Refactor `EmitAArch64BuiltinExpr` so that all AArch64/NEON builtins
handled by this hook _and marked as non-overloaded_ share a common path
for generating LLVM IR arguments (collected into the `Ops`
`SmallVector<Value*>`) (*)

Previously, the argument emission loop unconditionally skipped the
trailing argument:

```cpp
  for (unsigned i = 0, e = E->getNumArgs() - 1; i != e; ++i)
```

This was originally intended to ignore the extra Sema-only argument
used by overloaded NEON builtins (e.g. the type discriminator passed
by `__builtin_neon_*` intrinsics). However, this logic was applied
unconditionally.

This patch updates the loop to skip the trailing argument only when
`HasExtraNeonArgument` returns true for non-SISD builtins:

```cpp
  bool HasExtraArg = !IsSISD && HasExtraNeonArgument(BuiltinID);
  unsigned NumArgs =
      E->getNumArgs() - (HasExtraArg ? 1 : 0);
  for (unsigned i = 0, e = NumArgs; i != e; ++i)
```

This preserves existing IR generation behaviour while making the
handling of Sema-only NEON discriminator arguments explicit.

For context, type discriminators can be found in definitions of various
builtins in `arm_neon.h`. For example, `vsriq_n_p64(<args>)` expands
into the following call:

```cpp
  __builtin_neon_vsriq_n_v(<args>, 38)
```

The trailing `38` encodes the concrete NEON vector type
(e.g. `poly64x2_t`) for overload resolution in Sema; it is not
semantically part of the operation and is ignored during IR generation.

As part of this change, `HasExtraNeonArgument` was completed so
that these discriminator arguments are correctly identified.

No functional change intended.

(*) This refers to two large `switch` stmts inside
`EmitAArch64BuiltinExpr` that are meant to switch the processing into
non-overloaded and overloaded builtins. The intended split between
non-overloaded and overloaded builtins is not consistently enforced: the
second switch (nominally handling overloaded builtins) also processes
some non-overloaded cases. This patch refactors only the first switch
and prepares for a follow-up cleanup in 2/2.



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