[all-commits] [llvm/llvm-project] edae8a: [Hexagon] Fix APInt assertion in getBuildVectorCon...

[Brian Cain via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: edae8a448504a73ca12b4e6dd66b00d0f1b00d0b
      https://github.com/llvm/llvm-project/commit/edae8a448504a73ca12b4e6dd66b00d0f1b00d0b
  Author: Brian Cain <brian.cain at oss.qualcomm.com>
  Date:   2026-02-13 (Fri, 13 Feb 2026)

  Changed paths:
    M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
    A llvm/test/CodeGen/Hexagon/udiv-vector-nonuniform.ll

  Log Message:
  -----------
  [Hexagon] Fix APInt assertion in getBuildVectorConstInts (#181202)

Truncate the ConstantSDNode APInt value to the element bit width before
creating the ConstantInt. After type legalization, a ConstantSDNode may
have a wider type than the vector element (e.g., i32 constant for an i16
element).



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