[all-commits] [llvm/llvm-project] 22985f: [clang][Builtins][ARM] NFC updates in ARM.cpp (#18...
Andrzej Warzyński via All-commits
all-commits at lists.llvm.org
Thu Feb 12 01:49:16 PST 2026
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 22985fe1f9395e3d3d83879b82158a5cc4fe7759
https://github.com/llvm/llvm-project/commit/22985fe1f9395e3d3d83879b82158a5cc4fe7759
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-02-12 (Thu, 12 Feb 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
Log Message:
-----------
[clang][Builtins][ARM] NFC updates in ARM.cpp (#180966)
Updates the logic in `CodeGenFunction::EmitAArch64BuiltinExpr` so that
we always start with the general code and we only fall-back to
specialised cases (i.e. `switch` stmts) for intrinsics for which the
general code does no apply.
BEFORE (only high-level:
```cpp
Value *CodeGenFunction::EmitAArch64BuiltinExpr() {
(...)
/// 1. SWITCH STMT FOR NON-OVERLOADED INTRINSIS
switch (BuiltinID) {
default break:
case NEON::BI__builtin_neon_vabsh_f16:
(...)
}
/// 2. GENERAL CODE
Builtin = findARMVectorIntrinsicInMap(AArch64SIMDIntrinsicMap, BuiltinID,
AArch64SIMDIntrinsicsProvenSorted);
if (Builtin)
return EmitCommonNeonBuiltinExpr(
Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic,
Builtin->NameHint, Builtin->TypeModifier, E, Ops,
/*never use addresses*/ Address::invalid(), Address::invalid(), Arch);
if (Value *V = EmitAArch64TblBuiltinExpr(*this, BuiltinID, E, Ops, Arch))
return V;
/// 3. SWITCH STMT FOR THE REMAINING INTRINSIS
switch (BuiltinID) {
default return nullptr:
case NEON::BI__builtin_neon_vbsl_v:
(...)
}
}
```
AFTER:
```cpp
Value *CodeGenFunction::EmitAArch64BuiltinExpr() {
/// 1. GENERAL CODE
Builtin = findARMVectorIntrinsicInMap(AArch64SIMDIntrinsicMap, BuiltinID,
AArch64SIMDIntrinsicsProvenSorted);
if (Builtin)
return EmitCommonNeonBuiltinExpr(
Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic,
Builtin->NameHint, Builtin->TypeModifier, E, Ops,
/*never use addresses*/ Address::invalid(), Address::invalid(), Arch);
if (Value *V = EmitAArch64TblBuiltinExpr(*this, BuiltinID, E, Ops, Arch))
return V;
/// 2. SWITCH STMT FOR NON-OVERLOADED INTRINSIS
switch (BuiltinID) {
default break:
case NEON::BI__builtin_neon_vabsh_f16:
(...)
}
/// 3. SWITCH STMT FOR THE REMAINING INTRINSIS
switch (BuiltinID) {
default return nullptr:
case NEON::BI__builtin_neon_vbsl_v:
(...)
}
}
```
In addition:
* Remove `vaddq_p128+ vcvtq_high_bf16_f32 + vcvtq_low_bf16_f32` from
`AArch64SIMDIntrinsicMap`. Those were not required
there (it's an array for intrinsics for which the general code-gen
works, but that's not the case for those).
* Extracted the declaration of `Int` so that it can be re-used.
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