[all-commits] [llvm/llvm-project] d4c7d5: [CIR] X86 vector masked load builtins (#169464)
woruyu via All-commits
all-commits at lists.llvm.org
Wed Feb 11 15:03:55 PST 2026
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: d4c7d5be340d1eb78b55bd86b6c041d123cba1b1
https://github.com/llvm/llvm-project/commit/d4c7d5be340d1eb78b55bd86b6c041d123cba1b1
Author: woruyu <1214539920 at qq.com>
Date: 2026-02-11 (Wed, 11 Feb 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGenBuiltins/X86/avx512vl-builtins.c
Log Message:
-----------
[CIR] X86 vector masked load builtins (#169464)
Add a new CIR masked load operation and use it to handle X86 masked load builtins.
Part of https://github.com/llvm/llvm-project/issues/167752
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