[all-commits] [llvm/llvm-project] ffe446: [RISCV] Relax reversed mask's mask requirement in ...

[Luke Lau via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ffe446e7348c1a5efb4cdf0ee10eb1f09822bc0f
      https://github.com/llvm/llvm-project/commit/ffe446e7348c1a5efb4cdf0ee10eb1f09822bc0f
  Author: Luke Lau <luke at igalia.com>
  Date:   2026-02-11 (Wed, 11 Feb 2026)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/vp-combine-reverse-load.ll
    M llvm/test/CodeGen/RISCV/rvv/vp-combine-store-reverse.ll

  Log Message:
  -----------
  [RISCV] Relax reversed mask's mask requirement in reverse to strided load/store combine (#180706)

We have combines for vp.reverse(vp.load) -> vp.strided.load stride=-1
and vp.store(vp.reverse) -> vp.strided.store stride=-1.

If the load or store is masked, the mask needs to be also a vp.reverse
with the same EVL. However we also have the requirement that the mask's
vp.reverse is unmasked (has an all-ones mask).

vp.reverse's mask only sets masked off lanes to poison, and doesn't
affect the permutation of elements. So given those lanes are poison, I
believe the combine is valid for any mask, not just all ones.

This is split off from another patch I plan on posting to generalize
those combines to vector.splice+vector.reverse patterns, as part of
#172961



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