[all-commits] [llvm/llvm-project] 70b96b: [NewPM] Port x86-insert-x87-wait (#180128)

[Kyungtak Woo via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 70b96befd832f45a007dc8788a38ff849b3f9a98
      https://github.com/llvm/llvm-project/commit/70b96befd832f45a007dc8788a38ff849b3f9a98
  Author: Kyungtak Woo <kevinwkt at google.com>
  Date:   2026-02-10 (Tue, 10 Feb 2026)

  Changed paths:
    M llvm/lib/Target/X86/CMakeLists.txt
    M llvm/lib/Target/X86/X86.h
    M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
    R llvm/lib/Target/X86/X86InsertWait.cpp
    A llvm/lib/Target/X86/X86InsertX87Wait.cpp
    M llvm/lib/Target/X86/X86PassRegistry.def
    M llvm/lib/Target/X86/X86TargetMachine.cpp
    M llvm/test/CodeGen/X86/llc-pipeline-npm.ll

  Log Message:
  -----------
  [NewPM] Port x86-insert-x87-wait (#180128)

Similar to other portings created by @aidenboom154. No specific test
coverage as there are no MIR->MIR tests that exercise this pass. Going
with other naming conventions, I renamed WaitInsert to
X86InsertX87WaitLegacy



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications