[all-commits] [llvm/llvm-project] b02b39: [AMDGPU] Asynchronous loads from global/buffer to ...

Sameer Sahasrabuddhe via All-commits all-commits at lists.llvm.org
Tue Feb 10 21:27:19 PST 2026


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b02b395a1e75030708efc099f449f96436a90141
      https://github.com/llvm/llvm-project/commit/b02b395a1e75030708efc099f449f96436a90141
  Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
  Date:   2026-02-11 (Wed, 11 Feb 2026)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsAMDGPU.td
    M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
    M clang/lib/Sema/SemaAMDGPU.cpp
    M clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-lds.cl
    M clang/test/CodeGenOpenCL/builtins-amdgcn-load-to-lds.cl
    M clang/test/CodeGenOpenCL/builtins-amdgcn-raw-buffer-load-lds.cl
    A llvm/docs/AMDGPUAsyncOperations.rst
    M llvm/docs/AMDGPUUsage.rst
    M llvm/docs/UserGuides.rst
    M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
    M llvm/lib/Target/AMDGPU/AMDGPU.td
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/lib/Target/AMDGPU/BUFInstructions.td
    M llvm/lib/Target/AMDGPU/FLATInstructions.td
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    A llvm/test/CodeGen/AMDGPU/async-buffer-loads.ll
    A llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
    M llvm/test/CodeGen/AMDGPU/hazard-flat-instruction-valu-check.mir
    M llvm/test/CodeGen/AMDGPU/insert-waitcnts-fence-soft.mir
    M llvm/test/CodeGen/AMDGPU/lds-dma-hazards.mir
    M llvm/test/CodeGen/AMDGPU/lds-dma-waitcnt.mir
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.lds.err.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.to.lds.gfx950.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.to.lds.ll
    M llvm/test/CodeGen/AMDGPU/sched.group.classification.mir

  Log Message:
  -----------
  [AMDGPU] Asynchronous loads from global/buffer to LDS on pre-GFX12 (#180466)

The existing "LDS DMA" builtins/intrinsics copy data from global/buffer
pointer to LDS. These are now augmented with their ".async" version,
where the compiler does not automatically track completion. The
completion is now tracked using explicit mark/wait intrinsics, which
must be inserted by the user. This makes it possible to write programs
with efficient waits in software pipeline loops. The program can now
wait for only the oldest outstanding operations to finish, while
launching more operations for later use.

This change only contains the new names of the builtins/intrinsics,
which continue to behave exactly like their non-async counterparts. A
later change will implement the actual mark/wait semantics in
SIInsertWaitcnts.

This is part of a stack split out from #173259:
- #180467
- #180466

Fixes: SWDEV-521121



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