[all-commits] [llvm/llvm-project] 73e9c7: [lldb-dap] Add ASan report (#178858)
woruyu via All-commits
all-commits at lists.llvm.org
Tue Feb 10 19:43:50 PST 2026
Branch: refs/heads/users/pcc/spr/main.prepare-libcxx-and-libcxxabi-for-pointer-field-protection
Home: https://github.com/llvm/llvm-project
Commit: 73e9c72227b4b493fd520cd615ca82b70769ebd7
https://github.com/llvm/llvm-project/commit/73e9c72227b4b493fd520cd615ca82b70769ebd7
Author: Sergei Druzhkov <serzhdruzhok at gmail.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
A lldb/test/API/tools/lldb-dap/exception/asan/Makefile
A lldb/test/API/tools/lldb-dap/exception/asan/TestDAP_asan.py
A lldb/test/API/tools/lldb-dap/exception/asan/categories
A lldb/test/API/tools/lldb-dap/exception/asan/main.cpp
R lldb/test/API/tools/lldb-dap/exception/runtime-instruments/Makefile
R lldb/test/API/tools/lldb-dap/exception/runtime-instruments/TestDAP_runtime_instruments.py
R lldb/test/API/tools/lldb-dap/exception/runtime-instruments/categories
R lldb/test/API/tools/lldb-dap/exception/runtime-instruments/main.c
A lldb/test/API/tools/lldb-dap/exception/ubsan/Makefile
A lldb/test/API/tools/lldb-dap/exception/ubsan/TestDAP_ubsan.py
A lldb/test/API/tools/lldb-dap/exception/ubsan/categories
A lldb/test/API/tools/lldb-dap/exception/ubsan/main.c
M lldb/tools/lldb-dap/Handler/ExceptionInfoRequestHandler.cpp
Log Message:
-----------
[lldb-dap] Add ASan report (#178858)
Added `ASanReport` for `ExceptionInfo` request.
Commit: 46a38488a4d3eeda2a60feac3b99ad366263935b
https://github.com/llvm/llvm-project/commit/46a38488a4d3eeda2a60feac3b99ad366263935b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/PowerPC/disjoint-or-reductions.ll
Log Message:
-----------
[SLP]Disable modeling disjoint reduction or as bitcast for big endian
Big endian targets cannot be modeled as bitcast, need to support it as
a reversion/bswap instead, just disabling it for now.
Commit: a47f3802bfd7f8f4c56cb11bad89d844398e6662
https://github.com/llvm/llvm-project/commit/a47f3802bfd7f8f4c56cb11bad89d844398e6662
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/ptrauth-intrinsic-auth-resign-with-blend.ll
M llvm/test/CodeGen/AArch64/ptrauth-isel.ll
Log Message:
-----------
[AArch64][PAC] Mark $Scratch operand of AUTxMxN as earlyclobber (#173999)
This fixes an assertions when emitting code at `-O0`.
Commit: 85919fbfa4e8a2658e8ff7c83e856e3a88590b80
https://github.com/llvm/llvm-project/commit/85919fbfa4e8a2658e8ff7c83e856e3a88590b80
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
M llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
Log Message:
-----------
[perf] Replace copy-assign by move-assign in llvm/lib/Target/AMDGPU/ (#179460)
Commit: 28a0cfa946c501af9aea367fe0efe0ac1420f817
https://github.com/llvm/llvm-project/commit/28a0cfa946c501af9aea367fe0efe0ac1420f817
Author: Mingjie Xu <xumingjie.enna1 at bytedance.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/unittests/Transforms/Utils/BasicBlockUtilsTest.cpp
Log Message:
-----------
Reland "[BasicBlockUtils] Fix dominator tree update for entry block in splitBlockBefore() (#178895) (#179392)
https://github.com/llvm/llvm-project/pull/178895 caused a clang
crash(see https://lab.llvm.org/buildbot/#/builders/210/builds/8229),
reverted in 6d52d2683c2ceb9ab75810730c3ced2509c32bc5.
The crash is assertion `DT && "DT should be available to update
LoopInfo!"' failed.
https://github.com/llvm/llvm-project/blob/ad8d5349d46734826aaeae4a2ebdc6f427a5bad8/llvm/lib/Transforms/Utils/BasicBlockUtils.cpp#L1106
```
#7 0x00007f5a380254e3 __assert_perror_fail (/usr/lib/libc.so.6+0x254e3)
#8 0x0000563df5d8fde1 UpdateAnalysisInformation(llvm::BasicBlock*, llvm::BasicBlock*, llvm::ArrayRef<llvm::BasicBlock*>, llvm::DomTreeUpdater*, llvm::DominatorTree*, llvm::LoopInfo*, llvm::MemorySSAUpdater*, bool, bool&) BasicBlockUtils.cpp:0:0
#9 0x0000563df5d8f3bb llvm::splitBlockBefore(llvm::BasicBlock*, llvm::ilist_iterator_w_bits<llvm::ilist_detail::node_options<llvm::Instruction, true, false, void, true, llvm::BasicBlock>, false, false>, llvm::DomTreeUpdater*, llvm::LoopInfo*, llvm::MemorySSAUpdater*, llvm::Twine const&)
#10 0x0000563df5d8cb08 llvm::SplitEdge(llvm::BasicBlock*, llvm::BasicBlock*, llvm::DominatorTree*, llvm::LoopInfo*, llvm::MemorySSAUpdater*, llvm::Twine const&)
#11 0x0000563df4ff5b59 (anonymous namespace)::CodeGenPrepare::splitLargeGEPOffsets()::$_1::operator()(long, llvm::Value*, llvm::GetElementPtrInst*) const CodeGenPrepare.cpp:0:0
#12 0x0000563df4fc0ec8 (anonymous namespace)::CodeGenPrepare::_run(llvm::Function&) CodeGenPrepare.cpp:0:0
#13 0x0000563df4fbb36c (anonymous namespace)::CodeGenPrepareLegacyPass::runOnFunction(llvm::Function&) CodeGenPrepare.cpp:0:0
```
I think this happened when we get DominatorTree with `DT.get()` in
`splitLargeGEPOffsets()` but `DT.reset()` already setting it to nullptr
in
https://github.com/llvm/llvm-project/blob/ad8d5349d46734826aaeae4a2ebdc6f427a5bad8/llvm/lib/CodeGen/CodeGenPrepare.cpp#L660.
To fix this assertion failure, use `getDT()` for
`splitLargeGEPOffsets()` to build the DominatorTree if it is set to
nullptr by `DT.reset()`.
I don't have a RSIC-V environment, so no reproducer. Checked that the
crash is fixed by rerunning buildbot with this patch
https://lab.llvm.org/buildbot/#/builders/210/builds/8248
Commit: 2f4cca69c7bd3db5dfb9e7b7258c1cf6e0dc476e
https://github.com/llvm/llvm-project/commit/2f4cca69c7bd3db5dfb9e7b7258c1cf6e0dc476e
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M flang/test/Lower/dummy-argument-assumed-shape-optional.f90
M flang/test/Lower/dummy-argument-contiguous.f90
M flang/test/Lower/dummy-argument-optional-2.f90
M flang/test/Lower/dummy-argument-optional.f90
M flang/test/Lower/dummy-arguments.f90
Log Message:
-----------
[flang][NFC] Converted five tests from old lowering to new lowering (part 13) (#179161)
Tests converted from test/Lower:
dummy-argument-assumed-shape-optional.f90,
dummy-argument-contiguous.f90, dummy-argument-optional.f90,
dummy-argument-optional-2.f90, dummy-arguments.f90
Commit: e0d922ee20e1948b2a1a2aa9689ceb14796d2a91
https://github.com/llvm/llvm-project/commit/e0d922ee20e1948b2a1a2aa9689ceb14796d2a91
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Semantics/resolve-names.cpp
Log Message:
-----------
[flang][OpenMP] Add source range to construct scopes (#179259)
Make sure to add the source range whenever we create a scope for an
OpenMP construct or a clause. This allows that scope to be located via
context.FindScope(source).
Commit: 9f47caed05da553d47ab504d1aeff9d76f70020e
https://github.com/llvm/llvm-project/commit/9f47caed05da553d47ab504d1aeff9d76f70020e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrFormatsV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
Log Message:
-----------
[RISCV] Use RISCVWidth in interface for vector load/store classes in RISCVInstrFormatsV.td. NFC (#179348)
This avoids repeating the splitting into mew/width in multiple places.
---------
Co-authored-by: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Commit: 0d5e58df2e3ba17c898dc1873e93e786ce2bcfa7
https://github.com/llvm/llvm-project/commit/0d5e58df2e3ba17c898dc1873e93e786ce2bcfa7
Author: Fateme Hosseini <quic_fhossein at quicinc.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/test/CodeGen/Hexagon/inst_setcc_uno_uo.ll
Log Message:
-----------
[Hexagon] Fix a bug in setcc isnan lit test for f16 (#179338)
Commit: d6211b112fa75fb5aa0bcd3885d3c9c36f4deece
https://github.com/llvm/llvm-project/commit/d6211b112fa75fb5aa0bcd3885d3c9c36f4deece
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/IR/Builders.h
M mlir/include/mlir/IR/Types.h
M mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
M mlir/lib/IR/Builders.cpp
M mlir/lib/IR/Types.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/test/Dialect/SPIRV/IR/arithmetic-ops.mlir
M mlir/test/Dialect/SPIRV/IR/composite-ops.mlir
M mlir/test/Dialect/SPIRV/IR/structure-ops.mlir
M mlir/test/Dialect/SPIRV/IR/types.mlir
M mlir/test/Target/SPIRV/constant.mlir
Log Message:
-----------
[mlir][spirv] Add SPV_EXT_float8 support (#179246)
Reference:
https://github.khronos.org/SPIRV-Registry/extensions/EXT/SPV_EXT_float8.html
---------
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>
Commit: 030fc7d08ef8a3120f857b2c2dc9ced498530ef0
https://github.com/llvm/llvm-project/commit/030fc7d08ef8a3120f857b2c2dc9ced498530ef0
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/test/CodeGen/RISCV/rvv/ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll
Log Message:
-----------
[LegalizeTypes] Don't promote operands to VP extends (#179475)
This is part of the work to remove trivial VP intrinsics.
When promoting the result of a VP node, if we need to extend an operand
then we also extend it with a VP node.
We don't check if the VP node is legal though which will cause crashes
if the target doesn't support VP_ZEXT/VP_SEXT. This switches it to use a
regular non-VP node to extend instead.
Commit: 55174f936ba036f22f29c936aee69e4f4cda338a
https://github.com/llvm/llvm-project/commit/55174f936ba036f22f29c936aee69e4f4cda338a
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M libc/src/string/memory_utils/aarch64/inline_memcpy.h
Log Message:
-----------
[libc][SVE] add sve handling for memcpy with count less than 32b (#167446)
Add SVE optimization for AArch64 architectures. The idea is to use
predicate registers to avoid branching.
Microbench in repo shows considerable improvements on NV GB10 (locked on
largest X925):
```
======================================================================
BENCHMARK STATISTICS (time in nanoseconds)
======================================================================
memcpy_Google_A:
Old - Mean: 3.1257 ns, Median: 3.1162 ns
New - Mean: 2.8402 ns, Median: 2.8265 ns
Improvement: +9.14% (mean), +9.30% (median)
memcpy_Google_B:
Old - Mean: 2.3171 ns, Median: 2.3159 ns
New - Mean: 1.6589 ns, Median: 1.6593 ns
Improvement: +28.40% (mean), +28.35% (median)
memcpy_Google_D:
Old - Mean: 8.7602 ns, Median: 8.7645 ns
New - Mean: 8.4307 ns, Median: 8.4308 ns
Improvement: +3.76% (mean), +3.81% (median)
memcpy_Google_L:
Old - Mean: 1.7137 ns, Median: 1.7091 ns
New - Mean: 1.4530 ns, Median: 1.4553 ns
Improvement: +15.22% (mean), +14.85% (median)
memcpy_Google_M:
Old - Mean: 1.9823 ns, Median: 1.9825 ns
New - Mean: 1.4826 ns, Median: 1.4840 ns
Improvement: +25.20% (mean), +25.15% (median)
memcpy_Google_Q:
Old - Mean: 1.6812 ns, Median: 1.6784 ns
New - Mean: 1.1538 ns, Median: 1.1517 ns
Improvement: +31.37% (mean), +31.38% (median)
memcpy_Google_S:
Old - Mean: 2.1816 ns, Median: 2.1786 ns
New - Mean: 1.6297 ns, Median: 1.6287 ns
Improvement: +25.29% (mean), +25.24% (median)
memcpy_Google_U:
Old - Mean: 2.2851 ns, Median: 2.2825 ns
New - Mean: 1.7219 ns, Median: 1.7187 ns
Improvement: +24.65% (mean), +24.70% (median)
memcpy_Google_W:
Old - Mean: 2.0408 ns, Median: 2.0361 ns
New - Mean: 1.5260 ns, Median: 1.5252 ns
Improvement: +25.23% (mean), +25.09% (median)
uniform_384_to_4096:
Old - Mean: 26.9067 ns, Median: 26.8845 ns
New - Mean: 26.8083 ns, Median: 26.8149 ns
Improvement: +0.37% (mean), +0.26% (median)
```
The beginning of the memcpy function looks like the following:
```
Dump of assembler code for function _ZN22__llvm_libc_22_0_0_git6memcpyEPvPKvm:
0x0000000000001340 <+0>: cbz x2, 0x143c <_ZN22__llvm_libc_22_0_0_git6memcpyEPvPKvm+252>
0x0000000000001344 <+4>: cbz x0, 0x1440 <_ZN22__llvm_libc_22_0_0_git6memcpyEPvPKvm+256>
0x0000000000001348 <+8>: cbz x1, 0x1444 <_ZN22__llvm_libc_22_0_0_git6memcpyEPvPKvm+260>
0x000000000000134c <+12>: subs x8, x2, #0x20
0x0000000000001350 <+16>: b.hi 0x1374 <_ZN22__llvm_libc_22_0_0_git6memcpyEPvPKvm+52> // b.pmore
0x0000000000001354 <+20>: rdvl x8, #1
0x0000000000001358 <+24>: whilelo p0.b, xzr, x2
0x000000000000135c <+28>: ld1b {z0.b}, p0/z, [x1]
0x0000000000001360 <+32>: whilelo p1.b, x8, x2
0x0000000000001364 <+36>: ld1b {z1.b}, p1/z, [x1, #1, mul vl]
0x0000000000001368 <+40>: st1b {z0.b}, p0, [x0]
0x000000000000136c <+44>: st1b {z1.b}, p1, [x0, #1, mul vl]
0x0000000000001370 <+48>: ret
```
---------
Co-authored-by: Guillaume Chatelet <chatelet.guillaume at gmail.com>
Commit: 466c22ba47340bdcd07c758d53721a533df04e1f
https://github.com/llvm/llvm-project/commit/466c22ba47340bdcd07c758d53721a533df04e1f
Author: Kito Cheng <kito.cheng at sifive.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoC.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZcmop.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZicfiss.td
M llvm/test/MC/Disassembler/RISCV/c_lui_disasm.txt
M llvm/test/MC/RISCV/compressed-zicfiss.s
M llvm/test/MC/RISCV/invalid-instruction-spellcheck.s
M llvm/test/MC/RISCV/rv32i-invalid.s
M llvm/test/MC/RISCV/rvzcmop-valid.s
M llvm/test/MC/RISCV/rvzihintntl-invalid.s
M llvm/test/MC/RISCV/rvzihintntl-valid.s
M llvm/test/MC/RISCV/rvzihintntlc-valid.s
M llvm/test/MC/RISCV/rvzihintpause-aliases-valid.s
M llvm/test/MC/RISCV/zicfilp-invalid.s
M llvm/test/MC/RISCV/zicfilp-valid.s
M llvm/test/MC/RISCV/zicfiss-valid.s
Log Message:
-----------
[RISCV] Make MOP/HINT-based instruction mnemonics always available (#178609)
Per the psABI discussion in riscv-non-isa/riscv-elf-psabi-doc#474, the
conclusion was to NOT introduce a new build attribute for MOP/HINT
encoding reinterpretation. Instead, the toolchain should recognize these
mnemonics unconditionally in the assembler and disassembler.
The rationale is that these encodings occupy reserved hint/MOP space
that is architecturally guaranteed not to trap on any compliant
implementation. Requiring explicit extension flags creates unnecessary
friction for users who simply want to write or read these instructions,
while providing no real safety benefit since the encodings are always
valid.
Note: Ideally, the ISA specification would explicitly guarantee that
these MOP/HINT encodings will never be reassigned to conflicting
instructions. However, the ISA architects prefer to preserve flexibility
in this area rather than making such guarantees in the spec. Given the
practical reality that reassignment is highly unlikely, the toolchain
takes the pragmatic approach of always recognizing these mnemonics.
This change makes the following mnemonics always available:
- lpad (Zicfilp): AUIPC hint encoding, always valid
- pause (Zihintpause): FENCE hint encoding, always valid
- ntl.* (Zihintntl): ADD hint encoding, always valid
- c.ntl.* (Zihintntl+C): requires C extension only
- sspush/sspopchk/ssrdp (Zicfiss): requires Zimop only (MOP encoding)
- c.sspush/c.sspopchk (Zicfiss+Zcmop): requires Zcmop only
Note: ssamoswap.w/d still requires Zicfiss as they use AMO encoding
space rather than MOP encoding.
Codegen patterns remain unchanged in this patch - generating these
instructions in the compiler backend still requires the full extension
to be enabled. A follow-up patch will relax this restriction as well,
since these instructions are fundamentally MOP/HINT encodings that
should be safe to generate regardless of extension availability.
Link: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/474
Commit: eb1ae5b575e51d79c8edbcbd43a09c43cea1b6d6
https://github.com/llvm/llvm-project/commit/eb1ae5b575e51d79c8edbcbd43a09c43cea1b6d6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
Log Message:
-----------
[RISCV] Wrap some long lines in RISCVInstrInfoV.td. NFC
Remove unnecessary braces from assembly strings.
Commit: 71a37dd4b9b46cf7d90657c1f1006744a20e18cb
https://github.com/llvm/llvm-project/commit/71a37dd4b9b46cf7d90657c1f1006744a20e18cb
Author: Jack Frankland <jack.frankland at arm.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/test/Conversion/VectorToGPU/vector-to-mma-ops.mlir
Log Message:
-----------
[mlir][vector-to-gpu]: Extend MMA Lowerings (#176785)
Add support for lowering non-minor-identity maps during
`vector.transfer_read` and `vector.transfer_write` to
`gpu.subgroup_mma_load_matrix` and `gpu.subgroup_mma_store_matrix`
lowerings. If
the permutation map is a "strided minor identity", that is it jumps some
intermediate dimensions e.g. (d0, d1, d2) -> (d0, d2) then we can
express this stride in the `leadDimension` attribute of the
`gpu.subgroup_mma_load_matrix` and stride over the missing intermediate
dimensions when we load.
Signed-off-by: Jack Frankland <jack.frankland at arm.com>
Commit: e96ad4a48b7980645812eba42d8a1aa8003a0833
https://github.com/llvm/llvm-project/commit/e96ad4a48b7980645812eba42d8a1aa8003a0833
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
Log Message:
-----------
[OpenMPOpt] avoid OOB array write (#178686)
When analysis reaches code with UB at runtime, this write needs to be
ignored to avoid corrupting memory with UB at compile time.
Drive-by finding during review of
https://github.com/llvm/llvm-project/pull/178356.
Commit: 5587993548a6d764334c12b46616aa48606f2d6f
https://github.com/llvm/llvm-project/commit/5587993548a6d764334c12b46616aa48606f2d6f
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
A lldb/include/lldb/DataFormatters/FormatterBytecode.def
A lldb/include/lldb/DataFormatters/FormatterBytecode.h
M lldb/source/DataFormatters/FormatterBytecode.cpp
R lldb/source/DataFormatters/FormatterBytecode.def
R lldb/source/DataFormatters/FormatterBytecode.h
M lldb/source/DataFormatters/FormatterSection.cpp
M lldb/source/DataFormatters/TypeSummary.cpp
M lldb/unittests/DataFormatter/FormatterBytecodeTest.cpp
Log Message:
-----------
[lldb] Move FormatterBytecode.{h,def} to include/ (#179355)
To allow other headers to reference types declared in `FormatterBytecode.h`.
Commit: e07a1182fd58a5b48a2c78bc3ae03872186d4ae0
https://github.com/llvm/llvm-project/commit/e07a1182fd58a5b48a2c78bc3ae03872186d4ae0
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M libc/cmake/modules/prepare_libc_gpu_build.cmake
M libc/docs/gpu/building.rst
M libc/startup/gpu/CMakeLists.txt
Log Message:
-----------
[libc] Tweak the runtimes cross-build for GPU (#178548)
Summary:
We should likely use `-DLLVM_DEFAULT_TARGET_TRIPLE` as the general
source of truth, make the handling work with that since we use it for
the output directories. Fix the creation of startup files in this mode
and make sure it can detect the GPU properly.
Fixes: https://github.com/llvm/llvm-project/issues/179375
Commit: 00fb7f86f83612bccde8d4df1ccc8c2424a250a6
https://github.com/llvm/llvm-project/commit/00fb7f86f83612bccde8d4df1ccc8c2424a250a6
Author: SiliconA-Z <gfunni234 at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/saturating-add-sub.ll
Log Message:
-----------
[InstCombine] Extend canonicalization of addition to positive numbers (#179343)
https://alive2.llvm.org/ce/z/6PQdaP
Extend https://github.com/llvm/llvm-project/pull/153053 to positive numbers too.
Commit: 51e5b6c6acc01a41581ac5631edcc7fc974310b5
https://github.com/llvm/llvm-project/commit/51e5b6c6acc01a41581ac5631edcc7fc974310b5
Author: John Harrison <harjohn at google.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setExceptionBreakpoints.py
M lldb/test/API/tools/lldb-dap/exception/objc/TestDAP_exception_objc.py
A lldb/test/API/tools/lldb-dap/stopped-events/Makefile
A lldb/test/API/tools/lldb-dap/stopped-events/TestDAP_stopped_events.py
A lldb/test/API/tools/lldb-dap/stopped-events/main.cpp
M lldb/test/API/tools/lldb-dap/threads/TestDAP_threads.py
M lldb/tools/lldb-dap/EventHelper.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/Protocol/ProtocolEvents.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolEvents.h
M lldb/tools/lldb-dap/SBAPIExtras.h
M lldb/unittests/DAP/CMakeLists.txt
A lldb/unittests/DAP/ProtocolEventsTest.cpp
Log Message:
-----------
[lldb-dap] Migrating 'stopped' event to structured types. (#176273)
Updates the 'stopped' event to use structure types.
Additionally, I adjusted the description to include the full
`GetStopDescription` that can have more details.
Commit: 114f7808554b6959156bc205b5bfa1827a621823
https://github.com/llvm/llvm-project/commit/114f7808554b6959156bc205b5bfa1827a621823
Author: Gauravsingh Sisodia <xaerru at gmail.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/intrinsic-select.ll
Log Message:
-----------
[InstCombine] Fold select of intrinsic into intrinsic of select (#178002)
Fix https://github.com/llvm/llvm-project/issues/140917
Transform:
`select cond, intrinsic(x, ...), intrinsic(y, ...)`
into:
`intrinsic(select cond, x, y, ...)`
for `ctpop/ctlz/cttz/abs`.
alive2 proof: https://alive2.llvm.org/ce/z/Zp55Dy
Commit: 299761d7cfc9e53b88269b6b4f3bfc6f5d539b13
https://github.com/llvm/llvm-project/commit/299761d7cfc9e53b88269b6b4f3bfc6f5d539b13
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
A llvm/test/CodeGen/AMDGPU/GlobalISel/unmerge-sgpr-s16.mir
Log Message:
-----------
AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (#179440)
Commit: dfbf4eb88e845aacb3e4f702bbf2349eb33e8d55
https://github.com/llvm/llvm-project/commit/dfbf4eb88e845aacb3e4f702bbf2349eb33e8d55
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
Log Message:
-----------
[AMDGPU][Scheduler] Fix incorrect region index in EXPENSIVE_CHECKS (#179461)
#177206 exposed a pre-existing typo in EXPENSIVE_CHECKS in the
scheduler's rematerialization stage. When rematerializing a register
that depends on other registers, the dependent registers should be live
at the live-ins of the rematerialized register's using region, but not
necessarily at the live-ins of its defining region, as it is written
right now.
This fixes that and also hoists the check from the loop on regions where
the rematerialized register is live, since it's only supposed to run
once for the using region anyway. This fixes the following unit tests
which were failing when building with EXPENSIVE_CHECKS.
- `CodeGen/AMDGPU/copy-hoist-no-spills.ll`
- `CodeGen/AMDGPU/sched_mfma_rewrite_copies.mir`
Commit: e39d2822bce28c557241bf79fd930fe6dcef840c
https://github.com/llvm/llvm-project/commit/e39d2822bce28c557241bf79fd930fe6dcef840c
Author: Abhay Kanhere <abhay at kanhere.net>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/ptrauth.h
M clang/lib/Sema/SemaChecking.cpp
M clang/test/CodeGen/ptrauth-intrinsics.c
M clang/test/Sema/ptrauth.c
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Transforms/Utils/Local.cpp
A llvm/test/CodeGen/AArch64/ptrauth-intrinsic-auth-resign-relative-load.ll
Log Message:
-----------
[CodeGen][AArch64] ptrauth intrinsic to safely construct relative ptr (#142047)
ptrauth intrinsic to safely construct relative ptr for swift coroutines.
A ptrauth intrinsic for swift co-routine support that allows creation of
signed pointer
from offset stored at address relative to the pointer.
Following C-like pseudo code (ignoring keys,discriminators) explains its
operation:
let rawptr = PACauth(inputptr);
return PACsign( rawptr + signextend64( *(int32*)(rawptr+addend) ))
What: Authenticate a signed pointer, load a 32bit value at offset
'addend' from pointer,
add this value to pointer, sign this new pointer.
builtin: __builtin_ptrauth_auth_load_relative_and_sign
intrinsic: ptrauth_auth_resign_load_relative
Commit: 0b4147e0bc9a882c988246ddc6acaf7b6dc6cc9b
https://github.com/llvm/llvm-project/commit/0b4147e0bc9a882c988246ddc6acaf7b6dc6cc9b
Author: Fangrui Song <i at maskray.me>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
R llvm/test/CodeGen/X86/dag-large-offset.ll
A llvm/test/CodeGen/X86/fold-add-16.ll
A llvm/test/CodeGen/X86/fold-add-32.ll
Log Message:
-----------
[X86] Restrict offset folding into address mode in 16-bit mode (#179399)
https://github.com/coreboot/seabios/blob/106549a4362f6b499da522f8f8f5ed9f98388f87/src/pnpbios.c#L70
has code that looks like
```
extern int X;
unsigned f(void) { return (unsigned)&X - 0xf0000; }
```
which compiles (-O1 or above, -fno-pic) to
```
.code16
leal X-983040, %eax # R_386_16 relocation, [-65535,65535]
```
in 16-bit mode. This is rejected by both GNU Assembler and LLVM
integrated assembler (after #176827).
Restrict offset folding in 16-bit mode to the range [-65535, 65535].
Commit: 4177b325c23a5e75699ce882cd84bcd7c2efceb9
https://github.com/llvm/llvm-project/commit/4177b325c23a5e75699ce882cd84bcd7c2efceb9
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Add tbuffer store d16 RegBankLegalize rule (#179411)
Commit: 983d8663b04906a21ce830bc9257b01a79e282c3
https://github.com/llvm/llvm-project/commit/983d8663b04906a21ce830bc9257b01a79e282c3
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/test/Dialect/XeGPU/subgroup-distribute-unit.mlir
Log Message:
-----------
[MLIR] [XeGPU] SG distribution: adding tests for alloca/create_memdesc and remove unncessary check from shape_cast op lowering (#179018)
This PR add subgroup distribution tests for memref.alloca and
xegpu.create_memdesc ops.
It also removes the slice layout requirement for shape_cast.
Commit: 03d467b585d1e6e60fb0513cb40980d6a3428c22
https://github.com/llvm/llvm-project/commit/03d467b585d1e6e60fb0513cb40980d6a3428c22
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Analysis/InlineCost.cpp
Log Message:
-----------
[InlineCost] Replace getAllocatedType with getAllocationSize (#178355)
This now should correctly compute the size of the static alloca if it
was declared as an array.
Co-authored-by: Claude Opus 4.5 <noreply at anthropic.com>
Commit: 572dabdbf637e006f666fd069fe1aebf151c7a5f
https://github.com/llvm/llvm-project/commit/572dabdbf637e006f666fd069fe1aebf151c7a5f
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.h
Log Message:
-----------
[CIR] Propagate correct flags to EHCleanupScope (#179137)
Propagate correct flags to the EHCleanupScope, which will be needed to
trigger the invoke branch inside `emitCallLikeOp`. This code will make
ClangIR trigger NYI for cleanups that need to be called inside the
cleanup scope, but now they are produced in the main function scope,
which is wrong
Commit: 294e43c72dbf9215855babfbfb1dcfe4105ac05d
https://github.com/llvm/llvm-project/commit/294e43c72dbf9215855babfbfb1dcfe4105ac05d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-maxnum.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-minnum.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
Log Message:
-----------
InstCombine: Handle minnum/maxnum in SimplifyDemandedFPClass (#179299)
Commit: 9727cfe1fce1f58ac127ae1a909908fc45db9190
https://github.com/llvm/llvm-project/commit/9727cfe1fce1f58ac127ae1a909908fc45db9190
Author: neildhar <neildhar at users.noreply.github.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M mlir/lib/IR/SymbolTable.cpp
Log Message:
-----------
[NFC][MLIR] Simplify lookup of nested symbols (#179362)
Consolidate the handling of nested symbols in the loop over nested
references. This is an NFC refactor to make it simpler to enforce symbol
visibility here.
Commit: abdf66d60bab8ad8eeed6e91f63c90616e6ae232
https://github.com/llvm/llvm-project/commit/abdf66d60bab8ad8eeed6e91f63c90616e6ae232
Author: Syadus Sefat <42645939+mssefat at users.noreply.github.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/fp-int-conversions.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptosi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptoui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uitofp.mir
Log Message:
-----------
[AMDGPU][GlobalIsel] Add register bank legalization rules for fptoi and itofp (#176300)
This patch adds register bank legalization rules for fptoi and itofp
operations in the AMDGPU GlobalISel pipeline.
Commit: 5586d4ace9a9d12b58f5fbae736d1164c9ed44a4
https://github.com/llvm/llvm-project/commit/5586d4ace9a9d12b58f5fbae736d1164c9ed44a4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] mayFoldIntoVector - recognise larger than legal logic ops may fold to vectors (#179503)
Inspired by the hack to #174761 - move the custom operation handling
inside mayFoldIntoVector where we can more accurately predict ops that
can be moved to the vector unit
Commit: cbbb87720d14c36f8e53b4c7f6094614eecc756c
https://github.com/llvm/llvm-project/commit/cbbb87720d14c36f8e53b4c7f6094614eecc756c
Author: neildhar <neildhar at users.noreply.github.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M mlir/lib/IR/SymbolTable.cpp
M mlir/test/Dialect/GPU/invalid.mlir
M mlir/test/IR/test-symbol-uses.mlir
M mlir/test/lib/IR/TestSymbolUses.cpp
Log Message:
-----------
[MLIR] Enforce symbol visibility during symbol lookup (#179370)
Update symbol resolution to examine whether a nested symbol being
resolved is private, and fail in that case. This ensures that we
maintain invariants on symbol visibility that we depend on in
optimisations.
Commit: 7798a8907ed37be3898505bd590c447c71a7e0ea
https://github.com/llvm/llvm-project/commit/7798a8907ed37be3898505bd590c447c71a7e0ea
Author: Kaitlin Peng <kaitlinpeng at microsoft.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/CodeGenHLSL/resources/ByteAddressBuffers-methods.hlsl
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffers.hlsl
Log Message:
-----------
Implement `ByteAddressBuffer` Load/Store methods (#176058)
Closes #108058.
This PR:
- Adds the `uint` `Load` and `Store` methods (`Load/Store`,
`Load2/Store2`, `Load3/Store3`, `Load4/Store4`) to the existing
`ByteAddressBuffer` objects
- Adds the new templated `Load` and `Store` methods to
`ByteAddressBuffer` objects, which allow types other than `uint` (e.g.
aggregate types) to be used with them directly
- One exception to this is array types, which are rejected by the
methods (as array returns will be disallowed in 202x)
- Adds the relevant `AST`, `CodeGenHLSL`, and `SemaHLSL` tests for these
methods
*Note: the `HLSL Tests` check is failing because this implementation
makes the `ByteAddressBuffer` tests XPASS. Will remove the XFAILs from
these tests in a follow-up.*
Commit: faa4b97b10c6facb362c5a8d2f0f5c442389a103
https://github.com/llvm/llvm-project/commit/faa4b97b10c6facb362c5a8d2f0f5c442389a103
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Analysis/ValueTracking/knownbits-bmi-pattern.ll
M llvm/test/Transforms/InstCombine/and-or-icmps.ll
M llvm/test/Transforms/InstCombine/canonicalize-selects-icmp-condition-bittest.ll
M llvm/test/Transforms/InstCombine/cmp-intrinsic.ll
M llvm/test/Transforms/InstCombine/exact.ll
M llvm/test/Transforms/InstCombine/icmp-and-shift.ll
M llvm/test/Transforms/InstCombine/icmp-binop.ll
M llvm/test/Transforms/InstCombine/icmp-mul-and.ll
M llvm/test/Transforms/InstCombine/icmp-mul.ll
M llvm/test/Transforms/InstCombine/icmp-ne-pow2.ll
M llvm/test/Transforms/InstCombine/icmp.ll
M llvm/test/Transforms/InstCombine/load-cmp.ll
M llvm/test/Transforms/InstCombine/or.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest-with-truncation-lshr.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest-with-truncation-shl.ll
M llvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest.ll
M llvm/test/Transforms/LoopUnroll/WebAssembly/basic-unrolling.ll
M llvm/test/Transforms/PGOProfile/chr.ll
M llvm/test/Transforms/PGOProfile/chr_coro.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/extra-unroll-simplifications.ll
Log Message:
-----------
[InstCombine] fold icmp ne (and X, 1), 0 --> trunc X to i1 (#178977)
Remove vector check so this fold always is done.
proof: https://alive2.llvm.org/ce/z/oabD6J
closes #172888
Commit: 10d385936968fe6791e8b9ace283708f1002f4f4
https://github.com/llvm/llvm-project/commit/10d385936968fe6791e8b9ace283708f1002f4f4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMCallingConv.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
Log Message:
-----------
ARM: Avoid using isTarget wrappers around Triple predicates (#179512)
These are module level properties, and querying them through
a function-level subtarget context is confusing. Plus we don't
need an aliased name.
Continue change started in 91439817e8d19613ac6e25ca9abd5e7534a9d33b
Commit: 3064291c9f54dff3416145b06bd31cc38211da1d
https://github.com/llvm/llvm-project/commit/3064291c9f54dff3416145b06bd31cc38211da1d
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/assume-loop-align.ll
M llvm/test/Transforms/InstCombine/assume.ll
M llvm/test/Transforms/InstCombine/assume_inevitable.ll
Log Message:
-----------
Reapply "[InstCombine] Always fold alignment assumptions into operand bundles (#177597)" (#179497)
Truncating at 32 bits is now avoided by removing a cast to `unsigned`.
This would also break at 64 bits (with the pointer size > 64 bit), but I
don't think LLVM supports such a
thing.
This reverts commit bc7315749d6d16d0f162f816b3ec0ef7169615f2.
Commit: cb5e2db75a200788cb137071d9cefec177bd6c45
https://github.com/llvm/llvm-project/commit/cb5e2db75a200788cb137071d9cefec177bd6c45
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/sincos-glsl.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/sincos-opencl.ll
Log Message:
-----------
[SPIR-V] Add lowering for G_FSINCOS (#179053)
Use either OpenCL::sincos for compute or sequence of HLSL::sin +
HLSL::cos for shader.
Commit: 06a903e9386b70422d277ac1aead6d8a55173b30
https://github.com/llvm/llvm-project/commit/06a903e9386b70422d277ac1aead6d8a55173b30
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Log Message:
-----------
[AMDGPU] Clear no convergence flag on operand folding. NFCI (#179438)
Clear the flag. It fails verification if set, only convergent
operations may have NoConvergent flag. NFCI as it is now because
it just does not happen.
Commit: 9bfeaaf28c47d6933cf2fdac6c75323cb1240b5c
https://github.com/llvm/llvm-project/commit/9bfeaaf28c47d6933cf2fdac6c75323cb1240b5c
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/IR/Intrinsics.cpp
Log Message:
-----------
[LLVM][Intrinsics] Minor cleanup in getIntrinsicInfoTableEntries (#179317)
Change `IITValues` from SmallVector to a simple array, since its maximum
size is bounded and relatively small. As a result, using a SmallVector
for this array is not necessary.
Commit: 90f575ba81888c63099f892a8f5f523327d7f5cf
https://github.com/llvm/llvm-project/commit/90f575ba81888c63099f892a8f5f523327d7f5cf
Author: Rohan Jacob-Rao <rohanjr at google.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
Log Message:
-----------
[NFC][Clang][UnsafeBufferUsage] Simplify libc function matchers. (#178985)
Commit: f0c519d2c1b0a1c73994cdb3aabfa33a4a412801
https://github.com/llvm/llvm-project/commit/f0c519d2c1b0a1c73994cdb3aabfa33a4a412801
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/include/llvm/IR/Intrinsics.h
M llvm/lib/IR/Intrinsics.cpp
M llvm/test/TableGen/intrinsic-arginfo.td
M llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Adopt CodeGenHelpers in IntrinsicEmitter (#179310)
- Adopt IfDefEmitter in IntrinsicEmitter.
- Remove #undef for various flags in Intrinsics.cpp/Intrinsics.h as the
TableGen generated code does that now.
Commit: dd19a5a1a774af07989d1d363760bf00a725d4d7
https://github.com/llvm/llvm-project/commit/dd19a5a1a774af07989d1d363760bf00a725d4d7
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
R mlir/test/Conversion/ConvertToEmitC/tosa.mlir
A mlir/test/Dialect/EmitC/tosa/lit.local.cfg
A mlir/test/Dialect/EmitC/tosa/ops.mlir
A mlir/test/Dialect/EmitC/tosa/td.mlir
Log Message:
-----------
[mlir][emitc] Update and extend the TOSA -> EmitC test (#177339)
This patch updates and extends the TOSA-to-EmitC lowering test:
* Conversion/ConvertToEmitC/tosa.mlir
Summary of changes and rationale:
* Remove `buffer-alignment=0` from the lowering pipeline; it is not required
(the existing `CHECK` lines are not affected).
* Move the test from Conversion/ConvertToEmitC/tosa.mlir to
Dialect/EmitC/tosa/ops.mlir. Conversion tests are intended for single
conversion passes (e.g. `-convert-dialect1-to-dialect2`), whereas this test
exercises a more complex lowering pipeline with multiple explicit steps (e.g.
TOSA -> Linalg, bufferization, etc.).
* Add a Transform Dialect sequence to complement the existing lowering pipeline
definition. This introduces an additional `RUN` line that is compatible with
the original one. Using the Transform Dialect makes the pipeline easier to
document, maintain, and experiment with.
Commit: 9481902eff35960154cf1ee245f010cf960bf395
https://github.com/llvm/llvm-project/commit/9481902eff35960154cf1ee245f010cf960bf395
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/test/CodeGen/RISCV/tls-models.ll
Log Message:
-----------
[llvm][RISCV] precommit test update via UTC (#179508)
Run UTC in preparation of additional tests.
Commit: e1f69ee8e84784d164a1a748cd6c080830ecd0e8
https://github.com/llvm/llvm-project/commit/e1f69ee8e84784d164a1a748cd6c080830ecd0e8
Author: Wael Yehia <wmyehia2001 at yahoo.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/TargetInfo.h
M clang/lib/Driver/ToolChains/AIX.cpp
M clang/test/CodeGen/attr-ifunc.c
M clang/test/CodeGen/attr-ifunc.cpp
M clang/test/CodeGen/ifunc.c
M clang/test/CodeGenCXX/externc-ifunc-resolver.cpp
M clang/test/SemaCXX/ifunc-has-attribute.cpp
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/ppc/init_ifuncs.c
A compiler-rt/test/builtins/Unit/ppc/aix_ifunc.c
A compiler-rt/test/profile/AIX/ifunc.c
M llvm/include/llvm/CodeGen/AsmPrinter.h
M llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
M llvm/include/llvm/Target/TargetLoweringObjectFile.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/LTO/LTOModule.cpp
M llvm/lib/Target/PowerPC/CMakeLists.txt
M llvm/lib/Target/PowerPC/PPC.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
A llvm/lib/Target/PowerPC/PPCPrepareIFuncsOnAIX.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
A llvm/test/CodeGen/PowerPC/aix-ifunc-alias.ll
A llvm/test/CodeGen/PowerPC/aix-ifunc-debug.ll
A llvm/test/CodeGen/PowerPC/aix-ifunc-obj.ll
A llvm/test/CodeGen/PowerPC/aix-ifunc-toc-restore-query-neg.ll
A llvm/test/CodeGen/PowerPC/aix-ifunc-toc-restore-query.ll
A llvm/test/CodeGen/PowerPC/aix-ifunc.ll
A llvm/test/CodeGen/PowerPC/ifunc-prepare.ll
A llvm/test/LTO/PowerPC/ifunc-aix.ll
M llvm/utils/gn/secondary/llvm/lib/Target/PowerPC/BUILD.gn
Log Message:
-----------
[AIX] Implement the ifunc attribute. (#153049)
Currently, the AIX linker and loader do not provide a mechanism to
implement ifuncs similar to GNU_ifunc on ELF Linux.
On AIX, we will lower `__attribute__((ifunc("resolver"))` to the llvm
`ifunc` as other platforms do. The llvm `ifunc` in turn will get lowered
at late stages of the optimization pipeline to an AIX-specific
implementation. No special linkage or relocations are needed when
generating assembly/object output.
On AIX, a function `foo` has two symbols associated with it: a function
descriptor (`foo`) residing in the `.data` section, and an entry point
(`.foo`) residing in the `.text` section. The first field of the
descriptor is the address of the entry point. Typically, the address
field in the descriptor is initialized once: statically, at load time
(?), or at runtime if runtime linking is enabled.
Here we would like to use the address field in the descriptor to
implement the `ifunc` semantics. Specifically, the ifunc function will
become a stub that jumps to the entry point in the address field. A
constructor function is linked into every linkage module. The
constructor walks an array of `{descriptor, resolver}` pairs, calling
the resolver and saving the result in the address field in the
descriptor (thus setting `foo`'s descriptor to point to the resolved
version early during program runtime).
Known limitations:
- Due to bug #161576, which affects object generation path, you will
need either `-ffunction-sections` or `-fno-integrated-as` to generate a
correct/linkable object file.
- aliases to ifuncs are not supported, a testcase has been added and
marked XFAIL. I'm planning to address in a follow-up PR because it's not
important enough, IMHO, for this PR
- dead ifuncs in a CU that contains at least one live ifunc, will result
in all ifuncs being kept by the linker. The fix for this is common with
a similar problem we have with PGO. PR #159435 is trying to provide a
mechanism that will allow the ifunc and PGO implementations to avoid the
dead code retention at the link step.
- the resolver must return a function that is in the same DSO as the
ifunc; the compiler will try to detect if this condition is violated and
report it, but it cannot detect it in general. To be safe, all candidate
functions (returned by a particular resolver) must either be static or
have hidden/protected visibility. This is so that the ifunc stub doesn't
have to save and restore the TOC register r2. In future work, this case
will be supported and the requirement will be lifted.
---------
Co-authored-by: Wael Yehia <wyehia at ca.ibm.com>
Commit: b7dfc429c373b809d41d0d29dd948600195da949
https://github.com/llvm/llvm-project/commit/b7dfc429c373b809d41d0d29dd948600195da949
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/include/llvm/Object/ELFTypes.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
Log Message:
-----------
[llvm][AsmPrinter] Call graph section Flag field enum (#176309)
This enum is required in llvm-readobj ELFDumper.cpp as well for parsing
the call graph section generated. To avoid duplication of the Flag field
enum, moving this to llvm/object/ELFTypes.h.
Commit: 8a895b3151d0f65aa460231ba547900716e781ce
https://github.com/llvm/llvm-project/commit/8a895b3151d0f65aa460231ba547900716e781ce
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/MC/MCObjectFileInfo.cpp
A llvm/test/CodeGen/SystemZ/zos-dwarf.ll
Log Message:
-----------
[GOFF] Add emission of debug sections (#178677)
This PR adds the definition of the debug sections for emission into GOFF
files. Currently, there is no debugger available which supports all the
sections. However, they all must defined to avoid regression in LIT test
cases.
Commit: 1c5d70217561176cbb62d96ceae4aa49d92d2509
https://github.com/llvm/llvm-project/commit/1c5d70217561176cbb62d96ceae4aa49d92d2509
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_stdio_redirection.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_stdio_redirection_and_console.py
M lldb/test/API/tools/lldb-dap/launch/io/TestDAP_launch_io.py
Log Message:
-----------
[lldb-dap] Fix DAP_launch_io.py Test (#179295)
DAP_launch_io sends a continue request for a nonstopped process. Use
verify_process_exited instead.
Commit: 0f88b5da06e2c17743aa59633d1f9013977a9cc0
https://github.com/llvm/llvm-project/commit/0f88b5da06e2c17743aa59633d1f9013977a9cc0
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M polly/lib/Support/DumpFunctionPass.cpp
M polly/lib/Support/DumpModulePass.cpp
Log Message:
-----------
[Polly] LLVM_DEBUG -> POLLY_DEBUG
Commit: 1c41b9a81ff01432c0c6c636a5fc35ee90a4b60e
https://github.com/llvm/llvm-project/commit/1c41b9a81ff01432c0c6c636a5fc35ee90a4b60e
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M lldb/source/Plugins/ABI/ARM/ABISysV_arm.cpp
M lldb/source/Plugins/ABI/Mips/ABISysV_mips64.cpp
M lldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.cpp
M lldb/source/Plugins/ABI/X86/ABISysV_x86_64.cpp
M lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/ValueObject/DILEval.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/test/API/lang/cpp/template-arguments/TestCppTemplateArguments.py
M lldb/unittests/Symbol/TestTypeSystemClang.cpp
Log Message:
-----------
[lldb][TypeSystemClang] Don't treat float vector types as floating point types (#179213)
This patch re-implements `TypeSystemClang::IsFloatingPointType` by
forwarding it to `clang::Type::isFloatingType`. The main difference is
that the latter returns false for float vector types. The motovation
here (apart from implementation simplicity) is that this is currently a
foot-gun because most callsites probably don't consider treating float
vector types. Callers should test for vectors explicitly using
`IsVectorType` (or use `GetTypeInfo`).
This patch makes all the callers of `IsFloatingPointType` now check
`GetTypeInfo() & eTypeIsFloat`. This is set for float vector types too,
so behaviour doesn't change.
To make sure we audit all the call-sites in `ValueObject.cpp`, I added a
helper `HasFloatRepresentation` (named after the
`clang::Type::hasFloatingRepresentation` API), which does the
`GetTypeInfo` check, and added a FIXME to it.
Commit: 9590f1ea6d88512be6a21700219413d8cf07bea1
https://github.com/llvm/llvm-project/commit/9590f1ea6d88512be6a21700219413d8cf07bea1
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/test/CIR/IR/eh-flat.cir
A clang/test/CIR/IR/invalid-eh-flat.cir
Log Message:
-----------
[CIR] Add CIR types and operations for flattened EH and cleanup (#178496)
This adds the CIR dialect definitions for the new types and operations
that will be needed to perform CFG flattening on the high-level CIR
representation of exception handlng and cleanups. Tests are added for
the dialect printing, parsing, and verification.
This does not include any code to flatten the CFG or otherwise generate
the new operations or to lower them into other forms. That support will
be added in later changes.
Commit: 3db2fd8bf0f3f0726bf8a32fe59e6b131f2e1b8e
https://github.com/llvm/llvm-project/commit/3db2fd8bf0f3f0726bf8a32fe59e6b131f2e1b8e
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
A clang/test/CIR/CodeGen/alloc-size.c
M clang/test/CIR/CodeGen/coro-task.cpp
M clang/test/CIR/CodeGen/new.cpp
M clang/test/CIR/CodeGenBuiltins/builtin_new_delete.cpp
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/func.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/Import/instructions.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[CIR] Implement 'allocsize' function/call attribute lowering (#179342)
The alloc_size attribute takes the argument number(normalized to the
index!) of the element size and count, for things like 'malloc' or
'calloc'.
This ends up being slightly more complicated than others, as this has
data that we have to decide on a format for. LLVM chooses to pack both
of these 32 bit values into a single i64, but unpacks it for the purpose
of input/output. The second value, the number of elements, is optional.
This patch uses a DenseI32ArrayAttr to store them for the LLVMIR
dialect, which gets us the packed nature, but doesn't require us doing
any work to unpack it.
Commit: d510c4c3f3ca26ef3b73a4b5205007471e412f5a
https://github.com/llvm/llvm-project/commit/d510c4c3f3ca26ef3b73a4b5205007471e412f5a
Author: Andrei Elovikov <andrei.elovikov at sifive.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanCFG.h
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (#178724)
To be used in Mel's https://github.com/llvm/llvm-project/pull/173265.
---------
Co-authored-by: Florian Hahn <flo at fhahn.com>
Co-authored-by: Luke Lau <luke_lau at icloud.com>
Commit: 792f7b089a24e29d2f938d5909639f84159d5c2c
https://github.com/llvm/llvm-project/commit/792f7b089a24e29d2f938d5909639f84159d5c2c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-fdot-product.ll
Log Message:
-----------
[VPlan] Refine exit select check in transformtoPartialReduction.
Make sure we find the actual select for the exit users and only use it
for the final link in the chain. This fixes a miscompile after
90b3712d8a20efa2cbaadc177da576e485dce038.
Commit: 22c8344d986df3d91121b3c27d20eb820d828386
https://github.com/llvm/llvm-project/commit/22c8344d986df3d91121b3c27d20eb820d828386
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M libc/src/__support/ctype_utils.h
M libc/src/__support/math/atan2.h
M libc/src/__support/math/common_constants.h
M libc/src/__support/math/cos.h
M libc/src/__support/math/range_reduction_double_common.h
M libc/src/__support/math/sin.h
Log Message:
-----------
[libc] Address size bloat issues (#179398)
This refactoring addresses bloat by removing static function specifiers.
Commit: caab98284166784459a2fb76df7bca3f1d35e41e
https://github.com/llvm/llvm-project/commit/caab98284166784459a2fb76df7bca3f1d35e41e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/test/TableGen/CPtrWildcard.td
M llvm/test/TableGen/RegClassByHwMode.td
M llvm/test/TableGen/dag-isel-regclass-emit-enum.td
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
Log Message:
-----------
[SelectionDAGISel] Separate the operand numbers in OPC_EmitNode/MorphNodeTo into their own table. (#178722)
The operand lists for these opcode require 1 byte per operand and are
usually small values that fit in 3-4 bits. This makes their storage
inefficient. In addition, many EmitNode/MorphNodeTo in the isel table
will use the same list of operand numbers.
This patch proposes to separate the operand lists into their own table
where they can be de-duplicated. The OPC_EmitNode/MorphNodeTo in the
main table will only store an index into this smaller table.
This is a reduced version of a suggestion from this very old FIXME.
https://github.com/llvm/llvm-project/blob/d8d4096c0be0a6a3248c8deae96608913a85debf/llvm/utils/TableGen/DAGISelMatcherGen.cpp#L1070
For RISC-V this reduces the main table from 1437353 bytes to 1276015
bytes plus a 929 byte operand list table. A savings of about 11%.
For X86 this reduces the main table from 719237 bytes to 623612 bytes
plus a 1042 byte operand list table. A savings of about 11%.
I expect further savings could be had by moving more bytes over.
Commit: 078f6bde1c479e1a345058317e6e4de4887521ce
https://github.com/llvm/llvm-project/commit/078f6bde1c479e1a345058317e6e4de4887521ce
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/include/llvm/TableGen/CodeGenHelpers.h
M llvm/test/TableGen/bare-minimum-psets.td
M llvm/test/TableGen/pset-enum.td
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Adopt CodeGenHelpers in RegInfoEmitter (#179017)
- Change `NamespaceEmitter` to allow emitting anonymous namespaces.
- Adopt IfDef and namespace emitters in RegInfoEmitter.
Commit: e4c7ef2d553054572ed8de1d94e1571ee7370043
https://github.com/llvm/llvm-project/commit/e4c7ef2d553054572ed8de1d94e1571ee7370043
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/utils/TableGen/X86MnemonicTables.cpp
Log Message:
-----------
[NFC][TableGen] Adopt CodeGenHelpers in X86MnemonicEmitter (#179324)
Additionally, cleanup the code a bit to use nested namespace definition
and emit it per code section, and emit spaces instead of tabs.
Commit: 6716acd588462c6b33afa1633c4a5ddbcec59360
https://github.com/llvm/llvm-project/commit/6716acd588462c6b33afa1633c4a5ddbcec59360
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/test/TableGen/TargetLibraryInfo.td
M llvm/utils/TableGen/Basic/TargetLibraryInfoEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Adopt IfDefEmitter in TargetLibraryInfoEmitter (#179388)
Commit: 4b4c32ce09e4a7d993607c40056a4805564188c4
https://github.com/llvm/llvm-project/commit/4b4c32ce09e4a7d993607c40056a4805564188c4
Author: Nico Weber <thakis at chromium.org>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/sources.gni
Log Message:
-----------
[gn] port e1f69ee8e847
Commit: a6c926b0cf6bde1f46146e66cf17b72b62597818
https://github.com/llvm/llvm-project/commit/a6c926b0cf6bde1f46146e66cf17b72b62597818
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M clang/lib/Analysis/ThreadSafety.cpp
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
Log Message:
-----------
[Thread Safety Analysis] Fix a bug of context saving in alias-analysis (#178825)
The commit b4c98fcbe1504841203e610c351a3227f36c92a4 introduces
alias-analysis and conservatively invalidates variable definitions at
function calls. For each invalidated argument, it creates and pushes a
context. So if there are multiple arguments being invalidated, there are
more than one context being pushed. However, the analysis expects one
context at the program point of a call, causing context mismatch. This
issue could lead to false negatives.
For example,
```
MyLock->Lock(); // 'MyLock' holds the lock
Lock_t *Ptr = MyLock; // 'Ptr' aliases with 'MyLock'
// Before the fix, two contexts are saved and pushed at the call below, causing context mismatch later.
escapeAliasMultiple(&Irrelevant, &Ptr);
Ptr->Unlock(); // 'Ptr' may no longer hold the lock but the analyzer missed it due to context mismatch
```
This commit fixes the issue.
---------
Co-authored-by: Marco Elver <me at marcoelver.com>
Commit: 3ce60c4ff9538481745e1c2c31eac9e48046f548
https://github.com/llvm/llvm-project/commit/3ce60c4ff9538481745e1c2c31eac9e48046f548
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel][mlir][NFC] Run buildifier (#179554)
Commit: 19cf75c72ffd9ab9dd802eba625fc2e91e4e8a90
https://github.com/llvm/llvm-project/commit/19cf75c72ffd9ab9dd802eba625fc2e91e4e8a90
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/test/TableGen/CPtrWildcard.td
M llvm/test/TableGen/RegClassByHwMode.td
M llvm/test/TableGen/dag-isel-regclass-emit-enum.td
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
Log Message:
-----------
Revert "[SelectionDAGISel] Separate the operand numbers in OPC_EmitNode/MorphNodeTo into their own table. (#178722)"
This reverts commit caab98284166784459a2fb76df7bca3f1d35e41e.
This is failing some build bots.
Commit: 7c29a09cd8929b7c35e18f7552c1abe4c98c9b0e
https://github.com/llvm/llvm-project/commit/7c29a09cd8929b7c35e18f7552c1abe4c98c9b0e
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[bazel][lldb] Port #179355: data formatters location (#179552)
Commit: f9b5ab1cc9b92a97ef8fbe64be61d7ab48f1bbba
https://github.com/llvm/llvm-project/commit/f9b5ab1cc9b92a97ef8fbe64be61d7ab48f1bbba
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M lldb/include/lldb/DataFormatters/FormatterBytecode.h
Log Message:
-----------
[lldb] Add missing include guard in FormatterBytecode.h (#179528)
Commit: d8350712b300bcd4d05240b8edec40cc96e6d588
https://github.com/llvm/llvm-project/commit/d8350712b300bcd4d05240b8edec40cc96e6d588
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
A mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-subgroup-id.mlir
Log Message:
-----------
[mlir] GPUToROCDL: lower `gpu.subgroup_id` to the intrinsic where possible (#179422)
Lower `gpu.subgroup_id` to `wave.id` intrinsic on gfx12+, lower to
`linearized_thread_id / subgroup_size` on older.
Commit: 43faefdb12337216957b2fac34ca6bd1bed371b7
https://github.com/llvm/llvm-project/commit/43faefdb12337216957b2fac34ca6bd1bed371b7
Author: yonghong-song <yhs at fb.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
M llvm/test/Transforms/ArgumentPromotion/dbg.ll
Log Message:
-----------
[ArgPromotion] Add DW_CC_nocall to DISubprogram (#178973)
ArgumentPromotion pass may change function signatures. If this happens
and debuginfo is enabled, adding DW_CC_nocall allows dwarf to generate
DW_AT_calling_convention (DW_CC_nocall)
for DW_TAG_subprogram.
DeadArgumentElimination ([1]) already has similar implementation.
The pahole tool ([2]) is used in linux kernel build to generate vmlinux
BTF. One of its input is linux kernel dwarf. Currently, pahole
checks *all* DW_TAG_subprogram functions and find whether the source
signature matches the architecture ABI or not. If mismatch, pahole will
try to do some adjustment for those parameters. See [3]
and function parameter__new().
The linux kernel typically has ~65K functions and roughly 1100 functions
may have signature changed due to compile optimization. Without
DW_CC_nocall,
signatures of all of 64K functions will be checked in parameter__new().
But with DW_CC_nocall, the number of functions to checked is only 1100,
much smaller.
If DW_CC_nocall is not available, pahole may needs to parse complicated
locations. Even if the signature is not changed, pahole may not be able to
decide that the location matches function signature, and will incorrectly
exclude this function for vmlinux BTF.
So overall, adding DW_CC_nocall in ArgumentPromotion can help pahole
with less build time and more correct function encoding in vmlinux BTF.
With change in ArgumentPromotion.cpp, the test dbg.ll will fail since
the subroutine type is null. The non-null subroutine type is added so
the test can pass.
Without change in ArgumentPromotion.cpp, the dbg.ll will have
...
!3 = distinct !DISubprogram(name: "test", scope: null, file: !2, line: 3, type: !4,
scopeLine: 3, flags: DIFlagPrototyped, spFlags: DISPFlagLocalToUnit | DISPFlagDefinition, unit: !1)
!4 = !DISubroutineType(types: !5)
!5 = !{null, !6}
...
With change in Argumentpromotion.cpp, the dbg.ll will have
...
!3 = distinct !DISubprogram(name: "test", scope: null, file: !2, line: 3, type: !4,
scopeLine: 3, flags: DIFlagPrototyped, spFlags: DISPFlagLocalToUnit | DISPFlagDefinition, unit: !1)
!4 = !DISubroutineType(cc: DW_CC_nocall, types: !5)
!5 = !{null, !6}
Eventually, DW_CC_nocall will be encoded in dwarf.
[1] https://github.com/llvm/llvm-project/commit/340b0ca90095d838f095271aaa1098fa1bd5ecbe
[2] https://git.kernel.org/pub/scm/devel/pahole/pahole.git
[3] https://git.kernel.org/pub/scm/devel/pahole/pahole.git/tree/dwarf_loader.c
Commit: 254b3b137efb1be5a5e57188b3f8a8ff934bdf78
https://github.com/llvm/llvm-project/commit/254b3b137efb1be5a5e57188b3f8a8ff934bdf78
Author: Tim Noack <noack at esa.tu-darmstadt.de>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M mlir/lib/TableGen/AttrOrTypeDef.cpp
M mlir/test/IR/test-verifiers-type.mlir
M mlir/test/lib/Dialect/Test/TestTypeDefs.td
M mlir/tools/mlir-tblgen/AttrOrTypeDefGen.cpp
Log Message:
-----------
[mlir][tblgen] Add PredTypeTrait/PredAttrTrait support (#169153)
This patch adds support for `PredTypeTrait` and `PredAttrTrait` in type
and attribute definitions, enabling declarative predicate-based
verification similar to how `PredOpTrait` works for operations.
## Motivation
In 802bf02 (from 2021), `PredTypeTrait`/`PredAttrTrait` were defined in
TableGen but not implemented in the code generator. Using them causes
mlir-tblgen to crash with an assertion failure when trying to cast
`PredTrait` to `InterfaceTrait`. This patch fixes the crash and
implements the actual verification code generation.
## Usage
Use `$paramName` syntax in predicates to reference type/attribute
parameters:
```tablegen
def MyType : MyDialect_Type<"MyType",
[PredTypeTrait<"value must be positive", CPred<"$value > 0">>]> {
let parameters = (ins "unsigned":$value);
let mnemonic = "my_type";
let assemblyFormat = "`<` $value `>`";
}
```
This generates verification code in `verifyInvariantsImpl()`:
```cpp
if (!(value > 0)) {
emitError() << "failed to verify that value must be positive";
return ::mlir::failure();
}
```
Commit: b0b9046539a2d405892712857cac2fe6a9a17cda
https://github.com/llvm/llvm-project/commit/b0b9046539a2d405892712857cac2fe6a9a17cda
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BTFDebug.cpp
Log Message:
-----------
[BPF] Replace copy-assign by move-assign in llvm/lib/Target/BPF/ (#179462)
An SDLoc transitively contains a TrackingMDRef which have a specialized
move constructor. It's more efficient to move element to it instead of
copying them.
FileContent contains std::vector<...> values. It's more efficient to
move then to copy the whole vector.
Commit: 4f047709843de7ed136526228dd2ca3d77f946b4
https://github.com/llvm/llvm-project/commit/4f047709843de7ed136526228dd2ca3d77f946b4
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/test/CodeGen/MIR/RISCV/skip-mir-comment-trailing-whitespace.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/add.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/anyext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/icmp.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/render-vlop-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/render-vlop-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/select.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/sext.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/sub.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/vmclr-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/vmclr-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/zext.mir
M llvm/test/CodeGen/RISCV/opt-w-instrs.mir
M llvm/test/CodeGen/RISCV/pr176001.ll
M llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir
M llvm/test/CodeGen/RISCV/rvv/allone-masked-to-unmasked.mir
M llvm/test/CodeGen/RISCV/rvv/commuted-op-indices-regression.mir
M llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmf.ll
M llvm/test/CodeGen/RISCV/rvv/frameindex-addr.ll
M llvm/test/CodeGen/RISCV/rvv/handle-noreg-with-implicit-def.mir
M llvm/test/CodeGen/RISCV/rvv/implicit-def-copy.ll
M llvm/test/CodeGen/RISCV/rvv/machine-combiner-subreg-verifier-error.mir
M llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir
M llvm/test/CodeGen/RISCV/rvv/pass-fast-math-flags-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/pr99782.ll
M llvm/test/CodeGen/RISCV/rvv/reduce-vl-peephole.mir
M llvm/test/CodeGen/RISCV/rvv/reg-coalescing.mir
M llvm/test/CodeGen/RISCV/rvv/regcoal-liveinterval-pruning-crash.mir
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-to-vmv.mir
M llvm/test/CodeGen/RISCV/rvv/sifive-xsfmm-vset-insert.mir
M llvm/test/CodeGen/RISCV/rvv/strided-vpload-vpstore-output.ll
M llvm/test/CodeGen/RISCV/rvv/subregister-undef-early-clobber.mir
M llvm/test/CodeGen/RISCV/rvv/tail-agnostic-impdef-copy.mir
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.mir
M llvm/test/CodeGen/RISCV/rvv/vector-tuple-align.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir
M llvm/test/CodeGen/RISCV/rvv/vl-opt-user-scalar-def.mir
M llvm/test/CodeGen/RISCV/rvv/vl-opt.mir
M llvm/test/CodeGen/RISCV/rvv/vl-optimizer-subreg-assert.mir
M llvm/test/CodeGen/RISCV/rvv/vleff-vlseg2ff-output.ll
M llvm/test/CodeGen/RISCV/rvv/vlopt-volatile-ld.mir
M llvm/test/CodeGen/RISCV/rvv/vmerge-peephole.mir
M llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.mir
M llvm/test/CodeGen/RISCV/rvv/vmv0-elimination.mir
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-coalesce.mir
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-zve64f.mir
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
M llvm/test/CodeGen/RISCV/rvv/vxrm.mir
M llvm/test/CodeGen/RISCV/rvv/wrong-stack-offset-for-rvv-object.mir
M llvm/test/CodeGen/RISCV/rvv/zvlsseg-spill.mir
M llvm/test/CodeGen/RISCV/spacemitx60-sched-copy.mir
M llvm/test/MachineVerifier/RISCV/subreg-liveness.mir
Log Message:
-----------
[RISCV] Print MIR comments for AVL and VEC_RM operands (#179542)
Such that we can now have something like:
```
PseudoVFMACC_VV_M2_E64 %1, %28, %28, 7 /* frm=dyn */, %21 /* vl */, 6 /* e64 */, 0 /* tu, mu */
```
or
```
PseudoVFMACC_VV_M2_E64 %1, %28, %28, 7 /* frm=dyn */, -1 /* vl=VLMAX */, 6 /* e64 */, 0 /* tu, mu */
```
Hopefully this could make reading RISC-V MIR (a little) less painful.
Commit: 65cc6951d577a62fe2322ff27602a4f8608f32b9
https://github.com/llvm/llvm-project/commit/65cc6951d577a62fe2322ff27602a4f8608f32b9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/test/TableGen/CPtrWildcard.td
M llvm/test/TableGen/RegClassByHwMode.td
M llvm/test/TableGen/dag-isel-regclass-emit-enum.td
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
Log Message:
-----------
Reapply "[SelectionDAGISel] Separate the operand numbers in OPC_EmitNode/MorphNodeTo into their own table. (#178722)"
This includes a fix to use size_t instead of uint64_t in one place.
Commit: 4cae644dbebc5668aaa461eaf7a74d21d7121503
https://github.com/llvm/llvm-project/commit/4cae644dbebc5668aaa461eaf7a74d21d7121503
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M libc/config/baremetal/config.json
Log Message:
-----------
[libc] Disable strong stack protector for baremetal (#179559)
Strong stack protector introduces references to __stack_chk_guard
symbols with GOT relocation in ARM 32 bit targets which is not supported
in typical baremetal environments. Turning this off for baremetal.
Commit: aa00a349765846247e113197276143ece3a9d0d2
https://github.com/llvm/llvm-project/commit/aa00a349765846247e113197276143ece3a9d0d2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
Log Message:
-----------
[RISCV] Sink some encoding related lets into class/def bodies. NFC (#179544)
Rather than using lets around classes/defs, override them in the class
def/body.
Some of these lets were around single class/def were I thought it was
better to be inside. Some were around multiple unrelated classes where
it seemed better not to link their encodings like that.
For vmv, I added a multiclass to better encapsulate them but still kept
the let scope to avoid repetition. The encodings are closely related
enough that I thought this was ok.
Commit: 3bd2ae712755c5b7f7ddc1374c24b197d53bdefe
https://github.com/llvm/llvm-project/commit/3bd2ae712755c5b7f7ddc1374c24b197d53bdefe
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
Log Message:
-----------
[X86] Add test coverage for #179008 (#179562)
Commit: b9cecee3fb90f5262d85e824f8e80d153e2c3a4c
https://github.com/llvm/llvm-project/commit/b9cecee3fb90f5262d85e824f8e80d153e2c3a4c
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/lib/CodeGen/CGVTables.cpp
A clang/test/CodeGenCXX/tmp-md-nodes3.cpp
M clang/test/DebugInfo/CXX/anon-union-vars.cpp
M clang/test/DebugInfo/CXX/codeview-unnamed.cpp
M clang/test/DebugInfo/CXX/gline-tables-only-codeview.cpp
M clang/test/DebugInfo/CXX/lambda-capture-packs.cpp
M clang/test/DebugInfo/CXX/lambda-this.cpp
M clang/test/DebugInfo/Generic/codeview-unnamed.c
M clang/test/DebugInfo/Generic/unused-types.c
M clang/test/DebugInfo/Generic/unused-types.cpp
M llvm/include/llvm/AsmParser/LLParser.h
M llvm/include/llvm/IR/DIBuilder.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/test/Bitcode/upgrade-cu-locals.ll
M llvm/test/Bitcode/upgrade-cu-locals.ll.bc
A llvm/test/DebugInfo/Generic/inlined-local-type.ll
A llvm/test/DebugInfo/Generic/lexical-block-retained-types.ll
A llvm/test/DebugInfo/Generic/lexical-block-types.ll
M llvm/test/DebugInfo/Generic/verifier-invalid-disubprogram.ll
A llvm/test/DebugInfo/Inputs/cleanup-retained-nodes.ll
A llvm/test/DebugInfo/X86/cleanup-retained-nodes.ll
A llvm/test/DebugInfo/X86/llparser-cleanup-retained-nodes.ll
A llvm/test/DebugInfo/X86/local-type-as-template-parameter.ll
A llvm/test/Transforms/FunctionImport/Inputs/funcimport-debug-retained-nodes.ll
A llvm/test/Transforms/FunctionImport/funcimport-debug-retained-nodes.ll
M llvm/unittests/Transforms/Utils/CloningTest.cpp
Log Message:
-----------
Reland "[DebugMetadata][DwarfDebug] Support function-local types in lexical block scopes (4/7)" (#165032)
This is an attempt to merge https://reviews.llvm.org/D144006 with LTO
fix.
The last merge attempt was
https://github.com/llvm/llvm-project/pull/75385.
The issue with it was investigated in
https://github.com/llvm/llvm-project/pull/75385#issuecomment-2386684121.
The problem happens when
1. Several modules are being linked.
2. There are several DISubprograms that initially belong to different
modules but represent the same source code function (for example, a
function included from the same source code file).
3. Some of such DISubprograms survive IR linking. It may happen if one
of them is inlined somewhere or if the functions that have these
DISubprograms attached have internal linkage.
4. Each of these DISubprograms has a local type that corresponds to the
same source code type. These types are initially from different modules,
but have the same ODR identifier.
If the same (in the sense of ODR identifier/ODR uniquing rules) local
type is present in two modules, and these modules are linked together,
the type gets uniqued. A DIType, that happens to be loaded first,
survives linking, and the references on other types with the same ODR
identifier from the modules loaded later are replaced with the
references on the DIType loaded first. Since defintion subprograms, in
scope of which these types are located, are not deduplicated, the linker
output may contain multiple DISubprogram's having the same (uniqued)
type in their retainedNodes lists.
Further compilation of such modules causes crashes.
To tackle that,
* previous solution to handle LTO linking with local types in
retainedNodes is removed (cloneLocalTypes() function),
* for each loaded distinct (definition) DISubprogram, its retainedNodes
list is scanned after loading, and DITypes with a scope of another
subprogram are removed. If something from a Function corresponding to
the DISubprogram references uniqued type, we rely on cross-CU links.
Additionally:
* a check is added to Verifier to report about local types located in a
wrong retainedNodes list,
Original commit message follows.
---------
RFC https://discourse.llvm.org/t/rfc-dwarfdebug-fix-and-improve-handling-imported-entities-types-and-static-local-in-subprogram-and-lexical-block-scopes/68544
Similar to imported declarations, the patch tracks function-local types in
DISubprogram's 'retainedNodes' field. DwarfDebug is adjusted in accordance with
the aforementioned metadata change and provided a support of function-local
types scoped within a lexical block.
The patch assumes that DICompileUnit's 'enums field' no longer tracks local
types and DwarfDebug would assert if any locally-scoped types get placed there.
Authored-by: Kristina Bessonova <kbessonova at accesssoftek.com>
Co-authored-by: Jeremy Morse <jeremy.morse at sony.com>
Commit: 39f3d72b72fdb6831886148f1172d2f5b0ab2d49
https://github.com/llvm/llvm-project/commit/39f3d72b72fdb6831886148f1172d2f5b0ab2d49
Author: Wenju He <wenju.he at intel.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M libclc/clc/include/clc/internal/math/clc_sw_fma.h
M libclc/clc/include/clc/math/math.h
M libclc/clc/lib/clspv/SOURCES
R libclc/clc/lib/clspv/math/clc_sw_fma.cl
M libclc/clc/lib/generic/SOURCES
M libclc/clc/lib/generic/math/clc_fma.cl
R libclc/clc/lib/generic/math/clc_fma.inc
R libclc/clc/lib/generic/math/clc_sw_fma.cl
M libclc/clc/lib/r600/SOURCES
A libclc/clc/lib/r600/math/clc_fma.cl
A libclc/clc/lib/r600/math/clc_fma.inc
A libclc/clc/lib/r600/math/clc_sw_fma.cl
M libclc/clc/lib/spirv/SOURCES
R libclc/clc/lib/spirv/math/clc_runtime_has_hw_fma32.cl
M libclc/cmake/modules/AddLibclc.cmake
M libclc/opencl/lib/clspv/SOURCES
R libclc/opencl/lib/clspv/math/fma.cl
M libclc/opencl/lib/spirv/SOURCES
R libclc/opencl/lib/spirv/math/fma.cl
Log Message:
-----------
[libclc] Only use software fma for r600 target (#179428)
Implement generic __clc_fma with __builtin_elementwise_fma for all
targets except for r600.
Add --spirv-ext=+SPV_KHR_fma flag to SPIR-V generation. SPIR-V target
supports @llvm.fma since SPV_KHR_fma was implemented in llvm-spirv
(https://github.com/KhronosGroup/SPIRV-LLVM-Translator/pull/3467) and
SPIR-V backend (8f8dfbf8c9f0).
This PR assumes SPIR-V consumer with modern hardware supports fma.
Commit: 22cc68ca2f384292a05271947e5138f96e734401
https://github.com/llvm/llvm-project/commit/22cc68ca2f384292a05271947e5138f96e734401
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/Dialect/BUILD.bazel
Log Message:
-----------
[bazel][mlir][emitc][test] Port #177339: tosa -> emitc test deps (#179578)
Commit: 1ffe78811e4a502f5ac8a57d4931e3e3b80aaf96
https://github.com/llvm/llvm-project/commit/1ffe78811e4a502f5ac8a57d4931e3e3b80aaf96
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
R llvm/test/CodeGen/PowerPC/change-no-infs.ll
M llvm/test/CodeGen/PowerPC/fsel.ll
M llvm/test/CodeGen/PowerPC/scalar-equal.ll
M llvm/test/CodeGen/PowerPC/scalar_cmp.ll
Log Message:
-----------
[PowerPC] Remove NoInfsFPMath uses (#163029)
Only `ninf` should be used.
This is the PowerPC part.
Commit: 28d0208573553b80759994d5abc56821a08ad9fa
https://github.com/llvm/llvm-project/commit/28d0208573553b80759994d5abc56821a08ad9fa
Author: Brendan Dahl <brendan.dahl at gmail.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/cmake/modules/TableGen.cmake
Log Message:
-----------
[TargetParser][cmake] Recurse for TableGen deps (#177274)
In the dependency tracking for TableGen-generated files, globbing was
previously limited to the root of include directories. This missed
transitive dependencies in subdirectories, such as the target-specific
intrinsic definitions located in llvm/IR/.
Modifying these untracked files could cause global state (like the
intrinsic enum) to shift without triggering a rebuild of downstream
instruction selectors. This resulted in "Cannot select: intrinsic"
errors during incremental builds. Using a recursive glob ensures all
relevant TableGen files are correctly tracked regardless of their
directory depth.
Fixes #156744
Commit: 14bebde0fdf6ec9819f647b1a8ac498fc1ac4cbe
https://github.com/llvm/llvm-project/commit/14bebde0fdf6ec9819f647b1a8ac498fc1ac4cbe
Author: Brendan Dahl <brendan.dahl at gmail.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/cmake/modules/TableGen.cmake
Log Message:
-----------
Revert "[TargetParser][cmake] Recurse for TableGen deps" (#179588)
Reverts llvm/llvm-project#177274
Appears to be breaking some bots.
Commit: 114f3b530bae5a195234e3bd1c1328b38b39a000
https://github.com/llvm/llvm-project/commit/114f3b530bae5a195234e3bd1c1328b38b39a000
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/test/Dialect/Arith/invalid.mlir
Log Message:
-----------
[MLIR][Arith] Fix crash in `arith.select` verification with mixed types (#178840)
The `BooleanConditionOrMatchingShape` trait was assuming that if the
condition was not i1, both condition and result must be `ShapedTypes`.
It would then call `AllShapesMatch` which performs a blind cast to
`ShapedType`, causing a crash when one of the operands was a scalar.
This PATCH fixes the problem.
Closes [#178230](https://github.com/llvm/llvm-project/issues/178230)
Commit: e0181661dc6e3c0e474a4e166d15c07aa5568bdb
https://github.com/llvm/llvm-project/commit/e0181661dc6e3c0e474a4e166d15c07aa5568bdb
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/test/TableGen/generic-tables-instruction.td
M llvm/test/TableGen/generic-tables.td
M llvm/utils/TableGen/SearchableTableEmitter.cpp
Log Message:
-----------
[TableGen][NFC] Use templated std::clamp (#179400)
Commit: 6b77030339c57a9758722ef5615ef93b3475ab33
https://github.com/llvm/llvm-project/commit/6b77030339c57a9758722ef5615ef93b3475ab33
Author: GkvJwa <gkvjwa at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticCommonKinds.td
M clang/lib/CodeGen/CGDecl.cpp
M clang/test/CodeGenCXX/exceptions-seh.cpp
Log Message:
-----------
[WinEH] Fix crash object unwinding in seh block (#172287)
On Windows, prevent object unwinding when the current function uses SEH, consistent with MSVC. It also avoids EH number algorithm crashes
Commit: 6e2048e06acff8c9eaca606ee24069a83a814c01
https://github.com/llvm/llvm-project/commit/6e2048e06acff8c9eaca606ee24069a83a814c01
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/test/CodeGen/RISCV/rvv/vwsll-sdnode.ll
Log Message:
-----------
[RISCV] Add isel patterns to form vwsll.vx/vi when the LHS is an any_extend. (#179571)
If we know the shift amount is greater than or equal to the
incoming EEW, the zext will have been converted to an anyext by
SimplifyDemandedBits. Treat this case the same as zext.
Commit: cc5859671d796a9d0ca579ab5ef6b32bd6b074a6
https://github.com/llvm/llvm-project/commit/cc5859671d796a9d0ca579ab5ef6b32bd6b074a6
Author: Wael Yehia <wyehia at ca.ibm.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/test/CodeGen/PowerPC/aix-ifunc-toc-restore-query-neg.ll
Log Message:
-----------
[AIX] disable aix-ifunc-toc-restore-query-neg.ll on all platforms except ppc for now (#153049)
Commit: e2061328a8ae51cdf80e211ad27dd13d7bba766d
https://github.com/llvm/llvm-project/commit/e2061328a8ae51cdf80e211ad27dd13d7bba766d
Author: Wael Yehia <wyehia at ca.ibm.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/test/CodeGen/PowerPC/aix-ifunc-toc-restore-query.ll
Log Message:
-----------
[AIX] fix aix-ifunc-toc-restore-query.ll (#153049)
Commit: d53bf41395873918d0759f5ed17876143c64a635
https://github.com/llvm/llvm-project/commit/d53bf41395873918d0759f5ed17876143c64a635
Author: Fangrui Song <i at maskray.me>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Writer.cpp
A lld/test/ELF/eh-frame-hdr-sdata8.s
R lld/test/ELF/eh-frame-pcrel-overflow.s
Log Message:
-----------
[ELF] Support DW_EH_PE_sdata8 encoding in .eh_frame_hdr (#179089)
Currently, both GNU ld and lld only support
`table_enc = DW_EH_PE_datarel | DW_EH_PE_sdata4` for .eh_frame_hdr.
When a table entry exceeds the 32-bit range, we can use
`DW_EH_PE_sdata8` instead of reporting an error
(https://reviews.llvm.org/D49607 introduced the "PC offset is too large"
error). This is useful for certain large executables.
This patch auto-detects when 64-bit encoding is needed and upgrades
the encoding accordingly. We use DW_EH_PE_sdata8 when either a table
entry or eh_frame_ptr exceeds the 32-bit range.
Technically, eh_frame_ptr could remain sdata4 when only table entries
require sdata8, but there is little value in this flexibility since
.eh_frame/.eh_frame_hdr distance is a much less strict constraint than
.text/.eh_frame_hdr distance.
The implementation caches FDE data in EhFrameHeader during
updateAllocSize and reuses it in writeTo.
Previously, `EhFrameSection::getFdePc` was used to read the
`initial_location` value from .eh_frame FDEs. Since the value equals the
relocated symbol's VA for all cases that matter, we now obtain the value
directly and simplify the implementation.
Also update the outdated comment about sorting the FDE list; the ICF
case mentioned there no longer applies after
https://reviews.llvm.org/D116093.
In the new test eh-frame-hdr-sdata8.s, 3.lds is carefully crafted to
ensure that .eh_frame_hdr size requires fixed-point iteration (to test
`updateAllocSize`). This is also groundwork for compact unwind support
similar to Mach-O `__unwind_info`.
Close #172777
Commit: a3a15f3252dee76e394cb4c20bc287194ac55667
https://github.com/llvm/llvm-project/commit/a3a15f3252dee76e394cb4c20bc287194ac55667
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
[LLVM] Remove 'libclc' from ALL projects (#179485)
Summary:
We should only build `libclc` as a runtime in the future. There's
already a warning for putting it in the projects list so it shouldn't be
included in all the projects.
Commit: 7b2190c458807c2b4bb4fb9a2c08a83bfd48adb9
https://github.com/llvm/llvm-project/commit/7b2190c458807c2b4bb4fb9a2c08a83bfd48adb9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/test/CodeGen/RISCV/compress-opt-select.ll
Log Message:
-----------
[RISCV] Enable SelectCompressOpt with HasStdExtZca. (#179601)
This removes the last use of HasStdExtC in tablegen so I've removed it as
well.
Commit: a03f82d7e582078163bce7ecaf960e8a53fb4744
https://github.com/llvm/llvm-project/commit/a03f82d7e582078163bce7ecaf960e8a53fb4744
Author: Teja Alaghari <teja.alaghari at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/tools/llc/new-pm/regalloc-amdgpu.mir
Log Message:
-----------
[AMDGPU][NPM] Add target-specific register allocation options (#178889)
Add below AMDGPU-specific options for its SGPR, WWM & VGPR
registers allocation in NPM -
- `-sgpr-regalloc-npm`
- `-wwm-regalloc-npm`
- `-vgpr-regalloc-npm`
Commit: d8073d9b4bd4af4380e4ce04ad9ee6f41dd8df42
https://github.com/llvm/llvm-project/commit/d8073d9b4bd4af4380e4ce04ad9ee6f41dd8df42
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
A llvm/test/Transforms/InstCombine/vector-splice.ll
Log Message:
-----------
[InstCombine] Bubble splices of binop operands to their result (#179432)
In #172961 we are trying to remove llvm.experimental.vp.reverse now that
llvm.vector.splice.right supports variable offsets.
A VP reverse reverses the first EVL elements of the vector, e.g.
01234567 -> 210xxxxx when EVL=3, where x=poison.
This can now be represented by splice.right(reverse(V), poison, EVL):
01234567
-> 76543210 (reverse)
-> 210xxxxx (splice.right)
This PR implements the vp.reverse combines that pull through binops, but
generalized to vector.splice. Specifically, this implements the
following combines:
Op(splice(V1, poison, offset), splice(V2, poison, offset)) -> splice(Op(V1, V2), poison, offset)
Op(splice(V1, poison, offset), RHSSplat) -> splice(Op(V1, RHSSplat), poison, offset)
Op(LHSSplat, splice(V2, poison, offset)) -> splice(Op(LHSSplat, V2), poison, offset)
We can then remove the vp.reverse intrinsic and its related combines
soon after, once we migrate the loop vectorizer over.
Commit: 0d11f68a8aa235d023edee2d836373ebbf4786ed
https://github.com/llvm/llvm-project/commit/0d11f68a8aa235d023edee2d836373ebbf4786ed
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-struct.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/unmasked-tu.ll
M llvm/test/CodeGen/RISCV/rvv/vaadd.ll
M llvm/test/CodeGen/RISCV/rvv/vaaddu.ll
M llvm/test/CodeGen/RISCV/rvv/vadd.ll
M llvm/test/CodeGen/RISCV/rvv/vand.ll
M llvm/test/CodeGen/RISCV/rvv/vandn.ll
M llvm/test/CodeGen/RISCV/rvv/vasub.ll
M llvm/test/CodeGen/RISCV/rvv/vasubu.ll
M llvm/test/CodeGen/RISCV/rvv/vclmul.ll
M llvm/test/CodeGen/RISCV/rvv/vclmulh.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-bf.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-bf.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-bf.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-bf.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul.ll
M llvm/test/CodeGen/RISCV/rvv/vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsgnj-bf.ll
M llvm/test/CodeGen/RISCV/rvv/vfsgnj.ll
M llvm/test/CodeGen/RISCV/rvv/vfsgnjn-bf.ll
M llvm/test/CodeGen/RISCV/rvv/vfsgnjn.ll
M llvm/test/CodeGen/RISCV/rvv/vfsgnjx-bf.ll
M llvm/test/CodeGen/RISCV/rvv/vfsgnjx.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-bf.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub.ll
M llvm/test/CodeGen/RISCV/rvv/vfwadd-w-bf.ll
M llvm/test/CodeGen/RISCV/rvv/vfwadd.w.ll
M llvm/test/CodeGen/RISCV/rvv/vfwsub-w-bf.ll
M llvm/test/CodeGen/RISCV/rvv/vfwsub.w.ll
M llvm/test/CodeGen/RISCV/rvv/vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmax.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu.ll
M llvm/test/CodeGen/RISCV/rvv/vmin.ll
M llvm/test/CodeGen/RISCV/rvv/vminu.ll
M llvm/test/CodeGen/RISCV/rvv/vmul.ll
M llvm/test/CodeGen/RISCV/rvv/vmulh.ll
M llvm/test/CodeGen/RISCV/rvv/vmulhsu.ll
M llvm/test/CodeGen/RISCV/rvv/vmulhu.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vor.ll
M llvm/test/CodeGen/RISCV/rvv/vp-vector-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/vrem.ll
M llvm/test/CodeGen/RISCV/rvv/vremu.ll
M llvm/test/CodeGen/RISCV/rvv/vrol.ll
M llvm/test/CodeGen/RISCV/rvv/vror.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
M llvm/test/CodeGen/RISCV/rvv/vsll.ll
M llvm/test/CodeGen/RISCV/rvv/vsmul.ll
M llvm/test/CodeGen/RISCV/rvv/vsra.ll
M llvm/test/CodeGen/RISCV/rvv/vsrl.ll
M llvm/test/CodeGen/RISCV/rvv/vssub.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu.ll
M llvm/test/CodeGen/RISCV/rvv/vsub.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd.w.ll
M llvm/test/CodeGen/RISCV/rvv/vwaddu.w.ll
M llvm/test/CodeGen/RISCV/rvv/vwsub.w.ll
M llvm/test/CodeGen/RISCV/rvv/vwsubu.w.ll
M llvm/test/CodeGen/RISCV/rvv/vxor.ll
Log Message:
-----------
[RISCV] Run VLOptimizer right after ISel (#179377)
When working on #177238 I found some cases where machine SSA
optimizations (or any optimizations that run before the current
VLOptimizer, really) can benefit from reduced VL operands. In addition,
by running VLOptimizer early, in the future we can further remove the
mini VL reduction currently in RISCVVectorPeephole, once we teach
VLOptimizer some corner cases (e.g. handle vector stores).
This patch therefore moves VLOptimizer to be (basically) right after the
ISel phase.
Commit: b10d6a501e0da1a88ebec3e05123ab99e307ad21
https://github.com/llvm/llvm-project/commit/b10d6a501e0da1a88ebec3e05123ab99e307ad21
Author: Mark Zhuang <mark.zhuang at spacemit.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVMacroFusion.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/test/CodeGen/RISCV/features-info.ll
A llvm/test/CodeGen/RISCV/macro-fusion-add-mem.mir
A llvm/test/CodeGen/RISCV/macro-fusion-logic-imm-reg.mir
A llvm/test/CodeGen/RISCV/macro-fusion-logic-reg-imm.mir
A llvm/test/CodeGen/RISCV/macro-fusion-logic-reg-reg.mir
A llvm/test/CodeGen/RISCV/macro-fusion-mul-add.mir
A llvm/test/CodeGen/RISCV/macro-fusion-shift-bit-extract.mir
Log Message:
-----------
[RISCV] Add macro fusion support for spacemit-x100 (#178594)
New fusion types:
- AND(I)/OR(I)/XOR(I) + AND(I)/OR(I)/XOR(I) (3 variants)
- MUL(W)+ADD(W)
- ADD + LOAD/STORE
- SLLI + SRLI/SRAI
Commit: 2abc5ecb33714c483c8fad08b7c40fda0e2e0a36
https://github.com/llvm/llvm-project/commit/2abc5ecb33714c483c8fad08b7c40fda0e2e0a36
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/tools/llvm-objdump/SourcePrinter.cpp
Log Message:
-----------
[perf] Replace copy-assign by move-assign in llvm/tools/ (#179463)
Commit: dcf853df8fda885cafbc02f916ef01684b7d1104
https://github.com/llvm/llvm-project/commit/dcf853df8fda885cafbc02f916ef01684b7d1104
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/Support/VirtualFileSystem.cpp
Log Message:
-----------
[perf] Replace extra copy-assign by move-assign in llvm/lib/ (#179465)
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: ed2aa304cac86e7fa88cd271c2d73ffd9e324e22
https://github.com/llvm/llvm-project/commit/ed2aa304cac86e7fa88cd271c2d73ffd9e324e22
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-03 (Tue, 03 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
Log Message:
-----------
[RISCV] Use RVInstVV as the base for CustomSiFiveVMACC. NFC (#179565)
This correctly names the operands vd, vs1, and vs2 instead of rd, rs1,
and rs2. RVInstVCCustom2 is now only used for VCIX which has its own
operand naming problems.
I'm considering using named operand indices in
RISCVAsmParser::validateInstruction for the RVVConstraints, but first I
would have to make vs1, vs2 named correctly across all vector
instructions.
Commit: 85c50299172bbd36ac345d5f50bce4bfee1e5667
https://github.com/llvm/llvm-project/commit/85c50299172bbd36ac345d5f50bce4bfee1e5667
Author: puneeth_aditya_5656 <myakampuneeth at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/test/AST/ByteCode/invalid.cpp
Log Message:
-----------
[clang][bytecode] Fix crash when dereferencing cast to larger type (#179030)
## Summary
When dereferencing a pointer that was `reinterpret_cast` to a larger
type (e.g. `*(int**)""`), the bytecode interpreter would crash with an
assertion failure because it tried to read more bytes than the
allocation contained.
## Changes
- Add a size check in `Pointer::toRValue()` before calling `deref<T>()`
to ensure the allocation is large enough
- If the allocation is too small, return `std::nullopt` to gracefully
fail the constant evaluation instead of crashing
- Add regression test
Fixes #179015
Commit: 3794b83ae59f79910f9ef573a753435c3f99ec68
https://github.com/llvm/llvm-project/commit/3794b83ae59f79910f9ef573a753435c3f99ec68
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Don't emit VP_SETCC in combineVectorSizedSetCCEquality. NFC (#179479)
This is part of the work to remove trivial VP intrinsics.
In the combineVectorSizedSetCCEquality combine, used for the compares
that ExpandMemcmp generates, we currently emit a VP_SETCC. We can just
emit a regular SETCC and let RISCVVLOptimizer take care of reducing the
VL.
Commit: 653b336e66db89650b767590fd850f340b8bc067
https://github.com/llvm/llvm-project/commit/653b336e66db89650b767590fd850f340b8bc067
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
Log Message:
-----------
[LegalizeVectorTypes] Don't emit VP_SELECT when widening MLOAD to VP_LOAD (#179478)
This is part of the work to remove trivial VP intrinsics.
When widening an MLOAD we may use a VP_LOAD if it's supported. We use a
VP_SELECT to merge in the passthru, but we don't check if it's supported
by the target. This changes it to just emit a regular VSELECT instead to
prevent crashing in that case, and a VP_MERGE to keep the lanes past EVL
poison.
Commit: 426374ed120763d83691e76342db82de056b9063
https://github.com/llvm/llvm-project/commit/426374ed120763d83691e76342db82de056b9063
Author: Twice <twice at apache.org>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M mlir/lib/Bindings/Python/Globals.cpp
Log Message:
-----------
[MLIR][Python] Ignore the returned status of `loadDialectModule` in lookup functions (#179609)
Since `loadDialectModule` doesn't work for Python-defined dialects
(`mlir.dialects.ext`), currently we should lookup for
dialect/operation/opadaptor class even if the `loadDialectModule`
function fails. It's also because users can import some modules
manually, and we do already ignore it in some cases:
https://github.com/llvm/llvm-project/blob/e2061328a8ae51cdf80e211ad27dd13d7bba766d/mlir/lib/Bindings/Python/Globals.cpp#L163-L166
Related to
https://github.com/llvm/llvm-project/pull/176920#discussion_r2762029022.
Commit: 4553f991a86e202fe216d98c752a50ad754f37f1
https://github.com/llvm/llvm-project/commit/4553f991a86e202fe216d98c752a50ad754f37f1
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/dot4add_i8packed.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/dot4add_u8packed.ll
Log Message:
-----------
[SPIRV] selectDot4AddPacked: add missing PackedVectorFormat4x8Bit optional operand (#179476)
According to SPIRV:
```
PackedVectorFormat4x8Bit (PackedVectorFormat4x8BitKHR)
Interpret 32-bit scalar integer operands as vectors of four 8-bit
components. Vector components follow byte significance order with the
lowest-numbered component stored in the least significant byte.
```
And in OpSDot / OpUDot:
```
When Vector 1 and Vector 2 are scalar integer types, Packed Vector
Format must be specified to select how the integers are to be
interpreted as vectors.
```
Commit: 04c56505f8adbd8e6c4b05318555990cd52df662
https://github.com/llvm/llvm-project/commit/04c56505f8adbd8e6c4b05318555990cd52df662
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/include/llvm/CodeGen/MachineInstrBuilder.h
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/ARM/ARMInstructionSelector.cpp
M llvm/lib/Target/Mips/MipsInstructionSelector.cpp
M llvm/lib/Target/PowerPC/GISel/PPCInstructionSelector.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
Log Message:
-----------
[NFC][LLVM] Make `constrainSelectedInstRegOperands` return `void` (#179501)
`constrainSelectedInstRegOperands` always returns `true`; so it can be
safely transformed to return `void` instead.
A follow-up patch should update `MachineInstrBuilder::constrainAllUses`.
Commit: 87e38d3b9767df0e3a289bf46af11115de14eb7d
https://github.com/llvm/llvm-project/commit/87e38d3b9767df0e3a289bf46af11115de14eb7d
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
Log Message:
-----------
[clang][bytecode][NFC] Add Pointer::canDeref (#179618)
Commit: 2b887ce6044f0badee83bc0556ed4c657ad42ae7
https://github.com/llvm/llvm-project/commit/2b887ce6044f0badee83bc0556ed4c657ad42ae7
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
Log Message:
-----------
[SimpleLoopUnswitch][NFC] move quadratic asserts under EXPENSIVE_CHECKS (#144887)
Three asserts/checks in SimpleLoopUnswitchPass are quite expensive on IR
containing many deeply nested loop nests.
Their cost is not linear with the number of loop nests and these asserts
quickly become the most significant cost of the whole compilation.
This patch move some of the asserts under `EXPENSIVE_CHECKS` and leaves the one
line 1080 unguarded.
This problem was exposed with flang because of Fortran
multidimensional arrays and array expressions. In some programs, half of the end to
end compilation time was spent in those asserts.
Commit: dd02b404b020729a93919e3f6df650119fb99b77
https://github.com/llvm/llvm-project/commit/dd02b404b020729a93919e3f6df650119fb99b77
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/gfni-lzcnt.ll
M llvm/test/CodeGen/X86/gfni-tzcnt.ll
Log Message:
-----------
[X86] Lower CTTZ/CTLZ vXi8 vectors using GF2P8AFFINEQB (#118012)
CTTZ can be lowered using GF2P8AFFINEQB if we isolate the lowest set bit
(or is zero) and then use GF2P8AFFINEQB to perform a look up
With CTTZ, CTLZ can be lowered as CTTZ(BITREVERSE())
As discussed on #110308
Commit: 90c632ab48748808e95d9bb8cd4f3028888dc1b0
https://github.com/llvm/llvm-project/commit/90c632ab48748808e95d9bb8cd4f3028888dc1b0
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/MC/MCXCOFFStreamer.cpp
A llvm/test/CodeGen/PowerPC/aix-debug-aranges.ll
Log Message:
-----------
[PowerPC] Only set QualName symbol on first section switch (#179253)
We were setting it every time when switching to the section. This caused
problems when the debug_aranges emission performed a switch at the end
of the section, resulting in symbols incorrectly pointing to the end
instead of the start of the function.
Commit: f537b4e51822b19780386e0575ff95e82f8ec445
https://github.com/llvm/llvm-project/commit/f537b4e51822b19780386e0575ff95e82f8ec445
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M libcxx/include/__chrono/duration.h
Log Message:
-----------
[libc++] Avoid template instantiations in the duration aliases (#178182)
These templates are instantiated whenever `<__chrono/duration.h>` is
included, making these calculations quite costly. I also don't think
that folding the calculations decreases readability here (IMO it's
actually easier to read now), so I don't think there is a reason we
shouldn't do this.
`<__chrono/duration.h>` is currently (transitively) included in at least
(I stopped checking) `<algorithm>`, `<atomic>`, `<barrier>`, `<chrono>`,
`<condition_variable>`, `<future>`, `<iomanip>`, `<ios>`, `<iostream>`,
`<istream>`, `<latch>`, `<locale>`, `<mutex>`, `<ostream>`,
`<semaphore>`, `<shared_mutex>`, `<syncstream>` and `<thread>`
Commit: 45aa84b4051bf23fbd766ec1d790d7c66103f72a
https://github.com/llvm/llvm-project/commit/45aa84b4051bf23fbd766ec1d790d7c66103f72a
Author: Udaya Ranga <udaya.ranga at arm.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaShapeOps.td
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/constant_folding.mlir
Log Message:
-----------
[mlir][tosa]: Add MIN_SHAPE, MAX_SHAPE Ops folders (#179488)
Signed-off-by: Udaya Ranga <udaya.ranga at arm.com>
Commit: 3a653afd45709432181952c0ffdb53eceb0939ae
https://github.com/llvm/llvm-project/commit/3a653afd45709432181952c0ffdb53eceb0939ae
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M libcxx/include/__algorithm/unwrap_range.h
Log Message:
-----------
[libc++] Simplify the implementation of __{un,re}wrap_range (#178381)
We can use a relatively simple `if constexpr` chain instead of SFINAE
and class template specialization, making the functions much simpler to
understand.
Commit: 974b76899953e8f1b3f070c5ce8a3bbbbd29e813
https://github.com/llvm/llvm-project/commit/974b76899953e8f1b3f070c5ce8a3bbbbd29e813
Author: Matthew Devereau <matthew.devereau at arm.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
A llvm/test/CodeGen/AArch64/clmul-fixed.ll
A llvm/test/CodeGen/AArch64/clmul-scalable.ll
M llvm/test/CodeGen/AArch64/clmul.ll
Log Message:
-----------
[AArch64] Add clmul AArch64 lowering tests (#179495)
Commit: 275eea298b0fc33b02044f552195f6e297aa7801
https://github.com/llvm/llvm-project/commit/275eea298b0fc33b02044f552195f6e297aa7801
Author: Abinaya Saravanan <quic_asaravan at quicinc.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
A llvm/test/CodeGen/Hexagon/no-invalid-node-v4i16.ll
Log Message:
-----------
[HEXAGON] Extend/Truncate the shift amount into i32 (#179499)
Fixes a Backend error
Commit: a631f3e434b41471aa9f852f23bbc1d0ab4fa7bd
https://github.com/llvm/llvm-project/commit/a631f3e434b41471aa9f852f23bbc1d0ab4fa7bd
Author: bala-bhargav <penugondabalabharghav at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/gfni-xor-fold-avx512.ll
A llvm/test/CodeGen/X86/gfni-xor-fold.ll
Log Message:
-----------
[X86] Fold vgf2p8affineqb XOR with splat constant into immediate (#179103)
The vgf2p8affineqb instruction performs an affine transformation on each
byte and then XORs the result with an 8-bit immediate operand. When this
instruction is followed by a standalone XOR with a splatted constant,
LLVM currently generates extra instructions instead of folding the
constant into the instruction's immediate.
This PR adds a DAG combine optimization that detects the pattern
vgf2p8affineqb(x, m, imm8) ^ C where C is a splatted 8-bit constant and
transforms it to vgf2p8affineqb(x, m, imm8 ^ C), eliminating the
unnecessary XOR instruction.
- The optimization runs during the combine phase after type legalization
- Handles XOR with the constant on either side (commutative)
- Only applies when the GFNI instruction has a single use to avoid
de-optimization
- Validates that the XOR operand is a splatted 8-bit constant before
folding
- Includes test coverage for positive cases and negative cases
(multi-use, non-splat constant, variable XOR)
Commit: 3462c2b552069cd62dceb006c416ccf9f383f3af
https://github.com/llvm/llvm-project/commit/3462c2b552069cd62dceb006c416ccf9f383f3af
Author: GkvJwa <gkvjwa at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/test/CodeGenCXX/exceptions-seh.cpp
Log Message:
-----------
[NFC] Add redirect the output (#179623)
Commit: 046413ff3f17998b192316202d56bb2c2471af23
https://github.com/llvm/llvm-project/commit/046413ff3f17998b192316202d56bb2c2471af23
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/unmerge-sgpr-s16.mir
Log Message:
-----------
AMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize (#179441)
Used to fail EXPENSIVE_CHECKS because of type mismatch.
Commit: 280833247da6c83d371254fda5d2cee397acab47
https://github.com/llvm/llvm-project/commit/280833247da6c83d371254fda5d2cee397acab47
Author: Shamshura Egor <164661612+egorshamshura at users.noreply.github.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-bzhi.ll
Log Message:
-----------
[X86] computeKnownBitsForTargetNode - extend X86ISD::BZHI handling. Fixes 177364. (#179444)
Fixes #177364
Commit: 05db0c466afc9c6fac4ed2785fac8b4709c7cdf4
https://github.com/llvm/llvm-project/commit/05db0c466afc9c6fac4ed2785fac8b4709c7cdf4
Author: idubinov <53053614+idubinov at users.noreply.github.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULaneMaskUtils.h
Log Message:
-----------
[AMDGPU] Add CmpLG and OrN2 operators to LaneMaskConstants (#179493)
Add CmpLG and OrN2 operators to be able to use the LaneMaskConstants in
PhiLoweringHelper from SILowerI1Copies
Commit: 071bb466db85f52081b10d6e8d26a2c5395e2ece
https://github.com/llvm/llvm-project/commit/071bb466db85f52081b10d6e8d26a2c5395e2ece
Author: Abhinav Garg <39309352+abhigargrepo at users.noreply.github.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
A llvm/test/CodeGen/AMDGPU/pei-build-spill-offset-overflow-gfx950.mir
Log Message:
-----------
[AMDGPU][SIRegisterInfo] Fix maxoffset calculation in buildSpillLoadStore (#179182)
This PR addresses Maxoffset calculation bug in SIRegisterInfo. When
RemSize is non-zero, maxoffset, that needs to be encoded in the offset
field, will be equal to "Offset + Size".
---------
Co-authored-by: Abhinav Garg <abhigarg at amd.com>
Commit: 49bf907c832b39ff3dec47049eb80a7a192b92b3
https://github.com/llvm/llvm-project/commit/49bf907c832b39ff3dec47049eb80a7a192b92b3
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachineInstrBuilder.h
M llvm/lib/Target/Mips/MipsInstructionSelector.cpp
M llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
M llvm/lib/Target/PowerPC/GISel/PPCInstructionSelector.cpp
M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
Log Message:
-----------
[NFC][LLVM] Make `MachineInstrBuilder::constrainAllUses` return `void` (#179632)
This function always returns `true`; so we can transform it to return
`void` and simplify the code.
Follow up of https://github.com/llvm/llvm-project/pull/179501 .
Commit: 8a2b41b49d754c3664d834416525a8195b220db5
https://github.com/llvm/llvm-project/commit/8a2b41b49d754c3664d834416525a8195b220db5
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/X86.cpp
Log Message:
-----------
[X86][NFC] Split mapxf options from mapx_features (#179638)
So that we don't need to check `Name == "apxf"` again.
Commit: ea7f8c8032ed224eacf59d1af105d9e16c49f87d
https://github.com/llvm/llvm-project/commit/ea7f8c8032ed224eacf59d1af105d9e16c49f87d
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
Log Message:
-----------
[AArch64] Fix a couple of typos (NFC) (#179639)
Fixes some comments I forgot to correct/update.
Commit: 7171d6c73bbe791d931632dba27f322edf25fe28
https://github.com/llvm/llvm-project/commit/7171d6c73bbe791d931632dba27f322edf25fe28
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVArithmeticOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAtomicOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCastOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCompositeOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGroupOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVStructureOps.td
Log Message:
-----------
[mlir][spirv] Update op examples that diverged from assemblyFormat. NFC. (#179594)
Commit: a8af0901dd1a8133f0978e11b84e91558aa99873
https://github.com/llvm/llvm-project/commit/a8af0901dd1a8133f0978e11b84e91558aa99873
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/c.c
Log Message:
-----------
[clang][bytecode] Don't call getOffset on non-block pointers (#179628)
Fixes https://github.com/llvm/llvm-project/issues/177587
Commit: 0fe9454c5672a73594fe71e28987760b7d82e3b7
https://github.com/llvm/llvm-project/commit/0fe9454c5672a73594fe71e28987760b7d82e3b7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx512bwvl-arith.ll
M llvm/test/CodeGen/X86/legalize-vec-assertzext.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
Log Message:
-----------
[X86] Fold EXPAND(X,Y,M) -> SELECT(M,X,Y) when M is a lowest bit mask (#179630)
If a EXPAND node mask is just the lowest bits, then we can replace it
with a more general SELECT node, which can be cheaper and potentially
allow predication.
Fixes #179008
Commit: a13c6ea80dbd4c0a26ad290595aaf79f25f8ffa9
https://github.com/llvm/llvm-project/commit/a13c6ea80dbd4c0a26ad290595aaf79f25f8ffa9
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
Log Message:
-----------
[CodeGen] Simplify ExpandPostRA::LowerSubregToReg. NFC. (#179634)
SUBREG_TO_REG always has a non-zero subreg index so DstSubReg can never
be the same as DstReg.
Commit: d24a6754ce8bf980dfc294dbc359bb8528db48b8
https://github.com/llvm/llvm-project/commit/d24a6754ce8bf980dfc294dbc359bb8528db48b8
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LowerMemIntrinsics.h
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll
M llvm/test/CodeGen/AMDGPU/lower-mem-intrinsics-threshold.ll
M llvm/test/CodeGen/AMDGPU/lower-mem-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
A llvm/test/CodeGen/AMDGPU/memset-param-combinations.ll
M llvm/test/CodeGen/NVPTX/lower-aggr-copies.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/memset.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/AMDGPU/expand-mem-intrinsics.ll
M llvm/test/Transforms/PreISelIntrinsicLowering/X86/memset-inline-non-constant-len.ll
Log Message:
-----------
[LowerMemIntrinsics] Optimize memset lowering (#169040)
This patch changes the memset lowering to match the optimized memcpy lowering.
The memset lowering now queries TTI.getMemcpyLoopLoweringType for a preferred
memory access type. If that type is larger than a byte, the memset is lowered
into two loops: a main loop that stores a sufficiently wide vector splat of the
SetValue with the preferred memory access type and a residual loop that covers
the remaining bytes individually. If the memset size is statically known, the
residual loop is replaced by a sequence of stores.
This improves memset performance on gfx1030 (AMDGPU) in microbenchmarks by
around 7-20x.
I'm planning similar treatment for memset.pattern as a follow-up PR.
For SWDEV-543208.
Commit: cd31effb0aac9afde43a64b236c5fc95717c255c
https://github.com/llvm/llvm-project/commit/cd31effb0aac9afde43a64b236c5fc95717c255c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/placement-new.cpp
Log Message:
-----------
[clang][bytecode] Reject invalid CXXNewExprs (#179629)
If they contain errors, we can't rely on any of their API returning sane
values.
Commit: 5b073761448229fd8f967f07517a35568e449aca
https://github.com/llvm/llvm-project/commit/5b073761448229fd8f967f07517a35568e449aca
Author: puneeth_aditya_5656 <myakampuneeth at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang-tools-extra/clang-tidy/cppcoreguidelines/ProTypeVarargCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/pro-type-vararg.cpp
Log Message:
-----------
[clang-tidy] Allow type-generic builtins in pro-type-vararg check (#178656)
## Summary
Add type generic builtins to the allowed variadics list in the
`cppcoreguidelines-pro-type-vararg` check (also used by `hicpp-vararg`):
- `__builtin_clzg`
- `__builtin_ctzg`
- `__builtin_popcountg`
- `__builtin_bswapg`
## Root Cause
These builtins are declared as variadic (`int(...)`) to accept any
integer type via `CustomTypeChecking`. However, they are not C style
vararg functions , they take exactly one argument of a generic integer
type.
## Test
Added test cases in `pro-type-vararg.cpp` to verify no warning is
emitted.
Fixes #178629
Commit: be9ba44256fe84654da51714b5fa8dd7b13d6937
https://github.com/llvm/llvm-project/commit/be9ba44256fe84654da51714b5fa8dd7b13d6937
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/gfx11-sgpr-hazard-latency.mir
M llvm/test/CodeGen/AMDGPU/schedule-barrier-latency-gfx9.mir
Log Message:
-----------
[AMDGPU] Add machineFunctionInfo to recent MIR tests (#179602)
Initialize machineFunctionInfo in recently added MIR tests to assist in
downstream testing.
Commit: 890cdbe65358eb137788ea5d3a8007ec238be26b
https://github.com/llvm/llvm-project/commit/890cdbe65358eb137788ea5d3a8007ec238be26b
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/invalid.cpp
Log Message:
-----------
[clang][bytecode] Handle a null record better (#179645)
This would otherwise later assert in vsitZeroRecordInitializer().
Commit: 7ccdc06780b05bd8f31c20a9734fca2fbf275d7f
https://github.com/llvm/llvm-project/commit/7ccdc06780b05bd8f31c20a9734fca2fbf275d7f
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Semantics/OpenMP/local-variables.f90
Log Message:
-----------
[flang][OpenMP] Leave local automatic variables alone (#178739)
There is code in resolve-directives.cpp that tries to apply DSA flags to
symbols encountered inside constructs. This code was written with the
assumption that all such symbols will be declared outside of the
construct.
When a symbol declared in a BLOCK construct nested in a construct was
found, the code would attempt to either privatize or share it in the
enclosing construct (where the symbol didn't exist) leading to trouble.
BLOCK constructs (and thus the possibility of having local variables)
was introduced in F2008.
The first OpenMP spec that considered F2008 was 5.0, where the behavior
of the BLOCK construct was explicitly left unspecified. From OpenMP 5.1
onwards, all local non-static variables are private in the construct
enclosing the declaration. This PR extends this behavior retroactively
to all prior OpenMP versions.
Fixes https://github.com/llvm/llvm-project/issues/178613
Commit: 1da316985cd1148954f1afce6db7535e9b3eb892
https://github.com/llvm/llvm-project/commit/1da316985cd1148954f1afce6db7535e9b3eb892
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/builtin-object-size-codegen.c
Log Message:
-----------
[clang][bytecode] Reject void ArraySubscriptExprs (#179619)
This happens in C when we subscript an expression of type void*, but
there's nothing for us to do here. Just reject it early.
Fixes https://github.com/llvm/llvm-project/issues/177758
Commit: f121d52bdeeb8022ef474651a7e64df173ac9344
https://github.com/llvm/llvm-project/commit/f121d52bdeeb8022ef474651a7e64df173ac9344
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M flang/lib/Lower/ConvertCall.cpp
M flang/test/Lower/HLFIR/function-return-as-expr.f90
M flang/test/Lower/HLFIR/function-return-destroy.f90
M flang/test/Lower/HLFIR/where.f90
M flang/test/Lower/io-statement-clean-ups.f90
Log Message:
-----------
[flang] fix early free of allocatable function result in WHERE mask (#178691)
Fix https://github.com/llvm/llvm-project/issues/168561.
The issue was that the allocatable function result used as WHERE mask
was freed too early.
This happened because lowering was moving the result via as_expr but was
still inserting the deallocation directly on the storage instead of
passing that responsibility to the moved value (hlfir.expr). Later, the
pass optimizing WHERE is extending the expr lifetime usage passed the
deallocation of the storage because it (rightfully) assumes it can
extent lifetime of hlfir.expr as long as it moves the related destroy.
Fix lowering to pass the storage ownership to the expression after the
call instead.
Commit: d26b035d6929f248d3c309b5f2b7b51694d5dc4b
https://github.com/llvm/llvm-project/commit/d26b035d6929f248d3c309b5f2b7b51694d5dc4b
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/complex.cpp
Log Message:
-----------
[clang][bytecode] Remove an incorrect assertion (#179644)
There are situations where DiscardResult is set, but we still wish to
emit a float value, e.g. when we will discard the result of an operation
involving such a float value.
Commit: 802fd8c92ac7c0b8d6b6728bbd5cc89f843a6f41
https://github.com/llvm/llvm-project/commit/802fd8c92ac7c0b8d6b6728bbd5cc89f843a6f41
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
Log Message:
-----------
[perf] Replace copy-assign by move-assign in llvm/lib/Target (#179464)
Commit: 516eb3820db80cd706722af566897650bc949df7
https://github.com/llvm/llvm-project/commit/516eb3820db80cd706722af566897650bc949df7
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/ExpandIRInsts.cpp
M llvm/test/Transforms/ExpandIRInsts/X86/expand-fp-convert-small.ll
M llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-fptosi129.ll
M llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-fptoui129.ll
Log Message:
-----------
[ExpandIRInsts] Freeze value before fptoi expansion (#179659)
We're going to introduce new branches, and branch on undef/poison
is immediate UB.
Commit: f5410565137c5384835661ea5b6af7fc88e80513
https://github.com/llvm/llvm-project/commit/f5410565137c5384835661ea5b6af7fc88e80513
Author: woruyu <1214539920 at qq.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/CodeGen/builtins.c
M clang/test/CodeGenCXX/builtins.cpp
M clang/test/Sema/constant-builtins-2.c
M clang/test/Sema/constant-builtins.c
M clang/test/SemaCXX/builtin-bswapg.cpp
Log Message:
-----------
[Clang] Fixes builtin_bswapg builtin for bool type (#179177)
This PR resolves #178317, the related PR: #169285
Commit: cc2b48f1e4d633ff8f2708c0ab22f3a060fce54c
https://github.com/llvm/llvm-project/commit/cc2b48f1e4d633ff8f2708c0ab22f3a060fce54c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
Log Message:
-----------
SPIRVInstructionSelector::selectExtractVal - add missing brackets to assertion condition to fix gcc -Wparentheses warning (#179656)
Commit: aa7faec962a76dcdfa76249704bae514397cdfbb
https://github.com/llvm/llvm-project/commit/aa7faec962a76dcdfa76249704bae514397cdfbb
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/plugin_config.bzl
Log Message:
-----------
[bazel] Build mcp server for lldb (#178437)
Commit: d20b90a2da8ab69ccf846a450e0beadea70cf6f8
https://github.com/llvm/llvm-project/commit/d20b90a2da8ab69ccf846a450e0beadea70cf6f8
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[mlir][tosa] Enhance `resolveBroadcastShape` to handle dynamic dims (#175932)
This commit improves `resolveBroadcastShape` when some input dims are
dynamic. Previously, this would result in shape inference failing,
meaning the output type of the operation would not be updated. Now the
output shape is correctly inferred, selecting the static dim if > 1,
otherwise selecting the dynamic dim.
Commit: c487e248b9442b60bb22b8a95c0daee474d9b928
https://github.com/llvm/llvm-project/commit/c487e248b9442b60bb22b8a95c0daee474d9b928
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.h
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.h
A llvm/test/CodeGen/SPIRV/is-shader-env.ll
Log Message:
-----------
[SPIR-V] Fix environment resolution causing legalization crash (#179052)
When the triple is spirv-unknown-unknown, SPIRVSubtarget::Env starts as
Unknown and was set via const_cast in SPIRVCallLowering when the first
entry point was lowered. This is too late: SPIRVLegalizerInfo has
already been constructed with, for example, the wrong vector size
limits, causing a crash (at best) or invalid SPIR-V generation.
Resolve the environment early in SPIRVPrepareFunctions::runOnModule() by
scanning the module for "hlsl.shader" attributes. Reinitialize the
legalizer and extended instruction sets after resolution. Remove the
const_cast lazy setting from SPIRVCallLowering.
Fixes: https://github.com/llvm/llvm-project/issues/171898
Commit: 15e807960a4f464a94ca093bb531cce8d86410ce
https://github.com/llvm/llvm-project/commit/15e807960a4f464a94ca093bb531cce8d86410ce
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
Log Message:
-----------
[mlir][tosa] Add support for boolean cast/gather/scatter operations (#177693)
Aligns with the spec change:
https://github.com/arm/tosa-specification/pull/32
Commit: 7b9fd32daad83b8412e12505b7ec01818cc37880
https://github.com/llvm/llvm-project/commit/7b9fd32daad83b8412e12505b7ec01818cc37880
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
Log Message:
-----------
[flang][OpenMP] Move resolution of common blocks to resolve-names.cpp… (#179669)
…, NFC
Commit: 2af18a17bb75a695dfb3ee8a13692222d5f789f8
https://github.com/llvm/llvm-project/commit/2af18a17bb75a695dfb3ee8a13692222d5f789f8
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
Log Message:
-----------
[NFC][LowerMemIntrinsics] Consistent parameter name comments in function calls (#176751)
The `/*ParamName=*/foo` syntax is prescribed by the coding standards:
https://llvm.org/docs/CodingStandards.html#comment-formatting
Commit: 1f76e44700c78b28e4482d5a0b9c8c59dc72ef61
https://github.com/llvm/llvm-project/commit/1f76e44700c78b28e4482d5a0b9c8c59dc72ef61
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/test/CXX/drs/cwg0xx.cpp
M clang/test/CXX/drs/cwg11xx.cpp
M clang/test/CXX/drs/cwg13xx.cpp
M clang/test/CXX/drs/cwg14xx.cpp
M clang/test/CXX/drs/cwg16xx.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg19xx.cpp
M clang/test/CXX/drs/cwg1xx.cpp
M clang/test/CXX/drs/cwg20xx.cpp
M clang/test/CXX/drs/cwg22xx.cpp
M clang/test/CXX/drs/cwg23xx.cpp
M clang/test/CXX/drs/cwg26xx.cpp
M clang/test/CXX/drs/cwg27xx.cpp
M clang/test/CXX/drs/cwg29xx.cpp
M clang/test/CXX/drs/cwg30xx.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/test/CXX/drs/cwg4xx.cpp
M clang/test/CXX/drs/cwg5xx.cpp
M clang/test/CXX/drs/cwg6xx.cpp
M clang/test/CXX/drs/cwg7xx.cpp
Log Message:
-----------
[clang][NFC] Use full diagnostic text in C++ DR tests (#179674)
This is the first of two patches that apply various fixes to C++ DR
tests based on new tooling I developed. This patch is almost entirely
about incomplete diagnostic text in `expected` directives, which was
intended to be complete, but I failed to notice that during reviews.
There is also a couple of fixes for `expected-note` directives that were
not correctly indented relative to the error they attach to. Then there
is couple of fixes when `expected` directives where not placed correctly
(didn't use `@-1` way).
Commit: 637a038c047ac89043bae3361d81f6363db5000c
https://github.com/llvm/llvm-project/commit/637a038c047ac89043bae3361d81f6363db5000c
Author: Tony Tao <tony.le.tao at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
A llvm/test/CodeGen/SystemZ/zos-lower-constant.ll
Log Message:
-----------
[SystemZ][GOFF] Implement lowerConstant (#179394)
Implement lowerConstants for SystemZ and handle special cases where
entries need to be created in the ADA for static functions or VCon for
externals.
---------
Co-authored-by: Tony Tao <tonytao at ca.ibm.com>
Commit: 5da7e9a2ad89b73214c7478d52db4fd6e8068d95
https://github.com/llvm/llvm-project/commit/5da7e9a2ad89b73214c7478d52db4fd6e8068d95
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtins.c
Log Message:
-----------
[clang][bytecode] Return Invalid() from atomic_is_lock_free calls (#179676)
If they are invalid. This is what the current interpreter does.
Commit: 5cc22a9772c6b7da201530a74f6cd8b821003f90
https://github.com/llvm/llvm-project/commit/5cc22a9772c6b7da201530a74f6cd8b821003f90
Author: Endre Fülöp <endre.fulop at sigmatechnology.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
A clang/lib/StaticAnalyzer/Checkers/OpaqueSTLFunctionsModeling.cpp
M clang/test/Analysis/Inputs/system-header-simulator-cxx-std-suppression.h
A clang/test/Analysis/diagnostics/opaque-stl-functions-modeling.cpp
Log Message:
-----------
[clang][analyzer] Add OpaqueSTLFunctionsModeling (#178910)
This modeling checker forces conservative evaluation for `std::sort`,
`std::stable_sort`, and `std::inplace_merge` to prevent false positives
caused by complex STL internals that cannot be adequately modeled by the
engine.
Using `evalCall` to avoid emitting false positives is more efficient than
suppressing them after analysis in `BugReporterVisitor`s.
Related to #177804
Commit: a3f848057be438a570655ee3ca48a1178e898658
https://github.com/llvm/llvm-project/commit/a3f848057be438a570655ee3ca48a1178e898658
Author: Connector Switch <c8ef at outlook.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M libcxx/include/__algorithm/for_each.h
M libcxx/include/__algorithm/for_each_n.h
M libcxx/include/__algorithm/generate_n.h
Log Message:
-----------
[libcxx] Modify `std::__for_each{, _n}` to accept r-values in `__f` (#179451)
This is necessary when optimizing algorithms for segmented iterators to
reduce boilerplate code.
related:
-
https://github.com/llvm/llvm-project/pull/177853#discussion_r2754820322
-
https://github.com/llvm/llvm-project/pull/164266#discussion_r2447129525
Commit: e9253f0e355f8818fd06124ec393fc4841bbb560
https://github.com/llvm/llvm-project/commit/e9253f0e355f8818fd06124ec393fc4841bbb560
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Prevent creation of `tosa.concat_shape` for scalar shape values (#176120)
Updates `tosa.concat_shape` inline with the following specification
change: https://github.com/arm/tosa-specification/pull/30.
Commit: e6983d08f69d3ae73f204778ab8219dcf54173dd
https://github.com/llvm/llvm-project/commit/e6983d08f69d3ae73f204778ab8219dcf54173dd
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
Log Message:
-----------
[gn build] Port 5cc22a9772c6
Commit: 2e58f6024a9257f5e506a033f48c9239212dc21d
https://github.com/llvm/llvm-project/commit/2e58f6024a9257f5e506a033f48c9239212dc21d
Author: Brox Chen <guochen2 at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.ceil.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.floor.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/sitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/uitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/v_madak_f16.ll
Log Message:
-----------
[AMDGPU][True16] t16 pseudo for mubuffer d16 load/store (#178822)
create t16 pseudos for mubuffer d16 load/store with vgpr16 in vdst/vdata
and use these t16 pseudo for isel pattern. Lower them back to d16
machine inst in mc level.
Commit: d82a6eba65ee1bcd3d42cb2d7222e0297453dfef
https://github.com/llvm/llvm-project/commit/d82a6eba65ee1bcd3d42cb2d7222e0297453dfef
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
Log Message:
-----------
[TableGen] Remove warning IntrinsicsToAttributesMap needs > 16 bits (#179533)
Remove the warning issued by intrinsic emitter when an entry in the
`IntrinsicsToAttributesMap` is > 16 bits. The exact conditions under
which this happen is tightly coupled with how the intrinsic emitter
represents intrinsic attributes and generally this warning may not be
actionable in any way without changing the semantics of the intrinsics
being compiled (i.e., changing their attributes to have less number of
unique attributes).
Commit: bc80d1ac0cff6823ca8d2de222623c0fd7ed8edf
https://github.com/llvm/llvm-project/commit/bc80d1ac0cff6823ca8d2de222623c0fd7ed8edf
Author: sujianIBM <98488060+sujianIBM at users.noreply.github.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
M llvm/test/CodeGen/SystemZ/zos-prologue-epilog.ll
Log Message:
-----------
[SystemZ][z/OS] Set R5 as not restored. (#179666)
R5 (environment register) should not be restored. This is missing in the
code.
Add it back and also add a test to verify it.
Commit: 3c0e3268a51b9e3cca93c2e93e80722a80a34b04
https://github.com/llvm/llvm-project/commit/3c0e3268a51b9e3cca93c2e93e80722a80a34b04
Author: Islam Imad <143586474+Islam-Imad at users.noreply.github.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/add-i512.ll
M llvm/test/CodeGen/X86/sub-i512.ll
Log Message:
-----------
[X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (#174761)
Closes #173996
Commit: 569a9b49253b26b1142040169ca88e0215bca475
https://github.com/llvm/llvm-project/commit/569a9b49253b26b1142040169ca88e0215bca475
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation3.ll
Log Message:
-----------
[SLP][NFC]Add another shl-to-add transformation test, NFC
Commit: 279600ac9b55e79ba9291717924dae6802f2b74c
https://github.com/llvm/llvm-project/commit/279600ac9b55e79ba9291717924dae6802f2b74c
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M libcxx/test/benchmarks/format/formatter_int.bench.cpp
Log Message:
-----------
[libc++] Refactor formatter_int.bench.cpp to not use CartesianProduct (#179483)
The CartesianProduct machinery is incredibly expensive and makes it
trivial to add significant amounts of benchmarks which may not actually
serve much of a purpose. This patch doesn't remove any of the actual
benchmarks, but explicitly lists the benchmarks previous generated via
the CartesianProduct machinery. Still, the benchmarks run ~2x faster.
Fixes #178458
Commit: fc5b1bb8f8f5073dfa0ab363db8620e7cd787a81
https://github.com/llvm/llvm-project/commit/fc5b1bb8f8f5073dfa0ab363db8620e7cd787a81
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/lib/Optimizer/Passes/Pipelines.cpp
Log Message:
-----------
[flang] Add getFIRToLLVMPassOptions helper function (#179293)
Extract `FIRToLLVMPassOptions` initialization into a helper function,
allowing other code to construct pass options from pipeline
configuration without duplication.
---------
Co-authored-by: Delaram Talaashrafi <dtalaashrafi at rome5.pgi.net>
Commit: 2828ee6bc2fe613e00e5b44825da9e407f1d5457
https://github.com/llvm/llvm-project/commit/2828ee6bc2fe613e00e5b44825da9e407f1d5457
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/test/CodeGen/X86/peephole.mir
Log Message:
-----------
[X86] Fix incorrect SUBREG_TO_REG usage in a MIR test (#179682)
Commit: 36dadddd74c7c9c1e98a2ec153a46af95928c71c
https://github.com/llvm/llvm-project/commit/36dadddd74c7c9c1e98a2ec153a46af95928c71c
Author: Chi-Chun, Chen <chichun.chen at hpe.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/Todo/affinity-clause.f90
A flang/test/Lower/OpenMP/task-affinity.f90
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[Flang][mlir][OpenMP] Add affinity clause to omp.task and Flang lowering (#179003)
- Add MLIR OpenMP affinity clause
- Lower flang task affinity to mlir
- Emit TODO for iterator modifier and update negative test
Commit: 10d80708d9705af3307c99c0824d1bd2e3f86fd7
https://github.com/llvm/llvm-project/commit/10d80708d9705af3307c99c0824d1bd2e3f86fd7
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/Transforms/Passes.td
M mlir/include/mlir/Dialect/EmitC/Transforms/Transforms.h
M mlir/lib/Dialect/EmitC/Transforms/WrapFuncInClass.cpp
M mlir/test/Dialect/EmitC/wrap-func-in-class.mlir
Log Message:
-----------
[mlir][emitc] Update the `WrapFuncInClassPass` pass (#179184)
Update the `WrapFuncInClassPass` pass so that, by default, the generated
method is named `operator()()` rather than `execute()`. This makes the
pass more generic, instead of catering to specific users expecting an
`execute()` method.
To preserve the original behaviour, add a new pass option to override
the method name: `func-name`. For example:
```bash
mlir-opt file.mlir -wrap-emitc-func-in-class=func-name=execute
```
Additionally, make a couple of small editorial changes:
* Rename `populateFuncPatterns` to `populateWrapFuncInClass` to make it
clear that the corresponding pattern is specific to the
`WrapFuncInClass` pass.
* Remove `// CHECK: module {` to reduce test noise.
For context, this change was proposed on Discourse:
* https://discourse.llvm.org/t/rfc-emitc-support-for-mlgo
Commit: c08b2c75dbc4aae897affa8d38108d779350e137
https://github.com/llvm/llvm-project/commit/c08b2c75dbc4aae897affa8d38108d779350e137
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M mlir/lib/Dialect/GPU/Transforms/EliminateBarriers.cpp
M mlir/test/Dialect/GPU/barrier-elimination.mlir
Log Message:
-----------
[milr][gpu] Make barrier elimination address-space aware (#178101)
Upgrade the barrier eliminiation pass to account for the address spaces
of accessed memory when deciding which barriers to eliminiate. In
particular, a loop that only reads and writes global memory that has a
workgoup-memory-fencing barrier inside of it will now have that barrier
marked for elimiination, as the global memory traffic is not being
synchronized by the barrier.
The pass is also adjusted to ignore barriers whose memory fencing list
is [], as those do not synchronize memory and therefore the logic in
this pass would potentially incorrectly remove them after proving that
fact.
---------
Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>
Commit: 8b28f5229e76e552160116c54d3d6994976e8440
https://github.com/llvm/llvm-project/commit/8b28f5229e76e552160116c54d3d6994976e8440
Author: sujianIBM <98488060+sujianIBM at users.noreply.github.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
M llvm/test/CodeGen/SystemZ/zos-prologue-epilog.ll
Log Message:
-----------
[SystemZ][z/OS] Reverse the order of instructions to save and restore CSRs (#179540)
Reverse the order of instructions to save and restore CSRs so
instruction on small numbered reg goes first.
Commit: c61d4340c89307b5bc548a196e49b808abaddc51
https://github.com/llvm/llvm-project/commit/c61d4340c89307b5bc548a196e49b808abaddc51
Author: Akshay Deodhar <adeodhar at nvidia.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/test/CodeGen/NVPTX/cmpxchg-sm60.ll
M llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll
M llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.py
M llvm/test/CodeGen/NVPTX/fence-cluster.ll
M llvm/test/CodeGen/NVPTX/fence-nocluster.ll
M llvm/test/CodeGen/NVPTX/fence.py
Log Message:
-----------
[NVPTX][NFC] Update fence.py and cmpxchg.py to generate ptxas-sm_XY and ptxas-isa-X.Y checks in RUN lines (#179378)
The cmpxchg-sm*.ll, fence*.ll files were manually updated to include
version checks. Modifying the generator scripts so that they will
correctly generate the version checks.
Fixes the issue raised in
https://github.com/llvm/llvm-project/pull/176078#issuecomment-3792304497
that led to
https://github.com/llvm/llvm-project/commit/acff9fa4dba2e39da73227d835dfd12be434645e.
(Thanks @vvereschaka!)
When I regenerated cmpxchg tests, I ended up overwriting the ptxas-sm
checks, because the generator script does not have them. Added comments
in the tests explaining that they should not be modified manually.
Commit: 8a83911c40ee3d329954e7e374cd079fa9c4314c
https://github.com/llvm/llvm-project/commit/8a83911c40ee3d329954e7e374cd079fa9c4314c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Log Message:
-----------
AMDGPU: Fix incorrect fold of undef for llvm.amdgcn.trig.preop (#179025)
We were folding undef inputs to qnan which is incorrect. The instruction
never returns nan. Out of bounds segment select will return 0, so fold
undef segment to 0.
Commit: e747287f6113e70a3c7123c11ad19bb780948538
https://github.com/llvm/llvm-project/commit/e747287f6113e70a3c7123c11ad19bb780948538
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
A llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-trig-preop.ll
Log Message:
-----------
AMDGPU: Implement computeKnownFPClass for llvm.amdgcn.trig.preop (#179026)
Surprisingly this doesn't consider the special cases, and literally
just extracts the exponent and proceeds as normal.
Commit: 7df2bd648e3174efcabfba21b150133b89ffcac5
https://github.com/llvm/llvm-project/commit/7df2bd648e3174efcabfba21b150133b89ffcac5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
A llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-fract.ll
Log Message:
-----------
AMDGPU: Implement computeKnownFPClass for llvm.amdgcn.fract (#179134)
Commit: 4a0a2057a8f317836fa60f63fa9a0794faa32873
https://github.com/llvm/llvm-project/commit/4a0a2057a8f317836fa60f63fa9a0794faa32873
Author: Reid Kleckner <rnk at llvm.org>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M .mailmap
M clang/AreaTeamMembers.txt
M clang/Maintainers.rst
M llvm/Maintainers.md
Log Message:
-----------
Update my email across the project (#179361)
At the moment, LLVM OSS stuff should go to rnk at llvm.org.
Commit: 23bf55eda43a7d2f9ffffce3f371fcf28c8d2df7
https://github.com/llvm/llvm-project/commit/23bf55eda43a7d2f9ffffce3f371fcf28c8d2df7
Author: GeorgeHuyubo <113479859+GeorgeHuyubo at users.noreply.github.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
A lldb/test/API/tools/lldb-dap/eventStatistic/Makefile
A lldb/test/API/tools/lldb-dap/eventStatistic/TestVSCode_eventStatistic.py
A lldb/test/API/tools/lldb-dap/eventStatistic/foo.cpp
A lldb/test/API/tools/lldb-dap/eventStatistic/foo.h
A lldb/test/API/tools/lldb-dap/eventStatistic/main.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
Log Message:
-----------
[lldb]Send statistics in initialized event (#178978)
Re-attemp landing of old commit:
https://github.com/llvm/llvm-project/commit/7fe3586cda5b683766ec6b6d5ca2d98c2baaf162
Co-authored-by: George Hu <georgehuyubo at gmail.com>
Commit: b0aea0539f968054a6a34add42588c6fceca540a
https://github.com/llvm/llvm-project/commit/b0aea0539f968054a6a34add42588c6fceca540a
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Add buffer load format D16 RegBankLegalize rules (#179566)
Commit: 4fdb10b052b29a4160f25fdfaebda9c5d8734408
https://github.com/llvm/llvm-project/commit/4fdb10b052b29a4160f25fdfaebda9c5d8734408
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/include/clang/Frontend/CompilerInstance.h
M clang/lib/Frontend/CompilerInstance.cpp
Log Message:
-----------
[clang][modules] Allow specifying thread-safe module cache (#179510)
This PR adds new member to `CompilerInstance::ThreadSafeCloneConfig` to
allow using a different `ModuleCache` instance in the cloned
`CompilerInstance`. This is done so that the original and the clone
can't concurrently work on the same `InMemoryModuleCache`, which is not
thread safe. This will be made use of shortly from the dependency
scanner along with the single-module-parse-mode to compile modules
asynchronously/concurrently.
This also fixes an old comment that incorrectly claimed that
`CompilerInstance`'s constructor is responsible for finalizing
`InMemoryModuleCache` buffers, which is no longer the case.
Commit: 96448ef34a840682b27b1c9116d4b52269a20e98
https://github.com/llvm/llvm-project/commit/96448ef34a840682b27b1c9116d4b52269a20e98
Author: Fangrui Song <i at maskray.me>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
A llvm/test/tools/llvm-readobj/ELF/unwind-sdata8.test
M llvm/test/tools/llvm-readobj/ELF/unwind.test
M llvm/tools/llvm-readobj/DwarfCFIEHPrinter.h
Log Message:
-----------
[llvm-readelf] --unwind: Support DW_EH_PE_sdata8 encoding (#179152)
... for both eh_frame_ptr_enc and table_enc fields when parsing the
PT_GNU_EH_FRAME program header (which contains .eh_frame_hdr) . This is
needed for large binaries where offsets exceed the 32-bit range,
The sdata8 encoding has been tested on an executable
generated by lld patched with
https://github.com/llvm/llvm-project/pull/179089
```
% cat a.cc
#include <stdio.h>
int main() { try { throw 1; } catch (...) { puts("a"); } }
% cat a.lds
SECTIONS
{
. = SIZEOF_HEADERS;
.eh_frame : {}
.rodata.cst4 : {}
.text : {}
. = DATA_SEGMENT_ALIGN (CONSTANT (MAXPAGESIZE), CONSTANT (COMMONPAGESIZE));
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*)))
KEEP (*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
}
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*)))
KEEP (*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
}
. = DATA_SEGMENT_RELRO_END (0, .);
.data : { *(.data .data.*) }
. = .;
.bss : { *(.bss .bss.*) *(COMMON) }
. = DATA_SEGMENT_END (.);
.eh_frame_hdr 0x200000000 : {}
}
% /tmp/Rel/bin/clang++ -mcmodel=large a.cc -o a -fuse-ld=lld -Wl,a.lds
% ./a
```
The executable uses C++ exceptions. At runtime the libstdc++/libgcc
runtime
decodes the PT_GNU_EH_FRAME segment. A malformed .eh_frame_hdr would
lead to crash.
Previously, llvm-readelf would report "unexpected encoding
eh_frame_ptr_enc"
or "unexpected encoding table_enc" for .eh_frame_hdr sections using
sdata8.
Commit: 265a994f4de2025aabc6f78b47777235af0ab48e
https://github.com/llvm/llvm-project/commit/265a994f4de2025aabc6f78b47777235af0ab48e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
Log Message:
-----------
[RISCV] Add C/Zcf/Zcd/Zce implication rules to subtarget construction. (#179615)
This ensures the feature bits and RISCVSubtarget flags match what
RISCVISAInfo would do.
I'm not excited about the code duplication, but I need to set the
RISCVSubtarget flags along with calling ToggleFeature. I'll think about
how to improve this.
Commit: 7ea33e6848d3dca157a394ce1dde86243a3d5efb
https://github.com/llvm/llvm-project/commit/7ea33e6848d3dca157a394ce1dde86243a3d5efb
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/docs/MIRLangRef.rst
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/Target.td
M llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrAtomics.td
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/ARM/ARMInstrNEON.td
M llvm/lib/Target/BPF/BPFInstrInfo.td
M llvm/lib/Target/BPF/BPFMIPeephole.cpp
M llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/MSP430/MSP430InstrInfo.td
M llvm/lib/Target/Mips/Mips64r6InstrInfo.td
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/lib/Target/PowerPC/PPCInstrVSX.td
M llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
M llvm/lib/Target/PowerPC/PPCVSXWACCCopy.cpp
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86InstrExtension.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/lib/Target/X86/X86InstrSystem.td
M llvm/lib/Target/X86/X86InstrVecCompiler.td
M llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/166563.mir
M llvm/test/CodeGen/AArch64/GlobalISel/fp16-copy-gpr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/load-addressing-modes.mir
M llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-ext-tbz-tbnz.mir
M llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-xor-tbz-tbnz.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-swap-compare-operands.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postselectopt-constrain-new-regop.mir
M llvm/test/CodeGen/AArch64/GlobalISel/preselect-process-phis.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-arith-extended-reg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-atomic-load-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-atomicrmw.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-build-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-cmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-cmpxchg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-constant.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-extract-vector-elt-with-extend.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-fp-index-load.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-imm.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-insert-extract.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-int-ext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-jump-table-brjt-constrain.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-jump-table-brjt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-ldaxr-intrin.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-ldxr-intrin.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-load.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-ptr-add.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-reduce-add.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-redundant-zext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-scalar-merge.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-scalar-shift-imm.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-select.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-truncstore-atomic.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-zext-as-copy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-zextload.mir
M llvm/test/CodeGen/AArch64/GlobalISel/widen-narrow-tbz-tbnz.mir
M llvm/test/CodeGen/AArch64/GlobalISel/xro-addressing-mode-constant.mir
M llvm/test/CodeGen/AArch64/aarch64-combine-gather-lanes-limit-size.mir
M llvm/test/CodeGen/AArch64/aarch64-combine-gather-lanes-with-call.mir
M llvm/test/CodeGen/AArch64/aarch64-combine-gather-lanes.mir
M llvm/test/CodeGen/AArch64/aarch64-swp-ws-live-intervals-1.mir
M llvm/test/CodeGen/AArch64/aarch64-swp-ws-live-intervals.mir
M llvm/test/CodeGen/AArch64/addsub-24bit-imm.mir
M llvm/test/CodeGen/AArch64/addsub.ll
M llvm/test/CodeGen/AArch64/bf16_fast_math.ll
M llvm/test/CodeGen/AArch64/coalescer-drop-subreg-to-reg-imm-ops.mir
M llvm/test/CodeGen/AArch64/instr-ref-ldv.ll
M llvm/test/CodeGen/AArch64/loop-sink.mir
M llvm/test/CodeGen/AArch64/peephole-insert-subreg.mir
M llvm/test/CodeGen/AArch64/peephole-movd.mir
M llvm/test/CodeGen/AArch64/peephole-sxtw.mir
M llvm/test/CodeGen/AArch64/ptrauth-isel.ll
M llvm/test/CodeGen/AArch64/ptrauth-isel.mir
M llvm/test/CodeGen/AArch64/redundant-orrwrs-from-zero-extend.mir
M llvm/test/CodeGen/AArch64/register-coalesce-update-subranges-remat.mir
M llvm/test/CodeGen/AArch64/sink-and-fold-clear-kill-flags.mir
M llvm/test/CodeGen/AArch64/sms-acceptable-loop1.mir
M llvm/test/CodeGen/AArch64/sms-acceptable-loop2.mir
M llvm/test/CodeGen/AArch64/sms-acceptable-loop3.mir
M llvm/test/CodeGen/AArch64/sms-acceptable-loop4.mir
M llvm/test/CodeGen/AArch64/sms-instruction-scheduled-at-correct-cycle.mir
M llvm/test/CodeGen/AArch64/sms-loop-carried-fp-exceptions1.mir
M llvm/test/CodeGen/AArch64/sms-loop-carried-fp-exceptions2.mir
M llvm/test/CodeGen/AArch64/sms-order-physreg-deps.mir
M llvm/test/CodeGen/AArch64/sms-regpress.mir
M llvm/test/CodeGen/AArch64/sms-unacceptable-loop1.mir
M llvm/test/CodeGen/AArch64/sms-unacceptable-loop2.mir
M llvm/test/CodeGen/AArch64/sms-unpipeline-insts1.mir
M llvm/test/CodeGen/AArch64/sms-unpipeline-insts2.mir
M llvm/test/CodeGen/AArch64/subreg_to_reg_coalescing_issue.mir
M llvm/test/CodeGen/AArch64/zext-reg-coalesce.mir
M llvm/test/CodeGen/PowerPC/mi-simplify-code.mir
M llvm/test/CodeGen/PowerPC/subreg-coalescer.mir
M llvm/test/CodeGen/PowerPC/xxinsertw.ll
M llvm/test/CodeGen/X86/GlobalISel/select-ext-x86-64.mir
M llvm/test/CodeGen/X86/GlobalISel/select-ext.mir
M llvm/test/CodeGen/X86/GlobalISel/x86_64-select-zext.mir
M llvm/test/CodeGen/X86/apx/foldimmediate.mir
M llvm/test/CodeGen/X86/callbr-asm-different-indirect-target.mir
M llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel.ll
M llvm/test/CodeGen/X86/coalescer-implicit-def-regression-imp-operand-assert.mir
M llvm/test/CodeGen/X86/coalescer-implicit-def-regression.mir
M llvm/test/CodeGen/X86/expand-post-ra-pseudo.mir
M llvm/test/CodeGen/X86/fast-regalloc-live-out-debug-values.mir
M llvm/test/CodeGen/X86/foldimmediate.mir
M llvm/test/CodeGen/X86/opt_phis2.mir
M llvm/test/CodeGen/X86/peephole-test-after-add.mir
M llvm/test/CodeGen/X86/peephole.mir
M llvm/test/CodeGen/X86/pr57673.ll
M llvm/test/CodeGen/X86/regalloc-fast-missing-live-out-spill.mir
M llvm/test/CodeGen/X86/statepoint-invoke-ra-inline-spiller.mir
M llvm/test/CodeGen/X86/statepoint-invoke-ra.mir
M llvm/test/CodeGen/X86/statepoint-vreg-details.ll
M llvm/test/CodeGen/X86/subreg-fail.mir
M llvm/test/CodeGen/X86/tail-dup-asm-goto.ll
M llvm/test/CodeGen/X86/tail-dup-pred-succ-size.mir
M llvm/test/DebugInfo/MIR/InstrRef/stack-coloring-dbg-phi.mir
M llvm/test/DebugInfo/MIR/InstrRef/x86-cmov-converter.mir
M llvm/test/DebugInfo/MIR/X86/machine-cse.mir
M llvm/test/DebugInfo/X86/salvage-add-node-indirect.ll
M llvm/test/TableGen/GlobalISelEmitter/Subreg.td
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_asm_mir_mixed.ll.expected
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_isel.ll.expected
M llvm/utils/TableGen/GlobalISelEmitter.cpp
Log Message:
-----------
[CodeGen] Remove unused first operand of SUBREG_TO_REG (#179690)
The first input operand of SUBREG_TO_REG was an immediate that most
targets set to 0. In practice it had no effect on codegen. Remove it.
Commit: 26b1f61c14768b8104c998ab2579391e5cc766ed
https://github.com/llvm/llvm-project/commit/26b1f61c14768b8104c998ab2579391e5cc766ed
Author: Frank Schlimbach <frank.schlimbach at intel.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/MPI/IR/MPIOps.td
A mlir/include/mlir/Dialect/MPI/IR/Utils.h
M mlir/lib/Conversion/MPIToLLVM/MPIToLLVM.cpp
M mlir/lib/Conversion/ShardToMPI/ShardToMPI.cpp
M mlir/lib/Dialect/MPI/IR/MPIOps.cpp
M mlir/test/Conversion/MPIToLLVM/mpitollvm.mlir
M mlir/test/Conversion/ShardToMPI/convert-shard-to-mpi.mlir
A mlir/test/Dialect/MPI/canonicalize.mlir
M mlir/test/Dialect/Shard/partition.mlir
Log Message:
-----------
[mlir][shard,mpi] Fixing lowering allgather shard->mpi->llvm (#178870)
`shard.allgather` concatenates along a specified gather-axis. However,
`mpi.allgather` always concatenates along the first dimension and there
is no MPI operation that allows gathering along an arbitrary axis.
Hence, if gather-axis!=0, we need to create a temporary buffer where we
gather along the first dimension and then copy from that buffer to the
final output along the specified gather-axis. This is not ideal by far.
Along the way also
- fixing computation of memref size in mpitollvm
- adding a simple canonicalization pattern for comm_size for easier
debugging
- adding more tests
Commit: 273ee97738c607d5b9cc32060540fce8f64869fe
https://github.com/llvm/llvm-project/commit/273ee97738c607d5b9cc32060540fce8f64869fe
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sadde.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ssube.mir
Log Message:
-----------
[AMDGPU][GlobalISel] Add G_SADDE/SSUBE RegBankLegalize rule (#179603)
Commit: 7083354fd63b260ed340282d39485c4f86fe6909
https://github.com/llvm/llvm-project/commit/7083354fd63b260ed340282d39485c4f86fe6909
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSubtarget.h
Log Message:
-----------
[RISCV] Remove deprecated RISCVSubtarget::hasStdExtCOrZca(). NFC (#179616)
Commit: 24c7a10730a0c8ddce16741e9996bf11fc6ef885
https://github.com/llvm/llvm-project/commit/24c7a10730a0c8ddce16741e9996bf11fc6ef885
Author: Demetrius Kanios <demetrius at kanios.net>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/lib/AST/Type.cpp
M clang/lib/CodeGen/TargetBuiltins/WebAssembly.cpp
A clang/test/CodeGen/WebAssembly/builtins-table-externref.c
A clang/test/CodeGen/WebAssembly/builtins-table-funcref.c
R clang/test/CodeGen/WebAssembly/builtins-table.c
A clang/test/Sema/wasm-funcref-table.c
Log Message:
-----------
[Clang][WebAssembly] Fix WASM tables to allow `__funcref` function pointers (#178720)
Allows __funcref pointers to be used as the element type for WASM tables
in Clang (static, global, zero-length arrays of a reference type).
Modifies `QualType::isWebAssemblyFuncrefType` to correctly look at the
addrspace of the pointee, rather than the pointer type.
Related: #140933
Commit: 6d96ae6aa86feaece76f14d8b52d1d2d5d641914
https://github.com/llvm/llvm-project/commit/6d96ae6aa86feaece76f14d8b52d1d2d5d641914
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
Log Message:
-----------
[RISCV] Add tied destination constraint to CustomSiFiveVMACC. (#179567)
As the name suggess, these are multiply-accumulate instructions and
thus they have 3 sources.
Commit: 082a47d8944da242993bf28980b07f2c8c3df4a6
https://github.com/llvm/llvm-project/commit/082a47d8944da242993bf28980b07f2c8c3df4a6
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M lldb/test/Shell/helper/toolchain.py
Log Message:
-----------
[lldb-dap] fix executable substitution in tests (#179685)
This patch fixes the `lldb-dap` executable substitution in tests. This
was not done before.
Commit: e8b7181762826371324b5c05e3e84d1b685fcf4c
https://github.com/llvm/llvm-project/commit/e8b7181762826371324b5c05e3e84d1b685fcf4c
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Utils/Evaluator.cpp
Log Message:
-----------
[Evaluator] require invariant size to fully span the global (#179518)
Relying on the semantics of the type here is a bit potentially awkward,
since the full allocated space may be accessible to the user if desired,
since that space is defined to be a part of the type's sizeof
computation (e.g. for a `memcpy(gv, gv, sizeof(*gv))` or when making an
array of them). It also gets in the way of removing getAllocatedType
from AllocaInst entirely (they are converted to GlobalVariable
sometimes). It was originally added in
519561f418c77dcf46fd6d96d25d884fa07fd7da, though "correct size" is a
difficult thing to define.
The frontend (in clang) appears to always emit the full type size here,
so there seems like this shouldn't be visible change to clang users.
This is still a bit awkward though, since a global is defined to be any
size that is bigger than this unless it has a known initizalizer,
rendering the test still incomplete here against the IR semantics.
Commit: 9a47c3bcba38b5e203cc8bd02db753e58b750707
https://github.com/llvm/llvm-project/commit/9a47c3bcba38b5e203cc8bd02db753e58b750707
Author: weiguozhi <57237827+weiguozhi at users.noreply.github.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegAllocGreedy.h
M llvm/lib/Target/AArch64/AArch64RegisterInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
A llvm/test/CodeGen/AArch64/ragreedy-csr2.ll
Log Message:
-----------
[RegAlloc] Change the computation of CSRCost (#177226)
This patch fixes https://github.com/llvm/llvm-project/issues/150737.
The original computed CSRCost is too small, so the optimization of
spilling instead of using CSR is rarely triggered.
Also the original cost model is too difficult to be understood and too
hard to be tuned by backend developers and users.
So this patch changes the CSRCost to be
CSRCost = TRI->getCSRFirstUseCost() * EntryFreq * Scale
TRI->getCSRFirstUseCost() is the raw cost of save/restore a CSR. Usually
we don't need to tune this number.
EntryFreq is the BlockFrequency of the entry block.
Scale is used to scale down the CSRCost, because we usually prefer a CSR
register instead of spilling if we have similar CSRCost and spill cost,
so it should be less than 100%. We usually tune this number.
Another problem is the original function RAGreedy::calcSpillCost()
actually computes a cost for block split, so this patch also implements
a correct RAGreedy::calcSpillCost() function.
This new behavior is not enabled by default. This optimization is used
by 3 targets (AArch64 / AMDGPU / RISCV), I will change them one by one
in following patches.
Commit: 0dd21ad1c6a304f4d446d067b80e8e364e6340e3
https://github.com/llvm/llvm-project/commit/0dd21ad1c6a304f4d446d067b80e8e364e6340e3
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenPGO.cpp
M clang/test/CodeGen/AMDGPU/amdgpu-atomic-float.c
M clang/test/CodeGen/AMDGPU/full-bf16.c
M clang/test/CodeGen/amdgpu-abi-version.c
M clang/test/CodeGen/builtins-extended-image.c
M clang/test/CodeGen/builtins-image-load.c
M clang/test/CodeGen/scoped-atomic-ops.c
M clang/test/CodeGen/target-addrspace.cpp
M clang/test/CodeGenCUDA/amdgpu-bf16.cu
M clang/test/CodeGenCUDA/spirv-amdgcn-bf16.cu
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M clang/test/CodeGenHIP/amdgpu-barrier-type.hip
M clang/test/CodeGenHIP/builtins-make-buffer-rsrc.hip
M clang/test/CodeGenHIP/hip_weak_alias.cpp
M clang/test/CodeGenHIP/printf.cpp
M clang/test/CodeGenHIP/printf_nonhostcall.cpp
M clang/test/CodeGenHIP/sanitize-undefined-null.hip
M clang/test/CodeGenHIP/spirv-amdgcn-ballot.cpp
M clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-arg-byref.cl
M clang/test/CodeGenOpenCL/atomic-ops.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M clang/test/CodeGenOpenCL/check-atomic-alignment.cl
M clang/test/CodeGenSYCL/function-attrs.cpp
M clang/test/Headers/__clang_hip_libdevice_declares.cpp
M clang/test/Headers/amdgcn_openmp_device_math.c
M clang/test/Headers/amdgcn_openmp_device_math_c.c
M clang/test/Headers/amdgcn_openmp_device_math_constexpr.cpp
M clang/test/Headers/gpu_disabled_math.cpp
M clang/test/Headers/gpuintrin.c
M clang/test/Headers/gpuintrin_lang.c
M clang/test/Headers/openmp-device-functions-bool.c
M clang/test/Headers/openmp_new_nothrow.cpp
M clang/test/OpenMP/amdgcn_weak_alias.c
M clang/test/OpenMP/amdgcn_weak_alias.cpp
Log Message:
-----------
[clang] remove addrspace cast from CreateIRTemp (#179327)
This just added unnecessary work to the IR, since they are only used for
load and store, which just causes some IR noise. Tests updated by UTC
script to remove the extra lines.
Commit: b20fca82ab0c4754e838a8e1eba3a7f49a2dbab0
https://github.com/llvm/llvm-project/commit/b20fca82ab0c4754e838a8e1eba3a7f49a2dbab0
Author: RattataKing <amilywu2 at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M mlir/include/mlir/Bindings/Python/Diagnostics.h
M mlir/include/mlir/Bindings/Python/Globals.h
M mlir/include/mlir/Bindings/Python/NanobindAdaptors.h
M mlir/include/mlir/Bindings/Python/NanobindUtils.h
M mlir/lib/Bindings/Python/DialectLLVM.cpp
M mlir/lib/Bindings/Python/Globals.cpp
M mlir/lib/Bindings/Python/IRCore.cpp
Log Message:
-----------
[MLIR][Python] Remove partial LLVM APIs in python bindings (3/n) (#178984)
This PR continues work from #178290
It cleans up multiple LLVM utilities in *.h files under
`mlir/Bindings/python`, along with the corresponding *.cpp files.
Commit: ba8df39898dea2003770163ffc43b6b911f71f2b
https://github.com/llvm/llvm-project/commit/ba8df39898dea2003770163ffc43b6b911f71f2b
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
Log Message:
-----------
Add SDNodeFlag::NoConvergent (#179323)
Commit: b9b7b31e2368eef78c69096c5b680c3ac7484ab9
https://github.com/llvm/llvm-project/commit/b9b7b31e2368eef78c69096c5b680c3ac7484ab9
Author: Jun Wang <jwang86 at yahoo.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
A llvm/test/MC/AMDGPU/exp-gfx11.s
A llvm/test/MC/AMDGPU/gfx10_asm_exp.s
M llvm/test/MC/AMDGPU/gfx11_asm_exp.s
M llvm/test/MC/AMDGPU/gfx12_asm_exp.s
M llvm/test/MC/AMDGPU/gfx9_asm_exp.s
Log Message:
-----------
[AMDGPU][MC] Allow nodone etc. in exp instructions (#172749)
This patch allows nodone, nocompr, novm, and norow_en to be used in exp
instructions to indicate the corresponding modifiers are not present.
Commit: 9fa14216a12ad5825f79830d02e8dff374db8bee
https://github.com/llvm/llvm-project/commit/9fa14216a12ad5825f79830d02e8dff374db8bee
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel][mlir][shard,mpi] Port #178870: arith dialect dep (#179723)
Commit: 320c3309897dc8279300fc3d233c5d677cf0053a
https://github.com/llvm/llvm-project/commit/320c3309897dc8279300fc3d233c5d677cf0053a
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceFuncTransform.cpp
M flang/test/Fir/CUDA/cuda-device-func-transform.mlir
Log Message:
-----------
[flang][cuda] Update visibility of declaration copied to in gpu.module (#179725)
https://github.com/llvm/llvm-project/pull/179362 changes which op is
checked for visibility during nested symbol resolution. This cause
issues in the CUDA Fortran pipeline and make some lookup fails. Update
the visibility of declaration copied to the gpu.module to nested.
Commit: d9da5d7626b0ea8d8f1d04ce017f147269512ef3
https://github.com/llvm/llvm-project/commit/d9da5d7626b0ea8d8f1d04ce017f147269512ef3
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU][SIInsertWaitcnt][NFC] Move eventCounter() function (#178949)
The eventCounter() function searches through the array of events. This
array is owned by the WaitcntGenerator class.
This patch moves the function into the WaitcntGenerator class which
helps hide the event array from the user.
It also renames it to getCounterFromEvent().
This should be NFC.
Commit: 9f1a9d24813c0c1b89d24063825a7fb8ca64a3a1
https://github.com/llvm/llvm-project/commit/9f1a9d24813c0c1b89d24063825a7fb8ca64a3a1
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/utils/lit/lit/run.py
M llvm/utils/lit/tests/lit.cfg
A llvm/utils/lit/tests/single-process.py
Log Message:
-----------
[lit] Avoid multiprocessing for -j1 runs (#175587)
### Problem
When running `lit` with `-j1` in a sandboxed environment (e.g., [Cursor
Sandbox Mode](https://cursor.com/blog/enterprise#sandbox-mode)), `lit`
crashes with `PermissionError: [Errno 1] Operation not permitted`
because it still attempts to create a `multiprocessing.Pool`, which
requires POSIX semaphores (`/dev/shm/sem.*`) that are blocked by the
sandbox.
**Reproducer:** Run any lit test suite with `-j1` in a [restricted
sandbox](https://cursor.com/blog/enterprise#sandbox-mode):
`LIT_OPTS="-j1 -v" ninja check-lld`
**Error trace:**
https://gist.github.com/alx32/0dc6abb45c40cf5753669e4c6cce929d
### Solution
When `workers == 1`, skip `multiprocessing.Pool` entirely and run tests
sequentially in the main process. This avoids creating POSIX semaphores
that fail in sandboxed environments.
To properly support `--max-time` in single-process mode (where we can't
terminate workers mid-test), we temporarily set `maxIndividualTestTime`
to the remaining time before the deadline. If a test times out due to
hitting the deadline, it's marked as SKIPPED to match multiprocessing
behavior.
### Testing
Added `single-process.py` test that uses strace to verify:
- With `-j1`: No `/dev/shm/sem.*` POSIX semaphores are created
- With `-j2`: Semaphores ARE created (validates the test won't XPASS)
### Historical Context
Lit previously had a "single process mode" that was:
- **Added** in Sept 2017 (42b6dcbcef4f) for debugging
- **Enhanced** in Feb 2019 (96adb78b120b) to auto-enable for `-j1`
- **Removed** in Oct 2019 (f3c329986cf4) as it "did not carry its
weight"
The original motivation was performance/debugging. The new motivation is
**compatibility with sandboxed execution environments** where
multiprocessing primitives are unavailable.
[Assisted-by](https://t.ly/Dkjjk): Cursor IDE + claude-opus-4.5-high +
gpt-5.2-xhigh
Commit: 3fcba45de123f2c3a09faf50b51f507437fe6b21
https://github.com/llvm/llvm-project/commit/3fcba45de123f2c3a09faf50b51f507437fe6b21
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/utils/lit/lit/run.py
M llvm/utils/lit/tests/lit.cfg
R llvm/utils/lit/tests/single-process.py
Log Message:
-----------
Revert "[lit] Avoid multiprocessing for -j1 runs (#175587)"
This reverts commit 9f1a9d24813c0c1b89d24063825a7fb8ca64a3a1.
This caused quite a few buildbot failures (see failures on the PR). It
does not look like a trivial fix to me.
Commit: 65c46fee1df4026273b8033a0486e66a2f5e6b35
https://github.com/llvm/llvm-project/commit/65c46fee1df4026273b8033a0486e66a2f5e6b35
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
A llvm/test/CodeGen/Hexagon/dag-isel-balancetree-rauw.ll
Log Message:
-----------
[Hexagon] Fix use-after-poison in balanceSubTree (#179239)
The balanceSubTree() function in HexagonISelDAGToDAG was accessing node
operands after recursive calls that could invalidate those nodes through
RAUW.
Use pre-captured Op0/Op1 values instead of re-accessing N's operands
after BST calls, add bounds checking before accessing node operands in
several places, check if nodes were RAUW'd before calling getHeight() on
them.
Commit: 68592fa7ee61f2bd5c648105203f002b5f6067e9
https://github.com/llvm/llvm-project/commit/68592fa7ee61f2bd5c648105203f002b5f6067e9
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/test/ClangScanDeps/prune-scanning-modules.m
Log Message:
-----------
[ClangScanDeps][test] Avoid writing to readonly dirs (#179733)
Writing files to the current dir fails when tests are run in an
environment w/ a readonly build tree. The normal fix is to write to an
explicitly writeable dir (i.e. `-o %t/info.json`), but since we don't
actually do anything w/ info.json, just write to `/dev/null` instead.
Commit: ccb58432e31c9c0174e2273fe1c12c4c0b5128d8
https://github.com/llvm/llvm-project/commit/ccb58432e31c9c0174e2273fe1c12c4c0b5128d8
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M libcxx/include/__algorithm/ranges_reverse_copy.h
M libcxx/include/__iterator/reverse_iterator.h
Log Message:
-----------
[libc++] Use views::reverse to implement ranges::reverse_copy (#177123)
We currently have a custom utility `__reverse_range`, which does
basically the same thing as `views::reverse` and the only place where we
use it is in `ranges::reverse_copy`. Instead of this special utility, we
can simply use `views::reverse`.
This has originally been introduced due to compile time concerns.
However, there doesn't seem to actually be a significant compile time
regression overall.
Commit: ecd0e7df8c8207589a675203d163d8709d8a6e82
https://github.com/llvm/llvm-project/commit/ecd0e7df8c8207589a675203d163d8709d8a6e82
Author: Saleem Abdulrasool <compnerd at compnerd.org>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Support/Windows/Path.inc
Log Message:
-----------
Support: allow `llvm::sys::fs::rename` to rename a directory on Windows (#179739)
`CreateFileW` must be passed `FILE_FLAG_BACKUP_SEMANTICS` to allow a
handle to a directory to be acquired. Without this, we would previously
fail with permission denied if a directory was attempted to be renamed.
Commit: 639a8d1f1d7a87ec5a8a61745b9a708a5a672df4
https://github.com/llvm/llvm-project/commit/639a8d1f1d7a87ec5a8a61745b9a708a5a672df4
Author: Ian Anderson <iana at apple.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/include/clang/Basic/TargetOSMacros.def
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/test/Driver/darwin-fapple-link-rtlib.c
M clang/test/Driver/darwin-ld.c
M clang/test/Driver/fdefine-target-os-macros.c
A clang/test/Driver/unsupported-target-vendor.c
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/TargetParser/Triple.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
Log Message:
-----------
[Triple] Make a target triple "os" for firmware (#176272)
Make a Triple::OSType to support a generic "firmware" OS that isn't bare
metal, but isn't tied to a specific hardware platform like macOS or iOS.
Hook up support for the new OSType in the Darwin toolchain.
Commit: b33a0e61014cac598b251b803ada68661d2fb4da
https://github.com/llvm/llvm-project/commit/b33a0e61014cac598b251b803ada68661d2fb4da
Author: Alex Wang <yesterda9 at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
A llvm/test/CodeGen/AMDGPU/llvm.modf.ll
A llvm/test/CodeGen/AMDGPU/modf-constant-fold.ll
Log Message:
-----------
[SelectionDAG] Add expansion for llvm.modf intrinsic (#179434)
Targets without a `modf` libcall lower the intrinsic directly, matching
the existing `llvm.frexp` expansion. Targets with an existing libcall
are unchanged.
Fixes #173021
Commit: 49288b652301651df6f09da638f78d6676c23564
https://github.com/llvm/llvm-project/commit/49288b652301651df6f09da638f78d6676c23564
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
A llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/vplan.ll
A llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/vplan.ll.expected
A llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/vplan.test
M llvm/utils/UpdateTestChecks/common.py
M llvm/utils/update_analyze_test_checks.py
Log Message:
-----------
[UTC] Add initial VPlan support. (#178534)
Add support for extracting a VPlan from LV debug output and generalizing
matching for unnamed VPValues.
Once we have support for -vplan-print-after=xxxx we can strip the logic
to extract a VPlan manually. We cannot use regex, as we need to match
from start opening bracket to the correct closing bracket.
PR: PR: https://github.com/llvm/llvm-project/pull/178534
Commit: 3e1e86ef1fb8973f90cde376d5ad2d79ec7f52d9
https://github.com/llvm/llvm-project/commit/3e1e86ef1fb8973f90cde376d5ad2d79ec7f52d9
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.to.lds.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-lds-dma-volatile-and-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-unscoped.ll
Log Message:
-----------
[AMDGPU] Return two MMOs for load-to-lds and store-from-lds intrinsics (#175845)
Accurately represent both the load and the store part of those intrinsics.
The test changes seem to be mostly fairly insignificant changes caused
by subtly different scheduler behavior.
Commit: 1f8a3f2fdbf51cbba4635ef05e8139039a105c2c
https://github.com/llvm/llvm-project/commit/1f8a3f2fdbf51cbba4635ef05e8139039a105c2c
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
A clang/test/CIR/CodeGen/integer-overflow.c
Log Message:
-----------
[CIR] Fix a problem with createSub default overflow behavior (#179731)
When the createSub function was added in CIRBaseBuilderTy, the default
for the overflow behavior parameter was set to
OverflowBehavior::Saturated. This led to incorrect behavior for
subtraction when the -fwrapv option was used, but we didn't have a test
for that so it wasn't noticed.
This change adds a test and corrects the behavior.
Commit: 89655bda0daf3bc13c74b3020fbc463b8e4506d4
https://github.com/llvm/llvm-project/commit/89655bda0daf3bc13c74b3020fbc463b8e4506d4
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/abseil/unchecked-statusor-access.rst
Log Message:
-----------
[NFC] [clang-tidy] Add doc about FP in unchecked-statusor-access (#179592)
Commit: 9e146f757b26944cf639114d49aab7e5e9a24865
https://github.com/llvm/llvm-project/commit/9e146f757b26944cf639114d49aab7e5e9a24865
Author: Alexey Bader <alexey.bader at intel.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/test/Driver/clang-sycl-linker-test.cpp
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
Log Message:
-----------
[NFC][clang-sycl-linker] Rename runSPIRVCodeGen to runCodeGen. (#179372)
`runSPIRVCodeGen` function doesn't use SPIR-V backend explicitly. The
backend is chosen based on `-triple` option value. Technically
`clang-sycl-linker` tool can emit PTX or a binary format based on the
triple value.
Fixed comments.
Commit: 861d2e2dd352895f4a1a0e4efac66aa5e713a56f
https://github.com/llvm/llvm-project/commit/861d2e2dd352895f4a1a0e4efac66aa5e713a56f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfoC.td
M llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/test/MC/RISCV/option-arch.s
M llvm/test/MC/RISCV/rv32dc-valid.s
M llvm/test/MC/RISCV/rv32fc-valid.s
M llvm/test/MC/RISCV/rv64dc-valid.s
Log Message:
-----------
[RISCV] Deprecate RISCVSubtarget::hasStdExtCOrZcd() and hasStdExtCOrZcfOrZce(). (#179762)
Replace with hasStdExtZcd() and hastStdExtZcf().
Creation of RISCVSubtarget/MCSubtargetInfo handles implication of Zcf
and Zcd now. The exception is .option arch handling which will require
+zcf and +zcd to be listed explicitly. I'll try to fix this in a follow
up. #155035 had the same issue.
I've left the error messages mentioning both Zcf and C+F/D. We can
consider changing that in a follow up.
Commit: 2e429f7e1f5b490a703de4cf06ef65eed784f7ab
https://github.com/llvm/llvm-project/commit/2e429f7e1f5b490a703de4cf06ef65eed784f7ab
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/MPI/IR/Utils.h
Log Message:
-----------
[mlir][shard,mpi][NFC] Add missing header (#179777)
Utils.h uses `mlir::mpi::CommWorldOp` w/o including the necessary header
(https://llvm.org/docs/CodingStandards.html#self-contained-headers),
making this not self contained. It only works because all the .cpp files
that use it have the necessary include.
Commit: 00e2649f030fe7841d97eca0c7166d7828664e68
https://github.com/llvm/llvm-project/commit/00e2649f030fe7841d97eca0c7166d7828664e68
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/test/CIR/CodeGen/new.cpp
Log Message:
-----------
[CIR] Upstream support for array new with non-empty ILE (#179556)
This adds CIR support for handling array new initialization with a
non-empty initializer list.
Commit: c51a758d7fe4d2168e62dfca5e1ef66a20d60d65
https://github.com/llvm/llvm-project/commit/c51a758d7fe4d2168e62dfca5e1ef66a20d60d65
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
Log Message:
-----------
[lldb][test] Add SBExpressionOptions parameter to expect_expr (#177920)
Allows API tests to pass `SBExpressionOptions` when testing a successful
expression evaluation with `expect_expr`. Currently one would have to
use `SBFrame::EvaluateExpression` or pass the option as an argument to
the raw command (via `expect()` or `HandleCommand()`).
Chose not to do the `SetIgnoreBreakpoints`/`SetAutoApplyFixIts` with the
assumption that most expression evaluation tests don't actually need to
care about these. If the options are passed explicitly, lets use them
as-is. Otherwise default to the old options.
First usage of this new parameter would be in
https://github.com/llvm/llvm-project/pull/177926
Commit: 2e52de5aa26aa9e77bfacb7d330a63ac7a585ca5
https://github.com/llvm/llvm-project/commit/2e52de5aa26aa9e77bfacb7d330a63ac7a585ca5
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M lldb/bindings/interface/SBExpressionOptionsDocstrings.i
M lldb/include/lldb/API/SBExpressionOptions.h
M lldb/include/lldb/Target/Target.h
M lldb/source/API/SBExpressionOptions.cpp
M lldb/source/Target/Target.cpp
M lldb/test/API/commands/expression/options/TestExprOptions.py
M lldb/unittests/Expression/ExpressionTest.cpp
Log Message:
-----------
[lldb][Expression] Add API to set/get language-specific expression options (#179208)
The motivation here is that we don't want to pollute the SBAPI with
getters/setters for expression evaluation options that only apply to a
single language. The ultimate goal would be to have plugins register
additional options to the `expression` command when the plugin is
loaded. This patch only provides the minimal `SBExpressionOptions`
interface to set an option with an arbitrary name, which the language
plugin knows how to interpret. The underlying options dictionary is an
`StructuredData::Dictionary` so we can map strings to values of any
type. But the SBAPI just exposes setting a boolean value. Future
overloads of `SetLanguageOption` can provide setters for more types.
The boolean setter/getter will be used for the C++-specific option being
introduced in: https://github.com/llvm/llvm-project/pull/177926
Commit: 61118643c07a6232ffe0614cf4750d365cf5607d
https://github.com/llvm/llvm-project/commit/61118643c07a6232ffe0614cf4750d365cf5607d
Author: Justin Bogner <mail at justinbogner.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/test/CodeGenHLSL/resources/cbuffer_geps.hlsl
Log Message:
-----------
[HLSL] Fix miscompile of small structs after arrays in cbuffers (#179768)
We weren't accounting for skipped fields correctly when emitting struct
member exprs, which could lead to us reading padding instead of the
member itself when a struct followed an array.
Fixes #179716
Commit: d97ce9bc04394de6464b0278fe2d250bcc8f3a1b
https://github.com/llvm/llvm-project/commit/d97ce9bc04394de6464b0278fe2d250bcc8f3a1b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/test/Transforms/LoopVectorize/early_exit_legality.ll
Log Message:
-----------
[LV] Use DomTree DFS numbers to sort early exit blocks.
properlyDominates does not provide a strict weak ordering. Use DFS in
numbers instead, to avoid ordering violations.
Commit: 66ba9c9475c7628893f387f1b9d9d3056b05d995
https://github.com/llvm/llvm-project/commit/66ba9c9475c7628893f387f1b9d9d3056b05d995
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/utils/mlgo-utils/mlgo/corpus/extract_ir_lib.py
Log Message:
-----------
[MLGO] Ensure cmd_filter is marked Optional (#179781)
cmd_filter is supposed to be set to None if there is no filter according
to the API documentation. This is not actually allowed currently though
according to the type information. Update the type information to match
what is intended.
Commit: 0cac3e381dc956f6e14cf0809dc054d7f68ff4bb
https://github.com/llvm/llvm-project/commit/0cac3e381dc956f6e14cf0809dc054d7f68ff4bb
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
M llvm/lib/Target/Lanai/LanaiInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
Log Message:
-----------
[CodeGen][TII] Delete analyzeSelect hook (#175828)
The only caller of this function (`PeepholeOptimizer::optimizeSelect`)
did not use most of the parameters, was broadly equivalent to
`MI->isSelect()`, and the `optimizeSelect` hook can return `nullptr`
anyway.
Update `optimizeSelect` to return `nullptr` by default rather than
asserting when not implemented.
Commit: 031a90e977bd209e7bbaf7ba102ea9cf6d78c8ba
https://github.com/llvm/llvm-project/commit/031a90e977bd209e7bbaf7ba102ea9cf6d78c8ba
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/test/Driver/hip-rdc-device-only.hip
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/hip-toolchain-rdc-separate.hip
M clang/test/Driver/hip-toolchain-rdc.hip
M clang/test/Driver/hipspv-toolchain-rdc.hip
M clang/test/Driver/hipspv-toolchain.hip
M clang/test/SemaCUDA/vararg.cu
Log Message:
-----------
[Clang] Remove use of deprecated `-fucda-allow-variadic-functions` (#179724)
Summary:
This option is a no-op but we're still passing it in places. Just remove
it entirely.
Commit: 4e21141bae0dac9eadd28fe230ffe213cd156af6
https://github.com/llvm/llvm-project/commit/4e21141bae0dac9eadd28fe230ffe213cd156af6
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M .github/workflows/issue-release-workflow.yml
Log Message:
-----------
workflows/issue-release-workflow: Add an environment in order to limit secret access (#179585)
I've created a new environment called `main-branch-only` which is meant
to be used for running the GitHub Actions based automations for the
project. By using an environment, we can move some of the secrets we use
from the repository configuration and into the environment
configuration, which means they will only be accessible for jobs that
run on the branch we specify, which in this case is the main branch.
This will prevent people from using user branches as a way to gain
access to secret values (which they can do now very easily by creating a
workflow that dumps the secrets). Even though someone could still do
this by pushing to main, user branches are hard to monitor and they can
be easily deleted after dumping the secrets leaving no trace.
If someone where to do this on the main branch it would be much more
visible and impossible to cover up.
I would like to apply this to more workflows, but I'm starting here so I
can test it and make sure it works the way I expect.
Commit: 1ade879267e8d4e2314b45fcd63e9fbbc8249226
https://github.com/llvm/llvm-project/commit/1ade879267e8d4e2314b45fcd63e9fbbc8249226
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M .github/workflows/release-binaries.yml
Log Message:
-----------
workflows/release-binaries: Fix typo (#178732)
This was causing the attestation-name to be null which caused the attestation upload to fail.
Commit: 14e50aa4c53e4ef1c3d3b6c31fd01815a0c1bfb6
https://github.com/llvm/llvm-project/commit/14e50aa4c53e4ef1c3d3b6c31fd01815a0c1bfb6
Author: Ilgar Gamidov <braam76.gamidov at yandex.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M mlir/include/mlir/ExecutionEngine/MemRefUtils.h
M mlir/unittests/ExecutionEngine/CMakeLists.txt
A mlir/unittests/ExecutionEngine/OwningMemRef.cpp
Log Message:
-----------
[mlir][ExecutionEngine] Fix missing return from operator==() in `OwningMemRef` (#179655)
Closes [#91233](https://github.com/llvm/llvm-project/issues/91233)
mlir/include/mlir/ExecutionEngine/MemRefUtils.h:190:No 'return'
statement in non-void function
---------
Co-authored-by: braam-76 <braam67.gamidov at yandex.com>
Commit: 6de2b513c6d13089f4190584a88602de8964813e
https://github.com/llvm/llvm-project/commit/6de2b513c6d13089f4190584a88602de8964813e
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M .github/workflows/release-binaries-all.yml
M .github/workflows/release-binaries.yml
M llvm/utils/git/requirements.txt
M llvm/utils/git/requirements.txt.in
Log Message:
-----------
workflows/release-binaries: Add support for Windows ARM builds (#177609)
Commit: 6e98a933576da3fc368af394f630d454c1160ee3
https://github.com/llvm/llvm-project/commit/6e98a933576da3fc368af394f630d454c1160ee3
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
Log Message:
-----------
[LV] Make sure DFS numbers are valid before use.
This fixes random crashes with expensive checks after
d97ce9bc04394de6464b0278fe2d250bcc8f3a1b, as accessing DFS numbers is
only safe after calling updateDFSNumbers.
Commit: 28878137f0698b6b13bc6d77bfd0b97a72171b57
https://github.com/llvm/llvm-project/commit/28878137f0698b6b13bc6d77bfd0b97a72171b57
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation4.ll
Log Message:
-----------
[SLP][NFC]Add another test for shl-to-add transformation, NFC
Commit: dbafda598f92fc903414a8a6f924238fb534e082
https://github.com/llvm/llvm-project/commit/dbafda598f92fc903414a8a6f924238fb534e082
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
Log Message:
-----------
[CI] Move libclc to runtimes (#179795)
https://github.com/llvm/llvm-project/pull/179485 deprecated enabling
this as a project which will cause premerge to fail in CMake when
testing it (currently only done when touching libclc, .ci, or .github).
Commit: fab5b1858d02ffed88b76d33f7c691ee4e0c82fb
https://github.com/llvm/llvm-project/commit/fab5b1858d02ffed88b76d33f7c691ee4e0c82fb
Author: Akshay Deodhar <adeodhar at nvidia.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
R llvm/test/CodeGen/NVPTX/atomicrmw-expand.ll
A llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
A llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
A llvm/test/CodeGen/NVPTX/atomicrmw-sm90.ll
A llvm/test/CodeGen/NVPTX/atomicrmw.py
M llvm/test/CodeGen/NVPTX/atomics-sm60.ll
R llvm/test/CodeGen/NVPTX/atomics-sm70.ll
R llvm/test/CodeGen/NVPTX/atomics-sm90.ll
M llvm/test/CodeGen/NVPTX/atomics.ll
M llvm/test/CodeGen/NVPTX/distributed-shared-cluster.ll
M llvm/test/CodeGen/NVPTX/lit.local.cfg
Log Message:
-----------
Reland "[NVPTX][AtomicExpandPass] Complete support for AtomicRMW in NVPTX (#176015)" (#179553)
This PR adds full support for atomicrmw in NVPTX. This includes:
- Memory order and syncscope support (changes in AtomicExpandPass.cpp,
NVPTXIntrinsics.td)
- Script-generated tests for integer and atomic operations
(atomicrmw.py, atomicrmw-sm*.ll in tests/CodeGen/NVPTX). Existing
atomics tests which are subsumed by these have been removed
(atomics-sm*.ll, atomics.ll, atomicrmw-expand.ll).
- ~~Changes shouldExpandAtomicRMWInIR to take a constant argument: This
is to allow some other TargetLowering constant-argument functions to
call it. This change touches several backends. An alternative solution
exists, but to me, this seems the "right" way.~~ Has been split out into
https://github.com/llvm/llvm-project/pull/176073. Rebased.
- NOTE: The initial load issued for atomicrmw emulation loops (and
cmpxchg emulation loops) must be a strong load. Currently,
AtomicExpandPass issues a weak load. Fixing this breaks several
backends. I'm planning to follow up with a separate PR.
Initially failed due to error: ptxas fatal : Value 'sm_60' is not
defined for option 'gpu-name'. Updated RUN lines in atomicrmw-sm*.py to
skip the ptxas-verify check if ptxas does not support that SM version.
Commit: 0129251487104adc73e0662709061a2b2215ef18
https://github.com/llvm/llvm-project/commit/0129251487104adc73e0662709061a2b2215ef18
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/test/CIR/IR/cleanup-scope.cir
Log Message:
-----------
[CIR] Allow return from cleanup scope op (#179820)
When the cir.cleanup.scope operation was added, it was not added to the
list of "returnable" operations. This fixes that oversight.
Commit: 0ec69a96d6ee2a6635b43963ad5e40943d775d30
https://github.com/llvm/llvm-project/commit/0ec69a96d6ee2a6635b43963ad5e40943d775d30
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
Log Message:
-----------
[CIR][NFC] Cleanup some stale missing features markers (#179822)
This deletes a few missing features markers where the missing code had
actually been implemented and deletes a handful that were not being used
anywhere.
Commit: bb7d1efbbd17bfaeeb68c10d425848e8e1396fc1
https://github.com/llvm/llvm-project/commit/bb7d1efbbd17bfaeeb68c10d425848e8e1396fc1
Author: Thurston Dang <thurston at google.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[msan] Add intermediate verbosity instruction dump (#178771)
This patch does not change MSan's instrumentation.
-msan-dump-{heuristic,strict}-instructions currently prints out two
lines per instruction:
1) instruction name only e.g., `call llvm.aarch64.neon.uqsub.v16i8`
2) the full instruction, including actual variables e.g., `%vqsubq_v.i15
= call noundef <16 x i8> @llvm.aarch64.neon.uqsub.v16i8(<16 x i8>
%vext21.i, <16 x i8> splat (i8 1)), !dbg !66`
Option 1) is too sparse for some uses, because it does not contain the
return types or parameter types (although `.v16i8` is part of the
function name in this example, in general, the function name does not
describe the types completely; e.g., `<16 x float>
llvm.x86.avx512.mask.scalef.ps.512(<16 x float>, <16 x float>, <16 x
float>, i16, i32)`). OTOH option 2) can be too verbose because it
contains the actual variables.
This patch adds a Goldilocks-verbosity line:
- instruction prototype (including return type and parameter types)
e.g., `call <16 x i8> @llvm.aarch64.neon.uqsub(<16 x i8>, <16 x i8>)`.
Note that this uses the base/non-overloaded function name, since the
parameter types are already included in the output.
Commit: 17eac111712bf7ce90f2c4cf577f97b9aab2799b
https://github.com/llvm/llvm-project/commit/17eac111712bf7ce90f2c4cf577f97b9aab2799b
Author: Thurston Dang <thurston at google.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/test/Instrumentation/MemorySanitizer/AArch64/aarch64-bf16-dotprod-intrinsics.ll
Log Message:
-----------
[msan][NFCI] Remove redundant tests from aarch64-bf16-dotprod-intrinsics.ll (#178832)
https://github.com/llvm/llvm-project/pull/178510#discussion_r2739401507
requested simplifying test cases by using parameters directly for the
intrinsic calls. Doing that reduces the test case to duplicates of
existing tests, thus this patch deletes the redundant tests.
Commit: d0f9373409d410a54ac17b0178d5963bf668eec9
https://github.com/llvm/llvm-project/commit/d0f9373409d410a54ac17b0178d5963bf668eec9
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp
Log Message:
-----------
[mlir][gpu][pipeline] Add missing passes in XeGPU to XeVM pipeline (#179320)
Commit: 07ebb18e07fb9e009b1f738d6214a49c7bbe8fee
https://github.com/llvm/llvm-project/commit/07ebb18e07fb9e009b1f738d6214a49c7bbe8fee
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/test/tools/llvm-profgen/Inputs/coff-profile.exe
A llvm/test/tools/llvm-profgen/Inputs/coff-profile.pdb
M llvm/test/tools/llvm-profgen/coff-profile.test
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
Log Message:
-----------
[llvm-profgen] Support loading symbols from symtab for COFF (#179175)
PE has strict size constraints. The DWARF sections can occupy a
significant amount of spaces. When using pseudo probe, the symtab
already contains all the required info except symbol size. This
patch teachs llvm-profgen to load symbol size from PDB file.
Commit: 8ab29461c3d9c16ac05a415b235d6a3bf6425645
https://github.com/llvm/llvm-project/commit/8ab29461c3d9c16ac05a415b235d6a3bf6425645
Author: Wenju He <wenju.he at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/test/CodeGenOpenCL/fpmath.cl
M clang/test/CodeGenOpenCL/sqrt-fpmath.cl
Log Message:
-----------
[OpenCL] Set half-precision Div and Sqrt accuracy (#179621)
OpenCL spec relaxed half-precision divide to 1 ULP and sqrt to 1.5 ULP
in https://github.com/KhronosGroup/OpenCL-Docs/pull/1293
https://github.com/KhronosGroup/OpenCL-Docs/pull/1386
This can enable target to use hardware rcp instruction for half.
Commit: 0b3934d67784728a72c4f63b1474bf4181b5607b
https://github.com/llvm/llvm-project/commit/0b3934d67784728a72c4f63b1474bf4181b5607b
Author: int-zjt <zhangjiatong.0 at bytedance.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/test/Transforms/SROA/basictest.ll
M llvm/test/Transforms/SROA/sroa-common-type-fail-promotion.ll
Log Message:
-----------
[SROA] Avoid redundant `.oldload` generation when `memset` fully covers a partition (#179643)
In our internal (ByteDance) builds we frequently hit very large
`DeadPhiWeb`s that cause serious compile-time slowdowns, especially in
some auto-generated code where a single file can take 20+ minutes to
compile. There were previous attempts to reduce `DeadPhiWeb` in
`InstCombine` (e.g. llvm/llvm-project#108876 and
llvm/llvm-project#158057), but in our workload we still see a lot of
time spent later in the pipeline (notably `JumpThreading` and
`CorrelatedValuePropagation`).
After digging into our cases, a big chunk of the `DeadPhiWeb` comes from
SROA rewriting `memset`s. We often end up with patterns like:
```
%.sroa.xxx.oldload = load <ty>, ptr %.sroa.xxx
%unused = ptrtoint ptr %.sroa.xxx.oldload to i64 ; or a bitcast-like use
store <ty> <new_value>, ptr %.sroa.xxx
```
Even if `%unused` is cleaned up by later DCE-style passes, the
load/store shape can still make `PromoteMem2Reg` conservatively treat
many blocks as live-in when computing IDF. With cyclic CFGs this can
easily create large, sticky dead phi webs, and the rest of the pipeline
pays for it.
The core issue is that `visitMemSetInst` was using the slice’s original
offsets (`BeginOffset`/`EndOffset`) when deciding whether it needs to
merge with an `.oldload` to preserve bytes not written by the `memset`.
First, there was a typo in the original condition (`EndOffset !=
NewAllocaBeginOffset` instead of `EndOffset != NewAllocaEndOffset`),
which effectively made the check always true and forced the merge path
in most cases. Second, even if the typo is fixed, comparing the original
slice range against the partition bounds is still too strict: cases
where the `memset` contains the partition (e.g. a large `memset` over
the whole alloca while the partition is just a subrange) would still be
misclassified as requiring an `.oldload`. Both issues lead to many
redundant loads and downstream dead phi webs.
This change switches the check to use the already-computed intersection
offsets (`NewBeginOffset`/`NewEndOffset`) against the partition bounds,
so we only generate `.oldload` when the `memset` actually writes only
part of the partition:
```diff
- if (IntTy && (BeginOffset != NewAllocaBeginOffset ||
- EndOffset != NewAllocaBeginOffset)) {
+ if (IntTy && (NewBeginOffset != NewAllocaBeginOffset ||
+ NewEndOffset != NewAllocaEndOffset)) {
; emit oldload + insertInteger merge
}
```
In our workload this cuts down a lot of pointless `.oldload`s and helps
reduce the size of dead phi webs seen after `mem2reg`, improving compile
time without changing semantics (partial overwrites still merge, full
overwrites don’t).
Commit: 5eba0e57a07715fc0c0e7fdae6d7eebac875c635
https://github.com/llvm/llvm-project/commit/5eba0e57a07715fc0c0e7fdae6d7eebac875c635
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/gen_version_script.gni
Log Message:
-----------
gn build: Use llvm-nm instead of nm to generate version script.
Commit: 16e2e7f59134e63810228c9a0dc990bfd96f9a1f
https://github.com/llvm/llvm-project/commit/16e2e7f59134e63810228c9a0dc990bfd96f9a1f
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
A llvm/utils/gn/secondary/compiler-rt/gen_dynamic_list.gni
M llvm/utils/gn/secondary/compiler-rt/lib/ubsan/BUILD.gn
Log Message:
-----------
gn build: Generate dynamic lists for ubsan.
Commit: a4b4534c31e6f720cee683003e9e8ae4d81c2961
https://github.com/llvm/llvm-project/commit/a4b4534c31e6f720cee683003e9e8ae4d81c2961
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/tools/llvm-profgen/CMakeLists.txt
Log Message:
-----------
[llvm-profgen] Fix PDB dependency (#179830)
Fix build failure after #179175
Commit: 477f3af7823c4557521fba6a101cad2aaceea5da
https://github.com/llvm/llvm-project/commit/477f3af7823c4557521fba6a101cad2aaceea5da
Author: Ivan Tadeu Ferreira Antunes Filho <antunesi at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
Fix Bazel build for 07ebb18 (#179840)
Co-authored-by: Pranav Kant <prka at google.com>
Commit: 42f423d28225403c85db6cd966cdb4e107e1d3b1
https://github.com/llvm/llvm-project/commit/42f423d28225403c85db6cd966cdb4e107e1d3b1
Author: Thurston Dang <thurston at google.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/switch-icmp.ll
Log Message:
-----------
[msan][NFCI] Add test for switch() (#179775)
This test compares the instrumentation for two loosely-equivalent
patterns: (icmp eq + br) vs. switch.
(icmp eq) can have an initialized output even if the inputs are partly
uninitialized, if a bit is initialized in both inputs but has a
different value. In contrast, switch() strictly checks that the input is
fully initialized.
Future work: since the compiler/optimizer may freely choose between
(icmp eq + br) vs. switch, MSan's switch instrumentation also needs to
be able to handle partly-uninitialized inputs.
Commit: 34523c200b21f3a645ce807d0547512b918a22ca
https://github.com/llvm/llvm-project/commit/34523c200b21f3a645ce807d0547512b918a22ca
Author: Anshul Nigham <nigham at google.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86.h
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
M llvm/lib/Target/X86/X86PassRegistry.def
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
Log Message:
-----------
[NewPM] Port x86-lvi-load (#179371)
Commit: 304f5c8c9182610ac8ef2c730a675e38b836670e
https://github.com/llvm/llvm-project/commit/304f5c8c9182610ac8ef2c730a675e38b836670e
Author: Nishant Sachdeva <32475507+nishant-sachdeva at users.noreply.github.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/test/tools/llvm-ir2vec/Inputs/input.ll
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-bindings.py
M llvm/tools/llvm-ir2vec/Bindings/PyIR2Vec.cpp
M llvm/tools/llvm-ir2vec/lib/Utils.cpp
M llvm/tools/llvm-ir2vec/lib/Utils.h
Log Message:
-----------
[llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (#177166)
Adding `getFuncEmbMap` to the llvm-ir2vec python bindings
Commit: 010f8534084f86ab299f93770e9a83c815774b66
https://github.com/llvm/llvm-project/commit/010f8534084f86ab299f93770e9a83c815774b66
Author: Yevgeny Rouban <yrouban at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/unittests/Transforms/Utils/BasicBlockUtilsTest.cpp
Log Message:
-----------
[BasicBlockUtilsTests] Added test case splitBlockBefore2. NFC (#179408)
Splitting a basic block BB into a pair of blocks NewBB->BB used to make
LoopInfo invalid. Commit 28a0cfa946c5 (PR #179392) fixed this issue. So
this commit just adds the test case the issue was found with.
Commit: f00584dbecfc3718c69d39f9bd653c9d576f9433
https://github.com/llvm/llvm-project/commit/f00584dbecfc3718c69d39f9bd653c9d576f9433
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M compiler-rt/lib/asan/asan_flags.cpp
A compiler-rt/test/asan/TestCases/AIX/lit.local.cfg.py
A compiler-rt/test/asan/TestCases/AIX/strict-init-order-warning.cpp
M compiler-rt/test/asan/TestCases/initialization-bug-no-global.cpp
Log Message:
-----------
[asan] Disable strict init checking on AIX (#178012)
The `__cxa_atexit` interceptor is disabled for `SANITIZER_AIX` because
Clang on AIX neither uses `__cxa_atexit` nor links against a library
with such. This interceptor calls `StopInitOrderChecking()`, which is
needed to prevent false positives for the `initialization-order-fiasco`
error observed in the asan test `init-order-atexit.cpp` that uses the
`strict_init_order` flag. For now, we'll disable the `strict_init_order`
flag, but we'll look to support it in the future by implementing an
`exit` interceptor or some other alternative. With the flag disabled, we
won't update `init-order-atexit.cpp` to ensure it continues to pass and
the false positive doesn't show up.
Commit: 37bbeb31f369a5215d57c7b61a732a9ff618798f
https://github.com/llvm/llvm-project/commit/37bbeb31f369a5215d57c7b61a732a9ff618798f
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
A llvm/test/Analysis/DependenceAnalysis/rdiv-large-btc.ll
A llvm/test/Analysis/DependenceAnalysis/strong-siv-large-btc.ll
A llvm/test/Analysis/DependenceAnalysis/weak-crossing-siv-large-btc.ll
A llvm/test/Analysis/DependenceAnalysis/weak-zero-siv-large-btc.ll
Log Message:
-----------
[DA] Add tests for dependencies are missed due to large BTC (NFC) (#179664)
For some dependence tests, there are corner cases where `BTC <s 0`. This
patch adds test cases for those situations. Notably, in these tests,
dependencies are missed even though no overflow occurs.
Commit: cab951718bf0a52e1e4aa034d94720396d09a17c
https://github.com/llvm/llvm-project/commit/cab951718bf0a52e1e4aa034d94720396d09a17c
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/pointer-assignment.cpp
A flang/test/Semantics/ignore_tkr05.f90
Log Message:
-----------
[flang] Disable various semantic checks for descriptor dummy args with ignore_tkr(c) (#179530)
When descriptor dummy args have ignore_tkr(c), we want to use the
descriptor unchanged. As such, disable various semantic error checks
that are normally performed on descriptor based dummy args without
ignore_tkr(c)
Commit: dfdc3b72d236d9178df59b453fa58803c695b6b3
https://github.com/llvm/llvm-project/commit/dfdc3b72d236d9178df59b453fa58803c695b6b3
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/test/CodeGen/AArch64/sms-loop-carried-fp-exceptions1.mir
M llvm/test/CodeGen/Hexagon/swp-loop-carried-order-dep6.mir
Log Message:
-----------
[MachinePipelner] Add loop-carried dependencies for global barriers (#174391)
The loads/stores must not be reordered across barrier instructions.
However, in MachinePipeliner, it potentially could happen since
loop-carried dependencies from loads/stores to a barrier instruction
were not considered. The same problem exists for barrier-to-barrier
dependencies. This patch adds the handling for those cases. The
implementation is based on that of `ScheduleDAGInstrs::buildSchedGraph`.
Split off from https://github.com/llvm/llvm-project/pull/135148
Commit: 7c64723f34db67c2315964fe029e4db498491faf
https://github.com/llvm/llvm-project/commit/7c64723f34db67c2315964fe029e4db498491faf
Author: Serosh <janmejayapanda400 at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
A clang/test/AST/ByteCode/gh176549.cpp
Log Message:
-----------
[clang][bytecode] Fix stack corruption in pointer arithmetic discard (#176555)
The bytecode compiler was ignoring the DiscardResult flag in
VisitPointerArithBinOp
, causing pointer addition and subtraction results to persist on the
stack when they should have been popped (e.g., in comma expressions).
This led to stack corruption and assertion failures in subsequent
operations that encountered an unexpected pointer on the stack.
This patch refactors the unified addition/subtraction logic to ensure
the result is properly popped when DiscardResult is true.
Fixes #176549
Commit: fc56916a5dc072e16bf05ef6bbaa686e5a509bf3
https://github.com/llvm/llvm-project/commit/fc56916a5dc072e16bf05ef6bbaa686e5a509bf3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp-mask.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp-mask.ll
Log Message:
-----------
[RISCV] Correct lowering of ISD::SETGE/SETULE/SETLE/SETUGE in lowerVPSetCCMaskOp. (#179801)
XOR should be OR to match the comment.
Found while reviewing #179622 which deletes this function. I would like
to commit this first so we have a correct baseline for reviewing that
patch.
Commit: adf7dbc2a8d28d303e0c539f4e7a23561ed3cf29
https://github.com/llvm/llvm-project/commit/adf7dbc2a8d28d303e0c539f4e7a23561ed3cf29
Author: Fangrui Song <i at maskray.me>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M lld/test/ELF/aarch64-fpic-add_abs_lo12_nc.s
R lld/test/ELF/abs-conflict.s
A lld/test/ELF/conflict-abs.s
M lld/test/ELF/conflict.s
M lld/test/ELF/eh-frame-dyn-rel.s
M lld/test/ELF/incompatible-section-flags.s
M lld/test/ELF/invalid-cie-length.s
M lld/test/ELF/loongarch-branch.s
M lld/test/ELF/mips-align-err.s
M lld/test/ELF/ppc64-abs32-dyn.s
M lld/test/ELF/ppc64-error-toc-tail-call.s
M lld/test/ELF/relocation-nocopy.s
M lld/test/ELF/relocation-past-merge-end.s
M lld/test/ELF/undef-spell-corrector.s
M lld/test/ELF/vs-diagnostics-dynamic-relocation.s
M lld/test/ELF/x86-64-tls-ie-err.s
M lld/test/ELF/ztext.s
Log Message:
-----------
[ELF,test] Improve error message tests
They have multiple `not ld.lld` commands or they test multiple error
messages. Add --implicit-check-not=error: to catch unexpected errors.
While updating them, use directory isolation pattern and simplify
filenames where appropriate.
Rename abs-conflict.s to conflict-abs.s to be consistent with other
conflict*.s tests.
Commit: 1c428074efd7d997d43bde2baf9cad5444d44fc7
https://github.com/llvm/llvm-project/commit/1c428074efd7d997d43bde2baf9cad5444d44fc7
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
A clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CMakeLists.txt
Log Message:
-----------
[CIR][AMDGPU][NFC] Add CIRGenBuiltinAMDGPU file to support AMDGPU builtins codegen (#179237)
Upstreaming ClangIR PR : https://github.com/llvm/clangir/pull/2030
This PR adds CIRGenBuiltinAMDGPU.cpp file for AMDGPU specific builtin
codegen support.
Lists out all the builtins that are currently supported for codegen in
`clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp`.
All builtins codegen are currently "NYI".
Commit: 095066082e1dfa202ba2ddcb2561bb8293b3edc4
https://github.com/llvm/llvm-project/commit/095066082e1dfa202ba2ddcb2561bb8293b3edc4
Author: Artem Dergachev <artem.dergachev at gmail.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
[clang][dataflow] Fix a new crash on assigning values of unmodeled types. (#179788)
Regressed by me in #178943. Caught by @jvoung.
Commit: 93d99e3e5474a8c58b42f9f0e0ed26f10c845f6c
https://github.com/llvm/llvm-project/commit/93d99e3e5474a8c58b42f9f0e0ed26f10c845f6c
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-02-04 (Wed, 04 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
Log Message:
-----------
[NFC][AMDGPU] Reorganize gfx125x features (#179843)
Commit: 79a26b9d655ac36ee1e6cedd2f12f58f71392835
https://github.com/llvm/llvm-project/commit/79a26b9d655ac36ee1e6cedd2f12f58f71392835
Author: Jim Lin <jim at andestech.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedAndes45.td
M llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-arithmetic.s
M llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-bitwise.s
M llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-comparison.s
M llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-conversion.s
M llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-fma.s
M llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-minmax.s
M llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-mul-div.s
M llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-permutation.s
Log Message:
-----------
[RISCV] Update Andes45 vector integer arithmetic scheduling info (#174538)
This PR adds latency/throughput for all RVV integer arithmetic to the
andes45 series scheduling model.
Commit: 82c0607ffd5a03459972f8f055c63663be5bfccd
https://github.com/llvm/llvm-project/commit/82c0607ffd5a03459972f8f055c63663be5bfccd
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/test/CodeGen/AArch64/sms-loop-carried-fp-exceptions1.mir
Log Message:
-----------
[MachinePipeliner] Add loop-carried dependences for FPExceptions (#174392)
As with loads and stores, instructions that may trigger floating‑point
exceptions must not be reordered across a barrier instruction. This
patch adds the missing loop‑carried dependencies between such
instructions and the barrier, preventing reordering that could
previously occur. Same as #174391, the implementation is based on that
of `ScheduleDAGInstrs::buildSchedGraph`.
Split off from #135148
Commit: 3b9d4076124786126d00f47cc3e0e21a876ff41e
https://github.com/llvm/llvm-project/commit/3b9d4076124786126d00f47cc3e0e21a876ff41e
Author: Urvi Rav <94829943+ravurvi20 at users.noreply.github.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
A flang/test/Lower/OpenMP/Todo/multiple-types-declare_reduction.f90
Log Message:
-----------
[Flang] [OpenMP]Support for multiple types in declare_reduction (#179442)
Fixes [#178614](https://github.com/llvm/llvm-project/issues/178614)
This PR implements support for multiple types in OpenMP declare
reduction directives, as specified in OpenMP
Spec(`6.0-7.6.14declare_reduction Directive`).
When a declare reduction directive specifies several types (e.g.,` !$omp
declare reduction(name: integer, real : ...)`), separate reduction
operations are now generated for each type.
Modified `flang/lib/Lower/OpenMP/OpenMP.cpp` to:
- Loop through each type in the type list
- Generate a separate omp.declare_reduction operation for each type
---------
Co-authored-by: urvi-rav <urvi.rav at hpe.com>
Commit: 2ca54b41a45e5292d2e56e933da905e86e2480b8
https://github.com/llvm/llvm-project/commit/2ca54b41a45e5292d2e56e933da905e86e2480b8
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachinePipeliner.h
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/test/CodeGen/AArch64/sms-instruction-scheduled-at-correct-cycle.mir
Log Message:
-----------
[MachinePipeliner] Remove isLoopCarriedDep calls in computeStart (#174393)
When computing the viable cycles for scheduling an instruction,
`computeStart` used to include special-case logic to handle loop-carried
dependencies. This special handling was necessary because loop-carried
dependencies were represented by reversed forward-direction edges in the
DAG. Now that we have the DDG, which explicitly models loop-carried
dependencies, this special handling is no longer required. As a first
step towards completely removing `isLoopCarriedDep`, this patch
eliminates the special-case logic from `computeStart` and some related
functions.
Split off from https://github.com/llvm/llvm-project/pull/135148
Commit: 9d944c0ed2c09d528875a546b4d348f044e95dc4
https://github.com/llvm/llvm-project/commit/9d944c0ed2c09d528875a546b4d348f044e95dc4
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/Sema/sizeless-1.c
Log Message:
-----------
[clang][bytecode] Visit 2nd atomic_is_lock_free arg as lvalue (#179673)
Commit: 0e0d7774546005216ee4f874c585b1c91c998414
https://github.com/llvm/llvm-project/commit/0e0d7774546005216ee4f874c585b1c91c998414
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vminu-vp.ll
Log Message:
-----------
[RISCV] Remove trivial constant from fixed-vectors-vminu-vp.ll test. NFC (#179868)
Commit: 84615792980db3a60a9c81386617a06f452aeccc
https://github.com/llvm/llvm-project/commit/84615792980db3a60a9c81386617a06f452aeccc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pown.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-powr.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
Log Message:
-----------
AMDGPU: Add nofpclass when expanding pow (#177933)
The codegen regression is tracked in #177913
Commit: c64257b4b767595eb078386828419f6403e1c140
https://github.com/llvm/llvm-project/commit/c64257b4b767595eb078386828419f6403e1c140
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionDeclMap.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionSourceCode.cpp
M lldb/test/API/commands/expression/expr_inside_lambda/TestExprInsideLambdas.py
M lldb/test/API/lang/cpp/const_this/TestConstThis.py
A lldb/test/API/lang/cpp/expression-context-qualifiers/const_method/Makefile
A lldb/test/API/lang/cpp/expression-context-qualifiers/const_method/TestExprInConstMethod.py
A lldb/test/API/lang/cpp/expression-context-qualifiers/const_method/main.cpp
A lldb/test/API/lang/cpp/expression-context-qualifiers/const_volatile_method/Makefile
A lldb/test/API/lang/cpp/expression-context-qualifiers/const_volatile_method/TestExprInConstVolatileMethod.py
A lldb/test/API/lang/cpp/expression-context-qualifiers/const_volatile_method/main.cpp
A lldb/test/API/lang/cpp/expression-context-qualifiers/cv_qualified_objects/Makefile
A lldb/test/API/lang/cpp/expression-context-qualifiers/cv_qualified_objects/TestExprOnCVQualifiedObjects.py
A lldb/test/API/lang/cpp/expression-context-qualifiers/cv_qualified_objects/main.cpp
A lldb/test/API/lang/cpp/expression-context-qualifiers/fixit/Makefile
A lldb/test/API/lang/cpp/expression-context-qualifiers/fixit/TestExprInConstMethodWithFixit.py
A lldb/test/API/lang/cpp/expression-context-qualifiers/fixit/main.cpp
A lldb/test/API/lang/cpp/expression-context-qualifiers/non_const_method/Makefile
A lldb/test/API/lang/cpp/expression-context-qualifiers/non_const_method/TestExprInNonConstMethod.py
A lldb/test/API/lang/cpp/expression-context-qualifiers/non_const_method/main.cpp
A lldb/test/API/lang/cpp/expression-context-qualifiers/template_const_method/Makefile
A lldb/test/API/lang/cpp/expression-context-qualifiers/template_const_method/TestExprInTemplateConstMethod.py
A lldb/test/API/lang/cpp/expression-context-qualifiers/template_const_method/main.cpp
A lldb/test/API/lang/cpp/expression-context-qualifiers/template_non_const_method/Makefile
A lldb/test/API/lang/cpp/expression-context-qualifiers/template_non_const_method/TestExprInTemplateNonConstMethod.py
A lldb/test/API/lang/cpp/expression-context-qualifiers/template_non_const_method/main.cpp
M lldb/test/API/lang/cpp/this/TestCPPThis.py
Log Message:
-----------
[lldb][Expression] Make __lldb_expr function qualifiers match source context (#177922)
We stopped marking `__lldb_expr` with the function qualifiers of the
method LLDB is stopped in ever since
`8bdcd522510f923185cdfaec66c4a78d0a0d38c0`. The assumption was that it
wasn't ever required for correctness (i.e., LLDB should just always
pretend it's in a mutable context). But since function qualifiers affect
overloading in C++, this assumption can lead to unexpected expression
evaluator behaviour. E.g., if a function is overloaded on qualifiers
(`const` vs. `non-const`), the expression evaluator would currently
always call the non-CV qualified overload.
This patch adds function qualifiers to `$__lldb_class::$__lldb_expr`
that resemble the qualifiers of the method that we're stopped in.
However, mutating variables or calling arbitrary member functions from
CV-qualified methods can be useful/is something users already may be
used to. To provide users with the ability to ignore the CV-qualifiers
of the current context, we will provide an expression evaluator flag
that switches this off in a follow-up patch.
Commit: 4366324c89587318998545f2ee4a69d4fc0ee0f0
https://github.com/llvm/llvm-project/commit/4366324c89587318998545f2ee4a69d4fc0ee0f0
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-object-size-codegen.cpp
A clang/test/AST/ByteCode/pass-object-size.c
Log Message:
-----------
[clang][bytecode] Improve `__builtin_object_size` handling (#179271)
This fixes a few more tests from `pass-object-size.c`, but we still
can't enable the entire file.
Commit: 584156d15d24c9b9f67aa7850e86ee2474a250c0
https://github.com/llvm/llvm-project/commit/584156d15d24c9b9f67aa7850e86ee2474a250c0
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/include/lldb/Target/Target.h
M lldb/source/Commands/CommandObjectExpression.cpp
M lldb/source/Commands/CommandObjectExpression.h
M lldb/source/Commands/Options.td
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionDeclMap.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionDeclMap.h
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionSourceCode.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionSourceCode.h
M lldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.h
M lldb/source/Plugins/ExpressionParser/Clang/ClangUtilityFunction.cpp
M lldb/source/Target/Target.cpp
M lldb/test/API/lang/cpp/expression-context-qualifiers/const_method/TestExprInConstMethod.py
M lldb/test/API/lang/cpp/expression-context-qualifiers/const_volatile_method/TestExprInConstVolatileMethod.py
M lldb/test/API/lang/cpp/expression-context-qualifiers/non_const_method/TestExprInNonConstMethod.py
M lldb/test/API/lang/cpp/expression-context-qualifiers/template_const_method/TestExprInTemplateConstMethod.py
M lldb/test/API/lang/cpp/expression-context-qualifiers/template_non_const_method/TestExprInTemplateNonConstMethod.py
M lldb/test/API/lang/cpp/this/TestCPPThis.py
M lldb/unittests/Expression/ClangExpressionDeclMapTest.cpp
Log Message:
-----------
[lldb][Expression] Add --c++-ignore-context-qualifiers expression evaluation option (#177926)
Depends on:
* https://github.com/llvm/llvm-project/pull/177920
* https://github.com/llvm/llvm-project/pull/177922
* https://github.com/llvm/llvm-project/pull/179208
(only commit d8676d0ed9286777e1a1e9f625389540cc42c231 and later are
relevant for this review)
In https://github.com/llvm/llvm-project/pull/177922 we make expressions
run in C++ member functions honor the function qualifiers of the current
stop context. E.g., this means we can no longer run non-const member
functions when stopped in a const-member function.
To ensure users can still do this if they really need/want to, we
provide an option to not honor the qualifiers at all, leaving the
`__lldb_expr` minimally qualified, allowing it to call any
function/mutate any members.
Commit: 3bbf748a63a3cb38271a478b520789be57d5e2c8
https://github.com/llvm/llvm-project/commit/3bbf748a63a3cb38271a478b520789be57d5e2c8
Author: nora <48135649+Noratrieb at users.noreply.github.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
Log Message:
-----------
[VPlan] Create edge mask for single-destination switch (#179107)
When converting phis to blends, the `VPPredicator` expects to have edge
masks to the phi node if the phi node has different incoming blocks.
This was not the case if the predecessor of the phi was a switch where a
conditional destination was the same as the default destination.
This was because when creating edge masks in `createSwitchEdgeMasks`,
edge masks are set in a loop through the *non-default* destinations. But
when there are no non-default destinations (but at least one condition,
otherwise an earlier condition would trigger and just forward the source
mask), this loop is never executed, so the masks are never set.
To resolve this, we explicitly forward the source mask for these cases
as well, which is correct because it is an unconditional branch, just a
very convoluted one.
fixes #179074
Commit: 6933962d4ba57a841fe71545bbadcc2c51261663
https://github.com/llvm/llvm-project/commit/6933962d4ba57a841fe71545bbadcc2c51261663
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
A llvm/test/Transforms/LoopDistribute/doubly-nested.ll
Log Message:
-----------
[NFC][LoopDistribute] Add test for doubly nested loop (#179263)
Eventually, we want to be able to distribute outer loop as well.
Commit: dbb42c9a4ef23611781ab20c0a3fca05ca17325a
https://github.com/llvm/llvm-project/commit/dbb42c9a4ef23611781ab20c0a3fca05ca17325a
Author: ofri frishman <ofri4321 at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/test/Dialect/MemRef/ops.mlir
Log Message:
-----------
[mlir] update memref.cast cast compatible check (#179313)
Updating memref.cast check regarding if input and output are valid for
casting.
Currently in case of casting between dynamic and static dims with
different strides, the return value of the check is not symmetric and
depends if casting for dynamic to static or vice versa. Updating the
check logic to make this symmetric.
Commit: 58912f3c73f9001b2495e1a801275cd537a9f4a9
https://github.com/llvm/llvm-project/commit/58912f3c73f9001b2495e1a801275cd537a9f4a9
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/include/lldb/Expression/UserExpression.h
M lldb/source/Expression/UserExpression.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.h
M lldb/test/API/lang/cpp/expression-context-qualifiers/const_method/TestExprInConstMethod.py
M lldb/test/API/lang/cpp/expression-context-qualifiers/const_volatile_method/TestExprInConstVolatileMethod.py
M lldb/test/API/lang/cpp/expression-context-qualifiers/fixit/TestExprInConstMethodWithFixit.py
M lldb/test/API/lang/cpp/expression-context-qualifiers/non_const_method/TestExprInNonConstMethod.py
M lldb/test/API/lang/cpp/expression-context-qualifiers/template_const_method/TestExprInTemplateConstMethod.py
M lldb/test/API/lang/cpp/expression-context-qualifiers/template_non_const_method/TestExprInTemplateNonConstMethod.py
M lldb/test/API/lang/cpp/this/TestCPPThis.py
Log Message:
-----------
[lldb][Expression] Emit hint to use --c++-ignore-context-qualifiers (#177927)
Depends on:
* https://github.com/llvm/llvm-project/pull/177921
* https://github.com/llvm/llvm-project/pull/177926
(only last commit is relevant for this review)
This patch emits a workaround suggestion (in the form of a `note:`
diagnostic) when an expression fails due to trying to mutate state/call
functions with CV-qualifiers that are disallowed by C++ language rules
based on the context the expression is evaluated in. The note looks as
follows:
```
(lldb) expr next.method()
˄
╰─ error: 'this' argument to member function 'method' has type 'const Bar', but function is not marked const
note: Ran expression as 'C++14'.
note: note: 'method' declared here
note: Possibly trying to mutate object in a const context. Try running the expression with: expression --c++-ignore-context-qualifiers -- <your expression>
```
Commit: c7dd96e6f29b032a4879a7fe2fb0ff2ee1406aa5
https://github.com/llvm/llvm-project/commit/c7dd96e6f29b032a4879a7fe2fb0ff2ee1406aa5
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
M llvm/test/CodeGen/AArch64/sme-zt0-state.ll
Log Message:
-----------
[AArch64][SME] Add missing ZT0 transition (#179193)
This transition was missed off the switch, but is already supported (see
the test for the expected behavior).
Commit: 39d60bbe5c0d5e7d86eef596ba7614e78ac4e655
https://github.com/llvm/llvm-project/commit/39d60bbe5c0d5e7d86eef596ba7614e78ac4e655
Author: Alex Guteniev <gutenev at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M libcxx/test/std/atomics/atomics.ref/address.pass.cpp
M libcxx/test/std/atomics/atomics.ref/assign.pass.cpp
M libcxx/test/std/atomics/atomics.ref/bitwise_and_assign.pass.cpp
M libcxx/test/std/atomics/atomics.ref/bitwise_or_assign.pass.cpp
M libcxx/test/std/atomics/atomics.ref/bitwise_xor_assign.pass.cpp
M libcxx/test/std/atomics/atomics.ref/compare_exchange_strong.pass.cpp
M libcxx/test/std/atomics/atomics.ref/compare_exchange_weak.pass.cpp
M libcxx/test/std/atomics/atomics.ref/convert.pass.cpp
M libcxx/test/std/atomics/atomics.ref/ctor.pass.cpp
M libcxx/test/std/atomics/atomics.ref/deduction.pass.cpp
M libcxx/test/std/atomics/atomics.ref/exchange.pass.cpp
M libcxx/test/std/atomics/atomics.ref/fetch_add.pass.cpp
M libcxx/test/std/atomics/atomics.ref/fetch_and.pass.cpp
M libcxx/test/std/atomics/atomics.ref/fetch_or.pass.cpp
M libcxx/test/std/atomics/atomics.ref/fetch_sub.pass.cpp
M libcxx/test/std/atomics/atomics.ref/fetch_xor.pass.cpp
M libcxx/test/std/atomics/atomics.ref/increment_decrement.pass.cpp
M libcxx/test/std/atomics/atomics.ref/is_always_lock_free.pass.cpp
M libcxx/test/std/atomics/atomics.ref/load.pass.cpp
M libcxx/test/std/atomics/atomics.ref/notify_all.pass.cpp
M libcxx/test/std/atomics/atomics.ref/notify_one.pass.cpp
M libcxx/test/std/atomics/atomics.ref/operator_minus_equals.pass.cpp
M libcxx/test/std/atomics/atomics.ref/operator_plus_equals.pass.cpp
M libcxx/test/std/atomics/atomics.ref/requires-trivially-copyable.verify.cpp
M libcxx/test/std/atomics/atomics.ref/store.pass.cpp
M libcxx/test/std/atomics/atomics.ref/test_helper.h
M libcxx/test/std/atomics/atomics.ref/wait.pass.cpp
Log Message:
-----------
[lib++][test] Align `atomic_ref` underlying variable as required (#179780)
There is one pre-existing
`alignas(std::atomic_ref<T>::required_alignment)`:
https://github.com/llvm/llvm-project/blob/1f8a3f2fdbf51cbba4635ef05e8139039a105c2c/libcxx/test/std/atomics/atomics.ref/is_always_lock_free.pass.cpp#L54-L60
This PR adds more of them.
On 32-bit Windows ABI just creating a variable on stack is not enough,
so 32-bit MSVC fails these tests before the fix.
Commit: 8949c6d86b65f6a315cd295f955fdf2e4510f7c4
https://github.com/llvm/llvm-project/commit/8949c6d86b65f6a315cd295f955fdf2e4510f7c4
Author: Jack Styles <jack.styles at arm.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/openmp-taskloop-collapse.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[MLIR][OpenMP] Add Taskloop Collapse Support (#175924)
Following work completed in #174386 and #174623, this patch adds support
for collapse to Taskloop. Collapse allows for the user to compress
multiple loop nests into a single loop, and for this to work with
Taskloop, there needs to be some changes to how we process the loops,
and the tasks that run them.
This patch brings Taskloop equivalent to OpenMP 4.5 support for MLIR and
Flang.
Commit: 209ff8bf06dd12becd79c1ebb01612c021e19f6c
https://github.com/llvm/llvm-project/commit/209ff8bf06dd12becd79c1ebb01612c021e19f6c
Author: YunQiang Su <syq at debian.org>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
Log Message:
-----------
MIPS: Fix unsigned compare with zero in MipsSEInstrInfo::copyPhysReg (#179866)
SrcRegOff >= 0 is not needed at all for unsigned.
This fixes the warning:
```
llvm/lib/Target/Mips/MipsSEInstrInfo.cpp: In member function ‘virtual void llvm::MipsSEInstrInfo::copyPhysReg(llvm::MachineBasicBlock&, llvm::MachineBasicBlock::iterator, const llvm::DebugLoc&, llvm::Register, llvm::Register, bool, bool, bool) const’:
llvm/lib/Target/Mips/MipsSEInstrInfo.cpp:245:48: warning: comparison of unsigned expression in ‘>= 0’ is always true [-Wtype-limits]
245 | if (SrcRegOff == DestRegOff && SrcRegOff >= 0 && SrcRegOff <= 31)
| ~~~~~~~~~~^~~~
llvm/lib/Target/Mips/MipsSEInstrInfo.cpp:256:48: warning: comparison of unsigned expression in ‘>= 0’ is always true [-Wtype-limits]
256 | if (SrcRegOff == DestRegOff && SrcRegOff >= 0 && SrcRegOff <= 31)
```
Commit: 4f2db80f19a80856e1da08386194f00a7436bc0d
https://github.com/llvm/llvm-project/commit/4f2db80f19a80856e1da08386194f00a7436bc0d
Author: Matt <MattPD at users.noreply.github.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/lib/Lower/ConvertType.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/test/Lower/HLFIR/cray-pointers.f90
M flang/test/Lower/HLFIR/proc-pointer-comp-pass.f90
M flang/test/Lower/default-initialization.f90
A flang/test/Lower/derived-type-sequence-alias-assign.f90
M flang/test/Lower/equivalence-1.f90
M flang/test/Lower/polymorphic.f90
M flang/unittests/Optimizer/CMakeLists.txt
Log Message:
-----------
[flang] Use alias analysis in lowering record assignments (#176483)
Without alias analysis Flang assumes no aliasing in lowering record
assignments which can result in miscompilation of programs using
SEQUENCE types and EQUIVALENCE.
Represent `SEQUENCE` in fir.type.
For `SEQUENCE` types, use alias analysis to guard the fast path in
`genRecordAssignment`; otherwise fall back to element-wise expansion.
Update FIR FileCheck expectations
Add `FIRAnalysis` to `"flang/unittests/Optimizer/CMakeLists.txt"` to fix
the Windows x64 build failure (linker error).
Fixes #175246.
Co-authored-by: Matt P. Dziubinski <matt-p.dziubinski at hpe.com>
Commit: 5349c664fabd49f88c87e31bb3774f40bf938691
https://github.com/llvm/llvm-project/commit/5349c664fabd49f88c87e31bb3774f40bf938691
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/source/Plugins/Process/FreeBSDKernel/ProcessFreeBSDKernel.cpp
Log Message:
-----------
[lldb] [Process/FreeBSDKernel] List threads in correct order (#178306)
In FreeBSD, allproc is a prepend list and new processes are appended at
head. This results in reverse pid order, so we first need to order pid
incrementally then print threads according to the correct order.
Before:
```
Process 0 stopped
* thread #1: tid = 101866, 0xffffffff80bf9322 kernel`sched_switch(td=0xfffff8015882f780, flags=259) at sched_ule.c:2448:26, name = '(pid 12991) dtrace'
thread #2: tid = 101915, 0xffffffff80bf9322 kernel`sched_switch(td=0xfffff80158825780, flags=259) at sched_ule.c:2448:26, name = '(pid 11509) zsh'
thread #3: tid = 101942, 0xffffffff80bf9322 kernel`sched_switch(td=0xfffff80142599000, flags=259) at sched_ule.c:2448:26, name = '(pid 11504) ftcleanup'
thread #4: tid = 101545, 0xffffffff80bf9322 kernel`sched_switch(td=0xfffff80131898000, flags=259) at sched_ule.c:2448:26, name = '(pid 5599) zsh'
thread #5: tid = 100905, 0xffffffff80bf9322 kernel`sched_switch(td=0xfffff80131899000, flags=259) at sched_ule.c:2448:26, name = '(pid 5598) sshd-session'
thread #6: tid = 101693, 0xffffffff80bf9322 kernel`sched_switch(td=0xfffff8015886e780, flags=259) at sched_ule.c:2448:26, name = '(pid 5595) sshd-session'
thread #7: tid = 101626, 0xffffffff80bf9322 kernel`sched_switch(td=0xfffff801588be000, flags=259) at sched_ule.c:2448:26, name = '(pid 5592) sh'
...
```
After:
```
(lldb) thread list
Process 0 stopped
* thread #1: tid = 100000, 0xffffffff80bf9322 kernel`sched_switch(td=0xffffffff81abe840, flags=259) at sched_ule.c:2448:26, name = '(pid 0) kernel'
thread #2: tid = 100035, 0xffffffff80bf9322 kernel`sched_switch(td=0xfffff801052d9780, flags=259) at sched_ule.c:2448:26, name = '(pid 0) kernel/softirq_0'
thread #3: tid = 100036, 0xffffffff80bf9322 kernel`sched_switch(td=0xfffff801052d9000, flags=259) at sched_ule.c:2448:26, name = '(pid 0) kernel/softirq_1'
thread #4: tid = 100037, 0xffffffff80bf9322 kernel`sched_switch(td=0xfffff801052d8780, flags=259) at sched_ule.c:2448:26, name = '(pid 0) kernel/softirq_2'
thread #5: tid = 100038, 0xffffffff80bf9322 kernel`sched_switch(td=0xfffff801052d8000, flags=259) at sched_ule.c:2448:26, name = '(pid 0) kernel/softirq_3'
thread #6: tid = 100039, 0xffffffff80bf9322 kernel`sched_switch(td=0xfffff801052d7780, flags=259) at sched_ule.c:2448:26, name = '(pid 0) kernel/softirq_4'
thread #7: tid = 100040, 0xffffffff80bf9322 kernel`sched_switch(td=0xfffff801052d7000, flags=259) at sched_ule.c:2448:26, name = '(pid 0) kernel/softirq_5'
...
```
Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
Commit: 9e052debf0a357f81b0fe44d4eeccb4ccaf834ff
https://github.com/llvm/llvm-project/commit/9e052debf0a357f81b0fe44d4eeccb4ccaf834ff
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx512bwvl-arith.ll
Log Message:
-----------
[X86] lower1BitShuffle - recognise a blend shuffle that can lower to AND/MASKZ pattern (#179717)
Part of the missed-optimisation mentioned on #179630 - if the shuffle is
a blend with zero, then lower as a ISD::AND pattern
Commit: 84cdaa458a001927bcf8b61b3bed3c44c989f3e8
https://github.com/llvm/llvm-project/commit/84cdaa458a001927bcf8b61b3bed3c44c989f3e8
Author: Djordje Todorovic <djordje.todorovic at htecgroup.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/ObjCRuntime.h
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/FreeBSD.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
A clang/test/CodeGen/riscv-be-data-layout.c
A clang/test/Driver/Inputs/multilib_riscv_linux_sdk_be/lib/gcc/riscv64be-unknown-linux-gnu/7.2.0/crtbegin.o
A clang/test/Driver/Inputs/multilib_riscv_linux_sdk_be/lib/gcc/riscv64be-unknown-linux-gnu/7.2.0/lib32/ilp32/crtbegin.o
A clang/test/Driver/Inputs/multilib_riscv_linux_sdk_be/lib/gcc/riscv64be-unknown-linux-gnu/7.2.0/lib32/ilp32d/crtbegin.o
A clang/test/Driver/Inputs/multilib_riscv_linux_sdk_be/lib/gcc/riscv64be-unknown-linux-gnu/7.2.0/lib64/lp64/crtbegin.o
A clang/test/Driver/Inputs/multilib_riscv_linux_sdk_be/lib/gcc/riscv64be-unknown-linux-gnu/7.2.0/lib64/lp64d/crtbegin.o
A clang/test/Driver/Inputs/multilib_riscv_linux_sdk_be/riscv64be-unknown-linux-gnu/bin/ld
A clang/test/Driver/Inputs/multilib_riscv_linux_sdk_be/sysroot/lib/.keep
A clang/test/Driver/Inputs/multilib_riscv_linux_sdk_be/sysroot/lib32/ilp32/.keep
A clang/test/Driver/Inputs/multilib_riscv_linux_sdk_be/sysroot/lib32/ilp32d/.keep
A clang/test/Driver/Inputs/multilib_riscv_linux_sdk_be/sysroot/lib64/lp64/.keep
A clang/test/Driver/Inputs/multilib_riscv_linux_sdk_be/sysroot/lib64/lp64d/.keep
A clang/test/Driver/Inputs/multilib_riscv_linux_sdk_be/sysroot/usr/lib32/ilp32/.keep
A clang/test/Driver/Inputs/multilib_riscv_linux_sdk_be/sysroot/usr/lib32/ilp32d/.keep
A clang/test/Driver/Inputs/multilib_riscv_linux_sdk_be/sysroot/usr/lib64/lp64/.keep
A clang/test/Driver/Inputs/multilib_riscv_linux_sdk_be/sysroot/usr/lib64/lp64d/.keep
A clang/test/Driver/riscv-be.c
Log Message:
-----------
Reland "[clang][RISCV] Add big-endian RISC-V target support" (#177939)
The problem was using the `--rtlib=platform` without
`--unwindlib=platform` conflicts the default unwindlib with the
Fuchsia's configuration, and that is why the test failed.
Orignal PR: https://github.com/llvm/llvm-project/pull/165599
The fail was reported at:
https://github.com/llvm/llvm-project/pull/165599#issuecomment-3751750804
Co-authored-by: Djordje Todorovic <djordje.todorovic at syrmia.com>
Commit: 135ec4eb25331ed8ba59ae6390979d2f5154c35d
https://github.com/llvm/llvm-project/commit/135ec4eb25331ed8ba59ae6390979d2f5154c35d
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/funnel-shift.ll
Log Message:
-----------
[AArch64] Add test coverage for funnel shift with undef amount. NFC (#179888)
Precommit tests for #57256 showing inconsistencies between SDAG and
GISel for funnel shift with undef amount. GISel is wrong and should
match SDAG.
Commit: e9e714f43afbe375f64e9b5e03679a44f1853035
https://github.com/llvm/llvm-project/commit/e9e714f43afbe375f64e9b5e03679a44f1853035
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/test/Analysis/Checkers/WebKit/retain-ptr-ctor-adopt-use-arc.mm
M clang/test/Analysis/Checkers/WebKit/retain-ptr-ctor-adopt-use.mm
Log Message:
-----------
[alpha.webkit.RetainPtrCtorAdoptChecker] Don't treat calling (void)copy:(id) as a leak (#179713)
UIResponderStandardEditActions defines (void)copy:(id)sender but this
selector should not be treated as a copy operation since it's a "copy"
in the sense of application triggering copy & paste for the system
pasteboard.
---------
Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
Commit: f6e130682f12c063ffb7c354fd6cb6f3b0606b98
https://github.com/llvm/llvm-project/commit/f6e130682f12c063ffb7c354fd6cb6f3b0606b98
Author: keremsahn <keremsahin401 at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/include/llvm/Transforms/IPO/LowerTypeTests.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/test/CodeGen/X86/pr142937.ll
M llvm/test/Other/opt-bisect-new-pass-manager.ll
Log Message:
-----------
[SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (#179249)
Fixes #179125
Commit: 32cf9054283a68036c057cb8d472fbeadb38e8a2
https://github.com/llvm/llvm-project/commit/32cf9054283a68036c057cb8d472fbeadb38e8a2
Author: Kshitij Paranjape <kshitijvparanjape at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/IR/AutoUpgrade.cpp
A llvm/test/Verifier/issue176674.ll
A llvm/test/Verifier/issue176674_1.ll
A llvm/test/Verifier/issue176674_2.ll
Log Message:
-----------
[AutoUpgrade] Handle invalid x86 intrinsics (#179374)
Fixes #176674
Continuation of PR #177606.
Commit: ad86f7dda3e0bda4f58650c2df1111aef0c57fcf
https://github.com/llvm/llvm-project/commit/ad86f7dda3e0bda4f58650c2df1111aef0c57fcf
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/sve-mask-partition.ll
Log Message:
-----------
[AArch64] Use brk{a,b} for a lane mask from cttz.elts (#178674)
cttz.elts is usually lowered (for SVE) to a brkb followed by a cntp. If
we then want a mask based on that (say, for early exit masking) then we
would use a whilelo from 0 to the result of cntp. But that just gives us
the same mask as the initial brkb, so we can just remove the cntp and
the whilelo.
Brka matches the extra +1 in the pattern.
Commit: 205ee34317c0fbc97dac39608e2cca414c2d8491
https://github.com/llvm/llvm-project/commit/205ee34317c0fbc97dac39608e2cca414c2d8491
Author: Sunil Shrestha <92886399+sshrestha-aa at users.noreply.github.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
A mlir/test/Target/LLVMIR/omptarget-teams-distribute-reduction-array-descriptor.mlir
Log Message:
-----------
[flang][openmp] Fix GPU byref reduction descriptor initialization (#178934)
When generating GPU reduction code for arrays passed by reference, only
the base_ptr field was initialized in the shuffled descriptor, leaving
extent, stride, and rank fields uninitialized. This caused garbage
metadata to be passed to user reduction combiners, resulting in
incorrect iteration bounds and crashes on GPU targets.
Fix by copying the entire source descriptor and then updating the
base_ptr to point to thread-private storage. This preserves all metadata
(extents, strides, rank) while correctly pointing to the shuffled data
location.
The fix applies to three reduction helper functions:
- _omp_reduction_shuffle_and_reduce_func (warp-level shuffle)
- _omp_reduction_list_to_global_reduce_func (block-to-global)
- _omp_reduction_global_to_list_copy_func (global-to-block)
Fixes multi-dimensional array reductions on GPU target regions with
teams distribute parallel for directives.
Co-authored-by: Sunil Shrestha <sshrestha at pe28vega.hpc.amslabs.hpecorp.net>
Commit: c9863ceacc085c0268896490325e79f485d05a32
https://github.com/llvm/llvm-project/commit/c9863ceacc085c0268896490325e79f485d05a32
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M libcxx/include/__memory/allocator_traits.h
Log Message:
-----------
[libc++] Specialize allocator_traits for std::allocator (#160278)
This reduces the time to instantiate `allocator_traits<allocator<T>>`.
Commit: 0bf41e3d7a9ddf69e29103781f1a6c699585ed54
https://github.com/llvm/llvm-project/commit/0bf41e3d7a9ddf69e29103781f1a6c699585ed54
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
R libcxx/test/benchmarks/algorithms/make_heap.bench.cpp
R libcxx/test/benchmarks/algorithms/ranges_make_heap.bench.cpp
R libcxx/test/benchmarks/algorithms/ranges_pop_heap.bench.cpp
R libcxx/test/benchmarks/algorithms/ranges_push_heap.bench.cpp
A libcxx/test/benchmarks/algorithms/sorting/make_heap.bench.cpp
Log Message:
-----------
[libc++] Rewrite the std::make_heap benchmark (#178696)
This rewrites the `make_heap` benchmark to make it significantly faster
to run. In my test it saves ~10 minutes.
This patch also drops `ranges::` heap benchmarks, since we've decided to
remove `ranges::` benchmarks if there is a `std::` equivalent.
Commit: b0827f3b362738bf148a4b11a3a1c1c420a08387
https://github.com/llvm/llvm-project/commit/b0827f3b362738bf148a4b11a3a1c1c420a08387
Author: Acim Maravic <Acim.Maravic at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fpext-free.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
Log Message:
-----------
[LLVM] Select fma_mix for v_cvt_f32_f16 and v_add_f32/v_mul_f32 (#160151)
Commit: 9758847fea7fec9bb405b3cf31cbdc137b0e6749
https://github.com/llvm/llvm-project/commit/9758847fea7fec9bb405b3cf31cbdc137b0e6749
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/lib/Lower/ConvertType.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/test/Lower/HLFIR/cray-pointers.f90
M flang/test/Lower/HLFIR/proc-pointer-comp-pass.f90
M flang/test/Lower/default-initialization.f90
R flang/test/Lower/derived-type-sequence-alias-assign.f90
M flang/test/Lower/equivalence-1.f90
M flang/test/Lower/polymorphic.f90
M flang/unittests/Optimizer/CMakeLists.txt
Log Message:
-----------
Revert "[flang] Use alias analysis in lowering record assignments" (#179901)
Reverts llvm/llvm-project#176483
Breaks several build bots, e.g.,
https://lab.llvm.org/buildbot/#/builders/203/builds/36407
Commit: fc0c70735802ac449a08bdafd24106450ac51fde
https://github.com/llvm/llvm-project/commit/fc0c70735802ac449a08bdafd24106450ac51fde
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
Log Message:
-----------
[NFC][LLVM][CodeGen][SVE] Restructure urshr related PatFrags. (#170521)
Commit: 3e7d47d6b510b2ed3c0eea7992ad9df6907c1a19
https://github.com/llvm/llvm-project/commit/3e7d47d6b510b2ed3c0eea7992ad9df6907c1a19
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
Log Message:
-----------
FunctionAttrs: Remove redundant cast to Instruction (#179907)
No point in casting to Instruction before casting to CallBase.
Commit: ed4df0a11a9967b5ad2c99268838a56d482c7527
https://github.com/llvm/llvm-project/commit/ed4df0a11a9967b5ad2c99268838a56d482c7527
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.h
Log Message:
-----------
[lldb][ClangUserExpression][NFC] Move diagnostic fixup into helper function
Will help once we do more diagnostic fixups.
Commit: d1598c96e06ad8c21ff2d949d9c46e564f1b7191
https://github.com/llvm/llvm-project/commit/d1598c96e06ad8c21ff2d949d9c46e564f1b7191
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
A llvm/test/CodeGen/ARM/build-attributes-module.ll
Log Message:
-----------
[ARM] Recognize abi tag module flags (#161306)
Recognize abi tag hints from frontend rather than from architecture and
options.
Frontend part: #161106.
Commit: bbc4a21c9fec6b3659dd684a8c423cd1a508f417
https://github.com/llvm/llvm-project/commit/bbc4a21c9fec6b3659dd684a8c423cd1a508f417
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
A clang/test/CodeGen/ARM/build-attributes.c
M clang/test/CodeGen/ubsan-function-sugared.cpp
M clang/test/CodeGen/ubsan-function.cpp
Log Message:
-----------
[ARM][clang] Add some build attributes support (#161106)
"unsafe-fp-math" and related function attribites will be removed in
future, let frontend generate some hints for ARM backend to generate ABI
tags.
Commit: 92c26bb1a57b5f8682b0fb21b8acfc32951cb67e
https://github.com/llvm/llvm-project/commit/92c26bb1a57b5f8682b0fb21b8acfc32951cb67e
Author: Valeriy Savchenko <vsavchenko at apple.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/AArch64/fold-equivalent-reduction-cmp.ll
Log Message:
-----------
[VectorCombine] Fix crash in foldEquivalentReductionCmp on i1 vector (#179917)
Commit: 238ccd0223bfdd0749fe91e303523b476f5436a1
https://github.com/llvm/llvm-project/commit/238ccd0223bfdd0749fe91e303523b476f5436a1
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/include/llvm/ADT/ScopeExit.h
Log Message:
-----------
[llvm][ADT] Mark scope_exit contructors [[nodiscard]] (#179720)
Commit: 744827e22f1bfdd092d336cbcc34d65ad9abad51
https://github.com/llvm/llvm-project/commit/744827e22f1bfdd092d336cbcc34d65ad9abad51
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/pr179489.ll
Log Message:
-----------
[X86] Fixed truncated masked stores (#179853)
Fixes: #179489
Commit: 823e3e001724ca2e93ce410a675f3b538f8a74b3
https://github.com/llvm/llvm-project/commit/823e3e001724ca2e93ce410a675f3b538f8a74b3
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M libc/src/__support/math/acos.h
M libc/src/__support/math/acosf.h
M libc/src/__support/math/acosf16.h
M libc/src/__support/math/acosh_float_constants.h
M libc/src/__support/math/acoshf.h
M libc/src/__support/math/acoshf16.h
M libc/src/__support/math/acoshf_utils.h
M libc/src/__support/math/acospif16.h
M libc/src/__support/math/asin.h
M libc/src/__support/math/asin_utils.h
M libc/src/__support/math/asinf.h
M libc/src/__support/math/asinf16.h
M libc/src/__support/math/asinhf.h
M libc/src/__support/math/asinhf16.h
M libc/src/__support/math/atan.h
M libc/src/__support/math/atan2f.h
M libc/src/__support/math/atan2f128.h
M libc/src/__support/math/atan2f_float.h
M libc/src/__support/math/atan_utils.h
M libc/src/__support/math/atanf.h
M libc/src/__support/math/atanf16.h
M libc/src/__support/math/atanf_float.h
M libc/src/__support/math/atanhf.h
M libc/src/__support/math/atanhf16.h
M libc/src/__support/math/cbrt.h
M libc/src/__support/math/cbrtf.h
M libc/src/__support/math/cosf.h
M libc/src/__support/math/cosf16.h
M libc/src/__support/math/coshf.h
M libc/src/__support/math/coshf16.h
M libc/src/__support/math/cospif.h
M libc/src/__support/math/cospif16.h
M libc/src/__support/math/dfmaf128.h
M libc/src/__support/math/dfmal.h
M libc/src/__support/math/dsqrtl.h
M libc/src/__support/math/erff.h
M libc/src/__support/math/exp.h
M libc/src/__support/math/exp10.h
M libc/src/__support/math/exp10_float16_constants.h
M libc/src/__support/math/exp10f.h
M libc/src/__support/math/exp10f16.h
M libc/src/__support/math/exp10f16_utils.h
M libc/src/__support/math/exp10f_utils.h
M libc/src/__support/math/exp10m1f.h
M libc/src/__support/math/exp10m1f16.h
M libc/src/__support/math/exp2.h
M libc/src/__support/math/exp2f.h
M libc/src/__support/math/exp2f16.h
M libc/src/__support/math/exp2m1f.h
M libc/src/__support/math/exp2m1f16.h
M libc/src/__support/math/exp_constants.h
M libc/src/__support/math/exp_float_constants.h
M libc/src/__support/math/exp_utils.h
M libc/src/__support/math/expf.h
M libc/src/__support/math/expf16.h
M libc/src/__support/math/expf16_utils.h
M libc/src/__support/math/expm1.h
M libc/src/__support/math/expm1f.h
M libc/src/__support/math/expm1f16.h
M libc/src/__support/math/expxf16_utils.h
M libc/src/__support/math/f16fma.h
M libc/src/__support/math/f16fmal.h
M libc/src/__support/math/f16sqrt.h
M libc/src/__support/math/f16sqrtl.h
M libc/src/__support/math/frexpf.h
M libc/src/__support/math/frexpf128.h
M libc/src/__support/math/frexpf16.h
M libc/src/__support/math/fsqrt.h
M libc/src/__support/math/fsqrtf128.h
M libc/src/__support/math/fsqrtl.h
M libc/src/__support/math/hypotf.h
M libc/src/__support/math/ilogb.h
M libc/src/__support/math/ilogbf128.h
M libc/src/__support/math/ilogbl.h
M libc/src/__support/math/inv_trigf_utils.h
M libc/src/__support/math/ldexpf.h
M libc/src/__support/math/ldexpf128.h
M libc/src/__support/math/ldexpf16.h
M libc/src/__support/math/llogb.h
M libc/src/__support/math/llogbf.h
M libc/src/__support/math/llogbf128.h
M libc/src/__support/math/llogbf16.h
M libc/src/__support/math/log.h
M libc/src/__support/math/log10.h
M libc/src/__support/math/log1p.h
M libc/src/__support/math/log2.h
M libc/src/__support/math/logbf.h
M libc/src/__support/math/logbf128.h
M libc/src/__support/math/logbf16.h
M libc/src/__support/math/logf.h
M libc/src/__support/math/logf16.h
M libc/src/__support/math/range_reduction.h
M libc/src/__support/math/range_reduction_double_common.h
M libc/src/__support/math/range_reduction_double_fma.h
M libc/src/__support/math/range_reduction_double_nofma.h
M libc/src/__support/math/range_reduction_fma.h
M libc/src/__support/math/rsqrtf.h
M libc/src/__support/math/rsqrtf16.h
M libc/src/__support/math/sincos_eval.h
M libc/src/__support/math/sincosf.h
M libc/src/__support/math/sincosf16_utils.h
M libc/src/__support/math/sincosf_utils.h
M libc/src/__support/math/sinf.h
M libc/src/__support/math/sinf16.h
M libc/src/__support/math/sinhf.h
M libc/src/__support/math/sinhf16.h
M libc/src/__support/math/sinpif.h
M libc/src/__support/math/sqrt.h
M libc/src/__support/math/sqrtf.h
M libc/src/__support/math/sqrtf16.h
M libc/src/__support/math/tan.h
M libc/src/__support/math/tanf.h
M libc/src/math/generic/sinpif16.cpp
M libc/src/math/generic/tanf16.cpp
M libc/src/math/generic/tanpif.cpp
M libc/src/math/generic/tanpif16.cpp
Log Message:
-----------
[libc][math] Resolve size issues on baremetal and cleanup code. (#179707)
Commit: 2d106844e76846073cdec161c4ab2b33497719db
https://github.com/llvm/llvm-project/commit/2d106844e76846073cdec161c4ab2b33497719db
Author: Connector Switch <c8ef at outlook.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/include/__algorithm/ranges_fold.h
M libcxx/test/std/algorithms/alg.nonmodifying/alg.fold/left_folds.pass.cpp
Log Message:
-----------
[libcxx] Optimize `ranges::fold_left_with_iter` for segmented iterators (#177853)
Part of https://github.com/llvm/llvm-project/issues/102817.
This patch attempts to optimize the performance of
`ranges::fold_left_with_iter` for segmented iterators.
- before
```
# | rng::fold_left(vector<int>)/8 2.78 ns 2.78 ns 241953718
# | rng::fold_left(vector<int>)/32 12.2 ns 12.2 ns 57579851
# | rng::fold_left(vector<int>)/50 19.2 ns 19.2 ns 36487764
# | rng::fold_left(vector<int>)/8192 3226 ns 3226 ns 216811
# | rng::fold_left(vector<int>)/1048576 441842 ns 441839 ns 1592
# | rng::fold_left(deque<int>)/8 2.83 ns 2.83 ns 243888678
# | rng::fold_left(deque<int>)/32 16.6 ns 16.6 ns 42297458
# | rng::fold_left(deque<int>)/50 22.3 ns 22.3 ns 31387998
# | rng::fold_left(deque<int>)/8192 2492 ns 2492 ns 281637
# | rng::fold_left(deque<int>)/1048576 324936 ns 324936 ns 2154
# | rng::fold_left(list<int>)/8 2.54 ns 2.54 ns 275946635
# | rng::fold_left(list<int>)/32 16.2 ns 16.2 ns 42901634
# | rng::fold_left(list<int>)/50 54.7 ns 54.7 ns 12767450
# | rng::fold_left(list<int>)/8192 15154 ns 15154 ns 56744
# | rng::fold_left(list<int>)/1048576 4976906 ns 4976867 ns 158
```
- after
```
# | rng::fold_left(vector<int>)/8 2.74 ns 2.74 ns 255954900
# | rng::fold_left(vector<int>)/32 12.1 ns 12.1 ns 57843462
# | rng::fold_left(vector<int>)/50 19.2 ns 19.2 ns 36422594
# | rng::fold_left(vector<int>)/8192 3202 ns 3202 ns 218265
# | rng::fold_left(vector<int>)/1048576 435718 ns 435709 ns 1609
# | rng::fold_left(deque<int>)/8 2.52 ns 2.52 ns 277288254
# | rng::fold_left(deque<int>)/32 14.1 ns 14.1 ns 52244463
# | rng::fold_left(deque<int>)/50 16.2 ns 16.2 ns 43131857
# | rng::fold_left(deque<int>)/8192 1695 ns 1695 ns 415620
# | rng::fold_left(deque<int>)/1048576 277729 ns 277731 ns 2532
# | rng::fold_left(list<int>)/8 2.55 ns 2.55 ns 277025050
# | rng::fold_left(list<int>)/32 16.2 ns 16.2 ns 43058857
# | rng::fold_left(list<int>)/50 54.7 ns 54.7 ns 12705516
# | rng::fold_left(list<int>)/8192 15236 ns 15235 ns 56840
# | rng::fold_left(list<int>)/1048576 4827263 ns 4827147 ns 152
```
Commit: f0a4a91f1b49d77fe28d71363eed02dd8b9003e2
https://github.com/llvm/llvm-project/commit/f0a4a91f1b49d77fe28d71363eed02dd8b9003e2
Author: Abhina Sree <Abhina.Sreeskantharajan at ibm.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/CodeGen/ItaniumCXXABI.cpp
A clang/test/CodeGenCXX/zos-typename.cpp
Log Message:
-----------
[SystemZ][z/OS] Support both EBCDIC & ASCII form of type_info::name() (#179687)
On z/OS, typename is stored as 2 encodings: EBCDIC (default system
encoding) followed by ASCII.
Commit: f3bd1b9526c29dbd17186836e6161a88589dcbb7
https://github.com/llvm/llvm-project/commit/f3bd1b9526c29dbd17186836e6161a88589dcbb7
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
A llvm/test/CodeGen/SystemZ/zos-jumptable.ll
Log Message:
-----------
[SystemZ][z/OS] Use the text section for jump tables (#179793)
Jump tables are read only data, and the text section is the best choice
for them.
Commit: 96d2cb4145b7ae98dda5b4f7492cd6c116fe5ee7
https://github.com/llvm/llvm-project/commit/96d2cb4145b7ae98dda5b4f7492cd6c116fe5ee7
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILDataScalarization.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
R llvm/test/CodeGen/DirectX/scalar-bug-117273.ll
A llvm/test/CodeGen/DirectX/scalarize-static-array-of-float-vectors.ll
Log Message:
-----------
[LLVM][CodeGen][DirectX] Fix scalarisation when vector ConstantFP is used. (#172684)
When using -use-constant-fp-for-fixed-length-splat `splat (float C)`
becomes ConstantFP(C) rather than ConstantVector(C, C, C...).
Commit: 2502e3b7badcaf2d911410978bf8f8638b363854
https://github.com/llvm/llvm-project/commit/2502e3b7badcaf2d911410978bf8f8638b363854
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGCall.h
M clang/test/CodeGen/denormalfpmode-f32.c
M clang/test/CodeGen/denormalfpmode.c
M clang/test/CodeGenCUDA/flush-denormals.cu
M clang/test/CodeGenCUDA/link-builtin-bitcode-denormal-fp-mode.cu
M clang/test/CodeGenCUDA/propagate-attributes.cu
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/cl20-device-side-enqueue-attributes.cl
M llvm/docs/LangRef.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm-c/Core.h
M llvm/include/llvm/ADT/FloatingPointMode.h
M llvm/include/llvm/Analysis/ConstantFolding.h
M llvm/include/llvm/AsmParser/LLParser.h
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/IR/Attributes.td
M llvm/include/llvm/IR/Function.h
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/IR/Attributes.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/Function.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Support/FloatingPointMode.cpp
M llvm/lib/Target/AMDGPU/SIModeRegisterDefaults.cpp
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/test/Analysis/CostModel/AMDGPU/fdiv.ll
A llvm/test/Assembler/denormal_fpenv.ll
A llvm/test/Assembler/invalid_denormal_fpenv.ll
A llvm/test/Bitcode/auto_upgrade_denormal_fp_math.ll
M llvm/test/Bitcode/compatibility.ll
M llvm/test/CodeGen/AArch64/sqrt-fastmath.ll
M llvm/test/CodeGen/AArch64/stack-tagging-ex-1.ll
M llvm/test/CodeGen/AArch64/stack-tagging-untag-placement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-atomics-gfx942.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/madmix-constant-bus-violation.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-denormal.ll
M llvm/test/CodeGen/AMDGPU/atomics-hw-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/default-fp-mode.ll
M llvm/test/CodeGen/AMDGPU/fabs-known-signbit-combine-fast-fdiv-lowering.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fdiv-nofpexcept.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
M llvm/test/CodeGen/AMDGPU/fminnum.f64.ll
M llvm/test/CodeGen/AMDGPU/fminnum.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.legal.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx942.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fsub-as-fneg-src-modifier.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-atomics-fp-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global_atomic_optimizer_fp_rtn.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_optimizer_fp_no_rtn.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/hsa-fp-mode.ll
M llvm/test/CodeGen/AMDGPU/known-never-snan.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmul.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/madak.ll
M llvm/test/CodeGen/AMDGPU/madmk.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/omod.ll
M llvm/test/CodeGen/AMDGPU/operand-folding.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-dvgpr.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx950.ll
M llvm/test/CodeGen/AMDGPU/prevent-fmul-hoist-ir.ll
M llvm/test/CodeGen/AMDGPU/rcp-pattern.ll
M llvm/test/CodeGen/AMDGPU/rcp_iflag.ll
M llvm/test/CodeGen/AMDGPU/repeated-divisor.ll
M llvm/test/CodeGen/AMDGPU/rsq.f32-safe.ll
M llvm/test/CodeGen/AMDGPU/rsq.f32.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
M llvm/test/CodeGen/AMDGPU/udivrem24.ll
M llvm/test/CodeGen/AMDGPU/v_mac.ll
M llvm/test/CodeGen/AMDGPU/v_mac_f16.ll
M llvm/test/CodeGen/AMDGPU/v_madak_f16.ll
M llvm/test/CodeGen/ARM/build-attributes-fn-attr3.ll
M llvm/test/CodeGen/ARM/build-attributes-fn-attr4.ll
M llvm/test/CodeGen/ARM/build-attributes-fn-attr5.ll
M llvm/test/CodeGen/ARM/build-attributes-fn-attr6.ll
M llvm/test/CodeGen/ARM/clang-section.ll
M llvm/test/CodeGen/ARM/cmse-clear-float-bigend.mir
M llvm/test/CodeGen/ARM/softfp-constant-comparison.ll
M llvm/test/CodeGen/Generic/denormal-fp-math-cl-opt.ll
M llvm/test/CodeGen/NVPTX/div.ll
M llvm/test/CodeGen/NVPTX/f32x2-instructions.ll
M llvm/test/CodeGen/NVPTX/fast-math.ll
M llvm/test/CodeGen/NVPTX/fexp2.ll
M llvm/test/CodeGen/NVPTX/flog2.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70-instcombine.ll
M llvm/test/CodeGen/NVPTX/math-intrins.ll
M llvm/test/CodeGen/NVPTX/nvptx-prec-divf32-flag.ll
M llvm/test/CodeGen/NVPTX/rsqrt-opt.ll
M llvm/test/CodeGen/NVPTX/sqrt-approx.ll
M llvm/test/CodeGen/PowerPC/fmf-propagation.ll
M llvm/test/CodeGen/PowerPC/recipest.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/skip-vpt-debug.mir
M llvm/test/CodeGen/Thumb2/mve-vpt-2-blocks-1-pred.mir
M llvm/test/CodeGen/Thumb2/pacbti-m-outliner-4.ll
M llvm/test/CodeGen/X86/clang-section-coff.ll
M llvm/test/CodeGen/X86/is_fpclass.ll
M llvm/test/CodeGen/X86/pow.ll
M llvm/test/CodeGen/X86/sqrt-fastmath-mir.ll
M llvm/test/CodeGen/X86/sqrt-fastmath-tune.ll
M llvm/test/CodeGen/X86/sqrt-fastmath.ll
M llvm/test/DebugInfo/COFF/fortran-contained-proc.ll
M llvm/test/Instrumentation/NumericalStabilitySanitizer/basic.ll
M llvm/test/Instrumentation/NumericalStabilitySanitizer/non_float_store.ll
M llvm/test/Instrumentation/NumericalStabilitySanitizer/scalable_vector.ll
M llvm/test/Other/opt-override-denormal-fp-math-f32.ll
M llvm/test/Other/opt-override-denormal-fp-math-mixed.ll
M llvm/test/Other/opt-override-denormal-fp-math.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-simplify-cfg-CAS-block.ll
M llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-log.ll
M llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-rcp.ll
M llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-rsq.ll
M llvm/test/Transforms/Attributor/denormal-fp-math.ll
M llvm/test/Transforms/Attributor/nofpclass-canonicalize.ll
M llvm/test/Transforms/Attributor/nofpclass-fdiv.ll
M llvm/test/Transforms/Attributor/nofpclass-frem.ll
M llvm/test/Transforms/Attributor/nofpclass-frexp.ll
M llvm/test/Transforms/Attributor/nofpclass-ldexp.ll
M llvm/test/Transforms/Attributor/nofpclass-log.ll
M llvm/test/Transforms/Attributor/nofpclass-minimum-maximum.ll
M llvm/test/Transforms/Attributor/nofpclass-minimumnum-maximumnum.ll
M llvm/test/Transforms/Attributor/nofpclass-minnum-maxnum.ll
M llvm/test/Transforms/Attributor/nofpclass-nan-fmul.ll
M llvm/test/Transforms/Attributor/nofpclass-powi.ll
M llvm/test/Transforms/Attributor/nofpclass-sqrt.ll
M llvm/test/Transforms/Attributor/nofpclass.ll
M llvm/test/Transforms/Attributor/reduced/register_benchmark_test.ll
M llvm/test/Transforms/EarlyCSE/cannot-be-negative-zero-assert.ll
M llvm/test/Transforms/IndVarSimplify/addrec_no_exec_on_every_iteration.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/Transforms/Inline/AMDGPU/inline-denormal-fp-math.ll
M llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
M llvm/test/Transforms/InstCombine/combine-is.fpclass-and-fcmp.ll
M llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll
M llvm/test/Transforms/InstCombine/fcmp-denormals-are-zero.ll
M llvm/test/Transforms/InstCombine/fcmp.ll
M llvm/test/Transforms/InstCombine/fmod.ll
M llvm/test/Transforms/InstCombine/is_fpclass.ll
M llvm/test/Transforms/InstCombine/log-to-intrinsic.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-canonicalize.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fadd.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fdiv.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fmul.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fsub.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-log.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-maximum.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-maximumnum.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-maxnum.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-minimum.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-minimumnum.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-minnum.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-sqrt.ll
M llvm/test/Transforms/InstSimplify/canonicalize.ll
M llvm/test/Transforms/InstSimplify/constant-fold-fp-denormal.ll
M llvm/test/Transforms/InstSimplify/floating-point-compare.ll
M llvm/test/Transforms/SCCP/float-denormal-simplification.ll
M llvm/test/Transforms/SCCP/no-fold-fcmp-dynamic-denormal-mode-issue114947.ll
R llvm/test/Verifier/denormal-fp-math.ll
A llvm/test/Verifier/denormal_fpenv.ll
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values_dbgrecords.ll
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values_dbgrecords.ll.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values_dbgrecords.ll.funcsig.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values_dbgrecords.ll.funcsig.globals.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values_dbgrecords.ll.funcsig.noglobals.expected
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/various_ir_values_dbgrecords.ll.funcsig.transitiveglobals.expected
M llvm/unittests/ADT/FloatingPointMode.cpp
M llvm/unittests/IR/AttributesTest.cpp
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/fp-math-function-attributes.mlir
Log Message:
-----------
IR: Promote "denormal-fp-math" to a first class attribute (#174293)
Convert "denormal-fp-math" and "denormal-fp-math-f32" into a first
class denormal_fpenv attribute. Previously the query for the effective
denormal mode involved two string attribute queries with parsing. I'm
introducing more uses of this, so it makes sense to convert this
to a more efficient encoding. The old representation was also awkward
since it was split across two separate attributes. The new encoding
just stores the default and float modes as bitfields, largely avoiding
the need to consider if the other mode is set.
The syntax in the common cases looks like this:
`denormal_fpenv(preservesign,preservesign)`
`denormal_fpenv(float: preservesign,preservesign)`
`denormal_fpenv(dynamic,dynamic float: preservesign,preservesign)`
I wasn't sure about reusing the float type name instead of adding a
new keyword. It's parsed as a type but only accepts float. I'm also
debating switching the name to subnormal to match the current
preferred IEEE terminology (also used by nofpclass and other
contexts).
This has a behavior change when using the command flag debug
options to set the denormal mode. The behavior of the flag
ignored functions with an explicit attribute set, per
the default and f32 version. Now that these are one attribute,
the flag logic can't distinguish which of the two components
were explicitly set on the function. Only one test appeared to
rely on this behavior, so I just avoided using the flags in it.
This also does not perform all the code cleanups this enables.
In particular the attributor handling could be cleaned up.
I also guessed at how to support this in MLIR. I followed
MemoryEffects as a reference; it appears bitfields are expanded
into arguments to attributes, so the representation there is
a bit uglier with the 2 2-element fields flattened into 4 arguments.
Commit: f002505940e9c3416cc22ae779ad2723d986bc35
https://github.com/llvm/llvm-project/commit/f002505940e9c3416cc22ae779ad2723d986bc35
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/test/API/tools/lldb-dap/stopped-events/TestDAP_stopped_events.py
M lldb/test/API/tools/lldb-dap/stopped-events/main.cpp
Log Message:
-----------
[lldb-dap] Fix flaky TestDAP_stopped_events.py (#179689)
We are waiting for both stopped event at once.
We may not get both events within the (0.25 seconds) time interval to
fetch more events. Retry with the `DEFAULT TIMEOUT` if we got one of the
event.
Increase the `EVENT_QUIET_PERIOD`'s value for ASAN mode
Fixes #179648
Commit: b9f3710c0e26be93dcbb38aa2d6845d7261ea102
https://github.com/llvm/llvm-project/commit/b9f3710c0e26be93dcbb38aa2d6845d7261ea102
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Passes.h
M clang/include/clang/CIR/Dialect/Passes.td
M clang/lib/CIR/Dialect/Transforms/CMakeLists.txt
M clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
A clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerModule.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerModule.h
M clang/lib/CIR/Dialect/Transforms/TargetLowering/TargetLoweringInfo.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/TargetLoweringInfo.h
M clang/lib/CIR/Lowering/CIRPasses.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/atomic-scoped.c
Log Message:
-----------
[CIR] Add TargetLowering pass (#179245)
This patch adds a new TargetLowering pass to the CIR pipeline. The new
pass is run immediately before CXXABILowering. This new pass does not
perform any heavy transformations yet -- for now it only converts sync
scopes attached to load and store operations according to the target
info, which was done in the LLVM lowering pass.
Related to #175968 .
Commit: 80569fefbafb61615d80576e4d512721f1e65752
https://github.com/llvm/llvm-project/commit/80569fefbafb61615d80576e4d512721f1e65752
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/include/llvm/ADT/FloatingPointMode.h
Log Message:
-----------
ADT: Mark DenormalMode comparison operators as constexpr (#179939)
Try to fix buildbot error with gcc.
Commit: 3ee7a2f62bb660d038a3d280787e348ec43d82b5
https://github.com/llvm/llvm-project/commit/3ee7a2f62bb660d038a3d280787e348ec43d82b5
Author: Matthew Devereau <matthew.devereau at arm.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/clmul-fixed.ll
M llvm/test/CodeGen/AArch64/clmul-scalable.ll
M llvm/test/CodeGen/AArch64/clmul.ll
Log Message:
-----------
Add clmul zext AArch64 lowering tests (#179641)
Commit: 05a2b146fbc2944507fd3570254d0e456dc2a795
https://github.com/llvm/llvm-project/commit/05a2b146fbc2944507fd3570254d0e456dc2a795
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/vplan-print-after-all.ll
Log Message:
-----------
[LV] Optimize FindLast recurrences to FindIV (NFCI). (#177870)
This patch restructures Find(First|Last)IV handling. Instead of
differentiating between FindLast, FindFirstIV and FindLastIV up front,
this patch simplifies the logic in IVDescriptor to just identify the
FindLast pattern up-front.
It then adds a new VPlan transformation to optimize FindLast reductions
to FindIV reductions if there is a suitable sentinel value.
Find(Last|First)IV recurrence kinds to a single FindIV kind.
This is simpler and more accurate, given selecting the first/last
induction of the final IV reduction is directly controlled by the
corresponding recurrence kind of the ComputeReductionResult.
The new structure also allows further optimizations, like vectorizing
FindLastIV with another boolean reduction that tracks if the condition
in the loop was ever true, if there is no suitable sentinel value.
PR: https://github.com/llvm/llvm-project/pull/177870
Commit: 4f3ba73896e46c8665d59460e5932dabad7977c1
https://github.com/llvm/llvm-project/commit/4f3ba73896e46c8665d59460e5932dabad7977c1
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Checker.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Loans.h
A clang/include/clang/Analysis/Analyses/LifetimeSafety/MovedLoans.h
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Analysis/LifetimeSafety/CMakeLists.txt
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/Dataflow.h
M clang/lib/Analysis/LifetimeSafety/Facts.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/LifetimeSafety.cpp
M clang/lib/Analysis/LifetimeSafety/LoanPropagation.cpp
A clang/lib/Analysis/LifetimeSafety/MovedLoans.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/Sema/warn-lifetime-safety-dangling-field.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Revisit tracking moved objects (#178670)
Improve lifetime safety analysis by tracking moved objects and providing
more precise warnings for potentially false positive cases.
- Added support for detecting moves in function calls with rvalue
reference parameters
- Added a new `MovedOriginFact` to track when objects are moved
- Modified the lifetime checker to detect when a loan's storage has been
moved
- Added new diagnostic messages that indicate when a warning might be a
false positive due to moved storage
- Added notes in diagnostics to show where objects were potentially
moved
Commit: e6560a3c5741612c26cce34275a07f65a90919aa
https://github.com/llvm/llvm-project/commit/e6560a3c5741612c26cce34275a07f65a90919aa
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/test/API/tools/lldb-dap/evaluate/TestDAP_evaluate.py
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/EvaluateRequestHandler.cpp
Log Message:
-----------
[lldb-dap] Allow evaluate requests without a frame context (#179667)
EvaluateRequests handler now uses the target's context if no valid
frameId is provided, enabling evaluation of
global variables without requiring a valid stack frame.
In repl mode it now uses the last `successful` variable or command
expression, if the provided user's expression is empty.
Try to evaluate the expression if the evaluation context is `Unknown`
Commit: 71653535064d3e15086165063bd0940042e7a2fb
https://github.com/llvm/llvm-project/commit/71653535064d3e15086165063bd0940042e7a2fb
Author: Alexander Kornienko <alexfh at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/multiple-result-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/multiple-result-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/struct-return.ll
Log Message:
-----------
Revert "[LoopVectorize] Support vectorization of overflow intrinsics" (#179819)
Reverts llvm/llvm-project#174835, which causes clang crashes.
See
https://github.com/llvm/llvm-project/pull/174835#issuecomment-3844233831
and https://github.com/llvm/llvm-project/issues/179671 for details.
Commit: 50e3d0cee541945f38fc234169390278c3ed967e
https://github.com/llvm/llvm-project/commit/50e3d0cee541945f38fc234169390278c3ed967e
Author: Soumik Kumar Basu <97104371+soumikiith at users.noreply.github.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
A flang/test/Driver/asm-error-fix.s
M flang/test/lit.cfg.py
M flang/tools/flang-driver/driver.cpp
Log Message:
-----------
[flang][driver] Improve diagnostic for assembly inputs
When an assembly file is passed to the Flang driver, it currently fails
with a confusing internal error mentioning the unsupported `-cc1as`
tool.
This update detects assembly inputs early in the driver and emits a
clear, user-facing diagnostic explaining that Flang does not support
assembly files as input. The logic is implemented in a small helper
function and is intentionally temporary, so it can be removed once Flang
gains support for assembling inputs.
Fixes: #173528
Commit: 37678036600c17b2e7a499092172350e486170a9
https://github.com/llvm/llvm-project/commit/37678036600c17b2e7a499092172350e486170a9
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/docs/index.rst
Log Message:
-----------
[lldb][docs] Add FreeBSD kernel debugging information (#179597)
Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
Commit: f384602c1cab795d3c72609b25beffdc8e6f74a7
https://github.com/llvm/llvm-project/commit/f384602c1cab795d3c72609b25beffdc8e6f74a7
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_i386.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.cpp
Log Message:
-----------
[lldb] [Process/Utility] Update code url for FreeBSD in comments (#178556)
FreeBSD has moved from svn to git. Use https://cgit.freebsd.org/src
instead as it is the source of truth. i386 and mips64 were no longer
supported as of FreeBSD 15 and 14, respectively, so link stable branch
instead of main branch. See [FreeBSD platforms
page](https://www.freebsd.org/platforms/).
---------
Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
Commit: 03190b06bbc1a011f364cb623c54b4794566c70c
https://github.com/llvm/llvm-project/commit/03190b06bbc1a011f364cb623c54b4794566c70c
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Analysis/LifetimeSafety/BUILD.gn
Log Message:
-----------
[gn build] Port 4f3ba73896e4
Commit: bfbbed1327842c2375081663de93515559dcd0e8
https://github.com/llvm/llvm-project/commit/bfbbed1327842c2375081663de93515559dcd0e8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/test/MC/RISCV/option-arch.s
Log Message:
-----------
[RISCV] Call updateCZceFeatureImplications from RISCVAsmParser::setFeatureBits. (#179870)
Commit: 41de4b1c6fb86cc09079c9e345f4cc5000c373b4
https://github.com/llvm/llvm-project/commit/41de4b1c6fb86cc09079c9e345f4cc5000c373b4
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CoreEngine.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
Log Message:
-----------
[NFC][analyzer] Cleanup dead code around NodeBuilder (#179711)
As I was trying to understand the class `NodeBuilder` and its
subclasses, I wasted a few hours on studying dead or needlessly
complicated code. I'm creating this patch to ensure that others in the
future won't need to bother with this cruft.
This commit eliminates three deficiencies:
- (Small change:) In a constructor of `StmtNodeBuilder` I switched to
using the `takeNodes()` overload which accepts an `ExplodedNodeSet`
(instead of manually iterating).
- The `Finalized` attribute of NodeBuilder was completely irrelevant (it
was always initialized to `true`).
- The "main" feature of `NodeBuilderWithSinks` was that it gathered the
generated sink nodes into a set, but this was never actually used. As
the only other feature (storing a `ProgramPoint` in a data member) was
very trivial, I replaced this class with a plain `NodeBuilder` in the
only location that used it.
Commit: 549172139cf547c3fcaa5d52bd70a55ffc0db286
https://github.com/llvm/llvm-project/commit/549172139cf547c3fcaa5d52bd70a55ffc0db286
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M .github/workflows/release-asset-audit.yml
Log Message:
-----------
workflows/release-asset-audit: Split workflow into two jobs (#179833)
This way we can assign an environment to the job that uses the
ISSUE_SUBSCRIBER_TOKEN secret.
Commit: 427bb1cc1b09ea68b8a13a667810681ba4074f6b
https://github.com/llvm/llvm-project/commit/427bb1cc1b09ea68b8a13a667810681ba4074f6b
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/docs/index.rst
M lldb/source/Plugins/Process/FreeBSD/CMakeLists.txt
M lldb/source/Plugins/Process/FreeBSD/NativeProcessFreeBSD.cpp
M lldb/source/Plugins/Process/FreeBSD/NativeProcessFreeBSD.h
R lldb/source/Plugins/Process/FreeBSD/NativeRegisterContextFreeBSD_mips64.cpp
R lldb/source/Plugins/Process/FreeBSD/NativeRegisterContextFreeBSD_mips64.h
M lldb/source/Plugins/Process/Utility/CMakeLists.txt
R lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.cpp
R lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.h
M lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb] Remove mips64 support for FreeBSD (#179582)
The last FreeBSD version supporting mips64 is FreeBSD 13 which will be
EOLed on April 30th. LLVM 23.1.0 release is expected to be August 25th
according to the LLVM calendar. The usage of mips64 is less noticeable
so it's hard to know if it is properly working, and even if it works, it
is hard to test new features on FreeBSD mips64.
Thus, remove support for mips64 on FreeBSD.
---------
Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
Commit: 82839728377ab78ba74e088f7e33094b016cfe32
https://github.com/llvm/llvm-project/commit/82839728377ab78ba74e088f7e33094b016cfe32
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Process/Utility/BUILD.gn
Log Message:
-----------
[gn build] Port 427bb1cc1b09
Commit: e0c2cc7ed0d4b0c1a567aa7b69d84f8792f8a703
https://github.com/llvm/llvm-project/commit/e0c2cc7ed0d4b0c1a567aa7b69d84f8792f8a703
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Add buffer store byte/short RegBankLegalize rules (#179367)
Commit: d737229efdb3f3949f9c483d256eea2b946808a9
https://github.com/llvm/llvm-project/commit/d737229efdb3f3949f9c483d256eea2b946808a9
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/ExpandIRInsts.cpp
A llvm/test/Transforms/ExpandIRInsts/X86/expand-int-convert-small.ll
Log Message:
-----------
[ExpandIRInsts] Allow int bw == float bw in itofp (#179943)
I don't think anything here requires the integer bit width to be
strictly larger. It's fine if it's the same (in which case some zexts
just go away).
Add tests on half + i32 that can be verified by alive2. Note that half
is handled via float, so the minimum supported type is i32 rather than
i16.
Proof (uitofp): https://alive2.llvm.org/ce/z/CsMfkU
Proof (sitofp): https://alive2.llvm.org/ce/z/jzuxyt
Commit: 25b4609b55135f1fc0e6deffebc3a2f948785d4a
https://github.com/llvm/llvm-project/commit/25b4609b55135f1fc0e6deffebc3a2f948785d4a
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M flang/test/Lower/dummy-procedure-character.f90
M flang/test/Lower/dummy-procedure-in-entry.f90
M flang/test/Lower/dummy-procedure.f90
M flang/test/Lower/equivalence-1.f90
M flang/test/Lower/equivalence-2.f90
Log Message:
-----------
[flang][NFC] Converted five tests from old lowering to new lowering (part 14) (#179852)
Tests converted from test/Lower: dummy-procedure-character.f90,
dummy-procedure-in-entry.f90, dummy-procedure.f90, equivalence-1.f90,
equivalence-2.f90
Commit: d3fb3c5d36f72fd999bfc17e7d6ced235f5fd074
https://github.com/llvm/llvm-project/commit/d3fb3c5d36f72fd999bfc17e7d6ced235f5fd074
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
Log Message:
-----------
[GISel][CallLowering] Keep IR types longer (#179946)
GISel CallLowering currently does a Type -> EVT -> Type roundtrip early
on when populating ArgInfo in splitToValueType(). This is a bit odd as
this structure operates at the IR Type level. Keep the original type
there and only convert to EVT when performing assignments.
Commit: ddda8d7d259826e9a686469d531787ea223d727d
https://github.com/llvm/llvm-project/commit/ddda8d7d259826e9a686469d531787ea223d727d
Author: Yanzuo Liu <zwuis at outlook.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/cxx20.cpp
Log Message:
-----------
[clang][bytecode] Fix reading union template parameter object (#179899)
Before this patch, reading union template parameter object will trigger
diagnostics saying it's not initialized. This patch fixes this issue.
Reading union template parameter with no active fields, class type
fields, or bit-fields is handled as a drive-by.
AI usage: The implementation was generated by AI and modified by me
afterwards.
Assisted-by: GPT-5.2
---------
Co-authored-by: Timm Baeder <tbaeder at redhat.com>
Commit: f5175208cc2d57fbb8fc06dc5d2cd707dceca1a8
https://github.com/llvm/llvm-project/commit/f5175208cc2d57fbb8fc06dc5d2cd707dceca1a8
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[ProfCheck] Add ExpandIRInsts test to xfail list
We have not finished fixing all the ExpandIRInsts tests for the
profcheck configuration (PRs are in flight), so disable for now until
those land so it is easier to catch more regressions.
Commit: 8dbb9f66e8b14a8a06f1873a2c1b7dce366ed2d6
https://github.com/llvm/llvm-project/commit/8dbb9f66e8b14a8a06f1873a2c1b7dce366ed2d6
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/loadcombine.ll
M llvm/test/Transforms/SLPVectorizer/X86/bad-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
Log Message:
-----------
[SLP]Remove LoadCombine workaround after handling of the copyables
LoadCombine pattern handling was added as a workaround for the cases,
where the SLP vectorizer could not vectorize the code effectively. With
the copyables support, it can handle it directly.
Also, patch adds support for scalar loads[ + bswap] pattern for byte
sized loads (+ reverse bytes for bswap)
Reviewers: RKSimon, hiraditya
Pull Request: https://github.com/llvm/llvm-project/pull/174205
Commit: 10910771e86b52a0565186510aad53ed84ad5982
https://github.com/llvm/llvm-project/commit/10910771e86b52a0565186510aad53ed84ad5982
Author: Zorojuro <sawantsukumar at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/f16fmaf128.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/f16fmaf128.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/f16fmaf128.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor f16fmaf128 to Header Only (#177850)
Closes #175318
In preparation for:
https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: 4d27530c69fdd692a69dc905f50b076d336da11a
https://github.com/llvm/llvm-project/commit/4d27530c69fdd692a69dc905f50b076d336da11a
Author: Yury Plyakhin <yury.plyakhin at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/test/Driver/linker-wrapper-image.c
M llvm/include/llvm/Object/OffloadBinary.h
M llvm/include/llvm/ObjectYAML/OffloadYAML.h
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
M llvm/lib/Object/Binary.cpp
M llvm/lib/Object/OffloadBinary.cpp
M llvm/lib/ObjectYAML/OffloadEmitter.cpp
M llvm/lib/ObjectYAML/OffloadYAML.cpp
A llvm/test/ObjectYAML/Offload/malformed-entries-count.yaml
R llvm/test/ObjectYAML/Offload/malformed-entry-size.yaml
M llvm/test/ObjectYAML/Offload/malformed-offset.yaml
M llvm/test/ObjectYAML/Offload/malformed-version.yaml
M llvm/test/ObjectYAML/Offload/multiple_members.yaml
M llvm/tools/obj2yaml/offload2yaml.cpp
M llvm/unittests/Object/OffloadingTest.cpp
Log Message:
-----------
[Offloading] Offload Binary Format V2: Support Multiple Entries (#169425)
This PR updates the OffloadBinary format from version 1 to version 2,
enabling support for multiple offloading entries in a single binary.
This allows combining multiple device images into a single binary with
common global metadata while maintaining backwards compatibility with
version 1 binaries.
# Key Changes
## Binary Format Enhancements
**Version 2 Format Changes:**
- Changed from single-entry to multi-entry design
- Updated `Header` structure:
- Renamed `EntryOffset` → `EntriesOffset` (offset to entries array)
- Renamed `EntrySize` → `EntriesCount` (number of entries)
- Added `StringEntry::ValueSize` field to support explicit string value
sizes (enables non-null-terminated strings)
- Introduced `OffloadEntryFlags` enum with `OIF_Metadata` flag for
metadata-only entries (entries without binary images)
**API Changes:**
- `OffloadBinary::create()` now returns
`Expected<SmallVector<std::unique_ptr<OffloadBinary>>>` instead of
single binary
- Added optional `Index` parameter to extract specific entry:
`create(Buffer, std::optional<uint64_t> Index)`
- `OffloadBinary::write()` now accepts `ArrayRef<OffloadingImage>`
instead of single image
- Added `OffloadBinary::extractHeader()` for header extraction
**Memory Management:**
- Implemented `SharedMemoryBuffer` class to enable memory sharing across
multiple `OffloadBinary` instances from the same file
- Multiple entries from a single serialized binary share the underlying
buffer
## Testing
**Unit Tests (`unittests/Object/OffloadingTest.cpp`):**
- `checkMultiEntryBinaryExtraction`: Tests extracting all entries from a
multi-entry binary
- `checkIndexBasedExtraction`: Tests extracting specific entries by
index, including out-of-bounds validation
- `checkEdgeCases`: Tests edge cases including:
- Empty string metadata
- Empty image data
- Large string values (4KB)
**Other Tests:**
- Updated `test/ObjectYAML/Offload/multiple_members.yaml` to include
metadata-only entry
---------
Co-authored-by: Joseph Huber <huberjn at outlook.com>
Commit: 0c8b435c57f6079aa9fd2554859a305a77eb8c36
https://github.com/llvm/llvm-project/commit/0c8b435c57f6079aa9fd2554859a305a77eb8c36
Author: Henry Linjamäki <henry.linjamaki at tuni.fi>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/HIPSPV.h
A clang/test/Driver/Inputs/hipspv/lib/hip-device-lib/hipspv-spirv64-unknown-chipstar.bc
M clang/test/Driver/hipspv-device-libs.hip
M clang/test/Driver/hipspv-link-static-library.hip
M clang/test/Driver/hipspv-pass-plugin.hip
A clang/test/Driver/hipspv-toolchain-rdc-separate.hip
M clang/test/Driver/hipspv-toolchain-rdc.hip
M clang/test/Driver/hipspv-toolchain.hip
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Log Message:
-----------
[Clang][retry 2] Lift HIPSPV onto the new offload driver (#179902)
Update HIPSPV toolchain to support `--offload-new-driver`. Additionally,
tailor llvm-spirv invocation for
[chipStar](github.com/CHIP-SPV/chipStar) via `spirv64-*-chipstar`
offload triple.
AFAICT, all the relevant test failures in the previous PR (#178664) came
from tests involving `-Xoffload-compiler ‘-###’` in their RUN
directives. I have reworked those tests in this PR.
Commit: f513f44bc6c00320c87f6d8e0c9fa09c9f98ae21
https://github.com/llvm/llvm-project/commit/f513f44bc6c00320c87f6d8e0c9fa09c9f98ae21
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/test/Transforms/Inline/2007-04-15-InlineEH.ll
M llvm/test/Transforms/Inline/2007-06-25-WeakInline.ll
M llvm/test/Transforms/Inline/2007-12-19-InlineNoUnwind.ll
M llvm/test/Transforms/Inline/2008-09-02-NoInline.ll
M llvm/test/Transforms/Inline/2009-01-08-NoInlineDynamicAlloca.ll
M llvm/test/Transforms/Inline/AArch64/inline-target-attr.ll
M llvm/test/Transforms/Inline/AArch64/switch.ll
M llvm/test/Transforms/Inline/AMDGPU/inline-amdgpu-dx10-clamp.ll
M llvm/test/Transforms/Inline/AMDGPU/inline-amdgpu-ieee.ll
M llvm/test/Transforms/Inline/AMDGPU/inline-atomicrmw-md-preserve.ll
M llvm/test/Transforms/Inline/AMDGPU/inline-denormal-fp-math.ll
M llvm/test/Transforms/Inline/AMDGPU/inline-target-cpu.ll
M llvm/test/Transforms/Inline/AMDGPU/inline-target-feature-sram-ecc.ll
M llvm/test/Transforms/Inline/AMDGPU/inline-target-feature-xnack.ll
M llvm/test/Transforms/Inline/ARM/inline-dotprod.ll
M llvm/test/Transforms/Inline/ARM/inline-target-attr.ll
M llvm/test/Transforms/Inline/LoongArch/inline-target-features.ll
M llvm/test/Transforms/Inline/PowerPC/inline-target-attr.ll
M llvm/test/Transforms/Inline/RISCV/inline-target-features.ll
M llvm/test/Transforms/Inline/SystemZ/inline-target-attr.ll
M llvm/test/Transforms/Inline/X86/extractvalue.ll
M llvm/test/Transforms/Inline/X86/inline-target-attr.ll
M llvm/test/Transforms/Inline/X86/insertvalue.ll
M llvm/test/Transforms/Inline/X86/switch.ll
M llvm/test/Transforms/Inline/access-attributes-prop.ll
M llvm/test/Transforms/Inline/alloca-bonus.ll
M llvm/test/Transforms/Inline/alloca-dbgdeclare.ll
M llvm/test/Transforms/Inline/alloca_test.ll
M llvm/test/Transforms/Inline/array-alloca.ll
M llvm/test/Transforms/Inline/assumptions-from-callsite-attrs.ll
M llvm/test/Transforms/Inline/attributes.ll
M llvm/test/Transforms/Inline/blockaddress.ll
M llvm/test/Transforms/Inline/byval.ll
M llvm/test/Transforms/Inline/byval_lifetime.ll
M llvm/test/Transforms/Inline/call-site-attrs.ll
M llvm/test/Transforms/Inline/callbr.ll
M llvm/test/Transforms/Inline/casts.ll
M llvm/test/Transforms/Inline/comdat-ipo.ll
M llvm/test/Transforms/Inline/crash-lifetime-marker.ll
M llvm/test/Transforms/Inline/frameescape.ll
M llvm/test/Transforms/Inline/ignore-debug-info.ll
M llvm/test/Transforms/Inline/inline-assume.ll
M llvm/test/Transforms/Inline/inline-byval-bonus.ll
M llvm/test/Transforms/Inline/inline-call-with-asm-call.ll
M llvm/test/Transforms/Inline/inline-constexpr-addrspacecast-argument.ll
M llvm/test/Transforms/Inline/inline-deferred-instsimplify.ll
M llvm/test/Transforms/Inline/inline-drop-attributes.ll
M llvm/test/Transforms/Inline/inline-fast-math-flags.ll
M llvm/test/Transforms/Inline/inline-funclets.ll
M llvm/test/Transforms/Inline/inline-invoke-with-asm-call.ll
M llvm/test/Transforms/Inline/inline-no-builtin-compatible.ll
M llvm/test/Transforms/Inline/inline-vla.ll
M llvm/test/Transforms/Inline/inline_cleanup.ll
M llvm/test/Transforms/Inline/inline_constprop.ll
M llvm/test/Transforms/Inline/inline_dbg_declare.ll
M llvm/test/Transforms/Inline/inline_invoke.ll
M llvm/test/Transforms/Inline/inline_prune.ll
M llvm/test/Transforms/Inline/inline_returns_twice.ll
M llvm/test/Transforms/Inline/inline_ssp.ll
M llvm/test/Transforms/Inline/inline_unreachable-2.ll
M llvm/test/Transforms/Inline/inline_unreachable.ll
M llvm/test/Transforms/Inline/invoke-cleanup.ll
M llvm/test/Transforms/Inline/invoke-cost.ll
M llvm/test/Transforms/Inline/invoke_test-1.ll
M llvm/test/Transforms/Inline/invoke_test-3.ll
M llvm/test/Transforms/Inline/local-as-metadata-undominated-use.ll
M llvm/test/Transforms/Inline/nested-inline.ll
M llvm/test/Transforms/Inline/noinline-recursive-fn.ll
M llvm/test/Transforms/Inline/nonnull.ll
M llvm/test/Transforms/Inline/parallel-loop-md.ll
M llvm/test/Transforms/Inline/pr21206.ll
M llvm/test/Transforms/Inline/pr26698.ll
M llvm/test/Transforms/Inline/profile-meta.ll
M llvm/test/Transforms/Inline/recursive.ll
M llvm/test/Transforms/Inline/ret_attr_align_and_noundef.ll
M llvm/test/Transforms/Inline/simplify-instruction-computeKnownFPClass-context.ll
M llvm/test/Transforms/Inline/switch.ll
M llvm/test/Transforms/Inline/vector-bonus.ll
M llvm/test/Transforms/Inline/vector-no-bonus.ll
M llvm/test/Transforms/Inline/zero-cost.ll
Log Message:
-----------
[Inline] Remove redundant run lines in tests (#179959)
625038d5d5f406385f44983ac2a442b20ad7b241 added NewPM CGSCC coverage to
all of the inliner tests. Now that the NewPM is the default for the
middle end, both check lines cover the same thing (with -passes="inline"
expanding to -passes="cgscc(inline)"). Given that, remove them to get
rid of the redundancy and make the tests run slightly faster (not
measured).
Commit: e92fdcda7647e1a75b55c89f14ac9b840f3062cb
https://github.com/llvm/llvm-project/commit/e92fdcda7647e1a75b55c89f14ac9b840f3062cb
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M libc/shared/math/f16fmaf128.h
Log Message:
-----------
[libc][math] Fix build failures from last refactor. (#179966)
Commit: a9adf7d1e316001f05d2f80477173d7f5ff44084
https://github.com/llvm/llvm-project/commit/a9adf7d1e316001f05d2f80477173d7f5ff44084
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CSEInfo.h
M llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
Log Message:
-----------
GlobalISel: Remove unused argument from CSEInfo (#179962)
Nothing uses this force recomputation.
Commit: 9ed7ba87c491de51cafb2d07bf549f5b1cc4e5ac
https://github.com/llvm/llvm-project/commit/9ed7ba87c491de51cafb2d07bf549f5b1cc4e5ac
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll
Log Message:
-----------
[RISCV] Remove redundant vand.vi with fpto*i to i1 (#179876)
If the source of an fpto*i doesn't fit in the destination type, the
result is poison. For i1 destinations, this means the result needs to be
0 or 1/-1, so we can just compare the result to 0 directly instead of
truncating.
The VP lowering for fpto*i already does this.
Commit: 63918f51aa9b0c32d817a8346130e791393b74a6
https://github.com/llvm/llvm-project/commit/63918f51aa9b0c32d817a8346130e791393b74a6
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/vmerge-peephole.mir
Log Message:
-----------
[RISCV] Fold vmerge into op with undef passthru by using vmerge's vl (#179862)
Currently we only fold an op into vmerge if we know the smaller of the
two vls, because we can't increase the vl.
However if the op's passthru is undef, then we can just use vmerge's vl
because the lanes past op's vl were undef anyway. We need to make sure
that the op doesn't access memory though. Other instructions where the
result depends on the VL should already be handled by the
RISCVII::elementsDependOnVL check below.
This is probably always profitable because even though we increase vl,
we remove a vmerge which needs to process vl elements anyway.
This removes some regressions in #179622.
Commit: 2dcd75eb4420c8a5af13b80a065c03689100c96f
https://github.com/llvm/llvm-project/commit/2dcd75eb4420c8a5af13b80a065c03689100c96f
Author: Vigneshwar Jayakumar <vigneshwar.jayakumar at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-atomics-gfx942.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/a-v-global-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/a-v-global-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx942.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/idemponent-atomics.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.large.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.small.mir
A llvm/test/CodeGen/AMDGPU/waitcnt-wbl2.ll
Log Message:
-----------
[AMDGPU] Fix missing waitcnt after buffer_wbl2 (#178316)
On GFX9, BUFFER_WBL2 is used to write back dirty cache lines and
requires an s_waitcnt vmcnt(0) afterwards to ensure completion.
This patch fixes by incrementing vmcnt for buffer_wbl2 instruction
---------
Co-authored-by: Jay Foad <jay.foad at gmail.com>
Commit: 35ada11f1b4b9ca51f8b07af4cc9a7aa3400028e
https://github.com/llvm/llvm-project/commit/35ada11f1b4b9ca51f8b07af4cc9a7aa3400028e
Author: John Harrison <harjohn at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_commands.py
Log Message:
-----------
[lldb-dap] Improving stability of TestDAP_launch_commands. (#179783)
Improving stability of the TestDAP_launch_commands test.
When collecting output for verifying 'stopCommands' we were not waiting
for the output to finish, which could cause issues if the test is
running very fast.
Commit: 722c2f022149a5fc971a2869e54ebb8fa387e574
https://github.com/llvm/llvm-project/commit/722c2f022149a5fc971a2869e54ebb8fa387e574
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/ExpandIRInsts.cpp
M llvm/test/Transforms/ExpandIRInsts/X86/expand-int-convert-small.ll
Log Message:
-----------
[ExpandIRInsts] Support int bw < float bw in itofp expansion (#179963)
Handle this case by extending the integer to a wider type. This can
probably be handled more optimally, but this is conservatively correct.
Proof: https://alive2.llvm.org/ce/z/0RwDO1
Commit: 3a084241248efd7d5259183cffae1d5b7057a54c
https://github.com/llvm/llvm-project/commit/3a084241248efd7d5259183cffae1d5b7057a54c
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
A llvm/test/CodeGen/SPIRV/llvm-used.ll
Log Message:
-----------
[SPIRV] Do not emit @llvm.used (#179498)
Extending the work from https://github.com/llvm/llvm-project/pull/162678
which skips `llvm.compiler.used`, we also need to skip processing of
`llvm.used`.
The OpenMP frontend puts an `addrspace(2)` variable in `llvm_used`, but
the `llvm.used` array type uses the generic AS `addrspace(4)` so there's
a `addrspacecast` from `2` to `4` inside the initalizer for `llvm.used`
which is illegal and errors in the backend.
There is
[discussion](https://github.com/llvm/llvm-project/pull/162678#issuecomment-3396735124)
in the above linked PR that the handing should be the same for
`llvm.used` and `llvm.compiler.used`, but `llvm.used` was not added to
minimize the scope of the PR.
This is required to use the OpenMP Device RTL with SPIR-V.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: 77740f55771339e5c5e5e266ff85d716b47717de
https://github.com/llvm/llvm-project/commit/77740f55771339e5c5e5e266ff85d716b47717de
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/include/clang/Analysis/Scalable/Serialization/SerializationFormat.h
A clang/include/clang/Analysis/Scalable/Serialization/SerializationFormatRegistry.h
M clang/lib/Analysis/Scalable/CMakeLists.txt
M clang/lib/Analysis/Scalable/Serialization/SerializationFormat.cpp
A clang/lib/Analysis/Scalable/Serialization/SerializationFormatRegistry.cpp
M clang/unittests/Analysis/Scalable/CMakeLists.txt
A clang/unittests/Analysis/Scalable/Registries/MockSerializationFormat.cpp
A clang/unittests/Analysis/Scalable/Registries/MockSerializationFormat.h
A clang/unittests/Analysis/Scalable/Registries/SerializationFormatRegistryTest.cpp
Log Message:
-----------
[clang][ssaf] Add SerializationFormatRegistry [1/2] (#179516)
Add a registry infrastructure for SerializationFormat implementations,
enabling registration and instantiation of different serialization
formats.
For example:
```c++
static SerializationFormatRegistry::Add<MyFormat>
RegisterFormat("MyFormat", "Description");
```
Formats can then be instantiated by name using `makeFormat()`.
The patch also updates the SerializationFormat base class to accept
FileSystem for virtualising reading inputs eg. by using file overlays in
the future.
Assisted-by: claude
rdar://169192127
Commit: 903a5ab93d03e806d4655c1447a5e7b1629bff89
https://github.com/llvm/llvm-project/commit/903a5ab93d03e806d4655c1447a5e7b1629bff89
Author: anjenner <161845516+anjenner at users.noreply.github.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fceil.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fexp2.mir
A llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ffloor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-flog2.mir
A llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-intrinsic-roundeven.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-intrinsic-trunc.mir
Log Message:
-----------
[AMDGPU] [GlobalISel] Add register bank legalize rules for G_FEXP2 (#179954)
Also G_INTRINSIC_TRUNC, G_INTRINSIC_ROUNDEVEN, G_FFLOOR, G_FCEIL, and
G_FLOG2.
Commit: e59e9fcd38a920516611fdd54fe656fca8406971
https://github.com/llvm/llvm-project/commit/e59e9fcd38a920516611fdd54fe656fca8406971
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/include/clang/Analysis/Scalable/Serialization/SerializationFormat.h
M clang/include/clang/Analysis/Scalable/Serialization/SerializationFormatRegistry.h
M clang/lib/Analysis/Scalable/Serialization/SerializationFormat.cpp
M clang/unittests/Analysis/Scalable/CMakeLists.txt
A clang/unittests/Analysis/Scalable/Registries/FancyAnalysisData.cpp
M clang/unittests/Analysis/Scalable/Registries/MockSerializationFormat.cpp
M clang/unittests/Analysis/Scalable/Registries/MockSerializationFormat.h
M clang/unittests/Analysis/Scalable/Registries/SerializationFormatRegistryTest.cpp
Log Message:
-----------
[clang][ssaf] Add FormatInfo sub-registry and tests [2/2] (#179517)
Add `FormatInfoEntry` template to support per-analysis-type
serialization within a `SerializationFormat`.
This allows to implement different formats for the different analyses in
a decoupled way.
For testing, this patch also implements the MockSerializationFormat
demonstrating the FormatInfo sub-registry pattern.
Assisted-by: claude
Depends on #179516
rdar://169192127
Commit: 18ecdbfe6c748b587420c60715a52e2762d91b42
https://github.com/llvm/llvm-project/commit/18ecdbfe6c748b587420c60715a52e2762d91b42
Author: Michael Platings <michael.platings at arm.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/test/Conversion/VectorToGPU/vector-to-mma-ops.mlir
Log Message:
-----------
[mlir][vector-to-gpu]: Lower transposed strided transfer_read
Add support for lowering vector.transfer_read to
gpu.subgroup_mma_load_matrix with transpose permutation_map
with non-minor dimensions e.g. (d0, d1, d2) -> (d2, d0)
Commit: 37aba1b5d49b2c43d36990ae537d0f65d491c247
https://github.com/llvm/llvm-project/commit/37aba1b5d49b2c43d36990ae537d0f65d491c247
Author: SiliconA-Z <gfunni234 at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/test/Analysis/CostModel/ARM/arith-overflow.ll
M llvm/test/CodeGen/ARM/select.ll
Log Message:
-----------
[ARM] Set operation action for UMULO and SMULO as Custom if not Thumb1 (#154253)
We should specify a custom lowering for SMULO and UMULO like we do for
AArch64, but only if not Thumb 1 obviously.
Commit: 94b39b524da7ecda448fcd1ec80190db15b7c497
https://github.com/llvm/llvm-project/commit/94b39b524da7ecda448fcd1ec80190db15b7c497
Author: Jinsong Ji <jinsong.ji at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/unittests/CAS/OnDiskCASLoggerTest.cpp
Log Message:
-----------
[NFC][CAS][Unittests] Pass env for MultiProcess tests (#179949)
Set up the test similar to ProgramTest to avoid missing necessary env.
eg: In our downstream build, the process would rely on a shared libs,
the test would fail to find the dependent lib if we don't pass the env
down to multiprocess test.
Commit: a76f63870e958915cda1efadf6b5207ce553bce2
https://github.com/llvm/llvm-project/commit/a76f63870e958915cda1efadf6b5207ce553bce2
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
Fix Bazel build for 823e3e0 (#179980)
Co-authored-by: Pranav Kant <prka at google.com>
Commit: d31dbb955518c8d456e92197c805b2194fb639a1
https://github.com/llvm/llvm-project/commit/d31dbb955518c8d456e92197c805b2194fb639a1
Author: Marcell Leleszi <mleleszi at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M libc/src/__support/wctype/CMakeLists.txt
A libc/src/__support/wctype/wctype_classification_utils.cpp
M libc/src/__support/wctype/wctype_classification_utils.h
M libc/utils/wctype_utils/classification/gen_classification_data.py
Log Message:
-----------
[libc][wctype] Move classification lookup tables to a cpp file (#174993)
#170525
Previously, lookup tables were defined in a header so that they can be
constexpr, but this lead to each translation unit having it's own copy,
bloating the library size. Looking at current usages of wctype
functions, they are always used at runtime, so there's no benefit of
having them constexpr, so I'm moving them to a cpp file, so that there's
only a single copy in the library.
Commit: 77034cd325fd911cd7421d53d206d2ea4ce381df
https://github.com/llvm/llvm-project/commit/77034cd325fd911cd7421d53d206d2ea4ce381df
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/DetectDeadLanes.cpp
Log Message:
-----------
[CodeGen] Make use of TargetRegisterInfo::findCommonRegClass. NFC. (#179981)
Commit: 3b16468814364d1d2ca07a2be3f92fea60ae5059
https://github.com/llvm/llvm-project/commit/3b16468814364d1d2ca07a2be3f92fea60ae5059
Author: Alexander Weinrauch <alexander.weinrauch at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/test/CodeGen/AMDGPU/fix-crash-valu-hazard.ll
M llvm/test/CodeGen/AMDGPU/lds-dma-waitcnt.mir
M llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll
Log Message:
-----------
[AMDGPU] Global and Buffer loads to LDS should not increase `lgkmcnt` (#179305)
`global_load_lds` and `buffer_load to lds` do only increment `vmcnt` and
not touch `lgkmcnt`. This causes invalid `waitcnts` for some Triton
kernels, similar to the added lit tests.
Note that the change for buffer ops is not necesssary, i.e. the lit test
passes even before this PR, because it seems like `SIInsertWaitcnts`
does not use `LGKM_CNT` for buffer ops. But this change might prevent a
bug in the future.
Commit: 00ba2ef1e3275f0fba759e2f8e17663e99769b4d
https://github.com/llvm/llvm-project/commit/00ba2ef1e3275f0fba759e2f8e17663e99769b4d
Author: Jinsong Ji <jinsong.ji at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/unittests/CAS/OnDiskCASLoggerTest.cpp
Log Message:
-----------
[NFC] Fix darwin failures due to missing headers (#179989)
Handle the include similar to ProgramTest, to fix the build failures in
darwin
```
/Users/buildbot/buildbot-root/aarch64-darwin/llvm-project/llvm/unittests/CAS/OnDiskCASLoggerTest.cpp:38:15: error: use of undeclared identifier '_NSGetEnviron'
return *_NSGetEnviron();
^
1 error generated.
```
Commit: c662f11c7d4511cb0d3b7c0832197e63f1af0eb2
https://github.com/llvm/llvm-project/commit/c662f11c7d4511cb0d3b7c0832197e63f1af0eb2
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] mayFoldIntoVector - ensure we check for custom lowering to logic/add/sub ops (#179988)
As noted on #174761 - we need to ensure custom lowering to logic/add/sub
ops might actually occur before assuming the node will have been on the
vector unit
Commit: ca93dd399eec6436bebe4c6d727ff6af0ab7b7d4
https://github.com/llvm/llvm-project/commit/ca93dd399eec6436bebe4c6d727ff6af0ab7b7d4
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/Basic/Targets/NVPTX.h
M clang/test/CodeGen/builtins-nvptx-ptx60.cu
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/CodeGen/nvptx_attributes.c
M clang/test/CodeGenCUDA/convergent.cu
M clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
M clang/test/Headers/gpuintrin.c
M flang/lib/Frontend/CompilerInstance.cpp
M flang/test/Lower/OpenMP/target_cpu_features.f90
M llvm/lib/Target/NVPTX/NVPTX.td
M llvm/lib/Target/NVPTX/NVPTXSubtarget.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/test/CodeGen/NVPTX/clusterlaunchcontrol-multicast.ll
M llvm/test/CodeGen/NVPTX/convert-sm100a.ll
M llvm/test/CodeGen/NVPTX/convert-sm103a.ll
M llvm/test/CodeGen/NVPTX/f32-ex2.ll
M llvm/test/CodeGen/NVPTX/fexp2.ll
M llvm/test/CodeGen/NVPTX/flog2.ll
M llvm/test/CodeGen/NVPTX/i128.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-arch-O0.ll
A llvm/test/CodeGen/NVPTX/ptx-version-validation.ll
M llvm/test/CodeGen/NVPTX/rsqrt.ll
M llvm/test/CodeGen/NVPTX/sm-version.ll
M llvm/test/CodeGen/NVPTX/surf-tex.py
R llvm/test/CodeGen/NVPTX/wmma-ptx86-sm120a.py
M mlir/include/mlir/Dialect/GPU/Pipelines/Passes.h
M mlir/include/mlir/Dialect/GPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
Log Message:
-----------
Reland "[NVPTX] Validate user-specified PTX version against SM version" (#179304)
Previous commit message:
> Original commit message:
>
>>When users explicitly specify a PTX version via -mattr=+ptxNN that's
insufficient for their target SM, we now emit a fatal error. Previously,
we silently upgraded the PTX version to the minimum required for the
target SM.
>>
>>When no SM or PTX version is specified, we now use PTX 3.2 (the
minimum for the default SM 3.0) instead of PTX 6.0.
>
>The following commits should fix the failures that arose when I
previously tried to land this commit:
>
>https://github.com/llvm/llvm-project/commit/9fc5fd0ad689eed94f65b1d6d10f9c5642935e68
should address the llvm-nvptx*-nvidia-* build failures:
https://github.com/llvm/llvm-project/pull/174834#issuecomment-3742242651
>
>https://github.com/llvm/llvm-project/commit/600514a63760c6730e4cd970d2fcead9c5a897b3
should address the MLIR failures
---
The previous commit was reverted with
d23cb79ba497281de050ef609cb91b91058bf323 because the
[mlir-nvidia](https://lab.llvm.org/buildbot/#/builders/138/builds/24797)
and
[mlir-nvidia-gcc7](https://lab.llvm.org/buildbot/#/builders/116/builds/23929)
Buildbots were failing.
Those tests failed because MLIR's default SM was 5.0, which caused NVPTX
to target PTX ISA v4.0, which did not support the intrinsics used in the
failing tests.
243f011577193c99358ccc4142b296d4fa80ea11 should address this by bumping
MLIR's default SM to 7.5. Now, using MLIR's new default SM, NVPTX
targets the PTX ISA v6.3, which supports the intrinsics used in the
failing tests.
Commit: 8f484ff2a059bf5379ea4de046fbd7aaf434dce2
https://github.com/llvm/llvm-project/commit/8f484ff2a059bf5379ea4de046fbd7aaf434dce2
Author: David Green <david.green at arm.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/neoverse-epilogue-vect.ll
Log Message:
-----------
[AArch64] Add FeatureUseFixedOverScalableIfEqualCost to Neoverse-V3 and Neoverse-V3ae (#179903)
This was missing from neoverse-v3 and neoverse-v3ae, but should be
present like neoverse-v2.
Commit: 6377c86d718232fe60c548dfd7ab439f7ff84df7
https://github.com/llvm/llvm-project/commit/6377c86d718232fe60c548dfd7ab439f7ff84df7
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/loadcombine.ll
M llvm/test/Transforms/SLPVectorizer/X86/bad-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
Log Message:
-----------
Revert "[SLP]Remove LoadCombine workaround after handling of the copyables"
This reverts commit 8dbb9f66e8b14a8a06f1873a2c1b7dce366ed2d6 to fix
buildbot issues https://lab.llvm.org/buildbot/#/builders/224/builds/2795
Commit: 74ef2f06663ac1b9fae6710e94e8079b26c786f3
https://github.com/llvm/llvm-project/commit/74ef2f06663ac1b9fae6710e94e8079b26c786f3
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/test/TableGen/target-builtins-prototype-parser.td
M clang/utils/TableGen/ClangBuiltinsEmitter.cpp
Log Message:
-----------
[AMDGPU] Fix type signature of pointers to vectors in builtins file (#179965)
Summary:
The script used to port this file incorrectly applied the pointer values
to the elements of the vector rather than the vector itself. This
resulted in the same type signature, but the text was confusing to read.
Furthermore, the current parser actually failed in these cases so it had
to be addressed.
After updating the script and the parser, this should be the more
understandable format.
Commit: 08311cd42da8a2f2d97e7e35b2a01fceac9b2fd2
https://github.com/llvm/llvm-project/commit/08311cd42da8a2f2d97e7e35b2a01fceac9b2fd2
Author: Zinovy Nis <zinovy.nis at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.h
Log Message:
-----------
[clang-tidy] Apply modernize-use-string-view to the code (#179514)
Commit: 1214c96477867eb34e819184c756d899e9e027b4
https://github.com/llvm/llvm-project/commit/1214c96477867eb34e819184c756d899e9e027b4
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
Log Message:
-----------
[NFC] [FlowSensitive] [StatusOr] precommit FP test
Reviewers: jvoung
Pull Request: https://github.com/llvm/llvm-project/pull/179786
Commit: 213c7eb2eb9dc3758a1eeb8e39572aeaf19f50e3
https://github.com/llvm/llvm-project/commit/213c7eb2eb9dc3758a1eeb8e39572aeaf19f50e3
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M mlir/include/mlir/IR/Remarks.h
M mlir/unittests/IR/RemarkTest.cpp
Log Message:
-----------
[MLIR] Fix use-after-free in Remark by owning string data (#179889)
Change Remark's StringRef members to std::string to ensure remarks own
their data, preventing dangling pointers when used with
RemarkEmittingPolicyFinal.
Commit: 1d3ce0cfff791c48ba2b9b8754c2a8b46539acb1
https://github.com/llvm/llvm-project/commit/1d3ce0cfff791c48ba2b9b8754c2a8b46539acb1
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
Log Message:
-----------
[NFC] [FlowSensitive] [StatusOr] precommit test for another FP
Pull Request: https://github.com/llvm/llvm-project/pull/179806
Commit: 483d9bb9e4a15bb24bbd09196f045845650dee7e
https://github.com/llvm/llvm-project/commit/483d9bb9e4a15bb24bbd09196f045845650dee7e
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Models/UncheckedStatusOrAccessModel.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
Log Message:
-----------
[FlowSensitive] [StatusOr] cache pointers for all const methods
This is important to support iterators, that often return pairs
containing StatusOr.
Pull Request: https://github.com/llvm/llvm-project/pull/179791
Commit: 356ca4036da62fe06c109704d8042764f489cb73
https://github.com/llvm/llvm-project/commit/356ca4036da62fe06c109704d8042764f489cb73
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Models/UncheckedStatusOrAccessModel.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
Log Message:
-----------
[FlowSensitive] [StatusOr] cache return values for all accessors
This is important for iterators that often return pairs containing
StatusOr.
Pull Request: https://github.com/llvm/llvm-project/pull/179807
Commit: 7f5805bbec205cbf94c43a79ec7997fb4c5ebba3
https://github.com/llvm/llvm-project/commit/7f5805bbec205cbf94c43a79ec7997fb4c5ebba3
Author: Haowei <haowei at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M libc/src/__support/fixed_point/fx_bits.h
Log Message:
-----------
[libc] Remove "stdio.h" include from fx_bits.h (#179805)
The "stdio.h" is not used, so remove it from the file. This is causing a
build failure as "stdio.h" is not specified in the build files.
Commit: fbb371affa9e2d0015abc22a9a3f31e7849449af
https://github.com/llvm/llvm-project/commit/fbb371affa9e2d0015abc22a9a3f31e7849449af
Author: jimingham <jingham at apple.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/source/Core/Statusline.cpp
Log Message:
-----------
Prevents a potential lock inversion in StatusLine when shutting down. (#179789)
We have gotten reports of an occasional deadlock on shutdown. The
Driver::MainLoop thread is shutting down, and gets stuck here:
Thread 0x3c017c
start
main
Driver::MainLoop()
lldb::SBDebugger::RunCommandInterpreter(bool, bool)
lldb_private::CommandInterpreter::RunCommandInterpreter(lldb_private::CommandInterpreterRunOptions&)
lldb_private::Debugger::RunIOHandlers()
lldb_private::Debugger::PopIOHandler(std::__1::shared_ptr<lldb_private::IOHandler>
const&)
lldb_private::Editline::Cancel()
lldb_private::LockableStreamFile::Lock()
std::__1::recursive_mutex::lock()
It has acquired the IO Handler list lock (in PopIOHandler) and is stuck
trying to get the debugger output stream lock.
Meanwhile, the event-handler thread is doing:
Thread 0x3c01d3
thread_start
_pthread_start
lldb_private::HostThreadMacOSX::ThreadCreateTrampoline(void*)
lldb_private::HostNativeThreadBase::ThreadCreateTrampoline(void*)
std::__1::__function::__func<lldb_private::Debugger::StartEventHandlerThread()::$_0,
void* ()>::operator()()
lldb_private::Debugger::DefaultEventHandler()
lldb_private::Statusline::~Statusline()
lldb_private::Statusline::UpdateScrollWindow(lldb_private::Statusline::ScrollWindowMode)
lldb_private::Debugger::RefreshIOHandler()
std::__1::recursive_mutex::lock()
UpdateScrollWindow gets the debugger output stream lock, and sends some
data to the output, then it calls RefreshIOHandler while still holding
the Debugger output stream lock. That's the problem, since if it gets
that lock before Editline::Cancel() completes, we'll get this deadlock.
The solution is simple, there's no reason why UpdateScrollWindow should
hold the debugger output lock when it calls RefreshIOHandler. If that
refresh ends up needing to write to the debugger output, it can take the
lock more narrowly at that point. This fixed the deadlock because after
yielding the output lock, the second thread waits on the first to get
the IO Handler lock. Meanwhile the first thread can now acquire the
debugger output lock and finish the Cancel, and exit PopIOHandler which
will allow the second thread to make progress in turn.
I couldn't figure out any way to test this...
Commit: 1a7c110dfc92edd096b1d551fe809d4a278e0407
https://github.com/llvm/llvm-project/commit/1a7c110dfc92edd096b1d551fe809d4a278e0407
Author: Nico Weber <thakis at chromium.org>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Analysis/Scalable/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Analysis/Scalable/BUILD.gn
Log Message:
-----------
[gn] port 77740f5577133
Commit: c0fe938dfdf068c3183cbfec7b3487c36d234a08
https://github.com/llvm/llvm-project/commit/c0fe938dfdf068c3183cbfec7b3487c36d234a08
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/bswap-reduction-aliased.ll
Log Message:
-----------
[SLP][NFC]Add a testing with aliasing between bswap memory operations, NFC
Commit: 9b6b69944965ff7d7c2e62f16b402bac9693f95d
https://github.com/llvm/llvm-project/commit/9b6b69944965ff7d7c2e62f16b402bac9693f95d
Author: Qinkun Bao <qinkun at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M mlir/include/mlir/ExecutionEngine/MemRefUtils.h
M mlir/unittests/ExecutionEngine/CMakeLists.txt
R mlir/unittests/ExecutionEngine/OwningMemRef.cpp
Log Message:
-----------
Revert "[mlir][ExecutionEngine] Fix missing return from operator==() in `OwningMemRef`" (#179999)
Reverts llvm/llvm-project#179655
Break
https://lab.llvm.org/buildbot/#/builders/169/builds/19630
https://lab.llvm.org/buildbot/#/builders/24/builds/17229
Commit: 4f97d093cd48b1f78e6eea8958a5652922d9c9d0
https://github.com/llvm/llvm-project/commit/4f97d093cd48b1f78e6eea8958a5652922d9c9d0
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/test/Conversion/XeGPUToXeVM/materializecast.mlir
Log Message:
-----------
[MLIR][XeGPU][XeVM] Update single element vector type handling. (#178558)
Type conversion rule for single element vector and materialization
function to support the conversion has a mismatch.
Update materialization function to match the type conversion rule.
Commit: ecd1767edbdf694d7444e8152c4a84e3370555a7
https://github.com/llvm/llvm-project/commit/ecd1767edbdf694d7444e8152c4a84e3370555a7
Author: Yury Plyakhin <yury.plyakhin at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M offload/libomptarget/DeviceImage.cpp
Log Message:
-----------
[offload] Fix DeviceImage to handle OffloadBinary::create returning vector (#180003)
OffloadBinary::create() now returns
`Expected<SmallVector<unique_ptr<OffloadBinary>>>`
instead of a single unique_ptr, to support multiple entries in version 2
format.
Updated DeviceImageTy constructor to extract the first binary from the
returned
vector, with empty check. In this context, only one image per
OffloadBinary is expected.
Commit: f4441cb5571d3e1f7ac4d27abc8cf5e58956c0a4
https://github.com/llvm/llvm-project/commit/f4441cb5571d3e1f7ac4d27abc8cf5e58956c0a4
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/Analysis/Scalable/BUILD.gn
Log Message:
-----------
[gn build] Port e59e9fcd38a9
Commit: 13c9276daa86d9c9ad133a7bed538543c42a0771
https://github.com/llvm/llvm-project/commit/13c9276daa86d9c9ad133a7bed538543c42a0771
Author: Wael Yehia <wyehia at ca.ibm.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/test/CodeGen/PowerPC/aix-ifunc-toc-restore-query-neg.ll
Log Message:
-----------
[AIX] fix aix-ifunc-toc-restore-query-neg.ll (#153049)
Commit: 92d0fd79cfe55d766ef8ddd39e8bd1860679cf09
https://github.com/llvm/llvm-project/commit/92d0fd79cfe55d766ef8ddd39e8bd1860679cf09
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M mlir/include/mlir/IR/Remarks.h
Log Message:
-----------
[MLIR][NFC] Use toVector instead toStringRef (#179998)
Commit: d762cc2f03c681aa2cfb9f99c25282bdecaede23
https://github.com/llvm/llvm-project/commit/d762cc2f03c681aa2cfb9f99c25282bdecaede23
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-dynamic-alloca-scalable.ll
A llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/alloca.ll
R llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/fallback.ll
Log Message:
-----------
[GlobalISel] Add SVE support for alloca (#178976)
Complementary to the same handling code in SelectionDAG:
https://github.com/llvm/llvm-project/blob/f3d81d4110f3415eab3459e07b52043872b9e03b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp#L160-L165
https://github.com/llvm/llvm-project/blob/f3d81d4110f3415eab3459e07b52043872b9e03b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp#L4613-L4623
Co-authored-by: Claude Sonnet 4.5 <noreply at anthropic.com>
Commit: d040788af620482ad87506fe3e825574688c5ccb
https://github.com/llvm/llvm-project/commit/d040788af620482ad87506fe3e825574688c5ccb
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/TargetInfo.cpp
M clang/lib/CIR/CodeGen/TargetInfo.h
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/TargetInfo.cpp
M clang/lib/CodeGen/TargetInfo.h
Log Message:
-----------
[clang] remove unused SrcAddr parameter from performAddrSpaceCast (#179330)
The conversion code always ended up just getting the type of Src from
the Src argument itself, with no virtual users of this, so there is no
point in also providing this API hook. Fix the documentation as well,
since it seems DestAddr must have been similarly removed at some point
in the past from the API but was still documented.
Also fixes CIR to actually return the casted value!
Commit: ba58225a0ae3d5dbaabb504470fa0d4be09fd0d0
https://github.com/llvm/llvm-project/commit/ba58225a0ae3d5dbaabb504470fa0d4be09fd0d0
Author: Adam Siemieniuk <adam.siemieniuk at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M mlir/python/CMakeLists.txt
A mlir/python/mlir/dialects/X86Vector.td
A mlir/python/mlir/dialects/X86VectorTransformOps.td
A mlir/python/mlir/dialects/transform/x86vector.py
A mlir/python/mlir/dialects/x86vector.py
A mlir/test/python/dialects/transform_x86vector_ext.py
A mlir/test/python/dialects/x86vector.py
Log Message:
-----------
[mlir][x86vector] Python bindings for x86vector dialect (#179958)
Registers python bindings for x86vector dialect and transform ops.
Commit: 5326166866e3a1c2ecc260830d19b03054ff6418
https://github.com/llvm/llvm-project/commit/5326166866e3a1c2ecc260830d19b03054ff6418
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU][SIInsertWaitcnt][NFC] Don't expose internal data structure to user (#179736)
With this patch we are no longer exposing the internal data structure
that holds the WaitEvents to the user through the `getWaitEventMask()`
API. Instead we only allow the user to query a specific type and get the
corresponding `WaitEventSet` with `getWaitEvents(T)`.
Note: This patch also renames `getWaitEventMask()` to `getWaitEvents()`
because we are no longer returning a mask but instead a `WaitEventSet`
object.
Commit: fe754dff6d7ed3f7d69e5a97846d9320cb407977
https://github.com/llvm/llvm-project/commit/fe754dff6d7ed3f7d69e5a97846d9320cb407977
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/loadcombine.ll
M llvm/test/Transforms/SLPVectorizer/X86/bad-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/bswap-reduction-aliased.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
Log Message:
-----------
[SLP]Remove LoadCombine workaround after handling of the copyables
LoadCombine pattern handling was added as a workaround for the cases,
where the SLP vectorizer could not vectorize the code effectively. With
the copyables support, it can handle it directly.
Also, patch adds support for scalar loads[ + bswap] pattern for byte
sized loads (+ reverse bytes for bswap)
Recommit after revert in 6377c86d718232fe60c548dfd7ab439f7ff84df7
Reviewers: RKSimon, hiraditya
Pull Request: https://github.com/llvm/llvm-project/pull/174205
Commit: 91f39535c761d47c7360d4ebe4b969626a82d8a5
https://github.com/llvm/llvm-project/commit/91f39535c761d47c7360d4ebe4b969626a82d8a5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/test/CodeGenHLSL/builtins/distance.hlsl
M clang/test/CodeGenHLSL/builtins/length.hlsl
M clang/test/CodeGenHLSL/builtins/max-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/min-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/pow-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/reflect.hlsl
M clang/test/CodeGenHLSL/builtins/refract.hlsl
M clang/test/CodeGenHLSL/builtins/smoothstep.hlsl
M clang/test/Headers/__clang_hip_cmath.hip
M clang/test/Headers/__clang_hip_math.hip
M llvm/lib/Transforms/Utils/InlineFunction.cpp
A llvm/test/Transforms/Inline/ret_attr_nofpclass.ll
Log Message:
-----------
Inliner: Handle nofpclass return attributes (#179776)
Follow along with how range is handled.
Commit: fad9b2e0e0dd8b65a0ac0ecc58c658092d400863
https://github.com/llvm/llvm-project/commit/fad9b2e0e0dd8b65a0ac0ecc58c658092d400863
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/include/llvm/ADT/ScopeExit.h
Log Message:
-----------
[llvm][ADT] Mark the whole scope_exit class [[nodiscard]] instead (#180008)
This PR is to address:
https://github.com/llvm/llvm-project/pull/179720#issuecomment-3854792269
https://github.com/llvm/llvm-project/pull/179720#issuecomment-3855339636
Commit: 9ebdeb2e8cbe8285c8383d8079663b6c73accac8
https://github.com/llvm/llvm-project/commit/9ebdeb2e8cbe8285c8383d8079663b6c73accac8
Author: Alex Langford <alangford at apple.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/include/lldb/Target/Process.h
M lldb/source/API/SBModule.cpp
M lldb/source/Core/DynamicLoader.cpp
M lldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.cpp
M lldb/source/Plugins/DynamicLoader/FreeBSD-Kernel/DynamicLoaderFreeBSDKernel.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
M lldb/source/Plugins/DynamicLoader/wasm-DYLD/DynamicLoaderWasmDYLD.cpp
M lldb/source/Plugins/JITLoader/GDB/JITLoaderGDB.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Target/Process.cpp
Log Message:
-----------
[lldb] Return Expected<ModuleSP> from Process::ReadModuleFromMemory (#179583)
I noticed that Module::GetMemoryObjectFile populates a Status object
upon error but it's effectively dropped on the floor. Instead, the
clients can report the error as desired.
At the moment, all clients are either (1) consuming the error because
it's only trying to find a module, or (2) log the error and bail out
early. I tried to preserve existing behavior as faithfully as possible.
Commit: ee816947ac4fc449b3b382b40f21f9f8c24b126b
https://github.com/llvm/llvm-project/commit/ee816947ac4fc449b3b382b40f21f9f8c24b126b
Author: Zorojuro <sawantsukumar at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/f16fmaf.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/f16fmaf.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/f16fmaf.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor f16fmaf to Header Only. (#178851)
closes #175319
Commit: 943782be5aec5db854065145dd73a618c3a775be
https://github.com/llvm/llvm-project/commit/943782be5aec5db854065145dd73a618c3a775be
Author: Adrian Vogelsgesang <avogelsgesang at salesforce.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/include/lldb/Target/Target.h
M lldb/source/Target/Target.cpp
M lldb/test/API/functionalities/scripted_frame_provider/TestScriptedFrameProvider.py
Log Message:
-----------
[lldb] Broadcast `eBroadcastBitStackChanged` when frame providers change (#171482)
We want to reload the call stack whenever the frame providers are
updated. To do so, we now emit a `eBroadcastBitStackChanged` on all
threads whenever any changes to the frame providers take place.
I found this very useful while iterating on a frame provider in
lldb-dap. So far, the new frame provider only took effect after
continuing execution. Now the backtrace in VS-Code gets refreshed
immediately upon running `target frame-provider add`.
Commit: 9639e9669e36d4357a76bee775b8becb8168d946
https://github.com/llvm/llvm-project/commit/9639e9669e36d4357a76bee775b8becb8168d946
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/inline-asm.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
Log Message:
-----------
[AArch64] fix copy from GPR32 to FPR16 (#176594)
fixes https://github.com/llvm/llvm-project/issues/79822
cc https://github.com/rust-lang/rust/issues/120374
The example fails on nightly https://godbolt.org/z/zEojPzqWc.
Commit: 7bf47e2e84b37764424b1ae9f1b3e5b7fa984f95
https://github.com/llvm/llvm-project/commit/7bf47e2e84b37764424b1ae9f1b3e5b7fa984f95
Author: Samarth Narang <70980689+snarang181 at users.noreply.github.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/test/Dialect/Tensor/invalid.mlir
Log Message:
-----------
[mlir][tensor] Guard constant reshape folding (#179077)
Commit: 059176dfede5c4c4e3b0d2fbef194b318fb61188
https://github.com/llvm/llvm-project/commit/059176dfede5c4c4e3b0d2fbef194b318fb61188
Author: RattataKing <amilywu2 at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M mlir/include/mlir-c/Support.h
M mlir/include/mlir/Bindings/Python/NanobindUtils.h
M mlir/include/mlir/CAPI/Support.h
M mlir/lib/CAPI/IR/Support.cpp
Log Message:
-----------
[MLIR][Python] Add llvm raw fd ostream c api (#179770)
This PR adds a C API `MlirLlvmRawFdOstream` for `llvm::raw_fd_ostream`,
which cannot be safely replaced by `std::ofstream` on Windows.
`llvm::raw_fd_ostream` configures Win32 file sharing flags, allowing
other handles (e.g. Python temp file handles) to coexist, see details
[here](https://llvm.org/doxygen/Windows_2Path_8inc_source.html#l1281),
while `std::ofstream` disables file sharing by default.
Commit: ccf46155a7efc131519a07f3ba62bcba5da65fa2
https://github.com/llvm/llvm-project/commit/ccf46155a7efc131519a07f3ba62bcba5da65fa2
Author: ofri frishman <ofri4321 at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/Utils/ReshapeOpsUtils.h
M mlir/test/Dialect/MemRef/canonicalize.mlir
Log Message:
-----------
[mlir] disable folding collapse expand to cast (#179209)
Collapsing expand(collapse(src)) to cast(src) is supported in cases
where the source and result are cast compatible but not equal. When the
source has dynamic dimensions this leads to cases where the cast is
enabled even though certain dimensions cast from static to dynamic when
the dynamic size is not assured to be equal to the static size.
Currently blocking applying this folding when the source has dynamic
dimensions to preserve correctness.
In the future it could be possible to enable some cases of folding when
not all dimensions of the source are static.
Such cases could be when:
1) expand and collapse happened on non dynamic dims
2) expand and collapse on dynamic dims could be folded to no op
Commit: 4c05ff11ff460eda9b81132d297ef8a918b91643
https://github.com/llvm/llvm-project/commit/4c05ff11ff460eda9b81132d297ef8a918b91643
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Lex/PPDirectives.cpp
A clang/test/Modules/single-module-parse-mode-compiles.m
Log Message:
-----------
[clang][modules] Support every import syntax in single-module-parse-mode (#179610)
Previously, `-fmodules-single-module-parse-mode` only prevented module
compilation/loading when initiated from an `#include` or `#import`
directive. This PR does the same for `@import`, `#pragma clang module
import` and `#pragma clang module load`. This is done by sinking the
logic down into `CompilerInstance::loadModule()`.
Commit: 82799a448ec9c207ce505d22f9bf0ba1f1f49407
https://github.com/llvm/llvm-project/commit/82799a448ec9c207ce505d22f9bf0ba1f1f49407
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pown.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
Log Message:
-----------
Reapply "AMDGPU: Use real copysign in fast pow (#97152)" (#178036)
This reverts commit bff619f91015a633df659d7f60f842d5c49351df.
This was reverted due to regressions caused by poor copysign
optimization, which have been fixed.
Commit: 9ea286153ea89fccae6095a9df599bca758df5af
https://github.com/llvm/llvm-project/commit/9ea286153ea89fccae6095a9df599bca758df5af
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/include/llvm/MC/MCSubtargetInfo.h
M llvm/lib/MC/MCSubtargetInfo.cpp
Log Message:
-----------
[MC] Return const FeatureBitset& from MCSubtargetInfo::ToggleFeature/SetFeatureBitsTransitively/ClearFeatureBitsTransitively (#179964)
These functions were returning a copy of an MCSubtargetInfo member after
updating. This a convenience for some callers to avoid needing to call
getFeatureBits(). Not all callers use the returned value and some just
pass it on to a function that wants a reference.
FeatureBitset is currently 48 bytes. Return a reference so we don't
speculatively copy it. Callers can make a copy if necessary.
Commit: 972cd847efb20661ea7ee8982dd19730aa040c75
https://github.com/llvm/llvm-project/commit/972cd847efb20661ea7ee8982dd19730aa040c75
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp
M mlir/lib/RegisterAllExtensions.cpp
A mlir/test/Conversion/XeVMToLLVM/legalize_large_vector.mlir
M mlir/test/Conversion/XeVMToLLVM/xevm-to-llvm.mlir
Log Message:
-----------
[MLIR][XeVM] Remove xevm to llvm from convert to llvm (#175672)
Remove xevm to llvm conversion pass from convert to llvm as it is a
backend dependent conversion.
And add legalization pattern for splitting large vector load that are
eventually split into smaller
vectors by shufflevector. shufflevector can be replaced with a smaller
load in such case.
Commit: 7022e5a514b656e0cc62c4877b306a7057ce4091
https://github.com/llvm/llvm-project/commit/7022e5a514b656e0cc62c4877b306a7057ce4091
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU][SIINsertWaitcnts][NFC] Make TTI and ST references (#180017)
This patch converts WaitcntGenerator::TTI and ST pointers to references.
This helps remove some null checking assertions.
Commit: e9b578a4d77025e18318efedd0f3f3764338d859
https://github.com/llvm/llvm-project/commit/e9b578a4d77025e18318efedd0f3f3764338d859
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/Basic/Targets/NVPTX.h
M clang/test/CodeGen/builtins-nvptx-ptx60.cu
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/CodeGen/nvptx_attributes.c
M clang/test/CodeGenCUDA/convergent.cu
M clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
M clang/test/Headers/gpuintrin.c
M flang/lib/Frontend/CompilerInstance.cpp
M flang/test/Lower/OpenMP/target_cpu_features.f90
M llvm/lib/Target/NVPTX/NVPTX.td
M llvm/lib/Target/NVPTX/NVPTXSubtarget.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/test/CodeGen/NVPTX/clusterlaunchcontrol-multicast.ll
M llvm/test/CodeGen/NVPTX/convert-sm100a.ll
M llvm/test/CodeGen/NVPTX/convert-sm103a.ll
M llvm/test/CodeGen/NVPTX/f32-ex2.ll
M llvm/test/CodeGen/NVPTX/fexp2.ll
M llvm/test/CodeGen/NVPTX/flog2.ll
M llvm/test/CodeGen/NVPTX/i128.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-arch-O0.ll
R llvm/test/CodeGen/NVPTX/ptx-version-validation.ll
M llvm/test/CodeGen/NVPTX/rsqrt.ll
M llvm/test/CodeGen/NVPTX/sm-version.ll
M llvm/test/CodeGen/NVPTX/surf-tex.py
A llvm/test/CodeGen/NVPTX/wmma-ptx86-sm120a.py
M mlir/include/mlir/Dialect/GPU/Pipelines/Passes.h
M mlir/include/mlir/Dialect/GPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
Log Message:
-----------
Revert "Reland "[NVPTX] Validate user-specified PTX version against SM version"" (#180035)
Reverts llvm/llvm-project#179304 due to
https://github.com/llvm/llvm-project/pull/179304#issuecomment-3856100622
Commit: c43d1c5292d7d908fceae89e5d08016c16daac74
https://github.com/llvm/llvm-project/commit/c43d1c5292d7d908fceae89e5d08016c16daac74
Author: Yury Plyakhin <yury.plyakhin at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Object/OffloadBinary.cpp
Log Message:
-----------
[Object][Offload] Fix OffloadBinary::create to explicitly move return value (#180011)
On older compilers (GCC 7), implicit move on return is not guaranteed,
causing the compiler to attempt copying the SmallVector of unique_ptr's,
which fails because unique_ptr has a deleted copy constructor.
Added explicit std::move() on both return paths to ensure move semantics
are used instead of copy, fixing compilation by GCC 7.
Commit: 376dc83d7ab77bd048ebc9be7232e93056e93fb2
https://github.com/llvm/llvm-project/commit/376dc83d7ab77bd048ebc9be7232e93056e93fb2
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Add RegBankLegalize rules for TFE buffer loads (#179529)
Commit: e524ee5a7dd932391909652e56a60b25f7a471b4
https://github.com/llvm/llvm-project/commit/e524ee5a7dd932391909652e56a60b25f7a471b4
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-metadata.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge-vf1.ll
Log Message:
-----------
[VPlan] Auto-generate some VPlan check lines.
Use new UTC support to auto-generate some check lines to make them
easier to update in the future.
Commit: 0d020f14c9ec720a8360c35a1d4782e25ce891e5
https://github.com/llvm/llvm-project/commit/0d020f14c9ec720a8360c35a1d4782e25ce891e5
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
A lldb/test/API/tools/lldb-dap/launch/io/DAP_launch_io.py
R lldb/test/API/tools/lldb-dap/launch/io/TestDAP_launch_io.py
A lldb/test/API/tools/lldb-dap/launch/io/TestDAP_launch_io_integratedTerminal.py
A lldb/test/API/tools/lldb-dap/launch/io/TestDAP_launch_io_internalConsole.py
Log Message:
-----------
[lldb-dap] Split the launch IO redirection tests. (#179974)
Tests in the same python file share the same build directory.
Although they are the same binary. The logs produced are different.
Commit: df662e94f8da5604164917d85890669401915556
https://github.com/llvm/llvm-project/commit/df662e94f8da5604164917d85890669401915556
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
Log Message:
-----------
[AMDGPU] Limit tensor load/store to gfx1250 only. NFC (#179737)
Commit: 02d8c9c63a9925cea2ab7560742dbf2619da89cc
https://github.com/llvm/llvm-project/commit/02d8c9c63a9925cea2ab7560742dbf2619da89cc
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M openmp/device/src/LibC.cpp
Log Message:
-----------
[OpenMP] Stub vprintf on non-NVPTX if no libc (#180025)
The AMDGPU check was added in
https://github.com/llvm/llvm-project/pull/123670 where the reasoning
seems to be that the NVIDIA SDK will provide `vprintf` for the NVPTX
case and AMDGPU was the only other supported target at the time.
SPIR-V also needs this stubbed out, so just check that it's not NVPTX.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: b985974e75b58a6176fbb76fdf24a65f0759617f
https://github.com/llvm/llvm-project/commit/b985974e75b58a6176fbb76fdf24a65f0759617f
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M offload/test/lit.cfg
Log Message:
-----------
[Offload][lit] Link against SPIR-V DeviceRTL if present (#180030)
Right now if we run `check-offload` for SPIR-V the DeviceRTL isn't used
because we pass `-nogpulib`.
Don't pass that, but also don't pass `--libomptarget-spirv-bc-path` yet
because the DeviceRTL is brand new so we don't want to error if it's not
present.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: c1f93d1390adc2380f7a69f149711bcfabbecd83
https://github.com/llvm/llvm-project/commit/c1f93d1390adc2380f7a69f149711bcfabbecd83
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Log Message:
-----------
[ARM] Remove `NoInfsFPMath` and `NoNaNsFPMath` uses (#179935)
Commit: f227efef3433dff85c379006d15de80b7847e1b5
https://github.com/llvm/llvm-project/commit/f227efef3433dff85c379006d15de80b7847e1b5
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation5.ll
Log Message:
-----------
[SLP][NFC]Add another shl-to-add modeling test case, NFC
Commit: 08cf3e62b449ec4254c2141d81f16b13fc92db0e
https://github.com/llvm/llvm-project/commit/08cf3e62b449ec4254c2141d81f16b13fc92db0e
Author: David Green <david.green at arm.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/Target.td
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
M llvm/test/CodeGen/AArch64/fcvt_combine.ll
Log Message:
-----------
[AArch64][GlobalISel] Add GISel handling for FCVT fixed. (#178903)
This uses the generalized code from #178603 to allow GISel to
select fixed-point fcvt in the same way as SDAG.
Commit: 2e75ee8c77fc6dfde6bec778d6ac8ba03d54ee44
https://github.com/llvm/llvm-project/commit/2e75ee8c77fc6dfde6bec778d6ac8ba03d54ee44
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
Log Message:
-----------
[libc][Github] Downgrade clang version to v21 (#180043)
apt.llvm.org again is not working for the current release as they try
and get everything setup for the release/22.x branch. Downgrade for now
until installing LLVM 22 works.
Commit: 9bfd57eec6a42b2f0525f66de97524788f9ae06d
https://github.com/llvm/llvm-project/commit/9bfd57eec6a42b2f0525f66de97524788f9ae06d
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGenOpenMP/not-yet-implemented.c
A clang/test/CIR/CodeGenOpenMP/omp-llvmir.c
M clang/test/CIR/CodeGenOpenMP/parallel.c
M clang/tools/cir-opt/cir-opt.cpp
M clang/tools/cir-translate/cir-translate.cpp
Log Message:
-----------
[CIR][OpenMP] Enable lowering of the OpenMP dialect to LLVM IR (#178515)
This patch adds the OpenMP dialect to be part of the lowering to LLVM
IR. A minor change was made to a test to compensate for a yet implemented
feature: ++a to a = a + 1
Commit: 30986dc3ff0c5bc978203e6e6c1210068b828adc
https://github.com/llvm/llvm-project/commit/30986dc3ff0c5bc978203e6e6c1210068b828adc
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/vplan-printing-reductions.ll
Log Message:
-----------
[LV] Regen a VPlan-printing test with UTC (#179948)
Post 49288b65 ([UTC] Add initial VPlan support, #178534), we can
generate VPlan-printing tests with UTC. Do it for one test, with the
caveat that two Final VPlan prints are no longer checked.
Commit: e3a09dd13b6ef8f386fbfa83289b759536f5ccfc
https://github.com/llvm/llvm-project/commit/e3a09dd13b6ef8f386fbfa83289b759536f5ccfc
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/EvaluateRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/NextRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ReadMemoryRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StackTraceRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StepInRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StepInTargetsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StepOutRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/WriteMemoryRequestHandler.cpp
Log Message:
-----------
[lldb-dap][NFC] Create helper function DAP::ProcessIsNotStopped (#180056)
From
https://github.com/llvm/llvm-project/pull/179202#discussion_r2757981118
Commit: 124c8b4054fd4fe8234611a367d50b5a62f5903e
https://github.com/llvm/llvm-project/commit/124c8b4054fd4fe8234611a367d50b5a62f5903e
Author: jimingham <jingham at apple.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/include/lldb/Host/HostThread.h
M lldb/include/lldb/Target/Process.h
M lldb/source/Host/common/HostThread.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/ProcessTrace.cpp
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/was_hit/TestWasHit.py
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/was_hit/bkpt_resolver.py
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/was_hit/main.c
Log Message:
-----------
Fix the modal private state thread we use for running expressions on the private state thread (#179799)
We have a problem when some code on the private state thread needs to
run an expression. The private state thread is the one that fetches
"raw" events from the Process Plugin and decides how to handle them. But
if the private state thread needs to fetch the processed events to drive
running an expression, it can't also be the thread processing the raw
events.
We solve this by swapping in a modal private state thread just to handle
the events from the expression evaluation. That worked until you could
cause the expression evaluation to happen from Python, because then it
wasn't just the fetching of events that matter, but also the state of
the process and the state of the runlocks. The modal private state
thread is really a modal version of the thread and its associated state.
This patch gathers all the relevant control parameters into a structure
which we can swap in and out when needed.
It also adds a test using the new "was_hit" breakpoint resolver
affordance, which, since it acts as an asynchronous breakpoint callback,
gets run on the private state thread, showing that with the change we
can call expressions in the `was_hit` callback without problems.
Commit: af3cc148c39e4e7d91250962019745c4bc1d37b3
https://github.com/llvm/llvm-project/commit/af3cc148c39e4e7d91250962019745c4bc1d37b3
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/include/lldb/Utility/DataExtractor.h
M lldb/include/lldb/Utility/VirtualDataExtractor.h
M lldb/source/Plugins/ObjectContainer/BSD-Archive/ObjectContainerBSDArchive.cpp
M lldb/source/Plugins/ObjectContainer/Mach-O-Fileset/ObjectContainerMachOFileset.cpp
M lldb/source/Plugins/ObjectContainer/Universal-Mach-O/ObjectContainerUniversalMachO.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
M lldb/source/Utility/VirtualDataExtractor.cpp
M lldb/unittests/Utility/VirtualDataExtractorTest.cpp
Log Message:
-----------
[lldb][NFC] Add some override methods to VirtualDataExtractor (#179858)
This changes VirtualDataExtractor's GetByteSize to return the virtual
byte size of the buffer (external users only understand the data
contents in terms of the virtual sizes & offsets). There are check
methods in DataExtractor that check they are not going off the end of a
buffer, they usually use the BytesLeft() method. There are a couple of
callers of BytesLeft() externally, but it is predominantly an internal
use API. I have BytesLeft() use the physical size of the buffer, not the
virtual size, for the benefit of the DataExtractor methods. (and to
avoid duplicating all of them down in VirtualDataExtractor)
Another problem is the we call SetData on DataExtractorSP's (e.g. see
the ObjectFile ctor) with the DataBuffer it already has, an offset of 0,
and the GetByteSize. A no-op for a DataExtractor that is already using
that DataBuffer. But SetData would try to use that length as a physical
size, and truncate the buffer that the DataExtractor would accept.
I added VirtualDataExtractor subclass methods for the SetData's, detect
(1) data being added to an uninitialized DataExtractor, (2) the same
data / offset / length as currently being used is added to the
DataExtractor (a no-op), or (3) we're genuinely changing the data source
or setting an offset / length that is different. This final case we're
not ready to handle today, I added asserts for them so we can catch it
in debug builds, and then I clear the LookupTable and add a no-op entry
so this extractor will behave like a plain DataExtractor -- because I
don't know better to do. If we genuinely need to handle this case, and
I'm pretty sure we don't need to, I'd have to assume that we're taking a
subset of the original data source (an offset & length), so we'd need to
update all of the LookupTable entries to reflect the new offsets, and
remove entries that are no longer referring to the subsetted range. I'll
leave that until there's any evidence it's actually needed.
rdar://148939795
Commit: 6441f1c9d5b5ac6680b783dfaad82e55945596c3
https://github.com/llvm/llvm-project/commit/6441f1c9d5b5ac6680b783dfaad82e55945596c3
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/docs/RISCVUsage.rst
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/TargetParser/RISCVTargetParser.cpp
M llvm/test/TableGen/riscv-target-def.td
M llvm/unittests/TargetParser/RISCVTargetParserTest.cpp
M llvm/utils/TableGen/Basic/RISCVTargetDefEmitter.cpp
Log Message:
-----------
[RISCV] Introduce a new syntax for processor-specific tuning feature strings (#175063)
This patch proposes new a tuning feature string format that helps users
to build a performance model by "configuring" an existing tune CPU,
along with its scheduling model. For example, this string
```
"sifive-x280:single-element-vec-fp64"
```
takes ``sifive-x280`` as the "base" tune CPU and configured it with
``single-element-vec-fp64``. This gives us a performance model that
looks exactly like that of ``sifive-x280``, except some of the 64-bit
vector floating point instructions now produce only a single element per
cycle due to ``single-element-vec-fp64``.
This string could eventually be used in places like ``-mtune`` at the
frontend. Right now, this patch only implements the parser part, which
is put under the TargetParser library.
The grammar for this string is:
```
tune-cpu ::= 'tuning CPU name in lower case'
directive ::= "[a-zA-Z0-9_-]+"
tune-features ::= directive ["," directive]*
```
A *directive* can and can only _enable_ or _disable_ a certain tuning
feature from the tuning CPU. A **positive directive**, like the
``single-element-vec-fp64`` we just saw, enables an additional tuning
feature in the associated tuning model.
A **negative directive**, on the other hand, removes a certain tuning
feature. For example, ``sifive-x390`` already has the
``single-element-vec-fp64`` feature, and we can use
"sifive-x390:no-single-element-vec-fp64" to create a new performance
model that looks nearly the same as ``sifive-x390`` except
``single-element-vec-fp64`` being cut out. In this case,
``no-single-element-vec-fp64`` is a negative directive.
There are additional restrictions on what we can put in the list of
directives, please refer to the documentations for more details.
Right now, this string only accepts directives that are explicitly
supported by the tune CPU. For example, "sifive-x280:prefer-w-inst" is
not a valide string as ``prefer-w-inst`` is not supported by
``sifive-x280`` at this moment. Vendors of these processors are expected
to maintain the compatibility of their supported directives across
different versions.
---------
Co-authored-by: Sam Elliott <aelliott at qti.qualcomm.com>
Commit: 08d77f0308c0ab5d087879e2651ec7eb8a132349
https://github.com/llvm/llvm-project/commit/08d77f0308c0ab5d087879e2651ec7eb8a132349
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
A clang/docs/ClangIRCleanupAndEHDesign.md
M clang/docs/index.rst
Log Message:
-----------
[CIR][docs] C++ cleanup and exception handling design for CIR (#177625)
This change adds a document describing a new design for C++ cleanups and
exception handling in CIR.
Commit: 2adb6b815999a0e2c618992f1f8e1baa8ef46aab
https://github.com/llvm/llvm-project/commit/2adb6b815999a0e2c618992f1f8e1baa8ef46aab
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenConstantEmitter.h
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/test/CIR/CodeGen/new.cpp
Log Message:
-----------
[CIR] Upstream support for variable sized array new (#179798)
This adds CIR support for calling array new with a variable size.
Commit: c7e3bddbfd3451cf5138ec94e00eae45ab9c4b7a
https://github.com/llvm/llvm-project/commit/c7e3bddbfd3451cf5138ec94e00eae45ab9c4b7a
Author: YunQiang Su <syq at debian.org>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
A llvm/test/CodeGen/MIR/Mips/mips32r6-copyPhysReg-fcmp-f64-to-gpr.mir
Log Message:
-----------
MIPS: readsWritesFloatRegister, inc Idx for continue (#179932)
Otherwise, the input register will also be treat as write.
Commit: 2b3d97ad2dd547d2cc95dfc2585836d1db8475c7
https://github.com/llvm/llvm-project/commit/2b3d97ad2dd547d2cc95dfc2585836d1db8475c7
Author: Rohan Jacob-Rao <rohanjr at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
Log Message:
-----------
[NFC][Clang][UnsafeBufferUsage] Remove unnecessary struct. (#178801)
The struct has no members and has a surrounding namespace that can be
used for disambiguating names. This was also mentioned in a previous PR
review:
https://github.com/llvm/llvm-project/pull/101583/changes#r1737089937
Commit: 74e9bc6cb93964edfcb3761623a43d1e55aceb2a
https://github.com/llvm/llvm-project/commit/74e9bc6cb93964edfcb3761623a43d1e55aceb2a
Author: YunQiang Su <syq at debian.org>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M openmp/runtime/CMakeLists.txt
Log Message:
-----------
openmp: add atomic to SANITIZER_COMMON_LINK_LIBS for MIPS (#179933)
atomic is needed explicitly for MIPS.
Commit: 1ef499b1fcac81b2d4297ce6a608734706994b8a
https://github.com/llvm/llvm-project/commit/1ef499b1fcac81b2d4297ce6a608734706994b8a
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
Log Message:
-----------
AMDGPU/GlobalISel: Fix buffer store RegBankLegalize rules (#179994)
Enable commented out D16 v3f16 tests.
Commit: 3bbb997d4182ae2ba7160e354755e2e7500baff0
https://github.com/llvm/llvm-project/commit/3bbb997d4182ae2ba7160e354755e2e7500baff0
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/test/Analysis/AliasAnalysis/alias-analysis-cray-pointers.fir
M flang/test/Analysis/AliasAnalysis/load-ptr-designate.fir
M flang/test/Analysis/AliasAnalysis/ptr-component.fir
Log Message:
-----------
[flang] Disambiguate descriptor and data addresses in FIR AA. (#179774)
This change basically treats the descriptors' and data loads
as non-aliasing (with one exception) same way as we do it
for the purpose of the TBAA tags generation for LLVM
to do better optimizations. This change enables more LICM in Flang MLIR.
Commit: 1f26c39cfcfa900700d5f1d109e3860b9ffb1f46
https://github.com/llvm/llvm-project/commit/1f26c39cfcfa900700d5f1d109e3860b9ffb1f46
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/test/Transforms/licm.fir
Log Message:
-----------
[flang] Allow fir.field_index and fir.coordinate_of speculation. (#179785)
This change makes `fir.field_index` a Pure operation, and
add support of `ConditionallySpeculatable` interface for
`fir.coordinate_of`. The test demonstrates how this affects
Flang LICM.
Commit: eb9e98f62e0c147482efc310e2a7509c7b07ee4b
https://github.com/llvm/llvm-project/commit/eb9e98f62e0c147482efc310e2a7509c7b07ee4b
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/CMakeLists.txt
M llvm/lib/Target/X86/X86.h
A llvm/lib/Target/X86/X86CleanupLocalDynamicTLS.cpp
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86PassRegistry.def
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
Log Message:
-----------
[NewPM] Port x86-cleanup-local-dynamic-tls (#179864)
Port x86-cleanup-local-dynamic-tls to the new pass manager.
I moved LDTLSCleanup to a new
llvm/lib/Target/X86/X86CleanupLocalDynamicTLS.cpp file and renamed it to
X86CleanupLocalDynamicTLSPass. Then I renamed the legacy pass, and
adding a NewPM wrapper around the impl.
No test coverage added for now as there are no MIR->MIR tests exercising
this pass and we do not have enough ported to run any end to end tests.
Commit: c3db52701e55432f2762724417ddeda79d6dda35
https://github.com/llvm/llvm-project/commit/c3db52701e55432f2762724417ddeda79d6dda35
Author: Derek Schuff <dschuff at chromium.org>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/MC/MCWasmStreamer.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
A llvm/test/CodeGen/WebAssembly/common-error.ll
A llvm/test/MC/WebAssembly/common-error.s
Log Message:
-----------
[MC][Wasm] Emit useful error message when encountering common symbols (#179586)
We don't currently support common symbols for Wasm, and we currently
emit a generic error with a backtrace. Instead, don't crash, and report
the names of the offending symbols.
Commit: 6d53558bb6a2167a96dc84885685ff0e558b8374
https://github.com/llvm/llvm-project/commit/6d53558bb6a2167a96dc84885685ff0e558b8374
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
Log Message:
-----------
[gn build] Port eb9e98f62e0c
Commit: d005cb2953bd7346ce042e11bf583923ffc36713
https://github.com/llvm/llvm-project/commit/d005cb2953bd7346ce042e11bf583923ffc36713
Author: Ruoyu Qiu <cabbaken at outlook.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
A llvm/include/llvm/TargetParser/AVRTargetParser.h
M llvm/include/llvm/TargetParser/Triple.h
A llvm/lib/TargetParser/AVRTargetParser.cpp
M llvm/lib/TargetParser/CMakeLists.txt
A llvm/test/tools/llvm-objdump/ELF/AVR/lit.local.cfg
A llvm/test/tools/llvm-objdump/ELF/AVR/mattr.test
M llvm/tools/llvm-objdump/llvm-objdump.cpp
Log Message:
-----------
[llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (#174731)
This PR updates llvm-objdump to detect the specific AVR architecture
from the ELF header flags when no specific CPU is provided.
Fixes: #146451
---------
Signed-off-by: RuoyuQiu <cabbaken at outlook.com>
Signed-off-by: Ruoyu Qiu <cabbaken at outlook.com>
Co-authored-by: qiuruoyu <qiuruoyu at hygon.cn>
Commit: b4a32db1f2269e7b72687b0a751bcf820c4f8032
https://github.com/llvm/llvm-project/commit/b4a32db1f2269e7b72687b0a751bcf820c4f8032
Author: Rohan Jacob-Rao <rohanjr at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
Log Message:
-----------
[NFC][Clang][unsafe-buffer-usage] Simplify isPtrBufferSafe with helper. (#178768)
Also change parameter type to a reference since it's assumed to be
nonnull.
Commit: 41cc71e9b176d80dc0d3c4f063cd656d8c04176a
https://github.com/llvm/llvm-project/commit/41cc71e9b176d80dc0d3c4f063cd656d8c04176a
Author: jimingham <jingham at apple.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/test/API/python_api/process/cancel_attach/TestCancelAttach.py
Log Message:
-----------
Disable TestCancelAttach.py for linux -> linux remote (#180092)
This test was already disabled going from windows -> linux because it
was timing out there.
The PR: https://github.com/llvm/llvm-project/pull/179799 seems to have
exacerbated whatever this stall was, and now we're seeing it when
debugging from a linux host to a remote linux as well.
The native local host tests works correctly on all the bots that we
have, however. So I'm disabling the remote test till we can figure out
why this is problematic.
Commit: 6c37aa8ffd62a9a7f6585b82bd74a3531d97d3a1
https://github.com/llvm/llvm-project/commit/6c37aa8ffd62a9a7f6585b82bd74a3531d97d3a1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Remove P from RISCVISD::PASUB(U)/PMULHSU/PMULHR(U)/PMULHRSU. NFC (#180064)
There's a good chance we'll want to use these for scalar too.
Drop vector type from SDTypeProfile. Remove PMULHSU since we already
have RISCVISD::MULHSU for scalars in the base ISA.
Commit: 313d9ac1cf92e79df1a7fefdd6900de904f638f0
https://github.com/llvm/llvm-project/commit/313d9ac1cf92e79df1a7fefdd6900de904f638f0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rv32p.ll
Log Message:
-----------
[RISCV] Add wmul(u) codegen for RV32+P (#180032)
mulh tests are to make sure we continue to use mulh when only the
upper half is used.
Commit: 1ad20b942817250135c92aac0721cafd061e8465
https://github.com/llvm/llvm-project/commit/1ad20b942817250135c92aac0721cafd061e8465
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Rename RISCVISD::PPACK_DH->PPAIRE_DB. NFC (#180089)
The instruction was renamed, but we hadn't renamed the ISD opcode.
Commit: 39dba7b354139de6e5a3dd0da7baaffdea33ada1
https://github.com/llvm/llvm-project/commit/39dba7b354139de6e5a3dd0da7baaffdea33ada1
Author: A. Jiang <de34 at live.cn>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M libcxx/include/__algorithm/unwrap_range.h
Log Message:
-----------
[libc++] Fix module builds for `<__algorithm/unwrap_range.h>` (#179887)
3a653afd45709432181952c0ffdb53eceb0939ae removed the inclusion of
`<__utility/declval.h>` from `<__algorithm/unwrap_range.h>`. However,
`unwrap_range.h` still needs to use `std::declval`. So we should restore
the inclusion.
The building failure with Clang modules was already caught by CI.
Commit: b8060ef0479e12dae0449bc6389417a247846118
https://github.com/llvm/llvm-project/commit/b8060ef0479e12dae0449bc6389417a247846118
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/TargetParser/BUILD.gn
Log Message:
-----------
[gn build] Port d005cb2953bd
Commit: 93d92d54815709af8062610bd07284c457ecde18
https://github.com/llvm/llvm-project/commit/93d92d54815709af8062610bd07284c457ecde18
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
A llvm/test/CodeGen/LoongArch/lasx/vxi1-masks.ll
Log Message:
-----------
[LoongArch][NFC] Add tests for vxi1 vector masks used with AND/OR/XOR operations on lasx (#163490)
Commit: 46423d816991e87dcf81ba58bdf90d33b2e63c1b
https://github.com/llvm/llvm-project/commit/46423d816991e87dcf81ba58bdf90d33b2e63c1b
Author: Kito Cheng <kito.cheng at sifive.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/MC/RISCV/rv32p-valid.s
Log Message:
-----------
[RISCV] Fix P-extension instruction names per spec 0.19 (#179961)
Fix instruction naming to match P-extension specification 0.19:
- pnsari.b -> pnsrari.b (Packed Narrowing Shift Right Arithmetic
Rounding)
- pnsari.h -> pnsrari.h
- nsari -> nsrari
- paax.dhx -> paas.dhx (Packed Average Add/Sub, not Add/Add-Cross)
The instruction encodings remain unchanged as they were already correct.
Ref: https://www.jhauser.us/RISCV/ext-P/RVP-baseInstrs-Sail-019.txt
Commit: 2a0b93546138c7250b9c674647150cbe4298e8e9
https://github.com/llvm/llvm-project/commit/2a0b93546138c7250b9c674647150cbe4298e8e9
Author: Eric Christopher <echristo at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/cmake/modules/TableGen.cmake
Log Message:
-----------
[CMake][TableGen] Fix Ninja depslog error with implicit outputs on Ninja <1.10 (#179842)
Ninja versions prior to 1.10 cannot handle depfile mode when CMake
generates build rules with implicit outputs (the `| ${cmake_ninja_workdir}`
syntax used for IDE support). Ninja's depslog interprets these as
multiple outputs and rejects them with the error:
ninja: error: build.ninja:XXXX: multiple outputs aren't (yet?) supported
by depslog; bring this up on the mailing list if it affects you
This primarily affected builds where CMake generates NATIVE subdirectory
builds for host tools.
This patch modifies TableGen.cmake to:
1. Detect the Ninja version at configure time
2. Disable depfile mode (fall back to globbing .td files) when:
- Ninja version is < 1.10, OR
- The tablegen invocation produces multiple outputs (e.g. -gen-register-info)
The fallback mode maintains correct dependency tracking by explicitly
globbing all .td files in include directories, ensuring tablegen reruns
when dependencies change.
Tested with:
- Ninja 1.8.2 (now works - previously failed with depslog error)
- Ninja 1.13.2
- CMake 4.2.3
- build scenarios with NATIVE tool builds
This commit used a significant amount of tooling to construct.
Commit: e3c72cf008a31a8896f6058f99a208d4c877bd96
https://github.com/llvm/llvm-project/commit/e3c72cf008a31a8896f6058f99a208d4c877bd96
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/include/lldb/Core/ModuleList.h
M lldb/include/lldb/Host/HostInfoBase.h
M lldb/source/Core/CoreProperties.td
M lldb/source/Core/ModuleList.cpp
M lldb/source/Host/macosx/objcxx/CMakeLists.txt
M lldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinDevice.cpp
M lldb/source/Plugins/SymbolLocator/DebugSymbols/SymbolLocatorDebugSymbols.cpp
M lldb/unittests/ObjectFile/MachO/CMakeLists.txt
M lldb/unittests/ObjectFile/MachO/TestObjectFileMachO.cpp
Log Message:
-----------
[lldb] Add a new way of loading files from a shared cache (#179881)
Taking advantage of a few new SPI in macOS 26.4 libdyld, it is possible
for lldb to load binaries out of a shared cache binary blob, instead of
needing discrete files on disk. lldb has had one special case where it
has done this for years -- if the debugee process and lldb itself are
using the same shared cache, it could create ObjectFiles based on its
own memory contents. This new method requires only the shared cache on
disk, not depending on it being mapped into lldb's address space
already.
In HostInfoMacOSX.mm, we create an array of binaries in lldb's shared
cache, by one of two methods depending on the availability of SPI/SDKs.
This PR adds a new third method for loading lldb's shared cache off disk
as a proof of concept. It will prefer this new method when the needed
SPI are available at runtime. There is also a user setting to disable
this new method in case we uncover a problem as it is deployed.
I did change the internal store of the shared cache files from a single
array, to being organized by shared cache UUIDs, so we can have multiple
shared caches indexed in the future.
In HostInfoBase.h's SharedCacheImageInfo class, you can now create an
ImageInfo with a DataExtractorSP or a void* baton. I added GetUUID and
GetExtractor methods, and the latter will use the libdyld SPI to map the
segments for a specific binary into lldb's memory and return a
DataExtractorSP.
The setting is currently called symbols.shared-cache-binary-loading.
In DynamicLoaderDarwin::FindTargetModuleForImageInfo there was an
ordering mistake where we would always consult the HostInfoMacOSX.mm
shared cache provider, instead of checking lldb's own global module
cache first when looking for a binary, resulting in creating a new
Module repeatedly for shared cache binaries with the new method, parsing
the symbol table repeatedly. I fixed the ordering so we look at existing
Modules before we check the shared cache for one.
In ObjectFileMachOTest, it tests a TEXT and a DATA symbol, checking that
the contents of the function/data object match the bytes we got from the
shared cache. The test was using a DATA_DIRTY symbol, which was fine
when using lldb's own shared cache memory, but when we worked on the
shared cache binary on-disk directly, we were seeing different values
for the bytes because of relocations in there. I changed this to a
constant DATA symbol.
rdar://148939795
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Co-authored-by: Alex Langford <nirvashtzero at gmail.com>
Commit: 0cb14760da3da9abff861f36507450999525e43d
https://github.com/llvm/llvm-project/commit/0cb14760da3da9abff861f36507450999525e43d
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang-tools-extra/clang-apply-replacements/tool/ClangApplyReplacementsMain.cpp
Log Message:
-----------
[clang-apply-replacements] Change cleanup to only happen with --format (#178763)
Cleanup can result in many unrelated changes to the given replacements.
This change makes that only apply if the user actually wants
clang-apply-replacements to format their code outside of the
replacements.
Commit: 15a30e3acf0a7d1d5e47fddb551463a8b6c770dd
https://github.com/llvm/llvm-project/commit/15a30e3acf0a7d1d5e47fddb551463a8b6c770dd
Author: Snehasish Kumar <mail at snehasish.net>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/test/Transforms/InstCombine/cttz.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[InstCombine][profcheck] Fix profile metadata propagation in takeLog2 (#179331)
Pass the select inst to Builder.CreateSelect so that profile metadata is retained.
Assisted-by: gemini
Commit: 61b8a5783972f03d2a5a72713fa0daa0905802ce
https://github.com/llvm/llvm-project/commit/61b8a5783972f03d2a5a72713fa0daa0905802ce
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/Transforms.h
A mlir/include/mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h
M mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h
M mlir/include/mlir/Dialect/XeGPU/uArch/IntelGpuXe2.h
M mlir/include/mlir/Dialect/XeGPU/uArch/uArchBase.h
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/CMakeLists.txt
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
A mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPeepHoleOptimizer.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
Log Message:
-----------
[MLIR][XeGPU] Refactor layout propagation utilities (#179016)
This PR refactors layout propagation into two distinct components:
result/anchor layout setup and source layout inference from the result.
For operations that require a specific result layout due to semantic or
hardware constraints, the propagation logic explicitly sets up the
result or anchor layout. Otherwise, it infers the source layout from the
backward-propagated consumer layout.
The result or anchor layout may differ from the backward-propagated
consumer layout; any such discrepancies are resolved via the existing
layout-conflict mechanism.
**This PR introduces the following utility functions:**
Source layout inference:
> inferBroadcastSourceLayout()
> inferMultiReductionSourceLayout()
> inferBitCastSourceLayout()
> inferShapeCastSourceLayout()
> inferInsertStridedSliceSourceLayout()
Result / anchor layout setup:
> setupMultiReductionResultLayout()
> setupBitCastResultLayout()
> setupInsertStridedSliceResultLayout()
> setupLoadMatrixAnchorLayout()
> setupStoreMatrixAnchorLayout()
> setupLoadGatherAnchorLayout()
> setupStoreScatterAnchorLayout()
Part of subgroup distribution related code changes are separated and
created as PR https://github.com/llvm/llvm-project/pull/179018/changes.
Commit: 5c2b510f882129fcdb3945842e3d050b068f3cda
https://github.com/llvm/llvm-project/commit/5c2b510f882129fcdb3945842e3d050b068f3cda
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M compiler-rt/test/ubsan/TestCases/Misc/Posix/static-link.cpp
Log Message:
-----------
[ubsan][test] Skip Misc/Posix/static-link.cpp on Solaris (#175464)
The `UBSan-Standalone-x86_64 :: TestCases/Misc/Posix/static-link.cpp`
test currently `FAIL`s on Solaris/x86_64 with
```
ld: fatal: option '-z record' is incompatible with building a static executable
```
One cannot create static executables on Solaris since no `libc.a` is
delivered, so this patch skips the test.
Tested on `x86_64-pc-solaris2.11`.
Commit: f9979199113608e3afe40d49b776a727b2b7923a
https://github.com/llvm/llvm-project/commit/f9979199113608e3afe40d49b776a727b2b7923a
Author: Thurston Dang <thurston at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vcmp.ll
Log Message:
-----------
[msan][NFCI] Add NEON vector compare tests (#177261)
Forked from llvm/test/CodeGen/AArch64/arm64-vcmp.ll
Commit: c41f9568840b654b8496aa44d16395ca57172cb3
https://github.com/llvm/llvm-project/commit/c41f9568840b654b8496aa44d16395ca57172cb3
Author: Thurston Dang <thurston at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[msan][NFCI] Generalize handleAVX512VectorGenericMaskedFP (#179850)
handleAVX512VectorGenericMaskedFP() assumes there is one vector of data
(excluding the mask). This patch generalizes it to allow multiple
vectors of data, which we assume will be munged together.
Future work can apply this to intrinsics such as:
```
<16 x float> @llvm.x86.avx512.mask.scalef.ps.512
(<16 x float>, <16 x float>, <16 x float>, i16, i32)
WriteThru A B Mask Rounding
```
Commit: 7449d32d7e8cf7fea9d3d6561435c627a5f2240f
https://github.com/llvm/llvm-project/commit/7449d32d7e8cf7fea9d3d6561435c627a5f2240f
Author: Snehasish Kumar <mail at snehasish.net>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/add-shl-mul-umax.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[InstCombine][profcheck] Fix profile metadata propagation for umax in InstCombine (#179332)
Select instructions created from the expansion of an umax intrinsic do
not have profile data even though the function may have profile data.
This is because PGO instrumentation does not support intrinsics.
Assisted-by: gemini
Commit: 2d8ce3a31360ddf69937ad123d1c29673ed30daf
https://github.com/llvm/llvm-project/commit/2d8ce3a31360ddf69937ad123d1c29673ed30daf
Author: Fangrui Song <i at maskray.me>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
A lld/test/ELF/eh-frame-invalid-cie.s
A lld/test/ELF/eh-frame-invalid-fde-encoding.s
R lld/test/ELF/invalid-eh-frame.s
R lld/test/ELF/invalid-eh-frame2.s
R lld/test/ELF/invalid-eh-frame3.s
R lld/test/ELF/invalid-eh-frame4.s
R lld/test/ELF/invalid-eh-frame5.s
R lld/test/ELF/invalid-eh-frame6.s
R lld/test/ELF/invalid-eh-frame7.s
R lld/test/ELF/invalid-eh-frame8.s
R lld/test/ELF/invalid-eh-frame9.s
Log Message:
-----------
[ELF][test] Consolidate invalid-eh-frame tests
Merge 9 individual invalid-eh-frame test files into 2 categorized files
using split-file:
- eh-frame-invalid-cie.s: CIE structure errors (too small, unexpected
end, failed string/LEB128 reads)
- eh-frame-invalid-fde-encoding.s: EhReader::getFdeEncoding errors
(unknown augmentation string, unknown FDE encoding, unsupported
aligned encoding, corrupted CIE)
Commit: 3392ec8cf17ce90fe0859ae31e86cf48f8fa185d
https://github.com/llvm/llvm-project/commit/3392ec8cf17ce90fe0859ae31e86cf48f8fa185d
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/fma-relu-contract.ll
Log Message:
-----------
[NVPTX] Remove `NoSignedZerosFPMath` uses (#180086)
Users should use `nsz` flag instead.
Commit: 3fd046440c521d06fac9182a05eda5a58a03215f
https://github.com/llvm/llvm-project/commit/3fd046440c521d06fac9182a05eda5a58a03215f
Author: Thurston Dang <thurston at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/AArch64/aarch64-bf16-dotprod-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/aarch64-matmul.ll
Log Message:
-----------
[msan] Handle NEON bfmmla (#176264)
This patch adapts handleNEONMatrixMultiply() (used for integer matrix
multiply: smmla/ummla/usmmla) to floating-point (bfmmla).
Commit: 22c5c2583dc9fcd9df7c648c810b4a3233cfc42e
https://github.com/llvm/llvm-project/commit/22c5c2583dc9fcd9df7c648c810b4a3233cfc42e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Reorder the operands for RISCVISD::PPAIRE_DB. NFC (#180111)
Order the operands so the the low and high part of the rs1 regpair are
first, followed by the low and high part of the rs2 regpair.
Also change the type to use v4i8 for the result so that it's only
shuffling elements not combining elements into a larger elment.
I'm planning to add ADDD and SUBD opcodes that will be defined with the
same operand order allowing RISCVISelDAGToDAG.cpp code to be shared.
Commit: d289020a10fe53421214ef9271276615aaea8923
https://github.com/llvm/llvm-project/commit/d289020a10fe53421214ef9271276615aaea8923
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Correct `uitofp` example (#180123)
The to type is incorrect, use `float` instead.
Commit: 295b0ef7b9aa345867e458912c8ade3f55a41f99
https://github.com/llvm/llvm-project/commit/295b0ef7b9aa345867e458912c8ade3f55a41f99
Author: Michael Park <mcypark at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/PCH/reloc.c
Log Message:
-----------
[C++20][Modules] Fix relocatable PCH feature. (#180023)
Commit: 43358cb3d67cbb94566f094ca9c8ec1c4d76975a
https://github.com/llvm/llvm-project/commit/43358cb3d67cbb94566f094ca9c8ec1c4d76975a
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/records.cpp
Log Message:
-----------
[clang][bytecode] Check pointer lifetime in CheckDestructor (#179957)
So we diagnose double-destroy scenarios.
Commit: d99f1cdd66582d09c82a998f20534cf87c01b7ff
https://github.com/llvm/llvm-project/commit/d99f1cdd66582d09c82a998f20534cf87c01b7ff
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
Log Message:
-----------
[RISCV][llvm] Support INSERT_VECTOR_ELT codegen for P extension (#179471)
Add custom lowering for INSERT_VECTOR_ELT on P extension vector types
using the MVM instruction.
TODO: Handle <4 x i8> on RV64 which is constructed to extract_vector_elt
+ build_vector instead of insert_vector_elt.
Commit: cc4b98e505f92fe50823b8202b3c14af5456699d
https://github.com/llvm/llvm-project/commit/cc4b98e505f92fe50823b8202b3c14af5456699d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/bitcast-vector-bool.ll
Log Message:
-----------
[X86] combineSetCC - attempt to match more complex icmp_eq/ne patterns before falling back to PTEST/PMOVMSKB patterns (#180034)
combineVectorSizedSetCCEquality attempts to convert equality comparisons
of larger-than-legal scalar integers to PTEST/PMOVMSKB vector
comparisons.
However, combineSetCC has a number of other folds with more complex
icmp_eq/ne patterns that work with big integers (including bit test and
reduction patterns) that don't get a change to match as
combineVectorSizedSetCCEquality is run first, and the other folds are
then more difficult to match from PTEST/PMOVMSKB nodes.
This patch moves the combineVectorSizedSetCCEquality fold later to give
other icmp_eq/ne folds a chance to run first.
Commit: 72119384923c23b99193f2988b843619e2b1cfcc
https://github.com/llvm/llvm-project/commit/72119384923c23b99193f2988b843619e2b1cfcc
Author: Thurston Dang <thurston at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[msan][NFCI] Refactor icmp eq/ne into propagateEqualityComparison() (#180115)
This will be useful for handling switch
(https://github.com/llvm/llvm-project/pull/179851).
Commit: 4092a6398c1a8d7665c65fe8a224dab2af3bb40d
https://github.com/llvm/llvm-project/commit/4092a6398c1a8d7665c65fe8a224dab2af3bb40d
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86.h
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86IndirectBranchTracking.cpp
M llvm/lib/Target/X86/X86PassRegistry.def
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
Log Message:
-----------
[NewPM] Port x86-indirect-branch-tracking (#179874)
Similar to other portings created by @aidenboom154. No specific test
coverage as there are no MIR->MIR tests that exercise this pass.
Commit: 0d52536b048b1b5af0734d6de3f44ff5feb770b5
https://github.com/llvm/llvm-project/commit/0d52536b048b1b5af0734d6de3f44ff5feb770b5
Author: Fangrui Song <i at maskray.me>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
A lld/test/ELF/eh-frame-fde-encoding.s
M lld/test/ELF/eh-frame-invalid-fde-encoding.s
R lld/test/ELF/eh-frame-value-format1.s
R lld/test/ELF/eh-frame-value-format2.s
R lld/test/ELF/eh-frame-value-format3.s
R lld/test/ELF/eh-frame-value-format4.s
R lld/test/ELF/eh-frame-value-format5.s
R lld/test/ELF/eh-frame-value-format6.s
R lld/test/ELF/eh-frame-value-format7.s
R lld/test/ELF/eh-frame-value-format8.s
R lld/test/ELF/eh-frame-value-format9.s
Log Message:
-----------
[ELF][test] Consolidate .eh_frame FDE encoding tests
Merge eh-frame-value-format{1..9}.s into eh-frame-fde-encoding.s
(encoding is the DWARF term) using split-file. Add .eh_frame and
.eh_frame_hdr content verification for absptr, udata2, sdata4, udata4.
Move error test (9) to eh-frame-invalid-fde-encoding.s.
Commit: a8829d5a104cd9b180b101f27a387fa73ba76a10
https://github.com/llvm/llvm-project/commit/a8829d5a104cd9b180b101f27a387fa73ba76a10
Author: NeKon69 <nobodqwe at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang-tools-extra/clangd/Protocol.cpp
M clang-tools-extra/clangd/test/call-hierarchy.test
Log Message:
-----------
[clangd] Fix call hierarchy crash on malformed request (#179718)
The code for parsing a call hierarchy request was not using `ObjectMapper`
correctly: it was calling `map()` without first calling `operator bool()` to
check that an object was parsed at all.
Fixes #179109
Commit: d50cf09520fad320ef1fef0c1210163d770142dc
https://github.com/llvm/llvm-project/commit/d50cf09520fad320ef1fef0c1210163d770142dc
Author: JaydeepChauhan14 <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/test/CodeGen/X86/combine-adc.ll
Log Message:
-----------
Precommit test for combine ADC(ADD(X,Y),0,Carry) -> ADC(X,Y,Carry) (#177539)
**Reference PR-** https://github.com/llvm/llvm-project/pull/176713
Commit: a6f026414d4dc44c0741bcc0fc4dd3fd3558ead8
https://github.com/llvm/llvm-project/commit/a6f026414d4dc44c0741bcc0fc4dd3fd3558ead8
Author: Nishant Sachdeva <32475507+nishant-sachdeva at users.noreply.github.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-bindings.py
M llvm/tools/llvm-ir2vec/Bindings/PyIR2Vec.cpp
Log Message:
-----------
[llvm-ir2vec] Adding FuncEmb API to ir2vec python bindings (#179908)
Adding FuncEmb API to ir2vec python bindings. Provide the IR name of a
function, and the API returns the func Embedding for it.
Commit: 7bef2cdec6038c6483f0b3dc2e8332191804f9b4
https://github.com/llvm/llvm-project/commit/7bef2cdec6038c6483f0b3dc2e8332191804f9b4
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/docs/CodingStandards.rst
Log Message:
-----------
[llvm] Update policy for Doxygen comments in the Coding Standards (#179898)
This PR updates the policy regarding Doxygen comments in the Coding
Standards based on an RFC discussion on Discourse:
https://discourse.llvm.org/t/rfc-policy-for-doxygen-comments-in-lldb/89675/
Commit: edebc7544ee17e0f6ee56077307029fd92d460f2
https://github.com/llvm/llvm-project/commit/edebc7544ee17e0f6ee56077307029fd92d460f2
Author: Tomás Longeri <tlongeri at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
Log Message:
-----------
Fix Bazel build for ba58225 (#180136)
Commit: 555390c178fff5194aff7b5f13145f3b7fab1477
https://github.com/llvm/llvm-project/commit/555390c178fff5194aff7b5f13145f3b7fab1477
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
Log Message:
-----------
[NFC][LowerMemIntrinsics] Use TypeSize consistently for type sizes (#179945)
PR #169040 already started using `TypeSize` for the return value of
`DataLayout::getType*Size` in the memset lowering, this PR adjusts other uses
in LowerMemIntrinsics to do the same. Currently, scalable vector types are not
supported as access types for the mem-intrinsic lowering.
Commit: 5654ecd5ddeb2f40e124a6bf10cc78230da4ef49
https://github.com/llvm/llvm-project/commit/5654ecd5ddeb2f40e124a6bf10cc78230da4ef49
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
A llvm/test/CodeGen/X86/div_i129_v_pow2k.ll
Log Message:
-----------
[DAGCombiner] Fix exact power-of-two signed division for large integers (#177340)
Previously, the DAG combiner did not optimize exact signed division by a
power-of-two constant divisor for integer types exceeding the size of
division supported by the target architecture (e.g., i128 on x86-64).
However, such an optimization was expected by the division expansion
logic, leading to unsupported division operations making it to
instruction selection.
This commit addresses this issue by making an exception to the existing
exclusion of signed division with the exact flag for the aforementioned
operations. That is, the DAG combiner will now optimize exact signed
division if the divisor is a power-of-two constant and the integer type
exceeds the size of division supported by the target architecture.
---------
Signed-off-by: Steffen Holst Larsen <HolstLarsen.Steffen at amd.com>
Commit: 6f5b84232c4ce5d724029cde25662e4968e4ec26
https://github.com/llvm/llvm-project/commit/6f5b84232c4ce5d724029cde25662e4968e4ec26
Author: Anshul Nigham <nigham at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
Fix Bazel build for d005cb2 (#180134)
Co-authored-by: Pranav Kant <prka at google.com>
Commit: 743116acd99cb4b9e1df9072808f219d85e9ce2e
https://github.com/llvm/llvm-project/commit/743116acd99cb4b9e1df9072808f219d85e9ce2e
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Add missing dependency for 61b8a5783972f03d2a5a72713fa0daa095802ce (#180145)
Commit: 15737387c7afdf774bb2aba1b563b9c1de885bb9
https://github.com/llvm/llvm-project/commit/15737387c7afdf774bb2aba1b563b9c1de885bb9
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
Log Message:
-----------
[bazel] Run builidifer. NFC.
Commit: 95f5269a095d010e8f1f7cf84f85d398b69f8a12
https://github.com/llvm/llvm-project/commit/95f5269a095d010e8f1f7cf84f85d398b69f8a12
Author: Matt <MattPD at users.noreply.github.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/lib/Lower/ConvertType.cpp
M flang/lib/Optimizer/Builder/CMakeLists.txt
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/test/Lower/HLFIR/cray-pointers.f90
M flang/test/Lower/HLFIR/proc-pointer-comp-pass.f90
M flang/test/Lower/default-initialization.f90
A flang/test/Lower/derived-type-sequence-alias-assign.f90
M flang/test/Lower/polymorphic.f90
M flang/unittests/Optimizer/CMakeLists.txt
Log Message:
-----------
[flang] Use alias analysis in lowering record assignments (#180010)
Without alias analysis Flang assumes no aliasing in lowering record
assignments which can result in miscompilation of programs using
SEQUENCE types and EQUIVALENCE.
Use alias analysis to guard the fast path in `genRecordAssignment`;
otherwise fall back to element-wise expansion.
Update FIR FileCheck expectations
Add `FIRAnalysis` to `"flang/unittests/Optimizer/CMakeLists.txt"` to fix
the Windows x64 build failure (linker error).
Add `SEQUENCE` handling and update tests accordingly.
Fixes #175246 (and includes the fix to
flang/lib/Optimizer/Builder/CMakeLists.txt in PR #176483).
Co-authored-by: Matt P. Dziubinski <matt-p.dziubinski at hpe.com>
Commit: b02a6363e8950904b81ba1eff1f4d5d0dd296c69
https://github.com/llvm/llvm-project/commit/b02a6363e8950904b81ba1eff1f4d5d0dd296c69
Author: David Spickett <david.spickett at arm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/tools/driver/Options.td
Log Message:
-----------
[lldb] Remove --debug/-d option from lldb (#179978)
The functionality was removed in
d3173f4ab61c17337908eb7df3f1c515ddcd428c after being broken for a long
time.
There's a small risk someone is still passing the option, but I think
it's time to remove it and they can fix their scripts.
Commit: 7037e6e0a4966b65598680b9b7b51714591b5936
https://github.com/llvm/llvm-project/commit/7037e6e0a4966b65598680b9b7b51714591b5936
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/lib/Lower/ConvertType.cpp
M flang/lib/Optimizer/Builder/CMakeLists.txt
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/test/Lower/HLFIR/cray-pointers.f90
M flang/test/Lower/HLFIR/proc-pointer-comp-pass.f90
M flang/test/Lower/default-initialization.f90
R flang/test/Lower/derived-type-sequence-alias-assign.f90
M flang/test/Lower/polymorphic.f90
M flang/unittests/Optimizer/CMakeLists.txt
Log Message:
-----------
Revert "[flang] Use alias analysis in lowering record assignments" (#180150)
Reverts llvm/llvm-project#180010
Still breaking builds
Commit: 4af27b06f517cec52b14e72a30a8a9185b662086
https://github.com/llvm/llvm-project/commit/4af27b06f517cec52b14e72a30a8a9185b662086
Author: Kiran <kiran.sturt at arm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CGExprScalar.cpp
A clang/test/CodeGen/compound-assign-atomic-bool.c
Log Message:
-----------
[Clang] Fix atomic boolean compound assignment (#178220)
Fixes #33210
Commit: 9d11a6670e59d1daf219f2c2717e4fc3a6c19c5f
https://github.com/llvm/llvm-project/commit/9d11a6670e59d1daf219f2c2717e4fc3a6c19c5f
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/test/CodeGen/AMDGPU/freeze.ll
Log Message:
-----------
AMDGPU/GlobalISel: Regbanklegalize rules for G_FREEZE (#179796)
Move G_FREEZE handling to AMDGPURegBankLegalizeRules.cpp.
Added support for uniform S1.
Commit: 8cc06421a547bd757e7467ab79ddf14befdd5d0d
https://github.com/llvm/llvm-project/commit/8cc06421a547bd757e7467ab79ddf14befdd5d0d
Author: Abhinav Garg <39309352+abhigargrepo at users.noreply.github.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f64.ll
Log Message:
-----------
Adding support for G_STRICT_FMA in new reg bank select (#170330)
This patch adds legalization rules for G_STRICT_FMA opcode.
---------
Co-authored-by: Abhinav Garg <abhigarg at amd.com>
Commit: d64a609b2bbb46d8f2ffdb2252c5880bed74941c
https://github.com/llvm/llvm-project/commit/d64a609b2bbb46d8f2ffdb2252c5880bed74941c
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86.h
Log Message:
-----------
[NewPM] Uninitialize x86-cleanup-local-dynamic-tls in llvm/lib/Target/X86/X86.h (#180122)
I believe I exposed in
https://github.com/llvm/llvm-project/pull/179864/changes#diff-5b9707ff829bc5b6523a59982f375d99d6b4ded670fbd91dd095555f4ac80a14R428
. Getting rid of it to avoid possible undefined reference/linker errors.
Commit: b738491d2ff950391486140dd39747dd30e5c0c1
https://github.com/llvm/llvm-project/commit/b738491d2ff950391486140dd39747dd30e5c0c1
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
A llvm/test/CodeGen/AMDGPU/memory-legalizer-non-volatile.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.mir
Log Message:
-----------
[AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (#179413)
- Add `MONonVolatile` MachineMemOperand flag.
- Set nv=1 on memory operations on GFX12.5 if the operation accesses a
constant address space,
is an invariant load, or has the `MONonVolatile` flag set.
Commit: 33a2c3ee9ce5db57b9becc244bed834cd72a6cc2
https://github.com/llvm/llvm-project/commit/33a2c3ee9ce5db57b9becc244bed834cd72a6cc2
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
Log Message:
-----------
[VPlan] Ignore poison incoming values when creating blend (#180005)
We have an optimization in VPPredicator when creating blends where if
all the incoming values are the same, we just return that value.
This extends it to handle cases like "phi [%x, %x, poison, %x]" by
ignoring poison values.
This is split off from #176143 to prevent regressions when maintaining
SSA by adding PHIs with a poison incoming value.
Commit: 3f4d94fd4cc1c6c07720eb784ca269a69e19a96f
https://github.com/llvm/llvm-project/commit/3f4d94fd4cc1c6c07720eb784ca269a69e19a96f
Author: Julian Pokrovsky <raventid at users.noreply.github.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/AArch64/select-shuffle.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-binops.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-cmps.ll
Log Message:
-----------
[VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (#179429)
Resolves #173035
Commit: 6824db46c635cca8a2d7013e0e22fece470967e7
https://github.com/llvm/llvm-project/commit/6824db46c635cca8a2d7013e0e22fece470967e7
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/agpr-spill-copy.mir
M llvm/test/CodeGen/AMDGPU/av-spill-expansion-with-machine-cp.mir
M llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
M llvm/test/CodeGen/AMDGPU/bug-undef-spilled-agpr.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
M llvm/test/CodeGen/AMDGPU/frame-index.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir
M llvm/test/CodeGen/AMDGPU/kernel-mubuf-with-voffset.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain-preserve.mir
M llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain.mir
M llvm/test/CodeGen/AMDGPU/pei-build-av-spill.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill-offset-overflow-gfx950.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill.mir
M llvm/test/CodeGen/AMDGPU/pei-reg-scavenger-position.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/pei-vgpr-block-spill-csr.mir
M llvm/test/CodeGen/AMDGPU/regalloc-introduces-copy-sgpr-to-agpr.mir
M llvm/test/CodeGen/AMDGPU/same-slot-agpr-sgpr.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-vmem-large-frame.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/spill-agpr-partially-undef.mir
M llvm/test/CodeGen/AMDGPU/spill-agpr.mir
M llvm/test/CodeGen/AMDGPU/spill-reg-tuple-super-reg-use.mir
M llvm/test/CodeGen/AMDGPU/spill-restore-partial-copy.mir
M llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir
M llvm/test/CodeGen/AMDGPU/spill-to-agpr-partial.mir
M llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir
M llvm/test/CodeGen/AMDGPU/spillv16.ll
M llvm/test/CodeGen/AMDGPU/spillv16.mir
M llvm/test/CodeGen/AMDGPU/tied-op-for-wwm-scratch-reg-spill-restore.mir
M llvm/test/CodeGen/AMDGPU/vector-spill-restore-to-other-vector-type.mir
M llvm/test/CodeGen/AMDGPU/vgpr-spill-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/vgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/wait-xcnt-atomic-rmw-optimization.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-functions-pei.mir
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
Log Message:
-----------
[AMDGPU] Set MOThreadPrivate on memory accesses for spills (#179414)
Mark the memory operand of spill load/stores as MOThreadPrivate, so that
these loads and stores are emitted with `nv` set.
The reason is that scratch memory used by spills will never be shared by
another thread. It's purely thread local and thus a good fit for the
`nv` bit, which is controlled by the MOThreadPrivate flag.
Commit: dfcb0bed1d4e1aa51bb4bdec6466ef10595af0db
https://github.com/llvm/llvm-project/commit/dfcb0bed1d4e1aa51bb4bdec6466ef10595af0db
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
Log Message:
-----------
[AArch64] NFC: Replace CTTZ_ELTS predicate pattern with predicate. (#179909)
This also swaps the general predicate and source operand, to match other
nodes.
Follow-up from
https://github.com/llvm/llvm-project/pull/178674#discussion_r2767753614
Commit: d4638ad3e9be6dfcdd21b495aedb4285c85b90ca
https://github.com/llvm/llvm-project/commit/d4638ad3e9be6dfcdd21b495aedb4285c85b90ca
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InstCombine/double-float-shrink-1.ll
M llvm/test/Transforms/InstCombine/sqrt.ll
Log Message:
-----------
InstCombine: Only propagate callsite attributes in sqrt->sqrtf (#180160)
This was propagating the callee's attributes instead of just the
callsite. It's illegal to set denormal_fpenv on a callsite. This
was also losing callsite attributes which may have been more useful;
there's no point in setting the callee's attributes on the callsite.
Commit: 4f90eb64277c6e618c287e2bf5113003202e119b
https://github.com/llvm/llvm-project/commit/4f90eb64277c6e618c287e2bf5113003202e119b
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll
M llvm/test/Transforms/LoopVectorize/conditional-scalar-assignment-vplan.ll
M llvm/unittests/Analysis/IVDescriptorsTest.cpp
Log Message:
-----------
[LV] Support conditional scalar assignments of masked operations (#178862)
This patch extends the support added in #158088 to loops where the
assignment is non-speculatable (e.g. a conditional load or divide).
For example, the following loop can now be vectorized:
```
int simple_csa_int_load(
int* a, int* b, int default_val, int N, int threshold)
{
int result = default_val;
for (int i = 0; i < N; ++i)
if (a[i] > threshold)
result = b[i];
return result;
}
```
It does this by extending the recurrence matching from only looking for
selects, to include phis where all operands are the header phi, except
for one which can be an arbitrary value outside the recurrence.
Commit: 0287d789e0e3e3d0828b0b7d81b423d9c0447a0b
https://github.com/llvm/llvm-project/commit/0287d789e0e3e3d0828b0b7d81b423d9c0447a0b
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/ExpandIRInsts.cpp
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/X86/expand-large-fp-optnone.ll
M llvm/test/Transforms/ExpandIRInsts/X86/expand-int-convert-small.ll
M llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-si129tofp.ll
M llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-ui129tofp.ll
M llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-optnone.ll
Log Message:
-----------
[ExpandIRInsts] Freeze input in itofp expansion (#180157)
We are introducing branches on the value, and branch on undef/poison is
UB, so the value needs to be frozen.
Commit: 85db121bcf47e6271e973865234ee97bfa966200
https://github.com/llvm/llvm-project/commit/85db121bcf47e6271e973865234ee97bfa966200
Author: Marcell Leleszi <mleleszi at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M libc/src/__support/CMakeLists.txt
M libc/src/__support/wctype_utils.h
M libc/test/src/__support/CMakeLists.txt
A libc/test/src/__support/wctype_utils_test.cpp
Log Message:
-----------
[libc][wctype] Implement internal UTF8 wctype classification functions (#174607)
Closes [#174604](https://github.com/llvm/llvm-project/issues/174604)
This patch implements the internal wide character classification
functions with Unicode support.
The ASCII paths which were not implemented are taken from
[ctype_utils.h](https://github.com/llvm/llvm-project/blob/main/libc/src/__support/ctype_utils.h)
The tests mainly cover the dispatch logic between ASCII and UTF8, the
UTF8 variants are already comprehensively tested in
[wctype_classification_utils_test.cpp](https://github.com/mleleszi/llvm-project/blob/main/libc/test/src/__support/wctype/wctype_classification_utils_test.cpp).
Commit: bde4754bc48029398b5ba22b4478a6b0202ab827
https://github.com/llvm/llvm-project/commit/bde4754bc48029398b5ba22b4478a6b0202ab827
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/tools/lldb-dap/Handler/DisassembleRequestHandler.cpp
Log Message:
-----------
[lldb-dap] Remove end line and column from disassemble response (#180037)
The end line entry calculated from the instruction's end address is
unreliable and could produce incorrect source ranges. especially if the
instruction spans multiple lines.
We can end in situations where the current end line is the next start
line and the source line is show to the client twice. confusing users
what maps to what.
| With EndLine |
| :------------: |
| <img width="892" height="486" alt="Screenshot 2026-02-05 at 21 37 08"
src="https://github.com/user-attachments/assets/f2fef592-5754-4168-bf93-2baba4742c5d"
/> |
| Without Endline |
| :---------------: |
| <img width="892" height="486" alt="Screenshot 2026-02-05 at 21 59 29"
src="https://github.com/user-attachments/assets/538dd462-9c7f-4483-804c-65fd83b5f2f2"
/>|
Or the endline is smaller than the startline.
```json
{
"address": "0x5555555557B4",
"column": 3,
"endLine": 2,
"instruction": "add rsp, 0x20 ",
"instructionBytes": "48 83 c4 20",
"line": 17,
"location": {
"name": "test.cpp",
"path": "/buildbot/test_process/test.cpp"
}
},
```
Commit: 689c99557f3dd22b3910899e0b9ed6a340269384
https://github.com/llvm/llvm-project/commit/689c99557f3dd22b3910899e0b9ed6a340269384
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/load-shufflevector.ll
Log Message:
-----------
[VectorCombine] Skip dead shufflevector in GetIndexRangeInShuffles to fix crash. (#179217)
Update GetIndexRangeInShuffles to skip unused shuffles. This matches the
behavior in the loop below and without it, we end up with an index
mis-match, causing a crash for the added test case.
PR: https://github.com/llvm/llvm-project/pull/179217
Commit: 197bfa9a74d229bb5c5574ea50d8cc30382c4a2d
https://github.com/llvm/llvm-project/commit/197bfa9a74d229bb5c5574ea50d8cc30382c4a2d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
A llvm/test/CodeGen/X86/select-big-integer.ll
Log Message:
-----------
[X86] Add tests showing potential for vectorising i128/256/512 select nodes (#180173)
Commit: f6a9cbb6e573b08e85b2f698eea88c58bdab1b43
https://github.com/llvm/llvm-project/commit/f6a9cbb6e573b08e85b2f698eea88c58bdab1b43
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/Analysis/CostModel/AArch64/bswap.ll
Log Message:
-----------
[AArch64][SDAG] Legalise BSWAP for Neon types. (#179702)
GlobalISel legalised BSWAP for Neon types in #80036.
Legalising the types keeps them from being expanded to vector_shuffle
before being matched to REVs, and allows half-rotations on i16 vectors
to be combined to bswap (see
https://github.com/llvm/llvm-project/pull/178706#discussion_r2742804463).
Commit: c09bb7bd4065c7f454a5f9df60a064f670a54871
https://github.com/llvm/llvm-project/commit/c09bb7bd4065c7f454a5f9df60a064f670a54871
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CoreEngine.h
M clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
Log Message:
-----------
[NFC][analyzer] Remove IndirectGotoNodeBuilder::iterator (#180167)
My recent commit b96ef9c97bee44017bd832efab899ba1ed1f9b8f removed a
needlessly overcomplicated iterator class from SwitchNodeBuilder; this
commit repeats the same cleanup for IndirectGotoNodeBuilder.
(This is just for the sake of consistency -- I don't have plans to work
on indirect goto handling.)
Commit: fdce0ea70848ee71a25304b203b5209ba3d11b7b
https://github.com/llvm/llvm-project/commit/fdce0ea70848ee71a25304b203b5209ba3d11b7b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
Log Message:
-----------
[VPlan] Add ExitingIVValue VPInstruction. (#175651)
Add a new VPInstruction opcode to compute the exiting value of an
induction variable after vectorization. This replaces the pattern of
extracting the last lane from the last part of the induction backedge
value when applicable.
This allows us to always use the pre-computed IV end value. It will also
allow unifying end value creation for both induction resume and exit
values.
PR: https://github.com/llvm/llvm-project/pull/175651
Commit: 56c875a84231fdf84e9e72aa8bb5766cfe0a734c
https://github.com/llvm/llvm-project/commit/56c875a84231fdf84e9e72aa8bb5766cfe0a734c
Author: Kiran <kiran.sturt at arm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CGExprScalar.cpp
R clang/test/CodeGen/compound-assign-atomic-bool.c
Log Message:
-----------
Revert "[Clang] Fix atomic boolean compound assignment (#33210)" (#180183)
Reverts llvm/llvm-project#178220
Commit: 2ba1eba4be3f5225a5dde6223c434a8bd24bb9b6
https://github.com/llvm/llvm-project/commit/2ba1eba4be3f5225a5dde6223c434a8bd24bb9b6
Author: Marcell Leleszi <mleleszi at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M libc/src/__support/CMakeLists.txt
M libc/src/__support/wctype_utils.h
M libc/test/src/__support/CMakeLists.txt
R libc/test/src/__support/wctype_utils_test.cpp
Log Message:
-----------
Revert "[libc][wctype] Implement internal UTF8 wctype classification functions" (#180186)
Reverts llvm/llvm-project#174607
Breaks libc++
Commit: 4096cb60175a3bfdde25dd0cca167416f4f4338e
https://github.com/llvm/llvm-project/commit/4096cb60175a3bfdde25dd0cca167416f4f4338e
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M offload/plugins-nextgen/common/CMakeLists.txt
Log Message:
-----------
[OFFLOAD] Fix TARGET_NAME in plugins common code (#180151)
Unlike other names is set between quotes which prevents our debug macros
to properly match it.
Commit: f735aa061b4c2df5462285583eb8aaa134476b53
https://github.com/llvm/llvm-project/commit/f735aa061b4c2df5462285583eb8aaa134476b53
Author: Christopher Di Bella <cjdb at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M libcxx/include/__vector/vector.h
Log Message:
-----------
[libc++] Tighten `__add_alignment_assumption` return type (#180090)
`__add_alignment_assumption` unilaterally returned a `pointer`, even
when passed a `const_pointer`. This was surfaced by some (but not all)
CI jobs when rebasing `std::vector` to have a layout type.
Commit: 2cbdb5bf3e1b0f5c9d135a8b53815c34ba0ce3ce
https://github.com/llvm/llvm-project/commit/2cbdb5bf3e1b0f5c9d135a8b53815c34ba0ce3ce
Author: Nicole Aschenbrenner <nicole.aschenbrenner at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/Driver/openmp-target-fast-flag.c
Log Message:
-----------
[clang][OpenMP] Add OpenMP GPU optimization flag framework (#178914)
This patch series adds a framework of OpenMP GPU optimization flags to
enable more efficient code generation for GPU offloading. The series
consists of three patches:
1. Add negative flag variants (-fno-*) for existing assume options to
allow explicit disabling of optimizations.
2. Add -fopenmp-target-ignore-env-vars flag to indicate that OpenMP
runtime can ignore environment variables during code generation,
enabling optimizations like skipping runtime checks and eliminating
conditional branches.
3. Add -fopenmp-target-fast meta-flag that implies the above
optimization flags. This convenience flag is automatically enabled by
-Ofast and provides a simple interface for aggressive GPU optimizations.
The flags benefit all GPU targets (NVPTX, AMDGPU, Intel GPU) by
providing a standard way to enable common GPU optimization patterns.
Individual flags can be selectively overridden while keeping others
enabled.
Commit: 20b5849e176d73ffe6959e01d196ebbb0f49e5cf
https://github.com/llvm/llvm-project/commit/20b5849e176d73ffe6959e01d196ebbb0f49e5cf
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/include/clang/Basic/OffloadArch.h
M clang/lib/Basic/OffloadArch.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Driver/amdgpu-mcpu.cl
M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
M flang-rt/CMakeLists.txt
M libclc/CMakeLists.txt
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/TargetParser/TargetParser.h
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
M llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
M llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[AMDGPU] Define new target gfx1170 (#180185)
Commit: 2791f42a0410d6997335700b3207071a951b5b86
https://github.com/llvm/llvm-project/commit/2791f42a0410d6997335700b3207071a951b5b86
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/source/Plugins/Platform/FreeBSD/PlatformFreeBSD.cpp
M lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
M lldb/source/Plugins/Process/Utility/CMakeLists.txt
R lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.cpp
R lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h
R lldb/source/Plugins/Process/Utility/lldb-mips-freebsd-register-enums.h
M lldb/source/Plugins/Process/elf-core/CMakeLists.txt
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
R lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_mips64.cpp
R lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_mips64.h
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
Log Message:
-----------
[lldb][Process] Remove mips64 POSIX support (#179987)
Since ce03a862372a6f36d2fcf80dc80052aa155fcae8 and
427bb1cc1b09ea68b8a13a667810681ba4074f6b, mips64 support for POSIX is
orphaned. Remove any POSIX_mips64 code and other code we missed in those
commits.
---------
Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
Commit: 901d175d18f520f35bd0f7f48ac0fb3bd1541157
https://github.com/llvm/llvm-project/commit/901d175d18f520f35bd0f7f48ac0fb3bd1541157
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/cse-casts.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags-interleave.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_and.ll
Log Message:
-----------
[VPlan] Simplify x & AllOnes -> x (#180049)
Commit: 22a16623e14a900fffefd91fd7b07118a8040470
https://github.com/llvm/llvm-project/commit/22a16623e14a900fffefd91fd7b07118a8040470
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Fix comments in simplifyRecipe around BinaryOr (NFC) (#180050)
Commit: bc706338c11af35d17af996409fd804f92a51207
https://github.com/llvm/llvm-project/commit/bc706338c11af35d17af996409fd804f92a51207
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD/NativeRegisterContextFreeBSD_arm64.cpp
M lldb/source/Plugins/Process/FreeBSD/NativeRegisterContextFreeBSD_arm64.h
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb] [Process/FreeBSD] Assume minimum is FreeBSD 14 (#179587)
Currently versions under 13 are EOLed (see [FreeBSD Release
Information](https://www.freebsd.org/releases/)).
FreeBSD 13 will be EOLed by April 30th (see [Supported FreeBSD
releases](https://www.freebsd.org/security/#sup)) while LLVM 23 is
expected to be released in August 25th according to the LLVM calendar.
Thus assumed that minimum supported FreeBSD version is 14.
Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
Commit: 3473cf589e701bb484f292d87188995addd769b0
https://github.com/llvm/llvm-project/commit/3473cf589e701bb484f292d87188995addd769b0
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Process/Utility/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Plugins/Process/elf-core/BUILD.gn
Log Message:
-----------
[gn build] Port 2791f42a0410
Commit: ba51c8859ca81fe0164b7c561887f2e88f6261de
https://github.com/llvm/llvm-project/commit/ba51c8859ca81fe0164b7c561887f2e88f6261de
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/utils/TableGen/CIRLoweringEmitter.cpp
Log Message:
-----------
[CIR][NFC] Remove LowerModule from LowerToLLVM (#179971)
This patch removes `cir::LowerModule` from the `LowerToLLVM` pass.
Commit: 8c5bdf97029e09bbc98e5cd8bba150e3c5f80ba0
https://github.com/llvm/llvm-project/commit/8c5bdf97029e09bbc98e5cd8bba150e3c5f80ba0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
M llvm/test/MC/AMDGPU/gfx1250_asm_sopp.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_sopp.txt
Log Message:
-----------
AMDGPU: Correct value and name for ID_RTN_SAVE_WAVE_HAS_TDM (#180181)
Commit: 2f00977feaa827e80206253811dfe5e51d679387
https://github.com/llvm/llvm-project/commit/2f00977feaa827e80206253811dfe5e51d679387
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M offload/plugins-nextgen/common/include/RPC.h
M offload/plugins-nextgen/common/src/RPC.cpp
Log Message:
-----------
[Offload] Make the RPC callbacks private to each running server (#178901)
Summary:
The static object mixes callbacks from different plugins because ever
since we moved to the object library target these are actually shared.
Just make it a member of the base class and make it a pointer set just
to do some basic deduplication.
Commit: 48619c8ab27483b29ba87ec61c8489ef7a7416e2
https://github.com/llvm/llvm-project/commit/48619c8ab27483b29ba87ec61c8489ef7a7416e2
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/test/CodeGen/ARM/intrinsics-crypto.ll
Log Message:
-----------
[ARM] Autogenerate checks for crypto intrinsics (#180147)
Commit: 5283f46615665b0bf8a14f3d4f3acaa321fd8832
https://github.com/llvm/llvm-project/commit/5283f46615665b0bf8a14f3d4f3acaa321fd8832
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
A clang/test/CIR/CodeGen/default-func-attrs-cmd-line.cpp
A clang/test/CIR/CodeGen/no-builtin-attr-automatic.cpp
A clang/test/CIR/CodeGen/offload-convergent-attr.cu
A clang/test/CIR/CodeGen/optsize-func-attr.cpp
A clang/test/CIR/CodeGen/save-reg-params-func-attr.cpp
A clang/test/CIR/CodeGen/trap-func-name-attr.cpp
A clang/test/CIR/CodeGen/zero-call-used-regs-func-attr.cpp
M clang/test/CIR/CodeGenBuiltins/X86/avx512-reduceIntrin.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512-reduceMinMaxIntrin.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512fp16-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512vlbf16-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512vlfp16-builtins.c
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/func.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/Import/instructions.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[CIR] Add tons of function infra, plus a handful of attributes (#179811)
This patch puts together a lot more of the CIR infrastructure for
function attributes, plus adds a bunch of 'TODO' messages for areas that
have been skipped.
Along the way, we also implement 8 attributes in some way: -Convergent
gets a little more work, to make the `noconvergent` C attribute have an
effect
-optsize/minsize are implemented, sourced from the command line
-nobuiltin is a call-only attribute that tells not to replace the
individual call with a builtin. This is a touch confusing, since
no-builtins is an attribute that means "don't replace anything in the
body of this function with builtins (from this list)". The spelling
confusion is existing, and it seems that changing the names away from
LLVM would be confusing.
-save_reg_params & zero_call_used_regs are boht pretty simple registers
-temp-func-name just passes a string to LLVM, consistent with existing
implementation.
-default-func-attrs is a difficult one. It takes command line arguments
and passes them as LLVM-IR attributes directly on functions/calls. In
the dialect, we are capturing these in their own attribute to pass them
on correctly. However, this is one we cannot recover from LLVM-IR for
obvious reasons, so we instead choose to let the 'passthrough' mechanism
work for those.
Commit: 4a6697f3931665e9bf72c7ce7c86f0bc92a5bbe3
https://github.com/llvm/llvm-project/commit/4a6697f3931665e9bf72c7ce7c86f0bc92a5bbe3
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/fpext-free.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
Log Message:
-----------
[AMDGPU] Fix and simplify patterns selecting fsub to v_fma_mix_f32 (#180169)
Select (fsub x, y) -> (fma y, -1.0, x). Using -1.0 as the constant
avoids the need for ComplexPatterns to negate x or y.
This also fixes the bad pattern (fsub x, y) -> (fma -x, 1.0, y).
Commit: debff926490a37f0677e3335510f527a11b3fafe
https://github.com/llvm/llvm-project/commit/debff926490a37f0677e3335510f527a11b3fafe
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M libsycl/docs/index.rst
A libsycl/include/sycl/__impl/aspect.hpp
A libsycl/include/sycl/__impl/device.hpp
A libsycl/include/sycl/__impl/device_selector.hpp
A libsycl/include/sycl/__impl/info/device.hpp
A libsycl/include/sycl/__impl/info/device_type.hpp
M libsycl/include/sycl/__impl/platform.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/CMakeLists.txt
A libsycl/src/detail/device_impl.cpp
A libsycl/src/detail/device_impl.hpp
M libsycl/src/detail/global_objects.cpp
M libsycl/src/detail/offload/offload_topology.cpp
M libsycl/src/detail/offload/offload_topology.hpp
M libsycl/src/detail/offload/offload_utils.cpp
M libsycl/src/detail/offload/offload_utils.hpp
M libsycl/src/detail/platform_impl.cpp
M libsycl/src/detail/platform_impl.hpp
A libsycl/src/device.cpp
A libsycl/src/device_selector.cpp
M libsycl/src/platform.cpp
M libsycl/tools/sycl-ls/sycl-ls.cpp
Log Message:
-----------
[SYCL] Add sycl::device initial implementation (#176972)
This is part of the SYCL support upstreaming effort. The relevant RFCs
can be found here:
https://discourse.llvm.org/t/rfc-add-full-support-for-the-sycl-programming-model/74080
https://discourse.llvm.org/t/rfc-sycl-runtime-upstreaming/74479
Plan for next PR:
E2E lit configs & test for get_platforms & get_devices impl
context & USM free functions impl
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 21f3875ffde0ec12bec9e719f5c3fad7adb41667
https://github.com/llvm/llvm-project/commit/21f3875ffde0ec12bec9e719f5c3fad7adb41667
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeAnnotations.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/Dataflow.h
M clang/lib/Analysis/LifetimeSafety/Facts.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
M clang/lib/Analysis/LifetimeSafety/LoanPropagation.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/Sema/Inputs/lifetime-analysis.h
A clang/test/Sema/warn-lifetime-safety-invalidations.cpp
Log Message:
-----------
[LifetimeSafety] Detect use-after-invalidation for STL containers (#179093)
Add detection for use-after-invalidation of container references and
iterators.
This change improves the lifetime safety analysis by detecting a common
class of bugs where references or iterators to container elements are
used after operations that invalidate them (like `push_back`, `insert`,
`resize`, etc.). Example:
```cpp
#include <vector>
void test() {
std::vector<int> v = {1, 2, 3};
int &ref = v[0];
v.push_back(4); // This invalidates references
int x = ref; // This should trigger the warning
}
```
- Added a new `InvalidateOriginFact` to track when container elements
are invalidated
- Added a new diagnostic warning for use-after-invalidation scenarios
- Implemented detection for container methods that invalidate
references/iterators
- Added logic to check for uses of references after container
invalidation
- Added the new warning to the `lifetime-safety-strict` diagnostic group
Compile with `-Wlifetime-safety-strict` or
`-Wlifetime-safety-invalidation` to see the new warning.
Current limitations (not yet detected):
* **Field member invalidations** - When invalidation happens on a field
member of a struct:
```cpp
void Invalidate1Use1IsInvalid() {
S s;
auto it = s.strings1.begin();
s.strings1.push_back("1"); // Should invalidate but doesn't
*it; // Should warn but doesn't
}
```
* **Iterator from pointer to container** - When the iterator is obtained
through a pointer:
```cpp
void IteratorFromPointerToContainerIsInvalidated() {
std::vector<std::string> s;
std::vector<std::string>* p = &s;
auto it = p->begin();
p->push_back("1"); // Should invalidate but doesn't
*it; // Should warn but doesn't
}
```
We need to distinguish between the loans to `s` and `s.strings` using
more granular `Path`. Destruction/Invalidation of a prefix of path
destroys/invalidates the complete path.
We would also need some mechanism to differentiate the storage of
between Containers and the owned buffer. This could be done for
`gsl::Owner` and `lifetimebound` member functions.
Commit: 85eb10e2707c9b9b4da1f8cfde64e9478dad258a
https://github.com/llvm/llvm-project/commit/85eb10e2707c9b9b4da1f8cfde64e9478dad258a
Author: Prajwal Nadig <pnadig at apple.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/DeclObjCCommon.h
M clang/lib/Sema/SemaObjCProperty.cpp
M clang/test/ExtractAPI/objc_property.m
Log Message:
-----------
[Sema] Directly use written attributes in ObjC (#179703)
Clang's AST builder uses the `getPropertyAttributesAsWritten()` method
that contains the bitmasks of only the attributes present in the source,
and not the default attributes that are present in
`getPropertyAttributes()`. This method was relevant in the past when two
separate enums existed for Objective-C property attributes, and had to
be updated whenever new property attributes were introduced. As of this
commit, nullability attributes are not present when written due to the
method not containing the bitmask comparison for the `nullable` and
`null_resettable` attributes.
9721fbf85b83c1cb67cea542c5558f99a07766cf consolidated the two property
attribute enums into a single
enum. With this change, the AST can directly store the written
attributes without having to construct the bitmask again. This commit
removes the `getPropertyAttributesAsWritten()` method and updates the
AST to directly store the written attributes instead.
rdar://131053727
Commit: 272d6dd445767854a4c36bacc2889714e42a61ef
https://github.com/llvm/llvm-project/commit/272d6dd445767854a4c36bacc2889714e42a61ef
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll
Log Message:
-----------
[AMDGPU] Support v_lshl_add_u64 with non-constant shift amount (#179904)
This commit also adds GlobalISel testing to llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll.
Commit: 6844af142e5c8309055bcf107b57161f5c7801fe
https://github.com/llvm/llvm-project/commit/6844af142e5c8309055bcf107b57161f5c7801fe
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M offload/test/lit.cfg
Log Message:
-----------
Revert "[Offload][lit] Link against SPIR-V DeviceRTL if present" (#180211)
Reverts https://github.com/llvm/llvm-project/pull/180030
Need to make changes to buildbot first
Commit: c7a253e4001d80ff4a09110926de6acd42961c53
https://github.com/llvm/llvm-project/commit/c7a253e4001d80ff4a09110926de6acd42961c53
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrNEON.td
Log Message:
-----------
[ARM] Use INSERT_SUBREG instead of SUBREG_TO_REG for crypto patterns. NFCI. (#179910)
This removes the only uses of SUBREG_TO_REG in the ARM backend.
Commit: 383e771dff4781281895b473d77ef7920896542b
https://github.com/llvm/llvm-project/commit/383e771dff4781281895b473d77ef7920896542b
Author: David Spickett <david.spickett at arm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/unittests/Process/Utility/RegisterContextFreeBSDTest.cpp
Log Message:
-----------
[lldb][FreeBSD] Remove MIPS64 unit tests (#180207)
427bb1cc1b09ea68b8a13a667810681ba4074f6b removed FreeBSD on MIPS64
support. This test was missed because it only compiles on FreeBSD on
MIPS64.
Commit: 52955f8b27831cf556f875b313a821383cdbb904
https://github.com/llvm/llvm-project/commit/52955f8b27831cf556f875b313a821383cdbb904
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M .github/workflows/libcxx-run-benchmarks.yml
Log Message:
-----------
[libc++] Fix the benchmarking bot
I made changes to test-at-commit but didn't update the Github workflow.
Commit: c8d8e5e2106f6736c4aa4a58d1875f956e1dbae3
https://github.com/llvm/llvm-project/commit/c8d8e5e2106f6736c4aa4a58d1875f956e1dbae3
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/include/llvm/IR/DebugInfo.h
M llvm/lib/Analysis/ModuleDebugInfoPrinter.cpp
M llvm/lib/IR/DebugInfo.cpp
A llvm/test/DebugInfo/Generic/debuginfofinder-macros.ll
Log Message:
-----------
[DebugInfo] Add macro tracking support to DebugInfoFinder (#179931)
Extend `DebugInfoFinder` to collect and expose macro debug information
(`DIMacro` and `DIMacroFile` nodes).
Also update `ModuleDebugInfoPrinter` to display macro information
including the macro type, name, value, and source location.
-----
The motivation behind this PR is that `DebugInfoFinder` is key for the
[SPIRV-LLVM-Translator](https://github.com/KhronosGroup/SPIRV-LLVM-Translator)
and also for future support of debug info in the SPIRV backend in LLVM.
This new lookup of `DIMacro` with their `DIMacroFile` when available
simplifies the logic around the translation for this debug information.
Commit: 65cdee827b76f137986549b69a59e9da74c0e702
https://github.com/llvm/llvm-project/commit/65cdee827b76f137986549b69a59e9da74c0e702
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.h
Log Message:
-----------
[AMDGPU] Move magic strings used for WMMA modifiers (NFC) (#180201)
Commit: 4066ef6ace253fb58fdbd6382e30d68ddc575dd0
https://github.com/llvm/llvm-project/commit/4066ef6ace253fb58fdbd6382e30d68ddc575dd0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
Log Message:
-----------
[X86] Add test showing failure to fold expand(splat,passthrough,mask) to select(splat,passthrough,mask) (#180208)
Commit: 30533d07578ea80b3f2e002e17272f589ffebed8
https://github.com/llvm/llvm-project/commit/30533d07578ea80b3f2e002e17272f589ffebed8
Author: petbernt <167322637+petbernt at users.noreply.github.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M libc/docs/dev/printf_behavior.rst
M libc/docs/dev/undefined_behavior.rst
Log Message:
-----------
[libc][docs] Document printf NULL handling for %s/%n (#180067)
- Fix printf_behavior to describe NULL %s as printing "(null)" when
nullptr checks are enabled
- Point undefined_behavior NULL %s/%n entry at
LIBC_COPT_PRINTF_NO_NULLPTR_CHECKS
- Add Sphinx labels to link directly to the flag and Conversion sections
Commit: 93d0c61d4d391d937e01e038081bdf9a2a08ba19
https://github.com/llvm/llvm-project/commit/93d0c61d4d391d937e01e038081bdf9a2a08ba19
Author: Kiran <kiran.sturt at arm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CGExprScalar.cpp
A clang/test/CodeGen/compound-assign-atomic-bool.c
Log Message:
-----------
[Clang] Fix atomic boolean compound assignment (#33210) (#180200)
This is my second attempt to merge the #33210 fix. My original patch
#178220 caused test failures on risc-v, as I committed a new test file
that was too target-specific. I reverted the PR (#180183) to avoid
causing disruption, as I did not know how long the fix would take.
I have now fixed the test so that it behaves correctly on risc-v. I have
also changed the run lines so it is tested on aarch64, amd64 and risc-v.
Commit: e958bcdd1713d156f8689c1b9f2828e99311a75b
https://github.com/llvm/llvm-project/commit/e958bcdd1713d156f8689c1b9f2828e99311a75b
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/X86/known-bits.ll
Log Message:
-----------
[DAGCombiner] Look through freeze for ext(freeze(extload(x))) (#178669)
This patch fixes a regression introduced by PR #175022, where
a freeze was introduced with the following transformation:
ext(freeze(load(x))) -> freeze(extload(x))
If a new extend is introduced afterwards we then have
ext(freeze(extload(x)))
which doesn't get picked up by existing DAG combines due to
the freeze getting in the way.
Commit: e67bfe85d924ac907edd601c49de43f5175fedef
https://github.com/llvm/llvm-project/commit/e67bfe85d924ac907edd601c49de43f5175fedef
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Fix D16 buffer load RegBankLegalize rules (#179982)
Use fast StandardB rule and add uniform rules and uniform tests.
Commit: d7fa1bc0fab3d69a0a92a8b6ee2cd6e357c23e2a
https://github.com/llvm/llvm-project/commit/d7fa1bc0fab3d69a0a92a8b6ee2cd6e357c23e2a
Author: Artem Dergachev <artem.dergachev at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
[clang][dataflow] Fix crash on base-to-derived cast of unmodeled pointer value. (#179060)
Remove the assertion because null values occur naturally on a regular
basis.
Un-crashes the newly added test.
Commit: 1171450d56e22b32894863c894a487a5813bd5a6
https://github.com/llvm/llvm-project/commit/1171450d56e22b32894863c894a487a5813bd5a6
Author: Nhat Nguyen <nhat7203 at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Options/Options.td
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprClassification.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/Basic/OperatorPrecedence.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Parse/CMakeLists.txt
M clang/lib/Parse/ParseExpr.cpp
A clang/lib/Parse/ParseReflect.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
A clang/test/CodeGenCXX/reflection-mangle-itanium.cpp
A clang/test/CodeGenCXX/reflection-mangle-ms.cpp
A clang/test/Driver/reflection-requires-cxx26.cpp
A clang/test/Parser/parsing-reflection-with-blocks.cpp
A clang/test/Parser/parsing-reflection.cpp
M clang/tools/libclang/CXCursor.cpp
Log Message:
-----------
[clang]: reflection operator parsing for primitive types (#164692)
(After changing the scope) This PR implements parsing the reflection
operator (^^) for primitive types. The goal is to keep the first PR
simple. In subsequent PRs, parsing for the remaining requirements will
be introduced.
This implementation is based on the fork of @katzdm.
Class `CXXReflectExpr` is introduced to represent the operand of the
reflection operator. For now, in this PR, the type std::meta::info is
not implemented yet, so when we construct an AST node CXXReflectExpr,
`VoidTy` is used as placeholder type for now.
The file `ParseReflect.cpp` is introduced, which for now only has the
function `ParseCXXReflectExpression`. It parses the operand of the
reflection operator.
---------
Co-authored-by: Shafik Yaghmour <shafik.yaghmour at intel.com>
Co-authored-by: Hubert Tong <hubert.reinterpretcast at gmail.com>
Co-authored-by: Sirraide <aeternalmail at gmail.com>
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Co-authored-by: Erich Keane <ekeane at nvidia.com>
Commit: 7887e3a39844ddfdf8e55dab6ed207ea3fbcb9fa
https://github.com/llvm/llvm-project/commit/7887e3a39844ddfdf8e55dab6ed207ea3fbcb9fa
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
Log Message:
-----------
[NFC] Change the FuncOp 'UnitAttr's to not be an 'optional'. (#180209)
It appears that these all became `Optional` thanks to a series of
copy/paste errors going back years. CallOp doesn't have this 'feature',
and a "UnitAttr' should be enough as it is effectively already a
true/false value as it is.
So this patch removes the optional here to simplify the implementation,
and changes no tests, as the interface is identical anyway.
Commit: 29891ec07ca26d08122dfe5f97b3443c0bef8b77
https://github.com/llvm/llvm-project/commit/29891ec07ca26d08122dfe5f97b3443c0bef8b77
Author: Kerem Şahin <keremsahin401 at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/test/CodeGen/X86/pr142937.ll
Log Message:
-----------
[SelectionDAG] Use -filetype=null for llc RUN lines in pr142937 (#180004)
This patch adds -filetype=null to the llc RUN lines in pr142937.ll, to
ensure that the test does not attempt to write files to the local
directory.
Follow-up to #179249.
Commit: 115158b176b89b5a97938c842122b7cde6f7a72d
https://github.com/llvm/llvm-project/commit/115158b176b89b5a97938c842122b7cde6f7a72d
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/test/Driver/openmp-target-fast-flag.c
Log Message:
-----------
[clang][OpenMP][test] Use `-fopenmp=libomp` explicitly (#180221)
Using `-fopenmp` uses the default openmp lib, which defaults to `libomp`
but may be something else. This test only passes with `libomp`, so it
passes when using all defaults, but fails downstream if configured for
something else, like `libgomp`.
Commit: 68d704844575d166301cf579b77b947fbe3446bb
https://github.com/llvm/llvm-project/commit/68d704844575d166301cf579b77b947fbe3446bb
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.h
A lldb/test/API/lang/cpp/template-diagnostic-hint/Makefile
A lldb/test/API/lang/cpp/template-diagnostic-hint/TestTemplateDiagnosticHint.py
A lldb/test/API/lang/cpp/template-diagnostic-hint/main.cpp
Log Message:
-----------
[lldb][ClangUserExpression] Emit workaround hint when trying to call function templates (#179916)
Before:
```
(lldb) expression some_template_func<int, long>(5)
˄
╰─ error: 'some_template_func' does not name a template but is followed by template arguments
note: Ran expression as 'C++14'.
note: note: non-template declaration found by name lookup
```
After:
```
(lldb) expression some_template_func<int, long>(5)
˄
╰─ error: 'some_template_func' does not name a template but is followed by template arguments
note: Ran expression as 'C++14'.
note: note: non-template declaration found by name lookup
note: Naming template instantiation not yet supported. Template functions can be invoked via their mangled name. E.g., expression _Z3fooIiEvi(5)
```
There isn't a great way to get to the actual function being named (and
its mangled name) since we're just dealing with raw text. So I just
print an example mangled name.
This doesn't work for all template instantiations. E.g.,:
```
(lldb) p f.method<long>(10)
˄ ˄
│ ╰─ error: expected '(' for function-style cast or type construction
╰─ error: no member named 'method' in 'Foo<int>'
note: Ran expression as 'C++14'.
```
This is a consequence of how we construct the AST for template methods.
Once we fix that, this hint will get emitted there too.
Note this will also trigger in cases where no function is being called
(hence I used the defensive phrase "Template functions can be invoked").
rdar://135725807
Commit: caee8f015e5cc9b6f4006850c3825d5ffeeab93b
https://github.com/llvm/llvm-project/commit/caee8f015e5cc9b6f4006850c3825d5ffeeab93b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/MC/RISCV/rv32p-invalid.s
M llvm/test/MC/RISCV/rv32p-valid.s
M llvm/test/MC/RISCV/rv64p-valid.s
Log Message:
-----------
[RISCV] Add ppair.e and ppaire.w as aliases for pack on RV32 and RV64 respectively (#180100)
Based on this note from
https://jhauser.us/RISCV/ext-P/RVP-baseInstrs-018.pdf
(*1) For RV32, PPAIRE.H is a pseudoinstruction for PACK.
(*2) For RV64, PPAIRE.W is a pseudoinstruction for PACK.
Commit: 1b0d9d57435cf678628d4edf6d7401853d8acf4d
https://github.com/llvm/llvm-project/commit/1b0d9d57435cf678628d4edf6d7401853d8acf4d
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Parse/BUILD.gn
Log Message:
-----------
[gn build] Port 1171450d56e2
Commit: 55ecf62227cc02449ef56d1d731a9c0d62a7ecba
https://github.com/llvm/llvm-project/commit/55ecf62227cc02449ef56d1d731a9c0d62a7ecba
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/test/TableGen/MacroFusion.td
M llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Adopt CodeGenHelpers in MacroFusion emitter (#180132)
Commit: 295eba2058a7dbbeba05def74c9f214c1987a5cb
https://github.com/llvm/llvm-project/commit/295eba2058a7dbbeba05def74c9f214c1987a5cb
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUPrepareAGPRAlloc.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
M llvm/lib/Target/AMDGPU/AMDGPUUniformIntrinsicCombine.cpp
M llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
M llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.cpp
M llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
M llvm/lib/Target/AMDGPU/SIFixVGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp
M llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
M llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
M llvm/lib/Target/AMDGPU/SIPostRABundler.cpp
M llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
Log Message:
-----------
[NFC][AMDGPU] Remove pass initialization from pass constructors (#180149)
Commit: b12e3122c85f16989e15dac8b97024f02b46f296
https://github.com/llvm/llvm-project/commit/b12e3122c85f16989e15dac8b97024f02b46f296
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/GlobalMergeFunctions.cpp
M llvm/lib/CodeGen/InsertCodePrefetch.cpp
M llvm/lib/IR/Dominators.cpp
M llvm/lib/IR/SafepointIRVerifier.cpp
M llvm/lib/IR/Verifier.cpp
Log Message:
-----------
[NFC][Core][CodeGen] Remove pass initialization from pass constructors (#180153)
Commit: 017ca739170286306d0b2949f9d071c8ae5b1b8a
https://github.com/llvm/llvm-project/commit/017ca739170286306d0b2949f9d071c8ae5b1b8a
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
Log Message:
-----------
[NFC][LLVM] Remove pass initialization from pass constructors (#180158)
Commit: 918d57642b96ef73947df777a3c82f9b265872a8
https://github.com/llvm/llvm-project/commit/918d57642b96ef73947df777a3c82f9b265872a8
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/VNCoercion.h
M llvm/lib/Transforms/Utils/VNCoercion.cpp
Log Message:
-----------
[NFC][LLVM] Code cleanup in VNCoercion (#180159)
Use namespace qualifiers to define functions declared in the
`VNCoercion` namespace to conform to LLVM CS.
Commit: bd19bfeb267e2eac39533443445bd5cc04d7c058
https://github.com/llvm/llvm-project/commit/bd19bfeb267e2eac39533443445bd5cc04d7c058
Author: Thurston Dang <thurston at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/switch-icmp.ll
Log Message:
-----------
[msan] Switch switch() from strict handling to (icmp eq)-style handling (#179851)
Currently, the SwitchInst:
```
switch i32 %Val, label %else [ i32 0, label %A
i32 1, label %B
i32 2, label %C ]
```
is strictly handled i.e., MSan will check that %Val is fully
initialized. This is appropriate nearly all the time.
However, sometimes the compiler may convert (icmp + br) into a switch
statement. (icmp + br) has different semantics: MSan allows icmp eq/ne
with partly initialized inputs to still result in a fully initialized
output, if there exists a bit that is initialized in both inputs with a
differing value e.g., suppose:
```
%A = 00000000 00001010
%B = 00000000 00000110
%C = 00000000 00000011
%Val = 00000001 ???????? (where ? denotes an uninitialized bit)
```
Even though %Val has uninitialized bits, the initialized '1' bit
immediately to the left, compared to the corresponding initialized '0'
bit in %A/%B/%C suffices to prove that %Val does not match any of those
cases. This is similar to a real-world case with std::optional (where
the has_value bit may be initialized but the value is not).
This patch adds this relaxed icmp logic to the switch instrumentation as
well, to make MSan's behavior equivalent under optimization.
Note that this edge case only applies if the switch input value
definitively does not match *any* of the cases (matching any of the
cases requires an exact, fully initialized match). If it is uncertain
whether the switch input value could, depending on the uninitialized
bits, match one of the cases or not, MSan will report
use-of-uninitialized memory.
Commit: 4afce0cb3de8e9a849b5150471672f4bb6ee591b
https://github.com/llvm/llvm-project/commit/4afce0cb3de8e9a849b5150471672f4bb6ee591b
Author: David Green <david.green at arm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
Log Message:
-----------
[AArch64] Correct spelling of INSERT_SUBREF->INSERT_SUBREG. NFC
Commit: 621fe6783fb1c766e7f68407b30eb74a5d71a9ef
https://github.com/llvm/llvm-project/commit/621fe6783fb1c766e7f68407b30eb74a5d71a9ef
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M flang-rt/lib/runtime/descriptor-io.cpp
M flang-rt/lib/runtime/extensions.cpp
M flang-rt/lib/runtime/external-unit.cpp
M flang-rt/lib/runtime/io-api.cpp
M flang-rt/lib/runtime/io-stmt.cpp
M flang-rt/lib/runtime/pseudo-unit.cpp
M flang-rt/lib/runtime/unit.h
Log Message:
-----------
[flang] Better "out of memory" error for failure to allocate a unit (#179291)
When the I/O runtime fails to allocate storage for an I/O unit, the
error message cites a source location in the runtime library, not the
user program. Thread instances of Terminator through to the code that
attempts the allocation so that the failure has a source position in the
user's program.
Commit: 9d0043a35f5cb9cd66c940042f6dce85fd874358
https://github.com/llvm/llvm-project/commit/9d0043a35f5cb9cd66c940042f6dce85fd874358
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M flang/include/flang/Evaluate/check-expression.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Semantics/expression.h
M flang/include/flang/Semantics/semantics.h
M flang/include/flang/Semantics/tools.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Semantics/check-coarray.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/semantics.cpp
M flang/lib/Semantics/tools.cpp
A flang/test/Semantics/bug2174.f90
Log Message:
-----------
[flang] Refactor "unused"/"used without definition" warnings (#179539)
I'm emitting a false warning "used without definition" warning for
variable cited in an inquiry intrinsic (e.g. LBOUND), and failing to
emit an "unused local" warning for allocatables that only appear in
ALLOCATE statements.
This patch makes the analysis more context-aware by rewriting it in
terms of typed expression traversal, and moves the analysis part into
Evaluate/check-expression.cpp from Semantics/expression.cpp.
Commit: c15ae96dc7fef09a342a5d0d11df74237600b9a6
https://github.com/llvm/llvm-project/commit/c15ae96dc7fef09a342a5d0d11df74237600b9a6
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/bug1214.cuf
A flang/test/Semantics/bug2131b.cuf
Log Message:
-----------
[flang][CUDA] Better analysis of actual argument CUDA data attrs (#179569)
When checking an actual argument for any CUDA data attributes, be sure
to check the symbols in a designator like a%b%c in order, taking the
last symbol that has a CUDA attribute. And be sure to interpret a
function result symbol of a device function as a device object, at least
for generic interface resolution for defined assignments and operators.
This patch exposed errors in flang/test/Semantics/bug1214.cuf, which
have been fixed.
Commit: d1d9413e7bfdd3e4d1900dc47db5c46cfd3b0a3f
https://github.com/llvm/llvm-project/commit/d1d9413e7bfdd3e4d1900dc47db5c46cfd3b0a3f
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
Log Message:
-----------
[VPlan] Don't use std::not_fn
It looks like some Apple based toolchains can't compile this:
https://github.com/llvm/llvm-project/pull/180005#issuecomment-3861614477
There aren't any other users of std::not_fn within LLVM so just use a
lambda for now.
Commit: 73b83be1c9b3fd3c844a789d26e2a08d8f7caf62
https://github.com/llvm/llvm-project/commit/73b83be1c9b3fd3c844a789d26e2a08d8f7caf62
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M flang/docs/Extensions.md
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Semantics/expression.cpp
A flang/test/Semantics/bug179580.f90
Log Message:
-----------
[flang] Add warning and documentation for extension (#179708)
When a pointer component has no default initialization in the derived
type definition and does not appear explicitly as a component in a
structure constructor, we assume that it is meant to be NULL() as an
extension. But there's no warning or documentation for this extension;
add them.
Fixes https://github.com/llvm/llvm-project/issues/179580.
Commit: 4ad58b4fff9264b600f9a234338859796826b3f8
https://github.com/llvm/llvm-project/commit/4ad58b4fff9264b600f9a234338859796826b3f8
Author: tedj <tedmjohnson at protonmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M .gitignore
Log Message:
-----------
[llvm][.gitignore] macOS case-sensitive update (#177971)
If you run macOS on a case-sensitive file system, .DS_store and .DS_Store are different files and the existing lowercase-s version doesn't match. Fix that with the intended case sensitive.
Commit: c32cde4182f02df7a67455ff0567ddcc1cf9bfb7
https://github.com/llvm/llvm-project/commit/c32cde4182f02df7a67455ff0567ddcc1cf9bfb7
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/test/Transforms/LoopIdiom/reuse-lcssa-phi-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
Log Message:
-----------
[SCEVExp] Use SCEVPtrToAddr in tryToReuseLCSSAPhi if possible. (#178727)
This patch updates tryToReuseLCSSAPhi to use SCEVPtrToAddr, unless using
SCEVPtrToInt allows re-use, because the IR already contains a re-usable
phi using PtrToInt.
This is a first step towards migrating to SCEVPtrToAddr and avoids
regressions in follow-up changes.
PR: https://github.com/llvm/llvm-project/pull/178727
Commit: 9f8f90143e54a16c4a7e5b1649b7d1f5896b0cc7
https://github.com/llvm/llvm-project/commit/9f8f90143e54a16c4a7e5b1649b7d1f5896b0cc7
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/test/Shell/helper/toolchain.py
Log Message:
-----------
Revert "[lldb-dap] fix executable substitution in tests (#179685)" (#180241)
This reverts commit 082a47d8944da242993bf28980b07f2c8c3df4a6.
`ToolSubst` should only be used explicitely for passing `extra_args`.
Commit: 368d7ea12c0b597c8bf3b64bfae27d6cfa5959af
https://github.com/llvm/llvm-project/commit/368d7ea12c0b597c8bf3b64bfae27d6cfa5959af
Author: fabrizio-indirli <fabrizio.indirli at arm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/test/Conversion/ConvertToSPIRV/gpu.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
Log Message:
-----------
[mlir][gpu] Add NoMemoryEffect to gpu.subgroup_reduce op (#180227)
Add missing MemoryEffectOpInterface to gpu.subgroup_reduce
Signed-off-by: Fabrizio Indirli <fabrizio.indirli at arm.com>
Commit: 762c32aa08c0521589ef077ace800da09bc8e492
https://github.com/llvm/llvm-project/commit/762c32aa08c0521589ef077ace800da09bc8e492
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUTypes.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUOps.cpp
M mlir/test/Conversion/AMDGPUToROCDL/gfx1250.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[mlir][AMDGPU] Add wrappers for in-memory barriers on gfx1250 (#180112)
This commit introduces the `!amdgpu.ds_barrier_state` type and
operations on that type, including extracting its components and (more
importantly) provides wrappers around the upcoming barrier-management
instructions that will be added in gfx1250.
This commit is loosely based on work done for Triton, but this commit
provides slightly more lower level-primitives (namely a known-atomic
load for getting the barrier state instead of providing a `wait`
operation that includes an entire spin-loop, though if people want one
we could consider adding it.) These operations will allow LDS barriers
to be interacted with in a more type-safe manner.
The types and operations use the Ds naming scheme to match the
underlying instructions and to avoid confusion with the "LDS barrier"
already present in the AMDGPU dialect that was a workaround for LLVM's
memory fencing support.
(To summarize a potential usage pattern, one can use a pair of these
barriers to communicate between wave(s) in a workgroup that load data
into memory and a separate wave(s) that compute with that data.)
---------
Co-authored-by: Claude Opus 4.5 <noreply at anthropic.com>
Commit: 64de25d183be069e7b328be396520fbe462d84e4
https://github.com/llvm/llvm-project/commit/64de25d183be069e7b328be396520fbe462d84e4
Author: Thurston Dang <thurston at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vcmp.ll
Log Message:
-----------
[msan] Handle NEON floating-point absolute compare greater than/equal (#180120)
Uses existing handleVectorComparePackedIntrinsic()
Commit: 544caa627b345bffba47fe3683acb993d598a738
https://github.com/llvm/llvm-project/commit/544caa627b345bffba47fe3683acb993d598a738
Author: Mingming Liu <mingmingl at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Analysis/StaticDataProfileInfo.cpp
M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
M llvm/test/CodeGen/X86/global-variable-partition-with-dap.ll
Log Message:
-----------
[StaticDataLayout] Reconcile string literal hotness from data access profiles and PGO profiles. (#178336)
https://github.com/llvm/llvm-project/pull/178333 updates the memprof
pass to annotate string literal section prefix.
The StaticDataProfileInfo.cpp provides an analysis pass to reconcile
global variable hotness. It's used by StaticDataAnnotator and AsmPrinter
to look up global variable hotness.
This PR updates the analysis pass to compute the hotness of string
literals.
* When both data access profiles and pgo counters provide a hotness
attribute, use the hotter one.
* Otherwise, use the hotness attribute that's available.
Implementation-wise, the option `AnnotateStringLiteralSectionPrefix` is
moved from MemProf (a transform pass) to StaticDataProfileInfo (an
Analysis pass). Otherwise, there might be errors like caught by CI. Note
https://github.com/llvm/llvm-project/pull/178336#issuecomment-3808537817
is an edited message, and its history shows the intermediate failures
like below. ~My understanding is~ Preliminary LLM study (:)) shows that
the error manifests in PowerPC but not X86 due to cmake variable
differences.
```
FAILED: unittests/Target/PowerPC/PowerPCTests
...
>>> referenced by CommandLine.h:1437 (/home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/include/llvm/Support/CommandLine.h:1437)
>>> StaticDataProfileInfo.cpp.o:(llvm::StaticDataProfileInfo::getConstantSectionPrefix(llvm::Constant const*, llvm::ProfileSummaryInfo const*) const) in archive lib/libLLVMAnalysis.a
clang++: error: linker command failed with exit code 1 (use -v to see invocation)
```
Commit: 9f4e8bca0394972bed475bf3046a55744a5794a5
https://github.com/llvm/llvm-project/commit/9f4e8bca0394972bed475bf3046a55744a5794a5
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lld/include/lld/Common/BPSectionOrdererBase.inc
Log Message:
-----------
[lld][BP] Fix nondeterministic function order by using MapVector (#179841)
There are two places where the nondeterministic iteration order of
`DenseMap` (the original type of `startupSectionIdxUNs`) causes the
output function order to be nondeterministic.
https://github.com/llvm/llvm-project/blob/16e2e7f59134e63810228c9a0dc990bfd96f9a1f/lld/include/lld/Common/BPSectionOrdererBase.inc#L240-L245
https://github.com/llvm/llvm-project/blob/16e2e7f59134e63810228c9a0dc990bfd96f9a1f/lld/include/lld/Common/BPSectionOrdererBase.inc#L267-L268
The fix is to use `MapVector` whose iteration order is guaranteed to be
deterministic.
To test, I built a large binary several times and observed this value no
longer changes.
https://github.com/llvm/llvm-project/blob/16e2e7f59134e63810228c9a0dc990bfd96f9a1f/lld/include/lld/Common/BPSectionOrdererBase.inc#L410-L411
It seems that this regresses linktime by a few seconds, but I believe
the tradeoff is worthwhile.
Commit: 8e17489026d14160e0a2461c5678b0117d8a5b58
https://github.com/llvm/llvm-project/commit/8e17489026d14160e0a2461c5678b0117d8a5b58
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalMergeFunctions.cpp
A llvm/test/CodeGen/AArch64/cgdata-merge-preserve-entry-count.ll
Log Message:
-----------
[CGData][GMF] Preserve Profile Data (#180126)
Profile data for instructions (e.g., branch weights) is automatically
preserved via `splice()` which moves the basic blocks along with their
instruction metadata. However, entry count is stored as function
metadata, which was dropped when creating merged function and thunks.
The fix is to explicitly set entry count for both merged function (.Tgm)
and thunks via `setEntryCount()`.
Commit: 5efb69f7c3c146268a715a20aa6d0c49ff3ea83f
https://github.com/llvm/llvm-project/commit/5efb69f7c3c146268a715a20aa6d0c49ff3ea83f
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-readelf.rst
M llvm/docs/CommandGuide/llvm-readobj.rst
Log Message:
-----------
[NFC][llvm][docs] Fix alphabetical order of commands (#178519)
Fix the order of commands for llvm-readelf and llvm-readobj docs.
Commit: 69878f9fa17ac750e9738b552f8b5a02c0290374
https://github.com/llvm/llvm-project/commit/69878f9fa17ac750e9738b552f8b5a02c0290374
Author: John Harrison <harjohn at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/include/lldb/Host/JSONTransport.h
M lldb/include/lldb/Protocol/MCP/Server.h
M lldb/include/lldb/Protocol/MCP/Transport.h
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.cpp
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.h
M lldb/source/Protocol/MCP/Server.cpp
M lldb/source/Protocol/MCP/Transport.cpp
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/Transport.cpp
M lldb/tools/lldb-dap/Transport.h
M lldb/tools/lldb-dap/tool/lldb-dap.cpp
M lldb/unittests/DAP/TestBase.cpp
M lldb/unittests/DAP/TestBase.h
M lldb/unittests/Host/JSONTransportTest.cpp
M lldb/unittests/Protocol/ProtocolMCPServerTest.cpp
M lldb/unittests/TestingSupport/Host/JSONTransportTestUtilities.h
Log Message:
-----------
[lldb] Refactor JSONTransport own MainLoop read handle. (#179564)
When working with a MainLoop, if the file reaches the EOF it will
immediately fire the read handle callback. We cannot readily determine
if the file is at EOF or if the file is pointing to a socket/pipe that
has consumed all the current data in the buffer but the remote end has
not yet hung up. This is causing JSONTransport to continuously fire the
OnRead callback trigging repeated calls to the
`MessageHandler::OnClose`.
Since MainLoop does not perform the actual read, we need to adjust the
behavior of JSONTransport to fully own the read handle.
This change moves the ownership of the `MainLoop::ReadHandleUP` and
additionally own a reference to the `MainLoop` itself to ensure the loop
outlives the JSONTransport object.
This allows us to remove the handle immediately when we detect an EOF /
hang up has occurred.
Commit: 28042a87022b4e4e20883f7df78eed93e216b349
https://github.com/llvm/llvm-project/commit/28042a87022b4e4e20883f7df78eed93e216b349
Author: Fateme Hosseini <quic_fhossein at quicinc.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/Hexagon/CMakeLists.txt
A llvm/lib/Target/Hexagon/HexagonGlobalRegion.cpp
A llvm/lib/Target/Hexagon/HexagonGlobalRegion.h
Log Message:
-----------
[Hexagon] Add global region scaffolding (#179541)
Introduce HexagonGlobalRegion, a data structure that the upcoming
Hexagon scheduler work will build on. It relies on the new
HexagonLiveVariables analysis to keep per-block liveness up to date when
the scheduler moves instructions across basic blocks.
Author: Sergei Larin <slarin at qti.qualcomm.com>
Patch By: Fateme Hosseini <fhossein at qti.qualcomm.com>
Commit: 8244528aee54e823c62f7bee6c6184b530b3f772
https://github.com/llvm/llvm-project/commit/8244528aee54e823c62f7bee6c6184b530b3f772
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/runInTerminal/TestDAP_runInTerminal.py
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
Log Message:
-----------
[lldb-dap] Add validation for RunInTerminal client capability (#180213)
Check if the client supports RunInTerminal before attempting to run in
the preferred terminal.
One less unknown reason for failed to launch
Commit: 823799d9ed604e8db0d22904f22c0705bf2cab67
https://github.com/llvm/llvm-project/commit/823799d9ed604e8db0d22904f22c0705bf2cab67
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel][mlir][AMDGPU] Port #180112: Add td dep (#180248)
Commit: 5f4543fbafb4e4879815f1ac045185398e09efd8
https://github.com/llvm/llvm-project/commit/5f4543fbafb4e4879815f1ac045185398e09efd8
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/include/clang/AST/ComputeDependence.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/ComputeDependence.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprClassification.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
A clang/test/AST/HLSL/matrix-elementexpr-tree-transform.hlsl
A clang/test/AST/HLSL/matrix-member-access-scalar.hlsl
A clang/test/AST/HLSL/matrix-member-access-swizzle-ast-dump-json.hlsl
A clang/test/AST/HLSL/matrix-member-access-swizzle-ast-print.hlsl
A clang/test/AST/HLSL/matrix-member-access-swizzle.hlsl
A clang/test/AST/HLSL/pch_with_matrix_element_accessor.hlsl
A clang/test/CIR/CodeGenHLSL/matrix-element-expr-load.hlsl
A clang/test/CodeGenHLSL/matrix-member-one-based-accessor-scalar-load.hlsl
A clang/test/CodeGenHLSL/matrix-member-one-based-accessor-scalar-store.hlsl
A clang/test/CodeGenHLSL/matrix-member-one-based-swizzle-load.hlsl
A clang/test/CodeGenHLSL/matrix-member-one-based-swizzle-store.hlsl
A clang/test/CodeGenHLSL/matrix-member-zero-based-accessor-scalar-load.hlsl
A clang/test/CodeGenHLSL/matrix-member-zero-based-accessor-scalar-store.hlsl
A clang/test/CodeGenHLSL/matrix-member-zero-based-swizzle-load.hlsl
A clang/test/CodeGenHLSL/matrix-member-zero-based-swizzle-store.hlsl
A clang/test/SemaHLSL/matrix-member-access-errors.hlsl
M clang/tools/libclang/CXCursor.cpp
Log Message:
-----------
[HLSL][Matrix] introduce MatrixElementExpr as accessor and swizzle operator (#171225)
fixes #159438
This patch adds `MatrixElementExpr`, a new AST node for HLSL matrix
element and swizzle access (e.g. M._m00, M._11_22_33).
It introduces a shared `ElementAccessExprBase` used by both matrix and
vector swizzle expressions, updates Sema to parse and validate
zero-based and one-based accessors, detects duplicates for l-value
checks, and emits improved diagnostics. CodeGen is updated to lower
scalar and multi-element accesses consistently, and full AST
serialization, dumping, and tooling support is included. This
implementation reflects the updated
[RFC](https://github.com/llvm/wg-hlsl/pull/357/files) for HLSL matrix
accessor semantics.
Commit: cb905605b2e95f88296afe136b21a7d2476cb058
https://github.com/llvm/llvm-project/commit/cb905605b2e95f88296afe136b21a7d2476cb058
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/test/Transforms/LoopIdiom/reuse-lcssa-phi-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
Log Message:
-----------
Revert "[SCEVExp] Use SCEVPtrToAddr in tryToReuseLCSSAPhi if possible." (#180257)
Reverts llvm/llvm-project#178727
triggers asserts in on some build bots
Commit: 4a7e572a5cfb5a5508574cf6d1ed45c6d469a725
https://github.com/llvm/llvm-project/commit/4a7e572a5cfb5a5508574cf6d1ed45c6d469a725
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/test/API/lang/cpp/template-diagnostic-hint/TestTemplateDiagnosticHint.py
Log Message:
-----------
[lldb][test] TestTemplateDiagnosticHint.py: XFAIL on Windows
Fails on Windows with below error. Probably because we're not
constructing the AST from DWARF correctly for templates. Or perhaps
something to do with the DWARF index.
```
******************** TEST 'lldb-api :: lang/cpp/template-diagnostic-hint/TestTemplateDiagnosticHint.py' FAILED ********************
Script:
--
C:/Users/tcwg/scoop/apps/python/current/python.exe C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/llvm-project/lldb\test\API\dotest.py -u CXXFLAGS -u CFLAGS --env LLVM_LIBS_DIR=C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/./lib --env LLVM_INCLUDE_DIR=C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/include --env LLVM_TOOLS_DIR=C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/./bin --arch aarch64 --build-dir C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/lldb-test-build.noindex --lldb-module-cache-dir C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/lldb-test-build.noindex/module-cache-lldb\lldb-api --clang-module-cache-dir C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/lldb-test-build.noindex/module-cache-clang\lldb-api --executable C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/./bin/lldb.exe --compiler C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/./bin/clang.exe --dsymutil C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/./bin/dsymutil.exe --make C:/Users/tcwg/scoop/shims/make.exe --llvm-tools-dir C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/./bin --lldb-obj-root C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/tools/lldb --lldb-libs-dir C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/./lib --cmake-build-type Release --skip-category=watchpoint C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\test\API\lang\cpp\template-diagnostic-hint -p TestTemplateDiagnosticHint.py
--
Exit Code: 1
Command Output (stdout):
--
lldb version 23.0.0git (https://github.com/llvm/llvm-project.git revision 4afce0cb3de8e9a849b5150471672f4bb6ee591b)
clang revision 4afce0cb3de8e9a849b5150471672f4bb6ee591b
llvm revision 4afce0cb3de8e9a849b5150471672f4bb6ee591b
Skipping the following test categories: watchpoint, libc++, libstdcxx, dwo, dsym, gmodules, debugserver, objc, fork, pexpect
--
Command Output (stderr):
--
UNSUPPORTED: LLDB (C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\build\bin\clang.exe-aarch64) :: test_dsym (TestTemplateDiagnosticHint.TestCase.test_dsym) (test case does not fall in any category of interest for this run)
FAIL: LLDB (C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\build\bin\clang.exe-aarch64) :: test_dwarf (TestTemplateDiagnosticHint.TestCase.test_dwarf)
UNSUPPORTED: LLDB (C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\build\bin\clang.exe-aarch64) :: test_dwo (TestTemplateDiagnosticHint.TestCase.test_dwo) (test case does not fall in any category of interest for this run)
======================================================================
FAIL: test_dwarf (TestTemplateDiagnosticHint.TestCase.test_dwarf)
----------------------------------------------------------------------
Traceback (most recent call last):
File "C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\packages\Python\lldbsuite\test\lldbtest.py", line 1844, in test_method
return attrvalue(self)
^^^^^^^^^^^^^^^
File "C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\test\API\lang\cpp\template-diagnostic-hint\TestTemplateDiagnosticHint.py", line 14, in test
self.expect(
File "C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\packages\Python\lldbsuite\test\lldbtest.py", line 2569, in expect
self.fail(log_msg)
AssertionError: Ran command:
"expression some_template_func<int, long>(5)"
Got output:
note: Ran expression as 'C++14'.
error: <user expression 0>:1:1: use of undeclared identifier 'some_template_func'
1 | some_template_func<int, long>(5)
| ^~~~~~~~~~~~~~~~~~
Expecting sub string: "does not name a template but is followed by template arguments" (was not found)
Config=aarch64-C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\build\bin\clang.exe
----------------------------------------------------------------------
Ran 3 tests in 0.601s
FAILED (failures=1, skipped=2)
```
Commit: 9976e5702f05a4019123ee1ad2bb9a8b69ca7dcb
https://github.com/llvm/llvm-project/commit/9976e5702f05a4019123ee1ad2bb9a8b69ca7dcb
Author: Demetrius Kanios <demetrius at kanios.net>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/CMakeLists.txt
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyCallLowering.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyCallLowering.h
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyInstructionSelector.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.h
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyPostLegalizerCombiner.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyPreLegalizerCombiner.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyRegisterBankInfo.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyRegisterBankInfo.h
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssembly.td
A llvm/lib/Target/WebAssembly/WebAssemblyCombine.td
A llvm/lib/Target/WebAssembly/WebAssemblyGISel.td
A llvm/lib/Target/WebAssembly/WebAssemblyRegisterBanks.td
M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
A llvm/test/CodeGen/WebAssembly/GlobalISel/gisel-commandline-option.ll
Log Message:
-----------
[WebAssembly][GlobalISel] Part 1 - Setup skeleton (#178796)
This PR is the first step towards bringing GlobalISel to the Wasm
backend.
Split from #157161
Commit: 09b70ddd3a66de655854fab78cf36dbd37a54655
https://github.com/llvm/llvm-project/commit/09b70ddd3a66de655854fab78cf36dbd37a54655
Author: Omar Hossam <moar.ahmed at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/test/CIR/CodeGenBuiltins/X86/keylocker.c
Log Message:
-----------
[CIR] Support x86 encodeKey builtins (#179308)
This PR implements CodeGen for encodeKey builtins in CIR upstream.
Issue https://github.com/llvm/llvm-project/issues/167765
Commit: bfe80fb3bbaa64c3473f03d7af18e481cb9f7b5c
https://github.com/llvm/llvm-project/commit/bfe80fb3bbaa64c3473f03d7af18e481cb9f7b5c
Author: Vladimir Vereschaka <vvereschaka at accesssoftek.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
A clang/cmake/caches/cross-linux-toolchain.cmake
Log Message:
-----------
[CMake] Add multi-target cross to ARM/AArch64 Linux toolchain CMake cache file. (#179598)
This cache file can be used to build a multi-target cross Windows/Linux
to ARM/Aarch64/etc. Linux toolchain.
[Replacement for CrossWinToARMLinux.cmake on the buildbot]
Commit: 6bdb7b0f000cd6c09e272844700be399f2a1b5b3
https://github.com/llvm/llvm-project/commit/6bdb7b0f000cd6c09e272844700be399f2a1b5b3
Author: jimingham <jingham at apple.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/include/lldb/Target/Process.h
M lldb/source/Target/Process.cpp
Log Message:
-----------
Cleanup the use of m_is_secondary_thread from PR #179799. (#180255)
This ivar was passed to the thread function for the private state thread
- mostly because the equivalent variable was passed in in the original
version of the code. But it was never used, so I didn't notice that the
ivar equivalent wasn't being initialized. I'm going to keep the ivar
because it will be useful when debugging to easily see whether you are
on the main or secondary private state thread.
So in this change, I set m_is_secondary_thread properly in the
constructor, but remove passing it to the thread function since it
wasn't needed there.
Commit: eff21afae01f4a8269a4beb6a7907d2abe6ad82a
https://github.com/llvm/llvm-project/commit/eff21afae01f4a8269a4beb6a7907d2abe6ad82a
Author: Henrik G. Olsson <hnrklssn at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
R llvm/include/llvm/TargetParser/AVRTargetParser.h
M llvm/include/llvm/TargetParser/Triple.h
R llvm/lib/TargetParser/AVRTargetParser.cpp
M llvm/lib/TargetParser/CMakeLists.txt
R llvm/test/tools/llvm-objdump/ELF/AVR/lit.local.cfg
R llvm/test/tools/llvm-objdump/ELF/AVR/mattr.test
M llvm/tools/llvm-objdump/llvm-objdump.cpp
Log Message:
-----------
Revert "[llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling" (#180252)
Reverts llvm/llvm-project#174731 due to introducing a cyclic dependency
when building LLVM with modules enabled: LLVM_Utils -> LLVM_Object ->
LLVM_Utils
Commit: 57d1fbf62cc71b8e1e5e89701d58a7dd47f9229a
https://github.com/llvm/llvm-project/commit/57d1fbf62cc71b8e1e5e89701d58a7dd47f9229a
Author: Vladimir Radosavljevic <129192835+vladimirradosavljevic at users.noreply.github.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/and-compare.ll
Log Message:
-----------
[InstCombine] Limit (icmp eq/ne (and (add A, Addend), Msk), C) fold to one use of and (#172858)
If the and has multiple uses, the fold can increase the instruction
count.
Commit: 13d8870d455fafa734d29b1f3703386ef6e3b5f8
https://github.com/llvm/llvm-project/commit/13d8870d455fafa734d29b1f3703386ef6e3b5f8
Author: sstipano <sstipano7 at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/docs/HowToUseInstrMappings.rst
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/MC/MCInstrDesc.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/MCA/InstrBuilder.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.cpp
M llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.h
M llvm/lib/Target/AMDGPU/R600InstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp
M llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
M llvm/lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.h
M llvm/test/TableGen/CPtrWildcard.td
M llvm/test/TableGen/DAGDefaultOps.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-replacerreg.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-imms.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-intrinsics.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-miflags.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-operand-types.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-patfrag-root.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-temp-defs.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-typeof.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-variadics.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
M llvm/test/TableGen/GlobalISelEmitter/ContextlessPredicates.td
M llvm/test/TableGen/GlobalISelEmitter/CustomPredicate.td
M llvm/test/TableGen/GlobalISelEmitter/DefaultOpsGlobalISel.td
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
M llvm/test/TableGen/GlobalISelEmitter/HwModes.td
M llvm/test/TableGen/GlobalISelEmitter/MatchTableOptimizer.td
M llvm/test/TableGen/GlobalISelEmitter/MatchTableOptimizerSameOperand-invalid.td
M llvm/test/TableGen/GlobalISelEmitter/OverloadedPtr.td
M llvm/test/TableGen/GlobalISelEmitter/RegSequence.td
M llvm/test/TableGen/GlobalISelEmitter/Subreg.td
M llvm/test/TableGen/GlobalISelEmitter/Variadic.td
M llvm/test/TableGen/GlobalISelEmitter/atomic-store.td
M llvm/test/TableGen/GlobalISelEmitter/dead-def.td
M llvm/test/TableGen/GlobalISelEmitter/frameindex.td
M llvm/test/TableGen/GlobalISelEmitter/gisel-physreg-input.td
M llvm/test/TableGen/GlobalISelEmitter/immarg-predicated.td
M llvm/test/TableGen/GlobalISelEmitter/immarg.td
M llvm/test/TableGen/GlobalISelEmitter/input-discard.td
M llvm/test/TableGen/GlobalISelEmitter/int64min.td
M llvm/test/TableGen/GlobalISelEmitter/multiple-output-discard.td
M llvm/test/TableGen/GlobalISelEmitter/multiple-output.td
M llvm/test/TableGen/GlobalISelEmitter/nested-subregs.td
M llvm/test/TableGen/GlobalISelEmitter/optional-def.td
M llvm/test/TableGen/GlobalISelEmitter/output-discard.td
M llvm/test/TableGen/GlobalISelEmitter/predicated-pattern-order.td
M llvm/test/TableGen/GlobalISelEmitter/undef-tied-input.td
M llvm/test/TableGen/GlobalISelEmitter/zero-reg.td
M llvm/test/TableGen/HasNoUse.td
M llvm/test/TableGen/RegClassByHwMode.td
M llvm/test/TableGen/dag-isel-instrument.td
M llvm/test/TableGen/dag-isel-regclass-emit-enum.td
M llvm/test/TableGen/dag-isel-res-order.td
M llvm/test/TableGen/get-named-operand-idx.td
M llvm/test/TableGen/multiple-type-casts-patfrags.td
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
M llvm/utils/TableGen/CodeGenMapTable.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
M llvm/utils/TableGen/InstrInfoEmitter.cpp
Log Message:
-----------
[MC][TableGen] Expand Opcode field of MCInstrDesc (#179652)
Increase width of Opcode to `int` from `short` to allow more capacity.
Commit: 85d94e17144f2ca250c91b827b59e6ddea675d31
https://github.com/llvm/llvm-project/commit/85d94e17144f2ca250c91b827b59e6ddea675d31
Author: jimingham <jingham at apple.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/source/Plugins/Process/Utility/StopInfoMachException.h
A lldb/test/API/macosx/stop-reason-exception/Makefile
A lldb/test/API/macosx/stop-reason-exception/TestMachExceptionData.py
A lldb/test/API/macosx/stop-reason-exception/main.c
Log Message:
-----------
Make StopInfoMachException return the right data. (#180088)
When I changed lldb so that the StopInfo's compute their own stop reason
data (before it was oddly done in SBThread::GetStopReasonData...) I
didn't notice that StopInfoMachException was relying on that routine's
default of returning the Value as the 0th exception data, and didn't
actually return its own data.
This fixes that, and makes us report the exception type, and the code
and subcode if the exception has them. I also added a test for this.
rdar://169755672
Commit: 4a94cddad253d7577f6ae2f53086e01af13b3bf2
https://github.com/llvm/llvm-project/commit/4a94cddad253d7577f6ae2f53086e01af13b3bf2
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel][WebAssembly][GlobalISel] Port 9976e5702f05a4019123ee1ad2bb9a8b69ca7dcb (#180270)
Co-authored-by: Pranav Kant <prka at google.com>
Commit: c0c42c4e3964f146fa5acd581b7d253af1157a27
https://github.com/llvm/llvm-project/commit/c0c42c4e3964f146fa5acd581b7d253af1157a27
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
Revert "Fix Bazel build for d005cb2" (#180271)
Reverts #180134, as the change it fixes was itself reverted in #180252
Commit: 734eb9540299fa519da2eb7015ffa09718ba48d2
https://github.com/llvm/llvm-project/commit/734eb9540299fa519da2eb7015ffa09718ba48d2
Author: Petr Vesely <veselypeta at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
A llvm/test/TableGen/DecoderEmitter/large-islands.td
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[Tablegen] Don't emit decoder tables with islands larger than 64 bits (#179651)
I have a downstream target which has 128-bit instructions where some
instructions can have large sections of encoding to be determined ahead
of time. This results in the island calculations for decoder tables to
emit checks over 64-bits.
This change will emit multiple separate checks when the island exceeds
64-bits.
Commit: 019ecdf7bbfd430cd9f2a61d1139f677621c9c31
https://github.com/llvm/llvm-project/commit/019ecdf7bbfd430cd9f2a61d1139f677621c9c31
Author: Tony Tao <tony.le.tao at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
A llvm/test/CodeGen/SystemZ/zos-alias-unsupported.ll
A llvm/test/CodeGen/SystemZ/zos-func-alias.ll
Log Message:
-----------
[SystemZ][GOFF] Implement emitGlobalAlias for GOFF/HLASM (#180041)
HLASM has a requirement where aliasing labels need to be emitted at the
same time as the aliasee label, similar to AIX. I used their
implementation for reference with some modifications as we can only
alias functions and we must emit all symbol attributes before the label
is emitted to ensure the XATTR instruction contains the correct
attributes.
---------
Co-authored-by: Tony Tao <tonytao at ca.ibm.com>
Commit: ef22f0bfb6a63b4eaf9ff95ba09240c7d6b15a79
https://github.com/llvm/llvm-project/commit/ef22f0bfb6a63b4eaf9ff95ba09240c7d6b15a79
Author: Nico Weber <thakis at chromium.org>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/BUILD.gn
Log Message:
-----------
[gn] port 9976e5702f05a40 (WebAssembly GISel)
Commit: 507c92ac08bad62d8ffa283d01ef93a65b90328c
https://github.com/llvm/llvm-project/commit/507c92ac08bad62d8ffa283d01ef93a65b90328c
Author: Nhat Nguyen <nhat7203 at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/CodeGenCXX/reflection-mangle-itanium.cpp
M clang/test/CodeGenCXX/reflection-mangle-ms.cpp
Log Message:
-----------
[clang]: immediate address of build issue (#180236)
Fixed the build issue happen
[here](https://github.com/llvm/llvm-project/pull/164692)
Issue here is this [function
](https://github.com/llvm/llvm-project/blob/main/clang/lib/Sema/TreeTransform.h#L13057-L13061)
doesn't return a type
Commit: 5c72240617e238d8c75c9cc975dc8a31e36e6fc8
https://github.com/llvm/llvm-project/commit/5c72240617e238d8c75c9cc975dc8a31e36e6fc8
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
A llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.wave.shuffle.ll
Log Message:
-----------
[AMDGPU] Add DPP16 Row Share optimization for llvm.amdgcn.wave.shuffle (#177470)
Adds logic to detect cases where the llvm.amdgcn.wave.shuffle intrinsic
is being applied to an index operand that would make the result
equivalent to the various Row Share flavors of DPP16 operations, and
replaces the intrinsic and the instructions computing the index with an
equivalent llvm.amdgcn.update.dpp call.
Commit: 52eb82e4f942db5e639c018c7757a1cca670333f
https://github.com/llvm/llvm-project/commit/52eb82e4f942db5e639c018c7757a1cca670333f
Author: Derek Schuff <dschuff at chromium.org>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-objcopy.rst
M llvm/docs/CommandGuide/llvm-strip.rst
M llvm/lib/ObjCopy/wasm/WasmObjcopy.cpp
M llvm/test/tools/llvm-objcopy/wasm/basic-strip.test
M llvm/test/tools/llvm-objcopy/wasm/strip-all.test
M llvm/tools/llvm-objcopy/CommonOpts.td
Log Message:
-----------
[objcopy][Wasm] Make strip-all remove all non-engine-interpreted sections (#180246)
Currently the default strip-all behavior is to remove sections known
to LLVM but leave others. Now that the standard specifies the section
name
"metadata.code.*" as used for compiler annotations interpreted by Wasm
engines, we can more confidently give strip its more conventional
behavior
of removing everything that won't be used by the engine.
Commit: 4919e0da50d41edb36670f1f1ce33d80703d7ac9
https://github.com/llvm/llvm-project/commit/4919e0da50d41edb36670f1f1ce33d80703d7ac9
Author: Demetrius Kanios <demetrius at kanios.net>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/test/CodeGen/WebAssembly/offset-fastisel.ll
M llvm/test/CodeGen/WebAssembly/signext-arg.ll
M llvm/test/CodeGen/WebAssembly/signext-inreg.ll
Log Message:
-----------
[WebAssembly][FastISel] Make use of `sign-ext` proposals instructions when available (#179855)
Enables FastISel to use the dedicated sign-extension instructions
(rather than shl, shr) when available.
Commit: 370764c8cb69e2272c7465d854f8291aa2776f53
https://github.com/llvm/llvm-project/commit/370764c8cb69e2272c7465d854f8291aa2776f53
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rv32p.ll
Log Message:
-----------
[RISCV] Use addd/subd for i64 add/sub for RV32+P. (#180129)
Add RISCVISD opcodes and custom type legalize to them.
Commit: a4c8e7537cc5288a25de948d266e56d0bffa6a64
https://github.com/llvm/llvm-project/commit/a4c8e7537cc5288a25de948d266e56d0bffa6a64
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M compiler-rt/lib/asan/asan_flags.cpp
Log Message:
-----------
[asan][AIX] Change #ifdef to #if for AIX guard (#180280)
When `SANITIZER_AIX` is introduced in #131866, it will always be defined
to either 0 or 1, so this guard should use `#if`.
Commit: b5b453d0dfb013de0275ae5bf704df943759e627
https://github.com/llvm/llvm-project/commit/b5b453d0dfb013de0275ae5bf704df943759e627
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
Log Message:
-----------
[NFC] [FlowSensitive] [StatusOr] add more tests for gtest macros
Reviewers: jvoung
Pull Request: https://github.com/llvm/llvm-project/pull/180072
Commit: bf4f5d2194b68c82b8e097f8f675556d76eef39a
https://github.com/llvm/llvm-project/commit/bf4f5d2194b68c82b8e097f8f675556d76eef39a
Author: Mikhail Gudim <mgudim at qti.qualcomm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/test/CodeGen/X86/cfi-epilogue-with-return.mir
M llvm/test/CodeGen/X86/cfi-epilogue-without-return.mir
M llvm/test/CodeGen/X86/cfi-inserter-callee-save-register-2.mir
M llvm/test/CodeGen/X86/cfi-inserter-callee-save-register.mir
A llvm/test/CodeGen/X86/cfi-xmm-asm.ll
M llvm/test/CodeGen/X86/cfi-xmm.ll
Log Message:
-----------
[X86][test] Auto-generate test checks for some cfi tests. NFC (#177248)
Commit: 29d374bf90de1cd28af5587724f7ba19b225b92e
https://github.com/llvm/llvm-project/commit/29d374bf90de1cd28af5587724f7ba19b225b92e
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
Log Message:
-----------
[NFC] [FlowSensitive] [StatusOr] Add tests for StatusOr ctors
Reviewers: jvoung
Reviewed By: jvoung
Pull Request: https://github.com/llvm/llvm-project/pull/180076
Commit: 233976c36488a66f0c505934a7bc5cb46d98c05e
https://github.com/llvm/llvm-project/commit/233976c36488a66f0c505934a7bc5cb46d98c05e
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
Log Message:
-----------
[NFC] [FlowSensitive] [StatusOr] Add test for more complicated Status logic
Reviewers: jvoung
Reviewed By: jvoung
Pull Request: https://github.com/llvm/llvm-project/pull/180075
Commit: 21fb35bf0bfa3c935a00898b54719e1f9a332f52
https://github.com/llvm/llvm-project/commit/21fb35bf0bfa3c935a00898b54719e1f9a332f52
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
Log Message:
-----------
[NFC] [FlowSensitive] [StatusOr] Add test for move assignment
Reviewers: jvoung
Reviewed By: jvoung
Pull Request: https://github.com/llvm/llvm-project/pull/180080
Commit: 543b949bd7ba0748dd3dade1b20a3bd093cb0c9b
https://github.com/llvm/llvm-project/commit/543b949bd7ba0748dd3dade1b20a3bd093cb0c9b
Author: Nico Weber <thakis at chromium.org>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Target/WebAssembly/BUILD.gn
Log Message:
-----------
[gn] port 9976e5702f05a40 more
Commit: 5f644d966e1ae02e06ea85cf693d80587149932f
https://github.com/llvm/llvm-project/commit/5f644d966e1ae02e06ea85cf693d80587149932f
Author: Sam Clegg <sbc at chromium.org>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
R lld/test/wasm/Inputs/import-attributes.s
M lld/test/wasm/import-attribute-mismatch.s
M lld/wasm/SymbolTable.cpp
Log Message:
-----------
[lld][WebAssembly] Improve import mismatch error reporting (#178715)
Followup to #178550
Commit: bd40d1de9c9ee65ef1264a36cee002f92c8d689b
https://github.com/llvm/llvm-project/commit/bd40d1de9c9ee65ef1264a36cee002f92c8d689b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/test/Transforms/LoopIdiom/reuse-lcssa-phi-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
Log Message:
-----------
Reapply "[SCEVExp] Use SCEVPtrToAddr in tryToReuseLCSSAPhi if possible. (#180257)"
This reverts commit cb905605b2e95f88296afe136b21a7d2476cb058.
Recommit the patch with a small change to check the destination
type matches the address type, to avoid a crash on mismatch.
Original message:
This patch updates tryToReuseLCSSAPhi to use SCEVPtrToAddr, unless using
SCEVPtrToInt allows re-use, because the IR already contains a re-usable
phi using PtrToInt.
This is a first step towards migrating to SCEVPtrToAddr and avoids
regressions in follow-up changes.
PR: https://github.com/llvm/llvm-project/pull/178727
Commit: 66f9ffbb2c285b1918cd6786b4dde46bde80892e
https://github.com/llvm/llvm-project/commit/66f9ffbb2c285b1918cd6786b4dde46bde80892e
Author: Fateme Hosseini <quic_fhossein at quicinc.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/Hexagon/CMakeLists.txt
M llvm/lib/Target/Hexagon/Hexagon.h
A llvm/lib/Target/Hexagon/HexagonLiveVariables.cpp
A llvm/lib/Target/Hexagon/HexagonLiveVariables.h
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/test/CodeGen/Hexagon/isel/mulh-scalar.ll
A llvm/test/CodeGen/Hexagon/live-vars/live-outs.ll
M llvm/test/CodeGen/Hexagon/nbench1.ll
M llvm/test/CodeGen/Hexagon/newvaluejump-kill.ll
M llvm/test/CodeGen/Hexagon/swp-matmul-bitext.ll
Log Message:
-----------
[Hexagon] Add post-RA live variables analysis (#179531)
This patch adds HexagonLiveVariables, a post-RA liveness analysis for
physical registers, to keep block live-ins/live-outs and operand
kill/dead markers consistent after late Hexagon transforms; it is run
after GenMux in the pre-emit pipeline.
Author: Sergei Larin <slarin at qti.qualcomm.com>
Patch By: Fateme Hosseini <fhossein at qti.qualcomm.com>
Co-authored-by: Sergei Larin <slarin at qti.qualcomm.com>
Commit: 703c2762d34d1fec27aa3347c3861e0f620132c3
https://github.com/llvm/llvm-project/commit/703c2762d34d1fec27aa3347c3861e0f620132c3
Author: Kewen Meng <Kewen.Meng at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll
M llvm/test/Transforms/LoopVectorize/conditional-scalar-assignment-vplan.ll
M llvm/unittests/Analysis/IVDescriptorsTest.cpp
Log Message:
-----------
Revert "[LV] Support conditional scalar assignments of masked operations" (#180275)
Reverts llvm/llvm-project#178862
revert to unblock bot:
https://lab.llvm.org/buildbot/#/builders/206/builds/13225
Commit: 1bb916c9af73bd3dc7943c8aaee63b34654d76f1
https://github.com/llvm/llvm-project/commit/1bb916c9af73bd3dc7943c8aaee63b34654d76f1
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixExplicitTruncation.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixImplicitTruncation.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptConstSwizzle.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptDynamicSwizzle.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptGetter.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptSetter.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixSplat.hlsl
M clang/test/CodeGenHLSL/BoolMatrix.hlsl
M clang/test/CodeGenHLSL/basic_types.hlsl
M clang/test/CodeGenHLSL/matrix-member-one-based-accessor-scalar-load.hlsl
M clang/test/CodeGenHLSL/matrix-member-one-based-swizzle-load.hlsl
M clang/test/CodeGenHLSL/matrix-member-zero-based-accessor-scalar-load.hlsl
M clang/test/CodeGenHLSL/matrix-member-zero-based-swizzle-load.hlsl
Log Message:
-----------
[HLSL] Represent Matrix as arrays of vectors in memory (#179861)
fixes https://github.com/llvm/llvm-project/issues/179859
For matrix types we need to check the language mode so we can change the
matrix memory layout to arrays of vectors. To make this play nice with
how the rest of clang treats matrices we need to modify the
MaybeConvertMatrixAddress and the CreateMemTemp function to know how to
reconstruct a flattened vector.
Rest of changes is just test updates.
Commit: 60ecb378960662a6579a66d2bbda98d681606868
https://github.com/llvm/llvm-project/commit/60ecb378960662a6579a66d2bbda98d681606868
Author: Argyrios Kyrtzidis <kyrtzidis at apple.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/include/llvm/CAS/BuiltinObjectHasher.h
M llvm/include/llvm/CAS/OnDiskGraphDB.h
A llvm/lib/CAS/BuiltinObjectHasher.cpp
M llvm/lib/CAS/CMakeLists.txt
M llvm/lib/CAS/OnDiskGraphDB.cpp
A llvm/unittests/CAS/BuiltinObjectHasherTest.cpp
M llvm/unittests/CAS/CMakeLists.txt
M llvm/unittests/CAS/OnDiskCommonUtils.h
M llvm/unittests/CAS/OnDiskGraphDBTest.cpp
Log Message:
-----------
[llvm/CAS] Add file-based APIs to `OnDiskGraphDB` (#179782)
These allow performing optimizations that reduce I/O and disk space
consumption. For example, when applicable, a file can be cloned directly
into the database directory, instead of needing to load it in memory and
then copy its contents into a new file.
These APIs are then used to optimize importing data from an upstream DB
by using file cloning where applicable.
Commit: ec15bddde5cb72f36d5aef56d9db4980e96f5a9f
https://github.com/llvm/llvm-project/commit/ec15bddde5cb72f36d5aef56d9db4980e96f5a9f
Author: Jan Voung <jvoung at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
A clang/include/clang/Analysis/CFGBackEdges.h
A clang/lib/Analysis/CFGBackEdges.cpp
M clang/lib/Analysis/CMakeLists.txt
M clang/lib/Analysis/FlowSensitive/TypeErasedDataflowAnalysis.cpp
A clang/unittests/Analysis/CFGBackEdgesTest.cpp
M clang/unittests/Analysis/CMakeLists.txt
M clang/unittests/Analysis/FlowSensitive/TypeErasedDataflowAnalysisTest.cpp
Log Message:
-----------
[clang][analysis][dataflow] Detect goto backedges to trigger Widen (#179546)
Currently, the Clang Dataflow Framework only does Widen on backedges
from structured loops.
Missing some Widen calls (e.g., when there are backedges from gotos)
could cause some analyses to iterate ~forever (until the max visits
limit is hit).
This adds a simple search for backedges, and triggers Widen on the
additional backedge nodes. Fixes [issue 179083.
](https://github.com/llvm/llvm-project/issues/179083)
Commit: f98893d2108cba37d9b40f22bc1d96e5c04d6272
https://github.com/llvm/llvm-project/commit/f98893d2108cba37d9b40f22bc1d96e5c04d6272
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/BUILD.gn
Log Message:
-----------
[gn build] Port 28042a87022b
Commit: 9fe8e8b8139c4035734c4da6454544ef94008564
https://github.com/llvm/llvm-project/commit/9fe8e8b8139c4035734c4da6454544ef94008564
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/CAS/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/CAS/BUILD.gn
Log Message:
-----------
[gn build] Port 60ecb3789606
Commit: d4d53b0a973c7482d283853b0eadab2a4062b753
https://github.com/llvm/llvm-project/commit/d4d53b0a973c7482d283853b0eadab2a4062b753
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/BUILD.gn
Log Message:
-----------
[gn build] Port 66f9ffbb2c28
Commit: b2f75086323a8a0de02bbd2546ffa05c5046a5b8
https://github.com/llvm/llvm-project/commit/b2f75086323a8a0de02bbd2546ffa05c5046a5b8
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Analysis/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Analysis/BUILD.gn
Log Message:
-----------
[gn build] Port ec15bddde5cb
Commit: 649c6bc6f7a17f62fa6948779b65fdc6b05f2cb7
https://github.com/llvm/llvm-project/commit/649c6bc6f7a17f62fa6948779b65fdc6b05f2cb7
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/TargetParser/BUILD.gn
Log Message:
-----------
[gn build] Port eff21afae01f
Commit: b74f8ad0092ab74b2b93bf3ccd22e48181b4d2d2
https://github.com/llvm/llvm-project/commit/b74f8ad0092ab74b2b93bf3ccd22e48181b4d2d2
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
Log Message:
-----------
[NFC] [FlowSensitive] [StatusOr] Add tests for member accesses
Reviewers: jvoung
Reviewed By: jvoung
Pull Request: https://github.com/llvm/llvm-project/pull/180077
Commit: 9e355c8ec39acae728e9b1fa32fd123c1e4af855
https://github.com/llvm/llvm-project/commit/9e355c8ec39acae728e9b1fa32fd123c1e4af855
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
A llvm/test/CodeGen/SPIRV/memory-inst-large-align.ll
Log Message:
-----------
[SPIRV] Fix alignment overflow in memory intrinsics (#180184)
Per SPIR-V spec alignment is 32-bit integer, so it should be encoded as
i8 in the intrinsics'
def.
Commit: be18ac87b73a1092fff063f725106bdb88c3a18c
https://github.com/llvm/llvm-project/commit/be18ac87b73a1092fff063f725106bdb88c3a18c
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
A llvm/test/CodeGen/SPIRV/memset-large-size.ll
Log Message:
-----------
[SPIRV] Fix APInt overflow in memset constant array creation (#180189)
In getOrCreateConstIntArray(), the cache UniqueKey encoded the array
size (Num) using the array element type (e.g. i8 for memset). Since Num
is a size_t that can exceed 255, this caused an APInt overflow when Num
> 255. Use i64 for Num in the UniqueKey.
Commit: 71a8973a3e2696579438781403e88f66b5adc534
https://github.com/llvm/llvm-project/commit/71a8973a3e2696579438781403e88f66b5adc534
Author: RattataKing <amilywu2 at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M mlir/include/mlir/Bindings/Python/Globals.h
M mlir/include/mlir/Bindings/Python/IRAttributes.h
M mlir/include/mlir/Bindings/Python/NanobindUtils.h
M mlir/lib/Bindings/Python/ExecutionEngineModule.cpp
M mlir/lib/Bindings/Python/Globals.cpp
M mlir/lib/Bindings/Python/IRAffine.cpp
M mlir/lib/Bindings/Python/IRAttributes.cpp
M mlir/lib/Bindings/Python/IRInterfaces.cpp
M mlir/lib/Bindings/Python/IRTypes.cpp
Log Message:
-----------
[MLIR][Python] Remove partial LLVM APIs in python bindings (4/n) (#180256)
This PR continues work from #178290
It replaces some LLVM utilities with straightforward `std::`
equivalents.
Commit: 278fd0553ef5834e005a048a6b480631f3fc1b38
https://github.com/llvm/llvm-project/commit/278fd0553ef5834e005a048a6b480631f3fc1b38
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CodeGen/paren-list-agg-init.cpp
M clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp
M clang/test/CodeGenCXX/amdgcn-func-arg.cpp
M clang/test/CodeGenCXX/control-flow-in-stmt-expr.cpp
M clang/test/CodeGenCXX/cxx2a-destroying-delete.cpp
A clang/test/CodeGenCXX/destructor-dead-on-return.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors2.cpp
M clang/test/CodeGenCXX/ptrauth-apple-kext-indirect-virtual-dtor-call.cpp
M clang/test/CodeGenObjCXX/objc-struct-cxx-abi.mm
M clang/test/CodeGenObjCXX/ptrauth-struct-cxx-abi.mm
M clang/test/DebugInfo/CXX/bpf-structors.cpp
M clang/test/DebugInfo/CXX/trivial_abi.cpp
M clang/test/OpenMP/amdgcn_target_global_constructor.cpp
M clang/test/OpenMP/distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/distribute_private_codegen.cpp
M clang/test/OpenMP/distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_simd_private_codegen.cpp
M clang/test/OpenMP/for_firstprivate_codegen.cpp
M clang/test/OpenMP/for_lastprivate_codegen.cpp
M clang/test/OpenMP/for_linear_codegen.cpp
M clang/test/OpenMP/for_private_codegen.cpp
M clang/test/OpenMP/for_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/parallel_copyin_codegen.cpp
M clang/test/OpenMP/parallel_firstprivate_codegen.cpp
M clang/test/OpenMP/parallel_for_linear_codegen.cpp
M clang/test/OpenMP/parallel_master_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_firstprivate_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_lastprivate_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/parallel_private_codegen.cpp
M clang/test/OpenMP/parallel_reduction_codegen.cpp
M clang/test/OpenMP/scope_codegen.cpp
M clang/test/OpenMP/sections_firstprivate_codegen.cpp
M clang/test/OpenMP/sections_lastprivate_codegen.cpp
M clang/test/OpenMP/sections_private_codegen.cpp
M clang/test/OpenMP/sections_reduction_codegen.cpp
M clang/test/OpenMP/simd_private_taskloop_codegen.cpp
M clang/test/OpenMP/single_codegen.cpp
M clang/test/OpenMP/single_firstprivate_codegen.cpp
M clang/test/OpenMP/single_private_codegen.cpp
M clang/test/OpenMP/target_has_device_addr_codegen.cpp
M clang/test/OpenMP/target_in_reduction_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_private_codegen.cpp
M clang/test/OpenMP/task_codegen.cpp
M clang/test/OpenMP/task_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_private_codegen.cpp
M clang/test/OpenMP/teams_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_private_codegen.cpp
M clang/test/OpenMP/teams_private_codegen.cpp
M clang/test/OpenMP/threadprivate_codegen.cpp
M clang/test/utils/update_cc_test_checks/Inputs/basic-cplusplus.cpp.expected
M clang/test/utils/update_cc_test_checks/Inputs/explicit-template-instantiation.cpp.expected
Log Message:
-----------
[Clang] Mark this pointer in destructors dead_on_return (#166276)
This helps to clean up any dead stores that come up at the end of the
destructor. The motivating example was a refactoring in libc++'s
basic_string implementation in 8dae17be2991cd7f0d7fd9aa5aecd064520a14f6
that added a zeroing store into the destructor, causing a large
performance regression on an internal workload. We also saw a ~0.2%
performance increase on an internal server workload when enabling this.
I also tested this against all of the non-flaky tests in our large C++
codebase and found a minimal number of issues that all happened to be in
user code.
Commit: 2555f3b0edb5de40ba17076072a55bc3e997626d
https://github.com/llvm/llvm-project/commit/2555f3b0edb5de40ba17076072a55bc3e997626d
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeAnnotations.h
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
M clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Treat std::unique_ptr::release() as a move operation (#180230)
Add support for `std::unique_ptr::release()` in lifetime analysis to
avoid false positives when ownership is manually transferred via
`release()`.
- Added a new function `isUniquePtrRelease()` to detect when
`std::unique_ptr::release()` is called
- Modified `handleInvalidatingCall()` to mark the unique_ptr as moved
when release() is called
When manually transferring ownership using `std::unique_ptr::release()`,
the lifetime analysis would previously generate false positive
use-after-free warnings. This change treats `release()` as a move
operation, correctly modeling the ownership transfer semantics and
reducing false positives in code that manually manages ownership.
Commit: f7aa1cdc9b91493c56425505faa0cec3dfac5441
https://github.com/llvm/llvm-project/commit/f7aa1cdc9b91493c56425505faa0cec3dfac5441
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/lib/Frontend/FrontendAction.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/Modules/validate-file-content.m
M clang/test/PCH/debug-info-pch-path.c
M clang/test/PCH/modified-module-dependency.m
A clang/test/PCH/pch-input-path-independent.c
M clang/test/PCH/validate-file-content.m
Log Message:
-----------
[clang] Canonicalizing `-include-pch` input in the Frontend (#180065)
This patch adds logic to canonicalize `-include-pch`'s input in the
frontend. This way, the `ASTWriter` always serializes the canonicalized
path to the included pch file whether the input is an absolute path or a
relative path.
Fixes rdar://168596546.
Commit: 8102ebf6a3c8c5d2665aa11d0fb5aa264ffe1b04
https://github.com/llvm/llvm-project/commit/8102ebf6a3c8c5d2665aa11d0fb5aa264ffe1b04
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
Log Message:
-----------
[MLIR][XeGPU] Fixing PR179016 minor issues (#180295)
Fix two issues brough by PR179016:
1. unused variable if build the option with
"DLLVM_ENABLE_ASSERTIONS=OFF"
2. Recover modification to recoverTemporaryLayouts() brought by
PR176737. Unintentionally lost during the merging process.
Commit: 047db150c66e245e9df7db178b893ce6b29820f5
https://github.com/llvm/llvm-project/commit/047db150c66e245e9df7db178b893ce6b29820f5
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CodeGen/paren-list-agg-init.cpp
M clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp
M clang/test/CodeGenCXX/amdgcn-func-arg.cpp
M clang/test/CodeGenCXX/control-flow-in-stmt-expr.cpp
M clang/test/CodeGenCXX/cxx2a-destroying-delete.cpp
R clang/test/CodeGenCXX/destructor-dead-on-return.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors2.cpp
M clang/test/CodeGenCXX/ptrauth-apple-kext-indirect-virtual-dtor-call.cpp
M clang/test/CodeGenObjCXX/objc-struct-cxx-abi.mm
M clang/test/CodeGenObjCXX/ptrauth-struct-cxx-abi.mm
M clang/test/DebugInfo/CXX/bpf-structors.cpp
M clang/test/DebugInfo/CXX/trivial_abi.cpp
M clang/test/OpenMP/amdgcn_target_global_constructor.cpp
M clang/test/OpenMP/distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/distribute_private_codegen.cpp
M clang/test/OpenMP/distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_simd_private_codegen.cpp
M clang/test/OpenMP/for_firstprivate_codegen.cpp
M clang/test/OpenMP/for_lastprivate_codegen.cpp
M clang/test/OpenMP/for_linear_codegen.cpp
M clang/test/OpenMP/for_private_codegen.cpp
M clang/test/OpenMP/for_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/parallel_copyin_codegen.cpp
M clang/test/OpenMP/parallel_firstprivate_codegen.cpp
M clang/test/OpenMP/parallel_for_linear_codegen.cpp
M clang/test/OpenMP/parallel_master_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_firstprivate_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_lastprivate_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/parallel_private_codegen.cpp
M clang/test/OpenMP/parallel_reduction_codegen.cpp
M clang/test/OpenMP/scope_codegen.cpp
M clang/test/OpenMP/sections_firstprivate_codegen.cpp
M clang/test/OpenMP/sections_lastprivate_codegen.cpp
M clang/test/OpenMP/sections_private_codegen.cpp
M clang/test/OpenMP/sections_reduction_codegen.cpp
M clang/test/OpenMP/simd_private_taskloop_codegen.cpp
M clang/test/OpenMP/single_codegen.cpp
M clang/test/OpenMP/single_firstprivate_codegen.cpp
M clang/test/OpenMP/single_private_codegen.cpp
M clang/test/OpenMP/target_has_device_addr_codegen.cpp
M clang/test/OpenMP/target_in_reduction_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_private_codegen.cpp
M clang/test/OpenMP/task_codegen.cpp
M clang/test/OpenMP/task_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_private_codegen.cpp
M clang/test/OpenMP/teams_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_private_codegen.cpp
M clang/test/OpenMP/teams_private_codegen.cpp
M clang/test/OpenMP/threadprivate_codegen.cpp
M clang/test/utils/update_cc_test_checks/Inputs/basic-cplusplus.cpp.expected
M clang/test/utils/update_cc_test_checks/Inputs/explicit-template-instantiation.cpp.expected
Log Message:
-----------
Revert "[Clang] Mark this pointer in destructors dead_on_return (#166276)"
This reverts commit 278fd0553ef5834e005a048a6b480631f3fc1b38.
This was causing some buildbot failures in DSE:
1. https://lab.llvm.org/buildbot/#/builders/25/builds/15425
2. https://lab.llvm.org/buildbot/#/builders/24/builds/17304
Commit: 4d6913e14f4409bf8bd4dffc3dccb18df4c4a28d
https://github.com/llvm/llvm-project/commit/4d6913e14f4409bf8bd4dffc3dccb18df4c4a28d
Author: Christopher Di Bella <cjdb at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M libcxx/include/__vector/vector.h
Log Message:
-----------
[libcxx] Rename `__split_buffer` alias template to `_SplitBuffer` (#180284)
`-Wchanges-meaning` is a GCC warning that catches shadowing in more
contexts. While a bit annoying here, it's a helpful warning. As such, we
need to rename the `__split_buffer` alias template in `std::vector` so
that we don't trip it up.
Commit: 12d0672b3e2c3833d70f41e16edf4b5b4f5a3f0b
https://github.com/llvm/llvm-project/commit/12d0672b3e2c3833d70f41e16edf4b5b4f5a3f0b
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
A clang/test/CIR/Transforms/flatten-cleanup-scope-multi-exit.cir
A clang/test/CIR/Transforms/flatten-cleanup-scope-nyi.cir
A clang/test/CIR/Transforms/flatten-cleanup-scope-simple.cir
Log Message:
-----------
[CIR] Implement initial flattening of cleanup scope ops (#180063)
This implements flattening of `cir.cleanup.scope` operations that have a
single exit, and introduces checks to detect multiple exit cases and
report an error when they are encountered. At this point, only normal
cleanups are flattened. EH cleanup handling will be added in a future
change.
Substantial amounts of this PR were created using agentic AI tools, but
I have carefully reviewed the code, comments, and tests and made changes
as needed.
Commit: 570055bf97575107fadfc56426c893414dca8fbd
https://github.com/llvm/llvm-project/commit/570055bf97575107fadfc56426c893414dca8fbd
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-elemwise.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
Log Message:
-----------
[MLIR][XeGPU] Propagate layout from anchor ops before Wg To Sg & Blocking Pass (#179490)
This PR calls recoverTemporaryLayout before the XeGPUWgtoSgDistribute &
XeGPUBlocking Pass to recover all the temporary operand layout which
might be required by the transformation patterns for checks and
verification
Commit: 191af6c254a83c9eb72df92a5db534d8fd4f0701
https://github.com/llvm/llvm-project/commit/191af6c254a83c9eb72df92a5db534d8fd4f0701
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/Target/TargetMachine.h
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrControl.td
M llvm/lib/Target/X86/X86InstrFragments.td
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Target/X86/X86TargetMachine.h
A llvm/test/CodeGen/X86/cond-loop.ll
A llvm/test/Transforms/PreISelIntrinsicLowering/cond-loop.ll
Log Message:
-----------
Add llvm.cond.loop intrinsic.
The llvm.cond.loop intrinsic is semantically equivalent to a conditional
branch conditioned on ``pred`` to a basic block consisting only of an
unconditional branch to itself. Unlike such a branch, it is guaranteed
to use specific instructions. This allows an interrupt handler or
other introspection mechanism to straightforwardly detect whether
the program is currently spinning in the infinite loop and possibly
terminate the program if so. The intent is that this intrinsic may
be used as a more efficient alternative to a conditional branch to
a call to ``llvm.trap`` in circumstances where the loop detection
is guaranteed to be present. This construct has been experimentally
determined to be executed more efficiently (when the branch is not taken)
than a conditional branch to a trap instruction on AMD and older Intel
microarchitectures, and is also more code size efficient by avoiding the
need to emit a trap instruction and possibly a long branch instruction.
On i386 and x86_64, the infinite loop is guaranteed to consist of a short
conditional branch instruction that branches to itself. Specifically,
the first byte of the instruction will be between 0x70 and 0x7F, and
the second byte will be 0xFE.
Part of this RFC:
https://discourse.llvm.org/t/rfc-optimizing-conditional-traps/89456
Reviewers: arsenm, RKSimon, fmayer, vitalybuka
Pull Request: https://github.com/llvm/llvm-project/pull/177686
Commit: a544d3792c1e7404dae9d25104ee954d2a54e9a3
https://github.com/llvm/llvm-project/commit/a544d3792c1e7404dae9d25104ee954d2a54e9a3
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/docs/UsersManual.rst
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Driver/SanitizerArgs.h
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/Driver/SanitizerArgs.cpp
A clang/test/CodeGenCXX/sanitize-trap-loop.cpp
A clang/test/Driver/sanitize-trap-loop.c
Log Message:
-----------
CodeGen, Driver: Add -fsanitize-trap-loop option.
This option may be used to opt into infinite loops for failed UBSan and
CFI checks. It causes Clang to generate an llvm.cond.loop intrinsic call
instead of a conditional branch to a trap instruction when generating
code for a conditional trap.
Part of this RFC:
https://discourse.llvm.org/t/rfc-optimizing-conditional-traps/89456
Reviewers: fmayer, vitalybuka
Reviewed By: vitalybuka, fmayer
Pull Request: https://github.com/llvm/llvm-project/pull/177688
Commit: fae1cc06e62cb0ce764b0c869df99a514dd1c901
https://github.com/llvm/llvm-project/commit/fae1cc06e62cb0ce764b0c869df99a514dd1c901
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/include/clang/Driver/SanitizerArgs.h
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M compiler-rt/include/sanitizer/ubsan_interface.h
M compiler-rt/lib/ubsan/CMakeLists.txt
A compiler-rt/lib/ubsan/ubsan_loop_detect.cpp
M compiler-rt/test/cfi/CMakeLists.txt
M compiler-rt/test/cfi/lit.cfg.py
M compiler-rt/test/cfi/lit.site.cfg.py.in
A compiler-rt/test/cfi/trap_loop_signal_handler.inc
M llvm/utils/gn/secondary/compiler-rt/lib/ubsan/BUILD.gn
Log Message:
-----------
ubsan: Add loop detection runtime and e2e tests for -fsanitize-trap-loop.
Reviewers: fmayer, vitalybuka
Reviewed By: vitalybuka, fmayer
Pull Request: https://github.com/llvm/llvm-project/pull/179011
Commit: 1106a41bb868929854deb1acfc856a41c984732d
https://github.com/llvm/llvm-project/commit/1106a41bb868929854deb1acfc856a41c984732d
Author: woruyu <1214539920 at qq.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/test/Dialect/GPU/invalid.mlir
Log Message:
-----------
[mlir][GPU] Verify known_{block,grid,cluster}_size is at least 1 (#179886)
### Summary
This PR resolves https://github.com/llvm/llvm-project/issues/179604
Commit: 3449207b7b22f5c28d73046d076d8048aac43353
https://github.com/llvm/llvm-project/commit/3449207b7b22f5c28d73046d076d8048aac43353
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm
Log Message:
-----------
[lldb][NFC] Fix the SPI prototypes in HostInfoMacOSX.mm
to unblock a CI bot building with a different set of headers.
rdar://148939795
Commit: a362593e0d02ff5677620b10ad5adeff0a8196a5
https://github.com/llvm/llvm-project/commit/a362593e0d02ff5677620b10ad5adeff0a8196a5
Author: Ganesh <Ganesh.Gopalasubramanian at amd.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Basic/Targets/X86.cpp
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/Driver/x86-march.c
M clang/test/Frontend/x86-target-cpu.c
M clang/test/Misc/target-invalid-cpu-note/x86.c
M clang/test/Preprocessor/predefined-arch-macros.c
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/TargetParser/X86TargetParser.h
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86PfmCounters.td
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
M llvm/test/CodeGen/X86/bypass-slow-division-64.ll
M llvm/test/CodeGen/X86/cmp16.ll
M llvm/test/CodeGen/X86/cpus-amd.ll
M llvm/test/CodeGen/X86/rdpru.ll
M llvm/test/CodeGen/X86/shuffle-as-shifts.ll
M llvm/test/CodeGen/X86/slow-unaligned-mem.ll
M llvm/test/CodeGen/X86/sqrt-fastmath-tune.ll
M llvm/test/CodeGen/X86/tuning-shuffle-permilpd-avx512.ll
M llvm/test/CodeGen/X86/tuning-shuffle-permilps-avx512.ll
M llvm/test/CodeGen/X86/tuning-shuffle-unpckpd-avx512.ll
M llvm/test/CodeGen/X86/tuning-shuffle-unpckps-avx512.ll
M llvm/test/CodeGen/X86/vector-shuffle-fast-per-lane.ll
M llvm/test/CodeGen/X86/vpdpwssd.ll
M llvm/test/CodeGen/X86/x86-64-double-shifts-var.ll
M llvm/test/MC/X86/x86_long_nop.s
Log Message:
-----------
[X86] AMD Zen 6 Initial enablement (#179150)
This patch adds initial support for AMD Zen 6 architecture (znver6):
- Added znver6 CPU target recognition in Clang and LLVM
- Updated compiler-rt CPU model detection for znver6
- Added znver6 to target parser and host CPU detection
- Added znver6 to various optimizer tests
znver6 features: FP16, AVXVNNIINT8, AVXNECONVERT, AVXIFMA (without BMM).
Commit: 2a2a394215b38631588d504d2b671df13370395b
https://github.com/llvm/llvm-project/commit/2a2a394215b38631588d504d2b671df13370395b
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizeZeroSizeArrays.cpp
M llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-alloca-count.ll
M llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-alloca-nested.ll
M llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-alloca.ll
Log Message:
-----------
[SPIRV] Optimize getAllocatedType calls in LegalizeZeroSizeArrays (#179068)
Compute zero-sized allocation accurately using size APIs, and replace
them with 1 byte instead of 1 pointer of space.
Co-authored-by: Claude Sonnet 4.5 <noreply at anthropic.com>
Commit: 060f32534469262862a7f76e63836762d111cfa6
https://github.com/llvm/llvm-project/commit/060f32534469262862a7f76e63836762d111cfa6
Author: Abhishek Varma <avarma094 at gmail.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/vectorization/convolution-with-patterns.mlir
Log Message:
-----------
[mlir][Linalg] Promote lhs/rhs when vectorizing conv1D as outerproduct (#179883)
-- vector.outerproduct requires lhs/rhs to have same element type as the
result.
-- This commit adds a fix to promote lhs/rhs to have result's element
type when vectorizing conv1D slice to vector.outerproduct.
-- This is along the similar lines of what happens when we are
vectorizing conv1D slice to vector.contract - the corresponding
CHECK line was incorrect and this commit fixes that too.
Signed-off-by: Abhishek Varma <abhvarma at amd.com>
Commit: 19d681177f450822ad3db4f26aaa8331c8dd952b
https://github.com/llvm/llvm-project/commit/19d681177f450822ad3db4f26aaa8331c8dd952b
Author: Vladimir Vereschaka <vvereschaka at accesssoftek.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/docs/HowToUseInstrMappings.rst
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/MC/MCInstrDesc.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/MCA/InstrBuilder.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.cpp
M llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.h
M llvm/lib/Target/AMDGPU/R600InstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp
M llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
M llvm/lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.h
M llvm/test/TableGen/CPtrWildcard.td
M llvm/test/TableGen/DAGDefaultOps.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-replacerreg.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-imms.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-intrinsics.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-miflags.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-operand-types.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-patfrag-root.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-temp-defs.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-typeof.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-variadics.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
M llvm/test/TableGen/GlobalISelEmitter/ContextlessPredicates.td
M llvm/test/TableGen/GlobalISelEmitter/CustomPredicate.td
M llvm/test/TableGen/GlobalISelEmitter/DefaultOpsGlobalISel.td
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
M llvm/test/TableGen/GlobalISelEmitter/HwModes.td
M llvm/test/TableGen/GlobalISelEmitter/MatchTableOptimizer.td
M llvm/test/TableGen/GlobalISelEmitter/MatchTableOptimizerSameOperand-invalid.td
M llvm/test/TableGen/GlobalISelEmitter/OverloadedPtr.td
M llvm/test/TableGen/GlobalISelEmitter/RegSequence.td
M llvm/test/TableGen/GlobalISelEmitter/Subreg.td
M llvm/test/TableGen/GlobalISelEmitter/Variadic.td
M llvm/test/TableGen/GlobalISelEmitter/atomic-store.td
M llvm/test/TableGen/GlobalISelEmitter/dead-def.td
M llvm/test/TableGen/GlobalISelEmitter/frameindex.td
M llvm/test/TableGen/GlobalISelEmitter/gisel-physreg-input.td
M llvm/test/TableGen/GlobalISelEmitter/immarg-predicated.td
M llvm/test/TableGen/GlobalISelEmitter/immarg.td
M llvm/test/TableGen/GlobalISelEmitter/input-discard.td
M llvm/test/TableGen/GlobalISelEmitter/int64min.td
M llvm/test/TableGen/GlobalISelEmitter/multiple-output-discard.td
M llvm/test/TableGen/GlobalISelEmitter/multiple-output.td
M llvm/test/TableGen/GlobalISelEmitter/nested-subregs.td
M llvm/test/TableGen/GlobalISelEmitter/optional-def.td
M llvm/test/TableGen/GlobalISelEmitter/output-discard.td
M llvm/test/TableGen/GlobalISelEmitter/predicated-pattern-order.td
M llvm/test/TableGen/GlobalISelEmitter/undef-tied-input.td
M llvm/test/TableGen/GlobalISelEmitter/zero-reg.td
M llvm/test/TableGen/HasNoUse.td
M llvm/test/TableGen/RegClassByHwMode.td
M llvm/test/TableGen/dag-isel-instrument.td
M llvm/test/TableGen/dag-isel-regclass-emit-enum.td
M llvm/test/TableGen/dag-isel-res-order.td
M llvm/test/TableGen/get-named-operand-idx.td
M llvm/test/TableGen/multiple-type-casts-patfrags.td
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
M llvm/utils/TableGen/CodeGenMapTable.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
M llvm/utils/TableGen/InstrInfoEmitter.cpp
Log Message:
-----------
Revert "[MC][TableGen] Expand Opcode field of MCInstrDesc" (#180321)
Reverts llvm/llvm-project#179652
This PR causes the out-of-memory build failures on many Windows
builders.
Commit: 15c9c77ccf645bc2cdc6da96a115a4e2f930706b
https://github.com/llvm/llvm-project/commit/15c9c77ccf645bc2cdc6da96a115a4e2f930706b
Author: Djordje Todorovic <djordje.todorovic at htecgroup.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsISelLowering.cpp
A llvm/test/CodeGen/Mips/musttail-disabled.ll
Log Message:
-----------
[MIPS] Do not silently ignore musttail (#178310)
Do not silently ignore musttail markings if UseMipsTailCalls is false.
Commit: 6c6fb00c942ef1ca571bb376969c37f1e6e2ea1f
https://github.com/llvm/llvm-project/commit/6c6fb00c942ef1ca571bb376969c37f1e6e2ea1f
Author: Iasonaskrpr <126663668+Iasonaskrpr at users.noreply.github.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/combine-reg-or-const.ll
M llvm/test/CodeGen/AMDGPU/min.ll
A llvm/test/CodeGen/AMDGPU/s_or_b32_transformation.ll
Log Message:
-----------
[AMDGPU] Optimize S_OR_B32 to S_ADDK_I32 where possible (#177949)
This PR fixes #177753, converting disjoint S_OR_B32 to S_ADDK_I32
whenever possible, it avoids this transformation in case S_OR_B32 can be
converted to bitset.
Note on Test Failures (Draft Status) This change causes significant
register reshuffling across the test suite due to the new allocation
hints and the swaps performed in case src0 is not a register and src1,
along with the change from or to addk. To avoid a massive, noisy diff
during the initial logic review:
This Draft PR only includes a representative sample of updated tests.
CodeGen/AMDGPU/combine-reg-or-const.ll -> Showcases change from S_OR to
S_ADDK
CodeGen/AMDGPU/s-barrier.ll -> Showcases swap between Src0 and Src1 if
src0 is not a register
The rest of the tests show the result of the register allocation hint we
give, I have checked every test I updated and they seem ok to me.
Once the core logic is approved, I will run the update script across the
remaining ~70 failing tests and mark the PR as "Ready for Review."
Commit: 269fda118ae2815369cabd1dbfdb1be33b314c0c
https://github.com/llvm/llvm-project/commit/269fda118ae2815369cabd1dbfdb1be33b314c0c
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
Log Message:
-----------
[AMDGPU] Fix pattern selecting fmul to v_fma_mix_f32 (#180210)
This needs to use an addend of -0.0 to get the correct result when the
result should be -0.0.
Commit: 763761888f644615cde7db1d896e46daf2b85db3
https://github.com/llvm/llvm-project/commit/763761888f644615cde7db1d896e46daf2b85db3
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M libcxx/test/benchmarks/stop_token.bench.cpp
Log Message:
-----------
[libc++] Reduce the number of runs on the stop_token benchmarks (#179914)
Testing a bunch of sizes has relatively little value. This reduces the
number of benchmarks so we can run them on a regular basis.
Fixes #179697
Commit: 806ad8860c637cca762c535953a510db03a0bc9f
https://github.com/llvm/llvm-project/commit/806ad8860c637cca762c535953a510db03a0bc9f
Author: Michał Górny <mgorny at gentoo.org>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M compiler-rt/lib/ubsan/CMakeLists.txt
Log Message:
-----------
[compiler-rt] [ubsan] Fix missing include directory (#180341)
Fixes missing `-I` path that broke standalone builds in #179011. Matches
`include_directories()` in other compiler-rt libraries.
Signed-off-by: Michał Górny <mgorny at gentoo.org>
Commit: 8d2078332c23b10dcf3571adc1a186e5c65f82df
https://github.com/llvm/llvm-project/commit/8d2078332c23b10dcf3571adc1a186e5c65f82df
Author: hanbeom <kese111 at gmail.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/test/Transforms/InstCombine/add.ll
M llvm/test/Transforms/InstCombine/add2.ll
M llvm/test/Transforms/InstCombine/rem-mul-shl.ll
Log Message:
-----------
[InstCombine] Shrink added constant using LHS known zeros (#174380)
Previously, `SimplifyDemandedUseBits` for `add` instructions only
used known zeros from the RHS to simplify the LHS. It failed to
handle the symmetric case where the LHS has known zeros and the
result does not demand the low bits.
This patch implements this missing optimization, allowing the RHS
constant to be shrunk when the LHS low bits are known zero and unused.
Proof: https://alive2.llvm.org/ce/z/6v9iFY
Fixed: https://github.com/llvm/llvm-project/issues/135411
Commit: 9e8caa78349f21ba6f27e718d7f8461c8dcfd809
https://github.com/llvm/llvm-project/commit/9e8caa78349f21ba6f27e718d7f8461c8dcfd809
Author: Haoren Wang <43286339+MetalOxideSemi at users.noreply.github.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
A llvm/test/CodeGen/X86/selectiondag-dbgvalue-null-crash.ll
Log Message:
-----------
[SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (#174341)
## Summary
Fix null pointer dereference in
`SelectionDAGBuilder::resolveDanglingDebugInfo`.
## Problem
`Val.getNode()->getIROrder()` is called before checking if
`Val.getNode()` is null, causing crashes when compiling code with debug
info that contains aggregate constants with nested empty structs.
## Solution
Move the `ValSDNodeOrder` declaration inside the `if (Val.getNode())`
block.
## Test Case
Reproduces with aggregate types containing nested empty structs:
```llvm
%3 = insertvalue { { i1, {} }, ptr, { { {} }, { {} } }, i64 }
{ { i1, {} } zeroinitializer, ptr null, { { {} }, { {} } } zeroinitializer, i64 2 },
ptr %2, 1, !dbg !893
## Crash stack
0. Program arguments: llc-20 -O3 -mcpu=native -relocation-model=pic -filetype=obj /cloudide/workspace/temp/sf.ll -o /dev/null
1. Running pass 'Function Pass Manager' on module '/cloudide/workspace/temp/sf.ll'.
2. Running pass 'X86 DAG->DAG Instruction Selection' on function '@filter_create'
Stack dump without symbol names (ensure you have llvm-symbolizer in your PATH or set the environment var `LLVM_SYMBOLIZER_PATH` to point to it):
0 libLLVM.so.20.1 0x00007ff87ebbdf86 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) + 54
1 libLLVM.so.20.1 0x00007ff87ebbbb90 llvm::sys::RunSignalHandlers() + 80
2 libLLVM.so.20.1 0x00007ff87ebbe640
3 libpthread.so.0 0x00007ff87db79140
4 libLLVM.so.20.1 0x00007ff87f3fd2ff llvm::SelectionDAGBuilder::resolveDanglingDebugInfo(llvm::Value const*, llvm::SDValue) + 303
5 libLLVM.so.20.1 0x00007ff87f3fda5e llvm::SelectionDAGBuilder::getValue(llvm::Value const*) + 142
6 libLLVM.so.20.1 0x00007ff87f3fe79f llvm::SelectionDAGBuilder::getValueImpl(llvm::Value const*) + 3343
7 libLLVM.so.20.1 0x00007ff87f3fda34 llvm::SelectionDAGBuilder::getValue(llvm::Value const*) + 100
8 libLLVM.so.20.1 0x00007ff87f3fc1ab llvm::SelectionDAGBuilder::visitInsertValue(llvm::InsertValueInst const&) + 603
9 libLLVM.so.20.1 0x00007ff87f3eeaf7 llvm::SelectionDAGBuilder::visit(llvm::Instruction const&) + 327
10 libLLVM.so.20.1 0x00007ff87f4904b8 llvm::SelectionDAGISel::SelectBasicBlock(llvm::ilist_iterator_w_bits<llvm::ilist_detail::node_options<llvm::Instruction, false, false, void, true, llvm::BasicBlock>, false, true>, llvm::ilist_iterator_w_bits<llvm::ilist_detail::node_options<llvm::Instruction, false, false, void, true, llvm::BasicBlock>, false, true>, bool&) + 72
11 libLLVM.so.20.1 0x00007ff87f490304 llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) + 5956
12 libLLVM.so.20.1 0x00007ff87f48e2b4 llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) + 372
13 libLLVM.so.20.1 0x00007ff87f48c689 llvm::SelectionDAGISelLegacy::runOnMachineFunction(llvm::MachineFunction&) + 169
14 libLLVM.so.20.1 0x00007ff87efb8e32 llvm::MachineFunctionPass::runOnFunction(llvm::Function&) + 610
15 libLLVM.so.20.1 0x00007ff87ed104be llvm::FPPassManager::runOnFunction(llvm::Function&) + 638
16 libLLVM.so.20.1 0x00007ff87ed15ff3 llvm::FPPassManager::runOnModule(llvm::Module&) + 51
17 libLLVM.so.20.1 0x00007ff87ed10c11 llvm::legacy::PassManagerImpl::run(llvm::Module&) + 1105
18 llc-20 0x000055972ce77dc1 main + 9649
19 libc.so.6 0x00007ff87d68ad7a __libc_start_main + 234
20 llc-20 0x000055972ce7247a _start + 42
```
## Testing
Added regression tests in:
- `CodeGen/X86/selectiondag-dbgvalue-null-crash.ll`
- `CodeGen/AArch64/selectiondag-dbgvalue-null-crash.ll`
**Note:** Tests appear to expose deeper issues in DWARF generation on
certain targets (Darwin targets for example) that require further
investigation.
## Related PRs
This supersedes:
- #173500 - Initial fix, reverted due to test failures on Darwin and
other platforms
- #173836 - Second attempt with `UNSUPPORTED: system-darwin`, still
failed on some targets
Commit: 9029744432a708b7203e707970dacf2734f3ca21
https://github.com/llvm/llvm-project/commit/9029744432a708b7203e707970dacf2734f3ca21
Author: Jonathan Wakely <jwakely at redhat.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M libcxx/test/std/re/re.alg/re.alg.search/grep.pass.cpp
Log Message:
-----------
[libcxx] Add missing header to re/re.alg/re.alg.search/grep.pass.cpp (#180024)
This test can't be compiled with GCC without this fix.
Commit: c3811805369be90f7fdac4c46e6bcc24019748dd
https://github.com/llvm/llvm-project/commit/c3811805369be90f7fdac4c46e6bcc24019748dd
Author: Ayush Kumar Gaur <132849148+Ayush3941 at users.noreply.github.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUOps.cpp
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[mlir][AMDGPU] Avoid verifier crash in DPPOp on vector operand types (#178887)
### whats the problem
mlir-opt could crash while verifying amdgpu.dpp when its operands had
vector
types, such as ARM SME tile vectors produced by arm_sme.get_tile.
The crash occurred during IR verification, before any lowering or passes
ran.
### why it happens
DPPOp::verify() called Type::getIntOrFloatBitWidth() on the operand
type.
When the operand was a VectorType, this hit an assertion because only
scalar
integer and float types have a bitwidth.
### whats the fix
Query the bitwidth on the element type using getElementTypeOrSelf()
instead of
the container type.
Add a regression test to ensure amdgpu.dpp verification no longer
asserts on
vector operand types.
Fixes #178128
Commit: 0fd4ad2835d924b8cab42ef86e54919a9a20c1f9
https://github.com/llvm/llvm-project/commit/0fd4ad2835d924b8cab42ef86e54919a9a20c1f9
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/atomic-scoped.c
M clang/test/CIR/CodeGen/atomic.c
M clang/test/CIR/IR/atomic.cir
Log Message:
-----------
[CIR] Scoped atomic exchange (#173781)
This patch adds support for for scoped atomic exchange operations in
CIR.
Commit: 7054a4b8f9923a41619657a748465de572af71bd
https://github.com/llvm/llvm-project/commit/7054a4b8f9923a41619657a748465de572af71bd
Author: Kshitij Paranjape <kshitijvparanjape at gmail.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/lib/Analysis/ValueTracking.cpp
A llvm/test/Transforms/AggressiveInstCombine/X86/pr175590.ll
Log Message:
-----------
[ValueTracking] Propagate sign information out of loop (#175590)
LLVM converts sqrt libcall to intrinsic call if the argument is within
the range(greater than or equal to 0.0). In this case the compiler is
not able to deduce the non-negativity on its own. Extended ValueTracking
to understand such loops.
Fixes llvm/llvm-project#174813
Commit: e8908215de669f3d879f6e2265fa796d93a9872b
https://github.com/llvm/llvm-project/commit/e8908215de669f3d879f6e2265fa796d93a9872b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
A llvm/test/Transforms/LoopStrengthReduce/X86/debuginfo-scev-salvage-ptrtoaddr.ll
Log Message:
-----------
[LSR] Support SCEVPtrToAddr in SCEVDbgValueBuilder.
Allow SCEVPtrToAddr as cast in assertion in SCEVDbgValueBuilder.
SCEVPtrToAddr is handled similarly to SCEVPtrToInt.
Fixes a crash with debug info after bd40d1de9c9ee, which started to
generate ptrtoaddr instead of ptrtoint expressions.
Commit: 15832a69675a82192dccf78953a3c89849ae8d22
https://github.com/llvm/llvm-project/commit/15832a69675a82192dccf78953a3c89849ae8d22
Author: Iasonaskrpr <126663668+Iasonaskrpr at users.noreply.github.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/sqrtf128.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/sqrtf128.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/sqrtf128.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor sqrtf128 to header only (#177760)
Closes #177652
Commit: d94caea215f2173f8d84270b4f802a3b128dec3f
https://github.com/llvm/llvm-project/commit/d94caea215f2173f8d84270b4f802a3b128dec3f
Author: Zorojuro <sawantsukumar at gmail.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/ffmal.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/ffmal.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/ffmal.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor ffmal to Header Only. (#179069)
closes #175326
Part of #147386
Commit: f52f97b30b2615bcd61101ca03e77597350860b1
https://github.com/llvm/llvm-project/commit/f52f97b30b2615bcd61101ca03e77597350860b1
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation5.ll
Log Message:
-----------
[SLP][NFC]Add another shl-to-add modeling test, NFC
Commit: 2002a5926c32a168ae1a40a2231ff57a2a0d28d6
https://github.com/llvm/llvm-project/commit/2002a5926c32a168ae1a40a2231ff57a2a0d28d6
Author: Hui <hui.xie1990 at gmail.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M libcxx/test/std/thread/thread.semaphore/lost_wakeup.timed.pass.cpp
Log Message:
-----------
[libc++][test][NFC] remove unused and global variables in the test (#179038)
Fixes #178855
Commit: 1acc200d88cea309b47ab24366f12ee82f00d4d4
https://github.com/llvm/llvm-project/commit/1acc200d88cea309b47ab24366f12ee82f00d4d4
Author: Ralender <Tyker1 at outlook.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/include/llvm/CodeGen/LiveStacks.h
M llvm/lib/CodeGen/LiveStacks.cpp
M llvm/lib/CodeGen/StackSlotColoring.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
Log Message:
-----------
[NFC][LiveStacks] Use vectors instead of map and unordred_map (#165477)
Commit: b0cc73d00c1c55904658ecd3bc517cfdf867c469
https://github.com/llvm/llvm-project/commit/b0cc73d00c1c55904658ecd3bc517cfdf867c469
Author: Moritz Zielke <moritz.zielke at gmail.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-rotl-rotr.mir
Log Message:
-----------
[GlobalISel] add G_ROTL, G_ROTR to computeKnownBits (#166365)
Adresses one of the subtasks of #150515.
The code is ported from `SelectionDAG::computeKnownBits` and tests are
loosely based on `AArch64/GlobalISel/knownbits-shl.mir`.
Commit: 2a74e02a9088bdc98e267df9529c740e4b1a88cd
https://github.com/llvm/llvm-project/commit/2a74e02a9088bdc98e267df9529c740e4b1a88cd
Author: Qinkun Bao <qinkun at google.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
R llvm/test/CodeGen/X86/selectiondag-dbgvalue-null-crash.ll
Log Message:
-----------
Revert "[SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo" (#180352)
Reverts llvm/llvm-project#174341
Break https://lab.llvm.org/buildbot/#/builders/24/builds/17324
Commit: 43905d6c8a509b1480d622509f7961477a74d5a4
https://github.com/llvm/llvm-project/commit/43905d6c8a509b1480d622509f7961477a74d5a4
Author: Qinkun Bao <qinkun at google.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/lib/Analysis/ValueTracking.cpp
R llvm/test/Transforms/AggressiveInstCombine/X86/pr175590.ll
Log Message:
-----------
Revert "[ValueTracking] Propagate sign information out of loop" (#180354)
Reverts llvm/llvm-project#175590
Break https://lab.llvm.org/buildbot/#/builders/55/builds/23820 and clang
Commit: f1d8d038370637f9b72f296a501d5bf2936440cc
https://github.com/llvm/llvm-project/commit/f1d8d038370637f9b72f296a501d5bf2936440cc
Author: Vigneshwar Jayakumar <vigneshwar.jayakumar at amd.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M clang/lib/Sema/SemaExpr.cpp
A clang/test/SemaHIP/hip-builtin-lvalue-to-rvalue.hip
Log Message:
-----------
[HIP][Sema] Fix incorrect CK_NoOp for lvalue-to-rvalue conversion in … (#180314)
…builtin args
The HIP implicit address space cast for builtin pointer arguments used
CK_NoOp to convert lvalue args to rvalues.
This caused an assertion failure in LifetimeSafety analysis:
Assertion `Dst->getLength() == Src->getLength()` failed
in FactsGenerator::flow() in some cases.
Use DefaultLvalueConversion which correctly emits CK_LValueToRValue.
Commit: 8bced611727da116641b329250a33c1871f8474c
https://github.com/llvm/llvm-project/commit/8bced611727da116641b329250a33c1871f8474c
Author: Ralender <Tyker1 at outlook.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/include/llvm/DebugInfo/PDB/Native/FormatUtil.h
M llvm/include/llvm/DebugInfo/PDB/Native/InputFile.h
M llvm/include/llvm/Support/MathExtras.h
M llvm/lib/DebugInfo/Symbolize/DIPrinter.cpp
M llvm/lib/Support/MathExtras.cpp
M llvm/tools/llvm-pdbutil/BytesOutputStyle.cpp
M llvm/tools/llvm-pdbutil/DumpOutputStyle.cpp
M llvm/tools/llvm-pdbutil/MinimalTypeDumper.cpp
M llvm/tools/llvm-remarkutil/RemarkInstructionMix.cpp
M llvm/unittests/Support/MathExtrasTest.cpp
M llvm/utils/FileCheck/FileCheck.cpp
Log Message:
-----------
[NFC][ADT] add NumDigitsBase10 to MathExtra and update some current users (#165479)
Commit: 8b5e95b1fd2fa49a7c1607e294659f2c0ec12d69
https://github.com/llvm/llvm-project/commit/8b5e95b1fd2fa49a7c1607e294659f2c0ec12d69
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
A llvm/test/Transforms/InferAddressSpaces/NVPTX/nullptr.ll
Log Message:
-----------
[InferAddressSpaces] Initialize op(generic const, generic const, ...) -> generic (#172143)
Fixes #171890
If the pointer operands of an instruction are all constants with generic
AS, we always infer the AS of the instruction as uninitialized finally.
And the rewrite process will skip cloning the instruction, producing
invalid IR.
This patch fixes it by inferring the AS of this kind of instruction as
flat. Maybe we can fold the operator with all constants to get better
performance, but I think this case is rare in the real world.
Commit: f72da501354e97f293db4e48cead8e715ec155e9
https://github.com/llvm/llvm-project/commit/f72da501354e97f293db4e48cead8e715ec155e9
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/test/tools/obj2yaml/ELF/bb-addr-map-pgo-analysis-map.yaml
M llvm/tools/obj2yaml/elf2yaml.cpp
Log Message:
-----------
[obj2yaml] Support SHT_LLVM_BB_ADDR_MAP version 5
e9368a056dff94815b3c43a0da78e7c1e5b3d4f4 missed updating the obj2yaml
version check. This was causing obj2yaml to error on object files
generated by the most recent clang.
Reviewers: rlavaee, jh7370
Pull Request: https://github.com/llvm/llvm-project/pull/180303
Commit: be4dbf5d6459235ddad578efe74163aa88e4be91
https://github.com/llvm/llvm-project/commit/be4dbf5d6459235ddad578efe74163aa88e4be91
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M lld/ELF/OutputSections.cpp
Log Message:
-----------
[lld][ELF] Remove redundant size check in nopInstrFill
We checked twice of size is equal to zero. This is not necessary and
makes the code a little bit less readable.
Reviewers: MaskRay, tmsri
Pull Request: https://github.com/llvm/llvm-project/pull/180304
Commit: 9dd5542a347749cfecd514ca209becc70208ef4a
https://github.com/llvm/llvm-project/commit/9dd5542a347749cfecd514ca209becc70208ef4a
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M clang/include/clang/AST/HLSLResource.h
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
Log Message:
-----------
[clang][NFC] Replace includes of "Attrs.inc" with "Attr.h" (#180356)
"clang/AST/Attrs.inc" is not a self-contained header and is not intended
to be included directly. Instead, "clang/AST/Attr.h" is the header that
users need.
Commit: a94759999112bc2591029f3ba4d1dfe32f1ad7e6
https://github.com/llvm/llvm-project/commit/a94759999112bc2591029f3ba4d1dfe32f1ad7e6
Author: Alex Wang <yesterda9 at gmail.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/llvm.modf.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Add lowering for G_FMODF (#180152)
Add generic expansion for G_FMODF matching the SelectionDAG
implementation.
Enable G_FMODF lowering for AMDGPU with tests.
Related: #179434
Commit: 39622a7739b85aa8cd1d5169028b6c8fd1e0bcaa
https://github.com/llvm/llvm-project/commit/39622a7739b85aa8cd1d5169028b6c8fd1e0bcaa
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[ProfCheck] Add PreISelIntrinsicLoweringTest to XFail
Introduced in 191af6c254a83c9eb72df92a5db534d8fd4f0701. Should not be a
complicated fix, but move to the xfail list for now so the bot gets back
to green while we work on fixing.
Commit: ec059d81aafedb253a02d6f490ad9b9747611038
https://github.com/llvm/llvm-project/commit/ec059d81aafedb253a02d6f490ad9b9747611038
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/test/Transforms/DeadStoreElimination/simple.ll
Log Message:
-----------
[DSE] Handle variable offsets with sized dead_on_return (#180364)
With a sized dead_on_return, we need to not eliminate stores if there
are to a pointer with a variable offset from the underlying object
marked dead_on_return. This manifested as an assertion failure as
BaseValue/V ended up not being equal. It's possible we could do a range
analysis to try and prove the variable offset stays within bounds, but
this case seems to come up relatively rarely (only reproducible with a
UBSan build of LLVM) and is probably not worth the compile time.
Fixes #180361.
Commit: 42e404512bdde804e6440004e41d990aaff02640
https://github.com/llvm/llvm-project/commit/42e404512bdde804e6440004e41d990aaff02640
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/include/clang/Format/Format.h
Log Message:
-----------
[clang-format][doc] Add GNU style link in KeepFormFeed option (#176654)
It was not clear from the description what this option does.
Added small example to demostrate its behavior.
Commit: 0c4f8094939d2a2b50b6cd062cd1473a0315457f
https://github.com/llvm/llvm-project/commit/0c4f8094939d2a2b50b6cd062cd1473a0315457f
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Compute predicated load/store costs in VPlan. (NFC) (#179129)
Update VPReplicateReicpe::computeCost to compute predicated load/store
costs directly, unless the pointer is uniform. In that case, the legacy
cost model uses a different logic, which will be migrated separately.
PR: https://github.com/llvm/llvm-project/pull/179129
Commit: f73a0b9973fcdd6c136fce2d674c041147c126fc
https://github.com/llvm/llvm-project/commit/f73a0b9973fcdd6c136fce2d674c041147c126fc
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M clang/include/clang/Driver/Driver.h
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
[clang] Remove unused parameter from Driver::DiagnoseInputExistence (NFC) (#177876)
Commit: 88dff28c9f67e4a73ee8dea85a6c69f2171f1759
https://github.com/llvm/llvm-project/commit/88dff28c9f67e4a73ee8dea85a6c69f2171f1759
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU][SIInsertWaitcnts][NFC] Make a few WaitcntBracket member functions private (#180018)
The user of the WaitcntBrackets class shouldn't need to know about how
the scoreboard has been implemented internally. So I think it is best to
provide a higher level API that hides things like scoreUB, scoreLB and
score ranges.
This patch makes getScoreUB(), getScoreLB() and getScoreRange() private
and introduces new functions that don't expose the internal
implementation:
- getOutstanding(T)
- hasPendingVMEM(VMEMID, T)
- empty(T)
I also noticed that getSGPRScore() and getVMemScore() are not used
externally so these are now private.
Commit: ac57c4a7285a0f4d9707ec9c3be8c5b0ee1423ec
https://github.com/llvm/llvm-project/commit/ac57c4a7285a0f4d9707ec9c3be8c5b0ee1423ec
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M polly/lib/CodeGen/IslNodeBuilder.cpp
M polly/lib/External/isl/GIT_HEAD_ID
M polly/lib/External/isl/isl_ast_codegen.c
A polly/lib/External/isl/test_inputs/codegen/polly2.c
A polly/lib/External/isl/test_inputs/codegen/polly2.st
R polly/test/CodeGen/empty_domain_in_context.ll
Log Message:
-----------
[Polly] Update isl to isl-0.27-78-gfc484e00 (#180377)
Update isl to include
https://repo.or.cz/isl.git/commit/fc484e004200964f8f18249de1f510393ec924a9
which fixes #180000.
The isl update also fixes #34710 which had the same cause but with an
empty access domain (#180000 has an empty statement domain). Thus we
also revert 163cacb46960be4dd0d8562737bbf0ea97cb14ad which now only adds
unnecessary overhead.
A regression test has been added to isl which is why we do not add a
test in Polly.
Fixes: #180000
Thanks @skimo-openhub for the fix and @thapgua for the bugreport.
Commit: 5dbeb29bf93ceda35a0c1f093b4f87ba35640e93
https://github.com/llvm/llvm-project/commit/5dbeb29bf93ceda35a0c1f093b4f87ba35640e93
Author: Jannick Kremer <jannick.kremer at mailbox.org>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_location.py
M clang/bindings/python/tests/cindex/test_source_range.py
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[libclang/python] Type-annotate SourceLocation and SourceRange (#180193)
This adds type annotations to the `SourceLocation` and `SourceRange`
classes, enough to pass a strict typecheck. This resolves 29 strict
typing errors as the next step towards
https://github.com/llvm/llvm-project/issues/76664
Commit: 743538ccaba80592c519b58b217809006132d25e
https://github.com/llvm/llvm-project/commit/743538ccaba80592c519b58b217809006132d25e
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/SuspiciousCallArgumentCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/suspicious-call-argument-option.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/suspicious-call-argument.cpp
Log Message:
-----------
[clang-tidy] Fix crash in readability-suspicious-call-argument on invalid option (#180351)
Closes #180346
Commit: 62e93feba3db45d32ad5ae8f388da48f11264e2a
https://github.com/llvm/llvm-project/commit/62e93feba3db45d32ad5ae8f388da48f11264e2a
Author: Fangrui Song <i at maskray.me>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M llvm/include/llvm/MC/MCDwarf.h
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCStreamer.cpp
Log Message:
-----------
MC: Move generateCompactUnwindEncodings to MCObjectStreamer. NFC (#180381)
... removing the need to pass MCAsmBackend as a parameter.
This allows MCStreamer.cpp to not include MCAsmBackend.h.
Commit: 3aac5e0b42bfb7f8856a2c5c11547a66d9279e8b
https://github.com/llvm/llvm-project/commit/3aac5e0b42bfb7f8856a2c5c11547a66d9279e8b
Author: Fangrui Song <i at maskray.me>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFStreamer.cpp
Log Message:
-----------
[PowerPC] Use MCAssembler::getEmitter instead of getEmitterPtr. NFC
PPCELFStreamer and PPCXCOFFStreamer are MCObjectStreamer subclasses
where the emitter is guaranteed non-null. Use getEmitter() instead of
getEmitterPtr(). getEmitterPtr is reserved for MCAsmStreamer users.
Commit: 10a0f40083e83037eaf80aa467f95cfd605ee9a0
https://github.com/llvm/llvm-project/commit/10a0f40083e83037eaf80aa467f95cfd605ee9a0
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation5.ll
Log Message:
-----------
[SLP][NFC]Add another shl-to-add modeling case
Commit: 74aa875346e88d8e1d3bf02ffdf0a1b369175670
https://github.com/llvm/llvm-project/commit/74aa875346e88d8e1d3bf02ffdf0a1b369175670
Author: Fangrui Song <i at maskray.me>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/include/llvm/MC/MCSection.h
M llvm/include/llvm/MC/MCSymbol.h
Log Message:
-----------
MC: Remove unused overload and delete stale comment. NFC
Commit: 1e5493b1b84473e42bc9992f6684e51eeb335f14
https://github.com/llvm/llvm-project/commit/1e5493b1b84473e42bc9992f6684e51eeb335f14
Author: Maksim Panchenko <maks at fb.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M bolt/lib/Passes/IdenticalCodeFolding.cpp
A bolt/test/icf-hot-text-mover.c
Log Message:
-----------
[BOLT] Don't fold hot text mover functions in ICF (#180367)
Hot text mover functions are placed in special sections (e.g.,
.never_hugify) to avoid being placed on hot/huge pages. Folding them
with functions from other sections could defeat this purpose.
Add a check in ICF's isIdenticalWith() to prevent folding when either
function is a hot text mover.
Commit: 4ec1fea92245a4ec5dc546856f648db6d55cc345
https://github.com/llvm/llvm-project/commit/4ec1fea92245a4ec5dc546856f648db6d55cc345
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CodeGen/paren-list-agg-init.cpp
M clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp
M clang/test/CodeGenCXX/amdgcn-func-arg.cpp
M clang/test/CodeGenCXX/control-flow-in-stmt-expr.cpp
M clang/test/CodeGenCXX/cxx2a-destroying-delete.cpp
A clang/test/CodeGenCXX/destructor-dead-on-return.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors2.cpp
M clang/test/CodeGenCXX/ptrauth-apple-kext-indirect-virtual-dtor-call.cpp
M clang/test/CodeGenObjCXX/objc-struct-cxx-abi.mm
M clang/test/CodeGenObjCXX/ptrauth-struct-cxx-abi.mm
M clang/test/DebugInfo/CXX/bpf-structors.cpp
M clang/test/DebugInfo/CXX/trivial_abi.cpp
M clang/test/OpenMP/amdgcn_target_global_constructor.cpp
M clang/test/OpenMP/distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/distribute_private_codegen.cpp
M clang/test/OpenMP/distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_simd_private_codegen.cpp
M clang/test/OpenMP/for_firstprivate_codegen.cpp
M clang/test/OpenMP/for_lastprivate_codegen.cpp
M clang/test/OpenMP/for_linear_codegen.cpp
M clang/test/OpenMP/for_private_codegen.cpp
M clang/test/OpenMP/for_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/parallel_copyin_codegen.cpp
M clang/test/OpenMP/parallel_firstprivate_codegen.cpp
M clang/test/OpenMP/parallel_for_linear_codegen.cpp
M clang/test/OpenMP/parallel_master_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_firstprivate_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_lastprivate_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/parallel_private_codegen.cpp
M clang/test/OpenMP/parallel_reduction_codegen.cpp
M clang/test/OpenMP/scope_codegen.cpp
M clang/test/OpenMP/sections_firstprivate_codegen.cpp
M clang/test/OpenMP/sections_lastprivate_codegen.cpp
M clang/test/OpenMP/sections_private_codegen.cpp
M clang/test/OpenMP/sections_reduction_codegen.cpp
M clang/test/OpenMP/simd_private_taskloop_codegen.cpp
M clang/test/OpenMP/single_codegen.cpp
M clang/test/OpenMP/single_firstprivate_codegen.cpp
M clang/test/OpenMP/single_private_codegen.cpp
M clang/test/OpenMP/target_has_device_addr_codegen.cpp
M clang/test/OpenMP/target_in_reduction_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_private_codegen.cpp
M clang/test/OpenMP/task_codegen.cpp
M clang/test/OpenMP/task_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_private_codegen.cpp
M clang/test/OpenMP/teams_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_private_codegen.cpp
M clang/test/OpenMP/teams_private_codegen.cpp
M clang/test/OpenMP/threadprivate_codegen.cpp
M clang/test/utils/update_cc_test_checks/Inputs/basic-cplusplus.cpp.expected
M clang/test/utils/update_cc_test_checks/Inputs/explicit-template-instantiation.cpp.expected
Log Message:
-----------
Reapply "[Clang] Mark this pointer in destructors dead_on_return (#166276)"
This reverts commit 047db150c66e245e9df7db178b893ce6b29820f5.
The original version of the commit caused assertion failures in DSE.
Those were fixed in ec059d81aafedb253a02d6f490ad9b9747611038, so trying
to reland this again.
Commit: 706cc8b3fec5b0c338f197df0ecf28db67c118dd
https://github.com/llvm/llvm-project/commit/706cc8b3fec5b0c338f197df0ecf28db67c118dd
Author: Connector Switch <c8ef at outlook.com>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M libcxx/test/std/atomics/atomics.ref/address.pass.cpp
M libcxx/test/std/atomics/atomics.ref/assign.pass.cpp
M libcxx/test/std/atomics/atomics.ref/bitwise_and_assign.pass.cpp
M libcxx/test/std/atomics/atomics.ref/bitwise_or_assign.pass.cpp
M libcxx/test/std/atomics/atomics.ref/bitwise_xor_assign.pass.cpp
M libcxx/test/std/atomics/atomics.ref/compare_exchange_strong.pass.cpp
M libcxx/test/std/atomics/atomics.ref/compare_exchange_weak.pass.cpp
M libcxx/test/std/atomics/atomics.ref/convert.pass.cpp
M libcxx/test/std/atomics/atomics.ref/exchange.pass.cpp
M libcxx/test/std/atomics/atomics.ref/fetch_add.pass.cpp
M libcxx/test/std/atomics/atomics.ref/fetch_and.pass.cpp
M libcxx/test/std/atomics/atomics.ref/fetch_or.pass.cpp
M libcxx/test/std/atomics/atomics.ref/fetch_sub.pass.cpp
M libcxx/test/std/atomics/atomics.ref/fetch_xor.pass.cpp
M libcxx/test/std/atomics/atomics.ref/increment_decrement.pass.cpp
M libcxx/test/std/atomics/atomics.ref/load.pass.cpp
M libcxx/test/std/atomics/atomics.ref/notify_all.pass.cpp
M libcxx/test/std/atomics/atomics.ref/notify_one.pass.cpp
M libcxx/test/std/atomics/atomics.ref/operator_minus_equals.pass.cpp
M libcxx/test/std/atomics/atomics.ref/operator_plus_equals.pass.cpp
M libcxx/test/std/atomics/atomics.ref/required_alignment.pass.cpp
M libcxx/test/std/atomics/atomics.ref/requires-trivially-copyable.verify.cpp
M libcxx/test/std/atomics/atomics.ref/store.pass.cpp
M libcxx/test/std/atomics/atomics.ref/wait.pass.cpp
Log Message:
-----------
[libc++][NFC] Fix license header in test for `atomic_ref` (#180395)
Commit: aff5afc48df63615053b2432da198a4932435c3f
https://github.com/llvm/llvm-project/commit/aff5afc48df63615053b2432da198a4932435c3f
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/StringConstructorCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/string-constructor.cpp
Log Message:
-----------
[clang-tidy] Fix bugprone-string-constructor FN with allocators. (#180337)
Fixes https://github.com/llvm/llvm-project/issues/180324.
Commit: 0d94148b63074180c459b80787410eacc1e5eebf
https://github.com/llvm/llvm-project/commit/0d94148b63074180c459b80787410eacc1e5eebf
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/masked_store_trunc_ssat.ll
M llvm/test/CodeGen/X86/masked_store_trunc_usat.ll
Log Message:
-----------
[X86] optimize 512-bit masked truncated saturating stores (#179130)
an oversight in https://github.com/llvm/llvm-project/pull/169827, for
the 512-bit version the `vl` target feature is not needed.
https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm512_mask_cvtsepi16_storeu_epi8&expand=1811&ig_expand=2150,2151
Commit: b2f8a0f60134120586865bfb059b52929e6e8a04
https://github.com/llvm/llvm-project/commit/b2f8a0f60134120586865bfb059b52929e6e8a04
Author: Noam Cohen <noam at noam.me>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/JSONNodeDumper.h
M clang/lib/AST/JSONNodeDumper.cpp
A clang/test/AST/HLSL/ast-dump-availability-attr.hlsl
M clang/test/AST/ast-dump-attr-json.cpp
Log Message:
-----------
[clang] ast-dump: dump `AvailabilityAttr` fields to JSON (#179281)
This adds `AvailabilityAttr` fields for the JSON dumper
Commit: 3192fe2c7b08912cc72c86471a593165b615dc28
https://github.com/llvm/llvm-project/commit/3192fe2c7b08912cc72c86471a593165b615dc28
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/X86/predicated-instruction-cost.ll
Log Message:
-----------
[VPlan] Fall back to legacy cost model if PtrSCEV is nullptr.
There are some cases when PtrSCEV can be nullptr. Fall back to legacy
cost model, to not call isLoopInvariant with nullptr.
Fixes a crash after 0c4f8094939d2.
Commit: 3c5b05427db63658f0c09fd8fa631f60b07a970a
https://github.com/llvm/llvm-project/commit/3c5b05427db63658f0c09fd8fa631f60b07a970a
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/SystemZ/load-store-scalarization-cost.ll
Log Message:
-----------
[VPlan] Pass underlying instr to getMemoryOpCost in ::computeCost.
Pass underlying instruction to getMemoryOpCost in
VPReplicateRecipe::computeCost if UsedByLoadStoreAddress is true.
Some targets use the underlying instruction to improve costs,
and this is needed to match the legacy cost model.
Fixes https://github.com/llvm/llvm-project/issues/177780.
Fixes https://github.com/llvm/llvm-project/issues/177772.
Commit: 1b0f139f8e5e093a5940f4f627ee19a9a1dde73d
https://github.com/llvm/llvm-project/commit/1b0f139f8e5e093a5940f4f627ee19a9a1dde73d
Author: Qinkun Bao <qinkun at google.com>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M llvm/include/llvm/CodeGen/LiveStacks.h
M llvm/lib/CodeGen/LiveStacks.cpp
M llvm/lib/CodeGen/StackSlotColoring.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
Log Message:
-----------
Revert "[NFC][LiveStacks] Use vectors instead of map and unordred_map" (#180421)
Reverts llvm/llvm-project#165477
Break https://lab.llvm.org/buildbot/#/builders/52/builds/14874
Commit: ed9c18693bcf090be51e189b1374416016f73c9b
https://github.com/llvm/llvm-project/commit/ed9c18693bcf090be51e189b1374416016f73c9b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M llvm/test/CodeGen/Mips/musttail.ll
Log Message:
-----------
[MIPS] musttail.ll - regenerate test checks (#180423)
Commit: 33291dd944e61f57c0e3b697131cd09d1ac5974c
https://github.com/llvm/llvm-project/commit/33291dd944e61f57c0e3b697131cd09d1ac5974c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M llvm/include/llvm/IR/ProfDataUtils.h
M llvm/lib/IR/ProfDataUtils.cpp
Log Message:
-----------
[ProfCheck] Add utility to get a MDNode for unknown branch weights
There are some cases where it is non-trivial to get access to a
branch/select instruction and the helper function that creates the
branch/select of interest takes in a MDNode for branch weights. Add a
helper to create a MDNode for unknown branch weights if the function is
profiled to handle this case.
Reviewers: mtrofin, snehasish, alanzhao1
Pull Request: https://github.com/llvm/llvm-project/pull/180389
Commit: 4d5d2ffd3e6bae7c7c10bc8315c8990782d87f45
https://github.com/llvm/llvm-project/commit/4d5d2ffd3e6bae7c7c10bc8315c8990782d87f45
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/test/Transforms/PreISelIntrinsicLowering/cond-loop.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[ProfCheck] Add prof data for lowering of @llvm.cond.loop
When there is no target-specific lowering of @llvm.cond.loop, it is
lowered into a simple loop by PreISelIntrinsicLowering. Mark the branch
weights into the no-return loop as unknown given we do not have value
metadata to fix the profcheck test for this feature.
Reviewers: mtrofin, alanzhao1, snehasish, pcc
Pull Request: https://github.com/llvm/llvm-project/pull/180390
Commit: 7509cad693b6cfbf28944419703ef17c7e5b3e47
https://github.com/llvm/llvm-project/commit/7509cad693b6cfbf28944419703ef17c7e5b3e47
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Support masked VPInsts, use for predication (NFC) (#142285)
Add support for mask operands to most VPInstructions, using
getNumOperandsForOpcode.
This allows VPlan predication to predicate VPInstructions directly. The
mask will then be dropped or handled when creating wide recipes.
Depends on https://github.com/llvm/llvm-project/pull/142284.
Depends on https://github.com/llvm/llvm-project/pull/168784.
PR: https://github.com/llvm/llvm-project/pull/142285
Commit: 6324ee32c1b320bbac6638bdbc49a7844ac20d1f
https://github.com/llvm/llvm-project/commit/6324ee32c1b320bbac6638bdbc49a7844ac20d1f
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll
Log Message:
-----------
[VPlan] Use PredBB's terminator as insert point for VPIRPhi extracts.
Use PredBB's terminator as insert point in VPIRPhi::execute to make sure
the extracts are placed after any possibly sunk instructions.
Fixes https://github.com/llvm/llvm-project/issues/180363.
Commit: a563e6bb7ed485e0ab88717bb4a8c5e8522d9792
https://github.com/llvm/llvm-project/commit/a563e6bb7ed485e0ab88717bb4a8c5e8522d9792
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rv32p.ll
Log Message:
-----------
[RISCV] Add support for forming WMULSU during type legalization. (#180331)
Add a DAG combine to turn it into MULHSU if the lower half result
is unused.
Commit: c25018bb4db85dfc49b5d347ed4fdc9db4de121a
https://github.com/llvm/llvm-project/commit/c25018bb4db85dfc49b5d347ed4fdc9db4de121a
Author: Nicolas IOOSS <64031241+niooss-ledger at users.noreply.github.com>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[Docs][Intrisics] Fix the name of llvm.memset.inline in the documentation (#180373)
LLVM intrinsic `llvm.memset.inline` indicates in its name the types of
the destination pointer and the size. There is no second pointer.
Moreover, the tests are already verifying that generated code uses
`@llvm.memset.inline.p0.i32` and `@llvm.memset.inline.p0.i64`. So make
the documentation reference these names as well.
Fixes: https://github.com/llvm/llvm-project/issues/163454
Commit: 5c826f5172531e779c9083bc4b8a7762188dd37e
https://github.com/llvm/llvm-project/commit/5c826f5172531e779c9083bc4b8a7762188dd37e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Emit MULHU/MULHS/UMUL_LOHI/SMUL_LOHI from our custom XLen*2 expansion. (#180379)
We already do all the checks necessary in order to prioritize
MULHU/MULHS/UMUL_LOHI/SMUL_LOHI over MULHSU/WMULSU. We might as
well just emit the nodes instead of letting generic type legalization
redo the checks.
This is slightly different than the default legalization because we
don't have access to ExpandInteger so we have to emit TRUNCATES and
BUILD_PAIR. Not sure if this will result in any differences in practice.
Commit: 769b734c020472f1f3108c912f87755174246e26
https://github.com/llvm/llvm-project/commit/769b734c020472f1f3108c912f87755174246e26
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rv32p.ll
Log Message:
-----------
[RISCV] Combine ADDD with UMUL_LOHI/SMUL_LOHI into WMACCU/WMACC (#180383)
Combine the pattern:
ADDD(addlo, addhi, UMUL_LOHI(x, y).0, UMUL_LOHI(x, y).1)
into:
WMACCU(x, y, addlo, addhi)
And similarly for SMUL_LOHI -> WMACC.
This patch was written with AI, but I reviewed it carefully.
Commit: 5c5677d7b80e086c2fb2620511a213a5128b5e00
https://github.com/llvm/llvm-project/commit/5c5677d7b80e086c2fb2620511a213a5128b5e00
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/test/CodeGen/fp-function-attrs.cpp
M clang/test/CodeGenOpenCL/relaxed-fpmath.cl
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Optimizer/Transforms/FunctionAttr.cpp
M flang/test/Driver/func-attr-fast-math.f90
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/IR/Attributes.td
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/Target/TargetMachine.cpp
M llvm/lib/Transforms/Instrumentation/NumericalStabilitySanitizer.cpp
M llvm/test/CodeGen/AMDGPU/inline-attr.ll
M llvm/test/Transforms/IROutliner/outlining-compatible-and-attribute-transfer.ll
M llvm/test/Transforms/Inline/attributes.ll
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/fp-math-function-attributes.mlir
Log Message:
-----------
[llvm] Remove "no-infs-fp-math" attribute support (#180083)
One of global options in `TargetMachine::resetTargetOptions`, now all
backends no longer support it, remove it.
Commit: 9892b2a7b5ad372fc9bf88a01e58a5b2c59d9a26
https://github.com/llvm/llvm-project/commit/9892b2a7b5ad372fc9bf88a01e58a5b2c59d9a26
Author: Fangrui Song <i at maskray.me>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M llvm/include/llvm/DWARFLinker/Classic/DWARFStreamer.h
M llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFEmitterImpl.h
M llvm/lib/DWARFLinker/Parallel/DebugLineSectionEmitter.h
Log Message:
-----------
[DWARFLinker] Make MCTargetOptions a class member. NFC
The local `MCTargetOptions` in `init` will become a problem once
MCAsmInfo stores a pointer to it. Move it to a class member in
DwarfStreamer, DwarfEmitterImpl, and DebugLineSectionEmitter so that it
outlives MCAsmInfo.
Commit: 9a60b2fa0c414c4230801e792be28a92439dae8f
https://github.com/llvm/llvm-project/commit/9a60b2fa0c414c4230801e792be28a92439dae8f
Author: Nhat Nguyen <nhat7203 at gmail.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/test/std/ranges/range.adaptors/range.common.view/begin.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.common.view/end.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.common.view/types.h
Log Message:
-----------
[libc++] LWG4012: common_view::begin/end are missing the simple-view check (#153674)
close #105320
Commit: c53acf04433a3dea14fc3d45698919b85f9a3fca
https://github.com/llvm/llvm-project/commit/c53acf04433a3dea14fc3d45698919b85f9a3fca
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/AArch64/arm64-constrained-fcmp-no-nans-opt.ll
A llvm/test/CodeGen/AArch64/build-vector-dup-simd-nnan.ll
M llvm/test/CodeGen/AArch64/build-vector-dup-simd.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
A llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps_nnan.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.ll
M llvm/test/CodeGen/AMDGPU/fold-fabs.ll
M llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll
M llvm/test/CodeGen/ARM/fp16-vminmaxnm-safe.ll
M llvm/test/CodeGen/PowerPC/fsel.ll
M llvm/test/CodeGen/PowerPC/scalar_cmp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp.ll
M llvm/test/CodeGen/X86/2006-05-22-FPSetEQ.ll
M llvm/test/CodeGen/X86/avx-minmax.ll
M llvm/test/CodeGen/X86/avx10_2-cmp.ll
A llvm/test/CodeGen/X86/sse-minmax-finite.ll
A llvm/test/CodeGen/X86/sse-minmax-unsafe.ll
M llvm/test/CodeGen/X86/sse-minmax.ll
Log Message:
-----------
[SelectionDAGBuilder] Remove NoNaNsFPMath uses (#169904)
Replaced by checking fast-math flags or value tracking results.
Commit: 84b5e9f8dbaf31871a1818cf8e8a93c307da12d7
https://github.com/llvm/llvm-project/commit/84b5e9f8dbaf31871a1818cf8e8a93c307da12d7
Author: Jim Lin <jim at andestech.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/test/CodeGen/RISCV/zcmp-cm-popretz.mir
Log Message:
-----------
[RISCV] Add used callee-saved registers as implicit/implicit-def registers to save/restore call (#180133)
We should add used callee-saved registers as implicit used to save
libcall and as implicit defined to restore libcall. It likes what we did
for CM_PUSH/CM_POPRET. That can help to construct correct dataflow. In
entry bb, save libcall implicitly uses the callee-saved registers which
live in. And in return bb, restore libcall implicitly defines the
callee-saved registers which live out.
Commit: 80f627e6d5f1adedd5747b265f79e2304a200367
https://github.com/llvm/llvm-project/commit/80f627e6d5f1adedd5747b265f79e2304a200367
Author: Fangrui Song <i at maskray.me>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M llvm/include/llvm/MC/TargetRegistry.h
Log Message:
-----------
TargetRegistry: Remove deprecated create*Info that take StringRef parameter (#180448)
Commit: 0f264368e84e0c954834e3cba538c0ef09b906f7
https://github.com/llvm/llvm-project/commit/0f264368e84e0c954834e3cba538c0ef09b906f7
Author: wjdrud2532 <33623075+wjdrud2532 at users.noreply.github.com>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M mlir/test/lib/Dialect/SPIRV/TestEntryPointAbi.cpp
Log Message:
-----------
[MLIR][SPIRV][NFC] Fix header comment in TestEntryPointAbi.cpp (#177350)
Commit: e4674b85e94a2f158b30417313bfbfb643b3eab2
https://github.com/llvm/llvm-project/commit/e4674b85e94a2f158b30417313bfbfb643b3eab2
Author: Shanzhi Chen <chenshanzhi at huawei.com>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M bolt/lib/Profile/DataAggregator.cpp
Log Message:
-----------
[BOLT][NFC] Stop populating unnecessary samples into MemSamples (#179472)
Currently, many unnecessary samples are populated into MemSamples,
including zero-initialized samples and samples in which the PC address
is not contained in any BinaryFunction. But these samples are totally
skipped during processing and the whole MemSamples vector is cleared
immediately after processing. So, we could just stop populating these
samples into MemSamples, which would reduce maximum resident set size
when processing a large perf.data.
Commit: bd4784a913cd53f42ff8c2a3ddfff2e106c5070a
https://github.com/llvm/llvm-project/commit/bd4784a913cd53f42ff8c2a3ddfff2e106c5070a
Author: Mark Zhuang <mark.zhuang at spacemit.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCV.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
A llvm/lib/Target/RISCV/RISCVSchedSpacemitX100.td
A llvm/test/tools/llvm-mca/RISCV/SpacemitX100/atomic.test
A llvm/test/tools/llvm-mca/RISCV/SpacemitX100/floating-point.test
A llvm/test/tools/llvm-mca/RISCV/SpacemitX100/integer.test
A llvm/test/tools/llvm-mca/RISCV/SpacemitX100/mul-div.test
A llvm/test/tools/llvm-mca/RISCV/SpacemitX100/zba.test
A llvm/test/tools/llvm-mca/RISCV/SpacemitX100/zbb.test
A llvm/test/tools/llvm-mca/RISCV/SpacemitX100/zbc.test
A llvm/test/tools/llvm-mca/RISCV/SpacemitX100/zbs.test
A llvm/test/tools/llvm-mca/RISCV/SpacemitX100/zfh.test
A llvm/test/tools/llvm-mca/RISCV/SpacemitX100/zfhmin.test
A llvm/test/tools/llvm-mca/RISCV/SpacemitX100/zicond.test
Log Message:
-----------
[RISCV] Add SpacemiT X100 base scheduling model (#178189)
SpacemiT X100 is a 4-issue, out-of-order, RVA23 processor. This patch
introduces the base scheduling model for scalar instructions. The
scheduling model for RVV will be added in a future update.
Commit: 355b676f2fe419b02d1324dcc04e827d265a1d3e
https://github.com/llvm/llvm-project/commit/355b676f2fe419b02d1324dcc04e827d265a1d3e
Author: Twice <twice at apache.org>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M mlir/.clang-tidy
Log Message:
-----------
[MLIR][NFC] Ignore clang-tidy `modernize-use-using` check in C code (#180326)
In the MLIR C API headers, clang-tidy’s `modernize-use-using` check
reports a large number of type definitions that use `typedef`. In my
IDE, this even causes the `typedef` code to be shown as struck through.
However, in this case it is clearly not possible to replace them with
`using`. This PR suppresses the `modernize-use-using` check for the code
inside `extern "C"` blocks.
Commit: 8e02d249ba5db620ca0d0962f1b49f4b210fcee7
https://github.com/llvm/llvm-project/commit/8e02d249ba5db620ca0d0962f1b49f4b210fcee7
Author: Devanshi <devanshitiwari250 at gmail.com>
Date: 2026-02-08 (Sun, 08 Feb 2026)
Changed paths:
M bolt/include/bolt/Profile/DataAggregator.h
Log Message:
-----------
[Bolt] Replace -1ULL/-2ULL/-3ULL with std::numeric_limits in DataAggregator (#178597)
Replace instances of -1ULL, -2ULL, and -3ULL with std::numeric_limits in
Bolt DataAggregator Trace constants to address C4146 compiler warning.
Changes:
- BR_ONLY: -1ULL → std::numeric_limits<uint64_t>::max()
- FT_ONLY: -1ULL → std::numeric_limits<uint64_t>::max()
- FT_EXTERNAL_ORIGIN: -2ULL → std::numeric_limits<uint64_t>::max() - 1
- FT_EXTERNAL_RETURN: -3ULL → std::numeric_limits<uint64_t>::max() - 2
Fixes part of #147439
Commit: fad32ff3eaf09c140bf441600f7907e8e20af2a2
https://github.com/llvm/llvm-project/commit/fad32ff3eaf09c140bf441600f7907e8e20af2a2
Author: JaydeepChauhan14 <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-adc.ll
Log Message:
-----------
[X86] Optimized ADC + ADD to ADC (#176713)
Commit: 151fadecd15b8c0b2f233b0df4292776a093ee19
https://github.com/llvm/llvm-project/commit/151fadecd15b8c0b2f233b0df4292776a093ee19
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
A llvm/lib/Target/RISCV/RISCVInstrInfoZvabd.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/features-info.ll
A llvm/test/MC/RISCV/rvv/zvabd-invalid.s
A llvm/test/MC/RISCV/rvv/zvabd.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV][MC] Support experimental Zvabd instructions
The `Zvabd` is for `RISC-V Integer Vector Absolute Difference` and
it provides 5 instructions:
* `vabs.v`: Vector Signed Integer Absolute.
* `vabd.vv`: Vector Signed Integer Absolute Difference.
* `vabdu.vv`: Vector Unsigned Integer Absolute Difference.
* `vwabda.vv`: Vector Signed Integer Absolute Difference And Accumulate.
* `vwabdau.vv`: Vector Unsigned Integer Absolute Difference And Accumulate.
Doc: https://github.com/riscv/integer-vector-absolute-difference
Reviewers: topperc, lukel97, preames, tclin914, asb, kito-cheng, mshockwave
Pull Request: https://github.com/llvm/llvm-project/pull/180139
Commit: e992593341688862f658348f82e83a0f89a84b2f
https://github.com/llvm/llvm-project/commit/e992593341688862f658348f82e83a0f89a84b2f
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvabd.td
M llvm/test/CodeGen/RISCV/rvv/abd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sad.ll
Log Message:
-----------
[RISCV][CodeGen] Lower `abds`/`abdu` to `Zvabd` instructions
We directly lower `ISD::ABDS`/`ISD::ABDU` to `Zvabd` instructions.
Note that we only support SEW=8/16 for `vabd.vv`/`vabdu.vv`.
Reviewers: mshockwave, lukel97, topperc, preames, tclin914, 4vtomat
Reviewed By: lukel97, topperc
Pull Request: https://github.com/llvm/llvm-project/pull/180141
Commit: aa808967eb96995f58288bb3bc0f37516ca70cbe
https://github.com/llvm/llvm-project/commit/aa808967eb96995f58288bb3bc0f37516ca70cbe
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaType.cpp
A clang/test/SemaHIP/shared-variable-too-large.hip
A clang/test/SemaOpenCL/amdgpu-variables-too-large-for-address-space.cl
Log Message:
-----------
[Clang][HIP][CUDA] Validate that variable type fits in address spaces (#178909)
Currently, Clang only checks arrays and structures for size at a
top-level view, that is it does not consider whether they will fit in
the address space when applying the address space attribute. This can
lead to situations where a variable is declared in an address space but
its type is too large to fit in that address space, leading to
potentially invalid modules.
This patch proposes a fix for this by checking the size of the type
against the maximum size that can be addressed in the given address
space when applying the address space attribute.
This does not currently handle instantiations of dependent variables, as
the attributes are not re-processesd at that time. This is planned for
further investigation and a follow-up patch.
---------
Signed-off-by: Steffen Holst Larsen <HolstLarsen.Steffen at amd.com>
Co-authored-by: Steffen Holst Larsen <HolstLarsen.Steffen at amd.com>
Commit: 972e73b812cb7b6dd349c7c07daae73314f29e8f
https://github.com/llvm/llvm-project/commit/972e73b812cb7b6dd349c7c07daae73314f29e8f
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvabd.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/test/CodeGen/RISCV/rvv/abs-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/abs-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll
Log Message:
-----------
[RISCV][CodeGen] Lower `ISD::ABS` to Zvabd instructions
We add pseudos/patterns for `vabs.v` instruction and handle the
lowering in `RISCVTargetLowering::lowerABS`.
Reviewers: topperc, 4vtomat, mshockwave, preames, lukel97, tclin914
Reviewed By: mshockwave
Pull Request: https://github.com/llvm/llvm-project/pull/180142
Commit: 0c583e784ecec8fbc8115217710d364edc4929b4
https://github.com/llvm/llvm-project/commit/0c583e784ecec8fbc8115217710d364edc4929b4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaAMDGPU.cpp
A clang/test/SemaOpenCL/builtins-amdgcn-s-wait-event.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.wait.event.ll
Log Message:
-----------
AMDGPU: Add llvm.amdgcn.s.wait.event intrinsic (#180170)
Exactly match the s_wait_event instruction. For some reason we already
had this instruction used through llvm.amdgcn.s.wait.event.export.ready,
but that hardcodes a specific value. This should really be a bitmask
that
can combine multiple wait types.
gfx11 -> gfx12 broke compatabilty in a weird way, by inverting the
interpretation of the bit but also shifting the used bit by 1. Simplify
the selection of the old intrinsic by just using the magic number 2,
which should satisfy both cases.
Commit: e16f35493c06d10682fca840786012266a591b42
https://github.com/llvm/llvm-project/commit/e16f35493c06d10682fca840786012266a591b42
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/abs.ll
Log Message:
-----------
[RISCV][TTI] Adjust the cost of `llvm.abs` intrinsic when `Zvabd` exists
When `Zvabd` exists, `llvm.abs` is lowered to `vabs.v` so the cost
is 1.
Reviewers: mshockwave, topperc, lukel97, skachkov-sc, preames
Reviewed By: topperc
Pull Request: https://github.com/llvm/llvm-project/pull/180146
Commit: f2d5b3952b3fde599e303c3fdf8fb4d40f113a4d
https://github.com/llvm/llvm-project/commit/f2d5b3952b3fde599e303c3fdf8fb4d40f113a4d
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll
M llvm/test/Analysis/CostModel/RISCV/splice.ll
Log Message:
-----------
[RISCV] Add cost for @llvm.vector.splice.{left,right} (#179219)
Currently vector splice intrinsics are costed through getShuffleCost
when the offset is fixed. When the offset is variable though we can't
use a shuffle mask so it currently returns invalid.
This implements the cost in RISCVTTIImpl::getIntrinsicInstrCost as the
cost of a slideup and a slidedown, which matches the codegen.
It also implements the type based cost whenever the offset argument
isn't available.
It may be possible to reduce the cost in future when one of the vector
operands is known to be poison, in which case we only generate a single
slideup or slidedown.
Commit: 6c31bf0474942f8452965c38e091008235730988
https://github.com/llvm/llvm-project/commit/6c31bf0474942f8452965c38e091008235730988
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Utils/PredicateInfo.cpp
M llvm/test/Transforms/SCCP/assume-operand-bundles.ll
Log Message:
-----------
[PredicateInfo] Fix crash on nonnull assume taking a constant (#180440)
Commit: 8554ed738f870bdd3eb5fb05a61fa98cd66eaddd
https://github.com/llvm/llvm-project/commit/8554ed738f870bdd3eb5fb05a61fa98cd66eaddd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.h
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.wait.event.ll
M llvm/test/MC/AMDGPU/gfx11_asm_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_sopp.s
M llvm/test/MC/AMDGPU/gfx12_asm_sopp.s
M llvm/test/MC/AMDGPU/gfx12_err.s
M llvm/test/MC/AMDGPU/gfx13_asm_sopp.s
Log Message:
-----------
AMDGPU: Add syntax for s_wait_event values (#180272)
Previously this would just print hex values. Print names for the
recognized values, matching the sp3 syntax.
Commit: c1c97088b85cd48a939ecd51bf89576fddcc5e54
https://github.com/llvm/llvm-project/commit/c1c97088b85cd48a939ecd51bf89576fddcc5e54
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/test/CIR/CodeGenBuiltins/AArch64/acle_sve_dup.c
Log Message:
-----------
[CIR][AArch64] Add lowering for predicated SVE svdup builtins (zeroing) (#175976)
This PR adds CIR lowering support for predicated SVE `svdup` builtins on
AArch64. The corresponding ACLE intrinsics are documented at:
https://developer.arm.com/architectures/instruction-sets/intrinsics
This change focuses on the zeroing-predicated variants (suffix `_z`,
e.g. `svdup_n_f32_z`), which lower to the LLVM SVE `dup` intrinsic
with a `zeroinitializer` passthrough operand.
IMPLEMENTATION NOTES
--------------------
* The CIR type converter is extended to support `BuiltinType::SveBool`,
which is lowered to `cir.vector<[16] x i1>`, matching current Clang
behaviour and ensuring compatibility with existing LLVM SVE lowering.
* Added logic that converts `cir.vector<[16] x i1>` according to the
underlying element type. This is done by calling
`@llvm.aarch64.sve.convert.from.svbool`.
TEST NOTES
----------
Compared to the unpredicated `svdup` tests
(https://github.com/llvm/llvm-project/pull/174433), the new tests
perform more explicit checks to verify:
* Correct argument usage
* Correct return value + type
This helped validate differences between the default Clang lowering and
the CIR-based lowering. Once all `svdup` variants are implemented, the tests
will be unified.
EXAMPLE LOWERING
----------------
The following example illustrates that CIR lowering produces equivalent
LLVM IR to the default Clang path.
Input:
```c
svint8_t test_svdup_n_s8(svbool_t pg, int8_t op) {
return svdup_n_s8_z(pg, op);
}
OUTPUT 1 (default):
```llvm
define dso_local <vscale x 16 x i8> @test(<vscale x 16 x i1> %pg, i8
noundef %op) #0 {
entry:
%pg.addr = alloca <vscale x 16 x i1>, align 2
%op.addr = alloca i8, align 1
store <vscale x 16 x i1> %pg, ptr %pg.addr, align 2
store i8 %op, ptr %op.addr, align 1
%0 = load <vscale x 16 x i1>, ptr %pg.addr, align 2
%1 = load i8, ptr %op.addr, align 1
%2 = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16
x i8> zeroinitializer, <vscale x 16 x i1> %0, i8 %1)
ret <vscale x 16 x i8> %2
}
```
OUTPUT 2 (via `-fclangir`):
```llvm
; Function Attrs: noinline
define dso_local <vscale x 16 x i8> @test(<vscale x 16 x i1> %0, i8 %1)
#0 {
%3 = alloca <vscale x 16 x i1>, i64 1, align 2
%4 = alloca i8, i64 1, align 1
%5 = alloca <vscale x 16 x i8>, i64 1, align 16
store <vscale x 16 x i1> %0, ptr %3, align 2
store i8 %1, ptr %4, align 1
%6 = load <vscale x 16 x i1>, ptr %3, align 2
%7 = load i8, ptr %4, align 1
%8 = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16
x i8> zeroinitializer, <vscale x 16 x i1> %6, i8 %7)
store <vscale x 16 x i8> %8, ptr %5, align 16
%9 = load <vscale x 16 x i8>, ptr %5, align 16
ret <vscale x 16 x i8> %9
}
```
Commit: 531430b614cf8a5122335168abbc54096b5225a2
https://github.com/llvm/llvm-project/commit/531430b614cf8a5122335168abbc54096b5225a2
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/maxnum.ll
M llvm/test/Transforms/InstCombine/minnum.ll
Log Message:
-----------
[InstCombine] Relax one-use check for min/max(fpext x, fpext y) to fpext(min/max(x, y)) fold (#180164)
If only of the operands is one-use, the total number of fpexts stays the
same, but the min/max is performed on a narrowed type. Additionally, the
fpext may fold with a following fptrunc.
Commit: 2ead49ff09802bec6fdaad69133369357299a3b9
https://github.com/llvm/llvm-project/commit/2ead49ff09802bec6fdaad69133369357299a3b9
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/test/Transforms/PhaseOrdering/d83507-knowledge-retention-bug.ll
Log Message:
-----------
[PhaseOrdering] Regenerate test checks (NFC)
The partial check lines while claiming UTC output here were
highly confusing. Regenerate the check lines. While here, use a
newer version and rename blocks to avoid anon block conflicts.
Commit: b79ba024790200d8e3900cdd050585c962535eb6
https://github.com/llvm/llvm-project/commit/b79ba024790200d8e3900cdd050585c962535eb6
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Sema/SemaAMDGPU.h
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/CodeGen/TargetInfo.cpp
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
A clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-cooperative-atomics-templated.hip
A clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-load-monitor-templated.hip
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-load-monitor.cl
A clang/test/SemaHIP/builtins-amdgcn-gfx1250-cooperative-atomics-templated.hip
A clang/test/SemaHIP/builtins-amdgcn-gfx1250-load-monitor-templated.hip
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-param.cl
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.monitor.gfx1250.ll
Log Message:
-----------
[AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (#177343)
Load monitor operations make more sense as atomic operations, as
non-atomic operations cannot be used for inter-thread communication w/o
additional synchronization.
The previous built-in made it work because one could just override the
CPol bits, but that bypasses the memory model and forces the user to learn
about ISA bits encoding.
Making load monitor an atomic operation has a couple of advantages.
First, the memory model foundation for it is stronger. We just lean on the
existing rules for atomic operations. Second, the CPol bits are abstracted away
from the user, which avoids leaking ISA details into the API.
This patch also adds supporting memory model and intrinsics
documentation to AMDGPUUsage.
Solves SWDEV-516398.
Commit: a654a27fcd4a44e6c76a93fabc11aed2cb3b97ef
https://github.com/llvm/llvm-project/commit/a654a27fcd4a44e6c76a93fabc11aed2cb3b97ef
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/minnum.ll
Log Message:
-----------
[InstCombine] Fold min/max(fpext x, C) to fpext(min/max(x, fptrunc C)) (#179968)
Fold `min/max(fpext x, C)` to `fpext(min/max(x, fptrunc C))` in cases
where the truncation of the constant is lossless.
This helps eliminate fpext/fptrunc pairs around min/max and addresses
the regression from https://github.com/llvm/llvm-project/pull/177988.
Proof: https://alive2.llvm.org/ce/z/y_Bcdd
Commit: 25315f287c08f4ab50198461dd84ac8d2eed8cc7
https://github.com/llvm/llvm-project/commit/25315f287c08f4ab50198461dd84ac8d2eed8cc7
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
Log Message:
-----------
[AMDGPU] Remove `NoNaNsFPMath` uses (#180469)
Should use `nnan` flag only.
Commit: 2298b8606d84262ef0f420524c9afdded6d71470
https://github.com/llvm/llvm-project/commit/2298b8606d84262ef0f420524c9afdded6d71470
Author: Gergo Stomfai <55883018+stomfaig at users.noreply.github.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ctls.mir
M llvm/test/CodeGen/AArch64/cls.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv32p.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64p.ll
Log Message:
-----------
[GISel] computeKnownBits - add CTLS handling (#178063)
Closes llvm/llvm-project#174370
Commit: fe91384a5b3766894951c5832ea88a0391f82bf1
https://github.com/llvm/llvm-project/commit/fe91384a5b3766894951c5832ea88a0391f82bf1
Author: Arun Thangamani <arun.thangamani at intel.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td
M mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
M mlir/test/Dialect/Vector/transform-vector.mlir
M mlir/test/python/dialects/transform_vector_ext.py
Log Message:
-----------
[mlir][vector] Wrapping `populateFlattenVectorTransferPatterns` as a transform pass. (#178134)
This PR covers the `mlir::vector::populateFlattenVectorTransferPatterns`
as a transform pass.
Commit: a07347f60997b971314563c7427aff5153677d95
https://github.com/llvm/llvm-project/commit/a07347f60997b971314563c7427aff5153677d95
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/ordering/TestDataFormatterStdOrdering.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/vbool/TestDataFormatterStdVBool.py
M lldb/test/API/functionalities/gdb_remote_client/TestWasm.py
Log Message:
-----------
[lldb][test] Rename/remove duplicate methods in API tests (#180250)
Ran my python script from
https://github.com/llvm/llvm-project/pull/97043 over the repo again and
there were 2 duplicate test-cases that have been introduced since I last
did this.
Also one of the WASM classes had a duplicate method which I just
removed.
Commit: e12c8f08c046af6ae9929b843ec463bcf0a597a5
https://github.com/llvm/llvm-project/commit/e12c8f08c046af6ae9929b843ec463bcf0a597a5
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
A flang/include/flang/Optimizer/Analysis/ArraySectionAnalyzer.h
A flang/lib/Optimizer/Analysis/ArraySectionAnalyzer.cpp
M flang/lib/Optimizer/Analysis/CMakeLists.txt
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
Log Message:
-----------
[flang][NFC] Extract ArraySectionAnalyzer from OptimizedBufferization (#180278)
Extract `ArraySectionAnalyzer` from `OptimizedBufferization` into a
standalone
analysis utility so it can be reused by other passes (e.g.,
`ScheduleOrderedAssignments`).
Also extracts the logic to detect if a designate is using the indices
of an elemental operation in storage order.
This will be used in WHERE construct optimization in the next patch.
Commit: 233a9918bc18953bc96fb091c8c3e7bd8a95ed4a
https://github.com/llvm/llvm-project/commit/233a9918bc18953bc96fb091c8c3e7bd8a95ed4a
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/loop_dependence_mask.ll
Log Message:
-----------
[AArch64] Tweak fixed-length loop.dependence.mask costs (#175538)
For fixed-length masks we need to AND the result of the whilewr/rw with
`ptrue vl*` (which is at least one more instruction).
Commit: 2ffb54364ff5669da0ed2a0daff744fd3c33ec4a
https://github.com/llvm/llvm-project/commit/2ffb54364ff5669da0ed2a0daff744fd3c33ec4a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
Log Message:
-----------
AMDGPU: Add a test for libcall simplify pow handling (#180491)
This case could be turned into powr or pown, so track which
case ends up preferred.
Commit: 936ec4ea6658106e6b13157c5d14b9b6d5070141
https://github.com/llvm/llvm-project/commit/936ec4ea6658106e6b13157c5d14b9b6d5070141
Author: puneeth_aditya_5656 <myakampuneeth at gmail.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
A lldb/test/Shell/ObjectFile/ELF/stt-tls-symbol.yaml
Log Message:
-----------
[lldb] Handle STT_TLS symbol type in ELF parser (#178975)
Add handling for `STT_TLS` (thread-local storage) symbols in the ELF
symbol parsing code. Previously, TLS symbols like `errno` from glibc
were not recognized because `STT_TLS` was not handled in the symbol type
switch statement.
This treats TLS symbols as data symbols (`eSymbolTypeData`), similar to
`STT_OBJECT`. The actual TLS address resolution is already implemented
in `DynamicLoaderPOSIXDYLD::GetThreadLocalData()` which uses the DWARF
`DW_OP_form_tls_address` opcode to calculate thread-local addresses.
Commit: 4ef7be9b80e156c59a533557e2a0d058cb91019f
https://github.com/llvm/llvm-project/commit/4ef7be9b80e156c59a533557e2a0d058cb91019f
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/SimplifyLibCalls.h
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
Log Message:
-----------
[SimplifyLibCalls] Directly convert fmin/fmax to intrinsics (#177988)
Drop the custom shrinking code, which we'll also do for intrinsics.
Having libcall-only optimizations is confusing, as these are typically
directly emitted as intrinsics by the frontend.
Commit: 3862a4f733002e90ecee7b79aca87bb46d5575b1
https://github.com/llvm/llvm-project/commit/3862a4f733002e90ecee7b79aca87bb46d5575b1
Author: Eliz Habiboullah <eliz4ads at gmail.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
Log Message:
-----------
[GlobalISel] Use named constant for impossible repair cost (#180490)
replace magic value `std::numeric_limits<unsigned>::max()` with a named
constant `ImpossibleRepairCost` to improve readability
Commit: 27a8ab09fa7b5f966b8201377f29f338cdc9fb90
https://github.com/llvm/llvm-project/commit/27a8ab09fa7b5f966b8201377f29f338cdc9fb90
Author: Petr Kurapov <petr.kurapov at amd.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
A llvm/test/CodeGen/AMDGPU/indirect-reg-read-imm-idx.ll
A llvm/test/CodeGen/AMDGPU/indirect-reg-read-imm-idx.mir
Log Message:
-----------
[AMDGPU] Fix V_INDIRECT_REG_READ_GPR_IDX expansion with immediate index (#179699)
The definition for V_INDIRECT_REG_READ_GPR_IDX_B32_V*'s SSrc_b32 operand
allows immediates, but the expansion logic handles only register cases
now. This can result in expansion failures when e.g.
llvm.amdgcn.wave.reduce.umin.i32 is folded into a constant and then used
as an insertelement idx.
Commit: 964651ad515b61df56ce51cdc9978b2bcc8d0a7b
https://github.com/llvm/llvm-project/commit/964651ad515b61df56ce51cdc9978b2bcc8d0a7b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/select-big-integer.ll
Log Message:
-----------
[X86] Allow handling of i128/256/512 SELECT on the FPU (#180197)
If the scalar integer selection sources are freely transferable to the
FPU, then splat to create an allbits select condition and create a
vector select instead
Commit: 5b2bfcedf501109d188eb39cf63b54cc1c3ca33b
https://github.com/llvm/llvm-project/commit/5b2bfcedf501109d188eb39cf63b54cc1c3ca33b
Author: Matt <MattPD at users.noreply.github.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M flang/lib/Optimizer/Analysis/CMakeLists.txt
Log Message:
-----------
[flang][NFC] Remove dependency on FIRBuilder from FIRAnalysis. (#180300)
The dependency actually appears to be unused.
Co-authored-by: Matt P. Dziubinski <matt-p.dziubinski at hpe.com>
Commit: 2eb811239c2845619285480329a5d78daa9986ef
https://github.com/llvm/llvm-project/commit/2eb811239c2845619285480329a5d78daa9986ef
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/CAS/OnDiskGraphDB.cpp
Log Message:
-----------
[CAS] getInternalFileBackedObjectData - fix MSVC not all control paths return a value warning. NFC. (#180499)
Commit: bf84e84f06ce4e752b54acb6af2c947ce62692d0
https://github.com/llvm/llvm-project/commit/bf84e84f06ce4e752b54acb6af2c947ce62692d0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/lib/CodeGen/Targets/AMDGPU.cpp
Log Message:
-----------
[clang][amdgpu] getLLVMSyncScopeStr - fix MSVC not all control paths return a value warning. NFC. (#180501)
Commit: 1d61ac2d41d9c77d02af4ac149d83b52eb782704
https://github.com/llvm/llvm-project/commit/1d61ac2d41d9c77d02af4ac149d83b52eb782704
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
Log Message:
-----------
[clang][amdgpu] mapCABIAtomicOrdering - fix MSVC not all control paths return a value warning. NFC. (#180500)
Commit: f71e32196667264607974e22d28d3badb2d73b5e
https://github.com/llvm/llvm-project/commit/f71e32196667264607974e22d28d3badb2d73b5e
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ByteCode/InterpState.h
A clang/test/AST/ByteCode/constexpr-steps.cpp
Log Message:
-----------
[clang][bytecode] Implement constexpr step limit (#176150)
This only calls `noteStep()` on jump opcodes, so this works for loops.
It does not prevent "hangs" when a function is just _very_ long (could
be interesting how this interfaces with expand statements?).
Fixes https://github.com/llvm/llvm-project/issues/165951
Commit: f88e0185d7333827f5342143e7c515fc8fb57020
https://github.com/llvm/llvm-project/commit/f88e0185d7333827f5342143e7c515fc8fb57020
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang-tools-extra/clangd/ClangdLSPServer.cpp
Log Message:
-----------
[clangd] Add explicit std::move(...) to avoid a few copies (#180475)
Moving an std::map is almost always profitable (DiagnosticToDiagRefMap).
Changes suggested by performance-use-std-move from #179467
Commit: dbf2caaaef120bb7a9f7cf6b5611ba5584cff887
https://github.com/llvm/llvm-project/commit/dbf2caaaef120bb7a9f7cf6b5611ba5584cff887
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/OHOS.cpp
Log Message:
-----------
[clang] Add explicit std::move(...) to avoid a few copies (#180477)
Moving a clang::MultilibSet is almost always profitable.
Changes suggested by performance-use-std-move from #179467
Commit: a40275c8c821c89046111d4954165daba7a24f36
https://github.com/llvm/llvm-project/commit/a40275c8c821c89046111d4954165daba7a24f36
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/lib/Analysis/CloneDetection.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/StaticAnalyzer/Core/ProgramState.cpp
M clang/lib/Tooling/DependencyScanningTool.cpp
Log Message:
-----------
[clang] Add explicit std::move(...) to avoid a few copies (#180482)
Moving an std::vector is almost always profitable.
A clang::CXXScopeSpec contains an owned
clang::NestedNameSpecifierLocBuilder which currently does not benefit
from being moved, but may structurally in the future.
A clang::MultiLevelTemplateArgumentList contains an llvm::SmalVector
which may benefit from being moved dependiong on its size.
A clang::Environment contains an llvm::ImmutableMap which itself
contains an llvm::IntrusiveRefCntPtr that benefits from being moved.
Changes suggested by performance-use-std-move from #179467
---------
Co-authored-by: Timm Baeder <tbaeder at redhat.com>
Commit: 72ff1cb2f87244ade6dda960946346bb3dc6fd68
https://github.com/llvm/llvm-project/commit/72ff1cb2f87244ade6dda960946346bb3dc6fd68
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M flang/test/Lower/equivalence-with-host-assoc.f90
M flang/test/Lower/explicit-interface-results-2.f90
M flang/test/Lower/explicit-interface-results.f90
M flang/test/Lower/ext-proc-as-actual-argument-1.f90
M flang/test/Lower/ext-proc-as-actual-argument-2.f90
Log Message:
-----------
[flang][NFC] Converted five tests from old lowering to new lowering (part 15) (#179854)
Tests converted from test/Lower: equivalence-with-host-assoc.f90,
explicit-interface-results-2.f90, explicit-interface-results.f90,
ext-proc-as-actual-argument-1.f90, ext-proc-as-actual-argument-2.f90
Commit: 8cd86ff284c3aa1b47c00500a5dc7889b1c9bade
https://github.com/llvm/llvm-project/commit/8cd86ff284c3aa1b47c00500a5dc7889b1c9bade
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
A llvm/test/Transforms/LoopVectorize/phi-with-fastflags-vplan.ll
A llvm/test/Transforms/LoopVectorize/phi-with-fastflags.ll
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
Log Message:
-----------
[VPlan] Propagate FastMathFlags from phis to blends (#180226)
If a phi has fast math flags, we can propagate it to the widened select.
To do this, this patch makes VPPhi and VPBlendRecipe subclasses of
VPRecipeWithIRFlags, and propagates it through PlainCFGBuilder and
VPPredicator.
Alive2 proofs for some of the FMFs (it looks like it can't reason about
the full "fast" set yet)
nnan: https://alive2.llvm.org/ce/z/f0bRd4
nsz: https://alive2.llvm.org/ce/z/u9P96T
The actual motivation for this to eventually be able to move the special
casing for tail folding in
LoopVectorizationPlanner::addReductionResultComputation into the CFG in
#176143, which requires passing through FMFs.
Commit: 0cd8fd974dd674cab2f53cedeb674622413561bd
https://github.com/llvm/llvm-project/commit/0cd8fd974dd674cab2f53cedeb674622413561bd
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M lld/COFF/Driver.cpp
M lld/wasm/OutputSections.cpp
M lld/wasm/Writer.cpp
Log Message:
-----------
[lld] Add explicit std::move(...) to avoid a few vector copies (#180474)
In corner cases, it is profitable to move an llvm::SmallString instead
of copying it.
It is almost always profitable to move an std::vector
Changes suggested by performance-use-std-move from
https://github.com/llvm/llvm-project/pull/179467
Commit: fed9abcb4796507622bdd9e2e36bc80260a5197b
https://github.com/llvm/llvm-project/commit/fed9abcb4796507622bdd9e2e36bc80260a5197b
Author: Prajwal P J <prajwaljalwadi at gmail.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaChecking.cpp
M clang/test/SemaCXX/constant-expression-cxx2a.cpp
Log Message:
-----------
[Clang] Fix missing -Warray-bounds warning on member function calls. (#179647)
Fixes #179128.
This patch fixes a false negative where Clang failed to detect
out-of-bounds access when calling a member function on an invalid array
index. It adds handling for CXXMemberCallExpr in CheckArrayAccess.
Signed-off-by: prajwal jalwadi<prajwaljalwadi at gmail.com>
Commit: bf1340598ec3af1169d47e6deff427fe9e703251
https://github.com/llvm/llvm-project/commit/bf1340598ec3af1169d47e6deff427fe9e703251
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/include/llvm/Support/TargetOpcodes.def
Log Message:
-----------
[CodeGen] Improve documentation for SUBREG_TO_REG (#180504)
The most important change is to remove the claim that the extra bits are
necessarily set to zero.
Commit: 4bb16b130df2f5f132d04fcd8960a860a290402f
https://github.com/llvm/llvm-project/commit/4bb16b130df2f5f132d04fcd8960a860a290402f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-shuffles.ll
Log Message:
-----------
[VectorCombine][X86] Add test coverage for #161980 (#180508)
Commit: 6dbdfd824affb4a0b2beda56af222758500cffa2
https://github.com/llvm/llvm-project/commit/6dbdfd824affb4a0b2beda56af222758500cffa2
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Analysis/ValueTracking/assume-queries-counter.ll
M llvm/test/Transforms/InstCombine/assume.ll
M llvm/test/Transforms/PhaseOrdering/d83507-knowledge-retention-bug.ll
Log Message:
-----------
[InstCombine] Drop nonnull assumes if the pointer is already known to be nonnull (#180434)
Commit: 695095fff67e622309d8059c261e4df0b73fe4a9
https://github.com/llvm/llvm-project/commit/695095fff67e622309d8059c261e4df0b73fe4a9
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
Log Message:
-----------
[lldb-dap][NFC] Add new line to attach message (#180510)
Commit: ef68a53139626bf4067889016f82a8fa945fac61
https://github.com/llvm/llvm-project/commit/ef68a53139626bf4067889016f82a8fa945fac61
Author: Sergei Lebedev <185856+superbobry at users.noreply.github.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M utils/bazel/MODULE.bazel.lock
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/build_defs.bzl
A utils/bazel/llvm-project-overlay/mlir/stubgen_runner.py
M utils/bazel/third_party_build/nanobind.BUILD
Log Message:
-----------
[MLIR] [Python] Added plumbing to run stubgen on the mlir._mlir package (#179211)
This allows generating stubs during Bazel builds, which was previously
only supported under CMake.
I decided not to use nanobind_stubgen from nanobind-bazel, because the
py_binary it generates is not easily usable in a genrule.
Commit: f6acc800f2c6e57e2e22bad3f475cd7a01139ca1
https://github.com/llvm/llvm-project/commit/f6acc800f2c6e57e2e22bad3f475cd7a01139ca1
Author: Marina Taylor <marina_taylor at apple.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/test/Driver/darwin-ld-lto.c
Log Message:
-----------
[Driver][Darwin] Pass stack usage file for LTO (#178005)
Add a .su extension to the main output's filename and pass this down to
the LLVM layer.
rdar://143089305
Commit: 4344268ad605a3b77d00a30fb9284f453b240ec0
https://github.com/llvm/llvm-project/commit/4344268ad605a3b77d00a30fb9284f453b240ec0
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/include/clang/AST/Expr.h
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaChecking.cpp
Log Message:
-----------
[clang] Return std::optional from all Expr::tryEvaluate* API (#179230)
tryEvaluateString was returning an std::optional, but the other try* API
was not. Update tryEvaluateObjectSize and tryEvaluateStrLen to return an
std::optional<uint64_t>.
Commit: 2805c8aaa61a94ef22ac76c8dac56f7dfe970651
https://github.com/llvm/llvm-project/commit/2805c8aaa61a94ef22ac76c8dac56f7dfe970651
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/phi-with-fastflags.ll
Log Message:
-----------
[VPlan] Add missing REQUIRES: asserts to VPlan output test
Should fix https://lab.llvm.org/buildbot/#/builders/11/builds/33293
Commit: dd356180b3ea7cedec7584dbb9de1e58c9426855
https://github.com/llvm/llvm-project/commit/dd356180b3ea7cedec7584dbb9de1e58c9426855
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/test/Dialect/SPIRV/IR/types.mlir
M mlir/test/Dialect/SPIRV/Transforms/replicated-const-composites.mlir
Log Message:
-----------
[mlir][spirv] Verify vector types when parsing (#180430)
Also remove some invalid test cases (replicated constants).
Fixes: https://github.com/llvm/llvm-project/issues/180419
Commit: 45b037cf7a26641bf778bbe7532d99935d35be1b
https://github.com/llvm/llvm-project/commit/45b037cf7a26641bf778bbe7532d99935d35be1b
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp8.cl
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
A llvm/test/MC/AMDGPU/gfx1150_unsupported.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop1-fake16.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop1.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop1_dpp16-fake16.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop1_dpp16.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop1_dpp8-fake16.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop1_dpp8.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop3-fake16.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop3.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop3_dpp16-fake16.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop3_dpp16.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop3_dpp8-fake16.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop3_dpp8.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop3_err.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop3_from_vop1-fake16.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop3_from_vop1.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop3_from_vop1_dpp16-fake16.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop3_from_vop1_dpp16.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop3_from_vop1_dpp8-fake16.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop3_from_vop1_dpp8.s
A llvm/test/MC/Disassembler/AMDGPU/gfx1170_dasm_vop1_dpp16.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1170_dasm_vop1_dpp8.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1170_dasm_vop3.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1170_dasm_vop3_dpp16.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1170_dasm_vop3_dpp8.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1170_dasm_vop3_from_vop1.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1170_dasm_vop3_from_vop1_dpp16.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1170_dasm_vop3_from_vop1_dpp8.txt
Log Message:
-----------
[AMDGPU] Add fp8/bf8 conversion instructions for gfx1170 (#180191)
Commit: d1b402b61298d7f28578650e452874e51ea818c4
https://github.com/llvm/llvm-project/commit/d1b402b61298d7f28578650e452874e51ea818c4
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/trunc-extractelement.ll
Log Message:
-----------
[InstCombine] Avoid overflow in `foldVecExtTruncToExtElt` (#180414)
This weird pattern was introduced by LoopVectorize. But it was placed in
an unreachable path, so we cannot assert that the indices are always
valid in InstCombine.
Closes https://github.com/llvm/llvm-project/issues/180233.
Commit: da0ad392ffc689cf4909b487e3d956e074be87c6
https://github.com/llvm/llvm-project/commit/da0ad392ffc689cf4909b487e3d956e074be87c6
Author: Ruoyu Qiu <cabbaken at outlook.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
A llvm/include/llvm/TargetParser/AVRTargetParser.h
M llvm/include/llvm/TargetParser/Triple.h
A llvm/lib/TargetParser/AVRTargetParser.cpp
M llvm/lib/TargetParser/CMakeLists.txt
A llvm/test/tools/llvm-objdump/ELF/AVR/lit.local.cfg
A llvm/test/tools/llvm-objdump/ELF/AVR/mattr.test
M llvm/tools/llvm-objdump/llvm-objdump.cpp
Log Message:
-----------
[llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (#180468)
Reland #174731, resolve cyclic dependency issue.
The use of LLVM_Object in LLVM_Util would cause cyclic dependency.
Fix cyclic dependency by reimplement `getFeatureSetFromEFlag()`.
Original description:
---
This PR updates llvm-objdump to detect the specific AVR architecture
from the ELF header flags when no specific CPU is provided.
Fixes: https://github.com/llvm/llvm-project/issues/146451
Signed-off-by: Ruoyu Qiu <cabbaken at outlook.com>
Commit: 1ff4b503802b049463da4a8fd4aaac496ddd260b
https://github.com/llvm/llvm-project/commit/1ff4b503802b049463da4a8fd4aaac496ddd260b
Author: David Spickett <david.spickett at arm.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M lldb/test/API/driver/batch_mode/TestBatchMode.py
M lldb/tools/driver/Driver.cpp
Log Message:
-----------
[lldb] Quit automatically if --batch has no commands to run (#179969)
Fixes #179700
Simple fix, if we are in batch mode, don't go into an interactive
session after checking if there are commands to run.
Testing it is more tricky. I tried a shell test as I thought it would be
simplest. However to be able to FileCheck I had to pipe and the pipe
turns off the prompt because it's non-interactive. The prompt is the
thing that must not be printed.
So I've just spawned lldb as a subprocess. If it doesn't quit quickly
then something is wrong. The timeout is high not because it should
normally take that long, but because sometimes a process will get
stalled for a while and I don't want this to be flaky.
(though in theory it can get stalled for much longer than a minute)
If it does time out, the process will be cleaned up automatically. See
https://docs.python.org/3/library/subprocess.html#subprocess.run
> A timeout may be specified in seconds, it is internally
> passed on to Popen.communicate(). If the timeout expires,
> the child process will be killed and waited for.
Commit: 7defb0a4a35817ee7accb310d99912152a542ec2
https://github.com/llvm/llvm-project/commit/7defb0a4a35817ee7accb310d99912152a542ec2
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
Log Message:
-----------
[VPlan] Skip applying InstsToScalarize with forced instr costs. (#168269)
ForceTargetInstructionCost in the legacy cost model overrides any costs
from InstsToScalarize. Match the behavior in the VPlan-based cost model.
This fixes a crash with -force-target-instr-cost for the added test
case.
PR: https://github.com/llvm/llvm-project/pull/168269
Commit: 42d5e76b469f56fbf522fe6f119e755db730610b
https://github.com/llvm/llvm-project/commit/42d5e76b469f56fbf522fe6f119e755db730610b
Author: Sergei Druzhkov <serzhdruzhok at gmail.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M lldb/tools/lldb-dap/extension/package-lock.json
M lldb/tools/lldb-dap/extension/package.json
Log Message:
-----------
[lldb-dap] Bump vscode version (#177008)
VS Code and node versions should be synchronized. We use node >= 18.19,
so expected VS Code version is 1.90.0. I checked it using this
[info](https://github.com/ewanharris/vscode-versions).
Commit: b2e6b987839a9b94f6d998805f750515680d31f4
https://github.com/llvm/llvm-project/commit/b2e6b987839a9b94f6d998805f750515680d31f4
Author: Djordje Todorovic <djordje.todorovic at htecgroup.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsFastISel.cpp
A llvm/test/CodeGen/Mips/musttail-fastisel.ll
Log Message:
-----------
[MIPS] Fix argument size in Fast ISel (#180336)
Fix bug where Fast ISel incorrectly set `IncomingArgSize` to `0` for
functions with no arguments, since `MIPS O32` uses _the reserved
argument area_ of 16 bytes even for the functions with no args at all.
Commit: 0bbf25ffd4b2e665e2a36adcd11b732ac8bb74e6
https://github.com/llvm/llvm-project/commit/0bbf25ffd4b2e665e2a36adcd11b732ac8bb74e6
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/test/Transforms/InstCombine/gep-sext.ll
Log Message:
-----------
[InstCombine] Regenerate test checks (NFC)
Commit: 44031ae79f7d3a4a2f56efecb75d4467955c043c
https://github.com/llvm/llvm-project/commit/44031ae79f7d3a4a2f56efecb75d4467955c043c
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
Log Message:
-----------
[LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (#179977)
In some cases we decide to vectorise loops with first-order recurrences
using VF=1, IC>1. We then attempt to unroll a vplan in replicateByVF,
however when trying to erase the list of values from the parent we
trigger the following assert:
```
virtual llvm::VPRecipeValue::~VPRecipeValue(): Assertion `Users.empty()
&& "trying to delete a VPRecipeValue with remaining users"' failed.
```
The problem seems to stem from this code:
```
DefR->replaceUsesWithIf(LaneDefs[0], [DefR](VPUser &U, unsigned) {
return U.usesFirstLaneOnly(DefR);
});
```
since usesFirstLaneOnly returns false and we fail to replace uses of
DefR with LaneDefs[0]. Upon inspection the only VPUser objects that
return false are VPInstruction::FirstOrderRecurrenceSplice and
VPFirstOrderRecurrencePHIRecipe. Since the values are all scalar it's
simply not possible for us to be using anything other than the first
lane. I've fixed this by bailing out of replicateByVF early for plans with
only a scalar VF.
Fixes https://github.com/llvm/llvm-project/issues/179671
Commit: 33e3384aa899d20c42c89af537f50111e30d68ba
https://github.com/llvm/llvm-project/commit/33e3384aa899d20c42c89af537f50111e30d68ba
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M offload/test/offloading/fortran/basic-target-parallel-do.f90
M offload/test/offloading/fortran/basic-target-parallel-reduction.f90
M offload/test/offloading/fortran/basic-target-teams-parallel-reduction.f90
M offload/test/offloading/fortran/default-mapper-nested-derived-type.f90
M offload/test/offloading/fortran/do-concurrent-to-omp-saxpy-2d.f90
M offload/test/offloading/fortran/do-concurrent-to-omp-saxpy.f90
M offload/test/offloading/fortran/explicit-and-implicit-record-field-mapping.f90
M offload/test/offloading/fortran/implicit-record-field-mapping.f90
M offload/test/offloading/fortran/target-custom-reduction-derivedtype.f90
M offload/test/offloading/fortran/target-no-loop.f90
M offload/test/offloading/fortran/target-parallel-do-collapse.f90
M offload/test/offloading/ompx_bare.c
M offload/test/offloading/ompx_bare_multi_dim.cpp
Log Message:
-----------
[offload] Adapt tests to new PluginInterface quoting [NFC] (#180505)
https://github.com/llvm/llvm-project/commit/4096cb60175a3bfdde25dd0cca167416f4f4338e
removed the quotes around PluginInterface
Commit: dbbea962c9f9e05c56b5566b9b4f66351adf8079
https://github.com/llvm/llvm-project/commit/dbbea962c9f9e05c56b5566b9b4f66351adf8079
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M lldb/test/Shell/DAP/TestSTDINConsole.test
Log Message:
-----------
[lldb-dap][windows] fix invalid path substitution for lldb-dap (#180237)
https://github.com/llvm/llvm-project/pull/178642 added
`lldb/test/Shell/DAP/TestSTDINConsole.test` with an incorrect
`%lldb-dap` expansion. This patch fixes it.
Commit: 041ce9fe0f4ac7bc1a8927153d69418c416a5623
https://github.com/llvm/llvm-project/commit/041ce9fe0f4ac7bc1a8927153d69418c416a5623
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/phi-with-fastflags-vplan.ll
Log Message:
-----------
[LV][NFC] Add "REQUIRES: assert" to new test file (#180522)
Fixes a minor test regression introduced by
https://github.com/llvm/llvm-project/pull/180226 in file
llvm/test/Transforms/LoopVectorize/phi-with-fastflags-vplan.ll
Commit: 392f0c976728fdc3c1db1c4e93a8c26d66c5488d
https://github.com/llvm/llvm-project/commit/392f0c976728fdc3c1db1c4e93a8c26d66c5488d
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
A llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx1250.mir
Log Message:
-----------
[NFC][AMDGPU] Add a test to show the impact of wrong `s_mov_b64` instruction size (#180386)
Commit: b13dc236220eb1a6479282eaaa2bd317aef5f233
https://github.com/llvm/llvm-project/commit/b13dc236220eb1a6479282eaaa2bd317aef5f233
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
Log Message:
-----------
[lldb] add cross platform test commands in Makefile.rules (#180224)
This patch adds cross platform (Darwin, Linux, Windows) commands in
`Makefile.rules` which is used to build lldb test targets.
This maps POSIX commands like `mkdir -p` to their Windows equivalent,
which allows to create cross platform `Makefile` for lldb's test
targets. This is currently not needed by any test but might become
useful later as we are working on enabling more lldb Windows tests.
This was originally done in the `swiftlang/llvm-project` fork
(https://github.com/swiftlang/llvm-project/pull/12127)
Commit: ed19bbfe01d4fcf5d457cb563cb900763b8f2189
https://github.com/llvm/llvm-project/commit/ed19bbfe01d4fcf5d457cb563cb900763b8f2189
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/phi-with-fastflags.ll
Log Message:
-----------
Revert "[VPlan] Add missing REQUIRES: asserts to VPlan output test"
This reverts commit 2805c8aaa61a94ef22ac76c8dac56f7dfe970651.
This added the REQUIRES line to the wrong test, 041ce9f added it to the
correct one.
Commit: f6ee5bd4dfea88604ac27c0cc11b48ec1500e325
https://github.com/llvm/llvm-project/commit/f6ee5bd4dfea88604ac27c0cc11b48ec1500e325
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/SPIRV/extensions/SPV_ALTERA_arbitrary_precision_integers/apint-constant.ll
Log Message:
-----------
[SPIRV] Fix constant materialization for width > 64bit (#180182)
selectConst() was asserting for constants wider than 64 bits. Add APInt
overloads of getOrCreateConstInt and getOrCreateConstVector that avoid
the uint64_t truncation.
Commit: d8e679c28650082a97675c8edeaa01fac3e695c1
https://github.com/llvm/llvm-project/commit/d8e679c28650082a97675c8edeaa01fac3e695c1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/shuffle-transpose.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-shuffles.ll
Log Message:
-----------
[CostModel][X86] getShuffleCost - SK_Transpose v4f64/v4i64 matches UNPCK - don't generalise to SK_PermuteTwoSrc (#180514)
Other SK_Transpose shuffles can be cheaper than SK_PermuteTwoSrc but this is the easy one to handle
Fixes #161980
Commit: b4bc9fa1c6eec1fc4789f203326b01368bffc63b
https://github.com/llvm/llvm-project/commit/b4bc9fa1c6eec1fc4789f203326b01368bffc63b
Author: Christian Sigg <csigg at google.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Port da0ad392ffc6.
Commit: 03ab85cb873eee64da5a4a34c44955682bdc7e34
https://github.com/llvm/llvm-project/commit/03ab85cb873eee64da5a4a34c44955682bdc7e34
Author: Kiva <imkiva at islovely.icu>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
A llvm/test/Transforms/InstCombine/gep-srem-to-and-deref.ll
Log Message:
-----------
[InstCombine] fold `gepi _, (srem x, y)` to `gepi _, (urem x, y)` if `y` is power-of-2 (#180148)
This PR adds a small, targeted InstCombine fold for the pattern:
```
%idx = srem i64 %x, 2^k
%p = getelementptr inbounds nuw i8, ptr %base, i64 %idx
```
When the GEP is inbounds + nuw, and the divisor is a non-zero
power-of-two constant, the signed remainder cannot produce a negative
offset without violating the inbounds/nuw constraints. In that case we
can canonicalize the index to a non-negative form and expose the common
power-of-two rewrite:
- Rewrite the GEP index from `srem %x, 2^k` to `urem %x, 2^k`
- Create a new GEP with the new index and replace the original GEP
- the `urem %x, 2^k` will further folds to `and %x (2^k-1)`
resulting the following pattern
```
%idx = and i64 %x, (2^k-1)
%p = getelementptr inbounds nuw i8, ptr %base, i64 %idx
```
Fixes #180097.
generalized alive2 proof: https://alive2.llvm.org/ce/z/8EBxug
Commit: f9528a3608a2aa4094c982dcb093bd191524c72d
https://github.com/llvm/llvm-project/commit/f9528a3608a2aa4094c982dcb093bd191524c72d
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
A clang/test/Sema/warn-lifetime-safety-fixits.cpp
Log Message:
-----------
[LifetimeSafety] Add fixit verification with FileCheck (#180488)
Verify that produced messages/fixes are located in the right place.
With this patch, we can proceed to do
https://github.com/llvm/llvm-project/issues/180344
Commit: fccbdcb15a1347e96a15e95ff540e03aea87ca00
https://github.com/llvm/llvm-project/commit/fccbdcb15a1347e96a15e95ff540e03aea87ca00
Author: Twice <twice at apache.org>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
A mlir/include/mlir-c/ExtensibleDialect.h
M mlir/include/mlir/Bindings/Python/IRCore.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/CAPI/IR/CMakeLists.txt
A mlir/lib/CAPI/IR/ExtensibleDialect.cpp
M mlir/test/python/dialects/ext.py
Log Message:
-----------
[MLIR][Python] Support dynamic traits in python-defined dialects (#179705)
This is a follow-up PR of #169045 and the second part of #179086.
In #179086, we added support for defining regions in Python-defined ops,
but its usefulness was quite limited because we still couldn’t mark an
op as a `Terminator` or `NoTerminator`. In this PR, we port the
`DynamicOpTrait` (introduced on the C++ side for `DynamicDialect` in
#177735) to Python, so we can dynamically attach traits to
Python-defined ops.
Commit: 65b4099219ce7bf172dac26b641d56eb38680bd7
https://github.com/llvm/llvm-project/commit/65b4099219ce7bf172dac26b641d56eb38680bd7
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx1250.mir
Log Message:
-----------
[AMDGPU] Fix instruction size for 64-bit literal constant operands (#180387)
`getLit64Encoding` uses a different approach to determine whether 64-bit
literal encoding is used, which caused a size mismatch between the
`MachineInstr` and the `MCInst`.
For `!isValid32BitLiteral`, it is effectively `!(isInt<32>(Val) ||
isUInt<32>(Val))`, which is `!isInt<32>(Val) && !isUInt<32>(Val)`, but
in `getLit64Encoding`, it is `!isInt<32>(Val) || !isUInt<32>(Val)`.
Commit: fbcfbd9d3a33d14430250ad056c7d726db41673a
https://github.com/llvm/llvm-project/commit/fbcfbd9d3a33d14430250ad056c7d726db41673a
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M lld/ELF/Relocations.cpp
Log Message:
-----------
[NFC][ELF] Fix overzealous find/replace affecting comments
Commit a94060ca0c87 ("[ELF] Pass Ctx & to Relocations") swapped the
InputSectionBase &c argument for an InputSectionBase *sec member, and so
"c." was replaced with "sec->". However, this must have done in such a
way that "Local-Exec." was transformed to "Local-Exesec->" and
"RISCV::relocateAlloc." to "RISCV::relocateAllosec->", i.e. without the
use of something like clangd, and without appropriate word boundaries in
a regex.
Commit: 1026944313daa82e68094b446d208a24906f8af0
https://github.com/llvm/llvm-project/commit/1026944313daa82e68094b446d208a24906f8af0
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M libcxx/test/benchmarks/format/format_to.bench.cpp
M libcxx/test/benchmarks/format/format_to_n.bench.cpp
M libcxx/test/benchmarks/format/formatted_size.bench.cpp
Log Message:
-----------
[libc++] Reduce the number of runs on the format_to{,n} and formatted_size benchmarks (#179922)
Testing a bunch of sizes has relatively little value. This reduces the
number of benchmarks so we can run them on a regular basis. This saves
~8 minutes when running the benchmarks.
Commit: 77ccd853d0ec9a96f49c8017030b653ab82bcb45
https://github.com/llvm/llvm-project/commit/77ccd853d0ec9a96f49c8017030b653ab82bcb45
Author: hanbeom <kese111 at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Analysis/IVDescriptors.cpp
A llvm/test/Transforms/LoopVectorize/loop-legality-checks-remarks.ll
Log Message:
-----------
[IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (#166310)
When `-pass-remarks=loop-vectorize` is specified, the subsequent logic
is executed to display detailed debug messages even if no PreHeader
exists in the loop.
Therefore, an assert occurs when the `getLoopPreHeader()` function is
called. This commit resolves that issue.
Fixed: #165377
Commit: 3cd0bb7f67dca7307fc7b3956e9721da87ca32f6
https://github.com/llvm/llvm-project/commit/3cd0bb7f67dca7307fc7b3956e9721da87ca32f6
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Context.cpp
M clang/test/AST/ByteCode/c.c
Log Message:
-----------
[clang][bytecode] Check evaluate{String,Strlen} for pointer type (#180524)
We can only use block pointers here.
Commit: 7de4eb97d9c07d44a1460cc30b6f26fbdf77416e
https://github.com/llvm/llvm-project/commit/7de4eb97d9c07d44a1460cc30b6f26fbdf77416e
Author: Christian Sigg <csigg at google.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Port fccbdcb.
Commit: 12ec215e8ab74510ddd6b43b8e7c0422fbc16cfb
https://github.com/llvm/llvm-project/commit/12ec215e8ab74510ddd6b43b8e7c0422fbc16cfb
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/include/llvm/IR/Value.h
Log Message:
-----------
[IR] Update docstring for stripAndAccumulateConstantOffset (#180365)
Make it clear that the returned object in the case where a variable
offset is found is the first value to introduce a non-constant offset,
not necessarily the actual underlying object.
Found while investigating #180361.
Commit: 2e2167309de5d21629c0f7c769ed027f6c670e86
https://github.com/llvm/llvm-project/commit/2e2167309de5d21629c0f7c769ed027f6c670e86
Author: ShashwathiNavada <shashwathinavada at gmail.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
A flang/test/Semantics/OpenMP/allocate_do.f90
A flang/test/Semantics/OpenMP/allocate_do1.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[OpenMP][flang] Enabling support for Allocate clause in DO construct (#180172)
Fixes [#179425](https://github.com/llvm/llvm-project/issues/179425).
Allocate clause is allowed inside DO and parallel DO constructs as per
[13.6.2](https://www.openmp.org/wp-content/uploads/OpenMP-API-Specification-6-0.pdf)
but flang seemed to throw diagnostic against the same. This patch
enables initial support for allocate clause in DO construct.
Commit: 90691641e6419c285671f183628a0e16792df43c
https://github.com/llvm/llvm-project/commit/90691641e6419c285671f183628a0e16792df43c
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
A clang/test/DebugInfo/CXX/ctor-homing-local-type.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
Log Message:
-----------
[llvm][DebugInfo] Avoid attaching retained nodes to unrelated subprograms in DIBuilder (#180294)
Fix a regression introduced by
https://github.com/llvm/llvm-project/pull/165032, where DIBuilder could
attach local metadata nodes to the wrong subprogram during finalization.
DIBuilder records freshly created local variables, labels, and types in
`DIBuilder::SubprogramTrackedNodes`, and later attaches them to their
parent subprogram's retainedNodes in `finalizeSubprogram()`.
However, a temporary local type created via
`createReplaceableCompositeType()` may later be replaced by a type with
a different scope.
DIBuilder does not currently verify that the scopes of the original and
replacement types match.
As a result, local types can be incorrectly attached to the
retainedNodes of an unrelated subprogram. This issue is observable in
clang with limited debug info mode (see
`clang/test/DebugInfo/CXX/ctor-homing-local-type.cpp`).
This patch updates `DIBuilder::finalizeSubprogram()` to verify that
tracked metadata nodes still belong to the subprogram being finalized,
and avoids adding nodes whose scopes no longer match to retainedNodes
field of an unrelated subprogram.
Commit: 94971b7c8ebd3107c9b72b47074e97144f0a5b7d
https://github.com/llvm/llvm-project/commit/94971b7c8ebd3107c9b72b47074e97144f0a5b7d
Author: Mikhail Gudim <mgudim at qti.qualcomm.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/include/llvm/CodeGen/Register.h
Log Message:
-----------
[CodeGen][NFC] Update a comment. (#180531)
Since a register can represent a negative frame index, remove
"non-negative" from the comment.
Commit: 84f4b1e52df736d4bd0bcf821c7fbe06f3534042
https://github.com/llvm/llvm-project/commit/84f4b1e52df736d4bd0bcf821c7fbe06f3534042
Author: Vishruth Thimmaiah <vishruththimmaiah at gmail.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/multiple-result-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/multiple-result-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/struct-return.ll
Log Message:
-----------
Reland "[LoopVectorize] Support vectorization of overflow intrinsics" (#180526)
Enables support for marking overflow intrinsics `uadd`, `sadd`, `usub`,
`ssub`, `umul` and `smul` as trivially vectorizable.
Fixes #174617
---
This patch is a reland of #174835.
Reverts #179819
Commit: ab2e10d80f94ae65fea253c52433b23a1050e28e
https://github.com/llvm/llvm-project/commit/ab2e10d80f94ae65fea253c52433b23a1050e28e
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-atomics-gfx942.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-fadd.mir
A llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-fadd.v2f16.mir
Log Message:
-----------
[AMDGPU] Add legalization rules for G_ATOMICRMW_FADD (#175257)
G_ATOMICRMW_FADD is supported on flat, global and local address spaces
for S32, S64 and V2S16 values.
Commit: 091972c3543c91ce9bed76d61b6581dc19bb582f
https://github.com/llvm/llvm-project/commit/091972c3543c91ce9bed76d61b6581dc19bb582f
Author: Nathan Gauër <brioche at google.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
A llvm/test/CodeGen/SPIRV/pointers/sgep-array.ll
A llvm/test/CodeGen/SPIRV/pointers/sgep-class.ll
A llvm/test/CodeGen/SPIRV/pointers/sgep-dynamic-index.ll
A llvm/test/CodeGen/SPIRV/pointers/sgep-nested-struct-array.ll
A llvm/test/CodeGen/SPIRV/pointers/sgep-runtime-array.ll
A llvm/test/CodeGen/SPIRV/pointers/sgep-struct.ll
A llvm/test/CodeGen/SPIRV/pointers/sgep-vector.ll
Log Message:
-----------
[SPIR-V] initial support for @llvm.structured.gep (#178668)
This commit adds initial support to lower the intrinsinc
`@llvm.structured.gep` into proper SPIR-V.
For now, the backend continues to support both GEP formats. We might
want to revisit this at some point for the logical part.
Commit: 0a740668a4b512ee29486950474c12fac625a164
https://github.com/llvm/llvm-project/commit/0a740668a4b512ee29486950474c12fac625a164
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
A llvm/test/Transforms/InstCombine/maximumnum.ll
A llvm/test/Transforms/InstCombine/minimumnum.ll
Log Message:
-----------
[InstCombine] Support minimumnum/maximumnum (#180529)
Support minimumnum/maximumnum intrinsics in various existing
minnum/maxnum/minimum/maximum folds.
The test coverage has been copied from minnum/maxnum.
Proofs: https://alive2.llvm.org/ce/z/YMlLwO
Proofs that time out: https://alive2.llvm.org/ce/z/dJN8wj
Commit: a911fc12ec1f280203e243810de2b8acafbca4b8
https://github.com/llvm/llvm-project/commit/a911fc12ec1f280203e243810de2b8acafbca4b8
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
Log Message:
-----------
[X86] Fold expand(splat,passthrough,mask) -> select(splat,passthrough,mask) (#180238)
If all elements of the expansion vector are already splatted in place then we can use a vselect directly
Commit: 47fb7cd732ffc666d2865e1a187db24f8e09ab25
https://github.com/llvm/llvm-project/commit/47fb7cd732ffc666d2865e1a187db24f8e09ab25
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/TargetParser/BUILD.gn
Log Message:
-----------
[gn build] Port da0ad392ffc6
Commit: e6c73eb0c4c38fa18450c96154228e8ea73799be
https://github.com/llvm/llvm-project/commit/e6c73eb0c4c38fa18450c96154228e8ea73799be
Author: Hristo Hristov <hristo.goshev.hristov at gmail.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M libcxx/docs/CodingGuidelines.rst
Log Message:
-----------
[libc++][docs] Update `[[nodiscard]]` coding guidelines (#178384)
as requested in
https://github.com/llvm/llvm-project/pull/176936#pullrequestreview-3706775444
Clarifies when not to apply `[[nodiscard]]`.
https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant
---------
Co-authored-by: Nikolas Klauser <nikolasklauser at berlin.de>
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: e6a72a1d42cdc605dd3c9bc3e0ee8add930b19f9
https://github.com/llvm/llvm-project/commit/e6a72a1d42cdc605dd3c9bc3e0ee8add930b19f9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rv32p.ll
Log Message:
-----------
[RISCV] Combine ADDD+WMULSU to WMACCSU (#180454)
Extend the existing combineADDDToWMACC DAG combine to also match
RISCVISD::WMULSU and produce RISCVISD::WMACCSU. This is similar to
how ADDD+UMUL_LOHI is combined to WMACCU and ADDD+SMUL_LOHI is
combined to WMACC.
This patch was generated by AI, but I reviewed it.
Commit: 7fcc12c3be0550bdcaa5305c557eee73fd719ff3
https://github.com/llvm/llvm-project/commit/7fcc12c3be0550bdcaa5305c557eee73fd719ff3
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M offload/test/lit.cfg
M offload/test/mapping/firstprivate_aligned.cpp
Log Message:
-----------
Reapply [Offload][lit] Link against SPIR-V DeviceRTL if present (#180231)
I'll merge this at the same time as some llvm-zorg changes that start
building the DeviceRTL.
We only see one new test passing because everything still fails because
of the issue described in
https://github.com/llvm/llvm-project/pull/178980
Once a fix for that issue is merged we will see many new passes.
Commit: 35efbc00bef4acec1d73c3d1789618f171f9afce
https://github.com/llvm/llvm-project/commit/35efbc00bef4acec1d73c3d1789618f171f9afce
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M flang/lib/Parser/prescan.cpp
A flang/test/Parser/OpenMP/cont-in-cond-comp.f
M flang/test/Parser/OpenMP/sentinels.f
M flang/test/Parser/continuation-in-conditional-compilation.f
Log Message:
-----------
[flang] Warn if conditional compilation statements begin with a continuation line (#179802)
In fixed source form, allow conditional compilation statements to begin
with a continuation line and emit a warning. This behavior is similar
to that of regular statements and -E mode.
Fixes #129457
Commit: d62bc3ae0ea289e586e706332a364fa2f1114778
https://github.com/llvm/llvm-project/commit/d62bc3ae0ea289e586e706332a364fa2f1114778
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Transforms/IPO/AlwaysInliner.cpp
M llvm/lib/Transforms/IPO/BarrierNoopPass.cpp
M llvm/lib/Transforms/IPO/DeadArgumentElimination.cpp
M llvm/lib/Transforms/IPO/GlobalDCE.cpp
M llvm/lib/Transforms/IPO/IPO.cpp
M llvm/lib/Transforms/IPO/LoopExtractor.cpp
M llvm/tools/llc/llc.cpp
Log Message:
-----------
[NFC][LLVM][IPO] Remove pass initialization from pass constructors (#180154)
Commit: 8bbdac9e52498e773283fba48e7eb8eec03ef14c
https://github.com/llvm/llvm-project/commit/8bbdac9e52498e773283fba48e7eb8eec03ef14c
Author: Ryan Mitchell <Ryan.Mitchell at amd.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/MIRParser/MILexer.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.h
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
A llvm/test/CodeGen/MIR/AMDGPU/instr-mmra-error.mir
A llvm/test/CodeGen/MIR/AMDGPU/instr-mmra.mir
Log Message:
-----------
[MIParser] - Add support for MMRAs (#180320)
Probably just forgotten in #78569
Commit: cc7292056683f592c33055bb6456d509201654ec
https://github.com/llvm/llvm-project/commit/cc7292056683f592c33055bb6456d509201654ec
Author: Sergei Druzhkov <serzhdruzhok at gmail.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M lldb/source/Plugins/InstrumentationRuntime/TSan/InstrumentationRuntimeTSan.cpp
M lldb/test/API/functionalities/tsan/thread_leak/TestTsanThreadLeak.py
M lldb/test/API/functionalities/tsan/thread_numbers/TestTsanThreadNumbers.py
Log Message:
-----------
[lldb] Fix TSan report on Linux (#179115)
Linux uses 0 for `RTLD_DEFAULT` opposite to macOS and BSD systems (they
use -2).
Commit: 0040bdf5322a0acca5e9c40e06d8031bf6d7d10d
https://github.com/llvm/llvm-project/commit/0040bdf5322a0acca5e9c40e06d8031bf6d7d10d
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.swap.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.swap.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.swap.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.swap.ll
Log Message:
-----------
AMDGPU/GlobalISel: Regbanklegalize rules for buffer atomic swap (#180265)
Commit: b6ee085068972a41f3b2735a9f7e3ca48eab0f00
https://github.com/llvm/llvm-project/commit/b6ee085068972a41f3b2735a9f7e3ca48eab0f00
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M .github/workflows/release-documentation.yml
M .github/workflows/release-tasks.yml
Log Message:
-----------
workflows/release-task: Use less privileged token for uploading release notes (#180299)
We were using one token for both pushing to the llvmbot fork and for
creating a pull request against the www-releases repository, since the
fork and the repository have different owners, we were using a classic
access token which has very coarse-grained permissions. By using two
separate tokens, we limit the permissions to just what we need to do the
task.
Also, at the same time run the release-documentation job in an
environment, so we can limit the accessiblity to these secrets.
Commit: 404f9e6c993cb26fff1888f943284f1f6e86adc0
https://github.com/llvm/llvm-project/commit/404f9e6c993cb26fff1888f943284f1f6e86adc0
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sffbh.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_sffbh (#180099)
Change test to use update_llc_test_checks.py and make `v_flbit` test
actually divergent.
Commit: 77cb6660781eccdd0856c77dda8d6bf49c350397
https://github.com/llvm/llvm-project/commit/77cb6660781eccdd0856c77dda8d6bf49c350397
Author: John Brawn <john.brawn at arm.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/test/CodeGen/AArch64/ldst-opt.mir
Log Message:
-----------
[AArch64] Add support for B and H loads/stores in LoadStoreOptimizer (#180535)
This means the load/store optimizer can generate pre and post increment
versions of these instructions.
Commit: a29f0dd09680fbf7c24aa182c87f51cf4b93e21d
https://github.com/llvm/llvm-project/commit/a29f0dd09680fbf7c24aa182c87f51cf4b93e21d
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/docs/CommandGuide/index.rst
A llvm/docs/CommandGuide/llubi.rst
M llvm/test/CMakeLists.txt
M llvm/test/lit.cfg.py
A llvm/test/tools/llubi/main.ll
A llvm/test/tools/llubi/main2.ll
A llvm/test/tools/llubi/poison.ll
A llvm/tools/llubi/CMakeLists.txt
A llvm/tools/llubi/lib/CMakeLists.txt
A llvm/tools/llubi/lib/Context.cpp
A llvm/tools/llubi/lib/Context.h
A llvm/tools/llubi/lib/Interpreter.cpp
A llvm/tools/llubi/lib/Value.cpp
A llvm/tools/llubi/lib/Value.h
A llvm/tools/llubi/llubi.cpp
Log Message:
-----------
[llubi] Add initial support for llubi (#180022)
This patch implements the initial support for upstreaming
[llubi](https://github.com/dtcxzyw/llvm-ub-aware-interpreter). It only
provides the minimal functionality to run a simple main function. I hope
we can focus on the interface design in this PR, rather than trivial
implementations for each instruction.
RFC link:
https://discourse.llvm.org/t/rfc-upstreaming-llvm-ub-aware-interpreter/89645
Excluding the driver `llubi.cpp`, this patch contains three components
for better decoupling:
+ `Value.h/cpp`: Value representation
+ `Context.h/cpp`: Global state management (e.g., memory) and
interpreter configuration
+ `Interpreter.cpp`: The main interpreter loop
Compared to the out-of-tree version, the major differences are listed
below:
+ The interpreter logic always returns the control to its caller, i.e.,
it never calls `exit/abort` when immediate UBs are triggered.
+ `EventHandler` provides an interface to dump the trace. It also allows
callers to inspect the actual value and verify the correctness of
analysis passes (e.g, KnownBits/SCEV).
+ The context is designed to be reentrant. That is, you can call
`runFunction` multiple times. But its usefulness remains in doubt due to
side effects made by previous calls.
+ `runFunction` handles function calls with a loop, instead of calling
itself recursively. This makes it no longer bounded by the stack depth.
+ Uninitialized memory is planned to be approximated by returning random
values each time an uninitialized byte is loaded.
Commit: 9ab3e3312ddd07eefd009eca4fe4d14a49e9f47e
https://github.com/llvm/llvm-project/commit/9ab3e3312ddd07eefd009eca4fe4d14a49e9f47e
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Transforms/IPO/AlwaysInliner.cpp
M llvm/lib/Transforms/IPO/BarrierNoopPass.cpp
M llvm/lib/Transforms/IPO/DeadArgumentElimination.cpp
M llvm/lib/Transforms/IPO/GlobalDCE.cpp
M llvm/lib/Transforms/IPO/IPO.cpp
M llvm/lib/Transforms/IPO/LoopExtractor.cpp
M llvm/tools/llc/llc.cpp
Log Message:
-----------
Revert "[NFC][LLVM][IPO] Remove pass initialization from pass constructors" (#180571)
Reverts llvm/llvm-project#180154
It seems to cause llc build failures, likely due to missing `ipo`
dependency.
Commit: d34d19d987f46c98c03dfdd059976469faadb402
https://github.com/llvm/llvm-project/commit/d34d19d987f46c98c03dfdd059976469faadb402
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
Log Message:
-----------
[NFC] [FlowSensitive] [StatusOr] Add tests for pointer receivers
Reviewers: jvoung
Reviewed By: jvoung
Pull Request: https://github.com/llvm/llvm-project/pull/180079
Commit: bc884a0feab579ef56cf1faa0a5b1df9023304e2
https://github.com/llvm/llvm-project/commit/bc884a0feab579ef56cf1faa0a5b1df9023304e2
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
Log Message:
-----------
[NFC] [FlowSensitive] [StatusOr] Add test for StatusOr nested in optional
Reviewers: jvoung
Reviewed By: jvoung
Pull Request: https://github.com/llvm/llvm-project/pull/180082
Commit: 839676bef18649adacb3de8b44d4f596aaa0da58
https://github.com/llvm/llvm-project/commit/839676bef18649adacb3de8b44d4f596aaa0da58
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M compiler-rt/lib/asan/asan_allocator.cpp
M compiler-rt/lib/asan/asan_allocator.h
M compiler-rt/lib/asan/asan_malloc_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_allocator.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_allocator_dlsym.h
M compiler-rt/lib/sanitizer_common/sanitizer_allocator_internal.h
A compiler-rt/test/asan/TestCases/AIX/vec_malloc_calloc.cpp
Log Message:
-----------
[asan][AIX] Add vec_malloc and vec_calloc interceptors (#175584)
On AIX, when both the `__VEC__` and `_ALL_SOURCE` macros are defined
(they are defined by default), the malloc and calloc system calls are
mapped to vec_malloc and vec_calloc respectively, so we need the
following vec_malloc and vec_calloc interceptors.
Issue: #138916
Commit: f7e2e4d2175e4517b304bd40caa5c82701b4c013
https://github.com/llvm/llvm-project/commit/f7e2e4d2175e4517b304bd40caa5c82701b4c013
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
Log Message:
-----------
[NFC] [FlowSensitive] [StatusOr] Add test reassigning variable in loop
Reviewers: jvoung
Reviewed By: jvoung
Pull Request: https://github.com/llvm/llvm-project/pull/180091
Commit: 352932c1b4950cff324e4bdb41e89b9cf3863797
https://github.com/llvm/llvm-project/commit/352932c1b4950cff324e4bdb41e89b9cf3863797
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M lldb/include/lldb/Host/windows/ProcessLauncherWindows.h
M lldb/source/Host/windows/ProcessLauncherWindows.cpp
Log Message:
-----------
[NFC][lldb][windows] extract the UpdateProcThreadAttribute logic (#180565)
This NFC patch extracts the `UpdateProcThreadAttribute` logic to a
dedicated method be able to reuse it in
https://github.com/llvm/llvm-project/pull/180561.
Commit: 1bfa71743b0803e00a1aad15722cc78771453481
https://github.com/llvm/llvm-project/commit/1bfa71743b0803e00a1aad15722cc78771453481
Author: Koakuma <koachan at protonmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Target/Sparc/CMakeLists.txt
M llvm/lib/Target/Sparc/SparcTargetMachine.cpp
M llvm/lib/Target/Sparc/SparcTargetMachine.h
A llvm/lib/Target/Sparc/SparcTargetTransformInfo.cpp
A llvm/lib/Target/Sparc/SparcTargetTransformInfo.h
A llvm/test/Transforms/LoopIdiom/Sparc/lit.local.cfg
A llvm/test/Transforms/LoopIdiom/Sparc/popcnt.ll
Log Message:
-----------
[SPARC] Add TTI implementation for getPopcntSupport (#178843)
This is to inform the middle-end transform passes about the capabilities
of the codegen backend.
This should solve the issue where popcount loops not gets converted
properly to `popc`, even if it's available
(https://github.com/llvm/llvm-project/issues/171969).
Commit: cd47ae9f8ff9afa46209806e94bfadb0056049c5
https://github.com/llvm/llvm-project/commit/cd47ae9f8ff9afa46209806e94bfadb0056049c5
Author: Marina Taylor <marina_taylor at apple.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M compiler-rt/test/profile/instrprof-binary-correlate.c
M llvm/include/llvm/ProfileData/InstrProfCorrelator.h
M llvm/lib/ProfileData/InstrProfCorrelator.cpp
Log Message:
-----------
[Profile] Enable binary profile correlation for Mach-O binaries (#179937)
The existing ELF/COFF correlation code mostly "just works" on Mach-O
files, with one gotcha: on disk, the pointers in `__llvm_covdata` are
stored in an encoded format due to dyld fixup chains. (In memory, they
would normally be fixed up at load time in a running binary, but the
correlator only looks at the on-disk values.)
LLVM's Mach-O reader knows how to decode the format, so this patch walks
the fixup table to create a set of mappings that the correlator can use
to resolve the values.
rdar://168259786
Commit: be711a08b3f4fb8360cb660d6ab2a6816cb4de7d
https://github.com/llvm/llvm-project/commit/be711a08b3f4fb8360cb660d6ab2a6816cb4de7d
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M lldb/source/Host/windows/ProcessLauncherWindows.cpp
Log Message:
-----------
[lldb][windows] remove unneeded DeleteProcThreadAttributeList call (#180579)
Remove an unneeded call to `DeleteProcThreadAttributeList`, which is
already done in the `ProcThreadAttributeList` destructor.
Commit: 1d5884d7cffbee85b695970ee64d3965729f5a74
https://github.com/llvm/llvm-project/commit/1d5884d7cffbee85b695970ee64d3965729f5a74
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/breakpoint-events/Makefile
M lldb/test/API/tools/lldb-dap/breakpoint-events/TestDAP_breakpointEvents.py
M lldb/test/API/tools/lldb-dap/breakpoint-events/foo.cpp
Log Message:
-----------
[lldb-dap] Fix the breakpoint events test. (#180518)
Previously the test was written in a way that may be flaky, fixed with
the following changes.
- The breakpoint are placed on functions and set during the
configuration stage of the protocol.
- Add the rpath to the test binary.
- Check we also hit the breakpoint we set directly using lldb.
Commit: 48f53422fe7f627fcdace90bd7c3c5ee056bc0a6
https://github.com/llvm/llvm-project/commit/48f53422fe7f627fcdace90bd7c3c5ee056bc0a6
Author: Christian Sigg <csigg at google.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/build_defs.bzl
Log Message:
-----------
[bazel] Slight polish after ef68a53.
Commit: 80677dc5e00c16e55dc29fce93867a77467b25ea
https://github.com/llvm/llvm-project/commit/80677dc5e00c16e55dc29fce93867a77467b25ea
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
A clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/lit.cfg.py
Log Message:
-----------
[CIR][NEON] Add lowering support for `vceqzd_s64` (#179779)
Rather than creating a dedicated ClangIR test file, the original test file for
this intrinsic is effectively reused:
* clang/test/CodeGen/AArch64/neon-intrinsics.c
“Effectively” meaning that the corresponding test is moved (rather than
literally reused) to a new file within the original AArch64 builtins test
directory:
* clang/test/CodeGen/AArch64/neon/intrinsics.c
This is necessary to avoid lowering unsupported examples from intrinsics.c with
`-fclangir`. The new file will eventually replace the original one once all
builtins from it can be lowered via ClangIR.
To facilitate test re-use, new LIT "feature" is added so that CIR tests can be
run conditionally, e.g. the following will only run when `CLANG_ENABLE_CIR` is
set:
```C
// RUN: %if cir %{%clang_cc1 ... %}
```
This sort of substitutions are documented in [2].
REFERENCES:
[1] https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:@navigationhierarchiessimdisa=[Neon]&q=vceqzd_s64
[2] https://llvm.org/docs/TestingGuide.html#substitutions
Commit: 74c8891c9afe4bd836ab385f4489b1ede5c28a0e
https://github.com/llvm/llvm-project/commit/74c8891c9afe4bd836ab385f4489b1ede5c28a0e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M lldb/source/Plugins/InstrumentationRuntime/TSan/InstrumentationRuntimeTSan.cpp
M lldb/test/API/functionalities/tsan/thread_leak/TestTsanThreadLeak.py
M lldb/test/API/functionalities/tsan/thread_numbers/TestTsanThreadNumbers.py
Log Message:
-----------
Revert "[lldb] Fix TSan report on Linux (#179115)"
This reverts commit cc7292056683f592c33055bb6456d509201654ec.
This patch causes two tests to unexpectedly pass:
1. lldb-api.functionalities/tsan/cpp_global_location/TestTsanCPPGlobalLocation.py
2. lldb-api.functionalities/tsan/global_location/TestTsanGlobalLocation.py
Reverting to fix premerge. Not fixing forward so someone who is familiar
with LLDB can take a look and make sure those tests now should pass.
Commit: 20d3aa944fb5cdbeb7e855fcd0800abd6d4a7842
https://github.com/llvm/llvm-project/commit/20d3aa944fb5cdbeb7e855fcd0800abd6d4a7842
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Target.h
M lld/ELF/Writer.cpp
Log Message:
-----------
[NFC][ELF] Remove redundant and unused file argument from deleteFallThruJmpInsn (#180540)
This was added in 94317878d826 ("LLD Support for Basic Block Sections")
and was only ever used for getRelocTargetVA. It was always redundant
even back then, as it was always the same as is.file, and so passing it
separately made it confusing and less obvious which file it was
referring to, but 2b5cb1bf628f ("[ELF] getRelocTargetVA: pass Ctx and
Relocation. NFC") removed that one use so it is now completely unused.
Remove it, and if anyone ever finds a need for it, they can just use
is.file like should have been done in the first place.
Commit: d1dc843c18a670ec4fce747b92401faaf95b01ba
https://github.com/llvm/llvm-project/commit/d1dc843c18a670ec4fce747b92401faaf95b01ba
Author: Gheorghe-Teodor Bercea <doru.bercea at amd.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/test/CodeGen/AMDGPU/loop-vector-sink.ll
M llvm/test/CodeGen/AMDGPU/undef-handling-crash-in-ra.ll
Log Message:
-----------
[AMDGPU] Enable sinking of free vector ops that will be folded into their uses (#162580)
Sinking ShuffleVectors / ExtractElement / InsertElement into user blocks
can help enable SDAG combines by providing visibility to the values
instead of emitting CopyTo/FromRegs. The sink IR pass disables sinking
into loops, so this PR extends the CodeGenPrepare target hook
shouldSinkOperands.
Co-authored-by: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: afd53ae84b49a2644f0e76d1aa9001cf6e17e528
https://github.com/llvm/llvm-project/commit/afd53ae84b49a2644f0e76d1aa9001cf6e17e528
Author: Christian Sigg <csigg at google.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Fix layering checks
Commit: 61c24328fcc5a59bec9b98a9471cfb2b87dfe639
https://github.com/llvm/llvm-project/commit/61c24328fcc5a59bec9b98a9471cfb2b87dfe639
Author: Christian Sigg <csigg at google.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Fix llvm reference
Commit: 754fc78d713285855e2a45225ec2b8b4f51e7ff9
https://github.com/llvm/llvm-project/commit/754fc78d713285855e2a45225ec2b8b4f51e7ff9
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Transforms/IPO/ForceFunctionAttrs.cpp
M llvm/test/Transforms/ForcedFunctionAttrs/forced.ll
Log Message:
-----------
[ForceFunctionAttrs] Fix handling of `alwaysinline` and `noinline` attributes. (#180026)
Address
https://github.com/llvm/llvm-project/pull/152365#issuecomment-3198921342
Commit: 87d73f74713039cacf9d174a9d74de0db8eccb8b
https://github.com/llvm/llvm-project/commit/87d73f74713039cacf9d174a9d74de0db8eccb8b
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
A llvm/test/MC/Hexagon/newvalue_jump_ext_imm.s
Log Message:
-----------
[Hexagon] Fix encoding of packets with fixups followed by alignment (#179168)
When a packet containing extended immediates and new-value compare-jump
instructions with fixups was followed by a .p2align directive, we would
incorrectly add nops to the packet. After reshuffling, the fixup offsets
would become invalid, causing corrupted encodings.
Fixes round-trip assembly for patterns like:
{
r18 = ##65536
if (!cmp.gtu(r1,r18.new)) jump:t .L1
}
.p2align 4
Commit: 1d1a34ff3e57ae55fe82acb91b1391a04162556c
https://github.com/llvm/llvm-project/commit/1d1a34ff3e57ae55fe82acb91b1391a04162556c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[TargetLowering] Avoid creating a VTList until we know we need it. NFC (#180599)
Since I was in the area, also use SDValue::getValue() to shorten getting
result 1.
Commit: 55d75d2a1fc10a2975795a4656273b464c6ba3be
https://github.com/llvm/llvm-project/commit/55d75d2a1fc10a2975795a4656273b464c6ba3be
Author: Alex Langford <alangford at apple.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M lldb/source/Commands/Options.td
Log Message:
-----------
[lldb][NFC] Fix typo in memory read help text (#180301)
rdar://168081328
Commit: 62d018b87a161bb2797c1ed03a482ffcdc8b162c
https://github.com/llvm/llvm-project/commit/62d018b87a161bb2797c1ed03a482ffcdc8b162c
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M lld/ELF/Arch/Hexagon.cpp
M lld/test/ELF/hexagon-tls-ie.s
Log Message:
-----------
[lld][Hexagon] Fix R_HEX_TPREL_11_X relocation on duplex instructions (#179860)
findMaskR11() was missing handling for duplex instructions. This caused
incorrect encoding when R_HEX_TPREL_11_X relocations were applied to
duplex instructions with large TLS offsets.
For duplex instructions, the immediate bits are located at positions
20-25 (mask 0x03f00000), not in the standard positions used for
non-duplex instructions.
This fix adds the isDuplex() check to findMaskR11() to return the
correct mask for duplex instruction encodings.
Commit: 2e34fecf02962e4c8477ca88cc5ac9386a0f76bb
https://github.com/llvm/llvm-project/commit/2e34fecf02962e4c8477ca88cc5ac9386a0f76bb
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Transforms/IPO/AlwaysInliner.cpp
M llvm/lib/Transforms/IPO/BarrierNoopPass.cpp
M llvm/lib/Transforms/IPO/DeadArgumentElimination.cpp
M llvm/lib/Transforms/IPO/GlobalDCE.cpp
M llvm/lib/Transforms/IPO/IPO.cpp
M llvm/lib/Transforms/IPO/LoopExtractor.cpp
M llvm/tools/llc/CMakeLists.txt
M llvm/tools/llc/llc.cpp
Log Message:
-----------
[NFC][LLVM][IPO] Remove pass initialization from pass constructors (#180584)
Commit: 8ee6c63f24a1fb7fb0537fee80456d329306af45
https://github.com/llvm/llvm-project/commit/8ee6c63f24a1fb7fb0537fee80456d329306af45
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M flang-rt/lib/runtime/CMakeLists.txt
Log Message:
-----------
[offload][flang-rt] Fix NVPTX runtime build (#180530)
During the check for availability of `strerror_r`, the host include file is used. This doesn't matter for AMDGPU since it actually performs the link step during `check_cxx_symbol_exists`. But for NVPTX, due to `-c`, it doesn't link and then incorrectly assumes that the symbol exists.
For now, removing `io-error.cpp` from the list of GPU sources is the most sensible option since it's unused.
Commit: 8418c4196d5c5a60003b0f19257dfef2ffbe008e
https://github.com/llvm/llvm-project/commit/8418c4196d5c5a60003b0f19257dfef2ffbe008e
Author: GkvJwa <gkvjwa at gmail.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/lib/CodeGen/CGDecl.cpp
M clang/test/CodeGenCXX/exceptions-seh.cpp
Log Message:
-----------
[WinEH] Check object unwinding in seh block only when -eha is used (#180108)
After this [PR](https://github.com/llvm/llvm-project/pull/172287), build
errors may occur even when `/EHa` is not enabled(like use `/EHsc`).
While MSVC performs similar checks whenever exceptions are enabled, LLVM
is more prone to generating invalid code where SEH fails to function
correctly when asyn exceptions(`/EHa`) are not used. Valid SEH code
generation is typically only ensured when `/EHa` are enabled. Therefore,
this patch is designed to perform the check only when `/EHa` is used.
Of course, on Windows, if LLVM doesn't use `/EHa` but uses `/EHsc` or
`/EHs` instead the code within the `__except` block may behave
unexpectedly, it unlike msvc. This is consistent with previous LLVM
versions.
Commit: 4136d3f24896cd666e32ed97ec4191344d5fe898
https://github.com/llvm/llvm-project/commit/4136d3f24896cd666e32ed97ec4191344d5fe898
Author: Alexey Merzlyakov <60094858+AlexeyMerzlyakov at users.noreply.github.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/inline-asm-nop-reg.ll
Log Message:
-----------
[AArch64] Inline asm v0-v31 are scalar when having less than 64-bit capacity (#169930)
If 32-bit (or less) "v0" registers coming from inline asm are treated as
vector ones, codegen might produce incorrect vector<->scalar
conversions. This causes types mismatch assertion failures later during
compile-time. The fix treats 32-bit or less v0-v31 AArch64 registers as
scalar, along with 64-bit ones.
Fixes #153442
Commit: 470c5ca81c2a86715dbb68d6140070d08d0fdf4b
https://github.com/llvm/llvm-project/commit/470c5ca81c2a86715dbb68d6140070d08d0fdf4b
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
Log Message:
-----------
[MLIR][XeGPU] Fix insert_strided_slice op in subgroup distribution (#180604)
The PR modifies the subgroup distribution pass to only sink
insert_strided_slice operation if it becomes the last op before yield.
It avoids sinking insert_strided_slice multiple times and cause
potential issue in worst case.
Commit: cba0e6ad8e888c517133b4128fe3f767d2f86a63
https://github.com/llvm/llvm-project/commit/cba0e6ad8e888c517133b4128fe3f767d2f86a63
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUTypes.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/test/Conversion/AMDGPUToROCDL/gfx1250.mlir
Log Message:
-----------
[mlir][AMDGPU] Change width of LDS barrier count (#180554)
Whoops, turns out I was off by 1 on how many bits are in the counts and
phases ind these new LDS barriers. This commit fixes this.
Co-authored-by: Claude Opus 4.5 <noreply at anthropic.com>
Commit: fbed673f5238f219e43af0f88802d5422a77218b
https://github.com/llvm/llvm-project/commit/fbed673f5238f219e43af0f88802d5422a77218b
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
M mlir/test/Conversion/AMDGPUToROCDL/gfx1250.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[mlir][amdgpu] Update TDM ops to use the new barrier type, improve docs (#180572)
Now that we have an AMDGPU dialect type for the in-LDS barriers that the
tensor data mover can automatically visit, update the definition of the
tensor descriptor operations to use said types and document the behavior
of the barrier.
Commit: 37c3241d23950d73f329cb5bef838d3c396b2c64
https://github.com/llvm/llvm-project/commit/37c3241d23950d73f329cb5bef838d3c396b2c64
Author: HighW4y2H3ll <zhenghaohuu at gmail.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProf.h
Log Message:
-----------
[SPGO] Use std::hash instead of MD5 to avoid run time regression in llvm-profgen (#180581)
https://github.com/llvm/llvm-project/pull/66164 changed the hashing in
`SampleContextFrame` from `std::hash` to `MD5` in a very hot function
(ContextTrieNode::getOrCrateChildContext()) in llvm-profgen. This
creates over 2x run time regression when running llvm-profgen with
csspgo preinliner enabled, since the MD5 computation is tripled
comparing to the Murmur hash in the std library. An llvm-profgen run
time comparison shows follows:
```
$ time llvm-profgen -binary $BINARY--perfscript $SAMPLES --populate-profile-symbol-list --show-density --output=XXX
# MD5 hash
real 105m31.644s
user 104m51.334s
sys 0m35.033s
# std::hash
real 46m0.340s
user 45m17.998s
sys 0m38.420s
```
Can confirm that this patch recovers the run time regression in
llvm-profgen, and the perf testing in our internal services shows
neutral.
Commit: 8f37bf6b10e11b81032a16be711c58dda9fa0d8e
https://github.com/llvm/llvm-project/commit/8f37bf6b10e11b81032a16be711c58dda9fa0d8e
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/test/Sema/format-strings.c
Log Message:
-----------
[Sema] Fix format-strings test on AIX (#180566)
Simplify the conditional compilation and skip the problematic warnings
only on 32-bit Arm.
Commit: 0e7ddf395a12e0201ed0ca7131439c2fd355a72a
https://github.com/llvm/llvm-project/commit/0e7ddf395a12e0201ed0ca7131439c2fd355a72a
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Semantics/OpenMP/local-variables-1.f90
A flang/test/Semantics/OpenMP/local-variables-2.f90
R flang/test/Semantics/OpenMP/local-variables.f90
Log Message:
-----------
[flang][OpenMP] Improve locality check when determining DSA (#180583)
Follow-up to https://github.com/llvm/llvm-project/pull/178739.
The locality check assumed that immediately after the initial symbol
resolution (i.e. prior to the OpenMP code in resolve-directives.cpp),
the scope that owns a given symbol is the scope which owns the symbol's
storage. Turns out that this isn't necessarily true as illustrated by
the included testcase, roughly something like:
```
program main
integer :: j ! host j (storage-owning)
contains
subroutine f
!$omp parallel ! scope that owns j, but j is host-associated
do j = ...
end do
!$omp end parallel
end
end program
```
In such cases, the locality should be checked for the symbol that owns
storage, i.e. a clone of the symbol that is has been privatized or a
symbol that is not host- or use-associated. This is similar to obtaning
the ultimate symbol (i.e. from the end of association chain), except the
chain traversal would stop at a privatized symbol, potentially before
reaching the end.
This fixes a few regressions in the Fujitsu test suite:
Fujitsu/Fortran/0160/Fujitsu-Fortran-0160_0000.test
Fujitsu/Fortran/0160/Fujitsu-Fortran-0160_0012.test
Fujitsu/Fortran/0160/Fujitsu-Fortran-0160_0013.test
Fujitsu/Fortran/0660/Fujitsu-Fortran-0660_0096.test
Fujitsu/Fortran/0660/Fujitsu-Fortran-0660_0097.test
Fujitsu/Fortran/1052/Fujitsu-Fortran-1052_0108.test
Fujitsu/Fortran/1052/Fujitsu-Fortran-1052_0112.test
Commit: 009cad89726673464bc5a2255e072c3b4825f6db
https://github.com/llvm/llvm-project/commit/009cad89726673464bc5a2255e072c3b4825f6db
Author: Rohan Jacob-Rao <rohanjr at google.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/docs/SafeBuffers.rst
Log Message:
-----------
[NFC][Clang][SafeBuffers] Correct naming (sz -> size). (#180629)
Commit: f0ca8fa685c34e8abfd5d9b071f74795b6ae33a6
https://github.com/llvm/llvm-project/commit/f0ca8fa685c34e8abfd5d9b071f74795b6ae33a6
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
Log Message:
-----------
[CI] Add compiler-rt to LLDB runtime dependencies (#180590)
Some LLDB tests will only run if compiler-rt is built. This includes at
least two tsan tests that passed in a PR (#179115) but then failed on
other PRs that included compiler-rt in the build.
Commit: d1ec04dfd40b4ccfaddb897ddc9599ed35f2b563
https://github.com/llvm/llvm-project/commit/d1ec04dfd40b4ccfaddb897ddc9599ed35f2b563
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-inner-latch-successors.ll
M llvm/test/Transforms/LoopVectorize/outer-loop-wide-phis.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_test2.ll
M llvm/test/Transforms/LoopVectorize/vplan-vectorize-inner-loop-reduction.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll
Log Message:
-----------
[VPlan] Simplify single-entry VPWidenPHIRecipe.
Include VPWidenPHIRecipe in phi simplification if there's a single
incoming value.
Commit: e624d5088d57eff4ec0fd1e8c3122541b81e1aa0
https://github.com/llvm/llvm-project/commit/e624d5088d57eff4ec0fd1e8c3122541b81e1aa0
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M .github/workflows/release-tasks.yml
Log Message:
-----------
[Github] Add runs-on to release-tasks.yml
This was failing validation against main and sending everyone emails.
Try adding the fix that was suggested in the workflow run.
Commit: c1059b209aa81bdf52b596b320a10077c0cddeb4
https://github.com/llvm/llvm-project/commit/c1059b209aa81bdf52b596b320a10077c0cddeb4
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M .github/workflows/release-documentation.yml
M .github/workflows/release-tasks.yml
Log Message:
-----------
Revert "workflows/release-task: Use less privileged token for uploading release notes (#180299)"
This reverts commit b6ee085068972a41f3b2735a9f7e3ca48eab0f00.
This reverts commit e624d5088d57eff4ec0fd1e8c3122541b81e1aa0.
This was causing failures like the following:
https://github.com/llvm/llvm-project/actions/runs/21842945533. The
follow up fix is also reverted as it did not actually fix the issue.
Commit: e1d2ff6caf8c1fef15561fbcc275aa93fec4c115
https://github.com/llvm/llvm-project/commit/e1d2ff6caf8c1fef15561fbcc275aa93fec4c115
Author: Steven Perron <stevenperron at google.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/test/CodeGen/SPIRV/hlsl-resources/Sample.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/Sample1D.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/Sample3D.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/SampleBias.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/SampleCmp.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/SampleCmpLevelZero.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/SampleCube.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/SampleErrors.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/SampleErrorsDebug.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/SampleGrad.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/SampleLevel.ll
Log Message:
-----------
[SPIRV] Implement lowering for HLSL Texture2D sampling intrinsics (#179312)
This patch implements the SPIR-V lowering for the following HLSL
intrinsics:
- SampleBias
- SampleGrad
- SampleLevel
- SampleCmp
- SampleCmpLevelZero
It defines the required LLVM intrinsics in 'IntrinsicsDirectX.td' and
'IntrinsicsSPIRV.td'.
It updates 'SPIRVInstructionSelector.cpp' to handle the new intrinsics
and
generates the correct 'OpImageSample*' instructions with the required
operands
(Bias, Grad, Lod, ConstOffset, MinLod, etc.).
CodeGen tests are added to verify the implementation for images with
dimension 1D, 2D, 3D, and Cube.
Assisted-by: Gemini
Commit: a9ea1cfe6ebf63fa523803d9fb7efc09148731bb
https://github.com/llvm/llvm-project/commit/a9ea1cfe6ebf63fa523803d9fb7efc09148731bb
Author: Sam Clegg <sbc at chromium.org>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M lld/test/wasm/data-layout.s
M lld/test/wasm/export-all.s
M lld/test/wasm/mutable-global-exports.s
M lld/wasm/Config.h
M lld/wasm/Driver.cpp
M lld/wasm/Writer.cpp
Log Message:
-----------
[lld][WebAssembly] Add new __rodata_start/__rodata_end symbols (#172102)
This is similar to etext/_etext in the ELF linker. Its useful in
emscripten to know where the RO data data ends and the data begins (even
though the Wasm format itself has no concept of RO data).
See
https://github.com/emscripten-core/emscripten/discussions/25939#discussioncomment-15243731
Commit: 815cf3bf14836031c5c8ad5d3cd9be8720b64981
https://github.com/llvm/llvm-project/commit/815cf3bf14836031c5c8ad5d3cd9be8720b64981
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/include/clang/Lex/PPCallbacks.h
M clang/lib/Frontend/CompilerInstance.cpp
M clang/unittests/Frontend/CompilerInstanceTest.cpp
Log Message:
-----------
[clang][modules] Add single-module-parse-mode callback (#179714)
This PR adds new preprocessor callback that's invoked whenever the
single-module-parse-mode skips over a module import. This will be used
later on from the dependency scanner.
Commit: d69ccf3b34e7ca8fa42e4c078f026b6e898e2c90
https://github.com/llvm/llvm-project/commit/d69ccf3b34e7ca8fa42e4c078f026b6e898e2c90
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-int.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-merge.ll
Log Message:
-----------
[RISCV] Combine shuffle of shuffles to a single shuffle (#178095)
Compressing to a single shuffle doesn't remove any information and the backend can better apply specific optimizations to a single shuffle.
Addresses #176218.
---------
Co-authored-by: Luke Lau <luke_lau at igalia.com>
Commit: bf91c0969b55e40e75ed93a74a5672d95262ba79
https://github.com/llvm/llvm-project/commit/bf91c0969b55e40e75ed93a74a5672d95262ba79
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M libcxx/utils/ci/BOT_OWNERS.txt
Log Message:
-----------
[libc++] Add myself as a FreeBSD point of contact
Commit: ccd93180e0f8067cd43551adaa4296b64ca43992
https://github.com/llvm/llvm-project/commit/ccd93180e0f8067cd43551adaa4296b64ca43992
Author: Jhalak Patel <jhalakpatel at outlook.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/Utils/StaticValueUtils.h
M mlir/lib/Dialect/Utils/StaticValueUtils.cpp
M mlir/test/Dialect/SCF/trip_count.mlir
Log Message:
-----------
[MLIR][Utils] Fix overflow in constantTripCount for narrow types (#179985)
Extend operands when computing ub - lb to avoid overflow in signed
arithmetic. E.g., i8: ub=127, lb=-128 yields 255, which overflows
without extension.
Commit: 2b9a1aee5aa1c032e030cdeaea3e912275f3b819
https://github.com/llvm/llvm-project/commit/2b9a1aee5aa1c032e030cdeaea3e912275f3b819
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-with-invariant-stores.ll
M llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
Log Message:
-----------
[LV] Add additional tests for reductions with intermediate stores. (NFC)
Adds missing test coverage for reductions with intermediate stores,
including partial reductions with intermediate stores, as well as
chained min/max reductions with intermediate stores.
Commit: d53272fad40a4602609a74a3b4da1519bce008bf
https://github.com/llvm/llvm-project/commit/d53272fad40a4602609a74a3b4da1519bce008bf
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M libc/config/baremetal/config.json
M libc/src/__support/str_to_float.h
Log Message:
-----------
[libc] Disable Clinger fast path for baremetal (#180598)
Clinger fast path bloats baremetal targets which are constrained in
binary size. Disabling it for baremetal libc builds.
Commit: 5d57c40043be8b1cb73466d3f53193025f26d717
https://github.com/llvm/llvm-project/commit/5d57c40043be8b1cb73466d3f53193025f26d717
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/driver.bzl
Log Message:
-----------
[bazel] Fix multicall tool invocation disambiguation (#180607)
The code seems to have considered the potential problem but did not
quite succeed in solving it ;)
Commit: 06cffa5ee37749b758b4c306f4c2c7e70f6ef962
https://github.com/llvm/llvm-project/commit/06cffa5ee37749b758b4c306f4c2c7e70f6ef962
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/vplan-iv-transforms.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-outer-loop.ll
M llvm/test/Transforms/LoopVectorize/vplan-unused-interleave-group.ll
M llvm/test/Transforms/LoopVectorize/vplan-widen-struct-return.ll
Log Message:
-----------
[VPlan] Auto-generate CHECKs in some VPlan printing tests.
Use new UTC support to re-generate check lines.
Commit: 5339ad943a5dafd4d7df29bafb50511947a23a6f
https://github.com/llvm/llvm-project/commit/5339ad943a5dafd4d7df29bafb50511947a23a6f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/test/MC/RISCV/rv64p-valid.s
Log Message:
-----------
[RISCV] Add missing instruction tests to rv64p-valid.s. NFC (#180316)
An AI told me these were missing and helped me add them.
Commit: 0c94a1814f41495aef10735a5af2e10aa8d6affe
https://github.com/llvm/llvm-project/commit/0c94a1814f41495aef10735a5af2e10aa8d6affe
Author: HighW4y2H3ll <zhenghaohuu at gmail.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Bazel] NFC refactor out redundant is_x86_64_non_windows config (#180296)
The logic of `is_x86_64_non_windows` looks unnecessarily complicated and
is only used at one site... clean up the unused targets and refactor
x86_64 BLAKE3 asm sources into a separate filegroup. And then
`is_x86_64_non_windows` can be put inside a default condition.
Commit: 68d4175cc15ecea2be8b778066824dc5a90fb1a3
https://github.com/llvm/llvm-project/commit/68d4175cc15ecea2be8b778066824dc5a90fb1a3
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/find-last-sink-based-iv-expr.ll
Log Message:
-----------
[LV] Add FindLast tests where IV-based expression could be sunk. (NFC)
Add set of FindLast tests where the selected expression is based on an
IV and could be sunk.
Commit: 853a39043e009cb35c6189818f883470742de9d7
https://github.com/llvm/llvm-project/commit/853a39043e009cb35c6189818f883470742de9d7
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64CallingConvention.td
M llvm/test/CodeGen/AArch64/cfguard-checks.ll
Log Message:
-----------
[win][aarch64] The Windows Control Flow Guard Check function also preserves X15 (#179738)
The target function to be checked by the Control Flow Guard Check
function is stored in `X15` on AArch64. This register is guaranteed to
be preserved by that function (on success), thus after it returns `X15`
can be used to branch to the target function instead of having to load
it from another register or the stack.
Commit: 19705bd7fc60e9d6756ea375714d687c138949ea
https://github.com/llvm/llvm-project/commit/19705bd7fc60e9d6756ea375714d687c138949ea
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/test/CodeGen/SPIRV/extensions/SPV_ALTERA_arbitrary_precision_integers/apint-constant.ll
Log Message:
-----------
[SPIR-V] Emit ceil(Bitwidth / 32) words during OpConstant creation (#180218)
Fixes error of handing constant integers with width in (64; 128) range.
Found during review of
https://github.com/llvm/llvm-project/pull/180182
Commit: 19d6950739a45f17d06ba55034450596625e43d3
https://github.com/llvm/llvm-project/commit/19d6950739a45f17d06ba55034450596625e43d3
Author: Petter Berntsson <petter.berntsson at arm.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M libc/docs/headers/math/index.rst
M libc/docs/headers/time.rst
Log Message:
-----------
[libc][docs] Fix stale entrypoints links and time.h table duplication (#180347)
Update stale links and remove duplication in table.
Commit: 55d6c6ff5802efcfc2ab9643316d9670eb29e790
https://github.com/llvm/llvm-project/commit/55d6c6ff5802efcfc2ab9643316d9670eb29e790
Author: Björn Svensson <bjorn.a.svensson at est.tech>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/fuzzer.c
M clang/test/Driver/sanitizer-ld.c
Log Message:
-----------
[clang][driver] Correcting arguments when using `libFuzzer` with `-shared-libsan` (#164842)
This PR contains two commits:
- Add required dependencies when using `-shared-libsan` and fuzzer.
Since libFuzzer is a static library we need to make sure that we add its
dependencies when building with `-shared-libsan`. E.g libFuzzer uses
`ceilf()` from `libm.so` when building on Gnu toolchain.
Previously, the resulting command did not contain the required link
libraries, giving build failures
(only a static sanitizer runtime would trigger the call to
`linkSanitizerRuntimeDeps`).
- Correcting dependency order when using fuzzer.
When building using `-shared-libsan` the sanitizer library needs to be
first in link order.
Since the fuzzer requires `-lstdc++` we have to make sure that the
sanitizer library is added before `-lstdc++`.
---------
Signed-off-by: Björn Svensson <bjorn.a.svensson at est.tech>
Commit: 481f248e081bd82b7a26a0b9b7ce8613544cc1a6
https://github.com/llvm/llvm-project/commit/481f248e081bd82b7a26a0b9b7ce8613544cc1a6
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M lldb/include/lldb/Host/HostInfoBase.h
M lldb/include/lldb/Host/macosx/HostInfoMacOSX.h
M lldb/include/lldb/Target/DynamicLoader.h
M lldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOS.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOS.h
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOSXDYLD.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOSXDYLD.h
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinDevice.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinDevice.h
M lldb/source/Plugins/Platform/MacOSX/PlatformMacOSX.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteDarwinDevice.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/test/API/commands/platform/basic/TestPlatformCommand.py
Log Message:
-----------
[lldb] Get shared cache path from inferior, open (#180323)
Get the shared cache filepath and uuid that the inferior process is
using from debugserver, try to open that shared cache on the lldb host
mac and if the UUID matches, index all of the binaries in that shared
cache. When looking for binaries loaded in the process, get them from
the already-indexed shared cache.
Every time a binary is loaded, PlatformMacOSX may query the shared cache
filepath and uuid from the Process, and pass that to
HostInfo::GetSharedCacheImageInfo() if available (else fall back to the
old HostInfo::GetSharedCacheImageInfo method which only looks at lldb's
own shared cache), to get the file being requested.
ProcessGDBRemote caches the shared cache filepath and uuid from the
inferior, once it has a non-zero UUID. I added a lock for this ivar
specifically, so I don't have 20 threads all asking for the shared cache
information from debugserver and updating the cached answer. If we never
get back a non-zero UUID shared cache reply, we will re-query at every
library loaded notification. debugserver has been providing the shared
cache UUID since 2013, although I only added the shared cache filepath
field last November.
Note that a process will not report its shared cache filepath or uuid at
initial launch. As dyld gets a chance to execute a bit, it will start
returning binaries -- it will be available at the point when libraries
start loading. (it won't be available yet when the binary & dyld are the
only two binaries loaded in the process)
I tested this by disabling lldb's scan of its own shared cache
pre-execution -- only loading the system shared cache when the inferior
process reports that it is using that. I got 6-7 additional testsuite
failures running lldb like that, because no system binaries were loaded
before exeuction start, and the tests assumed they would be.
rdar://148939795
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: cfbb9a66ae92aa477c6ea38b006d64ec4b92170d
https://github.com/llvm/llvm-project/commit/cfbb9a66ae92aa477c6ea38b006d64ec4b92170d
Author: Andrew Lazarev <alazarev at google.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/switch-icmp.ll
Log Message:
-----------
Revert "[msan] Switch switch() from strict handling to (icmp eq)-style handling" (#180636)
Reverts llvm/llvm-project#179851
Breaks https://lab.llvm.org/buildbot/#/builders/164/builds/18551 and
https://lab.llvm.org/buildbot/#/builders/94/builds/15188
Commit: 48dffbc654f2a606025f4b14c9b789c99f8188ae
https://github.com/llvm/llvm-project/commit/48dffbc654f2a606025f4b14c9b789c99f8188ae
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M .github/workflows/release-documentation.yml
M .github/workflows/release-tasks.yml
Log Message:
-----------
workflows/release-task: Use less privileged token for uploading release notes (#180299) (#180650)
We were using one token for both pushing to the llvmbot fork and for
creating a pull request against the www-releases repository, since the
fork and the repository have different owners, we were using a classic
access token which has very coarse-grained permissions. By using two
separate tokens, we limit the permissions to just what we need to do the
task.
This is a re-commit of b6ee085068972a41f3b2735a9f7e3ca48eab0f00 minus
the environment changes which were causing the workflow to fail.
Commit: 8fc59bc0e3b7bda5a069a2e93a0367f97eebda2b
https://github.com/llvm/llvm-project/commit/8fc59bc0e3b7bda5a069a2e93a0367f97eebda2b
Author: Lleu Yang <hello at megakite.icu>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.h
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/test/CodeGen/SPIRV/AtomicCompareExchange.ll
A llvm/test/CodeGen/SPIRV/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
Log Message:
-----------
[SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (#179114)
This adds atomicrmw `uinc_wrap` and `udec_wrap` operations support for
SPIR-V. Since SPIR-V doesn't provide dedicated instructions for those
two operations, we have to use the `AtomicExpand` pass to expand the
operations into CAS forms.
Closes #177204.
Commit: b970a376f4a90bafc9ee2a18ca7a2ebe4e1d2722
https://github.com/llvm/llvm-project/commit/b970a376f4a90bafc9ee2a18ca7a2ebe4e1d2722
Author: Peter Rong <peterrong96 at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/test/tools/llvm-dwarfdump/X86/simplified-template-names.s
Log Message:
-----------
[DebugInfo] Update test to sync with cross-project-tests (#180655)
The test was manually generated and out-of-sync with
`cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/Inputs/simplified_template_names.cpp`.
We update the test such that:
1. Automate the test generation process by using
`llvm/utils/update_test_body.py`
2. Remove host machine info when updating the tests
Predecessor of #178986, the PR was split per reviewer's request, since
that change disturbed this test a lot.
Commit: 6bce3fc1a9be3d5e2735e0e67dfdf32e47743ca5
https://github.com/llvm/llvm-project/commit/6bce3fc1a9be3d5e2735e0e67dfdf32e47743ca5
Author: Jim Lin <jim at andestech.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/test/MC/RISCV/rvv/invalid-alt.s
M llvm/test/MC/RISCV/rvv/vsetvl-alt.s
Log Message:
-----------
[RISCV] Generate 8alt/16alt version error message for zvfofp8min (#180450)
Commit: 0aad6b0657972ed10f30f3497277a9e6badc8b1c
https://github.com/llvm/llvm-project/commit/0aad6b0657972ed10f30f3497277a9e6badc8b1c
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/abseil/unchecked-statusor-access.rst
Log Message:
-----------
[NFC] [clang-tidy] [doc] Don't use unicode character in doc (#180641)
Commit: 9898082bd358e1706f7703291bdec6caae12993a
https://github.com/llvm/llvm-project/commit/9898082bd358e1706f7703291bdec6caae12993a
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
Log Message:
-----------
[AMDGPU][SIInsertWaitcnt][NFC] Access Waitcnt elements using InstCounterType (#178345)
This patch introduces `get(T)` and `set(T, Val)` functions for Waitcnt
and removes getCounterRef() and getWait(). For this to work we also need
to move InstrCounterType to AMDGPUBaseInfo.h.
Please note that the member variables are still public to keep this
patch small.
They will be replaced in the follow-up patch.
Commit: 1de721c414407f4b92d3e2458ce9ca38563cef9c
https://github.com/llvm/llvm-project/commit/1de721c414407f4b92d3e2458ce9ca38563cef9c
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
A llvm/test/Transforms/LowerTypeTests/cond-loop.ll
Log Message:
-----------
LowerTypeTests: Optimize two-phase check used by llvm.cond.loop.
When a type test has two phases and is used by llvm.cond.loop to
implement a conditional trap, it is more efficient for two infinite
loops to be generated. Arrange for this by having the pass detect the
typical IR pattern used for conditional CFI traps and generate the second
llvm.cond.loop if found.
Part of this RFC:
https://discourse.llvm.org/t/rfc-optimizing-conditional-traps/89456
Reviewers: fmayer, vitalybuka
Reviewed By: vitalybuka
Pull Request: https://github.com/llvm/llvm-project/pull/177687
Commit: dfc8fa80c9fb24c51c3dc1af7660657ece9aeb27
https://github.com/llvm/llvm-project/commit/dfc8fa80c9fb24c51c3dc1af7660657ece9aeb27
Author: Twice <twice at apache.org>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M mlir/include/mlir-c/ExtensibleDialect.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/CAPI/IR/ExtensibleDialect.cpp
Log Message:
-----------
[MLIR][Python] Refine trait support in MLIR Python (#180550)
This PR is mainly to address review suggestions in #179705.
Commit: 8c0e0d732f03c50738ba48501c51767643464550
https://github.com/llvm/llvm-project/commit/8c0e0d732f03c50738ba48501c51767643464550
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M mlir/test/Conversion/AMDGPUToROCDL/amdgpu-to-rocdl.mlir
M mlir/test/Conversion/AMDGPUToROCDL/gfx1250.mlir
M mlir/test/Conversion/AMDGPUToROCDL/load_lds-gfx950.mlir
M mlir/test/Conversion/AMDGPUToROCDL/load_lds.mlir
Log Message:
-----------
[mlir][AMDGPU] Make AMDGPUToROCDL conversion tests use real address spaces (#180661)
Since #171876, -amdgpu-to-rocdl (the pass) is now set up to handle
address spaces like `#gpu.address_space<global>`. Update the tests
accordingly.
Commit: 8d8864237b993039ccbc8d0133b583e894922416
https://github.com/llvm/llvm-project/commit/8d8864237b993039ccbc8d0133b583e894922416
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fsqrt.mir
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
Log Message:
-----------
AMDGPU/GlobalISel: Regbanklegalize rules for G_FSQRT (#179817)
Add S16 rules for G_FSQRT. S32 and S64 are expanded by the legalizer.
Commit: 776297b0a6daf951acd3b31ece1911b8e40eb405
https://github.com/llvm/llvm-project/commit/776297b0a6daf951acd3b31ece1911b8e40eb405
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
Log Message:
-----------
[RISCV] Rename FeatureEnableSelectOptimize to TuneEnableSelectOptimize (#180496)
It should be a tune feature just like others.
Commit: 20bf8e0684836c48f3a5f58cafd630239c1c9385
https://github.com/llvm/llvm-project/commit/20bf8e0684836c48f3a5f58cafd630239c1c9385
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/ExceptionEscapeCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/ExceptionEscapeCheck.h
M clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.cpp
M clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/exception-escape.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/exception-escape-treat-functions-without-specification-as-throwing.cpp
Log Message:
-----------
[clang-tidy] Add options to throw unannotated functions in `bugprone-exception-escape` (#168324)
As of AI Usage: Gemini 3 was used for rephrasing the documentation.
Closes https://github.com/llvm/llvm-project/issues/164795
---------
Co-authored-by: EugeneZelenko <eugene.zelenko at gmail.com>
Co-authored-by: Baranov Victor <bar.victor.2002 at gmail.com>
Commit: 9eca0a3b8bf2068497f1d6345ea290f43c663358
https://github.com/llvm/llvm-project/commit/9eca0a3b8bf2068497f1d6345ea290f43c663358
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/test/Dialect/GPU/invalid.mlir
Log Message:
-----------
[mlir][gpu] Validate argument count in gpu.launch parser (#180388)
This PR adds validation in the `gpu.launch` parser to ensure the launch
configuration provides exactly 3 arguments. Emit a parser error when the
argument count is not 3. Fixes #176426.
Commit: d6ae568d58b31b1cdd0a5f8c84955330a35c3a38
https://github.com/llvm/llvm-project/commit/d6ae568d58b31b1cdd0a5f8c84955330a35c3a38
Author: jeffreytan81 <jeffreytan at meta.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M cross-project-tests/debuginfo-tests/llvm-prettyprinters/lldb/CMakeLists.txt
A cross-project-tests/debuginfo-tests/llvm-prettyprinters/lldb/expected.cpp
A cross-project-tests/debuginfo-tests/llvm-prettyprinters/lldb/expected.test
M cross-project-tests/lit.cfg.py
M llvm/utils/lldbDataFormatters.py
Log Message:
-----------
Fix LLDB data formatter for llvm::Expected<T> with non-reference types (#179294)
This patch fixes LLDB data formatter support for llvm::Expected<T> with
the following changes:
llvm/utils/lldbDataFormatters.py: Fix ExpectedSynthProvider to handle
non-templated storage types (e.g., int, int*). Previously the formatter
only worked with templated storage types like std::reference_wrapper<T>.
cross-project-tests/lit.cfg.py:
Fix get_lldb_version_string() to use locally-built LLDB on non-Darwin
platforms instead of system LLDB
Fix minimum version from "1900" to "19.0.0" (typo in original code)
New test files: Added expected.cpp and expected.test to test the
formatter with Expected<int> and Expected<int*>.
---------
Co-authored-by: Jeffrey Tan <jeffreytan at fb.com>
Commit: 1c503e270a4b772713c45b21fc854949ae6db66d
https://github.com/llvm/llvm-project/commit/1c503e270a4b772713c45b21fc854949ae6db66d
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M libc/config/baremetal/config.json
Log Message:
-----------
[libc] Size optimized defaults for baremetal (#180642)
Disabling options that bloat typical size constrained baremetal targets
and in general not common in these targets. These configuration changes
reduce binary size significantly in our 32 bit ARM target experiments.
Commit: 1c4a98f7687f328d9c0efb367758b0c046d5fb62
https://github.com/llvm/llvm-project/commit/1c4a98f7687f328d9c0efb367758b0c046d5fb62
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/complex.cpp
Log Message:
-----------
[clang][bytecode] Fix discarded builtin_complex (#180539)
This is the only builtin that returns a non-primitive type I think.
Commit: b9659ded76962712a1e984755c2eb54886dfaa83
https://github.com/llvm/llvm-project/commit/b9659ded76962712a1e984755c2eb54886dfaa83
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Sema/builtins-elementwise-math.c
Log Message:
-----------
[clang] Fix checkMathBuiltinElementType SignedIntOrFloatTy checks (#180528)
The previous check was way too loose and let everything except unsigned
integer types through.
See e.g. https://godbolt.org/z/3qY8EbK56
Commit: fdd9555fc015b0be790226c68391537d12581a82
https://github.com/llvm/llvm-project/commit/fdd9555fc015b0be790226c68391537d12581a82
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/complex.cpp
Log Message:
-----------
[clang][bytecode] Fix discarded Mulc/DivC opcodes (#180537)
We need to pop the pointer in that case.
Commit: 9cd29a8ba17402c6e8e4b051cc96bdf47886581c
https://github.com/llvm/llvm-project/commit/9cd29a8ba17402c6e8e4b051cc96bdf47886581c
Author: Peter Rong <peterrong96 at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/Inputs/simplified_template_names.cpp
M llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h
M llvm/test/tools/llvm-dwarfdump/X86/simplified-template-names.s
Log Message:
-----------
[DebugInfo] Fix an assertion in DWARFTypePrinter (#178986)
A `DW_TAG_ptr_to_member_type` has no `RawName` and would trigger an
assertion.
https://github.com/llvm/llvm-project/blob/7e48b14d1e9f83b5e4e51d3e44a0fc762f9d05eb/llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h#L497-L502
The assertion is mostly benign since it will be compared with other
strings and return false.
https://github.com/llvm/llvm-project/blob/7e48b14d1e9f83b5e4e51d3e44a0fc762f9d05eb/llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h#L505-L510
But this is blocking our assertion builds.
We should escape `DW_TAG_ptr_to_member_type` as well when looking for
type names.
Adding a test to demonstrate how the assertion could be triggered, and
how we fixed it.
Depends on https://github.com/llvm/llvm-project/pull/180655
[Assisted-by](https://t.ly/Dkjjk): [Claude Opus
4.5](https://www.anthropic.com/news/claude-opus-4-5)
Commit: a1acc4ab9fa7bef5684d126ab0c29b035402d664
https://github.com/llvm/llvm-project/commit/a1acc4ab9fa7bef5684d126ab0c29b035402d664
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/memberpointers.cpp
Log Message:
-----------
[clang][bytecode] Fix discarded addrof operators... (#180534)
... of member pointers.
Commit: f33ea53451f01bd82cbe7bc7f795f5b4ba731f2b
https://github.com/llvm/llvm-project/commit/f33ea53451f01bd82cbe7bc7f795f5b4ba731f2b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/condops.ll
M llvm/test/CodeGen/RISCV/xaluo.ll
Log Message:
-----------
[RISCV] Remove redundant czero in multi-word comparisons (#180485)
When comparing multi-word integers with Zicond, we generate:
(or (czero_eqz (lo1 < lo2), (hi1 == hi2)),
(czero_nez (hi1 < hi2), (hi1 == hi2)))
The czero_nez is redundant because when hi1 == hi2 is true, hi1 < hi2 is
already 0. This patch adds a DAG combine to recognize:
czero_nez (setcc X, Y, CC), (setcc X, Y, eq) -> (setcc X, Y, CC)
when CC is a strict inequality (lt, gt, ult, ugt).
This saves one instruction in 128-bit comparisons on RV64 with Zicond.
Note the czero_nez becomes a czero.eqz in the final assembly because the
seteq is replaced by an xor that produces 0 when the values are equal.
Part of #179584
Assisted-by: claude
Commit: 6dc9a484fde9378d466b5626687197924f66115c
https://github.com/llvm/llvm-project/commit/6dc9a484fde9378d466b5626687197924f66115c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/invalid.cpp
Log Message:
-----------
[clang][bytecode] Handle missing target label in break statement (#180532)
Happens in error cases.
Commit: 2302110838463736b0512b4d7fbd94c4694f66d0
https://github.com/llvm/llvm-project/commit/2302110838463736b0512b4d7fbd94c4694f66d0
Author: owenca <owenpiano at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Don't annotate C compound literal r_paren (#180436)
Fixes #180179
Commit: 461e43371855d4c4ce84931270db5ccd1ccd453b
https://github.com/llvm/llvm-project/commit/461e43371855d4c4ce84931270db5ccd1ccd453b
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/intap.cpp
Log Message:
-----------
[clang][bytecode] Don't use trunc() to increase APInt bitWidth (#180536)
`FieldDecl::getBitWidthValue()` can return a value higher than the type
size of the bit field. We need to account for that.
Commit: a56b877056ab5ad9e599d86d48c3189350e5b2a2
https://github.com/llvm/llvm-project/commit/a56b877056ab5ad9e599d86d48c3189350e5b2a2
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/CMakeLists.txt
M llvm/lib/Target/X86/X86.h
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
A llvm/lib/Target/X86/X86GlobalBaseReg.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86PassRegistry.def
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
Log Message:
-----------
[NewPM] Port x86-global-base-reg (#180119)
Had to move X86GlobalBaseRegPass to its own file like in
https://github.com/llvm/llvm-project/pull/179864
No test coverage added for now as there are no MIR->MIR tests exercising
this pass and we do not have enough ported to run any end to end tests.
This is a redo of https://github.com/llvm/llvm-project/pull/180070
Commit: 1a9c61f004636c76b7016796a42776ae1c0bc048
https://github.com/llvm/llvm-project/commit/1a9c61f004636c76b7016796a42776ae1c0bc048
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-02-09 (Mon, 09 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
[AMDGPU] Non convergent instruction does not depend on EXEC. NFCI. (#179821)
Commit: 33fa987357c291fd48520e5562c630db94ed2043
https://github.com/llvm/llvm-project/commit/33fa987357c291fd48520e5562c630db94ed2043
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/AArch64.cpp
Log Message:
-----------
[Clang][AArch64] Extract get target CPU by triple (NFC) (#179097)
This patch refactors the AArch64 target resolution in Clang driver,
extracting a new static local function called
`getAArch64TargetCPUByTriple` to reduce redundant checks at runtime.
Previously, `getAArch64TargetFeatures` would redundantly double-check
`march` and `mcpu` arguments. Also removes some uninformative comments
on the way.
Commit: e1651717324e8e17052380c55d8755305552ac9b
https://github.com/llvm/llvm-project/commit/e1651717324e8e17052380c55d8755305552ac9b
Author: Chia-hung Duan <chiahungduan at google.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M mlir/lib/Dialect/Transform/IR/TransformDialect.cpp
M mlir/lib/IR/Verifier.cpp
M mlir/test/Dialect/GPU/invalid.mlir
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/Transform/ops-invalid.mlir
Log Message:
-----------
[mlir] Fix the order of operation attribute verification
The verifiers of these attributes are supposed to verify additional
constraints which usually require the invariants, nested ops to be
verified first. Move it to the end of verification so that we don't
operate on malformed operations.
Commit: 2c1d15a4b59d0c5827993ae9e88c18ad3821f7c7
https://github.com/llvm/llvm-project/commit/2c1d15a4b59d0c5827993ae9e88c18ad3821f7c7
Author: Chia-hung Duan <chiahungduan at google.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M mlir/lib/Dialect/Transform/IR/TransformDialect.cpp
M mlir/lib/IR/Verifier.cpp
M mlir/test/Dialect/GPU/invalid.mlir
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/Transform/ops-invalid.mlir
Log Message:
-----------
Revert "[mlir] Fix the order of operation attribute verification"
This reverts commit e1651717324e8e17052380c55d8755305552ac9b.
This was submitted by accident.
Commit: 1cf62af0ee63cc63ce7c8406634df4bca9bec835
https://github.com/llvm/llvm-project/commit/1cf62af0ee63cc63ce7c8406634df4bca9bec835
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/new-delete.cpp
Log Message:
-----------
[clang][bytecode] Don't call InterpFrame::getThis() on the bottom frame (#180682)
This happens when we're in checkingPotentialConstantExpression() and we
try to evaluate a delete expression.
Commit: 0f8d8dc5b90eb3f9cdf32549f6fa7ced6f6d3252
https://github.com/llvm/llvm-project/commit/0f8d8dc5b90eb3f9cdf32549f6fa7ced6f6d3252
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/complex.cpp
Log Message:
-----------
[clang][bytecode] Reject composite copies on primitive pointers (#180683)
This should fail.
Commit: a1da10689c8bb90288bd5f10ce3af70a92f5da74
https://github.com/llvm/llvm-project/commit/a1da10689c8bb90288bd5f10ce3af70a92f5da74
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Fix non-initializing `__builtin_shufflevector` (#180691)
Create a local temporary we can use as destination.
Commit: 8c5f31b365dfc5ad9e8aa5756159961421a2eae3
https://github.com/llvm/llvm-project/commit/8c5f31b365dfc5ad9e8aa5756159961421a2eae3
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/atomic-rmw-discard.ll
M llvm/test/CodeGen/RISCV/selectopt.ll
Log Message:
-----------
[RISCV] Enable select optimization by default (#178394)
And we add `TuneEnableSelectOptimize` to:
* `generic`
* `generic-ooo`
* `sifive-p550`
* `spacemit-x60`
Commit: 8ab034fa1531b5b45bab7d582155d395ff28b043
https://github.com/llvm/llvm-project/commit/8ab034fa1531b5b45bab7d582155d395ff28b043
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/invalid.cpp
Log Message:
-----------
[clang][bytecode] Handle invalid UnaryExprOrTypeTraitExprs (#180692)
Commit: 7f1907cea06d0de861e94b607535fa6488641c15
https://github.com/llvm/llvm-project/commit/7f1907cea06d0de861e94b607535fa6488641c15
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Opcodes.td
M clang/test/AST/ByteCode/new-delete.cpp
Log Message:
-----------
[clang][bytecode] Allow bool sizes in array new expressions (#180696)
Looks like this is a thing, so allow them.
Commit: 24405f070f3bedce4698777a48a4eaf047f75c90
https://github.com/llvm/llvm-project/commit/24405f070f3bedce4698777a48a4eaf047f75c90
Author: Diana Picus <Diana-Magda.Picus at amd.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll
A llvm/test/CodeGen/AMDGPU/intrinsic-amdgcn-s-alloc-vgpr.ll
Log Message:
-----------
[AMDGPU] Add intrinsic exposing s_alloc_vgpr (#163951)
Make it possible to use `s_alloc_vgpr` at the IR level. This is a huge
footgun and use for anything other than compiler internal purposes is
heavily discouraged. The calling code must make sure that it does not
allocate fewer VGPRs than necessary - the intrinsic is NOT a request to
the backend to limit the number of VGPRs it uses (in essence it's not so
different from what we do with the dynamic VGPR flags of the
`amdgcn.cs.chain` intrinsic, it just makes it possible to use this
functionality in other scenarios).
Commit: 23987694127324951469a2134d3e5f56fa072ff9
https://github.com/llvm/llvm-project/commit/23987694127324951469a2134d3e5f56fa072ff9
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/include/clang/Analysis/Scalable/TUSummary/EntitySummary.h
M clang/lib/Analysis/Scalable/CMakeLists.txt
A clang/lib/Analysis/Scalable/TUSummary/EntitySummary.cpp
M clang/unittests/Analysis/Scalable/Registries/FancyAnalysisData.cpp
Log Message:
-----------
[clang][ssaf] Make EntitySummary llvm-RTTI friendly (#180613)
Commit: 8ccfa9a52d42af623932bc136c6d267e0ec38ab7
https://github.com/llvm/llvm-project/commit/8ccfa9a52d42af623932bc136c6d267e0ec38ab7
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/include/clang/Analysis/Scalable/Serialization/SerializationFormat.h
M clang/lib/Analysis/Scalable/Serialization/SerializationFormat.cpp
M clang/unittests/Analysis/Scalable/Registries/MockSerializationFormat.cpp
M clang/unittests/Analysis/Scalable/Registries/MockSerializationFormat.h
Log Message:
-----------
[clang][ssaf] Make SerializationFormat llvm-RTTI friendly (#180616)
Commit: 7e5d9189d28f83102474ba18de84c9d62d7f2500
https://github.com/llvm/llvm-project/commit/7e5d9189d28f83102474ba18de84c9d62d7f2500
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/cse-replicate-regions.ll
M llvm/test/Transforms/LoopVectorize/hoist-predicated-loads-with-predicated-stores.ll
Log Message:
-----------
[VPlan] Simplify true && x -> x (#179426)
Commit: a481252122b5592704672fed59e102163cb56e61
https://github.com/llvm/llvm-project/commit/a481252122b5592704672fed59e102163cb56e61
Author: Christian Sigg <csigg at google.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/build_defs.bzl
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
Log Message:
-----------
[bazel] NFC: shave off unnecessary newlines (#180626)
And silence `stubgen_runner` console spew.
Commit: b91eb9b4e5c48cf7c270f997a889034ff0e1ecca
https://github.com/llvm/llvm-project/commit/b91eb9b4e5c48cf7c270f997a889034ff0e1ecca
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/AArch64/vector-extract-last-active.ll
A llvm/test/CodeGen/WebAssembly/vector-extract-last-active.ll
M llvm/test/CodeGen/X86/vector-extract-last-active.ll
Log Message:
-----------
[SDAG] Implement missing legalization for `ISD::VECTOR_FIND_LAST_ACTIVE` (#180290)
This lowers the splitting as:
```
any_active(hi_mask)
? (find_last_active(hi_mask) + lo_mask.getVectorElementCount())
: find_last_active(lo_mask)
```
And trivially lowers `<1 x i1>` scalarization to returning zero. Which
is a natural result of the splitting (and the lack of a sentinel
"none-active" result value).
The lowerings likely can be improved. This patch is for completeness.
Should fix:
https://github.com/llvm/llvm-project/pull/178862#issuecomment-3862310334
Fixes #180212
Commit: e17226e20b7b3138f432458bb9c0e42c304f99cf
https://github.com/llvm/llvm-project/commit/e17226e20b7b3138f432458bb9c0e42c304f99cf
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M offload/include/Shared/Debug.h
Log Message:
-----------
[OFFLOAD] Implement excluding filters for debugging (#180538)
Allow a to define a set of Types that are not shown by default when
doing default debug loggin (e.g., LIBOMPTARGET_DEBUG=All).
Users can enable output of those types of messages by explicitly adding
them to LIBOMPTARGET_DEBUG.
Used to implement: #180545
---------
Co-authored-by: Michael Klemm <michael.klemm at amd.com>
Commit: e145b0ea3558ff43a9d74690948ed84f77f91fe7
https://github.com/llvm/llvm-project/commit/e145b0ea3558ff43a9d74690948ed84f77f91fe7
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/bindings/ocaml/llvm/llvm.ml
M llvm/bindings/ocaml/llvm/llvm.mli
M llvm/bindings/ocaml/llvm/llvm_ocaml.c
M llvm/test/Bindings/OCaml/analysis.ml
M llvm/test/Bindings/OCaml/bitreader.ml
M llvm/test/Bindings/OCaml/bitwriter.ml
M llvm/test/Bindings/OCaml/core.ml
M llvm/test/Bindings/OCaml/debuginfo.ml
M llvm/test/Bindings/OCaml/diagnostic_handler.ml
M llvm/test/Bindings/OCaml/executionengine.ml
M llvm/test/Bindings/OCaml/ext_exc.ml
M llvm/test/Bindings/OCaml/irreader.ml
M llvm/test/Bindings/OCaml/linker.ml
M llvm/test/Bindings/OCaml/passbuilder.ml
M llvm/test/Bindings/OCaml/target.ml
M llvm/test/Bindings/OCaml/transform_utils.ml
Log Message:
-----------
[OCaml] Remove global_context (#180533)
This has been deprecated in the C API, so remove it from the OCaml
bindings. create_context and dispose_context should be used instead.
Commit: 59a8bd0a746360380f8579a72f6be6ebe8a8e1b0
https://github.com/llvm/llvm-project/commit/59a8bd0a746360380f8579a72f6be6ebe8a8e1b0
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/SimplifyLibCalls.h
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
Log Message:
-----------
[SimplifyLibCalls] Directly canonicalize fminimum_num to intrinsic (#180555)
Same as https://github.com/llvm/llvm-project/pull/177988, but for
fminimum_num/fmaximum_num. Directly canonicalize these to the
corresponding intrinsics, and let the shrinking happen directly on the
intrinsics.
Commit: 1ec8f38c9950c5f10ef19ae28b6d8e1901f26cdc
https://github.com/llvm/llvm-project/commit/1ec8f38c9950c5f10ef19ae28b6d8e1901f26cdc
Author: Matt <MattPD at users.noreply.github.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/lib/Lower/ConvertType.cpp
M flang/lib/Optimizer/Builder/CMakeLists.txt
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/test/Lower/HLFIR/cray-pointers.f90
M flang/test/Lower/HLFIR/proc-pointer-comp-pass.f90
M flang/test/Lower/default-initialization.f90
A flang/test/Lower/derived-type-sequence-alias-assign.f90
M flang/test/Lower/polymorphic.f90
M flang/unittests/Optimizer/CMakeLists.txt
Log Message:
-----------
[flang] Use alias analysis in lowering record assignments (#180628)
Without alias analysis Flang assumes no aliasing in lowering record
assignments which can result in miscompilation of programs using
`SEQUENCE` types and `EQUIVALENCE`.
Use alias analysis to guard the fast path in `genRecordAssignment`;
otherwise fall back to element-wise expansion.
Update FIR FileCheck expectations
Add `FIRAnalysis` to "flang/unittests/Optimizer/CMakeLists.txt" to fix
the Windows x64 build failure (linker error).
Add `SEQUENCE` handling and update tests accordingly.
Fixes #175246 (and includes the fix to
"flang/lib/Optimizer/Builder/CMakeLists.txt" in PR #176483).
Co-authored-by: Matt P. Dziubinski <matt-p.dziubinski at hpe.com>
Commit: 0a3b376015d410c93d00f1b4f5a10d816cb217bf
https://github.com/llvm/llvm-project/commit/0a3b376015d410c93d00f1b4f5a10d816cb217bf
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M lldb/test/API/macosx/posix_spawn/TestLaunchProcessPosixSpawn.py
Log Message:
-----------
[lldb][test] Skip TestLaunchProcessPosixSpawn.py
Fails on public green dragon arm64 bot with:
```
08:53:39 "/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/./bin/dsymutil" -o "fat.out.dSYM" "fat.out"
08:53:39 warning: no debug symbols in executable (-arch x86_64)
08:53:39 warning: no debug symbols in executable (-arch x86_64h)
08:53:39 warning: no debug symbols in executable (-arch arm64)
08:53:39
08:53:39
08:53:39 runCmd: file -arch x86_64 /Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/lldb-test-build.noindex/macosx/posix_spawn/TestLaunchProcessPosixSpawn.test_apple_silicon/fat.out
08:53:39
08:53:39 warning: (x86_64) /Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/lldb-test-build.noindex/macosx/posix_spawn/TestLaunchProcessPosixSpawn.test_apple_silicon/fat.out empty dSYM file detected, dSYM was created with an executable with no debug info.
08:53:39 output: Current executable set to '/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/lldb-test-build.noindex/macosx/posix_spawn/TestLaunchProcessPosixSpawn.test_apple_silicon/fat.out' (x86_64).
08:53:39
08:53:39
08:53:39 <bound method SBProcess.Kill of SBProcess: pid = 73406, state = exited, threads = 0, executable = fat.out>: success
08:53:39
08:53:39 FAIL: LLDB (/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/bin/clang-arm64) :: test_apple_silicon (TestLaunchProcessPosixSpawn.TestLaunchProcessPosixSpawn)
08:53:39 runCmd: settings clear --all
08:53:39
08:53:39 output:
08:53:39
08:53:39 runCmd: settings set symbols.enable-external-lookup false
08:53:39
08:53:39 output:
08:53:39
08:53:39 runCmd: settings set target.inherit-tcc true
08:53:39
08:53:39 output:
08:53:39
08:53:39 runCmd: settings set target.disable-aslr false
08:53:39
08:53:39 output:
08:53:39
08:53:39 runCmd: settings set target.detach-on-error false
08:53:39
08:53:39 output:
08:53:39
08:53:39 runCmd: settings set target.auto-apply-fixits false
08:53:39
08:53:39 output:
08:53:39
08:53:39 runCmd: settings set plugin.process.gdb-remote.packet-timeout 60
08:53:39
08:53:39 output:
08:53:39
08:53:39 runCmd: settings set symbols.clang-modules-cache-path "/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/lldb-test-build.noindex/module-cache-lldb/lldb-api"
08:53:39
08:53:39 output:
08:53:39
08:53:39 runCmd: settings set use-color false
08:53:39
08:53:39 output:
08:53:39
08:53:39 runCmd: settings set show-statusline false
08:53:39
08:53:39 output:
08:53:39
08:53:39 UNSUPPORTED: LLDB (/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/bin/clang-arm64) :: test_haswell (TestLaunchProcessPosixSpawn.TestLaunchProcessPosixSpawn) (Current CPU is not Haswell)
08:53:39 Restore dir to: /Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/tools/lldb/test
08:53:39 ======================================================================
08:53:39 FAIL: test_apple_silicon (TestLaunchProcessPosixSpawn.TestLaunchProcessPosixSpawn)
08:53:39 ----------------------------------------------------------------------
08:53:39 Traceback (most recent call last):
08:53:39 File "/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/lldb/packages/Python/lldbsuite/test/decorators.py", line 160, in wrapper
08:53:39 return func(*args, **kwargs)
08:53:39 File "/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/lldb/test/API/macosx/posix_spawn/TestLaunchProcessPosixSpawn.py", line 72, in test_apple_silicon
08:53:39 self.run_arch(exe, "x86_64")
08:53:39 File "/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/lldb/test/API/macosx/posix_spawn/TestLaunchProcessPosixSpawn.py", line 48, in run_arch
08:53:39 self.assertTrue(error.Success(), str(error))
08:53:39 AssertionError: False is not true : error: process exited with status -1 (lost connection)
08:53:39 Config=arm64-/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/bin/clang
08:53:39 ----------------------------------------------------------------------
08:53:39 Ran 2 tests in 5.686s
08:53:39
08:53:39 FAILED (failures=1, skipped=1)
```
Commit: 92bcff7dc290d75ffa921f9e5755a3d072316d03
https://github.com/llvm/llvm-project/commit/92bcff7dc290d75ffa921f9e5755a3d072316d03
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M cross-project-tests/debuginfo-tests/llvm-prettyprinters/lldb/expected.test
Log Message:
-----------
[cross-project-tests][lldb] Relax llvm::Expected check
The `CHECK` for `(int)` was too strict. On macOS the type prints as:
```
08:46:24 29: (lldb) v -T ExpectedRef
08:46:24 30: (llvm::Expected<int &>) ExpectedRef = {
08:46:24 next:14'0 X error: no match found
08:46:24 31: (std::__1::reference_wrapper<int>::type) value = 100
08:46:24 next:14'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
08:46:24 next:14'1 ? possible intended match
08:46:24 32: }
08:46:24 next:14'0 ~~
```
Commit: 570fffe04480133edc2df29eb018754c7a3e896b
https://github.com/llvm/llvm-project/commit/570fffe04480133edc2df29eb018754c7a3e896b
Author: CarolineConcatto <caroline.concatto at arm.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Analysis/MemorySSA.cpp
M llvm/test/Analysis/MemorySSA/function-clobber.ll
Log Message:
-----------
[MemorySSA] Relax clobbering checks for calls to consider writes only (#179721)
Now that getModRefInfo for calls handles read and write effects by
examining both calls, the clobbering query no longer needs to treat
reads as clobbers. Update the check to consider writes only, aligning
call handling with other instructions
Commit: b00cba5804456dcc8634afa604712596c13f739a
https://github.com/llvm/llvm-project/commit/b00cba5804456dcc8634afa604712596c13f739a
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/test/HLFIR/simplify-hlfir-intrinsics-cshift.fir
Log Message:
-----------
[flang] do not set nuw flag in CSHIFT bound arithmetic (#180520)
Fix https://github.com/llvm/llvm-project/issues/180374
I initially suspected an issue with some lower bound adjustment missing,
and indeed found an unrelated issue because gen1DSection was always
called with all-ones lower bounds because the genLowerbounds was called
on the result fir.shape.
But this is actually not relevant for the issue where this code path is
not exercised. The issue was `nuw` (no unsigned-wrap) was being set on
arithmetic inside the kernel generated for CSHIFT, but because this
arithmetic is dealing with user defined bounds, it may actually have to
deal with negative values (even if the offsets from the CSHIFT itself
are not negative).
This caused LLVM optimization to generate completely invalid code when
the lower bounds of CSHIFT input are zero or less.
Commit: 302ff8fd005620731b82dd2a6342a9613363a9aa
https://github.com/llvm/llvm-project/commit/302ff8fd005620731b82dd2a6342a9613363a9aa
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pown.ll
M llvm/test/Transforms/InstCombine/AMDGPU/fmul_legacy.ll
M llvm/test/Transforms/InstCombine/binop-itofp.ll
M llvm/test/Transforms/InstCombine/binop-select.ll
M llvm/test/Transforms/InstCombine/fast-math.ll
M llvm/test/Transforms/InstCombine/fmul-sqrt.ll
M llvm/test/Transforms/InstCombine/fmul.ll
M llvm/test/Transforms/InstCombine/fsqrtdiv-transform.ll
M llvm/test/Transforms/InstCombine/pow-to-ldexp.ll
M llvm/test/Transforms/InstCombine/pow_fp_int.ll
M llvm/test/Transforms/InstCombine/pow_fp_int16.ll
M llvm/test/Transforms/InstCombine/powi.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fmul.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
M llvm/test/Transforms/InstCombine/vec_demanded_elts.ll
M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
M llvm/test/Transforms/PGOProfile/chr.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/predicated-reduction.ll
Log Message:
-----------
InstCombine: Use SimplifyDemandedFPClass on fmul (#177490)
Start trying to use SimplifyDemandedFPClass on instructions, starting
with fmul. This subsumes the old transform on multiply of 0. The
main change is the introduction of nnan/ninf. I do not think anywhere
was systematically trying to introduce fast math flags before, though
a few odd transforms would set them.
Previously we only called SimplifyDemandedFPClass on function returns
with nofpclass annotations. Start following the pattern of
SimplifyDemandedBits, where this will be called from relevant root
instructions.
I was wondering if this should go into InstCombineAggressive, but that
apparently does not make use of InstCombineInternal's worklist.
Commit: 3230de5e651648ba3ce81094b72311af37c465e4
https://github.com/llvm/llvm-project/commit/3230de5e651648ba3ce81094b72311af37c465e4
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/test/AST/ByteCode/invalid.cpp
Log Message:
-----------
[clang][bytecode] Fix assertion failure when returning function type (#180681)
... as an rvalue. Which can't work, so reject.
Commit: 9de84638b97425db97f5d86879fd071593702eca
https://github.com/llvm/llvm-project/commit/9de84638b97425db97f5d86879fd071593702eca
Author: Roman-Pevnyi <166020069+Roman-Pevnyi at users.noreply.github.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M mlir/cmake/modules/AddMLIR.cmake
M mlir/include/mlir/IR/BuiltinTypes.h
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/include/mlir/IR/CMakeLists.txt
A mlir/include/mlir/IR/QuantStorageTypeInterface.h
A mlir/include/mlir/IR/QuantStorageTypeInterface.td
M mlir/lib/Dialect/Quant/IR/QuantTypes.cpp
M mlir/lib/Dialect/Quant/IR/TypeParser.cpp
M mlir/lib/IR/CMakeLists.txt
A mlir/lib/IR/QuantStorageTypeInterface.cpp
M mlir/test/Dialect/Quant/parse-uniform-invalid.mlir
M mlir/test/Dialect/Quant/parse-uniform.mlir
Log Message:
-----------
Extending UniformQuantizedType with interface-based support for new storage types in Quant dialect (#152966)
Currently, UniformQuantizedType only supports built-in MLIR storage
types such as Integer. LLM quantization research introducing feature of
using NF4 as a low precision datatype (see
https://arxiv.org/pdf/2305.14314). There is a growing need to make the
system extensible and maintainable as more types are added. Ensuring
that MLIR can natively support NF4 through a clean, extensible interface
is essential for both current and future quantization workflows.
**Current Approach and Its Limitations:**
- The present implementation relies on dynamic checks (e.g., type
switches or if-else chains) to determine the storage type and retrieve
type-specific information for legality checks.
- This approach works for a small, fixed set of types, but as the number
of supported types grows, the code becomes harder to read, maintain, and
extend.
**Proposed Interface-Based Approach:**
- Define a StorageTypeInterface that specifies the required methods any
storage type must implement to be used in UniformQuantizedType.
- Each storage type (Integer, Float8E5M2, Float8E4M3FN, and new types
like NF4) would implement this interface, encapsulating their
type-specific logic.
- When UniformQuantizedType needs to check legality or retrieve
information, it can use MLIR’s dyn_cast mechanism to check if the type
implements the interface and then call the required methods.
- This design decouples UniformQuantizedType from the specifics of each
storage type, making it easy to add new types (such as NF4) without
modifying the core logic or introducing more type checks.
**Benefits:**
- Extensibility: New storage types can be added by simply implementing
the interface, without touching the core UniformQuantizedType logic.
- Readability: The code is cleaner, as it avoids large switch statements
or if-else chains.
- Maintainability: Type-specific logic is encapsulated within each type,
reducing the risk of errors and making the codebase easier to understand
and update.
Commit: b4032db3aa68c1e67ba36a59d6667e9e3c283148
https://github.com/llvm/llvm-project/commit/b4032db3aa68c1e67ba36a59d6667e9e3c283148
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
A mlir/test/Dialect/Vector/td/flatten.mlir
M mlir/test/Dialect/Vector/transform-vector.mlir
M mlir/test/Dialect/Vector/vector-transfer-flatten.mlir
Log Message:
-----------
[mlir][vector] Reuse vector TD op in vector.xfer flatten tests (#180606)
This change adds a `RUN` line in vector-transfer-flatten.mlir that will
use `vector.flatten_vector_transfer_ops` that was introduced in #178134.
It also removes a test added in the original PR whose coverage is
already provided by pre-existing tests.
Commit: f22a178b132d42a22c5d1a9402641723a655cff3
https://github.com/llvm/llvm-project/commit/f22a178b132d42a22c5d1a9402641723a655cff3
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll
M llvm/test/Transforms/LoopVectorize/conditional-scalar-assignment-vplan.ll
M llvm/unittests/Analysis/IVDescriptorsTest.cpp
Log Message:
-----------
Reland "[LV] Support conditional scalar assignments of masked operations" (#180708)
This patch extends the support added in #158088 to loops where the
assignment is non-speculatable (e.g. a conditional load or divide).
For example, the following loop can now be vectorized:
```
int simple_csa_int_load(
int* a, int* b, int default_val, int N, int threshold)
{
int result = default_val;
for (int i = 0; i < N; ++i)
if (a[i] > threshold)
result = b[i];
return result;
}
```
It does this by extending the recurrence matching from only looking for
selects, to include phis where all operands are the header phi, except
for one which can be an arbitrary value outside the recurrence.
---
Reverts llvm/llvm-project#180275 (original PR: #178862)
Additional type legalization for `ISD::VECTOR_FIND_LAST_ACTIVE` was
added in #180290, which should resolve the backend crashes on x86.
Commit: e043195ef417a2572aa49f18d878cfb8647425a0
https://github.com/llvm/llvm-project/commit/e043195ef417a2572aa49f18d878cfb8647425a0
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAArch64.def
M clang/lib/Headers/arm_acle.h
M clang/test/CodeGen/arm_acle.c
M clang/test/CodeGen/builtins-arm64.c
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
A llvm/test/CodeGen/AArch64/arm64-prefetch-ir.ll
M llvm/test/MC/AArch64/armv9.6a-pcdphint.s
Log Message:
-----------
[AArch64] Add support for intent to read prefetch intrinsic (#179709)
This patch adds support in Clang for the PRFM IR instruction, by adding
the following builtin:
void __pldir(void const *addr);
This builtin is described in the following ACLE proposal:
https://github.com/ARM-software/acle/pull/406
Commit: 437566ddd2f3a15d1cb37331401fb01323a75884
https://github.com/llvm/llvm-project/commit/437566ddd2f3a15d1cb37331401fb01323a75884
Author: Ravil Dorozhinskii <ravil.aviva.com at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[ROCDL] Added workgroup cluster ids to ROCDL (#179897)
Commit: ceec2c72d22097a63a1495b4654a41392b8dd086
https://github.com/llvm/llvm-project/commit/ceec2c72d22097a63a1495b4654a41392b8dd086
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/test/Analysis/ScalarEvolution/ptrtoaddr.ll
Log Message:
-----------
[SCEV] Add ptrtoaddr tests with external state/unstable addrspaces.
Add ptrtoaddr tests with address spaces with unstable and external but
stable pointer representations.
Currently we incorrectly form ptrtoaddr for unstsable pointers. See
discussion in https://github.com/llvm/llvm-project/pull/178861 for more
details.
Commit: bd6dd945849a8319f39a0d6581f7f5f64e9a9236
https://github.com/llvm/llvm-project/commit/bd6dd945849a8319f39a0d6581f7f5f64e9a9236
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_minmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-minmax-uminmax.mir
A llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-uinc-udec-wrap.mir
Log Message:
-----------
[AMDGPU] Add legalization rules for atomicrmw max/min ops (#180502)
Adds rules for G_ATOMICRMW_{MAX, MIN, UMAX, UMIN, UINC_WRAP, UDEC_WRAP}.
Each of these generic opcode are supported for S32 and S64 types
on flat, global and local address spaces.
Commit: 25f5e9732784a9feec563c99ffcaa2b30b00ec72
https://github.com/llvm/llvm-project/commit/25f5e9732784a9feec563c99ffcaa2b30b00ec72
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ScheduleOrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ScheduleOrderedAssignments.h
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/test/HLFIR/order_assignments/inlined-stack-temp.fir
A flang/test/HLFIR/order_assignments/where-array-sections.f90
M flang/test/HLFIR/order_assignments/where-fusing-scheduling.f90
M flang/test/HLFIR/order_assignments/where-scheduling.f90
Log Message:
-----------
[flang] optimize WHERE with identical and disjoint array sections (#180279)
Improve `ScheduleOrderedAssignments` to avoid creating temporary storage
for masks in `WHERE` constructs when the mask modification is "aligned"
with the assignment (e.g., `where(a(i)>0) a(i)=...`).
- Identify "aligned" conflicts (identical array elements accessed in
order) using the `ArraySectionAnalyzer` that is extracted from
OptimizedBufferization.
- Defer saving regions with aligned conflicts, allowing fusion if
possible.
- Implement retroactive saving: if a region was modified in a previous
run (fused via aligned conflict) but is needed by a later split run,
insert a `SaveEntity` action before the modifying run.
- Use `std::list` for the schedule to support stable iterators for run
insertion.
- Update tests to verify fewer temporaries and correct retroactive
saves.
- Update flang pipeline at O2 and more to try fusing assignments in
WHERE/FORALL. This allows maximizing the chances that mask temps are not
needed (because a mask variable cannot be reused in a later run/loop
nest if it was modified even if all the accesses are in order, being in
order only matter for accesses generated inside the same loop nest).
This fixes suboptimal code generation where temporaries were created
unnecessarily for common patterns like `where (x > 0) x = ...`.
Commit: af74bc96c2d0ed892062d54f05ee6699bcecc72e
https://github.com/llvm/llvm-project/commit/af74bc96c2d0ed892062d54f05ee6699bcecc72e
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/invalid.cpp
M clang/test/SemaCXX/alignof-sizeof-reference.cpp
Log Message:
-----------
[clang][bytecode] Improve rejecting UnaryExprOrTypeTraitExprs (#180710)
Some of them work just fine, even if the expression contains errors.
Commit: 41aed214a09d4e7f8e2bfe0f6fa36ae43556761d
https://github.com/llvm/llvm-project/commit/41aed214a09d4e7f8e2bfe0f6fa36ae43556761d
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
A llvm/test/Transforms/Coroutines/coro-retcon-continuation-scope.ll
Log Message:
-----------
[CoroSplit][DebugInfo] Fix scope of continuation funclets (#180523)
The heuristic for deciding which scope line to use for a continuation
funclet relies on iterating on the instructions of the first BB of the
continuation. Often, this contains a single unconditional branch, which
is skipped by the heuristic. However, in coro-retcon, two such
"jump-only" BBs are generated. This patch amends the heuristic to
account for that.
Commit: 9914ee6ef4b78d62055734290afe879a7ae1a036
https://github.com/llvm/llvm-project/commit/9914ee6ef4b78d62055734290afe879a7ae1a036
Author: Philipp Rados <philipp.rados at openchip.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/VScaleAttr.cpp
A flang/test/Transforms/vscale-attr.fir
Log Message:
-----------
[flang] Fix -debug crash from VScaleAttrPass (#180234)
This pass splits up the `vscaleRange` pass-option from the
`VScaleAttrPass` into `vscaleMin` and `vscaleMax` respectively, since a
`std::pair<>` cannot be used as a cli-option and crashes when running
`flang -march=rv64gcv -O3 file.f90 -mmlir -debug`.
Since the options can now be set individually I added some error
checking following the semantics described in the langref
https://llvm.org/docs/LangRef.html#function-attributes.
I also added tests since there were none for only this pass before.
Commit: c9753859d19b07315c5a9a493efaa4df18db84ab
https://github.com/llvm/llvm-project/commit/c9753859d19b07315c5a9a493efaa4df18db84ab
Author: Matthew Nagy <matthew.nagy at sony.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M compiler-rt/include/CMakeLists.txt
A compiler-rt/include/sanitizer/tysan_interface.h
M compiler-rt/lib/sanitizer_common/tests/sanitizer_common_test.cpp
M llvm/utils/gn/secondary/compiler-rt/include/BUILD.gn
Log Message:
-----------
[TySan] Add skeleton for adding interface functions (#170859)
This pr has the more straightforward changes from the initial interfaces
pr (https://github.com/llvm/llvm-project/pull/169023). By supporting
interfaces, it also will help me fix [this
issue](https://github.com/llvm/llvm-project/issues/169024) where we
don't test tysan with the sanitizer_common codebase
Commit: b62a7527d294967500b47df1c02b9e9aa419a3d7
https://github.com/llvm/llvm-project/commit/b62a7527d294967500b47df1c02b9e9aa419a3d7
Author: Christian Sigg <csigg at google.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Port 9de8463
Commit: 7756bfd106cc5b0eeec24301e40c6cc223002574
https://github.com/llvm/llvm-project/commit/7756bfd106cc5b0eeec24301e40c6cc223002574
Author: Ningning Shi(史宁宁) <shiningning at iscas.ac.cn>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Passes/PassBuilderPipelines.cpp
Log Message:
-----------
[NFC] Modify the comment of LoopRotate param (#180675)
The first param of LoopRotatePass is EnableHeaderDuplication. The value
'true' means 'enable the header duplication'.
`LoopRotatePass(bool EnableHeaderDuplication, bool PrepareForLTO)`
---------
Co-authored-by: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Commit: 3157758190a487e344ecf1d2ff6402609a38d6b5
https://github.com/llvm/llvm-project/commit/3157758190a487e344ecf1d2ff6402609a38d6b5
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
A llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub-sdot.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
Log Message:
-----------
[LV] Handle partial sub-reductions with sub in middle block. (#178919)
Sub-reductions can be implemented in two ways:
(1) negate the operand in the vector loop (the default way).
(2) subtract the reduced value from the init value in the middle block.
Note that both ways keep the reduction itself as an 'add' reduction,
which is necessary because only llvm.vector.partial.reduce.add exists.
The ISD nodes for partial reductions don't support folding the
sub/negation into its operands because the following is not a valid
transformation:
```
sub(0, mul(ext(a), ext(b)))
-> mul(ext(a), ext(sub(0, b)))
```
It can therefore be better to choose option (2) such that the partial
reduction is always positive (starting at '0') and to do a final
subtract in the middle block.
For AArch64 there are no dot-product instructions that can
do a `partial.reduce.sub(acc, mul(ext(a), ext(b)))` operation.
I'm not sure if such instructions exist for other targets.
(If so then we may want to make this decision a target option)
This PR also increases the AArch64 cost of a partial sub-reduction
when this exists in an 'add-sub' reduction chain.
Fixes https://github.com/llvm/llvm-project/issues/178703
Commit: 2b80b86dbb5863c0687db2f08fba4f17cbfdcc64
https://github.com/llvm/llvm-project/commit/2b80b86dbb5863c0687db2f08fba4f17cbfdcc64
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/test/CIR/CodeGenBuiltins/AArch64/acle_sve_dup.c
Log Message:
-----------
[CIR] Refactor tests for SVE svdup builtins (#180559)
[CIR] Refactor tests for SVE svdup builtins
Refactor the SVE svdup builtin tests to focus on aspects that are unique to
their code generation: namely, that the expected LLVM SVE intrinsic (or
intrinsics) is emitted. Other codegen details (such as stack allocations
or temporary materialization) are intentionally not checked, as they are
not part of the builtin-specific codegen logic, but rather generic
Clang/CIR lowering behavior.
The generated CIR remains unchanged, but the CHECK lines are simplified
to only match the intrinsic calls, e.g.:
```mlir
cir.call_llvm_intrinsic "aarch64.sve.<intrinsic-name>"
```
For the LLVM IR checks, the tests now run `opt -passes=sroa` to eliminate
irrelevant IR noise. This allows the checks to be reduced to the essential
intrinsic calls, for example:
```llvm
define dso_local <vscale x 2 x double> @test_svdup_n_f64_z(
<vscale x 16 x i1> %0, double %1) {
%3 = call <vscale x 2 x i1>
@llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %0)
%4 = call <vscale x 2 x double>
@llvm.aarch64.sve.dup.nxv2f64(
<vscale x 2 x double> zeroinitializer, <vscale x 2 x i1> %3, double %1)
ret <vscale x 2 x double> %4
}
```
Commit: 4280f0d24185cc427bd4053101f19f6553e2ddae
https://github.com/llvm/llvm-project/commit/4280f0d24185cc427bd4053101f19f6553e2ddae
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-gfx12.cl
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dot4.f32.ll
A llvm/test/MC/AMDGPU/gfx1170_asm_vop3p.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop3p_dpp16.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop3p_dpp16_err.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop3p_dpp8.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop3p_dpp8_err.s
A llvm/test/MC/AMDGPU/gfx1170_asm_vop3p_err.s
A llvm/test/MC/Disassembler/AMDGPU/gfx1170_dasm_vop3p.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1170_dasm_vop3p_dpp16.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1170_dasm_vop3p_dpp8.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1170_dasm_vop3p_err.txt
Log Message:
-----------
[AMDGPU] Add dot4 fp8/bf8 instructions for gfx1170 (#180516)
Commit: aef8a2c483149d4ad2546843350002f11eb48a20
https://github.com/llvm/llvm-project/commit/aef8a2c483149d4ad2546843350002f11eb48a20
Author: Krish Gupta <krishom70 at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/Support/PrivateReductionUtils.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
A flang/test/Lower/OpenMP/Todo/reduction-character-dynamic-length.f90
A flang/test/Lower/OpenMP/declare-reduction-character-allocatable.f90
Log Message:
-----------
[Flang][OpenMP] Fix crash with character types in declare_reduction (#178038)
Fixes #177501
This PR fixes a compilation crash when using character types in OpenMP
REDUCTION clauses with declare_reduction directives.
The problem was that character types weren't being handled properly
during OpenMP lowering. Specifically:
- Missing character length parameters in hlfir.declare operations
- Incorrect type wrapping for by-ref reductions
- Missing special case handling for boxed/unboxed character types
The fix ensures character types are treated similarly to derived types
throughout the reduction pipeline, since fir::isa_trivial() excludes
them.
Added a regression test to verify the fix works for both allocatable and
non-allocatable character reductions.
<img width="654" height="47" alt="image"
src="https://github.com/user-attachments/assets/cc962f01-3432-44ce-befb-324644767c8b"
/>
Commit: 70b7245990ef14987ff88a78727b470e9f0e3224
https://github.com/llvm/llvm-project/commit/70b7245990ef14987ff88a78727b470e9f0e3224
Author: Vinay Deshmukh <vinay_deshmukh at outlook.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M libcxx/include/__tree
Log Message:
-----------
[libc++] Prepare for PR #134330 by migrating to std::__static_fancy_pointer_cast (#180546)
To reduce the noise in #134330 for `libcxx/include/__tree`, we migrate
from certain `static_cast` to `std::__static_fancy_pointer_cast` in this
separate patch.
This change is needed to properly work with fancy pointers like
`min_pointer` during constant evaluation for `std::map`
Co-authored-by: Joseph Huber <huberjn at outlook.com>
Commit: 33f427c5c0c0105b617f07c5648263791d690696
https://github.com/llvm/llvm-project/commit/33f427c5c0c0105b617f07c5648263791d690696
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M cross-project-tests/debuginfo-tests/llvm-prettyprinters/lldb/expected.test
Log Message:
-----------
[cross-project-tests][lldb] Further relax llvm::Expected test assertions
Fixes following error on macOS:
```
CHECK-NEXT: (llvm::SmallVector<int, 2>) value = size=2 {
^
<stdin>:41:65: note: scanning from here
(llvm::Expected<llvm::SmallVector<int, 2> &>) ExpectedVecRef = {
^
<stdin>:42:31: note: possible intended match here
(std::__1::reference_wrapper<llvm::SmallVector<int, 2> >::type) value = size=2 {
```
Commit: 7e18ee576f215e3f0de0ea6b5daeb842af84833f
https://github.com/llvm/llvm-project/commit/7e18ee576f215e3f0de0ea6b5daeb842af84833f
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CoreEngine.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExplodedGraph.h
Log Message:
-----------
[NFC][analyzer] Get rid of imaginary friends (of classes) (#180188)
These NodeBuilder classes were deleted from the codebase in 2011
(fifteen years ago!) by 3eae33412d18c4a4a4a8592898b3e65ad5946a89 so
don't declare them as friends.
Commit: 288909883c7a5dadcda600389d5fee02078d1acb
https://github.com/llvm/llvm-project/commit/288909883c7a5dadcda600389d5fee02078d1acb
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Analysis/IVDescriptors.cpp
Log Message:
-----------
[IVDesc] Add `[[maybe_unused]]` to `NumNonPHIUsers` (NFC) (#180729)
Commit: 36cb9894b3eec301c1b2f92b5c05519ed1cea4fa
https://github.com/llvm/llvm-project/commit/36cb9894b3eec301c1b2f92b5c05519ed1cea4fa
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Pointer.cpp
Log Message:
-----------
[clang][bytecode] Only reject function types in Pointer::toRValue() (#180722)
No test because I'm not sure how to reproduce this, but this patch fixes
`CodeGen/ptrauth-qualifier-function.c`.
For function pointer types and function reference types, we use
`Pointer`s these days, so we _can_ return them.
Commit: 6d5bb4def15a5ad1ccd7b28fb2cd9b3a11ee74c0
https://github.com/llvm/llvm-project/commit/6d5bb4def15a5ad1ccd7b28fb2cd9b3a11ee74c0
Author: JaydeepChauhan14 <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Fixed flags issue of onlyZeroFlagUsed (#180405)
Fixes
https://github.com/llvm/llvm-project/pull/173543#discussion_r2670058843
Commit: c1a6b136a17c6bfd5ecb914240c0933ffe6a9275
https://github.com/llvm/llvm-project/commit/c1a6b136a17c6bfd5ecb914240c0933ffe6a9275
Author: Christian Sigg <csigg at google.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/Dialect/BUILD.bazel
Log Message:
-----------
[bazel] Port b4032db.
Commit: 9d2303103288f6110622644f78dbd26c8bcf28d5
https://github.com/llvm/llvm-project/commit/9d2303103288f6110622644f78dbd26c8bcf28d5
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M libcxx/include/__functional/operations.h
M libcxx/include/__tree
M libcxx/include/__type_traits/make_transparent.h
M libcxx/include/map
M libcxx/test/std/containers/associative/map/map.ops/find.pass.cpp
Log Message:
-----------
[libc++] Only make comparators transparent in __tree if they don't cause a conversion (#179453)
We're currently unwrapping `less<T>` even if the `key_type` isn't `T`.
This causes the removal of an implicit conversion to `const T&` if the
types mismatch. Making `less<T>` transparent in that case changes
overload resolution and makes it fail potentially.
Fixes #179319
Commit: 9501114ca015793c2fa6fe40236314a2db428e14
https://github.com/llvm/llvm-project/commit/9501114ca015793c2fa6fe40236314a2db428e14
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/IR/Verifier.cpp
M llvm/test/CodeGen/LoongArch/merge-base-offset-tlsle.ll
M llvm/test/CodeGen/LoongArch/merge-base-offset.ll
M llvm/test/Transforms/GlobalOpt/large-element-size.ll
A llvm/test/Verifier/global-var-too-big.ll
Log Message:
-----------
[Verifier] Make verifier fail when global variable size exceeds address space size (#179625)
When a global variable has a size that exceeds the size of the address
space it resides in, the verifier should fail as the variable can
neither be materialized nor fully accessed. This patch adds a check to
the verifier to enforce it.
---------
Signed-off-by: Steffen Holst Larsen <HolstLarsen.Steffen at amd.com>
Co-authored-by: Steffen Holst Larsen <HolstLarsen.Steffen at amd.com>
Commit: 0d375463ebdc9cc72e186f2366983c8053debb27
https://github.com/llvm/llvm-project/commit/0d375463ebdc9cc72e186f2366983c8053debb27
Author: Matthias Springer <me at m-sp.org>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/Passes.td
M mlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
R mlir/lib/Dialect/Linalg/Transforms/Detensorize.cpp
R mlir/test/Dialect/Linalg/detensorize_0d.mlir
R mlir/test/Dialect/Linalg/detensorize_br_operands.mlir
R mlir/test/Dialect/Linalg/detensorize_entry_block.mlir
R mlir/test/Dialect/Linalg/detensorize_if.mlir
R mlir/test/Dialect/Linalg/detensorize_trivial.mlir
R mlir/test/Dialect/Linalg/detensorize_while.mlir
R mlir/test/Dialect/Linalg/detensorize_while_impure_cf.mlir
R mlir/test/Dialect/Linalg/detensorize_while_pure_cf.mlir
Log Message:
-----------
[mlir][linalg] Remove abandoned `Detensorize` pass (#177579)
RFC:
https://discourse.llvm.org/t/how-to-deal-with-abandoned-unmaintained-code/89560
Commit: dca7b11a326f523a93268dd17e969d1c26bcf40e
https://github.com/llvm/llvm-project/commit/dca7b11a326f523a93268dd17e969d1c26bcf40e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
A llvm/test/CodeGen/X86/vector-target-demanded-elts.ll
Log Message:
-----------
[X86] Add tests showing failure to reduce the vector width of vpmaddwd/vpmaddubsw/pmulhrsw nodes (#180728)
Missing demanded elts handling
Commit: b46d6dcac1d710e1d0ad4062b64686819a24b05d
https://github.com/llvm/llvm-project/commit/b46d6dcac1d710e1d0ad4062b64686819a24b05d
Author: Christian Sigg <csigg at google.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
A llvm/test/Transforms/LoopIdiom/SPARC/lit.local.cfg
A llvm/test/Transforms/LoopIdiom/SPARC/popcnt.ll
R llvm/test/Transforms/LoopIdiom/Sparc/lit.local.cfg
R llvm/test/Transforms/LoopIdiom/Sparc/popcnt.ll
Log Message:
-----------
Rename llvm/test/Transforms/LoopIdiom/Sparc -> /SPARC
This is consistent with all other SPARC test directories.
Commit: 6558595ca3ac531270a6691c758b835ee8adfdd5
https://github.com/llvm/llvm-project/commit/6558595ca3ac531270a6691c758b835ee8adfdd5
Author: Petr Beneš <w.benny at outlook.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M lld/COFF/Writer.cpp
A lld/test/COFF/merge-bss-text-filealign1.test
Log Message:
-----------
[LLD][COFF] Fix out-of-bounds write when filling gaps with INT3 in code sections (#180411)
When merging `.bss` into a code section (e.g., `/MERGE:.bss=.text`), the
INT3 gap-filling loop in `writeSections()` would write past the output
buffer. This happens because `.bss` chunks have `hasData=false`, so they
contribute to `VirtualSize` but not `SizeOfRawData`. The loop was using
chunk RVAs without checking if they exceeded the raw data region.
This caused a crash on Windows with `/FILEALIGN:1` (access violation
0xC0000005). The tight alignment leaves no slack in the mapped buffer,
so the overflow immediately hits unmapped memory.
The fix bounds all memset operations to `rawSize` and exits early when
encountering chunks beyond the raw data boundary.
Fixes #180406
Commit: 370a571597883c8e251568f1e4ef046fe61eedc6
https://github.com/llvm/llvm-project/commit/370a571597883c8e251568f1e4ef046fe61eedc6
Author: Scott Manley <rscottmanley at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M mlir/lib/Transforms/Utils/RegionUtils.cpp
M mlir/test/Transforms/make-isolated-from-above.mlir
Log Message:
-----------
[RegionUtils] replace uses in nested regions when isolating from above (#180548)
When making a region IsolatedFromAbove, replace uses in any region
within the parent region, not just the immediate parent region.
Commit: 2f0400c1a15b7b1ff401cc12902f7de5856cf1f7
https://github.com/llvm/llvm-project/commit/2f0400c1a15b7b1ff401cc12902f7de5856cf1f7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/test/CodeGen/Thumb2/mve-shuffle.ll
Log Message:
-----------
[Thumb2] mve-shuffle.ll - add missing check prefix coverage for some fullfp16 cases (#180567)
Noticed while working on some upcoming generic shuffle handling
Commit: f8d5a003faa7567c2bac0b064ea6616f2e892467
https://github.com/llvm/llvm-project/commit/f8d5a003faa7567c2bac0b064ea6616f2e892467
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/ptrtoaddr.ll
Log Message:
-----------
[SCEV] Don't create SCEVPtrToAddr for unstable pointer representations. (#180718)
Conservatively treat unstable pointers as SCEVCouldNotCompute in
getPtrToAddrExpr, and return SCEVUnknown when constructing from IR.
This surfaced as part of the discussion in
https://github.com/llvm/llvm-project/pull/178861.
PR: https://github.com/llvm/llvm-project/pull/180718
Commit: 70aebae2a13114f4e3d5e2460c052d8f3de295be
https://github.com/llvm/llvm-project/commit/70aebae2a13114f4e3d5e2460c052d8f3de295be
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/bool-mask.ll
M llvm/test/Transforms/SLPVectorizer/X86/subvector-minbitwidth-unsigned-value.ll
Log Message:
-----------
[SLP]Support for zext i1 %x modeling as select %x, 1, 0
Model zext i1 %x to in as select i1 %x, in 1, in 0 in case, if there are
other select instructions, which can be combined into a bundle.
Fixes #178403
Reviewers: hiraditya, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/180635
Commit: 4dc4abc09453fa8ea2a3d38783261f50f0be8c40
https://github.com/llvm/llvm-project/commit/4dc4abc09453fa8ea2a3d38783261f50f0be8c40
Author: David Green <david.green at arm.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-neon-2velem-high.ll
M llvm/test/CodeGen/AArch64/mla_mls_merge.ll
Log Message:
-----------
[AArch64][GlobalISel] Add test coverage for arm64-neon-2velem-high.ll and mla_mls_merge.ll. NFC
Commit: 6c0ff8d12fe5b7d1d55098ca31dac56d8925bf7b
https://github.com/llvm/llvm-project/commit/6c0ff8d12fe5b7d1d55098ca31dac56d8925bf7b
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M offload/test/lit.cfg
M offload/test/mapping/firstprivate_aligned.cpp
Log Message:
-----------
Revert "Reapply [Offload][lit] Link against SPIR-V DeviceRTL if present" (#180743)
Reverts llvm/llvm-project#180231
Commit: 0fdf9b967699f96142a40a44a34e6bfa82765ae3
https://github.com/llvm/llvm-project/commit/0fdf9b967699f96142a40a44a34e6bfa82765ae3
Author: Manasij Mukherjee <manasijm at nvidia.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
A llvm/test/Transforms/ConstraintElimination/urem-udiv.ll
Log Message:
-----------
[ConstraintElim] Infer linear constraints from udiv and urem (#180689)
urem x, n: result < n (remainder is always less than divisor)
urem x, n: result <= x (remainder is at most the dividend)
udiv x, n: result <= x (quotient is at most the dividend)
https://alive2.llvm.org/ce/z/ezzsjQ
Commit: 7d2e182b0448bd06aabe534e3d08fd10f09ec805
https://github.com/llvm/llvm-project/commit/7d2e182b0448bd06aabe534e3d08fd10f09ec805
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-target-demanded-elts.ll
Log Message:
-----------
[X86] SimplifyDemandedVectorEltsForTargetNode - add handling for vpmaddwd/vpmaddubsw/vpmulhrsw vector width reduction (#180738)
Commit: 1e47ccf030e04a9bb85fee7205d1b1c56d4f8821
https://github.com/llvm/llvm-project/commit/1e47ccf030e04a9bb85fee7205d1b1c56d4f8821
Author: Christian Sigg <csigg at google.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Port a29f0dd.
Commit: 993e1f66afcfe9da03bd813e669eada341b11d2f
https://github.com/llvm/llvm-project/commit/993e1f66afcfe9da03bd813e669eada341b11d2f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/bool-mask.ll
M llvm/test/Transforms/SLPVectorizer/X86/subvector-minbitwidth-unsigned-value.ll
Log Message:
-----------
Revert "[SLP]Support for zext i1 %x modeling as select %x, 1, 0"
This reverts commit 70aebae2a13114f4e3d5e2460c052d8f3de295be to fix
buildbots https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flab.llvm.org%2Fbuildbot%2F%23%2Fbuilders%2F85%2Fbuilds%2F18614&data=05%7C02%7C%7Ce5641da3fe984280a6e908de68b3658c%7C84df9e7fe9f640afb435aaaaaaaaaaaa%7C1%7C0%7C639063316889757116%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=65hUwLDdZkXq3zUEt3cVuqJNwXN7Alw4JKDggDbjeVk%3D&reserved=0
Commit: 22c6b7047b1d8b7b686c8b8653d3715e9d03d821
https://github.com/llvm/llvm-project/commit/22c6b7047b1d8b7b686c8b8653d3715e9d03d821
Author: Nico Weber <thakis at chromium.org>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/test/BUILD.gn
A llvm/utils/gn/secondary/llvm/tools/llubi/BUILD.gn
A llvm/utils/gn/secondary/llvm/tools/llubi/lib/BUILD.gn
Log Message:
-----------
[gn] port a29f0dd09680 (llubi)
Commit: 5e0e389360d569e5b3918e61a615d52328649533
https://github.com/llvm/llvm-project/commit/5e0e389360d569e5b3918e61a615d52328649533
Author: Christian Sigg <csigg at google.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Port a29f0dd, second attempt.
Commit: a6929f7937696bb07788be6428fdcf1bf36775b5
https://github.com/llvm/llvm-project/commit/a6929f7937696bb07788be6428fdcf1bf36775b5
Author: Frank Schlimbach <frank.schlimbach at intel.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/MPI/IR/MPIOps.td
M mlir/lib/Conversion/ShardToMPI/ShardToMPI.cpp
M mlir/lib/Dialect/Shard/Transforms/Partition.cpp
M mlir/test/Conversion/ShardToMPI/convert-shard-to-mpi.mlir
M mlir/test/Dialect/Shard/partition.mlir
Log Message:
-----------
[mlir][shard,mpi] Allowing 2d-grids and simplifying lowering shard.all_gather (#180243)
- fixing incorrect assertion and related function name
- MPI_comm_split is not pure
- simplifying/standardizing permutation in all_gather
---------
Co-authored-by: Rolf Morel <rolfmorel at gmail.com>
Commit: 67e571df8c274f6e5357e822d79ca2c34c0056c4
https://github.com/llvm/llvm-project/commit/67e571df8c274f6e5357e822d79ca2c34c0056c4
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M lldb/CMakeLists.txt
A lldb/include/lldb/Host/windows/PythonPathSetup/PythonPathSetup.h
M lldb/source/Host/CMakeLists.txt
A lldb/source/Host/windows/PythonPathSetup/CMakeLists.txt
A lldb/source/Host/windows/PythonPathSetup/PythonPathSetup.cpp
M lldb/tools/driver/CMakeLists.txt
M lldb/tools/driver/Driver.cpp
M lldb/tools/lldb-dap/tool/CMakeLists.txt
M lldb/tools/lldb-dap/tool/lldb-dap.cpp
Log Message:
-----------
[lldb-dap][windows] add support for out of PATH python.dll resolution (#179306)
Commit: 5335e8ac894274b91eb37575a5edfb4c52a6d19a
https://github.com/llvm/llvm-project/commit/5335e8ac894274b91eb37575a5edfb4c52a6d19a
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/Sparc/BUILD.gn
Log Message:
-----------
[gn build] Port 1bfa71743b08
Commit: 50c430d0e144af69d2bc0d6453700043f7c14024
https://github.com/llvm/llvm-project/commit/50c430d0e144af69d2bc0d6453700043f7c14024
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Analysis/Scalable/BUILD.gn
Log Message:
-----------
[gn build] Port 239876941273
Commit: a81b7dead6bd0cbd9b63ec93ee6e22fbc034be9f
https://github.com/llvm/llvm-project/commit/a81b7dead6bd0cbd9b63ec93ee6e22fbc034be9f
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
Log Message:
-----------
[gn build] Port a56b877056ab
Commit: d8b87934f011da5a5a6b5a92553ff1243503cd39
https://github.com/llvm/llvm-project/commit/d8b87934f011da5a5a6b5a92553ff1243503cd39
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/include/llvm/TableGen/CodeGenHelpers.h
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
M llvm/test/TableGen/GlobalISelEmitter/HwModes.td
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTableExecutorEmitter.cpp
M llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Adopt CodeGenHelpers in GobalISel emitters (#180143)
Add specific emitters for `#ifdef` and `#ifndef` based guards and adopt
them and other CodeGenHelpers in Global ISel emitters.
Commit: 067f1c95a4520e84216ac66699b6c65bb4b47cd2
https://github.com/llvm/llvm-project/commit/067f1c95a4520e84216ac66699b6c65bb4b47cd2
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/PowerPC/vsx-tsvc-s173.ll
Log Message:
-----------
[LoopVectorizer] Generate test checks (NFC)
Commit: f96c1ccc1e8c0d1ea0ded762a7d0e0d933770ea2
https://github.com/llvm/llvm-project/commit/f96c1ccc1e8c0d1ea0ded762a7d0e0d933770ea2
Author: Andrei Elovikov <andrei.elovikov at sifive.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
A llvm/test/Transforms/LoopVectorize/vplan-print-after.ll
Log Message:
-----------
[VPlan] Add `-vplan-print-after=` option (#178700)
UpdateTestChecks support is updated in subsequent
https://github.com/llvm/llvm-project/pull/178736.
Commit: d80a7295726e4f1d401721155b64113a8ff5927a
https://github.com/llvm/llvm-project/commit/d80a7295726e4f1d401721155b64113a8ff5927a
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LoopVectorizer] Rename variable (NFC). (#180585)
Since TargetTransformInfo::enableAggressiveInterleaving(bool
HasReductions) takes the HasReductions argument, the LoopVectorizer
should save its returned value in a variable called AggressivelyInterleave
instead of AggressivelyInterleaveReductions.
Commit: f81889da29eec1a70283986fc0a654b9d628157a
https://github.com/llvm/llvm-project/commit/f81889da29eec1a70283986fc0a654b9d628157a
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
Log Message:
-----------
[VPlan] Fix convertToPhisToBlends folding non poison blend to poison (#180686)
This fixes a miscompile in #180005 where we didn't check that the first
incoming value isn't poison.
We should use the first non-poison incoming value if it exists, or just
poison if all the incoming values are poison.
Commit: a969d572c27d49f9d8d4852fba798cfd41c76987
https://github.com/llvm/llvm-project/commit/a969d572c27d49f9d8d4852fba798cfd41c76987
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M openmp/device/include/Synchronization.h
Log Message:
-----------
[OpenMP] Remove special handling for SPIR-V uinc atomic (#180747)
Summary:
No longer necessary after
https://github.com/llvm/llvm-project/pull/179114
Commit: b48833bf6619c49ed15390db4c36b217bcbf8a02
https://github.com/llvm/llvm-project/commit/b48833bf6619c49ed15390db4c36b217bcbf8a02
Author: Twice <twice at apache.org>
Date: 2026-02-11 (Wed, 11 Feb 2026)
Changed paths:
M mlir/include/mlir/IR/ExtensibleDialect.h
Log Message:
-----------
[MLIR] Make the verification order fixed in DynamicOpTraitList (#180758)
Currently we use `DenseMap` in `DynamicOpTraitList` to store traits and
iterate over the `DenseMap`, and we found that the order is not fixed
and we also cannot control verification order.
In this PR we use `MapVector` to preserve the insertion order so that
the verification order over traits can be fixed and users can tune the
verification order.
Commit: b526df55db2c7f8f55054c1b2b95951ccec3e45f
https://github.com/llvm/llvm-project/commit/b526df55db2c7f8f55054c1b2b95951ccec3e45f
Author: Björn Svensson <bjorn.a.svensson at est.tech>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/test/Driver/sanitizer-ld.c
Log Message:
-----------
Correcting sanitizer-ld test to expect `-lstdc++` or `-lc++` (#180736)
#164842 introduced a new testcase which failed in the following
test-builders:
- [fuchsia-x86_64-linux](https://lab.llvm.org/buildbot/#/builders/11/builds/33349)
- [llvm-clang-win-x-aarch](https://lab.llvm.org/buildbot/#/builders/193/builds/14309)
- [llvm-clang-win-x-armv7l](https://lab.llvm.org/buildbot/#/builders/38/builds/7708)
In these setups `-lc++` is expected instead of `-lstdc++`.
Signed-off-by: Björn Svensson <bjorn.a.svensson at est.tech>
Commit: 1d13412cd3aa213f43410cd225728b7c2b0170d2
https://github.com/llvm/llvm-project/commit/1d13412cd3aa213f43410cd225728b7c2b0170d2
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
Log Message:
-----------
[clang][nfc] Remove `else` after `return` in ARM.cpp (#180733)
Align with the LLVM coding standard:
* https://llvm.org/docs/CodingStandards.html#don-t-use-else-after-a-return
Commit: e6f5e4910df519a3f14e0db86d24abe8fd25082b
https://github.com/llvm/llvm-project/commit/e6f5e4910df519a3f14e0db86d24abe8fd25082b
Author: Ben Dunbobbin <Ben.Dunbobbin at sony.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/include/llvm/Support/Windows/WindowsSupport.h
M llvm/lib/Support/Windows/Path.inc
M llvm/unittests/Support/Path.cpp
Log Message:
-----------
[Windows][Support] Add helper to expand short 8.3 form paths (#178480)
Windows supports short 8.3 form filenames (for example,
`compile_commands.json` -> `COMPIL~1.JSO`) for legacy reasons. See:
https://learn.microsoft.com/en-us/windows/win32/fileio/naming-a-file#short-vs-long-names
Such paths are not unusual because, on Windows, the system temporary
directory is commonly derived from the `TMP`/`TEMP` environment
variables. For historical compatibility reasons, these variables are
often set to short 8.3 form paths on systems where user names exceed
eight characters.
Introduce `windows::makeLongFormPath()` to convert paths to their long
form by expanding any 8.3 components via `GetLongPathNameW`.
As part of this change:
- Extended-length path prefix handling is centralized by adding
`stripExtendedPrefix()` and reusing it in `realPathFromHandle()`.
- `widenPath()` is cleaned up to use shared prefix constants.
This was split out from #178303 at the request of the codeowner so that
the Windows support parts can be reviewed separately.
Commit: 4b8f866b36c2edd7b2a3cdd35e297727f8c7b3ec
https://github.com/llvm/llvm-project/commit/4b8f866b36c2edd7b2a3cdd35e297727f8c7b3ec
Author: Ryan Mitchell <Ryan.Mitchell at amd.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
Log Message:
-----------
[AMDGPU][NFC] Use RegisterOperand instead of RegisterClass (#180574)
RegisterOperand has decoder/other methods and is generally preferred for
operands.
Commit: 0d64801bc3b99a73d20032f74df3b87e0a7ed04e
https://github.com/llvm/llvm-project/commit/0d64801bc3b99a73d20032f74df3b87e0a7ed04e
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M flang/include/flang/Parser/preprocessor.h
M flang/lib/Parser/preprocessor.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/prescan.h
A flang/test/Preprocessing/bug178481.F90
Log Message:
-----------
[flang] Recognize compiler directives after expansion in comment (#180062)
The compiler can recognize a compiler directive when one results from a
macro expansion at the beginning of a non-comment source line, as in
"#define FOO !$OMP". But it can't recognize a compiler directive that
initially appears as a comment line, as in "!BAR" after "#define BAR
$OMP". Extend the prescanner to recognize such cases in free form
source. (Fixed form is a much more complicated case for this recognition
and will be addressed later if needed.)
Fixes https://github.com/llvm/llvm-project/issues/178481.
Commit: 7e1fff4d5040ed93372975d506cdecd889d70f6a
https://github.com/llvm/llvm-project/commit/7e1fff4d5040ed93372975d506cdecd889d70f6a
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M flang-rt/lib/runtime/time-intrinsic.cpp
M flang/lib/Semantics/check-call.cpp
A flang/test/Semantics/bug2203.f90
Log Message:
-----------
[flang][runtime] Improve handling of short DATE_AND_TIME(VALUES=) (#180557)
When the actual argument associated with the VALUES= dummy argument of
the intrinsic subroutine DATE_AND_TIME has fewer than eight elements, we
crash with an internal error in the runtime.
With this patch, the compiler now checks the size of the vector at
compilation time, when it is known, and gracefully copes with a short
vector at execution time otherwise, without crashing.
Commit: 076da86cd35aa58759c9be7d23ba4cd8693b7414
https://github.com/llvm/llvm-project/commit/076da86cd35aa58759c9be7d23ba4cd8693b7414
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M flang-rt/lib/runtime/file.cpp
M flang-rt/lib/runtime/iostat.cpp
M flang-rt/unittests/Runtime/ExternalIOTest.cpp
M flang/include/flang/Runtime/iostat-consts.h
Log Message:
-----------
[flang][runtime] OPEN(STATUS='NEW') should fail on extant file (#180605)
An OPEN(..., STATUS='NEW') statement should fail when the named file
exists, and also should not delete it when the failure is a recoverable
error.
Commit: 5df173263bb386cccf9de5df5f6fabeb9d247ccc
https://github.com/llvm/llvm-project/commit/5df173263bb386cccf9de5df5f6fabeb9d247ccc
Author: JaydeepChauhan14 <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringBase.cpp
Log Message:
-----------
[NFC] Initialize AtomicLoadExtActions array (#180752)
Commit: bc3b4462f06b988d2f5b5dec997a3bc9fcf518b6
https://github.com/llvm/llvm-project/commit/bc3b4462f06b988d2f5b5dec997a3bc9fcf518b6
Author: Peter Rong <peterrong96 at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaInit.cpp
A clang/test/CodeGenObjCXX/arc-lifetime-rvalue-ref-binding.mm
A clang/test/SemaObjCXX/arc-lifetime-rvalue-ref-binding.mm
Log Message:
-----------
[clang] Fix sema on ObjCLifetime conversion (#178524)
Clang can't handle objc lifetime correctly when casting
We reuse the approach similar to lifetime: First remove it before the
conversion, then add it back.
Add a test
Fixes https://github.com/llvm/llvm-project/issues/177478
Commit: 30f4b9c8bef50ffabc434e30c492e039eebb7c81
https://github.com/llvm/llvm-project/commit/30f4b9c8bef50ffabc434e30c492e039eebb7c81
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M libcxx/test/libcxx-03/transitive_includes/to_csv.py
M libcxx/test/libcxx/transitive_includes/to_csv.py
Log Message:
-----------
[libc++] Use ValueError instead of non-existent ArgumentError (#179526)
ArgumentError does not exist. argparse.ArgumentError does exist, but
that is not what we want to use. I presume this was never caught because
we never execute that line.
Commit: 9475f6af8188c9fb028c25f2143599f7fc3d2bac
https://github.com/llvm/llvm-project/commit/9475f6af8188c9fb028c25f2143599f7fc3d2bac
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/test/CodeGen/builtins-nvptx-ptx60.cu
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/CodeGen/nvptx_attributes.c
M clang/test/CodeGenCUDA/convergent.cu
M clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
M clang/test/Driver/cuda-cross-compiling.c
M clang/test/Driver/cuda-detect.cu
M clang/test/Driver/openmp-offload-gpu.c
M clang/test/Headers/gpuintrin.c
M flang/lib/Frontend/CompilerInstance.cpp
M flang/test/Lower/OpenMP/target_cpu_features.f90
M llvm/lib/Target/NVPTX/NVPTX.td
M llvm/lib/Target/NVPTX/NVPTXSubtarget.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/test/CodeGen/NVPTX/clusterlaunchcontrol-multicast.ll
M llvm/test/CodeGen/NVPTX/convert-sm100a.ll
M llvm/test/CodeGen/NVPTX/convert-sm103a.ll
M llvm/test/CodeGen/NVPTX/f32-ex2.ll
M llvm/test/CodeGen/NVPTX/fexp2.ll
M llvm/test/CodeGen/NVPTX/flog2.ll
M llvm/test/CodeGen/NVPTX/i128.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-arch-O0.ll
A llvm/test/CodeGen/NVPTX/ptx-version-validation.ll
M llvm/test/CodeGen/NVPTX/rsqrt.ll
M llvm/test/CodeGen/NVPTX/sm-version.ll
M llvm/test/CodeGen/NVPTX/surf-tex.py
R llvm/test/CodeGen/NVPTX/wmma-ptx86-sm120a.py
M mlir/include/mlir/Dialect/GPU/Pipelines/Passes.h
M mlir/include/mlir/Dialect/GPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
Log Message:
-----------
Reland "[NVPTX] Validate user-specified PTX version against SM version" (#180116)
Previous commit message:
>Previous commit message:
>
>> Original commit message:
>>
>>>When users explicitly specify a PTX version via -mattr=+ptxNN that's
insufficient for their target SM, we now emit a fatal error. Previously,
we silently upgraded the PTX version to the minimum required for the
target SM.
>>>
>>>When no SM or PTX version is specified, we now use PTX 3.2 (the
minimum for the default SM 3.0) instead of PTX 6.0.
>>
>>The following commits should fix the failures that arose when I
previously tried to land this commit:
>>
>>
>>https://github.com/llvm/llvm-project/commit/9fc5fd0ad689eed94f65b1d6d10f9c5642935e68
should address the llvm-nvptx*-nvidia-* build failures:
https://github.com/llvm/llvm-project/pull/174834#issuecomment-3742242651
>>
>>
>>https://github.com/llvm/llvm-project/commit/600514a63760c6730e4cd970d2fcead9c5a897b3
should address the MLIR failures
>
>The previous commit was reverted with
https://github.com/llvm/llvm-project/commit/d23cb79ba497281de050ef609cb91b91058bf323
because the
[mlir-nvidia](https://lab.llvm.org/buildbot/#/builders/138/builds/24797)
and
[mlir-nvidia-gcc7](https://lab.llvm.org/buildbot/#/builders/116/builds/23929)
Buildbots were failing.
>
>Those tests failed because MLIR's default SM was 5.0, which caused
NVPTX
to target PTX ISA v4.0, which did not support the intrinsics used in the
failing tests.
>
>https://github.com/llvm/llvm-project/commit/243f011577193c99358ccc4142b296d4fa80ea11
should address this by bumping MLIR's default SM to 7.5. Now, using
MLIR's new default SM, NVPTX
targets the PTX ISA v6.3, which supports the intrinsics used in the
failing tests.
---
The previous commit was reverted with
e9b578a4d77025e18318efedd0f3f3764338d859
[because](https://github.com/llvm/llvm-project/pull/179304#issuecomment-3856301333)
the clang driver set the default PTX ISA version to v4.2 when no CUDA
installation is found. However, given our patch, we should not set a
default; instead, let the LLVM backend select the appropriate PTX ISA
version for the target SM.
Commit: a88274f008604dcc7397e8f231ef8eebe983793f
https://github.com/llvm/llvm-project/commit/a88274f008604dcc7397e8f231ef8eebe983793f
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/Analysis/OpenACCSupport.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtils.h
M mlir/lib/Dialect/OpenACC/Analysis/OpenACCSupport.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCLoopTiling.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtils.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsTest.cpp
Log Message:
-----------
[mlir][acc] Support lazy remark message construction (#180665)
The OpenACC remark emission utilities previously only accepted Twine for
message construction. However, complex remarks often require additional
logic to build messages, such as resolving variable names. This results
in unnecessary work when remarks are disabled.
Add an overload that accepts a lambda for message generation, which is
only invoked when remark emission is enabled. Update ACCLoopTiling to
use this lazy API for tile size reporting.
Additionally, getVariableName now returns numeric strings for constant
integer values. This is also being used by ACCLoopTiling along with the
lazy remark update.
Commit: d3a70f3b2c7174d8fdea94e966b5bbc5ba7466ec
https://github.com/llvm/llvm-project/commit/d3a70f3b2c7174d8fdea94e966b5bbc5ba7466ec
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M flang-rt/lib/runtime/character.cpp
M flang-rt/unittests/Runtime/CharacterTest.cpp
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Character.h
M flang/include/flang/Runtime/character.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Character.cpp
M flang/module/__fortran_builtins.f90
M flang/module/iso_c_binding.f90
A flang/test/Lower/Intrinsics/f_c_string.f90
A flang/test/Semantics/f_c_string.f90
Log Message:
-----------
[flang] Implement 'F_C_STRING' library function (Fortran 2023) (#174474)
Implement `F_C_STRING` to convert a Fortran string to a C
null-terminated string. Documented in F2023 Standard: 18.2.3.9
`F_C_STRING (STRING [, ASIS])`.
Commit: cdbe28887bc9b4740f990dd5b3d8a86e9b14c131
https://github.com/llvm/llvm-project/commit/cdbe28887bc9b4740f990dd5b3d8a86e9b14c131
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M lldb/include/lldb/Core/PropertiesBase.td
M lldb/include/lldb/Interpreter/OptionValueProperties.h
M lldb/include/lldb/Interpreter/Property.h
M lldb/source/Core/CoreProperties.td
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/ModuleList.cpp
M lldb/source/Core/PluginManager.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/InterpreterProperties.td
M lldb/source/Interpreter/OptionValueProperties.cpp
M lldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.cpp
M lldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernelProperties.td
M lldb/source/Plugins/JITLoader/GDB/JITLoaderGDB.cpp
M lldb/source/Plugins/JITLoader/GDB/JITLoaderGDBProperties.td
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/LanguageCPlusPlusProperties.td
M lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
M lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFFProperties.td
M lldb/source/Plugins/Platform/Android/PlatformAndroid.cpp
M lldb/source/Plugins/Platform/Android/PlatformAndroidProperties.td
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinKernel.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformMacOSXProperties.td
M lldb/source/Plugins/Platform/QemuUser/PlatformQemuUser.cpp
M lldb/source/Plugins/Platform/QemuUser/PlatformQemuUserProperties.td
M lldb/source/Plugins/Platform/WebAssembly/PlatformWasm.cpp
M lldb/source/Plugins/Platform/WebAssembly/PlatformWasmProperties.td
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDPProperties.td
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemoteProperties.td
M lldb/source/Plugins/StructuredData/DarwinLog/StructuredDataDarwinLog.cpp
M lldb/source/Plugins/StructuredData/DarwinLog/StructuredDataDarwinLogProperties.td
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFProperties.td
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDBProperties.td
M lldb/source/Plugins/SymbolLocator/Debuginfod/SymbolLocatorDebuginfod.cpp
M lldb/source/Plugins/SymbolLocator/Debuginfod/SymbolLocatorDebuginfodProperties.td
M lldb/source/Plugins/Trace/intel-pt/TraceIntelPT.cpp
M lldb/source/Plugins/Trace/intel-pt/TraceIntelPTProperties.td
M lldb/source/Target/Language.cpp
M lldb/source/Target/Platform.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/source/Target/Thread.cpp
M lldb/utils/TableGen/LLDBPropertyDefEmitter.cpp
Log Message:
-----------
[LLDB] Set and verify paths of properties from tablegen (#179524)
In #168245, I attempted to dump the available settings to Markdown. That
required a full build of LLDB. However, to build the docs, only the swig
wrappers should need to be compiled. The comment was that we should be
able to use the definitions from the TableGen files.
Currently, the property definitions in don't have information about the
path where they will be available. They only contain a `Definition`
which groups properties, so they can be added to
`OptionValueProperties`.
With this PR, I'm adding the path for each property definition. For
example, `symbols.enable-external-lookup` would have `Name =
enable-external-lookup, Path = symbols`. In LLDB itself, we don't need
this path, we only need it for the documentation. To avoid mismatches
between the actual path and the declared one, I added a debug-only check
when a property group is added to a parent
(`OptionValueProperties::AppendProperty`).
The TableGen emitter for the properties now additionally emits
`g_{definition}_properties_def`, which includes both the array of
properties and the expected path. This constant has to be used to
initialize a `OptionValueProperties`.
I couldn't test this for everything (e.g. IntelPT or ProcessKDP), but
the necessary changes are simple: (1) set the `Path` in the TableGen
file, (2) update `initialize` to use `_def`.
Commit: ce94d63f0f0ecca24398d265654ef06d2ad255e0
https://github.com/llvm/llvm-project/commit/ce94d63f0f0ecca24398d265654ef06d2ad255e0
Author: Marcos Maronas <mmaronas at amd.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/test/CodeGenOpenCL/amdgpu-debug-info-pointer-address-space.cl
M clang/test/CodeGenOpenCL/amdgpu-debug-info-variable-expression.cl
M clang/test/Driver/amdgpu-toolchain-opencl.cl
M clang/test/Driver/opencl.cl
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/TargetParser/Triple.cpp
Log Message:
-----------
Make OpenCL an OSType rather than an EnvironmentType. (#170297)
OpenCL was added as an `EnvironmentType` in
https://github.com/llvm/llvm-project/pull/78655, but there is no
explanation as to why it was added as such, even after explicitly asking
in the PR
(https://github.com/llvm/llvm-project/pull/78655#issuecomment-2743162853).
This PR makes it an `OSType` instead, which feels more natural, and
updates tests accordingly.
---------
Co-authored-by: Marcos Maronas <marcos.maronas at intel.com>
Commit: 11c26133426fe6f8db87e1b404597413ad4dc57d
https://github.com/llvm/llvm-project/commit/11c26133426fe6f8db87e1b404597413ad4dc57d
Author: Sam Clegg <sbc at chromium.org>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Basic/Targets/WebAssembly.cpp
M clang/lib/Basic/Targets/WebAssembly.h
M clang/test/Driver/wasm-features.c
A lld/test/wasm/compact-imports.s
M lld/wasm/SyntheticSections.cpp
M lld/wasm/WriterUtils.cpp
M lld/wasm/WriterUtils.h
M llvm/include/llvm/Object/Wasm.h
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h
Log Message:
-----------
[WebAssembly] Add initial support for compact imports proposal (#176617)
This change adds initial support to libObject for reading compact
imports and support for writing compact imports in the linker.
There is minimal testing here since to tools like lllvm-readobj, and
obj2yaml don't currently report compact imports any differently.
See https://github.com/WebAssembly/compact-import-section
Commit: d354ea6add06a6fe806549a6cc18085d4f7adf24
https://github.com/llvm/llvm-project/commit/d354ea6add06a6fe806549a6cc18085d4f7adf24
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for buffer atomic cmpswap (#180666)
Commit: 12294021c32ababfc69b11f9845690c1815eabfb
https://github.com/llvm/llvm-project/commit/12294021c32ababfc69b11f9845690c1815eabfb
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Log Message:
-----------
[AMDGPU] Clean up VOP3PWMMA_Profile by removing XF32 related stuff (#180688)
XF32 is no longer supported in WMMA (the support was removed already)
Commit: c436838b64c4ff241ae9447b04b581e8900916a0
https://github.com/llvm/llvm-project/commit/c436838b64c4ff241ae9447b04b581e8900916a0
Author: Peter Rong <peterrong96 at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaInit.cpp
R clang/test/CodeGenObjCXX/arc-lifetime-rvalue-ref-binding.mm
R clang/test/SemaObjCXX/arc-lifetime-rvalue-ref-binding.mm
Log Message:
-----------
Revert "[clang] Fix sema on ObjCLifetime conversion (#178524)" (#180811)
This reverts commit bc3b4462f06b988d2f5b5dec997a3bc9fcf518b6.
Commit: 81a8363ae3144e4c59322492ac5f08a6ceeb106d
https://github.com/llvm/llvm-project/commit/81a8363ae3144e4c59322492ac5f08a6ceeb106d
Author: Yury Plyakhin <yury.plyakhin at intel.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
Log Message:
-----------
[Offload][SYCL] Refactoring: get rid of newline separators (#180274)
Previously, kernel symbols in offload binaries for SYCL had to be stored
as newline-separated strings and we had to use llvm::join and
line_iterator. It was needed because Offload Binary v1 format did not
store string value sizes. It is not necessary with Offload Binary v2
format, which stores string value size and hence eliminates the need for
newline separators.
Commit: c703f5a1632973dd6eade473614dfbed1b088d9e
https://github.com/llvm/llvm-project/commit/c703f5a1632973dd6eade473614dfbed1b088d9e
Author: Fatih BAKIR <mfatihbakir at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
A lld/test/wasm/large-debug-section.test
A lld/test/wasm/large-section.test
A lld/test/wasm/section-too-large.test
M lld/wasm/InputChunks.h
M lld/wasm/OutputSections.cpp
Log Message:
-----------
[lld][Webassembly] Avoid a signed overflow on large sections (#178287)
wasm sections sizes are specified as u32s, and thus can be as large as
4GB. wasm-ld currently stores the offset into a section as an int32_t
which overflows on large sections and results in a crash. This change
makes it a int64_t to accommodate any valid wasm section and allow
catching even larger sections instead of wrapping around.
This PR fixes the issue by storing the offset as a int64_t, as well as
adding extra checks to handle un-encodeable sections to fail instead of
producing garbage wasm binaries, and also adds lit tests to make sure it
works. I confirmed the test fails on `main` but passes with this fix.
Fixes: #178286
Commit: 4926bef3b797b79948514f67814edd0810eaf2e9
https://github.com/llvm/llvm-project/commit/4926bef3b797b79948514f67814edd0810eaf2e9
Author: hjagasiaAMD <harsha.jagasia at amd.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Log Message:
-----------
[AMDGPU] Use enum instead of literal for MadFmaMixFP16Pats (#180802)
Commit: c9ee81a59e73a760febecad9fb8ed5baa3bee5ef
https://github.com/llvm/llvm-project/commit/c9ee81a59e73a760febecad9fb8ed5baa3bee5ef
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M libc/benchmarks/CMakeLists.txt
M libc/benchmarks/gpu/CMakeLists.txt
Log Message:
-----------
[libc] Fix unit test dependency and respect LIBC_INCLUDE_BENCHMARKS (#180812)
Summary:
The unittest framework function is defined in another CMake file which
may not be present if the uesr disabled tests, provide a smaller version
here to keep this private. Also respesct the LIBC_INCLUDE_BENCHMARKS
variable.
Commit: 3db01f0373cd221be1bdbc1ca702b82ec6ce3603
https://github.com/llvm/llvm-project/commit/3db01f0373cd221be1bdbc1ca702b82ec6ce3603
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/include/clang/Options/Options.td
Log Message:
-----------
[LifetimeSafety] Remove "experimental" from option descriptions (#180723)
Commit: e678e00dd7f55703eeb9fedf71a19e8480a97b93
https://github.com/llvm/llvm-project/commit/e678e00dd7f55703eeb9fedf71a19e8480a97b93
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/test/lit.cfg.py
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[ProfCheck] Exclude passes not in standard pipelines (#180814)
This patch excludes seven more passes by default (rather than in
profcheck-xfail.txt) that are not in standard pipelines. We should
eventually get to these, but for now we can punt them.
Commit: d380b29a7c8b158d908abe0bf2d9a545039e1aba
https://github.com/llvm/llvm-project/commit/d380b29a7c8b158d908abe0bf2d9a545039e1aba
Author: RattataKing <amilywu2 at amd.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M mlir/include/mlir/Bindings/Python/NanobindUtils.h
M mlir/lib/Bindings/Python/Globals.cpp
M mlir/lib/Bindings/Python/IRAttributes.cpp
M mlir/lib/Bindings/Python/IRTypes.cpp
Log Message:
-----------
[MLIR][Python] Remove partial LLVM APIs in python bindings (5/n) (#180644)
This PR continues work from
https://github.com/llvm/llvm-project/pull/178290
Added local helper functions to avoid dependency on LLVM APIs.
---------
Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>
Commit: c322e374fee28c03525768cb281695938fe27ba2
https://github.com/llvm/llvm-project/commit/c322e374fee28c03525768cb281695938fe27ba2
Author: Thibault Monnier <thibaultmonni at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/include/llvm/ADT/APSInt.h
Log Message:
-----------
[ADT][NFC] Remove `else` after `return` in APSInt.h (#180790)
Align with the LLVM coding standard:
https://llvm.org/docs/CodingStandards.html#don-t-use-else-after-a-return
Commit: f668c9ff2b2775fa749b92985ad65f3f0f2132ed
https://github.com/llvm/llvm-project/commit/f668c9ff2b2775fa749b92985ad65f3f0f2132ed
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/test/CodeGen/RISCV/branch-opt.ll
Log Message:
-----------
[RISCV] Add (BSETI x0, 11) to isLoadImm for optimizeCondBranch (#180820)
optimizeCondBranch is looking for immediates that are 1 apart to rewrite
the branch by sharing a constant. BSETI x0, 11 can be used to produce
2048 which is one more than the largest positive constant produced by
addi.
Commit: f134b802ee5ec127f178dd0c93de40f7e83a1c27
https://github.com/llvm/llvm-project/commit/f134b802ee5ec127f178dd0c93de40f7e83a1c27
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
Log Message:
-----------
[RISCV] Refactor the MC layer SiFive VCIX classes. (#180433)
My initial goal was to name bits {19-15} as either rs1, vs1, or imm as
appropriate.
The VCIX instructions effectively have 3 properties that are combined:
the type of bits 19-15 (determined by funct3), how many vector registers
are sources (determined by funct6), and whether vd is a written or not
(determined by vm).
I found the VCIXInfo class very hard to read and understand. This patch
breaks it up into simpler steps and moves some properties to flags in
the existing VCIXType classs. A new VCIXRs1Info class is added to
contain the properties for bits 19-15. The VCIXInfo now combines the
properties from these 2 classes and the HaveOutputDst flag to create the
various things needed to build the final instruction. To reduce the
number of template arguments, the VCIXInfo is passed all the way down to
the base class.
Much of the refactoring in this patch was accomplished with AI. I have
looked at the diffs in the output tablegen files to verify it works as
expected. RISCVGenInstrInfo.inc only changes line number comments.
RISCVGenDisassembler.inc doesn't change at all as expected.
RISCVGenMCCodeEmitter.inc changes due to the different field names and
orders in the record.
Commit: 058cad9f82b5eb5d28fb165bb04e1209243972b7
https://github.com/llvm/llvm-project/commit/058cad9f82b5eb5d28fb165bb04e1209243972b7
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/MachineInstr.cpp
Log Message:
-----------
Add "noconvergent" flag to MachineInstr::print() (#180818)
Commit: 6e6f76026d1dc3e311aaa9a4514b6d378539beb9
https://github.com/llvm/llvm-project/commit/6e6f76026d1dc3e311aaa9a4514b6d378539beb9
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[MLIR][OpenMP] Fix unused variable warning
7c07cb6542a0c5e4340e09a9a247e3e5123c6567 introduced a variable created
in an if statement that is only used in an assertion. Per the coding
guidelines, mark it [[maybe_unused]].
Commit: 78490acb329de7f9515134d2936963cd73f19ccc
https://github.com/llvm/llvm-project/commit/78490acb329de7f9515134d2936963cd73f19ccc
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/bool-mask.ll
M llvm/test/Transforms/SLPVectorizer/X86/subvector-minbitwidth-unsigned-value.ll
Log Message:
-----------
[SLP]Support for zext i1 %x modeling as select %x, 1, 0
Model zext i1 %x to in as select i1 %x, in 1, in 0 in case, if there are
other select instructions, which can be combined into a bundle.
Fixes #178403
Recommit after revert in 993e1f66afcfe9da03bd813e669eada341b11d2f
Reviewers: hiraditya, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/180635
Commit: 51311865069d3924581d926326fb1170bc95c4c2
https://github.com/llvm/llvm-project/commit/51311865069d3924581d926326fb1170bc95c4c2
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/icmp-uniforms.ll
M llvm/test/Transforms/LoopVectorize/uncountable-early-exit-vplan.ll
Log Message:
-----------
[VPlan] Use UTC to auto-generate more VPlan checks.
Update more VPlan tests to use auto-generated check lines via new UTC
support.
Commit: 49c052363b4ff1a66dddee5525cdaeb215ccd244
https://github.com/llvm/llvm-project/commit/49c052363b4ff1a66dddee5525cdaeb215ccd244
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/test/CodeGen/RISCV/make-compressible-zilsd.mir
Log Message:
-----------
[RISCV] Use ADDD for GPR Pair Move with P (#180671)
Commit: 604e4adef0f09fec00a618f003d3a8108f4c576d
https://github.com/llvm/llvm-project/commit/604e4adef0f09fec00a618f003d3a8108f4c576d
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/test/CXX/drs/cwg0xx.cpp
M clang/test/CXX/drs/cwg10xx.cpp
M clang/test/CXX/drs/cwg13xx.cpp
M clang/test/CXX/drs/cwg15xx.cpp
M clang/test/CXX/drs/cwg16xx.cpp
A clang/test/CXX/drs/cwg1736.cpp
M clang/test/CXX/drs/cwg17xx.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg1xx.cpp
A clang/test/CXX/drs/cwg2026.cpp
M clang/test/CXX/drs/cwg20xx.cpp
A clang/test/CXX/drs/cwg2406.cpp
M clang/test/CXX/drs/cwg24xx.cpp
M clang/test/CXX/drs/cwg25xx.cpp
A clang/test/CXX/drs/cwg2881.cpp
M clang/test/CXX/drs/cwg28xx.cpp
M clang/test/CXX/drs/cwg2xx.cpp
A clang/test/CXX/drs/cwg329.cpp
A clang/test/CXX/drs/cwg390.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/test/CXX/drs/cwg4xx.cpp
M clang/test/CXX/drs/cwg5xx.cpp
M clang/test/CXX/drs/cwg6xx.cpp
M clang/test/CXX/drs/cwg7xx.cpp
A clang/test/CXX/drs/cwg98.cpp
M clang/test/CXX/drs/cwg9xx.cpp
Log Message:
-----------
[clang] Non-trivial fixes in C++ DR tests (#179813)
This is a follow-up to #179674, which applies various fixes across C++
DR tests uncovered by `-verify-directives` (#179835
).
Changes here serve double duty. First, they fix actual problems found by
`-verify-directives`, because I've been manually enforcing those rules
manually for quite a while. Second, they show typical problems and
possible solutions when you opt-in a test to use `-verify-directives`.
This PR focuses on interesting cases, as partial diagnostic matches,
which are trivial to fix, are fixed in boring #179674
Changes include:
1. Getting rid of instantiations at the end of TU that emit diagnostics:
either trigger them earlier, or move them to a separate file
2. Reordering of `expected-error` and `expected-note` to match the order
in which corresponding diagnsotics are emitted.
3. Eliminating leftover partial matches of diagnostic text
4. Removing some extension warnings, because C++ DR tests are not
interested in features backported to older language modes.
5. Fix for a hilarious case of CWG413 test, which was checking for a
note from a typo correction that happened in another test.
Commit: 550e0d1b0d7230350db783fbafbac17899e7474f
https://github.com/llvm/llvm-project/commit/550e0d1b0d7230350db783fbafbac17899e7474f
Author: adams381 <adams at nvidia.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGen/builtin-floating-point.c
A clang/test/CIR/CodeGen/builtins-elementwise.c
M clang/test/CIR/CodeGen/libc.c
M clang/test/CIR/CodeGenBuiltins/builtin-fcmp-sse.c
M clang/test/CIR/CodeGenBuiltins/builtin-isfpclass.c
Log Message:
-----------
[CIR] Add math and builtin intrinsics support (#175233)
This PR adds support for various math and builtin intrinsics to CIR:
## Changes
1. **Floating-point math intrinsics** - sqrt, cos, exp, exp2, floor,
fabs, sin, log, log2, log10, ceil, nearbyint, rint, round, trunc,
copysign, fma, fmax, fmin, pow
2. **Inverse trig, atan2, and roundeven** - acos, asin, atan, atan2,
roundeven
3. **Elementwise builtins** - add_sat, sub_sat, abs, max, min,
bitreverse, popcount, canonicalize
4. **Integer abs family** - abs, labs, llabs and their __builtin_
variants
5. **Prediction builtins** - __builtin_unpredictable
6. **Tests for rotate builtins** - Added OGCG checks for
__builtin_rotateleft/right
All changes include CIR, LLVM lowering, and OGCG test checks to verify
correctness.
Commit: 7f9965c73de2a3290f78f12f9d26360407dd2fd6
https://github.com/llvm/llvm-project/commit/7f9965c73de2a3290f78f12f9d26360407dd2fd6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fdiv.ll
Log Message:
-----------
InstCombine: Fix broken insert point for fdiv replacement (#180830)
SimplifyDemandedFPClass isn't properly adjusting the IRBuilder
insert point, so this could insert at the wrong point if the
simplification happens in one of the recursive calls. There are a few
more of these to fix.
Commit: a1fc5b4a48db440e37acd06972a65dd67a3b2b7c
https://github.com/llvm/llvm-project/commit/a1fc5b4a48db440e37acd06972a65dd67a3b2b7c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-incomplete-chains.ll
Log Message:
-----------
[VPlan] Reject partial reductions with invalid costs in getScaledReds. (#180438)
Check if costs for partial reductions are valid up-front in
getScaledReductions instead when transforming each link in the chain in
transformToPartialReduction. This ensures that we either transform all
entries in the chain together, or none via the existing invalidation
logic.
This fixes a crash when a link in the chain would have invalid cost, as
in the added test cases.
Fixes https://github.com/llvm/llvm-project/issues/180340.
PR: https://github.com/llvm/llvm-project/pull/180438
Commit: f9d622d552384d78a59b8a19f9bb9fd0f5851722
https://github.com/llvm/llvm-project/commit/f9d622d552384d78a59b8a19f9bb9fd0f5851722
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/test/Assembler/amdgcn-intrinsic-attributes.ll
Log Message:
-----------
AMDGPU: Add more attributes to wait event intrinsics (#180825)
Mark as nocallback nofree.
Commit: 5d2097ba88117443313d339a1f7595c6fc0b1024
https://github.com/llvm/llvm-project/commit/5d2097ba88117443313d339a1f7595c6fc0b1024
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDPProperties.td
M lldb/source/Plugins/Trace/intel-pt/TraceIntelPTProperties.td
Log Message:
-----------
[LLDB] Fix tablegen paths for KDP and IntelPT properties (#180835)
Fixes the build errors from #179524. Initially I used `Parent` as the
name but switched to `Path` later and forgot to update these files.
Commit: 61521a94af0de490466542a18cfcd3b1a1280711
https://github.com/llvm/llvm-project/commit/61521a94af0de490466542a18cfcd3b1a1280711
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Ensure countable region in narrowInterleaveGroups.
This tightens the legality checks. Currently should not have any impact,
but is needed to avoid mis-compiles in follow-up changes.
Commit: 8dde3051504cb9ae42e654bbce39001f3946beea
https://github.com/llvm/llvm-project/commit/8dde3051504cb9ae42e654bbce39001f3946beea
Author: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/Vector/Transforms/LoweringPatterns.h
M mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorMultiReduction.cpp
M mlir/test/Dialect/Vector/vector-multi-reduction-lowering.mlir
Log Message:
-----------
[mlir][vector] Add finer grained populate methods for multi_reduction (NFC). (#180750)
Thiese commits add three more populate methods for
`vector.multi_reduction`'s lowering patterns:
* populateVectorMultiReductionTransformationPatterns
* populateVectorMultiReductionFlatteningPatterns
* populateVectorMultiReductionUnrollingPatterns
These methods have a
finer level of granularity and allow users to select between unrolling,
flattening, and applying transformations that would set up operations
for unrolling and flattening.
The previous populateVectorMultiReductionLoweringPatterns method
is rewritten in terms of these new methods.
Commit: 643c2356940abc89373f4fd1570e0afc2500bdd6
https://github.com/llvm/llvm-project/commit/643c2356940abc89373f4fd1570e0afc2500bdd6
Author: Faijul Amin <md.faijul.amin at intel.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
A llvm/test/CodeGen/SPIRV/legalization/icmp_extended_int.ll
Log Message:
-----------
[SPIRV] Legalize extended integers for compare instructions. (#180254)
Currently, legalization fails for integer (lower than 8 bit) comparison
with extensions, for example, SPV_INTEL_int4. This PR extends integers
for supported extensions.
---------
Co-authored-by: Michal Paszkowski <michal at michalpaszkowski.com>
Commit: 5a8144da98f7c8585bd6a58af167e3824f2b647d
https://github.com/llvm/llvm-project/commit/5a8144da98f7c8585bd6a58af167e3824f2b647d
Author: Mathew Joseph <69132893+mathew1046 at users.noreply.github.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/llogbl.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/llogbl.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/llogbl.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor llogbl to be header-only (#175376)
Fixes: #175361
Commit: 7892f84b1f2f30a85d642b87f4b1051a703b1e8c
https://github.com/llvm/llvm-project/commit/7892f84b1f2f30a85d642b87f4b1051a703b1e8c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/test/MC/RISCV/rv32zbb-aliases-valid.s
M llvm/test/MC/RISCV/rv64zbb-aliases-valid.s
Log Message:
-----------
[RISCV] Remove non-alias tests from rv32zbb-aliases-valid.s and rv64zbb-aliases-valid.s. NFC (#180317)
These are real instructions and are tested in rv32zbb-only-valid.s,
rv64-zbb-valid.s, or rvzbb-valid.s
I think this is some artifact of the refactoring that happened when some
of the Bitmanip extensions/instructions were removed years ago.
Commit: 04bb0e2c654e8d54fc5a5a9276050fb0c8c734b7
https://github.com/llvm/llvm-project/commit/04bb0e2c654e8d54fc5a5a9276050fb0c8c734b7
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/log10f16.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/log10f16.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/log10f16.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor log10f16 to Header Only. (#176523)
closes : #176510
Commit: 31e1bcfd09736f1fa66b4b52fd7b6669a9a35aa4
https://github.com/llvm/llvm-project/commit/31e1bcfd09736f1fa66b4b52fd7b6669a9a35aa4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVPostRAExpandPseudoInsts.cpp
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rv64p.ll
Log Message:
-----------
[RISCV] Add basic scalar support for MERGE, MVM, and MVMN from P extension (#180677)
These are 3 variations of the same operation with a different operand
tied to the destination register. We need to pick the one that
minimizes the number of mvs.
To do this we take the approach used by AArch64 to select between
BIT, BIF, and BSL which the same operations. We define a pseudo
with no tied constraint and expand it after register allocation based
on where the destination register ended up. If the destination
register is none of the operands, we'll insert a mv.
I've replaced RISCVISD::MVM with RISCVISD::MERGE and updated the operand
order accordingly. I find the MERGE name easier to read so I've made it
the canonical name.
Ideally we could use commuteInstructionImpl and the
TwoAddressInstructionPass
to select the opcode before register allocation. That only works if
you can commute exactly 2 operands and maybe change the opcode in the MI
representation of any of the forms to get to the either of the other 2
forms.
That is not possible. We'd need to define 3 more pseudoinstructions
with different permutations.
With the current approach it might be possible that we insert a mv
not because all of the operand registers we needed by later
instructions,
but because the register allocator needed to put the result in a
different register. It's possible a different allocation for other
instructions might have avoided the mv.
I wrote the patch based on the AArch64, but the tests were generated
by AI.
Commit: 057ace39151e68c8167c854dab123861291d4a48
https://github.com/llvm/llvm-project/commit/057ace39151e68c8167c854dab123861291d4a48
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/log1pf.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/log1pf.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/log1pf.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor log1pf to Header Only. (#176525)
closes : #176512
Commit: 1e086d06e984e83988470208afeb52977ff3b2ce
https://github.com/llvm/llvm-project/commit/1e086d06e984e83988470208afeb52977ff3b2ce
Author: Alexander Weinrauch <alexander.weinrauch at amd.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/AMDGPU/dagcombine-reassociate-multi-memop.ll
Log Message:
-----------
[DAGCombiner] Fix crash in reassociationCanBreakAddressingModePattern for multi-memop nodes (#180268)
Two code paths in `reassociationCanBreakAddressingModePattern` were
missing a `hasUniqueMemOperand()` guard before calling
`getAddressSpace()`. Note that on `L1214` we already have the same guard
in place.
`getAddressSpace()` chains through `getPointerInfo()` to
`getMemOperand()`, which asserts that the node has exactly one memory
operand.
Commit: 979132a02d146ec79e2f046e31877516d7f32d20
https://github.com/llvm/llvm-project/commit/979132a02d146ec79e2f046e31877516d7f32d20
Author: Alexander Weinrauch <alexander.weinrauch at amd.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.mir
Log Message:
-----------
[AMDGPU] Fix LDS address correction in promoteConstantOffsetToImm for async stores (#180220)
`updateAsyncLDSAddress`, introduces by
https://github.com/llvm/llvm-project/pull/176816, previously only
handled async loads , where the LDS address is in the `vdst` operand.
Therefore Async stores produced a nullptr dereference since the LDS
address is in `vdata` for those instructions.
---------
Co-authored-by: Jay Foad <jay.foad at gmail.com>
Commit: 7068b522545e553ed29a43d8126a3a54191ab8a3
https://github.com/llvm/llvm-project/commit/7068b522545e553ed29a43d8126a3a54191ab8a3
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/log10f.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/log10f.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/log10f.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor log10f to Header Only. (#176520)
closes : #176511
Commit: 76d9c2b40da35c0ac841891ac4f1aea7f655cac0
https://github.com/llvm/llvm-project/commit/76d9c2b40da35c0ac841891ac4f1aea7f655cac0
Author: Anonmiraj <nabilmalek48 at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/log2f16.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/log2f16.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/log2f16.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor log2f16 to Header Only. (#176526)
closes : #176513
Commit: 0b1b6c22585c79bea71fba77dd067d5369823a8f
https://github.com/llvm/llvm-project/commit/0b1b6c22585c79bea71fba77dd067d5369823a8f
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M compiler-rt/lib/hwasan/hwasan_fuchsia.cpp
Log Message:
-----------
[hwasan][Fuchsia] Use GetCurrentThread (#180602)
The hook passed to __sanitizer_thread_exit_hook will be null if we ever
call thrd/pthread_exit from the initial thread since
__sanitizer_before_thread_create_hook is never called on the initial
thread. Rather than using the hook, we can use the normal hwasan
machinery for getting the current pointer rather than the hook.
Commit: e318fc8ce415ad93afb7c11d4ad60252038ac427
https://github.com/llvm/llvm-project/commit/e318fc8ce415ad93afb7c11d4ad60252038ac427
Author: Marco Elver <elver at google.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/lib/Analysis/ThreadSafetyCommon.cpp
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
Log Message:
-----------
Thread Safety Analysis: Fix crash with wide string literals (#180349)
The SExprBuilder was previously using StringLiteral::getString() to
extract the value of string literals. This method asserts that the
string is a narrow string (char width == 1):
```
clang/include/clang/AST/Expr.h:1872: StringRef clang::StringLiteral::getString() const: Assertion `(isUnevaluated() || getCharByteWidth() == 1) && "This function is used in places that assume strings use char"' failed.
[...]
#9 0x0000556247fcfe3e clang::threadSafety::SExprBuilder::translate(clang::Stmt const*, clang::threadSafety::SExprBuilder::CallingContext*)
[...]
```
This fails when using wide string literals as in the new test case
added.
Switch to using StringLiteral::getBytes(), which provides the raw byte
representation of the string. This is sufficient to compare expressions
for identity.
Fixes: https://github.com/llvm/llvm-project/pull/148551
Commit: f80e3b3d7eebc5651fba656aab02485a9c0822b4
https://github.com/llvm/llvm-project/commit/f80e3b3d7eebc5651fba656aab02485a9c0822b4
Author: Maksim Panchenko <maks at fb.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Passes/PatchEntries.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
Log Message:
-----------
[BOLT] Keep folded functions in BinaryFunctions map. NFC (#180392)
In relocation mode, keep folded functions in the BinaryFunctions map
instead of erasing them. Mark them as folded using setFolded() and skip
emitting them.
Commit: b62a97abb7ae1acb77f63f698d4c5cefca0e4f96
https://github.com/llvm/llvm-project/commit/b62a97abb7ae1acb77f63f698d4c5cefca0e4f96
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/log2f.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/log2f.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/log2f.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor log2f to Header Only. (#176527)
closes : #176514
Commit: d8487e4b17fefba56b4d4dca60ff6acb8cd8c814
https://github.com/llvm/llvm-project/commit/d8487e4b17fefba56b4d4dca60ff6acb8cd8c814
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/pow.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/pow.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/pow.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor pow to Header Only. (#176529)
closes : #176516
Commit: 246f18778e9c1342083bd96ad4e523a3daf1c9b1
https://github.com/llvm/llvm-project/commit/246f18778e9c1342083bd96ad4e523a3daf1c9b1
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
A clang/Maintainers.md
R clang/Maintainers.rst
M clang/docs/CMakeLists.txt
A clang/docs/Maintainers.md
R clang/docs/Maintainers.rst
M llvm/docs/Contributing.rst
Log Message:
-----------
[docs] Move Maintainers.rst to Maintainers.md in preparation to reformat
This change intentionally produces malformatted documentation, and is
only present to ensure git detects the file rename for blame purposes.
Commit: 44f24849961630a500f76f65b047f6483f0b2024
https://github.com/llvm/llvm-project/commit/44f24849961630a500f76f65b047f6483f0b2024
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/Maintainers.md
M clang/docs/Maintainers.md
Log Message:
-----------
[clang] Convert Maintainers.md from rst to markdown
I link-ified the github usernames as well, and tried to match the LLVM
maintainer file formatting.
This move may cause issues with CMake incremental builds, but this can
be fixed by deleting the entire build director, or if you prefer to be
more targetted, just `build/tools/clang/docs`, since that will have a
stale Maintainers.rst file otherwise.
Commit: 90d49d3782b287574af1c47d3ef2073dcbd72ba8
https://github.com/llvm/llvm-project/commit/90d49d3782b287574af1c47d3ef2073dcbd72ba8
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M lldb/include/lldb/Utility/UUID.h
M lldb/unittests/Utility/UUIDTest.cpp
Log Message:
-----------
[lldb] Implement DenseMapInfo for UUID (#180854)
Implement DenseMapInfo for UUID so that we can use UUIDs as keys in
DenseMap and DenseSet.
Commit: dc5ab0f149bd34984e2afb8cb6dd8d5fe1a75a37
https://github.com/llvm/llvm-project/commit/dc5ab0f149bd34984e2afb8cb6dd8d5fe1a75a37
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/powf.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/powf.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/powf.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor powf to Header Only. (#176531)
closes : https://github.com/llvm/llvm-project/issues/176517
Commit: 59bcec2685158fbc591834a100edc79ab5b29595
https://github.com/llvm/llvm-project/commit/59bcec2685158fbc591834a100edc79ab5b29595
Author: Ben Langmuir <blangmuir at apple.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M llvm/include/llvm/CAS/OnDiskKeyValueDB.h
M llvm/lib/CAS/ActionCaches.cpp
M llvm/lib/CAS/OnDiskKeyValueDB.cpp
M llvm/lib/CAS/UnifiedOnDiskCache.cpp
M llvm/test/tools/llvm-cas/validation.test
M llvm/unittests/CAS/OnDiskKeyValueDBTest.cpp
Log Message:
-----------
[llvm][cas] Validate OnDiskKeyValueDB against the corresponding OnDiskGraphDB (#180852)
We were previously using the primary OnDiskGraphDB when validating the
upstream OnDiskKeyValueDB, which is incorrect since the values being
stored are direct offsets and therefore cannot be used across DBs
without translating to a hash value first.
rdar://170067863
Commit: ac1220f860a8639881e28ba7824e90ba1155d4f4
https://github.com/llvm/llvm-project/commit/ac1220f860a8639881e28ba7824e90ba1155d4f4
Author: Michael Jones <michaelrj at google.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/config/baremetal/config.json
M libc/config/config.json
M libc/docs/configure.rst
M libc/docs/dev/printf_behavior.rst
M libc/src/stdio/printf_core/converter_utils.h
M libc/src/stdio/printf_core/core_structs.h
M libc/src/stdio/printf_core/parser.h
M libc/src/stdio/printf_core/write_int_converter.h
M libc/test/UnitTest/PrintfMatcher.cpp
M libc/test/src/stdio/printf_core/parser_test.cpp
M libc/test/src/stdio/sprintf_test.cpp
Log Message:
-----------
[libc] Add option to disable printf bit int (#180832)
Requested as a binary size optimization. Updates the parser, converter
utils, config, tests, and docs.
Commit: 7952896611fb7e5e4dade24c9fc5583c7dc42363
https://github.com/llvm/llvm-project/commit/7952896611fb7e5e4dade24c9fc5583c7dc42363
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
Log Message:
-----------
[mlir][acc] Fixed side effects for [first]private/reduction. (#180791)
This patch moves the definitions of memory effects for the data
entry/exit operations into C++ code. The main reason for this
is to modify the effects of [first]private and reduction
operations: they should not access `CurrentDeviceIdResource`
when they are located inside a compute construct.
The ODS to C++ migration was done with AI assistance. I reviewed
these changes and made sure it was an NFC change. After that
I modified [first]private and reduction implementations.
Commit: 0c884aa2f52576bd2f03605371d7dc934f0906e5
https://github.com/llvm/llvm-project/commit/0c884aa2f52576bd2f03605371d7dc934f0906e5
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
Log Message:
-----------
[FlowSensitive] [StatusOr] Add test fixture target to Bazel (#180302)
This can be used to make sure downstream extensions to the model still
pass the unit tests.
Commit: 0f6ee50e4eadfd1984a9454f322d5a2f4b03dbc4
https://github.com/llvm/llvm-project/commit/0f6ee50e4eadfd1984a9454f322d5a2f4b03dbc4
Author: Priyanshu Kumar <10b.priyanshu at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
A clang/test/CIR/CodeGenBuiltins/X86/avx512vbmi2-builtins.c
M clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c
Log Message:
-----------
[CIR][X86] Add support for vpshl/vpshr builtins (#179538)
This patch also adds support for fshl/fshr operations so that
vpshl/vpshr intrinsics can lower to them
Part of: #167765
Commit: 7e734da3460bc6f3474a16b4385332021ee6cdc2
https://github.com/llvm/llvm-project/commit/7e734da3460bc6f3474a16b4385332021ee6cdc2
Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: 2026-02-11 (Wed, 11 Feb 2026)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/RISCV/math-builtins.c
M clang/test/CodeGen/builtins.c
M clang/test/CodeGen/math-builtins-long.c
M clang/test/CodeGenOpenCL/builtins-f16.cl
M clang/test/Headers/__clang_hip_math.hip
M clang/test/Headers/amdgcn_openmp_device_math_constexpr.cpp
M clang/test/Headers/nvptx_device_math_complex.c
M clang/test/Headers/nvptx_device_math_complex.cpp
Log Message:
-----------
Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (#113133)
See: https://github.com/llvm/llvm-project/pull/112852
We will define llvm.minnum and llvm.maxnum with +0.0>-0.0, by default,
while libc doesn't require it.
Commit: 91224e35fdd9f43faf87880749d693394b942fcb
https://github.com/llvm/llvm-project/commit/91224e35fdd9f43faf87880749d693394b942fcb
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M libc/config/baremetal/config.json
M libc/config/config.json
Log Message:
-----------
[libc] Disable math exceptions for baremetal (#180863)
To further save code size for baremetal builds, disable math function
exceptions.
Commit: 1a45b52115927076204f0c911cc34c16bfb17e4a
https://github.com/llvm/llvm-project/commit/1a45b52115927076204f0c911cc34c16bfb17e4a
Author: Zinovy Nis <zinovy.nis at gmail.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M clang-tools-extra/clang-doc/Generators.cpp
M clang-tools-extra/clang-doc/Generators.h
M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
Log Message:
-----------
[clang-doc] Apply modernize-use-string-view to the code (#180332)
Commit: 0aa4a016d6bb4da7b30005a1ee98c9763f9ff7da
https://github.com/llvm/llvm-project/commit/0aa4a016d6bb4da7b30005a1ee98c9763f9ff7da
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2026-02-11 (Wed, 11 Feb 2026)
Changed paths:
M mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
M mlir/test/Dialect/SparseTensor/invalid.mlir
Log Message:
-----------
[mlir][sparse] Fix a crash if block not have terminator (#180741)
This PR fixes a crash in `verifyNumBlockArgs` if region not end with a
terminator. Fixes #180720.
Commit: 690aa65125ac2412480cc839feab9d46dcf91148
https://github.com/llvm/llvm-project/commit/690aa65125ac2412480cc839feab9d46dcf91148
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2026-02-11 (Wed, 11 Feb 2026)
Changed paths:
M mlir/lib/Dialect/Shape/IR/Shape.cpp
M mlir/test/Dialect/Shape/canonicalize.mlir
Log Message:
-----------
[mlir][shape] Fix crash in ShapeOfOpToConstShapeOp (#180737)
This PR fixes a crash when `shape.shape_of` op has static arg and shape
result type. Fixes #180719.
Commit: f932646bf6c7a7d528d9ef0d253500b6ce1cb14f
https://github.com/llvm/llvm-project/commit/f932646bf6c7a7d528d9ef0d253500b6ce1cb14f
Author: Mitchel Dickerson <mitchel.dickerson at mediatek.com>
Date: 2026-02-11 (Wed, 11 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
A llvm/test/Transforms/SimplifyCFG/branch-weight-overflow.ll
Log Message:
-----------
[SimplifyCFG][PGO] Add missing overflow check to ConstantFoldTerminator (#178964)
Branch weight metadata can overflow when folding large branch weights.
Updated branch weights to uint64_t, added check for overflow, and then
set branch weights using setFittedBranchWeights to ensure branch weight
metadata is not lost.
Commit: 1094775692bf6d44358629ded7c4d779785b2d3e
https://github.com/llvm/llvm-project/commit/1094775692bf6d44358629ded7c4d779785b2d3e
Author: woruyu <1214539920 at qq.com>
Date: 2026-02-11 (Wed, 11 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx512bwvl-arith.ll
Log Message:
-----------
[X86] Fix lower1BitShuffle blend-with-zero shuffles to AND mask (#180472)
### Summary
This PR resolves https://github.com/llvm/llvm-project/issues/180426.
Commit: bdec31b3c0ed0029fb7a10a204cb1aa9664ea633
https://github.com/llvm/llvm-project/commit/bdec31b3c0ed0029fb7a10a204cb1aa9664ea633
Author: woruyu <1214539920 at qq.com>
Date: 2026-02-10 (Tue, 10 Feb 2026)
Changed paths:
M .ci/buildbot/worker.py
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
M .ci/premerge_advisor_explain.py
M .github/CODEOWNERS
M .github/new-prs-labeler.yml
M .github/renovate.json
M .github/workflows/commit-create-issue.py
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/docs.yml
M .github/workflows/ids-check.yml
M .github/workflows/issue-release-workflow.yml
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/libcxx-check-generated-files.yml
M .github/workflows/libcxx-run-benchmarks.yml
A .github/workflows/prune-branches.yml
A .github/workflows/prune-unused-branches.py
M .github/workflows/release-asset-audit.yml
M .github/workflows/release-binaries-all.yml
M .github/workflows/release-binaries.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-tasks.yml
M .github/workflows/upload-release-artifact/action.yml
M .gitignore
M .mailmap
M SECURITY.md
M bolt/docs/CommandLineArgumentReference.md
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Passes/IdenticalCodeFolding.cpp
M bolt/lib/Passes/LongJmp.cpp
M bolt/lib/Passes/PLTCall.cpp
M bolt/lib/Passes/PatchEntries.cpp
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M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/FormatString.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/ASTMatchers/ASTMatchersInternal.cpp
M clang/lib/ASTMatchers/Dynamic/Registry.cpp
A clang/lib/Analysis/AnnexKDetection.cpp
M clang/lib/Analysis/CFG.cpp
A clang/lib/Analysis/CFGBackEdges.cpp
M clang/lib/Analysis/CMakeLists.txt
M clang/lib/Analysis/CloneDetection.cpp
M clang/lib/Analysis/FlowSensitive/AdornedCFG.cpp
M clang/lib/Analysis/FlowSensitive/Models/UncheckedStatusOrAccessModel.cpp
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/lib/Analysis/FlowSensitive/TypeErasedDataflowAnalysis.cpp
M clang/lib/Analysis/LifetimeSafety/CMakeLists.txt
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/Dataflow.h
M clang/lib/Analysis/LifetimeSafety/Facts.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
M clang/lib/Analysis/LifetimeSafety/LifetimeSafety.cpp
M clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
M clang/lib/Analysis/LifetimeSafety/LoanPropagation.cpp
A clang/lib/Analysis/LifetimeSafety/MovedLoans.cpp
M clang/lib/Analysis/LifetimeSafety/Origins.cpp
M clang/lib/Analysis/Scalable/CMakeLists.txt
A clang/lib/Analysis/Scalable/Serialization/SerializationFormat.cpp
A clang/lib/Analysis/Scalable/Serialization/SerializationFormatRegistry.cpp
A clang/lib/Analysis/Scalable/TUSummary/EntitySummary.cpp
A clang/lib/Analysis/Scalable/TUSummary/ExtractorRegistry.cpp
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/Analysis/ThreadSafetyCommon.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/DarwinSDKInfo.cpp
M clang/lib/Basic/IdentifierTable.cpp
M clang/lib/Basic/OffloadArch.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Basic/OperatorPrecedence.cpp
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Basic/Targets/Mips.cpp
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/Basic/Targets/PPC.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/Basic/Targets/WebAssembly.cpp
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/TokenKinds.cpp
M clang/lib/CIR/CodeGen/Address.h
M clang/lib/CIR/CodeGen/CIRGenAsm.cpp
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
A clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
A clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
A clang/lib/CIR/CodeGen/CIRGenCUDARuntime.cpp
A clang/lib/CIR/CodeGen/CIRGenCUDARuntime.h
M clang/lib/CIR/CodeGen/CIRGenCXXABI.h
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.h
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.h
M clang/lib/CIR/CodeGen/CIRGenConstantEmitter.h
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenException.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenFunctionInfo.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/CodeGen/TargetInfo.cpp
M clang/lib/CIR/CodeGen/TargetInfo.h
M clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp
M clang/lib/CIR/Dialect/Transforms/CMakeLists.txt
M clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
R clang/lib/CIR/Dialect/Transforms/LoweringPrepareCXXABI.h
R clang/lib/CIR/Dialect/Transforms/LoweringPrepareItaniumCXXABI.cpp
A clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRCXXABI.h
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerItaniumCXXABI.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerModule.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerModule.h
M clang/lib/CIR/Dialect/Transforms/TargetLowering/TargetLoweringInfo.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/TargetLoweringInfo.h
M clang/lib/CIR/Interfaces/CIRLoopOpInterface.cpp
M clang/lib/CIR/Lowering/CIRPasses.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGCall.h
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/CodeGenPGO.cpp
M clang/lib/CodeGen/CodeGenPGO.h
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/lib/CodeGen/TargetBuiltins/PPC.cpp
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/CodeGen/TargetBuiltins/WebAssembly.cpp
M clang/lib/CodeGen/TargetInfo.cpp
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/CodeGen/Targets/AMDGPU.cpp
M clang/lib/CodeGen/Targets/DirectX.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
M clang/lib/DependencyScanning/ModuleDepCollector.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AIX.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.cpp
M clang/lib/Driver/ToolChains/Arch/ARM.cpp
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/lib/Driver/ToolChains/Arch/Mips.cpp
M clang/lib/Driver/ToolChains/Arch/X86.cpp
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/FreeBSD.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/HIPSPV.h
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/Linux.h
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MSVC.h
M clang/lib/Driver/ToolChains/OHOS.cpp
M clang/lib/Driver/ToolChains/SPIRV.cpp
M clang/lib/Driver/ToolChains/ZOS.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/FrontendAction.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Frontend/PrintPreprocessedOutput.cpp
M clang/lib/Headers/amo.h
M clang/lib/Headers/arm_acle.h
M clang/lib/Headers/crc32intrin.h
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Headers/larchintrin.h
M clang/lib/Headers/opencl-c-base.h
M clang/lib/Headers/opencl-c.h
M clang/lib/Headers/ptrauth.h
M clang/lib/Interpreter/IncrementalExecutor.cpp
M clang/lib/Lex/DependencyDirectivesScanner.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/PPLexerChange.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Lex/TokenConcatenation.cpp
M clang/lib/Lex/TokenLexer.cpp
M clang/lib/Parse/CMakeLists.txt
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParsePragma.cpp
A clang/lib/Parse/ParseReflect.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/OpenCLBuiltins.td
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaAttr.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaModule.cpp
M clang/lib/Sema/SemaObjCProperty.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaPPC.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/Serialization/ModuleManager.cpp
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
M clang/lib/StaticAnalyzer/Checkers/CheckSecuritySyntaxOnly.cpp
M clang/lib/StaticAnalyzer/Checkers/GenericTaintChecker.cpp
A clang/lib/StaticAnalyzer/Checkers/OpaqueSTLFunctionsModeling.cpp
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
A clang/lib/StaticAnalyzer/Checkers/WebKit/NoDeleteChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugSuppression.cpp
M clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ProgramState.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/lib/Tooling/DependencyScanningTool.cpp
M clang/lib/Tooling/InterpolatingCompilationDatabase.cpp
M clang/test/APINotes/Inputs/Headers/Methods.apinotes
M clang/test/APINotes/Inputs/Headers/Methods.h
M clang/test/APINotes/methods.cpp
M clang/test/AST/ByteCode/builtin-align-cxx.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
A clang/test/AST/ByteCode/builtin-object-size-codegen.c
M clang/test/AST/ByteCode/builtin-object-size-codegen.cpp
M clang/test/AST/ByteCode/builtins.c
M clang/test/AST/ByteCode/c.c
M clang/test/AST/ByteCode/codegen.cpp
M clang/test/AST/ByteCode/complex.cpp
A clang/test/AST/ByteCode/constexpr-steps.cpp
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/AST/ByteCode/cxx23.cpp
M clang/test/AST/ByteCode/cxx26.cpp
M clang/test/AST/ByteCode/floats.cpp
M clang/test/AST/ByteCode/functions.cpp
A clang/test/AST/ByteCode/gh176549.cpp
M clang/test/AST/ByteCode/intap.cpp
M clang/test/AST/ByteCode/invalid.cpp
A clang/test/AST/ByteCode/libcxx/end-primitive-array-root-lifetime.cpp
M clang/test/AST/ByteCode/lifetimes26.cpp
M clang/test/AST/ByteCode/memberpointers.cpp
M clang/test/AST/ByteCode/new-delete.cpp
A clang/test/AST/ByteCode/object-size-flex-array.c
A clang/test/AST/ByteCode/pass-object-size.c
M clang/test/AST/ByteCode/placement-new.cpp
M clang/test/AST/ByteCode/records.cpp
M clang/test/AST/ByteCode/shifts.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
A clang/test/AST/HLSL/Texture2D-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
A clang/test/AST/HLSL/ast-dump-availability-attr.hlsl
M clang/test/AST/HLSL/matrix-constructors.hlsl
A clang/test/AST/HLSL/matrix-elementexpr-tree-transform.hlsl
M clang/test/AST/HLSL/matrix-general-initializer.hlsl
A clang/test/AST/HLSL/matrix-member-access-scalar.hlsl
A clang/test/AST/HLSL/matrix-member-access-swizzle-ast-dump-json.hlsl
A clang/test/AST/HLSL/matrix-member-access-swizzle-ast-print.hlsl
A clang/test/AST/HLSL/matrix-member-access-swizzle.hlsl
A clang/test/AST/HLSL/pch_with_matrix_element_accessor.hlsl
M clang/test/AST/ast-dump-attr-json.cpp
M clang/test/AST/ast-dump-decl-stmts.cpp
M clang/test/AST/ms-constexpr-new.cpp
A clang/test/Analysis/Checkers/WebKit/nodelete-annotation.cpp
M clang/test/Analysis/Checkers/WebKit/retain-ptr-ctor-adopt-use-arc.mm
M clang/test/Analysis/Checkers/WebKit/retain-ptr-ctor-adopt-use.mm
M clang/test/Analysis/Checkers/WebKit/uncounted-obj-arg.cpp
M clang/test/Analysis/Inputs/system-header-simulator-cxx-std-suppression.h
M clang/test/Analysis/Inputs/system-header-simulator.h
M clang/test/Analysis/LifetimeSafety/benchmark.py
M clang/test/Analysis/analyzer-config.c
M clang/test/Analysis/block-in-critical-section.cpp
A clang/test/Analysis/diagnostics/opaque-stl-functions-modeling.cpp
M clang/test/Analysis/lifetime-cfg-output.cpp
M clang/test/Analysis/scopes-cfg-output.cpp
A clang/test/Analysis/security-deprecated-buffer-handling-report-modes.c
A clang/test/Analysis/std-c-library-functions-char-uchar-conv.c
A clang/test/Analysis/store-union-aggregates.c
A clang/test/Analysis/suppress-namespace-redecl-core.cpp
A clang/test/Analysis/suppress-namespace-redecl-webkit.cpp
M clang/test/Analysis/uninit-vals.cpp
A clang/test/C/C2y/n3605.c
A clang/test/C/C2y/n3605_1.c
A clang/test/C/C2y/n3605_2.c
A clang/test/CIR/CodeGen/address-of.cpp
A clang/test/CIR/CodeGen/alloc-size.c
M clang/test/CIR/CodeGen/atomic-scoped.c
M clang/test/CIR/CodeGen/atomic.c
A clang/test/CIR/CodeGen/builtin-bit-cast.cpp
A clang/test/CIR/CodeGen/builtin-floating-point.c
A clang/test/CIR/CodeGen/builtin-memchr.c
A clang/test/CIR/CodeGen/builtins-elementwise.c
M clang/test/CIR/CodeGen/cleanup.cpp
A clang/test/CIR/CodeGen/clear-cache.c
M clang/test/CIR/CodeGen/coro-task.cpp
A clang/test/CIR/CodeGen/default-func-attrs-cmd-line.cpp
M clang/test/CIR/CodeGen/dynamic-cast.cpp
M clang/test/CIR/CodeGen/inline-asm.c
A clang/test/CIR/CodeGen/integer-overflow.c
M clang/test/CIR/CodeGen/label-values.c
M clang/test/CIR/CodeGen/libc.c
A clang/test/CIR/CodeGen/misc-attrs.cpp
M clang/test/CIR/CodeGen/new.cpp
A clang/test/CIR/CodeGen/no-builtin-attr-automatic.cpp
A clang/test/CIR/CodeGen/no-builtin-attr.cpp
A clang/test/CIR/CodeGen/no-odr-use.cpp
A clang/test/CIR/CodeGen/noreturn.cpp
A clang/test/CIR/CodeGen/offload-convergent-attr.cu
A clang/test/CIR/CodeGen/optsize-func-attr.cpp
M clang/test/CIR/CodeGen/pointer-to-data-member-cast.cpp
A clang/test/CIR/CodeGen/pointer-to-member-func-cast.cpp
A clang/test/CIR/CodeGen/pointer-to-member-func-cmp.cpp
M clang/test/CIR/CodeGen/pointer-to-member-func.cpp
A clang/test/CIR/CodeGen/save-reg-params-func-attr.cpp
A clang/test/CIR/CodeGen/side-effect.cpp
A clang/test/CIR/CodeGen/trap-func-name-attr.cpp
M clang/test/CIR/CodeGen/trivial-ctor-const-init.cpp
M clang/test/CIR/CodeGen/vtt.cpp
A clang/test/CIR/CodeGen/zero-call-used-regs-func-attr.cpp
M clang/test/CIR/CodeGenBuiltins/AArch64/acle_sve_dup.c
A clang/test/CIR/CodeGenBuiltins/AArch64/neon/fullfp16.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512-reduceIntrin.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512-reduceMinMaxIntrin.c
A clang/test/CIR/CodeGenBuiltins/X86/avx512-select-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512fp16-builtins.c
A clang/test/CIR/CodeGenBuiltins/X86/avx512vbmi2-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512vl-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512vlbf16-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512vlfp16-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/keylocker.c
M clang/test/CIR/CodeGenBuiltins/X86/ms-x86-intrinsics.c
A clang/test/CIR/CodeGenBuiltins/X86/prefetchw-builtins.c
A clang/test/CIR/CodeGenBuiltins/X86/rdrand-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/sse-builtins.c
M clang/test/CIR/CodeGenBuiltins/builtin-fcmp-sse.c
M clang/test/CIR/CodeGenBuiltins/builtin-isfpclass.c
M clang/test/CIR/CodeGenBuiltins/builtin_bit.cpp
M clang/test/CIR/CodeGenBuiltins/builtin_call.cpp
M clang/test/CIR/CodeGenBuiltins/builtin_new_delete.cpp
M clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c
A clang/test/CIR/CodeGenCUDA/Inputs/cuda.h
A clang/test/CIR/CodeGenCUDA/filter-decl.cu
A clang/test/CIR/CodeGenCUDA/kernel-call.cu
A clang/test/CIR/CodeGenCUDA/kernel-stub-name.cu
A clang/test/CIR/CodeGenCUDA/nvptx-basic.cu
A clang/test/CIR/CodeGenHLSL/matrix-element-expr-load.hlsl
M clang/test/CIR/CodeGenOpenMP/not-yet-implemented.c
A clang/test/CIR/CodeGenOpenMP/omp-llvmir.c
M clang/test/CIR/CodeGenOpenMP/parallel.c
M clang/test/CIR/IR/atomic.cir
A clang/test/CIR/IR/cleanup-scope.cir
A clang/test/CIR/IR/eh-flat.cir
A clang/test/CIR/IR/invalid-cast.cir
A clang/test/CIR/IR/invalid-eh-flat.cir
A clang/test/CIR/IR/invalid-memcpy.cir
M clang/test/CIR/IR/invalid-struct.cir
A clang/test/CIR/IR/libc-memchr.cir
A clang/test/CIR/IR/libc-memcpy.cir
M clang/test/CIR/IR/method-attr.cir
A clang/test/CIR/Lowering/libc.cir
A clang/test/CIR/Transforms/flatten-cleanup-scope-multi-exit.cir
A clang/test/CIR/Transforms/flatten-cleanup-scope-nyi.cir
A clang/test/CIR/Transforms/flatten-cleanup-scope-simple.cir
M clang/test/CXX/basic/basic.link/p3.cpp
M clang/test/CXX/basic/basic.scope/basic.scope.namespace/p2.cpp
M clang/test/CXX/drs/cwg0xx.cpp
M clang/test/CXX/drs/cwg10xx.cpp
M clang/test/CXX/drs/cwg11xx.cpp
M clang/test/CXX/drs/cwg13xx.cpp
M clang/test/CXX/drs/cwg14xx.cpp
M clang/test/CXX/drs/cwg15xx.cpp
M clang/test/CXX/drs/cwg16xx.cpp
A clang/test/CXX/drs/cwg1736.cpp
M clang/test/CXX/drs/cwg17xx.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg19xx.cpp
M clang/test/CXX/drs/cwg1xx.cpp
A clang/test/CXX/drs/cwg2026.cpp
M clang/test/CXX/drs/cwg20xx.cpp
M clang/test/CXX/drs/cwg22xx.cpp
M clang/test/CXX/drs/cwg23xx.cpp
A clang/test/CXX/drs/cwg2406.cpp
M clang/test/CXX/drs/cwg24xx.cpp
M clang/test/CXX/drs/cwg25xx.cpp
M clang/test/CXX/drs/cwg26xx.cpp
M clang/test/CXX/drs/cwg27xx.cpp
A clang/test/CXX/drs/cwg2881.cpp
M clang/test/CXX/drs/cwg28xx.cpp
A clang/test/CXX/drs/cwg2947.cpp
M clang/test/CXX/drs/cwg29xx.cpp
M clang/test/CXX/drs/cwg2xx.cpp
M clang/test/CXX/drs/cwg30xx.cpp
A clang/test/CXX/drs/cwg329.cpp
A clang/test/CXX/drs/cwg390.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/test/CXX/drs/cwg4xx.cpp
M clang/test/CXX/drs/cwg5xx.cpp
M clang/test/CXX/drs/cwg6xx.cpp
M clang/test/CXX/drs/cwg7xx.cpp
A clang/test/CXX/drs/cwg98.cpp
M clang/test/CXX/drs/cwg9xx.cpp
M clang/test/CXX/lex/lex.pptoken/p3-2a.cpp
M clang/test/CXX/module/basic/basic.link/module-declaration.cpp
A clang/test/CXX/module/cpp.pre/p1.cpp
M clang/test/CXX/module/dcl.dcl/dcl.module/dcl.module.import/p1.cppm
M clang/test/CXX/special/class.temporary/p6.cpp
M clang/test/ClangScanDeps/P1689.cppm
A clang/test/ClangScanDeps/build-session-validation-outdated-module.c
M clang/test/ClangScanDeps/header_stat_before_open.m
M clang/test/ClangScanDeps/headerwithdirname.cpp
M clang/test/ClangScanDeps/headerwithdirnamefollowedbyinclude.cpp
M clang/test/ClangScanDeps/macro-expansions.cpp
A clang/test/ClangScanDeps/modules-full-by-mult-mod-names-diagnostics.c
M clang/test/ClangScanDeps/modules.cpp
A clang/test/ClangScanDeps/prune-scanning-modules.m
M clang/test/ClangScanDeps/regular_cdb.cpp
M clang/test/ClangScanDeps/relative_directory.cpp
M clang/test/ClangScanDeps/subframework_header_dir_symlink.m
M clang/test/ClangScanDeps/target-filename.cpp
M clang/test/ClangScanDeps/vfsoverlay.cpp
M clang/test/CodeGen/AArch64/args.cpp
M clang/test/CodeGen/AArch64/byval-temp.c
M clang/test/CodeGen/AArch64/neon-intrinsics.c
A clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/AArch64/pure-scalable-args-empty-union.c
M clang/test/CodeGen/AArch64/pure-scalable-args.c
M clang/test/CodeGen/AArch64/struct-coerce-using-ptr.cpp
M clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
M clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp
M clang/test/CodeGen/AMDGPU/amdgpu-atomic-float.c
M clang/test/CodeGen/AMDGPU/full-bf16.c
A clang/test/CodeGen/ARM/build-attributes.c
M clang/test/CodeGen/LoongArch/bitint.c
M clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
M clang/test/CodeGen/LoongArch/lasx/builtin-approximate-alias.c
M clang/test/CodeGen/LoongArch/lasx/builtin-approximate.c
M clang/test/CodeGen/LoongArch/lasx/builtin.c
A clang/test/CodeGen/LoongArch/targetattr-la32.c
A clang/test/CodeGen/LoongArch/targetattr-la64.c
R clang/test/CodeGen/LoongArch/targetattr.c
A clang/test/CodeGen/Mips/musttail-forward-declaration.c
A clang/test/CodeGen/Mips/musttail-pic.c
A clang/test/CodeGen/Mips/musttail-visibility.c
A clang/test/CodeGen/Mips/musttail-weak.c
A clang/test/CodeGen/Mips/musttail.c
M clang/test/CodeGen/PowerPC/builtins-amo-err.c
M clang/test/CodeGen/PowerPC/builtins-bcd-format-conversion.c
M clang/test/CodeGen/PowerPC/builtins-ppc-amo.c
M clang/test/CodeGen/PowerPC/ppc-amo-header.c
M clang/test/CodeGen/PowerPC/ppc64-vector.c
M clang/test/CodeGen/RISCV/attr-rvv-vector-bits-cast.c
M clang/test/CodeGen/RISCV/bitint.c
M clang/test/CodeGen/RISCV/math-builtins.c
M clang/test/CodeGen/RISCV/riscv-abi.cpp
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.cpp
M clang/test/CodeGen/RISCV/riscv32-abi.c
M clang/test/CodeGen/RISCV/riscv32-vararg.c
M clang/test/CodeGen/RISCV/riscv64-abi.c
M clang/test/CodeGen/RISCV/riscv64-vararg.c
M clang/test/CodeGen/RISCV/rvb-intrinsics/zbc.c
M clang/test/CodeGen/RISCV/rvb-intrinsics/zbkc.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/non-overloaded/vfncvt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/non-overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/non-overloaded/vfwcvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/overloaded/vfncvt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/non-policy/overloaded/vfwcvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/non-overloaded/vfncvt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/non-overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/non-overloaded/vfwcvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/overloaded/vfncvt.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfofp8min/policy/overloaded/vfwcvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/vfncvt.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/vfncvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/vfwcvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/vfncvt.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/vfncvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/vfwcvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/policy/non-overloaded/vfncvt.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/policy/non-overloaded/vfncvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/policy/non-overloaded/vfwcvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/policy/overloaded/vfncvt.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/policy/overloaded/vfncvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/policy/overloaded/vfwcvtbf16.c
M clang/test/CodeGen/Sparc/sparcv9-abi.c
M clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c
M clang/test/CodeGen/SystemZ/fp16.c
M clang/test/CodeGen/SystemZ/sync-builtins-i128-16Al.c
M clang/test/CodeGen/SystemZ/systemz-abi-vector.c
M clang/test/CodeGen/SystemZ/systemz-inline-asm.c
A clang/test/CodeGen/WebAssembly/builtins-table-externref.c
A clang/test/CodeGen/WebAssembly/builtins-table-funcref.c
R clang/test/CodeGen/WebAssembly/builtins-table.c
M clang/test/CodeGen/X86/cx-complex-range.c
M clang/test/CodeGen/X86/sse42-builtins.c
M clang/test/CodeGen/X86/x86_32-arguments-win32.c
M clang/test/CodeGen/X86/x86_64-arguments-win32.c
M clang/test/CodeGen/aapcs64-align.cpp
M clang/test/CodeGen/amdgpu-abi-version.c
M clang/test/CodeGen/arm-aapcs-vfp.c
M clang/test/CodeGen/arm-abi-vector.c
M clang/test/CodeGen/arm64-abi-vector.c
M clang/test/CodeGen/arm64-arguments.c
M clang/test/CodeGen/arm64-microsoft-arguments.cpp
M clang/test/CodeGen/arm64ec-varargs.c
M clang/test/CodeGen/arm_acle.c
M clang/test/CodeGen/armv7k-abi.c
M clang/test/CodeGen/atomic-arm64.c
M clang/test/CodeGen/atomic-ops.c
M clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c
M clang/test/CodeGen/attr-ifunc.c
M clang/test/CodeGen/attr-ifunc.cpp
M clang/test/CodeGen/attr-noundef.cpp
M clang/test/CodeGen/builtin-rotate.c
M clang/test/CodeGen/builtin_float_strictfp.c
M clang/test/CodeGen/builtins-arm64.c
M clang/test/CodeGen/builtins-extended-image.c
M clang/test/CodeGen/builtins-image-load.c
M clang/test/CodeGen/builtins-nvptx-ptx60.cu
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/CodeGen/builtins.c
A clang/test/CodeGen/compound-assign-atomic-bool.c
M clang/test/CodeGen/cx-complex-range.c
M clang/test/CodeGen/denormalfpmode-f32.c
M clang/test/CodeGen/denormalfpmode.c
M clang/test/CodeGen/ext-int-cc.c
M clang/test/CodeGen/fp-function-attrs.cpp
M clang/test/CodeGen/fp16-ops-strictfp.c
M clang/test/CodeGen/ifunc.c
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGen/lifetime-sanitizer.c
M clang/test/CodeGen/link-builtin-bitcode.c
M clang/test/CodeGen/math-builtins-long.c
M clang/test/CodeGen/math-libcalls-tbaa-indirect-args.c
M clang/test/CodeGen/mingw-long-double.c
M clang/test/CodeGen/ms_abi.c
M clang/test/CodeGen/nvptx_attributes.c
M clang/test/CodeGen/paren-list-agg-init.cpp
M clang/test/CodeGen/pass-by-value-noalias.c
A clang/test/CodeGen/pragma-export.c
A clang/test/CodeGen/pragma-export.cpp
M clang/test/CodeGen/ptrauth-in-c-struct.c
M clang/test/CodeGen/ptrauth-intrinsics.c
M clang/test/CodeGen/regcall.c
M clang/test/CodeGen/regcall2.c
M clang/test/CodeGen/regcall4.c
A clang/test/CodeGen/riscv-be-data-layout.c
M clang/test/CodeGen/scoped-atomic-ops.c
A clang/test/CodeGen/stack-protector-vars.cpp
M clang/test/CodeGen/target-addrspace.cpp
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/CodeGen/target-data.c
M clang/test/CodeGen/ubsan-function-sugared.cpp
M clang/test/CodeGen/ubsan-function.cpp
M clang/test/CodeGen/varargs-with-nonzero-default-address-space.c
M clang/test/CodeGen/vectorcall.c
A clang/test/CodeGen/wasm-fp16.c
M clang/test/CodeGen/win-fp128.c
M clang/test/CodeGen/win64-i128.c
M clang/test/CodeGen/windows-swiftcall.c
A clang/test/CodeGen/zos-pragmas.c
A clang/test/CodeGen/zos-pragmas.cpp
M clang/test/CodeGenCUDA/amdgpu-bf16.cu
M clang/test/CodeGenCUDA/convergent.cu
M clang/test/CodeGenCUDA/flush-denormals.cu
M clang/test/CodeGenCUDA/link-builtin-bitcode-denormal-fp-mode.cu
M clang/test/CodeGenCUDA/propagate-attributes.cu
M clang/test/CodeGenCUDA/spirv-amdgcn-bf16.cu
M clang/test/CodeGenCXX/aarch64-mangle-sve-vectors.cpp
M clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp
M clang/test/CodeGenCXX/amdgcn-func-arg.cpp
M clang/test/CodeGenCXX/arm-cc.cpp
M clang/test/CodeGenCXX/attr-target-mv-inalloca.cpp
M clang/test/CodeGenCXX/builtins.cpp
M clang/test/CodeGenCXX/control-flow-in-stmt-expr.cpp
M clang/test/CodeGenCXX/copy-initialization.cpp
M clang/test/CodeGenCXX/cxx2a-destroying-delete.cpp
A clang/test/CodeGenCXX/destructor-dead-on-return.cpp
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M clang/test/CodeGenCXX/empty-nontrivially-copyable.cpp
M clang/test/CodeGenCXX/exceptions-seh.cpp
M clang/test/CodeGenCXX/externc-ifunc-resolver.cpp
M clang/test/CodeGenCXX/fastcall.cpp
M clang/test/CodeGenCXX/homogeneous-aggregates.cpp
M clang/test/CodeGenCXX/inalloca-lambda.cpp
M clang/test/CodeGenCXX/inalloca-overaligned.cpp
M clang/test/CodeGenCXX/inalloca-vector.cpp
M clang/test/CodeGenCXX/inheriting-constructor.cpp
M clang/test/CodeGenCXX/lifetime-sanitizer.cpp
M clang/test/CodeGenCXX/member-function-pointer-calls.cpp
M clang/test/CodeGenCXX/microsoft-abi-arg-order.cpp
M clang/test/CodeGenCXX/microsoft-abi-byval-thunks.cpp
M clang/test/CodeGenCXX/microsoft-abi-member-pointers.cpp
M clang/test/CodeGenCXX/microsoft-abi-sret-and-byval.cpp
M clang/test/CodeGenCXX/microsoft-abi-unknown-arch.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors2.cpp
M clang/test/CodeGenCXX/ms-property.cpp
M clang/test/CodeGenCXX/pass-by-value-noalias.cpp
M clang/test/CodeGenCXX/ptrauth-apple-kext-indirect-virtual-dtor-call.cpp
M clang/test/CodeGenCXX/ptrauth-qualifier-struct.cpp
A clang/test/CodeGenCXX/reflection-mangle-itanium.cpp
A clang/test/CodeGenCXX/reflection-mangle-ms.cpp
M clang/test/CodeGenCXX/regparm.cpp
A clang/test/CodeGenCXX/sanitize-trap-loop.cpp
A clang/test/CodeGenCXX/tmp-md-nodes3.cpp
M clang/test/CodeGenCXX/trivial_abi.cpp
M clang/test/CodeGenCXX/uncopyable-args.cpp
M clang/test/CodeGenCXX/vtt-address-space.cpp
M clang/test/CodeGenCXX/wasm-args-returns.cpp
M clang/test/CodeGenCXX/wasm-reftypes-mangle.cpp
M clang/test/CodeGenCXX/windows-x86-swiftcall.cpp
A clang/test/CodeGenCXX/zos-typename.cpp
M clang/test/CodeGenCoroutines/coro-await-elidable.cpp
M clang/test/CodeGenHIP/amdgpu-barrier-type.hip
A clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-cooperative-atomics-templated.hip
A clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-load-monitor-templated.hip
M clang/test/CodeGenHIP/builtins-make-buffer-rsrc.hip
A clang/test/CodeGenHIP/device-function-huge-arg-ret.hip
M clang/test/CodeGenHIP/hip_weak_alias.cpp
M clang/test/CodeGenHIP/printf.cpp
M clang/test/CodeGenHIP/printf_nonhostcall.cpp
M clang/test/CodeGenHIP/sanitize-undefined-null.hip
M clang/test/CodeGenHIP/spirv-amdgcn-ballot.cpp
M clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixExplicitTruncation.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixImplicitTruncation.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptConstSwizzle.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptDynamicSwizzle.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptGetter.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptSetter.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixSplat.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/matrix-type-indexing.hlsl
M clang/test/CodeGenHLSL/BoolMatrix.hlsl
M clang/test/CodeGenHLSL/basic_types.hlsl
M clang/test/CodeGenHLSL/builtins/WaveActiveBallot.hlsl
A clang/test/CodeGenHLSL/builtins/WavePrefixCountBits.hlsl
A clang/test/CodeGenHLSL/builtins/WavePrefixSum.hlsl
M clang/test/CodeGenHLSL/builtins/acos-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/asin-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/atan-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/atan2-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/ceil-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/cos-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/cosh-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/degrees-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/distance.hlsl
M clang/test/CodeGenHLSL/builtins/exp-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/exp2-overloads.hlsl
A clang/test/CodeGenHLSL/builtins/f32tof16-builtin.hlsl
A clang/test/CodeGenHLSL/builtins/f32tof16.hlsl
M clang/test/CodeGenHLSL/builtins/floor-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/frac-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/hlsl_resource_t.hlsl
M clang/test/CodeGenHLSL/builtins/isinf-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/length.hlsl
M clang/test/CodeGenHLSL/builtins/log-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/log10-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/log2-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/max-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/min-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/normalize-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/pow-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/radians-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/reflect.hlsl
M clang/test/CodeGenHLSL/builtins/refract.hlsl
M clang/test/CodeGenHLSL/builtins/round-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/rsqrt-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/sin-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/sinh-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/smoothstep.hlsl
M clang/test/CodeGenHLSL/builtins/sqrt-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/step-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/tan-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/tanh-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/trunc-overloads.hlsl
M clang/test/CodeGenHLSL/implicit-norecurse-attrib.hlsl
A clang/test/CodeGenHLSL/matrix-member-one-based-accessor-scalar-load.hlsl
A clang/test/CodeGenHLSL/matrix-member-one-based-accessor-scalar-store.hlsl
A clang/test/CodeGenHLSL/matrix-member-one-based-swizzle-load.hlsl
A clang/test/CodeGenHLSL/matrix-member-one-based-swizzle-store.hlsl
A clang/test/CodeGenHLSL/matrix-member-zero-based-accessor-scalar-load.hlsl
A clang/test/CodeGenHLSL/matrix-member-zero-based-accessor-scalar-store.hlsl
A clang/test/CodeGenHLSL/matrix-member-zero-based-swizzle-load.hlsl
A clang/test/CodeGenHLSL/matrix-member-zero-based-swizzle-store.hlsl
A clang/test/CodeGenHLSL/resources-declared-only-once.hlsl
M clang/test/CodeGenHLSL/resources/ByteAddressBuffers-constructors.hlsl
M clang/test/CodeGenHLSL/resources/ByteAddressBuffers-methods.hlsl
A clang/test/CodeGenHLSL/resources/Texture2D.sample.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_geps.hlsl
M clang/test/CodeGenObjC/fragile-arc.m
M clang/test/CodeGenObjC/ivar-layout-64.m
M clang/test/CodeGenObjC/ivar-layout-array0-struct.m
M clang/test/CodeGenObjC/ivar-layout-no-optimize.m
M clang/test/CodeGenObjC/mrc-weak.m
M clang/test/CodeGenObjC/pass-by-value-noalias.m
M clang/test/CodeGenObjC/weak-in-c-struct.m
M clang/test/CodeGenObjCXX/mrc-weak.mm
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M clang/test/CodeGenObjCXX/property-objects.mm
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M clang/test/OpenMP/for_firstprivate_codegen.cpp
M clang/test/OpenMP/for_lastprivate_codegen.cpp
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M clang/test/OpenMP/for_reduction_codegen.cpp
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M clang/test/OpenMP/parallel_copyin_codegen.cpp
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M clang/test/OpenMP/parallel_for_linear_codegen.cpp
M clang/test/OpenMP/parallel_master_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_firstprivate_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_lastprivate_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/parallel_private_codegen.cpp
M clang/test/OpenMP/parallel_reduction_codegen.cpp
M clang/test/OpenMP/scope_codegen.cpp
M clang/test/OpenMP/sections_firstprivate_codegen.cpp
M clang/test/OpenMP/sections_lastprivate_codegen.cpp
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M clang/test/OpenMP/simd_private_taskloop_codegen.cpp
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M clang/test/OpenMP/single_private_codegen.cpp
A clang/test/OpenMP/target_data_use_device_ptr_fallback_ast_print.cpp
A clang/test/OpenMP/target_data_use_device_ptr_fallback_codegen.cpp
A clang/test/OpenMP/target_data_use_device_ptr_fallback_messages.cpp
M clang/test/OpenMP/target_has_device_addr_codegen.cpp
M clang/test/OpenMP/target_in_reduction_codegen.cpp
M clang/test/OpenMP/target_map_array_of_structs_with_nested_mapper_codegen.cpp
M clang/test/OpenMP/target_map_array_section_of_structs_with_nested_mapper_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp
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M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_private_codegen.cpp
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R clang/test/OpenMP/target_update_strided_messages.c
A clang/test/OpenMP/target_update_strided_messages_from.c
A clang/test/OpenMP/target_update_strided_messages_to.c
R clang/test/OpenMP/target_update_strided_multiple_messages.c
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A clang/test/OpenMP/target_update_strided_partial_messages_to.c
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A clang/test/Sema/warn-lifetime-safety-fixits.cpp
A clang/test/Sema/warn-lifetime-safety-invalidations.cpp
M clang/test/Sema/warn-lifetime-safety-missing-origin-stats.cpp
A clang/test/Sema/warn-lifetime-safety-noescape.cpp
M clang/test/Sema/warn-lifetime-safety-suggestions.cpp
M clang/test/Sema/warn-lifetime-safety.cpp
M clang/test/Sema/warn-outof-range-assign-enum.c
M clang/test/Sema/warn-thread-safety-analysis.c
A clang/test/Sema/wasm-funcref-table.c
A clang/test/Sema/wave-reduce-builtins-validate-amdgpu.cl
M clang/test/SemaCUDA/vararg.cu
M clang/test/SemaCXX/alignof-sizeof-reference.cpp
M clang/test/SemaCXX/alloc-token.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
M clang/test/SemaCXX/builtin-bswapg.cpp
M clang/test/SemaCXX/constant-expression-cxx2a.cpp
A clang/test/SemaCXX/constexpr-builtin-stdc-rotate.cpp
A clang/test/SemaCXX/crash-GH170433.cpp
M clang/test/SemaCXX/cxx2b-consteval-propagate.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
M clang/test/SemaCXX/cxx2c-fold-exprs.cpp
M clang/test/SemaCXX/enable_if.cpp
M clang/test/SemaCXX/ifunc-has-attribute.cpp
M clang/test/SemaCXX/ms-constexpr-invalid.cpp
M clang/test/SemaCXX/ms-constexpr-new.cpp
M clang/test/SemaCXX/ms-constexpr.cpp
M clang/test/SemaCXX/underlying_type.cpp
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-fold-conditional.cpp
A clang/test/SemaCXX/warn-unsafe-buffer-usage-format-attr-builtins.cpp
A clang/test/SemaCXX/warn-unsafe-buffer-usage-in-static-sized-array.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-libc-functions.cpp
A clang/test/SemaHIP/builtins-amdgcn-gfx1250-cooperative-atomics-templated.hip
A clang/test/SemaHIP/builtins-amdgcn-gfx1250-load-monitor-templated.hip
A clang/test/SemaHIP/hip-builtin-lvalue-to-rvalue.hip
A clang/test/SemaHIP/shared-variable-too-large.hip
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffers.hlsl
A clang/test/SemaHLSL/BuiltIns/WavePrefixCountBits-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/WavePrefixSum-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/f32tof16-errors.hlsl
A clang/test/SemaHLSL/Language/EmptyInitializers.hlsl
A clang/test/SemaHLSL/Texture2D-Sema.hlsl
A clang/test/SemaHLSL/matrix-member-access-errors.hlsl
A clang/test/SemaOpenCL/amdgpu-variables-too-large-for-address-space.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-param.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-wave32.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error.cl
A clang/test/SemaOpenCL/builtins-amdgcn-s-wait-event.cl
M clang/test/SemaOpenCL/builtins-amdgcn-wave32-func-attr.cl
M clang/test/SemaOpenCL/extension-version.cl
M clang/test/SemaOpenCL/fdeclare-opencl-builtins.cl
M clang/test/SemaOpenCL/storageclass.cl
M clang/test/SemaTemplate/concepts.cpp
M clang/test/TableGen/target-builtins-prototype-parser.td
A clang/test/Tooling/clang-extdef-mapping-no-args.cpp
A clang/test/Tooling/clang-extdef-mapping.cpp
M clang/test/lit.cfg.py
M clang/test/utils/update_cc_test_checks/Inputs/basic-cplusplus.cpp.expected
M clang/test/utils/update_cc_test_checks/Inputs/explicit-template-instantiation.cpp.expected
M clang/tools/cir-opt/cir-opt.cpp
M clang/tools/cir-translate/cir-translate.cpp
M clang/tools/clang-extdef-mapping/ClangExtDefMapGen.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
M clang/tools/libclang/CXCursor.cpp
M clang/unittests/AST/DeclPrinterTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersNodeTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
A clang/unittests/Analysis/CFGBackEdgesTest.cpp
M clang/unittests/Analysis/CMakeLists.txt
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
M clang/unittests/Analysis/FlowSensitive/TypeErasedDataflowAnalysisTest.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
M clang/unittests/Analysis/Scalable/CMakeLists.txt
A clang/unittests/Analysis/Scalable/Registries/FancyAnalysisData.cpp
A clang/unittests/Analysis/Scalable/Registries/MockSerializationFormat.cpp
A clang/unittests/Analysis/Scalable/Registries/MockSerializationFormat.h
A clang/unittests/Analysis/Scalable/Registries/MockSummaryExtractor1.cpp
A clang/unittests/Analysis/Scalable/Registries/MockSummaryExtractor2.cpp
A clang/unittests/Analysis/Scalable/Registries/MockTUSummaryBuilder.h
A clang/unittests/Analysis/Scalable/Registries/SerializationFormatRegistryTest.cpp
A clang/unittests/Analysis/Scalable/Registries/SummaryExtractorRegistryTest.cpp
M clang/unittests/Basic/DarwinSDKInfoTest.cpp
M clang/unittests/DirectoryWatcher/CMakeLists.txt
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestJava.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Frontend/CompilerInstanceTest.cpp
M clang/unittests/Interpreter/OutOfProcessInterpreterTests.cpp
M clang/unittests/Lex/DependencyDirectivesScannerTest.cpp
M clang/unittests/Lex/ModuleDeclStateTest.cpp
M clang/unittests/Lex/PPDependencyDirectivesTest.cpp
M clang/unittests/Serialization/CMakeLists.txt
A clang/unittests/Serialization/NamespaceLookupTest.cpp
M clang/utils/TableGen/CIRLoweringEmitter.cpp
M clang/utils/TableGen/ClangBuiltinsEmitter.cpp
M clang/utils/analyzer/entrypoint.py
M clang/utils/reduce-clang-crash.py
M clang/www/builtins.py
M clang/www/c_status.html
M clang/www/cxx_dr_status.html
M clang/www/cxx_status.html
M clang/www/get_started.html
M clang/www/hacking.html
A cmake/Modules/HandleDoxygen.cmake
M compiler-rt/CMakeLists.txt
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/include/CMakeLists.txt
M compiler-rt/include/fuzzer/FuzzedDataProvider.h
A compiler-rt/include/sanitizer/tysan_interface.h
M compiler-rt/include/sanitizer/ubsan_interface.h
M compiler-rt/lib/asan/asan_allocator.cpp
M compiler-rt/lib/asan/asan_allocator.h
M compiler-rt/lib/asan/asan_descriptions.cpp
M compiler-rt/lib/asan/asan_fake_stack.cpp
M compiler-rt/lib/asan/asan_flags.cpp
M compiler-rt/lib/asan/asan_malloc_linux.cpp
M compiler-rt/lib/asan/asan_rtl.cpp
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/aarch64/sme-libc-opt-memcpy-memmove-sve.S
M compiler-rt/lib/builtins/aarch64/sme-libc-opt-memcpy-memmove.S
A compiler-rt/lib/builtins/arm/aeabi_uread4.S
A compiler-rt/lib/builtins/arm/aeabi_uread8.S
A compiler-rt/lib/builtins/arm/aeabi_uwrite4.S
A compiler-rt/lib/builtins/arm/aeabi_uwrite8.S
M compiler-rt/lib/builtins/cpu_model/x86.c
A compiler-rt/lib/builtins/ppc/init_ifuncs.c
M compiler-rt/lib/dfsan/dfsan_allocator.cpp
M compiler-rt/lib/dfsan/dfsan_custom.cpp
M compiler-rt/lib/dfsan/dfsan_platform.h
M compiler-rt/lib/hwasan/hwasan.h
M compiler-rt/lib/hwasan/hwasan_fuchsia.cpp
M compiler-rt/lib/hwasan/hwasan_linux.cpp
M compiler-rt/lib/orc/elfnix_platform.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_allocator.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_allocator_dlsym.h
M compiler-rt/lib/sanitizer_common/sanitizer_allocator_internal.h
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_posix_libcdep.cpp
M compiler-rt/lib/sanitizer_common/symbolizer/scripts/build_symbolizer.sh
M compiler-rt/lib/sanitizer_common/tests/sanitizer_common_test.cpp
M compiler-rt/lib/sanitizer_common/tests/sanitizer_procmaps_mac_test.cpp
M compiler-rt/lib/scudo/standalone/primary64.h
M compiler-rt/lib/scudo/standalone/secondary.h
M compiler-rt/lib/tsan/rtl/tsan_flags.cpp
M compiler-rt/lib/ubsan/CMakeLists.txt
A compiler-rt/lib/ubsan/ubsan_loop_detect.cpp
A compiler-rt/test/asan/TestCases/AIX/lit.local.cfg.py
A compiler-rt/test/asan/TestCases/AIX/strict-init-order-warning.cpp
A compiler-rt/test/asan/TestCases/AIX/vec_malloc_calloc.cpp
M compiler-rt/test/asan/TestCases/initialization-bug-no-global.cpp
A compiler-rt/test/builtins/Unit/arm/aeabi_unaligned_access_test.c
A compiler-rt/test/builtins/Unit/ppc/aix_ifunc.c
M compiler-rt/test/cfi/CMakeLists.txt
M compiler-rt/test/cfi/lit.cfg.py
M compiler-rt/test/cfi/lit.site.cfg.py.in
A compiler-rt/test/cfi/trap_loop_signal_handler.inc
M compiler-rt/test/dfsan/custom.cpp
M compiler-rt/test/dfsan/lit.cfg.py
M compiler-rt/test/dfsan/origin_endianness.c
M compiler-rt/test/dfsan/pair.cpp
M compiler-rt/test/dfsan/struct.c
A compiler-rt/test/orc/TestCases/Linux/Generic/ctor-dtor.cpp
A compiler-rt/test/profile/AIX/ifunc.c
M compiler-rt/test/profile/instrprof-binary-correlate.c
M compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_allowlist_ignorelist.cpp
M compiler-rt/test/ubsan/TestCases/Misc/Posix/static-link.cpp
M cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/Inputs/simplified_template_names.cpp
M cross-project-tests/debuginfo-tests/llvm-prettyprinters/lldb/CMakeLists.txt
A cross-project-tests/debuginfo-tests/llvm-prettyprinters/lldb/expected.cpp
A cross-project-tests/debuginfo-tests/llvm-prettyprinters/lldb/expected.test
M cross-project-tests/dtlto/archive.test
M cross-project-tests/dtlto/archives-mixed-lto-modes-test.test
M cross-project-tests/dtlto/archives-same-module-id.test
A cross-project-tests/dtlto/fat-lto-objects.test
M cross-project-tests/dtlto/link-archive-thin.test
A cross-project-tests/dtlto/link-savetemps.test
A cross-project-tests/dtlto/local_codegen_and_wait.py
A cross-project-tests/dtlto/savetemps-lock.test
A cross-project-tests/dtlto/savetemps.test
M cross-project-tests/dtlto/signal.test
A cross-project-tests/dtlto/test_temps.py
M cross-project-tests/lit.cfg.py
M flang-rt/CMakeLists.txt
M flang-rt/README.md
M flang-rt/include/flang-rt/runtime/terminator.h
M flang-rt/include/flang-rt/runtime/type-info.h
M flang-rt/lib/runtime/CMakeLists.txt
M flang-rt/lib/runtime/assign.cpp
M flang-rt/lib/runtime/character.cpp
M flang-rt/lib/runtime/copy.cpp
M flang-rt/lib/runtime/derived.cpp
M flang-rt/lib/runtime/descriptor-io.cpp
M flang-rt/lib/runtime/extensions.cpp
M flang-rt/lib/runtime/external-unit.cpp
M flang-rt/lib/runtime/file.cpp
M flang-rt/lib/runtime/io-api.cpp
M flang-rt/lib/runtime/io-stmt.cpp
M flang-rt/lib/runtime/iostat.cpp
M flang-rt/lib/runtime/main.cpp
M flang-rt/lib/runtime/pseudo-unit.cpp
M flang-rt/lib/runtime/stop.cpp
M flang-rt/lib/runtime/terminator.cpp
M flang-rt/lib/runtime/time-intrinsic.cpp
M flang-rt/lib/runtime/type-info.cpp
M flang-rt/lib/runtime/unit.h
M flang-rt/unittests/Runtime/CharacterTest.cpp
M flang-rt/unittests/Runtime/ExternalIOTest.cpp
M flang-rt/unittests/Runtime/Reduction.cpp
M flang/docs/Directives.md
M flang/docs/Extensions.md
M flang/docs/FortranStandardsSupport.md
M flang/docs/ParallelMultiImageFortranRuntime.md
M flang/include/flang/Evaluate/check-expression.h
M flang/include/flang/Evaluate/initial-image.h
M flang/include/flang/Evaluate/real.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Frontend/CodeGenOptions.def
M flang/include/flang/Lower/ConvertCall.h
M flang/include/flang/Lower/DirectivesCommon.h
M flang/include/flang/Lower/LoweringOptions.def
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
A flang/include/flang/Optimizer/Analysis/ArraySectionAnalyzer.h
M flang/include/flang/Optimizer/Builder/HLFIRTools.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Character.h
M flang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
M flang/include/flang/Optimizer/Dialect/CMakeLists.txt
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
A flang/include/flang/Optimizer/Dialect/FIROperationMoveOpInterface.h
A flang/include/flang/Optimizer/Dialect/FIROperationMoveOpInterface.td
M flang/include/flang/Optimizer/Dialect/FIROps.h
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/FIROpsSupport.h
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/include/flang/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.h
M flang/include/flang/Optimizer/OpenACC/Passes.h
M flang/include/flang/Optimizer/OpenACC/Passes.td
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.h
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.h
M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCUtils.h
M flang/include/flang/Optimizer/OpenMP/Passes.td
M flang/include/flang/Optimizer/OpenMP/Support/RegisterOpenMPExtensions.h
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/options.h
M flang/include/flang/Parser/parse-tree-visitor.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Parser/preprocessor.h
M flang/include/flang/Runtime/character.h
M flang/include/flang/Runtime/extensions.h
M flang/include/flang/Runtime/iostat-consts.h
M flang/include/flang/Runtime/stop.h
M flang/include/flang/Semantics/dump-expr.h
M flang/include/flang/Semantics/expression.h
M flang/include/flang/Semantics/semantics.h
M flang/include/flang/Semantics/tools.h
M flang/include/flang/Support/Fortran-features.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/fold-integer.cpp
M flang/lib/Evaluate/fold.cpp
M flang/lib/Evaluate/initial-image.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/shape.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/ConvertType.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Lower/Runtime.cpp
M flang/lib/Lower/Support/PrivateReductionUtils.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
A flang/lib/Optimizer/Analysis/ArraySectionAnalyzer.cpp
M flang/lib/Optimizer/Analysis/CMakeLists.txt
M flang/lib/Optimizer/Builder/CMakeLists.txt
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/PPCIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Character.cpp
M flang/lib/Optimizer/Builder/Runtime/Main.cpp
M flang/lib/Optimizer/CodeGen/CodeGenOpenMP.cpp
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/lib/Optimizer/Dialect/CMakeLists.txt
M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
A flang/lib/Optimizer/Dialect/FIROperationMoveOpInterface.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIRDialect.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ConvertToFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineHLFIRAssign.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ScheduleOrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ScheduleOrderedAssignments.h
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/lib/Optimizer/OpenACC/Analysis/CMakeLists.txt
M flang/lib/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.cpp
M flang/lib/Optimizer/OpenACC/Support/CMakeLists.txt
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCUtils.cpp
M flang/lib/Optimizer/OpenACC/Support/RegisterOpenACCExtensions.cpp
A flang/lib/Optimizer/OpenACC/Transforms/ACCOptimizeFirstprivateMap.cpp
M flang/lib/Optimizer/OpenACC/Transforms/CMakeLists.txt
M flang/lib/Optimizer/OpenMP/DoConcurrentConversion.cpp
M flang/lib/Optimizer/OpenMP/FunctionFiltering.cpp
M flang/lib/Optimizer/OpenMP/LowerNontemporal.cpp
M flang/lib/Optimizer/OpenMP/LowerWorkdistribute.cpp
M flang/lib/Optimizer/OpenMP/Support/CMakeLists.txt
A flang/lib/Optimizer/OpenMP/Support/FIROpenMPOpsInterfaces.cpp
M flang/lib/Optimizer/OpenMP/Support/RegisterOpenMPExtensions.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/AddAliasTags.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
M flang/lib/Optimizer/Transforms/CUDA/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceFuncTransform.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFFunctionRewrite.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
A flang/lib/Optimizer/Transforms/CUDA/CUFOpConversionLate.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/FunctionAttr.cpp
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
M flang/lib/Optimizer/Transforms/MIFOpConversion.cpp
M flang/lib/Optimizer/Transforms/VScaleAttr.cpp
M flang/lib/Parser/Fortran-parsers.cpp
M flang/lib/Parser/message.cpp
M flang/lib/Parser/parse-tree.cpp
M flang/lib/Parser/parsing.cpp
M flang/lib/Parser/preprocessor.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/prescan.h
M flang/lib/Parser/program-parsers.cpp
M flang/lib/Parser/source.cpp
M flang/lib/Parser/tools.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-coarray.cpp
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/check-data.cpp
M flang/lib/Semantics/check-deallocate.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-do-forall.cpp
M flang/lib/Semantics/check-nullify.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-purity.cpp
M flang/lib/Semantics/check-purity.h
M flang/lib/Semantics/data-to-inits.cpp
M flang/lib/Semantics/data-to-inits.h
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/openmp-modifiers.cpp
M flang/lib/Semantics/pointer-assignment.cpp
M flang/lib/Semantics/program-tree.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names-utils.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/runtime-type-info.cpp
M flang/lib/Semantics/semantics.cpp
M flang/lib/Semantics/tools.cpp
M flang/lib/Semantics/type.cpp
M flang/lib/Support/Fortran-features.cpp
M flang/module/__fortran_builtins.f90
M flang/module/__fortran_type_info.f90
M flang/module/iso_c_binding.f90
M flang/test/Analysis/AliasAnalysis/alias-analysis-cray-pointers.fir
M flang/test/Analysis/AliasAnalysis/load-ptr-alloca.fir
M flang/test/Analysis/AliasAnalysis/load-ptr-designate.fir
A flang/test/Analysis/AliasAnalysis/modref-alloc-free-effects.fir
M flang/test/Analysis/AliasAnalysis/ptr-component.fir
A flang/test/Driver/asm-error-fix.s
M flang/test/Driver/bbc-mlir-pass-pipeline.f90
M flang/test/Driver/fast-math.f90
M flang/test/Driver/func-attr-fast-math.f90
A flang/test/Driver/global-isel.f90
A flang/test/Driver/input-from-stdin/debug-info-filename.f90
A flang/test/Driver/lto-global-isel.f90
M flang/test/Driver/mlir-debug-pass-pipeline.f90
M flang/test/Driver/mlir-pass-pipeline.f90
A flang/test/Driver/protect-parens.f90
M flang/test/Driver/target-cpu-features-invalid.f90
M flang/test/Examples/feature-list-class.f90
M flang/test/Examples/feature-list-functions.f90
M flang/test/Examples/omp-atomic.f90
M flang/test/Examples/omp-declarative-directive.f90
M flang/test/Examples/omp-device-constructs.f90
M flang/test/Examples/omp-in-reduction-clause.f90
M flang/test/Examples/omp-nowait.f90
M flang/test/Examples/omp-order-clause.f90
M flang/test/Examples/omp-sections.f90
M flang/test/Examples/print-fns-calls.f90
M flang/test/Examples/print-fns-definitions.f90
M flang/test/Examples/print-fns-interfaces.f90
A flang/test/Fir/CUDA/cuda-alias-analysis.fir
M flang/test/Fir/CUDA/cuda-alloc-free.fir
M flang/test/Fir/CUDA/cuda-allocate.fir
M flang/test/Fir/CUDA/cuda-data-transfer.fir
A flang/test/Fir/CUDA/cuda-device-address.mlir
M flang/test/Fir/CUDA/cuda-device-func-transform.mlir
M flang/test/Fir/CUDA/cuda-global-addr.mlir
M flang/test/Fir/CUDA/cuda-launch.fir
M flang/test/Fir/CUDA/cuda-shared-offset.mlir
A flang/test/Fir/FirToSCF/any.fir
A flang/test/Fir/FirToSCF/do-extra.fir
A flang/test/Fir/FirToSCF/if-extra.fir
A flang/test/Fir/FirToSCF/iterate-while-extra.fir
A flang/test/Fir/FirToSCF/nested-unregistered.fir
A flang/test/Fir/FirToSCF/normalize.fir
A flang/test/Fir/FirToSCF/sum.fir
M flang/test/Fir/MIF/init.mlir
M flang/test/Fir/OpenACC/openacc-mappable.fir
M flang/test/Fir/basic-program.fir
M flang/test/HLFIR/order_assignments/inlined-stack-temp.fir
A flang/test/HLFIR/order_assignments/where-array-sections.f90
M flang/test/HLFIR/order_assignments/where-fusing-scheduling.f90
M flang/test/HLFIR/order_assignments/where-scheduling.f90
M flang/test/HLFIR/simplify-hlfir-intrinsics-cshift.fir
A flang/test/Integration/OpenMP/target-nesting-in-host-ops.f90
A flang/test/Integration/OpenMP/target-use-device-nested.f90
A flang/test/Integration/OpenMP/task-target-device.f90
A flang/test/Integration/OpenMP/threadprivate-target-device.f90
M flang/test/Integration/complex-div-to-llvm.f90
A flang/test/Integration/debug-use-stmt.f90
M flang/test/Lower/CUDA/cuda-allocatable-device.cuf
M flang/test/Lower/CUDA/cuda-synchronization.cuf
M flang/test/Lower/HLFIR/calls-f77.f90
M flang/test/Lower/HLFIR/cray-pointers.f90
M flang/test/Lower/HLFIR/elemental-array-ops.f90
M flang/test/Lower/HLFIR/function-return-as-expr.f90
M flang/test/Lower/HLFIR/function-return-destroy.f90
A flang/test/Lower/HLFIR/ignore-tkr-c-descriptor.f90
A flang/test/Lower/HLFIR/ivdep-elemental.f90
A flang/test/Lower/HLFIR/ivdep-where.f90
M flang/test/Lower/HLFIR/proc-pointer-comp-pass.f90
A flang/test/Lower/HLFIR/protect-parens-arrays.f90
A flang/test/Lower/HLFIR/protect-parens.f90
M flang/test/Lower/HLFIR/where.f90
M flang/test/Lower/Intrinsics/exit.f90
A flang/test/Lower/Intrinsics/f_c_string.f90
M flang/test/Lower/Intrinsics/storage_size-2.f90
M flang/test/Lower/OpenACC/acc-cache.f90
A flang/test/Lower/OpenACC/acc-deviceptr.f90
A flang/test/Lower/OpenACC/acc-no-create-array-section.f90
M flang/test/Lower/OpenACC/acc-reduction.f90
M flang/test/Lower/OpenMP/Todo/affinity-clause.f90
A flang/test/Lower/OpenMP/Todo/multiple-types-declare_reduction.f90
A flang/test/Lower/OpenMP/Todo/reduction-character-dynamic-length.f90
A flang/test/Lower/OpenMP/declare-reduction-character-allocatable.f90
A flang/test/Lower/OpenMP/declare-simd.f90
M flang/test/Lower/OpenMP/declare-target-link-tarop-cap.f90
M flang/test/Lower/OpenMP/defaultmap.f90
M flang/test/Lower/OpenMP/host-eval.f90
A flang/test/Lower/OpenMP/num-teams-dims.f90
A flang/test/Lower/OpenMP/num-threads-dims.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-derivedtype.f90
M flang/test/Lower/OpenMP/real10.f90
A flang/test/Lower/OpenMP/target-parameter-array.f90
M flang/test/Lower/OpenMP/target_cpu_features.f90
A flang/test/Lower/OpenMP/task-affinity.f90
A flang/test/Lower/OpenMP/thread-limit-dims.f90
M flang/test/Lower/array-elemental-calls-char-dynamic.f90
M flang/test/Lower/array-elemental-calls-char.f90
M flang/test/Lower/assigned-goto.f90
M flang/test/Lower/c-interoperability-c-pointer.f90
M flang/test/Lower/c-interoperability.f90
M flang/test/Lower/c_ptr-constant-init.f90
M flang/test/Lower/character-elemental.f90
M flang/test/Lower/character-local-variables.f90
M flang/test/Lower/complex-operations.f90
M flang/test/Lower/complex-real.f90
M flang/test/Lower/computed-goto.f90
A flang/test/Lower/const-arg-glob.f90
M flang/test/Lower/constant-literal-mangling.f90
M flang/test/Lower/control-flow.f90
M flang/test/Lower/default-initialization.f90
M flang/test/Lower/dense-attributed-array.f90
M flang/test/Lower/derived-pointer-components.f90
M flang/test/Lower/derived-type-finalization.f90
A flang/test/Lower/derived-type-sequence-alias-assign.f90
M flang/test/Lower/derived-types.f90
A flang/test/Lower/do-while-to-scf-while.f90
M flang/test/Lower/do_loop.f90
M flang/test/Lower/do_loop_unstructured.f90
M flang/test/Lower/dummy-argument-assumed-shape-optional.f90
M flang/test/Lower/dummy-argument-contiguous.f90
M flang/test/Lower/dummy-argument-optional-2.f90
M flang/test/Lower/dummy-argument-optional.f90
M flang/test/Lower/dummy-arguments.f90
M flang/test/Lower/dummy-procedure-character.f90
M flang/test/Lower/dummy-procedure-in-entry.f90
M flang/test/Lower/dummy-procedure.f90
M flang/test/Lower/equivalence-1.f90
M flang/test/Lower/equivalence-2.f90
M flang/test/Lower/equivalence-with-host-assoc.f90
M flang/test/Lower/explicit-interface-results-2.f90
M flang/test/Lower/explicit-interface-results.f90
M flang/test/Lower/ext-proc-as-actual-argument-1.f90
M flang/test/Lower/ext-proc-as-actual-argument-2.f90
M flang/test/Lower/goto-statement.f90
M flang/test/Lower/infinite_loop.f90
M flang/test/Lower/io-statement-clean-ups.f90
A flang/test/Lower/ivdep-array.f90
M flang/test/Lower/polymorphic.f90
A flang/test/Lower/rank-clause02.f90
M flang/test/Lower/return-statement.f90
M flang/test/Lower/stop-statement.f90
M flang/test/Lower/volatile-openmp.f90
A flang/test/Parser/OpenMP/cont-in-cond-comp.f
M flang/test/Parser/OpenMP/sentinels.f
A flang/test/Parser/bug135964.f90
A flang/test/Parser/compiler-directive-sentinel.f90
M flang/test/Parser/continuation-in-conditional-compilation.f
A flang/test/Parser/keyword-optional-spaces.f90
A flang/test/Parser/unparse-rank-clause.f90
A flang/test/Preprocessing/bug178481.F90
A flang/test/Semantics/OpenMP/allocate_do.f90
A flang/test/Semantics/OpenMP/allocate_do1.f90
M flang/test/Semantics/OpenMP/clause-validity01.f90
M flang/test/Semantics/OpenMP/declare-simd-uniform.f90
M flang/test/Semantics/OpenMP/declare-target08.f90
A flang/test/Semantics/OpenMP/lastprivate-intent-in-pointer.f90
A flang/test/Semantics/OpenMP/linear-clause03.f90
A flang/test/Semantics/OpenMP/local-variables-1.f90
A flang/test/Semantics/OpenMP/local-variables-2.f90
M flang/test/Semantics/OpenMP/map-clause-v60.f90
M flang/test/Semantics/OpenMP/use_device_addr1.f90
A flang/test/Semantics/ac-impl-do-data-ptr.f90
M flang/test/Semantics/bug1214.cuf
A flang/test/Semantics/bug150820.f90
A flang/test/Semantics/bug177502.f90
A flang/test/Semantics/bug177601.f90
A flang/test/Semantics/bug178786.f90
A flang/test/Semantics/bug178813.f90
A flang/test/Semantics/bug179580.f90
A flang/test/Semantics/bug2098.f90
A flang/test/Semantics/bug2131.cuf
A flang/test/Semantics/bug2131b.cuf
A flang/test/Semantics/bug2174.f90
A flang/test/Semantics/bug2203.f90
M flang/test/Semantics/c7108.f90
M flang/test/Semantics/call03.f90
A flang/test/Semantics/call46.f90
A flang/test/Semantics/cuf-proc-attr-error.cuf
M flang/test/Semantics/cuf03.cuf
M flang/test/Semantics/cuf23.cuf
M flang/test/Semantics/data07.f90
M flang/test/Semantics/data12.f90
M flang/test/Semantics/data23.f90
M flang/test/Semantics/declarations06.f90
M flang/test/Semantics/equivalence02.f90
A flang/test/Semantics/f_c_string.f90
M flang/test/Semantics/generic09.f90
A flang/test/Semantics/ignore_tkr05.f90
M flang/test/Semantics/misc-intrinsics.f90
A flang/test/Semantics/rank-clause01.f90
M flang/test/Semantics/resolve11.f90
M flang/test/Semantics/resolve17.f90
M flang/test/Semantics/resolve18.f90
M flang/test/Semantics/symbol03.f90
M flang/test/Semantics/typeinfo01.f90
M flang/test/Semantics/typeinfo08.f90
A flang/test/Transforms/CUF/cuf-kernel-licm.fir
M flang/test/Transforms/DoConcurrent/locally_destroyed_temp.f90
M flang/test/Transforms/DoConcurrent/multiple_iteration_ranges.f90
A flang/test/Transforms/OpenACC/acc-optimize-firstprivate-map.fir
A flang/test/Transforms/OpenACC/offload-target-verifier.fir
A flang/test/Transforms/OpenMP/conversion-declare-mapper.mlir
A flang/test/Transforms/OpenMP/function-filtering-host-ops.mlir
A flang/test/Transforms/OpenMP/function-filtering.mlir
M flang/test/Transforms/debug-imported-entity.fir
M flang/test/Transforms/debug-local-global-storage-1.fir
A flang/test/Transforms/debug-use-stmt.fir
M flang/test/Transforms/licm.fir
A flang/test/Transforms/omp-function-filtering-todo.mlir
R flang/test/Transforms/omp-function-filtering.mlir
R flang/test/Transforms/tbaa-for-local-vars.fir
M flang/test/Transforms/tbaa-target-inlined-results.fir
M flang/test/Transforms/tbaa-with-dummy-scope2.fir
A flang/test/Transforms/vscale-attr.fir
M flang/test/lit.cfg.py
M flang/tools/bbc/bbc.cpp
M flang/tools/f18/CMakeLists.txt
M flang/tools/flang-driver/driver.cpp
M flang/unittests/Common/FortranFeaturesTest.cpp
M flang/unittests/Optimizer/CMakeLists.txt
M libc/benchmarks/CMakeLists.txt
M libc/benchmarks/gpu/CMakeLists.txt
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/cmake/modules/prepare_libc_gpu_build.cmake
M libc/config/baremetal/config.json
M libc/config/config.json
M libc/config/gpu/config.json
M libc/config/linux/app.h
A libc/config/windows/config.json
M libc/docs/configure.rst
M libc/docs/dev/printf_behavior.rst
M libc/docs/dev/undefined_behavior.rst
M libc/docs/gpu/building.rst
M libc/docs/headers/math/index.rst
M libc/docs/headers/time.rst
M libc/fuzzing/__support/CMakeLists.txt
A libc/fuzzing/__support/weak_avl_fuzz.cpp
M libc/hdr/CMakeLists.txt
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/Elf32_Xword.h
M libc/include/CMakeLists.txt
M libc/include/elf.yaml
M libc/include/llvm-libc-macros/link-macros.h
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/Elf32_Xword.h
R libc/include/pthread.h.def
M libc/include/pthread.yaml
M libc/shared/math.h
A libc/shared/math/dfmaf128.h
A libc/shared/math/dfmal.h
A libc/shared/math/f16fma.h
A libc/shared/math/f16fmaf.h
A libc/shared/math/f16fmaf128.h
A libc/shared/math/f16fmal.h
A libc/shared/math/f16sqrt.h
A libc/shared/math/f16sqrtl.h
A libc/shared/math/ffmal.h
A libc/shared/math/fsqrt.h
A libc/shared/math/fsqrtf128.h
A libc/shared/math/fsqrtl.h
A libc/shared/math/hypotf.h
A libc/shared/math/ilogb.h
A libc/shared/math/ilogbf.h
A libc/shared/math/ilogbf128.h
A libc/shared/math/ilogbl.h
A libc/shared/math/llogb.h
A libc/shared/math/llogbf.h
A libc/shared/math/llogbf128.h
A libc/shared/math/llogbf16.h
A libc/shared/math/llogbl.h
A libc/shared/math/log10.h
A libc/shared/math/log10f.h
A libc/shared/math/log10f16.h
A libc/shared/math/log1p.h
A libc/shared/math/log1pf.h
A libc/shared/math/log2.h
A libc/shared/math/log2f.h
A libc/shared/math/log2f16.h
A libc/shared/math/logbf.h
A libc/shared/math/logbf128.h
A libc/shared/math/logbf16.h
A libc/shared/math/logf.h
A libc/shared/math/logf16.h
A libc/shared/math/pow.h
A libc/shared/math/powf.h
A libc/shared/math/sincosf.h
A libc/shared/math/sinf.h
A libc/shared/math/sinf16.h
A libc/shared/math/sinhf.h
A libc/shared/math/sinhf16.h
A libc/shared/math/sinpif.h
A libc/shared/math/sqrt.h
A libc/shared/math/sqrtf.h
A libc/shared/math/sqrtf128.h
A libc/shared/math/sqrtf16.h
A libc/shared/math/tan.h
A libc/shared/math/tanf.h
M libc/src/__support/CMakeLists.txt
M libc/src/__support/CPP/limits.h
M libc/src/__support/CPP/type_traits/is_integral.h
M libc/src/__support/CPP/type_traits/is_unsigned.h
M libc/src/__support/GPU/allocator.cpp
M libc/src/__support/ctype_utils.h
M libc/src/__support/fixed_point/fx_bits.h
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/acos.h
M libc/src/__support/math/acosf.h
M libc/src/__support/math/acosf16.h
M libc/src/__support/math/acosh_float_constants.h
M libc/src/__support/math/acoshf.h
M libc/src/__support/math/acoshf16.h
M libc/src/__support/math/acoshf_utils.h
M libc/src/__support/math/acospif16.h
M libc/src/__support/math/asin.h
M libc/src/__support/math/asin_utils.h
M libc/src/__support/math/asinf.h
M libc/src/__support/math/asinf16.h
M libc/src/__support/math/asinhf.h
M libc/src/__support/math/asinhf16.h
M libc/src/__support/math/atan.h
M libc/src/__support/math/atan2.h
M libc/src/__support/math/atan2f.h
M libc/src/__support/math/atan2f128.h
M libc/src/__support/math/atan2f_float.h
M libc/src/__support/math/atan_utils.h
M libc/src/__support/math/atanf.h
M libc/src/__support/math/atanf16.h
M libc/src/__support/math/atanf_float.h
M libc/src/__support/math/atanhf.h
M libc/src/__support/math/atanhf16.h
M libc/src/__support/math/cbrt.h
M libc/src/__support/math/cbrtf.h
M libc/src/__support/math/common_constants.h
M libc/src/__support/math/cos.h
M libc/src/__support/math/cosf.h
M libc/src/__support/math/cosf16.h
M libc/src/__support/math/coshf.h
M libc/src/__support/math/coshf16.h
M libc/src/__support/math/cospif.h
M libc/src/__support/math/cospif16.h
A libc/src/__support/math/dfmaf128.h
A libc/src/__support/math/dfmal.h
M libc/src/__support/math/dsqrtl.h
M libc/src/__support/math/erff.h
M libc/src/__support/math/exp.h
M libc/src/__support/math/exp10.h
M libc/src/__support/math/exp10_float16_constants.h
M libc/src/__support/math/exp10f.h
M libc/src/__support/math/exp10f16.h
M libc/src/__support/math/exp10f16_utils.h
M libc/src/__support/math/exp10f_utils.h
M libc/src/__support/math/exp10m1f.h
M libc/src/__support/math/exp10m1f16.h
M libc/src/__support/math/exp2.h
M libc/src/__support/math/exp2f.h
M libc/src/__support/math/exp2f16.h
M libc/src/__support/math/exp2m1f.h
M libc/src/__support/math/exp2m1f16.h
M libc/src/__support/math/exp_constants.h
M libc/src/__support/math/exp_float_constants.h
M libc/src/__support/math/exp_utils.h
M libc/src/__support/math/expf.h
M libc/src/__support/math/expf16.h
M libc/src/__support/math/expf16_utils.h
M libc/src/__support/math/expm1.h
M libc/src/__support/math/expm1f.h
M libc/src/__support/math/expm1f16.h
M libc/src/__support/math/expxf16_utils.h
A libc/src/__support/math/f16fma.h
A libc/src/__support/math/f16fmaf.h
A libc/src/__support/math/f16fmaf128.h
A libc/src/__support/math/f16fmal.h
A libc/src/__support/math/f16sqrt.h
A libc/src/__support/math/f16sqrtl.h
A libc/src/__support/math/ffmal.h
M libc/src/__support/math/frexpf.h
M libc/src/__support/math/frexpf128.h
M libc/src/__support/math/frexpf16.h
A libc/src/__support/math/fsqrt.h
A libc/src/__support/math/fsqrtf128.h
A libc/src/__support/math/fsqrtl.h
A libc/src/__support/math/hypotf.h
A libc/src/__support/math/ilogb.h
A libc/src/__support/math/ilogbf.h
A libc/src/__support/math/ilogbf128.h
A libc/src/__support/math/ilogbl.h
M libc/src/__support/math/inv_trigf_utils.h
M libc/src/__support/math/ldexpf.h
M libc/src/__support/math/ldexpf128.h
M libc/src/__support/math/ldexpf16.h
A libc/src/__support/math/llogb.h
A libc/src/__support/math/llogbf.h
A libc/src/__support/math/llogbf128.h
A libc/src/__support/math/llogbf16.h
A libc/src/__support/math/llogbl.h
M libc/src/__support/math/log.h
A libc/src/__support/math/log10.h
A libc/src/__support/math/log10f.h
A libc/src/__support/math/log10f16.h
A libc/src/__support/math/log1p.h
A libc/src/__support/math/log1pf.h
A libc/src/__support/math/log2.h
A libc/src/__support/math/log2f.h
A libc/src/__support/math/log2f16.h
A libc/src/__support/math/logbf.h
A libc/src/__support/math/logbf128.h
A libc/src/__support/math/logbf16.h
A libc/src/__support/math/logf.h
A libc/src/__support/math/logf16.h
A libc/src/__support/math/pow.h
A libc/src/__support/math/powf.h
M libc/src/__support/math/range_reduction.h
M libc/src/__support/math/range_reduction_double_common.h
M libc/src/__support/math/range_reduction_double_fma.h
M libc/src/__support/math/range_reduction_double_nofma.h
M libc/src/__support/math/range_reduction_fma.h
M libc/src/__support/math/rsqrtf.h
M libc/src/__support/math/rsqrtf16.h
M libc/src/__support/math/sin.h
M libc/src/__support/math/sincos_eval.h
A libc/src/__support/math/sincosf.h
M libc/src/__support/math/sincosf16_utils.h
M libc/src/__support/math/sincosf_float_eval.h
M libc/src/__support/math/sincosf_utils.h
A libc/src/__support/math/sinf.h
A libc/src/__support/math/sinf16.h
A libc/src/__support/math/sinhf.h
A libc/src/__support/math/sinhf16.h
A libc/src/__support/math/sinpif.h
A libc/src/__support/math/sqrt.h
A libc/src/__support/math/sqrtf.h
A libc/src/__support/math/sqrtf128.h
A libc/src/__support/math/sqrtf16.h
A libc/src/__support/math/tan.h
A libc/src/__support/math/tanf.h
M libc/src/__support/str_to_float.h
M libc/src/__support/threads/fork_callbacks.cpp
M libc/src/__support/wchar/CMakeLists.txt
R libc/src/__support/wchar/character_converter.cpp
M libc/src/__support/wchar/character_converter.h
R libc/src/__support/wchar/wcrtomb.cpp
M libc/src/__support/wchar/wcrtomb.h
M libc/src/__support/wctype/CMakeLists.txt
A libc/src/__support/wctype/wctype_classification_utils.cpp
M libc/src/__support/wctype/wctype_classification_utils.h
A libc/src/__support/weak_avl.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/asin.cpp
M libc/src/math/generic/dfmaf128.cpp
M libc/src/math/generic/dfmal.cpp
M libc/src/math/generic/f16fma.cpp
M libc/src/math/generic/f16fmaf.cpp
M libc/src/math/generic/f16fmaf128.cpp
M libc/src/math/generic/f16fmal.cpp
M libc/src/math/generic/f16sqrt.cpp
M libc/src/math/generic/f16sqrtl.cpp
M libc/src/math/generic/ffmal.cpp
M libc/src/math/generic/fsqrt.cpp
M libc/src/math/generic/fsqrtf128.cpp
M libc/src/math/generic/fsqrtl.cpp
M libc/src/math/generic/hypotf.cpp
M libc/src/math/generic/ilogb.cpp
M libc/src/math/generic/ilogbf.cpp
M libc/src/math/generic/ilogbf128.cpp
M libc/src/math/generic/ilogbl.cpp
M libc/src/math/generic/llogb.cpp
M libc/src/math/generic/llogbf.cpp
M libc/src/math/generic/llogbf128.cpp
M libc/src/math/generic/llogbf16.cpp
M libc/src/math/generic/llogbl.cpp
M libc/src/math/generic/log10.cpp
M libc/src/math/generic/log10f.cpp
M libc/src/math/generic/log10f16.cpp
M libc/src/math/generic/log1p.cpp
M libc/src/math/generic/log1pf.cpp
M libc/src/math/generic/log2.cpp
M libc/src/math/generic/log2f.cpp
M libc/src/math/generic/log2f16.cpp
M libc/src/math/generic/logbf.cpp
M libc/src/math/generic/logbf128.cpp
M libc/src/math/generic/logbf16.cpp
M libc/src/math/generic/logf.cpp
M libc/src/math/generic/logf16.cpp
M libc/src/math/generic/pow.cpp
M libc/src/math/generic/powf.cpp
M libc/src/math/generic/sincosf.cpp
M libc/src/math/generic/sinf.cpp
M libc/src/math/generic/sinf16.cpp
M libc/src/math/generic/sinhf.cpp
M libc/src/math/generic/sinhf16.cpp
M libc/src/math/generic/sinpif.cpp
M libc/src/math/generic/sinpif16.cpp
M libc/src/math/generic/sqrt.cpp
M libc/src/math/generic/sqrtf.cpp
M libc/src/math/generic/sqrtf128.cpp
M libc/src/math/generic/sqrtf16.cpp
M libc/src/math/generic/tan.cpp
M libc/src/math/generic/tanf.cpp
M libc/src/math/generic/tanf16.cpp
M libc/src/math/generic/tanpif.cpp
M libc/src/math/generic/tanpif16.cpp
A libc/src/pthread/pthread_getattr_np.h
M libc/src/spawn/linux/posix_spawn.cpp
M libc/src/stdio/printf_core/CMakeLists.txt
M libc/src/stdio/printf_core/char_converter.h
M libc/src/stdio/printf_core/converter_utils.h
M libc/src/stdio/printf_core/core_structs.h
M libc/src/stdio/printf_core/linux/error_mapper.h
M libc/src/stdio/printf_core/parser.h
M libc/src/stdio/printf_core/write_int_converter.h
M libc/src/string/memory_utils/aarch64/inline_memcpy.h
M libc/src/string/memory_utils/inline_memcpy.h
M libc/src/string/memory_utils/inline_memmove.h
M libc/src/string/memory_utils/inline_memset.h
M libc/startup/gpu/CMakeLists.txt
M libc/startup/linux/CMakeLists.txt
M libc/startup/linux/do_start.cpp
A libc/startup/linux/gnu_property_section.cpp
A libc/startup/linux/gnu_property_section.h
M libc/test/UnitTest/PrintfMatcher.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M libc/test/src/__support/CMakeLists.txt
A libc/test/src/__support/weak_avl_test.cpp
M libc/test/src/stdio/CMakeLists.txt
M libc/test/src/stdio/printf_core/parser_test.cpp
M libc/test/src/stdio/sprintf_test.cpp
M libc/test/src/strings/CMakeLists.txt
A libc/test/src/strings/wide_read_memory_test.cpp
M libc/test/src/time/TmMatcher.h
M libc/test/src/time/gmtime_r_test.cpp
M libc/test/src/time/gmtime_test.cpp
M libc/test/src/time/mktime_test.cpp
M libc/utils/wctype_utils/classification/gen_classification_data.py
M libclc/CMakeLists.txt
R libclc/clc/include/clc/clctypes.h
M libclc/clc/include/clc/float/definitions.h
M libclc/clc/include/clc/integer/clc_upsample.h
M libclc/clc/include/clc/integer/definitions.h
M libclc/clc/include/clc/integer/gentype.inc
M libclc/clc/include/clc/integer/gentype24.inc
M libclc/clc/include/clc/internal/clc.h
M libclc/clc/include/clc/internal/math/clc_sw_fma.h
M libclc/clc/include/clc/math/gentype.inc
M libclc/clc/include/clc/math/math.h
M libclc/clc/include/clc/math/tables.h
M libclc/clc/include/clc/relational/clc_all.h
M libclc/clc/include/clc/relational/clc_any.h
M libclc/clc/include/clc/relational/clc_isequal.h
M libclc/clc/include/clc/relational/clc_isinf.h
M libclc/clc/include/clc/relational/clc_isnan.h
M libclc/clc/lib/clspv/SOURCES
R libclc/clc/lib/clspv/math/clc_sw_fma.cl
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M libclc/clc/lib/generic/math/clc_fma.cl
R libclc/clc/lib/generic/math/clc_fma.inc
M libclc/clc/lib/generic/math/clc_remquo.cl
M libclc/clc/lib/generic/math/clc_remquo.inc
R libclc/clc/lib/generic/math/clc_sw_fma.cl
M libclc/clc/lib/r600/SOURCES
A libclc/clc/lib/r600/math/clc_fma.cl
A libclc/clc/lib/r600/math/clc_fma.inc
A libclc/clc/lib/r600/math/clc_sw_fma.cl
M libclc/clc/lib/spirv/SOURCES
R libclc/clc/lib/spirv/math/clc_runtime_has_hw_fma32.cl
M libclc/cmake/modules/AddLibclc.cmake
M libclc/opencl/include/clc/opencl/opencl-base.h
M libclc/opencl/include/clc/opencl/synchronization/utils.h
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R libclc/opencl/lib/clspv/math/fma.cl
M libclc/opencl/lib/spirv/SOURCES
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M libcxx/.clang-format
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M libcxx/Maintainers.md
A libcxx/cmake/caches/Generic-asan-in-tests-only.cmake
M libcxx/docs/CodingGuidelines.rst
M libcxx/docs/Contributing.rst
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/include/CMakeLists.txt
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M libcxx/include/__algorithm/for_each.h
M libcxx/include/__algorithm/for_each_n.h
M libcxx/include/__algorithm/generate_n.h
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__algorithm/ranges_fold.h
M libcxx/include/__algorithm/ranges_reverse_copy.h
A libcxx/include/__algorithm/ranges_shift_left.h
M libcxx/include/__algorithm/ranges_swap_ranges.h
M libcxx/include/__algorithm/shift_left.h
M libcxx/include/__algorithm/specialized_algorithms.h
M libcxx/include/__algorithm/swap_ranges.h
M libcxx/include/__algorithm/unwrap_range.h
M libcxx/include/__atomic/atomic.h
M libcxx/include/__atomic/atomic_flag.h
M libcxx/include/__atomic/atomic_sync.h
A libcxx/include/__atomic/atomic_sync_timed.h
M libcxx/include/__atomic/atomic_waitable_traits.h
M libcxx/include/__bit_reference
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M libcxx/include/__chrono/duration.h
M libcxx/include/__chrono/hh_mm_ss.h
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M libcxx/include/__chrono/month.h
M libcxx/include/__chrono/month_weekday.h
M libcxx/include/__chrono/monthday.h
M libcxx/include/__chrono/weekday.h
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M libcxx/include/__configuration/availability.h
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M libcxx/include/__cxx03/cfloat
M libcxx/include/__cxx03/module.modulemap
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M libcxx/include/__format/unicode.h
M libcxx/include/__functional/operations.h
A libcxx/include/__iterator/capacity_aware_iterator.h
M libcxx/include/__iterator/reverse_iterator.h
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M libcxx/include/__memory/allocator_traits.h
M libcxx/include/__memory/inout_ptr.h
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M libcxx/include/__pstl/backend_fwd.h
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M libcxx/include/__ranges/subrange.h
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M libcxx/include/__vector/vector.h
M libcxx/include/algorithm
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R libcxx/include/float.h
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M libcxx/lib/abi/i686-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
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M libcxx/lib/abi/x86_64-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
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M libcxx/test/benchmarks/algorithms/modifying/copy.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/copy_backward.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/copy_if.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/copy_n.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/fill.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/fill_n.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/generate.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/generate_n.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/move.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/move_backward.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/remove.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/remove_copy.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/replace.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/reverse.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/reverse_copy.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/rotate.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/rotate_copy.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/sample.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/shuffle.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/swap_ranges.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/transform.binary.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/transform.unary.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/unique.bench.cpp
M libcxx/test/benchmarks/algorithms/modifying/unique_copy.bench.cpp
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M libcxx/test/std/utilities/optional/optional.object/optional.object.observe/op_arrow.pass.cpp
R libcxx/test/std/utilities/optional/optional.object/optional.object.observe/op_arrow_const.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.observe/value.pass.cpp
R libcxx/test/std/utilities/optional/optional.object/optional.object.observe/value_const.compile.fail.cpp
R libcxx/test/std/utilities/optional/optional.object/optional.object.observe/value_const.pass.cpp
R libcxx/test/std/utilities/optional/optional.object/optional.object.observe/value_const_rvalue.pass.cpp
R libcxx/test/std/utilities/optional/optional.object/optional.object.observe/value_rvalue.pass.cpp
M libcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/PR31384.pass.cpp
R libcxx/test/std/utilities/utility/mem.res/mem.res.monotonic.buffer/mem.res.monotonic.buffer.mem/allocate_in_geometric_progression.pass.cpp
A libcxx/test/std/utilities/utility/mem.res/mem.res.monotonic.buffer/mem.res.monotonic.buffer.mem/allocate_mem.pass.cpp
M libcxx/test/support/asan_testing.h
M libcxx/utils/benchmark-historical
M libcxx/utils/build-at-commit
M libcxx/utils/ci/BOT_OWNERS.txt
A libcxx/utils/ci/benchmark-for-lnt.py
M libcxx/utils/ci/images/libcxx_release_runners.txt
M libcxx/utils/ci/run-buildbot
M libcxx/utils/gdb/libcxx/printers.py
M libcxx/utils/generate_feature_test_macro_components.py
M libcxx/utils/libcxx/test/features/libcxx_macros.py
M libcxx/utils/libcxx/test/features/localization.py
M libcxx/utils/libcxx/test/params.py
A libcxx/utils/parse-time-output
M libcxx/utils/test-at-commit
M libcxxabi/src/cxa_guard_impl.h
M libcxxabi/src/cxa_personality.cpp
M libcxxabi/src/fallback_malloc.cpp
M libcxxabi/test/guard_test_basic.pass.cpp
M libcxxabi/test/guard_threaded_test.pass.cpp
M libcxxabi/test/test_fallback_malloc.pass.cpp
M libsycl/CMakeLists.txt
M libsycl/Maintainers.md
M libsycl/README.md
M libsycl/docs/index.rst
A libsycl/include/sycl/__impl/aspect.hpp
A libsycl/include/sycl/__impl/backend.hpp
M libsycl/include/sycl/__impl/detail/config.hpp
A libsycl/include/sycl/__impl/detail/obj_utils.hpp
A libsycl/include/sycl/__impl/device.hpp
A libsycl/include/sycl/__impl/device_selector.hpp
A libsycl/include/sycl/__impl/exception.hpp
A libsycl/include/sycl/__impl/info/desc_base.hpp
A libsycl/include/sycl/__impl/info/device.hpp
A libsycl/include/sycl/__impl/info/device_type.hpp
A libsycl/include/sycl/__impl/info/platform.hpp
M libsycl/include/sycl/__impl/platform.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/CMakeLists.txt
A libsycl/src/detail/device_impl.cpp
A libsycl/src/detail/device_impl.hpp
A libsycl/src/detail/global_objects.cpp
A libsycl/src/detail/global_objects.hpp
A libsycl/src/detail/offload/offload_topology.cpp
A libsycl/src/detail/offload/offload_topology.hpp
A libsycl/src/detail/offload/offload_utils.cpp
A libsycl/src/detail/offload/offload_utils.hpp
A libsycl/src/detail/platform_impl.cpp
A libsycl/src/detail/platform_impl.hpp
A libsycl/src/device.cpp
A libsycl/src/device_selector.cpp
A libsycl/src/exception.cpp
A libsycl/src/exception_list.cpp
M libsycl/src/platform.cpp
M libsycl/src/version.hpp.in
A libsycl/tools/CMakeLists.txt
A libsycl/tools/sycl-ls/CMakeLists.txt
A libsycl/tools/sycl-ls/sycl-ls.cpp
M libunwind/include/libunwind.h
M libunwind/include/mach-o/compact_unwind_encoding.h
M libunwind/include/unwind_itanium.h
M libunwind/src/FrameHeaderCache.hpp
M libunwind/src/Registers.hpp
M libunwind/src/UnwindCursor.hpp
M libunwind/src/UnwindLevel1-gcc-ext.c
M libunwind/src/UnwindLevel1.c
M libunwind/src/libunwind.cpp
M libunwind/src/libunwind_ext.h
M lld/COFF/Config.h
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/LTO.cpp
M lld/COFF/MinGW.cpp
M lld/COFF/SymbolTable.cpp
M lld/COFF/Writer.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.h
M lld/ELF/InputSection.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/RelocScan.h
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
M lld/ELF/ScriptParser.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Target.h
M lld/ELF/Writer.cpp
M lld/MachO/InputFiles.cpp
M lld/MachO/InputSection.cpp
M lld/MachO/ObjC.cpp
M lld/MachO/SectionPriorities.cpp
M lld/MachO/SymbolTable.cpp
M lld/include/lld/Common/BPSectionOrdererBase.inc
A lld/test/COFF/merge-bss-text-filealign1.test
M lld/test/ELF/aarch64-abs16.s
M lld/test/ELF/aarch64-abs32.s
M lld/test/ELF/aarch64-fpic-abs16.s
M lld/test/ELF/aarch64-fpic-add_abs_lo12_nc.s
M lld/test/ELF/aarch64-fpic-prel16.s
M lld/test/ELF/aarch64-hi21-error.s
M lld/test/ELF/aarch64-ldprel-lo19-invalid.s
M lld/test/ELF/aarch64-lo12-alignment.s
M lld/test/ELF/aarch64-lo21-error.s
M lld/test/ELF/aarch64-load-alignment.s
A lld/test/ELF/aarch64-memtag-pauth-globals-out-of-range.s
A lld/test/ELF/aarch64-memtag-pauth-globals.s
M lld/test/ELF/aarch64-movw-error.s
M lld/test/ELF/aarch64-prel16.s
M lld/test/ELF/aarch64-prel32.s
R lld/test/ELF/abs-conflict.s
M lld/test/ELF/arm-adr-err-long.s
M lld/test/ELF/arm-adr-err.s
M lld/test/ELF/arm-ldrlit-err.s
M lld/test/ELF/arm-tag-vfp-args-errs.s
M lld/test/ELF/arm-thumb-adr-err.s
M lld/test/ELF/arm-thumb-ldrlit-err.s
M lld/test/ELF/arm-thumb2-adr-err.s
M lld/test/ELF/arm-thumb2-ldrlit-err.s
A lld/test/ELF/conflict-abs.s
M lld/test/ELF/conflict-debug-variable-file-index.s
M lld/test/ELF/conflict-debug-variable.s
M lld/test/ELF/conflict-debug-variable2.s
M lld/test/ELF/conflict-variable-linkage-name.s
M lld/test/ELF/conflict.s
A lld/test/ELF/dtlto/timetrace.test
M lld/test/ELF/eh-frame-dyn-rel.s
A lld/test/ELF/eh-frame-fde-encoding.s
A lld/test/ELF/eh-frame-hdr-sdata8.s
A lld/test/ELF/eh-frame-invalid-cie.s
A lld/test/ELF/eh-frame-invalid-fde-encoding.s
R lld/test/ELF/eh-frame-pcrel-overflow.s
R lld/test/ELF/eh-frame-value-format1.s
R lld/test/ELF/eh-frame-value-format2.s
R lld/test/ELF/eh-frame-value-format3.s
R lld/test/ELF/eh-frame-value-format4.s
R lld/test/ELF/eh-frame-value-format5.s
R lld/test/ELF/eh-frame-value-format6.s
R lld/test/ELF/eh-frame-value-format7.s
R lld/test/ELF/eh-frame-value-format8.s
R lld/test/ELF/eh-frame-value-format9.s
M lld/test/ELF/execute-only-mixed-data.s
M lld/test/ELF/fill-trap.s
M lld/test/ELF/hexagon-tls-ie.s
M lld/test/ELF/hidden-shared-err.s
M lld/test/ELF/incompatible-ar-first.s
M lld/test/ELF/incompatible-section-flags.s
M lld/test/ELF/invalid-cie-length.s
M lld/test/ELF/invalid-cie-reference.s
R lld/test/ELF/invalid-eh-frame.s
R lld/test/ELF/invalid-eh-frame2.s
R lld/test/ELF/invalid-eh-frame3.s
R lld/test/ELF/invalid-eh-frame4.s
R lld/test/ELF/invalid-eh-frame5.s
R lld/test/ELF/invalid-eh-frame6.s
R lld/test/ELF/invalid-eh-frame7.s
R lld/test/ELF/invalid-eh-frame8.s
R lld/test/ELF/invalid-eh-frame9.s
M lld/test/ELF/invalid/bad-arm-attributes.s
M lld/test/ELF/invalid/common-symbol-alignment.test
M lld/test/ELF/invalid/data-encoding.test
M lld/test/ELF/invalid/ehframe-broken-relocation.test
M lld/test/ELF/invalid/executable.s
M lld/test/ELF/invalid/invalid-elf.test
M lld/test/ELF/invalid/invalid-file-class.test
M lld/test/ELF/invalid/linkorder-invalid-sec.test
M lld/test/ELF/invalid/merge-invalid-size.s
M lld/test/ELF/invalid/non-terminated-string.test
M lld/test/ELF/invalid/section-alignment.test
M lld/test/ELF/invalid/section-index.test
M lld/test/ELF/invalid/sht-group.test
M lld/test/ELF/invalid/tls-symbol.s
M lld/test/ELF/invalid/verdef-no-symtab.test
M lld/test/ELF/linkerscript/address-expr-symbols.s
M lld/test/ELF/loongarch-branch.s
A lld/test/ELF/loongarch-ifunc-nonpreemptible.s
M lld/test/ELF/mips-align-err.s
M lld/test/ELF/mips-mgot.s
M lld/test/ELF/mips-micro-bad-cross-calls.s
M lld/test/ELF/mips-out-of-bounds-call16-reloc.s
M lld/test/ELF/mips-tls-64.s
M lld/test/ELF/mips-tls.s
M lld/test/ELF/ppc64-abs32-dyn.s
M lld/test/ELF/ppc64-error-missaligned-dq.s
M lld/test/ELF/ppc64-error-missaligned-ds.s
M lld/test/ELF/ppc64-error-toc-tail-call.s
M lld/test/ELF/ppc64-reloc-pcrel34-overflow.s
M lld/test/ELF/pr34872.s
M lld/test/ELF/relocation-before-merge-start.s
M lld/test/ELF/relocation-nocopy.s
M lld/test/ELF/relocation-past-merge-end.s
M lld/test/ELF/reproduce-error.s
M lld/test/ELF/riscv-branch.s
M lld/test/ELF/riscv-call.s
M lld/test/ELF/riscv-hi20-lo12.s
M lld/test/ELF/riscv-ifunc-nonpreemptible.s
M lld/test/ELF/riscv-jal.s
M lld/test/ELF/riscv-pcrel-hilo.s
M lld/test/ELF/riscv-vendor-relocations.s
M lld/test/ELF/static-error.s
M lld/test/ELF/undef-spell-corrector.s
R lld/test/ELF/verneed-as-needed-weak.s
A lld/test/ELF/verneed-weak.s
M lld/test/ELF/vs-diagnostics-dynamic-relocation.s
M lld/test/ELF/why-live.test
M lld/test/ELF/x86-64-reloc-debug-overflow.s
M lld/test/ELF/x86-64-reloc-error.s
M lld/test/ELF/x86-64-reloc-error2.s
M lld/test/ELF/x86-64-reloc-range.s
M lld/test/ELF/x86-64-reloc-tpoff32-error.s
M lld/test/ELF/x86-64-tls-ie-err.s
M lld/test/ELF/ztext.s
A lld/test/MachO/arm64-branch-addend-stubs.s
M lld/test/MachO/order-file-cstring.s
R lld/test/wasm/Inputs/import-attributes.s
A lld/test/wasm/compact-imports.s
M lld/test/wasm/data-layout.s
A lld/test/wasm/debug-weak-unused.s
M lld/test/wasm/export-all.s
M lld/test/wasm/import-attribute-mismatch.s
A lld/test/wasm/large-debug-section.test
A lld/test/wasm/large-section.test
A lld/test/wasm/merge-undefined-symbols.s
M lld/test/wasm/mutable-global-exports.s
A lld/test/wasm/pic-static-unused.s
R lld/test/wasm/pic-static.ll
A lld/test/wasm/pic-static.s
A lld/test/wasm/section-too-large.test
M lld/wasm/Config.h
M lld/wasm/Driver.cpp
M lld/wasm/InputChunks.h
M lld/wasm/InputFiles.cpp
M lld/wasm/OutputSections.cpp
M lld/wasm/Relocations.cpp
M lld/wasm/SymbolTable.cpp
M lld/wasm/SyntheticSections.cpp
M lld/wasm/SyntheticSections.h
M lld/wasm/Writer.cpp
M lld/wasm/WriterUtils.cpp
M lld/wasm/WriterUtils.h
M lldb/CMakeLists.txt
M lldb/bindings/interface/SBExpressionOptionsDocstrings.i
M lldb/bindings/interface/SBInstructionExtensions.i
M lldb/bindings/python/python-wrapper.swig
M lldb/docs/dil-expr-lang.ebnf
M lldb/docs/index.rst
M lldb/docs/use/mcp.md
M lldb/include/lldb/API/SBDebugger.h
M lldb/include/lldb/API/SBExpressionOptions.h
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.6-beta.1
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/ce69179dcf8c...bdec31b3c0ed
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