[all-commits] [llvm/llvm-project] 0e7262: [CodeGen] Expand power-of-2 div/rem at IR level in...

[Daniil Fukalov via All-commits]

  Branch: refs/heads/users/dfukalov/add_ir_pow2expansion
  Home:   https://github.com/llvm/llvm-project
  Commit: 0e726201e51eeeec4298aa08d0085d342e2fc779
      https://github.com/llvm/llvm-project/commit/0e726201e51eeeec4298aa08d0085d342e2fc779
  Author: Daniil Fukalov <dfukalov at gmail.com>
  Date:   2026-02-11 (Wed, 11 Feb 2026)

  Changed paths:
    M llvm/lib/CodeGen/ExpandIRInsts.cpp
    M llvm/test/CodeGen/AMDGPU/div_i128.ll
    M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
    M llvm/test/CodeGen/AMDGPU/rem_i128.ll
    M llvm/test/CodeGen/RISCV/div_minsize.ll
    M llvm/test/CodeGen/X86/div_i129_v_pow2k.ll
    M llvm/test/Transforms/ExpandIRInsts/X86/sdiv129.ll
    M llvm/test/Transforms/ExpandIRInsts/X86/srem129.ll
    M llvm/test/Transforms/ExpandIRInsts/X86/udiv129.ll
    M llvm/test/Transforms/ExpandIRInsts/X86/urem129.ll

  Log Message:
  -----------
  [CodeGen] Expand power-of-2 div/rem at IR level in ExpandIRInsts.

Previously, power-of-2 div/rem operations wider than
MaxLegalDivRemBitWidth were excluded from IR expansion and left for
backend peephole optimizations. Some backends can fail to process such
instructions in case we switch off DAGCombiner.

Now ExpandIRInsts expands them into shift/mask sequences:
- udiv X, 2^C  ->  lshr X, C
- urem X, 2^C  ->  and X, (2^C - 1)
- sdiv X, 2^C  ->  bias adjustment + ashr X, C
- srem X, 2^C  ->  X - (((X + Bias) >> C) << C)

Special cases handled:
- Division/remainder by 1 or -1 (identity, negation, or zero)
- Exact division (sdiv exact skips bias, produces ashr exact)
- Negative power-of-2 divisors (result is negated)
- INT_MIN divisor (correct via countr_zero on bit pattern)



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