[all-commits] [llvm/llvm-project] b91eb9: [SDAG] Implement missing legalization for `ISD::VE...

[Benjamin Maxwell via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b91eb9b4e5c48cf7c270f997a889034ff0e1ecca
      https://github.com/llvm/llvm-project/commit/b91eb9b4e5c48cf7c270f997a889034ff0e1ecca
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2026-02-10 (Tue, 10 Feb 2026)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/test/CodeGen/AArch64/vector-extract-last-active.ll
    A llvm/test/CodeGen/WebAssembly/vector-extract-last-active.ll
    M llvm/test/CodeGen/X86/vector-extract-last-active.ll

  Log Message:
  -----------
  [SDAG] Implement missing legalization for `ISD::VECTOR_FIND_LAST_ACTIVE` (#180290)

This lowers the splitting as:
```
any_active(hi_mask)
  ? (find_last_active(hi_mask) + lo_mask.getVectorElementCount())
  : find_last_active(lo_mask)
```

And trivially lowers `<1 x i1>` scalarization to returning zero. Which
is a natural result of the splitting (and the lack of a sentinel
"none-active" result value).

The lowerings likely can be improved. This patch is for completeness.

Should fix:
https://github.com/llvm/llvm-project/pull/178862#issuecomment-3862310334
Fixes #180212



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