[all-commits] [llvm/llvm-project] 7f5805: [libc] Remove "stdio.h" include from fx_bits.h (#1...
Florian Mayer via All-commits
all-commits at lists.llvm.org
Fri Feb 6 13:01:29 PST 2026
Branch: refs/heads/users/fmayer/spr/nfc-flowsensitive-statusor-add-test-for-pointer-receivers
Home: https://github.com/llvm/llvm-project
Commit: 7f5805bbec205cbf94c43a79ec7997fb4c5ebba3
https://github.com/llvm/llvm-project/commit/7f5805bbec205cbf94c43a79ec7997fb4c5ebba3
Author: Haowei <haowei at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M libc/src/__support/fixed_point/fx_bits.h
Log Message:
-----------
[libc] Remove "stdio.h" include from fx_bits.h (#179805)
The "stdio.h" is not used, so remove it from the file. This is causing a
build failure as "stdio.h" is not specified in the build files.
Commit: fbb371affa9e2d0015abc22a9a3f31e7849449af
https://github.com/llvm/llvm-project/commit/fbb371affa9e2d0015abc22a9a3f31e7849449af
Author: jimingham <jingham at apple.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/source/Core/Statusline.cpp
Log Message:
-----------
Prevents a potential lock inversion in StatusLine when shutting down. (#179789)
We have gotten reports of an occasional deadlock on shutdown. The
Driver::MainLoop thread is shutting down, and gets stuck here:
Thread 0x3c017c
start
main
Driver::MainLoop()
lldb::SBDebugger::RunCommandInterpreter(bool, bool)
lldb_private::CommandInterpreter::RunCommandInterpreter(lldb_private::CommandInterpreterRunOptions&)
lldb_private::Debugger::RunIOHandlers()
lldb_private::Debugger::PopIOHandler(std::__1::shared_ptr<lldb_private::IOHandler>
const&)
lldb_private::Editline::Cancel()
lldb_private::LockableStreamFile::Lock()
std::__1::recursive_mutex::lock()
It has acquired the IO Handler list lock (in PopIOHandler) and is stuck
trying to get the debugger output stream lock.
Meanwhile, the event-handler thread is doing:
Thread 0x3c01d3
thread_start
_pthread_start
lldb_private::HostThreadMacOSX::ThreadCreateTrampoline(void*)
lldb_private::HostNativeThreadBase::ThreadCreateTrampoline(void*)
std::__1::__function::__func<lldb_private::Debugger::StartEventHandlerThread()::$_0,
void* ()>::operator()()
lldb_private::Debugger::DefaultEventHandler()
lldb_private::Statusline::~Statusline()
lldb_private::Statusline::UpdateScrollWindow(lldb_private::Statusline::ScrollWindowMode)
lldb_private::Debugger::RefreshIOHandler()
std::__1::recursive_mutex::lock()
UpdateScrollWindow gets the debugger output stream lock, and sends some
data to the output, then it calls RefreshIOHandler while still holding
the Debugger output stream lock. That's the problem, since if it gets
that lock before Editline::Cancel() completes, we'll get this deadlock.
The solution is simple, there's no reason why UpdateScrollWindow should
hold the debugger output lock when it calls RefreshIOHandler. If that
refresh ends up needing to write to the debugger output, it can take the
lock more narrowly at that point. This fixed the deadlock because after
yielding the output lock, the second thread waits on the first to get
the IO Handler lock. Meanwhile the first thread can now acquire the
debugger output lock and finish the Cancel, and exit PopIOHandler which
will allow the second thread to make progress in turn.
I couldn't figure out any way to test this...
Commit: 1a7c110dfc92edd096b1d551fe809d4a278e0407
https://github.com/llvm/llvm-project/commit/1a7c110dfc92edd096b1d551fe809d4a278e0407
Author: Nico Weber <thakis at chromium.org>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Analysis/Scalable/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Analysis/Scalable/BUILD.gn
Log Message:
-----------
[gn] port 77740f5577133
Commit: c0fe938dfdf068c3183cbfec7b3487c36d234a08
https://github.com/llvm/llvm-project/commit/c0fe938dfdf068c3183cbfec7b3487c36d234a08
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/bswap-reduction-aliased.ll
Log Message:
-----------
[SLP][NFC]Add a testing with aliasing between bswap memory operations, NFC
Commit: 9b6b69944965ff7d7c2e62f16b402bac9693f95d
https://github.com/llvm/llvm-project/commit/9b6b69944965ff7d7c2e62f16b402bac9693f95d
Author: Qinkun Bao <qinkun at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M mlir/include/mlir/ExecutionEngine/MemRefUtils.h
M mlir/unittests/ExecutionEngine/CMakeLists.txt
R mlir/unittests/ExecutionEngine/OwningMemRef.cpp
Log Message:
-----------
Revert "[mlir][ExecutionEngine] Fix missing return from operator==() in `OwningMemRef`" (#179999)
Reverts llvm/llvm-project#179655
Break
https://lab.llvm.org/buildbot/#/builders/169/builds/19630
https://lab.llvm.org/buildbot/#/builders/24/builds/17229
Commit: 4f97d093cd48b1f78e6eea8958a5652922d9c9d0
https://github.com/llvm/llvm-project/commit/4f97d093cd48b1f78e6eea8958a5652922d9c9d0
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/test/Conversion/XeGPUToXeVM/materializecast.mlir
Log Message:
-----------
[MLIR][XeGPU][XeVM] Update single element vector type handling. (#178558)
Type conversion rule for single element vector and materialization
function to support the conversion has a mismatch.
Update materialization function to match the type conversion rule.
Commit: ecd1767edbdf694d7444e8152c4a84e3370555a7
https://github.com/llvm/llvm-project/commit/ecd1767edbdf694d7444e8152c4a84e3370555a7
Author: Yury Plyakhin <yury.plyakhin at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M offload/libomptarget/DeviceImage.cpp
Log Message:
-----------
[offload] Fix DeviceImage to handle OffloadBinary::create returning vector (#180003)
OffloadBinary::create() now returns
`Expected<SmallVector<unique_ptr<OffloadBinary>>>`
instead of a single unique_ptr, to support multiple entries in version 2
format.
Updated DeviceImageTy constructor to extract the first binary from the
returned
vector, with empty check. In this context, only one image per
OffloadBinary is expected.
Commit: f4441cb5571d3e1f7ac4d27abc8cf5e58956c0a4
https://github.com/llvm/llvm-project/commit/f4441cb5571d3e1f7ac4d27abc8cf5e58956c0a4
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/Analysis/Scalable/BUILD.gn
Log Message:
-----------
[gn build] Port e59e9fcd38a9
Commit: 13c9276daa86d9c9ad133a7bed538543c42a0771
https://github.com/llvm/llvm-project/commit/13c9276daa86d9c9ad133a7bed538543c42a0771
Author: Wael Yehia <wyehia at ca.ibm.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/test/CodeGen/PowerPC/aix-ifunc-toc-restore-query-neg.ll
Log Message:
-----------
[AIX] fix aix-ifunc-toc-restore-query-neg.ll (#153049)
Commit: 92d0fd79cfe55d766ef8ddd39e8bd1860679cf09
https://github.com/llvm/llvm-project/commit/92d0fd79cfe55d766ef8ddd39e8bd1860679cf09
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M mlir/include/mlir/IR/Remarks.h
Log Message:
-----------
[MLIR][NFC] Use toVector instead toStringRef (#179998)
Commit: d762cc2f03c681aa2cfb9f99c25282bdecaede23
https://github.com/llvm/llvm-project/commit/d762cc2f03c681aa2cfb9f99c25282bdecaede23
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-dynamic-alloca-scalable.ll
A llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/alloca.ll
R llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/fallback.ll
Log Message:
-----------
[GlobalISel] Add SVE support for alloca (#178976)
Complementary to the same handling code in SelectionDAG:
https://github.com/llvm/llvm-project/blob/f3d81d4110f3415eab3459e07b52043872b9e03b/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp#L160-L165
https://github.com/llvm/llvm-project/blob/f3d81d4110f3415eab3459e07b52043872b9e03b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp#L4613-L4623
Co-authored-by: Claude Sonnet 4.5 <noreply at anthropic.com>
Commit: d040788af620482ad87506fe3e825574688c5ccb
https://github.com/llvm/llvm-project/commit/d040788af620482ad87506fe3e825574688c5ccb
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/TargetInfo.cpp
M clang/lib/CIR/CodeGen/TargetInfo.h
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/TargetInfo.cpp
M clang/lib/CodeGen/TargetInfo.h
Log Message:
-----------
[clang] remove unused SrcAddr parameter from performAddrSpaceCast (#179330)
The conversion code always ended up just getting the type of Src from
the Src argument itself, with no virtual users of this, so there is no
point in also providing this API hook. Fix the documentation as well,
since it seems DestAddr must have been similarly removed at some point
in the past from the API but was still documented.
Also fixes CIR to actually return the casted value!
Commit: ba58225a0ae3d5dbaabb504470fa0d4be09fd0d0
https://github.com/llvm/llvm-project/commit/ba58225a0ae3d5dbaabb504470fa0d4be09fd0d0
Author: Adam Siemieniuk <adam.siemieniuk at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M mlir/python/CMakeLists.txt
A mlir/python/mlir/dialects/X86Vector.td
A mlir/python/mlir/dialects/X86VectorTransformOps.td
A mlir/python/mlir/dialects/transform/x86vector.py
A mlir/python/mlir/dialects/x86vector.py
A mlir/test/python/dialects/transform_x86vector_ext.py
A mlir/test/python/dialects/x86vector.py
Log Message:
-----------
[mlir][x86vector] Python bindings for x86vector dialect (#179958)
Registers python bindings for x86vector dialect and transform ops.
Commit: 5326166866e3a1c2ecc260830d19b03054ff6418
https://github.com/llvm/llvm-project/commit/5326166866e3a1c2ecc260830d19b03054ff6418
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU][SIInsertWaitcnt][NFC] Don't expose internal data structure to user (#179736)
With this patch we are no longer exposing the internal data structure
that holds the WaitEvents to the user through the `getWaitEventMask()`
API. Instead we only allow the user to query a specific type and get the
corresponding `WaitEventSet` with `getWaitEvents(T)`.
Note: This patch also renames `getWaitEventMask()` to `getWaitEvents()`
because we are no longer returning a mask but instead a `WaitEventSet`
object.
Commit: fe754dff6d7ed3f7d69e5a97846d9320cb407977
https://github.com/llvm/llvm-project/commit/fe754dff6d7ed3f7d69e5a97846d9320cb407977
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/loadcombine.ll
M llvm/test/Transforms/SLPVectorizer/X86/bad-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/bswap-reduction-aliased.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
Log Message:
-----------
[SLP]Remove LoadCombine workaround after handling of the copyables
LoadCombine pattern handling was added as a workaround for the cases,
where the SLP vectorizer could not vectorize the code effectively. With
the copyables support, it can handle it directly.
Also, patch adds support for scalar loads[ + bswap] pattern for byte
sized loads (+ reverse bytes for bswap)
Recommit after revert in 6377c86d718232fe60c548dfd7ab439f7ff84df7
Reviewers: RKSimon, hiraditya
Pull Request: https://github.com/llvm/llvm-project/pull/174205
Commit: 91f39535c761d47c7360d4ebe4b969626a82d8a5
https://github.com/llvm/llvm-project/commit/91f39535c761d47c7360d4ebe4b969626a82d8a5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/test/CodeGenHLSL/builtins/distance.hlsl
M clang/test/CodeGenHLSL/builtins/length.hlsl
M clang/test/CodeGenHLSL/builtins/max-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/min-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/pow-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/reflect.hlsl
M clang/test/CodeGenHLSL/builtins/refract.hlsl
M clang/test/CodeGenHLSL/builtins/smoothstep.hlsl
M clang/test/Headers/__clang_hip_cmath.hip
M clang/test/Headers/__clang_hip_math.hip
M llvm/lib/Transforms/Utils/InlineFunction.cpp
A llvm/test/Transforms/Inline/ret_attr_nofpclass.ll
Log Message:
-----------
Inliner: Handle nofpclass return attributes (#179776)
Follow along with how range is handled.
Commit: fad9b2e0e0dd8b65a0ac0ecc58c658092d400863
https://github.com/llvm/llvm-project/commit/fad9b2e0e0dd8b65a0ac0ecc58c658092d400863
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/include/llvm/ADT/ScopeExit.h
Log Message:
-----------
[llvm][ADT] Mark the whole scope_exit class [[nodiscard]] instead (#180008)
This PR is to address:
https://github.com/llvm/llvm-project/pull/179720#issuecomment-3854792269
https://github.com/llvm/llvm-project/pull/179720#issuecomment-3855339636
Commit: 9ebdeb2e8cbe8285c8383d8079663b6c73accac8
https://github.com/llvm/llvm-project/commit/9ebdeb2e8cbe8285c8383d8079663b6c73accac8
Author: Alex Langford <alangford at apple.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/include/lldb/Target/Process.h
M lldb/source/API/SBModule.cpp
M lldb/source/Core/DynamicLoader.cpp
M lldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.cpp
M lldb/source/Plugins/DynamicLoader/FreeBSD-Kernel/DynamicLoaderFreeBSDKernel.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
M lldb/source/Plugins/DynamicLoader/wasm-DYLD/DynamicLoaderWasmDYLD.cpp
M lldb/source/Plugins/JITLoader/GDB/JITLoaderGDB.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Target/Process.cpp
Log Message:
-----------
[lldb] Return Expected<ModuleSP> from Process::ReadModuleFromMemory (#179583)
I noticed that Module::GetMemoryObjectFile populates a Status object
upon error but it's effectively dropped on the floor. Instead, the
clients can report the error as desired.
At the moment, all clients are either (1) consuming the error because
it's only trying to find a module, or (2) log the error and bail out
early. I tried to preserve existing behavior as faithfully as possible.
Commit: ee816947ac4fc449b3b382b40f21f9f8c24b126b
https://github.com/llvm/llvm-project/commit/ee816947ac4fc449b3b382b40f21f9f8c24b126b
Author: Zorojuro <sawantsukumar at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M libc/shared/math.h
A libc/shared/math/f16fmaf.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/f16fmaf.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/f16fmaf.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor f16fmaf to Header Only. (#178851)
closes #175319
Commit: 943782be5aec5db854065145dd73a618c3a775be
https://github.com/llvm/llvm-project/commit/943782be5aec5db854065145dd73a618c3a775be
Author: Adrian Vogelsgesang <avogelsgesang at salesforce.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/include/lldb/Target/Target.h
M lldb/source/Target/Target.cpp
M lldb/test/API/functionalities/scripted_frame_provider/TestScriptedFrameProvider.py
Log Message:
-----------
[lldb] Broadcast `eBroadcastBitStackChanged` when frame providers change (#171482)
We want to reload the call stack whenever the frame providers are
updated. To do so, we now emit a `eBroadcastBitStackChanged` on all
threads whenever any changes to the frame providers take place.
I found this very useful while iterating on a frame provider in
lldb-dap. So far, the new frame provider only took effect after
continuing execution. Now the backtrace in VS-Code gets refreshed
immediately upon running `target frame-provider add`.
Commit: 9639e9669e36d4357a76bee775b8becb8168d946
https://github.com/llvm/llvm-project/commit/9639e9669e36d4357a76bee775b8becb8168d946
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/inline-asm.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
Log Message:
-----------
[AArch64] fix copy from GPR32 to FPR16 (#176594)
fixes https://github.com/llvm/llvm-project/issues/79822
cc https://github.com/rust-lang/rust/issues/120374
The example fails on nightly https://godbolt.org/z/zEojPzqWc.
Commit: 7bf47e2e84b37764424b1ae9f1b3e5b7fa984f95
https://github.com/llvm/llvm-project/commit/7bf47e2e84b37764424b1ae9f1b3e5b7fa984f95
Author: Samarth Narang <70980689+snarang181 at users.noreply.github.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/test/Dialect/Tensor/invalid.mlir
Log Message:
-----------
[mlir][tensor] Guard constant reshape folding (#179077)
Commit: 059176dfede5c4c4e3b0d2fbef194b318fb61188
https://github.com/llvm/llvm-project/commit/059176dfede5c4c4e3b0d2fbef194b318fb61188
Author: RattataKing <amilywu2 at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M mlir/include/mlir-c/Support.h
M mlir/include/mlir/Bindings/Python/NanobindUtils.h
M mlir/include/mlir/CAPI/Support.h
M mlir/lib/CAPI/IR/Support.cpp
Log Message:
-----------
[MLIR][Python] Add llvm raw fd ostream c api (#179770)
This PR adds a C API `MlirLlvmRawFdOstream` for `llvm::raw_fd_ostream`,
which cannot be safely replaced by `std::ofstream` on Windows.
`llvm::raw_fd_ostream` configures Win32 file sharing flags, allowing
other handles (e.g. Python temp file handles) to coexist, see details
[here](https://llvm.org/doxygen/Windows_2Path_8inc_source.html#l1281),
while `std::ofstream` disables file sharing by default.
Commit: ccf46155a7efc131519a07f3ba62bcba5da65fa2
https://github.com/llvm/llvm-project/commit/ccf46155a7efc131519a07f3ba62bcba5da65fa2
Author: ofri frishman <ofri4321 at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/Utils/ReshapeOpsUtils.h
M mlir/test/Dialect/MemRef/canonicalize.mlir
Log Message:
-----------
[mlir] disable folding collapse expand to cast (#179209)
Collapsing expand(collapse(src)) to cast(src) is supported in cases
where the source and result are cast compatible but not equal. When the
source has dynamic dimensions this leads to cases where the cast is
enabled even though certain dimensions cast from static to dynamic when
the dynamic size is not assured to be equal to the static size.
Currently blocking applying this folding when the source has dynamic
dimensions to preserve correctness.
In the future it could be possible to enable some cases of folding when
not all dimensions of the source are static.
Such cases could be when:
1) expand and collapse happened on non dynamic dims
2) expand and collapse on dynamic dims could be folded to no op
Commit: 4c05ff11ff460eda9b81132d297ef8a918b91643
https://github.com/llvm/llvm-project/commit/4c05ff11ff460eda9b81132d297ef8a918b91643
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Lex/PPDirectives.cpp
A clang/test/Modules/single-module-parse-mode-compiles.m
Log Message:
-----------
[clang][modules] Support every import syntax in single-module-parse-mode (#179610)
Previously, `-fmodules-single-module-parse-mode` only prevented module
compilation/loading when initiated from an `#include` or `#import`
directive. This PR does the same for `@import`, `#pragma clang module
import` and `#pragma clang module load`. This is done by sinking the
logic down into `CompilerInstance::loadModule()`.
Commit: 82799a448ec9c207ce505d22f9bf0ba1f1f49407
https://github.com/llvm/llvm-project/commit/82799a448ec9c207ce505d22f9bf0ba1f1f49407
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pown.ll
M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
Log Message:
-----------
Reapply "AMDGPU: Use real copysign in fast pow (#97152)" (#178036)
This reverts commit bff619f91015a633df659d7f60f842d5c49351df.
This was reverted due to regressions caused by poor copysign
optimization, which have been fixed.
Commit: 9ea286153ea89fccae6095a9df599bca758df5af
https://github.com/llvm/llvm-project/commit/9ea286153ea89fccae6095a9df599bca758df5af
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/include/llvm/MC/MCSubtargetInfo.h
M llvm/lib/MC/MCSubtargetInfo.cpp
Log Message:
-----------
[MC] Return const FeatureBitset& from MCSubtargetInfo::ToggleFeature/SetFeatureBitsTransitively/ClearFeatureBitsTransitively (#179964)
These functions were returning a copy of an MCSubtargetInfo member after
updating. This a convenience for some callers to avoid needing to call
getFeatureBits(). Not all callers use the returned value and some just
pass it on to a function that wants a reference.
FeatureBitset is currently 48 bytes. Return a reference so we don't
speculatively copy it. Callers can make a copy if necessary.
Commit: 972cd847efb20661ea7ee8982dd19730aa040c75
https://github.com/llvm/llvm-project/commit/972cd847efb20661ea7ee8982dd19730aa040c75
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp
M mlir/lib/RegisterAllExtensions.cpp
A mlir/test/Conversion/XeVMToLLVM/legalize_large_vector.mlir
M mlir/test/Conversion/XeVMToLLVM/xevm-to-llvm.mlir
Log Message:
-----------
[MLIR][XeVM] Remove xevm to llvm from convert to llvm (#175672)
Remove xevm to llvm conversion pass from convert to llvm as it is a
backend dependent conversion.
And add legalization pattern for splitting large vector load that are
eventually split into smaller
vectors by shufflevector. shufflevector can be replaced with a smaller
load in such case.
Commit: 7022e5a514b656e0cc62c4877b306a7057ce4091
https://github.com/llvm/llvm-project/commit/7022e5a514b656e0cc62c4877b306a7057ce4091
Author: vporpo <vasileios.porpodas at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU][SIINsertWaitcnts][NFC] Make TTI and ST references (#180017)
This patch converts WaitcntGenerator::TTI and ST pointers to references.
This helps remove some null checking assertions.
Commit: e9b578a4d77025e18318efedd0f3f3764338d859
https://github.com/llvm/llvm-project/commit/e9b578a4d77025e18318efedd0f3f3764338d859
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/Basic/Targets/NVPTX.h
M clang/test/CodeGen/builtins-nvptx-ptx60.cu
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/CodeGen/nvptx_attributes.c
M clang/test/CodeGenCUDA/convergent.cu
M clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
M clang/test/Headers/gpuintrin.c
M flang/lib/Frontend/CompilerInstance.cpp
M flang/test/Lower/OpenMP/target_cpu_features.f90
M llvm/lib/Target/NVPTX/NVPTX.td
M llvm/lib/Target/NVPTX/NVPTXSubtarget.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/test/CodeGen/NVPTX/clusterlaunchcontrol-multicast.ll
M llvm/test/CodeGen/NVPTX/convert-sm100a.ll
M llvm/test/CodeGen/NVPTX/convert-sm103a.ll
M llvm/test/CodeGen/NVPTX/f32-ex2.ll
M llvm/test/CodeGen/NVPTX/fexp2.ll
M llvm/test/CodeGen/NVPTX/flog2.ll
M llvm/test/CodeGen/NVPTX/i128.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-arch-O0.ll
R llvm/test/CodeGen/NVPTX/ptx-version-validation.ll
M llvm/test/CodeGen/NVPTX/rsqrt.ll
M llvm/test/CodeGen/NVPTX/sm-version.ll
M llvm/test/CodeGen/NVPTX/surf-tex.py
A llvm/test/CodeGen/NVPTX/wmma-ptx86-sm120a.py
M mlir/include/mlir/Dialect/GPU/Pipelines/Passes.h
M mlir/include/mlir/Dialect/GPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
Log Message:
-----------
Revert "Reland "[NVPTX] Validate user-specified PTX version against SM version"" (#180035)
Reverts llvm/llvm-project#179304 due to
https://github.com/llvm/llvm-project/pull/179304#issuecomment-3856100622
Commit: c43d1c5292d7d908fceae89e5d08016c16daac74
https://github.com/llvm/llvm-project/commit/c43d1c5292d7d908fceae89e5d08016c16daac74
Author: Yury Plyakhin <yury.plyakhin at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Object/OffloadBinary.cpp
Log Message:
-----------
[Object][Offload] Fix OffloadBinary::create to explicitly move return value (#180011)
On older compilers (GCC 7), implicit move on return is not guaranteed,
causing the compiler to attempt copying the SmallVector of unique_ptr's,
which fails because unique_ptr has a deleted copy constructor.
Added explicit std::move() on both return paths to ensure move semantics
are used instead of copy, fixing compilation by GCC 7.
Commit: 376dc83d7ab77bd048ebc9be7232e93056e93fb2
https://github.com/llvm/llvm-project/commit/376dc83d7ab77bd048ebc9be7232e93056e93fb2
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Add RegBankLegalize rules for TFE buffer loads (#179529)
Commit: e524ee5a7dd932391909652e56a60b25f7a471b4
https://github.com/llvm/llvm-project/commit/e524ee5a7dd932391909652e56a60b25f7a471b4
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-metadata.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge-vf1.ll
Log Message:
-----------
[VPlan] Auto-generate some VPlan check lines.
Use new UTC support to auto-generate some check lines to make them
easier to update in the future.
Commit: 0d020f14c9ec720a8360c35a1d4782e25ce891e5
https://github.com/llvm/llvm-project/commit/0d020f14c9ec720a8360c35a1d4782e25ce891e5
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
A lldb/test/API/tools/lldb-dap/launch/io/DAP_launch_io.py
R lldb/test/API/tools/lldb-dap/launch/io/TestDAP_launch_io.py
A lldb/test/API/tools/lldb-dap/launch/io/TestDAP_launch_io_integratedTerminal.py
A lldb/test/API/tools/lldb-dap/launch/io/TestDAP_launch_io_internalConsole.py
Log Message:
-----------
[lldb-dap] Split the launch IO redirection tests. (#179974)
Tests in the same python file share the same build directory.
Although they are the same binary. The logs produced are different.
Commit: df662e94f8da5604164917d85890669401915556
https://github.com/llvm/llvm-project/commit/df662e94f8da5604164917d85890669401915556
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
Log Message:
-----------
[AMDGPU] Limit tensor load/store to gfx1250 only. NFC (#179737)
Commit: 02d8c9c63a9925cea2ab7560742dbf2619da89cc
https://github.com/llvm/llvm-project/commit/02d8c9c63a9925cea2ab7560742dbf2619da89cc
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M openmp/device/src/LibC.cpp
Log Message:
-----------
[OpenMP] Stub vprintf on non-NVPTX if no libc (#180025)
The AMDGPU check was added in
https://github.com/llvm/llvm-project/pull/123670 where the reasoning
seems to be that the NVIDIA SDK will provide `vprintf` for the NVPTX
case and AMDGPU was the only other supported target at the time.
SPIR-V also needs this stubbed out, so just check that it's not NVPTX.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: b985974e75b58a6176fbb76fdf24a65f0759617f
https://github.com/llvm/llvm-project/commit/b985974e75b58a6176fbb76fdf24a65f0759617f
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M offload/test/lit.cfg
Log Message:
-----------
[Offload][lit] Link against SPIR-V DeviceRTL if present (#180030)
Right now if we run `check-offload` for SPIR-V the DeviceRTL isn't used
because we pass `-nogpulib`.
Don't pass that, but also don't pass `--libomptarget-spirv-bc-path` yet
because the DeviceRTL is brand new so we don't want to error if it's not
present.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Commit: c1f93d1390adc2380f7a69f149711bcfabbecd83
https://github.com/llvm/llvm-project/commit/c1f93d1390adc2380f7a69f149711bcfabbecd83
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
Log Message:
-----------
[ARM] Remove `NoInfsFPMath` and `NoNaNsFPMath` uses (#179935)
Commit: f227efef3433dff85c379006d15de80b7847e1b5
https://github.com/llvm/llvm-project/commit/f227efef3433dff85c379006d15de80b7847e1b5
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation5.ll
Log Message:
-----------
[SLP][NFC]Add another shl-to-add modeling test case, NFC
Commit: 08cf3e62b449ec4254c2141d81f16b13fc92db0e
https://github.com/llvm/llvm-project/commit/08cf3e62b449ec4254c2141d81f16b13fc92db0e
Author: David Green <david.green at arm.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/Target.td
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
M llvm/test/CodeGen/AArch64/fcvt_combine.ll
Log Message:
-----------
[AArch64][GlobalISel] Add GISel handling for FCVT fixed. (#178903)
This uses the generalized code from #178603 to allow GISel to
select fixed-point fcvt in the same way as SDAG.
Commit: 2e75ee8c77fc6dfde6bec778d6ac8ba03d54ee44
https://github.com/llvm/llvm-project/commit/2e75ee8c77fc6dfde6bec778d6ac8ba03d54ee44
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
Log Message:
-----------
[libc][Github] Downgrade clang version to v21 (#180043)
apt.llvm.org again is not working for the current release as they try
and get everything setup for the release/22.x branch. Downgrade for now
until installing LLVM 22 works.
Commit: 9bfd57eec6a42b2f0525f66de97524788f9ae06d
https://github.com/llvm/llvm-project/commit/9bfd57eec6a42b2f0525f66de97524788f9ae06d
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGenOpenMP/not-yet-implemented.c
A clang/test/CIR/CodeGenOpenMP/omp-llvmir.c
M clang/test/CIR/CodeGenOpenMP/parallel.c
M clang/tools/cir-opt/cir-opt.cpp
M clang/tools/cir-translate/cir-translate.cpp
Log Message:
-----------
[CIR][OpenMP] Enable lowering of the OpenMP dialect to LLVM IR (#178515)
This patch adds the OpenMP dialect to be part of the lowering to LLVM
IR. A minor change was made to a test to compensate for a yet implemented
feature: ++a to a = a + 1
Commit: 30986dc3ff0c5bc978203e6e6c1210068b828adc
https://github.com/llvm/llvm-project/commit/30986dc3ff0c5bc978203e6e6c1210068b828adc
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/vplan-printing-reductions.ll
Log Message:
-----------
[LV] Regen a VPlan-printing test with UTC (#179948)
Post 49288b65 ([UTC] Add initial VPlan support, #178534), we can
generate VPlan-printing tests with UTC. Do it for one test, with the
caveat that two Final VPlan prints are no longer checked.
Commit: e3a09dd13b6ef8f386fbfa83289b759536f5ccfc
https://github.com/llvm/llvm-project/commit/e3a09dd13b6ef8f386fbfa83289b759536f5ccfc
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/EvaluateRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/NextRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ReadMemoryRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StackTraceRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StepInRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StepInTargetsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StepOutRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/WriteMemoryRequestHandler.cpp
Log Message:
-----------
[lldb-dap][NFC] Create helper function DAP::ProcessIsNotStopped (#180056)
From
https://github.com/llvm/llvm-project/pull/179202#discussion_r2757981118
Commit: 124c8b4054fd4fe8234611a367d50b5a62f5903e
https://github.com/llvm/llvm-project/commit/124c8b4054fd4fe8234611a367d50b5a62f5903e
Author: jimingham <jingham at apple.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/include/lldb/Host/HostThread.h
M lldb/include/lldb/Target/Process.h
M lldb/source/Host/common/HostThread.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/ProcessTrace.cpp
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/was_hit/TestWasHit.py
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/was_hit/bkpt_resolver.py
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/was_hit/main.c
Log Message:
-----------
Fix the modal private state thread we use for running expressions on the private state thread (#179799)
We have a problem when some code on the private state thread needs to
run an expression. The private state thread is the one that fetches
"raw" events from the Process Plugin and decides how to handle them. But
if the private state thread needs to fetch the processed events to drive
running an expression, it can't also be the thread processing the raw
events.
We solve this by swapping in a modal private state thread just to handle
the events from the expression evaluation. That worked until you could
cause the expression evaluation to happen from Python, because then it
wasn't just the fetching of events that matter, but also the state of
the process and the state of the runlocks. The modal private state
thread is really a modal version of the thread and its associated state.
This patch gathers all the relevant control parameters into a structure
which we can swap in and out when needed.
It also adds a test using the new "was_hit" breakpoint resolver
affordance, which, since it acts as an asynchronous breakpoint callback,
gets run on the private state thread, showing that with the change we
can call expressions in the `was_hit` callback without problems.
Commit: af3cc148c39e4e7d91250962019745c4bc1d37b3
https://github.com/llvm/llvm-project/commit/af3cc148c39e4e7d91250962019745c4bc1d37b3
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/include/lldb/Utility/DataExtractor.h
M lldb/include/lldb/Utility/VirtualDataExtractor.h
M lldb/source/Plugins/ObjectContainer/BSD-Archive/ObjectContainerBSDArchive.cpp
M lldb/source/Plugins/ObjectContainer/Mach-O-Fileset/ObjectContainerMachOFileset.cpp
M lldb/source/Plugins/ObjectContainer/Universal-Mach-O/ObjectContainerUniversalMachO.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
M lldb/source/Utility/VirtualDataExtractor.cpp
M lldb/unittests/Utility/VirtualDataExtractorTest.cpp
Log Message:
-----------
[lldb][NFC] Add some override methods to VirtualDataExtractor (#179858)
This changes VirtualDataExtractor's GetByteSize to return the virtual
byte size of the buffer (external users only understand the data
contents in terms of the virtual sizes & offsets). There are check
methods in DataExtractor that check they are not going off the end of a
buffer, they usually use the BytesLeft() method. There are a couple of
callers of BytesLeft() externally, but it is predominantly an internal
use API. I have BytesLeft() use the physical size of the buffer, not the
virtual size, for the benefit of the DataExtractor methods. (and to
avoid duplicating all of them down in VirtualDataExtractor)
Another problem is the we call SetData on DataExtractorSP's (e.g. see
the ObjectFile ctor) with the DataBuffer it already has, an offset of 0,
and the GetByteSize. A no-op for a DataExtractor that is already using
that DataBuffer. But SetData would try to use that length as a physical
size, and truncate the buffer that the DataExtractor would accept.
I added VirtualDataExtractor subclass methods for the SetData's, detect
(1) data being added to an uninitialized DataExtractor, (2) the same
data / offset / length as currently being used is added to the
DataExtractor (a no-op), or (3) we're genuinely changing the data source
or setting an offset / length that is different. This final case we're
not ready to handle today, I added asserts for them so we can catch it
in debug builds, and then I clear the LookupTable and add a no-op entry
so this extractor will behave like a plain DataExtractor -- because I
don't know better to do. If we genuinely need to handle this case, and
I'm pretty sure we don't need to, I'd have to assume that we're taking a
subset of the original data source (an offset & length), so we'd need to
update all of the LookupTable entries to reflect the new offsets, and
remove entries that are no longer referring to the subsetted range. I'll
leave that until there's any evidence it's actually needed.
rdar://148939795
Commit: 6441f1c9d5b5ac6680b783dfaad82e55945596c3
https://github.com/llvm/llvm-project/commit/6441f1c9d5b5ac6680b783dfaad82e55945596c3
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/docs/RISCVUsage.rst
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/TargetParser/RISCVTargetParser.cpp
M llvm/test/TableGen/riscv-target-def.td
M llvm/unittests/TargetParser/RISCVTargetParserTest.cpp
M llvm/utils/TableGen/Basic/RISCVTargetDefEmitter.cpp
Log Message:
-----------
[RISCV] Introduce a new syntax for processor-specific tuning feature strings (#175063)
This patch proposes new a tuning feature string format that helps users
to build a performance model by "configuring" an existing tune CPU,
along with its scheduling model. For example, this string
```
"sifive-x280:single-element-vec-fp64"
```
takes ``sifive-x280`` as the "base" tune CPU and configured it with
``single-element-vec-fp64``. This gives us a performance model that
looks exactly like that of ``sifive-x280``, except some of the 64-bit
vector floating point instructions now produce only a single element per
cycle due to ``single-element-vec-fp64``.
This string could eventually be used in places like ``-mtune`` at the
frontend. Right now, this patch only implements the parser part, which
is put under the TargetParser library.
The grammar for this string is:
```
tune-cpu ::= 'tuning CPU name in lower case'
directive ::= "[a-zA-Z0-9_-]+"
tune-features ::= directive ["," directive]*
```
A *directive* can and can only _enable_ or _disable_ a certain tuning
feature from the tuning CPU. A **positive directive**, like the
``single-element-vec-fp64`` we just saw, enables an additional tuning
feature in the associated tuning model.
A **negative directive**, on the other hand, removes a certain tuning
feature. For example, ``sifive-x390`` already has the
``single-element-vec-fp64`` feature, and we can use
"sifive-x390:no-single-element-vec-fp64" to create a new performance
model that looks nearly the same as ``sifive-x390`` except
``single-element-vec-fp64`` being cut out. In this case,
``no-single-element-vec-fp64`` is a negative directive.
There are additional restrictions on what we can put in the list of
directives, please refer to the documentations for more details.
Right now, this string only accepts directives that are explicitly
supported by the tune CPU. For example, "sifive-x280:prefer-w-inst" is
not a valide string as ``prefer-w-inst`` is not supported by
``sifive-x280`` at this moment. Vendors of these processors are expected
to maintain the compatibility of their supported directives across
different versions.
---------
Co-authored-by: Sam Elliott <aelliott at qti.qualcomm.com>
Commit: 08d77f0308c0ab5d087879e2651ec7eb8a132349
https://github.com/llvm/llvm-project/commit/08d77f0308c0ab5d087879e2651ec7eb8a132349
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
A clang/docs/ClangIRCleanupAndEHDesign.md
M clang/docs/index.rst
Log Message:
-----------
[CIR][docs] C++ cleanup and exception handling design for CIR (#177625)
This change adds a document describing a new design for C++ cleanups and
exception handling in CIR.
Commit: 2adb6b815999a0e2c618992f1f8e1baa8ef46aab
https://github.com/llvm/llvm-project/commit/2adb6b815999a0e2c618992f1f8e1baa8ef46aab
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenConstantEmitter.h
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/test/CIR/CodeGen/new.cpp
Log Message:
-----------
[CIR] Upstream support for variable sized array new (#179798)
This adds CIR support for calling array new with a variable size.
Commit: c7e3bddbfd3451cf5138ec94e00eae45ab9c4b7a
https://github.com/llvm/llvm-project/commit/c7e3bddbfd3451cf5138ec94e00eae45ab9c4b7a
Author: YunQiang Su <syq at debian.org>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
A llvm/test/CodeGen/MIR/Mips/mips32r6-copyPhysReg-fcmp-f64-to-gpr.mir
Log Message:
-----------
MIPS: readsWritesFloatRegister, inc Idx for continue (#179932)
Otherwise, the input register will also be treat as write.
Commit: 2b3d97ad2dd547d2cc95dfc2585836d1db8475c7
https://github.com/llvm/llvm-project/commit/2b3d97ad2dd547d2cc95dfc2585836d1db8475c7
Author: Rohan Jacob-Rao <rohanjr at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
Log Message:
-----------
[NFC][Clang][UnsafeBufferUsage] Remove unnecessary struct. (#178801)
The struct has no members and has a surrounding namespace that can be
used for disambiguating names. This was also mentioned in a previous PR
review:
https://github.com/llvm/llvm-project/pull/101583/changes#r1737089937
Commit: 74e9bc6cb93964edfcb3761623a43d1e55aceb2a
https://github.com/llvm/llvm-project/commit/74e9bc6cb93964edfcb3761623a43d1e55aceb2a
Author: YunQiang Su <syq at debian.org>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M openmp/runtime/CMakeLists.txt
Log Message:
-----------
openmp: add atomic to SANITIZER_COMMON_LINK_LIBS for MIPS (#179933)
atomic is needed explicitly for MIPS.
Commit: 1ef499b1fcac81b2d4297ce6a608734706994b8a
https://github.com/llvm/llvm-project/commit/1ef499b1fcac81b2d4297ce6a608734706994b8a
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
Log Message:
-----------
AMDGPU/GlobalISel: Fix buffer store RegBankLegalize rules (#179994)
Enable commented out D16 v3f16 tests.
Commit: 3bbb997d4182ae2ba7160e354755e2e7500baff0
https://github.com/llvm/llvm-project/commit/3bbb997d4182ae2ba7160e354755e2e7500baff0
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/test/Analysis/AliasAnalysis/alias-analysis-cray-pointers.fir
M flang/test/Analysis/AliasAnalysis/load-ptr-designate.fir
M flang/test/Analysis/AliasAnalysis/ptr-component.fir
Log Message:
-----------
[flang] Disambiguate descriptor and data addresses in FIR AA. (#179774)
This change basically treats the descriptors' and data loads
as non-aliasing (with one exception) same way as we do it
for the purpose of the TBAA tags generation for LLVM
to do better optimizations. This change enables more LICM in Flang MLIR.
Commit: 1f26c39cfcfa900700d5f1d109e3860b9ffb1f46
https://github.com/llvm/llvm-project/commit/1f26c39cfcfa900700d5f1d109e3860b9ffb1f46
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/test/Transforms/licm.fir
Log Message:
-----------
[flang] Allow fir.field_index and fir.coordinate_of speculation. (#179785)
This change makes `fir.field_index` a Pure operation, and
add support of `ConditionallySpeculatable` interface for
`fir.coordinate_of`. The test demonstrates how this affects
Flang LICM.
Commit: eb9e98f62e0c147482efc310e2a7509c7b07ee4b
https://github.com/llvm/llvm-project/commit/eb9e98f62e0c147482efc310e2a7509c7b07ee4b
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/CMakeLists.txt
M llvm/lib/Target/X86/X86.h
A llvm/lib/Target/X86/X86CleanupLocalDynamicTLS.cpp
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86PassRegistry.def
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
Log Message:
-----------
[NewPM] Port x86-cleanup-local-dynamic-tls (#179864)
Port x86-cleanup-local-dynamic-tls to the new pass manager.
I moved LDTLSCleanup to a new
llvm/lib/Target/X86/X86CleanupLocalDynamicTLS.cpp file and renamed it to
X86CleanupLocalDynamicTLSPass. Then I renamed the legacy pass, and
adding a NewPM wrapper around the impl.
No test coverage added for now as there are no MIR->MIR tests exercising
this pass and we do not have enough ported to run any end to end tests.
Commit: c3db52701e55432f2762724417ddeda79d6dda35
https://github.com/llvm/llvm-project/commit/c3db52701e55432f2762724417ddeda79d6dda35
Author: Derek Schuff <dschuff at chromium.org>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/MC/MCWasmStreamer.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
A llvm/test/CodeGen/WebAssembly/common-error.ll
A llvm/test/MC/WebAssembly/common-error.s
Log Message:
-----------
[MC][Wasm] Emit useful error message when encountering common symbols (#179586)
We don't currently support common symbols for Wasm, and we currently
emit a generic error with a backtrace. Instead, don't crash, and report
the names of the offending symbols.
Commit: 6d53558bb6a2167a96dc84885685ff0e558b8374
https://github.com/llvm/llvm-project/commit/6d53558bb6a2167a96dc84885685ff0e558b8374
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
Log Message:
-----------
[gn build] Port eb9e98f62e0c
Commit: d005cb2953bd7346ce042e11bf583923ffc36713
https://github.com/llvm/llvm-project/commit/d005cb2953bd7346ce042e11bf583923ffc36713
Author: Ruoyu Qiu <cabbaken at outlook.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
A llvm/include/llvm/TargetParser/AVRTargetParser.h
M llvm/include/llvm/TargetParser/Triple.h
A llvm/lib/TargetParser/AVRTargetParser.cpp
M llvm/lib/TargetParser/CMakeLists.txt
A llvm/test/tools/llvm-objdump/ELF/AVR/lit.local.cfg
A llvm/test/tools/llvm-objdump/ELF/AVR/mattr.test
M llvm/tools/llvm-objdump/llvm-objdump.cpp
Log Message:
-----------
[llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (#174731)
This PR updates llvm-objdump to detect the specific AVR architecture
from the ELF header flags when no specific CPU is provided.
Fixes: #146451
---------
Signed-off-by: RuoyuQiu <cabbaken at outlook.com>
Signed-off-by: Ruoyu Qiu <cabbaken at outlook.com>
Co-authored-by: qiuruoyu <qiuruoyu at hygon.cn>
Commit: b4a32db1f2269e7b72687b0a751bcf820c4f8032
https://github.com/llvm/llvm-project/commit/b4a32db1f2269e7b72687b0a751bcf820c4f8032
Author: Rohan Jacob-Rao <rohanjr at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
Log Message:
-----------
[NFC][Clang][unsafe-buffer-usage] Simplify isPtrBufferSafe with helper. (#178768)
Also change parameter type to a reference since it's assumed to be
nonnull.
Commit: 41cc71e9b176d80dc0d3c4f063cd656d8c04176a
https://github.com/llvm/llvm-project/commit/41cc71e9b176d80dc0d3c4f063cd656d8c04176a
Author: jimingham <jingham at apple.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/test/API/python_api/process/cancel_attach/TestCancelAttach.py
Log Message:
-----------
Disable TestCancelAttach.py for linux -> linux remote (#180092)
This test was already disabled going from windows -> linux because it
was timing out there.
The PR: https://github.com/llvm/llvm-project/pull/179799 seems to have
exacerbated whatever this stall was, and now we're seeing it when
debugging from a linux host to a remote linux as well.
The native local host tests works correctly on all the bots that we
have, however. So I'm disabling the remote test till we can figure out
why this is problematic.
Commit: 6c37aa8ffd62a9a7f6585b82bd74a3531d97d3a1
https://github.com/llvm/llvm-project/commit/6c37aa8ffd62a9a7f6585b82bd74a3531d97d3a1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Remove P from RISCVISD::PASUB(U)/PMULHSU/PMULHR(U)/PMULHRSU. NFC (#180064)
There's a good chance we'll want to use these for scalar too.
Drop vector type from SDTypeProfile. Remove PMULHSU since we already
have RISCVISD::MULHSU for scalars in the base ISA.
Commit: 313d9ac1cf92e79df1a7fefdd6900de904f638f0
https://github.com/llvm/llvm-project/commit/313d9ac1cf92e79df1a7fefdd6900de904f638f0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rv32p.ll
Log Message:
-----------
[RISCV] Add wmul(u) codegen for RV32+P (#180032)
mulh tests are to make sure we continue to use mulh when only the
upper half is used.
Commit: 1ad20b942817250135c92aac0721cafd061e8465
https://github.com/llvm/llvm-project/commit/1ad20b942817250135c92aac0721cafd061e8465
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Rename RISCVISD::PPACK_DH->PPAIRE_DB. NFC (#180089)
The instruction was renamed, but we hadn't renamed the ISD opcode.
Commit: 39dba7b354139de6e5a3dd0da7baaffdea33ada1
https://github.com/llvm/llvm-project/commit/39dba7b354139de6e5a3dd0da7baaffdea33ada1
Author: A. Jiang <de34 at live.cn>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M libcxx/include/__algorithm/unwrap_range.h
Log Message:
-----------
[libc++] Fix module builds for `<__algorithm/unwrap_range.h>` (#179887)
3a653afd45709432181952c0ffdb53eceb0939ae removed the inclusion of
`<__utility/declval.h>` from `<__algorithm/unwrap_range.h>`. However,
`unwrap_range.h` still needs to use `std::declval`. So we should restore
the inclusion.
The building failure with Clang modules was already caught by CI.
Commit: b8060ef0479e12dae0449bc6389417a247846118
https://github.com/llvm/llvm-project/commit/b8060ef0479e12dae0449bc6389417a247846118
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/TargetParser/BUILD.gn
Log Message:
-----------
[gn build] Port d005cb2953bd
Commit: 93d92d54815709af8062610bd07284c457ecde18
https://github.com/llvm/llvm-project/commit/93d92d54815709af8062610bd07284c457ecde18
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
A llvm/test/CodeGen/LoongArch/lasx/vxi1-masks.ll
Log Message:
-----------
[LoongArch][NFC] Add tests for vxi1 vector masks used with AND/OR/XOR operations on lasx (#163490)
Commit: 46423d816991e87dcf81ba58bdf90d33b2e63c1b
https://github.com/llvm/llvm-project/commit/46423d816991e87dcf81ba58bdf90d33b2e63c1b
Author: Kito Cheng <kito.cheng at sifive.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/MC/RISCV/rv32p-valid.s
Log Message:
-----------
[RISCV] Fix P-extension instruction names per spec 0.19 (#179961)
Fix instruction naming to match P-extension specification 0.19:
- pnsari.b -> pnsrari.b (Packed Narrowing Shift Right Arithmetic
Rounding)
- pnsari.h -> pnsrari.h
- nsari -> nsrari
- paax.dhx -> paas.dhx (Packed Average Add/Sub, not Add/Add-Cross)
The instruction encodings remain unchanged as they were already correct.
Ref: https://www.jhauser.us/RISCV/ext-P/RVP-baseInstrs-Sail-019.txt
Commit: 2a0b93546138c7250b9c674647150cbe4298e8e9
https://github.com/llvm/llvm-project/commit/2a0b93546138c7250b9c674647150cbe4298e8e9
Author: Eric Christopher <echristo at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/cmake/modules/TableGen.cmake
Log Message:
-----------
[CMake][TableGen] Fix Ninja depslog error with implicit outputs on Ninja <1.10 (#179842)
Ninja versions prior to 1.10 cannot handle depfile mode when CMake
generates build rules with implicit outputs (the `| ${cmake_ninja_workdir}`
syntax used for IDE support). Ninja's depslog interprets these as
multiple outputs and rejects them with the error:
ninja: error: build.ninja:XXXX: multiple outputs aren't (yet?) supported
by depslog; bring this up on the mailing list if it affects you
This primarily affected builds where CMake generates NATIVE subdirectory
builds for host tools.
This patch modifies TableGen.cmake to:
1. Detect the Ninja version at configure time
2. Disable depfile mode (fall back to globbing .td files) when:
- Ninja version is < 1.10, OR
- The tablegen invocation produces multiple outputs (e.g. -gen-register-info)
The fallback mode maintains correct dependency tracking by explicitly
globbing all .td files in include directories, ensuring tablegen reruns
when dependencies change.
Tested with:
- Ninja 1.8.2 (now works - previously failed with depslog error)
- Ninja 1.13.2
- CMake 4.2.3
- build scenarios with NATIVE tool builds
This commit used a significant amount of tooling to construct.
Commit: e3c72cf008a31a8896f6058f99a208d4c877bd96
https://github.com/llvm/llvm-project/commit/e3c72cf008a31a8896f6058f99a208d4c877bd96
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M lldb/include/lldb/Core/ModuleList.h
M lldb/include/lldb/Host/HostInfoBase.h
M lldb/source/Core/CoreProperties.td
M lldb/source/Core/ModuleList.cpp
M lldb/source/Host/macosx/objcxx/CMakeLists.txt
M lldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinDevice.cpp
M lldb/source/Plugins/SymbolLocator/DebugSymbols/SymbolLocatorDebugSymbols.cpp
M lldb/unittests/ObjectFile/MachO/CMakeLists.txt
M lldb/unittests/ObjectFile/MachO/TestObjectFileMachO.cpp
Log Message:
-----------
[lldb] Add a new way of loading files from a shared cache (#179881)
Taking advantage of a few new SPI in macOS 26.4 libdyld, it is possible
for lldb to load binaries out of a shared cache binary blob, instead of
needing discrete files on disk. lldb has had one special case where it
has done this for years -- if the debugee process and lldb itself are
using the same shared cache, it could create ObjectFiles based on its
own memory contents. This new method requires only the shared cache on
disk, not depending on it being mapped into lldb's address space
already.
In HostInfoMacOSX.mm, we create an array of binaries in lldb's shared
cache, by one of two methods depending on the availability of SPI/SDKs.
This PR adds a new third method for loading lldb's shared cache off disk
as a proof of concept. It will prefer this new method when the needed
SPI are available at runtime. There is also a user setting to disable
this new method in case we uncover a problem as it is deployed.
I did change the internal store of the shared cache files from a single
array, to being organized by shared cache UUIDs, so we can have multiple
shared caches indexed in the future.
In HostInfoBase.h's SharedCacheImageInfo class, you can now create an
ImageInfo with a DataExtractorSP or a void* baton. I added GetUUID and
GetExtractor methods, and the latter will use the libdyld SPI to map the
segments for a specific binary into lldb's memory and return a
DataExtractorSP.
The setting is currently called symbols.shared-cache-binary-loading.
In DynamicLoaderDarwin::FindTargetModuleForImageInfo there was an
ordering mistake where we would always consult the HostInfoMacOSX.mm
shared cache provider, instead of checking lldb's own global module
cache first when looking for a binary, resulting in creating a new
Module repeatedly for shared cache binaries with the new method, parsing
the symbol table repeatedly. I fixed the ordering so we look at existing
Modules before we check the shared cache for one.
In ObjectFileMachOTest, it tests a TEXT and a DATA symbol, checking that
the contents of the function/data object match the bytes we got from the
shared cache. The test was using a DATA_DIRTY symbol, which was fine
when using lldb's own shared cache memory, but when we worked on the
shared cache binary on-disk directly, we were seeing different values
for the bytes because of relocations in there. I changed this to a
constant DATA symbol.
rdar://148939795
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Co-authored-by: Alex Langford <nirvashtzero at gmail.com>
Commit: 0cb14760da3da9abff861f36507450999525e43d
https://github.com/llvm/llvm-project/commit/0cb14760da3da9abff861f36507450999525e43d
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang-tools-extra/clang-apply-replacements/tool/ClangApplyReplacementsMain.cpp
Log Message:
-----------
[clang-apply-replacements] Change cleanup to only happen with --format (#178763)
Cleanup can result in many unrelated changes to the given replacements.
This change makes that only apply if the user actually wants
clang-apply-replacements to format their code outside of the
replacements.
Commit: 15a30e3acf0a7d1d5e47fddb551463a8b6c770dd
https://github.com/llvm/llvm-project/commit/15a30e3acf0a7d1d5e47fddb551463a8b6c770dd
Author: Snehasish Kumar <mail at snehasish.net>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/test/Transforms/InstCombine/cttz.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[InstCombine][profcheck] Fix profile metadata propagation in takeLog2 (#179331)
Pass the select inst to Builder.CreateSelect so that profile metadata is retained.
Assisted-by: gemini
Commit: 61b8a5783972f03d2a5a72713fa0daa0905802ce
https://github.com/llvm/llvm-project/commit/61b8a5783972f03d2a5a72713fa0daa0905802ce
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/Transforms.h
A mlir/include/mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h
M mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h
M mlir/include/mlir/Dialect/XeGPU/uArch/IntelGpuXe2.h
M mlir/include/mlir/Dialect/XeGPU/uArch/uArchBase.h
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/CMakeLists.txt
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
A mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPeepHoleOptimizer.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
Log Message:
-----------
[MLIR][XeGPU] Refactor layout propagation utilities (#179016)
This PR refactors layout propagation into two distinct components:
result/anchor layout setup and source layout inference from the result.
For operations that require a specific result layout due to semantic or
hardware constraints, the propagation logic explicitly sets up the
result or anchor layout. Otherwise, it infers the source layout from the
backward-propagated consumer layout.
The result or anchor layout may differ from the backward-propagated
consumer layout; any such discrepancies are resolved via the existing
layout-conflict mechanism.
**This PR introduces the following utility functions:**
Source layout inference:
> inferBroadcastSourceLayout()
> inferMultiReductionSourceLayout()
> inferBitCastSourceLayout()
> inferShapeCastSourceLayout()
> inferInsertStridedSliceSourceLayout()
Result / anchor layout setup:
> setupMultiReductionResultLayout()
> setupBitCastResultLayout()
> setupInsertStridedSliceResultLayout()
> setupLoadMatrixAnchorLayout()
> setupStoreMatrixAnchorLayout()
> setupLoadGatherAnchorLayout()
> setupStoreScatterAnchorLayout()
Part of subgroup distribution related code changes are separated and
created as PR https://github.com/llvm/llvm-project/pull/179018/changes.
Commit: 5c2b510f882129fcdb3945842e3d050b068f3cda
https://github.com/llvm/llvm-project/commit/5c2b510f882129fcdb3945842e3d050b068f3cda
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M compiler-rt/test/ubsan/TestCases/Misc/Posix/static-link.cpp
Log Message:
-----------
[ubsan][test] Skip Misc/Posix/static-link.cpp on Solaris (#175464)
The `UBSan-Standalone-x86_64 :: TestCases/Misc/Posix/static-link.cpp`
test currently `FAIL`s on Solaris/x86_64 with
```
ld: fatal: option '-z record' is incompatible with building a static executable
```
One cannot create static executables on Solaris since no `libc.a` is
delivered, so this patch skips the test.
Tested on `x86_64-pc-solaris2.11`.
Commit: f9979199113608e3afe40d49b776a727b2b7923a
https://github.com/llvm/llvm-project/commit/f9979199113608e3afe40d49b776a727b2b7923a
Author: Thurston Dang <thurston at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vcmp.ll
Log Message:
-----------
[msan][NFCI] Add NEON vector compare tests (#177261)
Forked from llvm/test/CodeGen/AArch64/arm64-vcmp.ll
Commit: c41f9568840b654b8496aa44d16395ca57172cb3
https://github.com/llvm/llvm-project/commit/c41f9568840b654b8496aa44d16395ca57172cb3
Author: Thurston Dang <thurston at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[msan][NFCI] Generalize handleAVX512VectorGenericMaskedFP (#179850)
handleAVX512VectorGenericMaskedFP() assumes there is one vector of data
(excluding the mask). This patch generalizes it to allow multiple
vectors of data, which we assume will be munged together.
Future work can apply this to intrinsics such as:
```
<16 x float> @llvm.x86.avx512.mask.scalef.ps.512
(<16 x float>, <16 x float>, <16 x float>, i16, i32)
WriteThru A B Mask Rounding
```
Commit: 7449d32d7e8cf7fea9d3d6561435c627a5f2240f
https://github.com/llvm/llvm-project/commit/7449d32d7e8cf7fea9d3d6561435c627a5f2240f
Author: Snehasish Kumar <mail at snehasish.net>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/add-shl-mul-umax.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[InstCombine][profcheck] Fix profile metadata propagation for umax in InstCombine (#179332)
Select instructions created from the expansion of an umax intrinsic do
not have profile data even though the function may have profile data.
This is because PGO instrumentation does not support intrinsics.
Assisted-by: gemini
Commit: 2d8ce3a31360ddf69937ad123d1c29673ed30daf
https://github.com/llvm/llvm-project/commit/2d8ce3a31360ddf69937ad123d1c29673ed30daf
Author: Fangrui Song <i at maskray.me>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
A lld/test/ELF/eh-frame-invalid-cie.s
A lld/test/ELF/eh-frame-invalid-fde-encoding.s
R lld/test/ELF/invalid-eh-frame.s
R lld/test/ELF/invalid-eh-frame2.s
R lld/test/ELF/invalid-eh-frame3.s
R lld/test/ELF/invalid-eh-frame4.s
R lld/test/ELF/invalid-eh-frame5.s
R lld/test/ELF/invalid-eh-frame6.s
R lld/test/ELF/invalid-eh-frame7.s
R lld/test/ELF/invalid-eh-frame8.s
R lld/test/ELF/invalid-eh-frame9.s
Log Message:
-----------
[ELF][test] Consolidate invalid-eh-frame tests
Merge 9 individual invalid-eh-frame test files into 2 categorized files
using split-file:
- eh-frame-invalid-cie.s: CIE structure errors (too small, unexpected
end, failed string/LEB128 reads)
- eh-frame-invalid-fde-encoding.s: EhReader::getFdeEncoding errors
(unknown augmentation string, unknown FDE encoding, unsupported
aligned encoding, corrupted CIE)
Commit: 3392ec8cf17ce90fe0859ae31e86cf48f8fa185d
https://github.com/llvm/llvm-project/commit/3392ec8cf17ce90fe0859ae31e86cf48f8fa185d
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/fma-relu-contract.ll
Log Message:
-----------
[NVPTX] Remove `NoSignedZerosFPMath` uses (#180086)
Users should use `nsz` flag instead.
Commit: 3fd046440c521d06fac9182a05eda5a58a03215f
https://github.com/llvm/llvm-project/commit/3fd046440c521d06fac9182a05eda5a58a03215f
Author: Thurston Dang <thurston at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/AArch64/aarch64-bf16-dotprod-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/aarch64-matmul.ll
Log Message:
-----------
[msan] Handle NEON bfmmla (#176264)
This patch adapts handleNEONMatrixMultiply() (used for integer matrix
multiply: smmla/ummla/usmmla) to floating-point (bfmmla).
Commit: 22c5c2583dc9fcd9df7c648c810b4a3233cfc42e
https://github.com/llvm/llvm-project/commit/22c5c2583dc9fcd9df7c648c810b4a3233cfc42e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Reorder the operands for RISCVISD::PPAIRE_DB. NFC (#180111)
Order the operands so the the low and high part of the rs1 regpair are
first, followed by the low and high part of the rs2 regpair.
Also change the type to use v4i8 for the result so that it's only
shuffling elements not combining elements into a larger elment.
I'm planning to add ADDD and SUBD opcodes that will be defined with the
same operand order allowing RISCVISelDAGToDAG.cpp code to be shared.
Commit: d289020a10fe53421214ef9271276615aaea8923
https://github.com/llvm/llvm-project/commit/d289020a10fe53421214ef9271276615aaea8923
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] Correct `uitofp` example (#180123)
The to type is incorrect, use `float` instead.
Commit: 295b0ef7b9aa345867e458912c8ade3f55a41f99
https://github.com/llvm/llvm-project/commit/295b0ef7b9aa345867e458912c8ade3f55a41f99
Author: Michael Park <mcypark at gmail.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/PCH/reloc.c
Log Message:
-----------
[C++20][Modules] Fix relocatable PCH feature. (#180023)
Commit: 43358cb3d67cbb94566f094ca9c8ec1c4d76975a
https://github.com/llvm/llvm-project/commit/43358cb3d67cbb94566f094ca9c8ec1c4d76975a
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/records.cpp
Log Message:
-----------
[clang][bytecode] Check pointer lifetime in CheckDestructor (#179957)
So we diagnose double-destroy scenarios.
Commit: d99f1cdd66582d09c82a998f20534cf87c01b7ff
https://github.com/llvm/llvm-project/commit/d99f1cdd66582d09c82a998f20534cf87c01b7ff
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
Log Message:
-----------
[RISCV][llvm] Support INSERT_VECTOR_ELT codegen for P extension (#179471)
Add custom lowering for INSERT_VECTOR_ELT on P extension vector types
using the MVM instruction.
TODO: Handle <4 x i8> on RV64 which is constructed to extract_vector_elt
+ build_vector instead of insert_vector_elt.
Commit: cc4b98e505f92fe50823b8202b3c14af5456699d
https://github.com/llvm/llvm-project/commit/cc4b98e505f92fe50823b8202b3c14af5456699d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/bitcast-vector-bool.ll
Log Message:
-----------
[X86] combineSetCC - attempt to match more complex icmp_eq/ne patterns before falling back to PTEST/PMOVMSKB patterns (#180034)
combineVectorSizedSetCCEquality attempts to convert equality comparisons
of larger-than-legal scalar integers to PTEST/PMOVMSKB vector
comparisons.
However, combineSetCC has a number of other folds with more complex
icmp_eq/ne patterns that work with big integers (including bit test and
reduction patterns) that don't get a change to match as
combineVectorSizedSetCCEquality is run first, and the other folds are
then more difficult to match from PTEST/PMOVMSKB nodes.
This patch moves the combineVectorSizedSetCCEquality fold later to give
other icmp_eq/ne folds a chance to run first.
Commit: 72119384923c23b99193f2988b843619e2b1cfcc
https://github.com/llvm/llvm-project/commit/72119384923c23b99193f2988b843619e2b1cfcc
Author: Thurston Dang <thurston at google.com>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[msan][NFCI] Refactor icmp eq/ne into propagateEqualityComparison() (#180115)
This will be useful for handling switch
(https://github.com/llvm/llvm-project/pull/179851).
Commit: 4092a6398c1a8d7665c65fe8a224dab2af3bb40d
https://github.com/llvm/llvm-project/commit/4092a6398c1a8d7665c65fe8a224dab2af3bb40d
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86.h
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86IndirectBranchTracking.cpp
M llvm/lib/Target/X86/X86PassRegistry.def
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
Log Message:
-----------
[NewPM] Port x86-indirect-branch-tracking (#179874)
Similar to other portings created by @aidenboom154. No specific test
coverage as there are no MIR->MIR tests that exercise this pass.
Commit: 0d52536b048b1b5af0734d6de3f44ff5feb770b5
https://github.com/llvm/llvm-project/commit/0d52536b048b1b5af0734d6de3f44ff5feb770b5
Author: Fangrui Song <i at maskray.me>
Date: 2026-02-05 (Thu, 05 Feb 2026)
Changed paths:
A lld/test/ELF/eh-frame-fde-encoding.s
M lld/test/ELF/eh-frame-invalid-fde-encoding.s
R lld/test/ELF/eh-frame-value-format1.s
R lld/test/ELF/eh-frame-value-format2.s
R lld/test/ELF/eh-frame-value-format3.s
R lld/test/ELF/eh-frame-value-format4.s
R lld/test/ELF/eh-frame-value-format5.s
R lld/test/ELF/eh-frame-value-format6.s
R lld/test/ELF/eh-frame-value-format7.s
R lld/test/ELF/eh-frame-value-format8.s
R lld/test/ELF/eh-frame-value-format9.s
Log Message:
-----------
[ELF][test] Consolidate .eh_frame FDE encoding tests
Merge eh-frame-value-format{1..9}.s into eh-frame-fde-encoding.s
(encoding is the DWARF term) using split-file. Add .eh_frame and
.eh_frame_hdr content verification for absptr, udata2, sdata4, udata4.
Move error test (9) to eh-frame-invalid-fde-encoding.s.
Commit: a8829d5a104cd9b180b101f27a387fa73ba76a10
https://github.com/llvm/llvm-project/commit/a8829d5a104cd9b180b101f27a387fa73ba76a10
Author: NeKon69 <nobodqwe at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang-tools-extra/clangd/Protocol.cpp
M clang-tools-extra/clangd/test/call-hierarchy.test
Log Message:
-----------
[clangd] Fix call hierarchy crash on malformed request (#179718)
The code for parsing a call hierarchy request was not using `ObjectMapper`
correctly: it was calling `map()` without first calling `operator bool()` to
check that an object was parsed at all.
Fixes #179109
Commit: d50cf09520fad320ef1fef0c1210163d770142dc
https://github.com/llvm/llvm-project/commit/d50cf09520fad320ef1fef0c1210163d770142dc
Author: JaydeepChauhan14 <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/test/CodeGen/X86/combine-adc.ll
Log Message:
-----------
Precommit test for combine ADC(ADD(X,Y),0,Carry) -> ADC(X,Y,Carry) (#177539)
**Reference PR-** https://github.com/llvm/llvm-project/pull/176713
Commit: a6f026414d4dc44c0741bcc0fc4dd3fd3558ead8
https://github.com/llvm/llvm-project/commit/a6f026414d4dc44c0741bcc0fc4dd3fd3558ead8
Author: Nishant Sachdeva <32475507+nishant-sachdeva at users.noreply.github.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-bindings.py
M llvm/tools/llvm-ir2vec/Bindings/PyIR2Vec.cpp
Log Message:
-----------
[llvm-ir2vec] Adding FuncEmb API to ir2vec python bindings (#179908)
Adding FuncEmb API to ir2vec python bindings. Provide the IR name of a
function, and the API returns the func Embedding for it.
Commit: 7bef2cdec6038c6483f0b3dc2e8332191804f9b4
https://github.com/llvm/llvm-project/commit/7bef2cdec6038c6483f0b3dc2e8332191804f9b4
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/docs/CodingStandards.rst
Log Message:
-----------
[llvm] Update policy for Doxygen comments in the Coding Standards (#179898)
This PR updates the policy regarding Doxygen comments in the Coding
Standards based on an RFC discussion on Discourse:
https://discourse.llvm.org/t/rfc-policy-for-doxygen-comments-in-lldb/89675/
Commit: edebc7544ee17e0f6ee56077307029fd92d460f2
https://github.com/llvm/llvm-project/commit/edebc7544ee17e0f6ee56077307029fd92d460f2
Author: Tomás Longeri <tlongeri at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
Log Message:
-----------
Fix Bazel build for ba58225 (#180136)
Commit: 555390c178fff5194aff7b5f13145f3b7fab1477
https://github.com/llvm/llvm-project/commit/555390c178fff5194aff7b5f13145f3b7fab1477
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
Log Message:
-----------
[NFC][LowerMemIntrinsics] Use TypeSize consistently for type sizes (#179945)
PR #169040 already started using `TypeSize` for the return value of
`DataLayout::getType*Size` in the memset lowering, this PR adjusts other uses
in LowerMemIntrinsics to do the same. Currently, scalable vector types are not
supported as access types for the mem-intrinsic lowering.
Commit: 5654ecd5ddeb2f40e124a6bf10cc78230da4ef49
https://github.com/llvm/llvm-project/commit/5654ecd5ddeb2f40e124a6bf10cc78230da4ef49
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
A llvm/test/CodeGen/X86/div_i129_v_pow2k.ll
Log Message:
-----------
[DAGCombiner] Fix exact power-of-two signed division for large integers (#177340)
Previously, the DAG combiner did not optimize exact signed division by a
power-of-two constant divisor for integer types exceeding the size of
division supported by the target architecture (e.g., i128 on x86-64).
However, such an optimization was expected by the division expansion
logic, leading to unsupported division operations making it to
instruction selection.
This commit addresses this issue by making an exception to the existing
exclusion of signed division with the exact flag for the aforementioned
operations. That is, the DAG combiner will now optimize exact signed
division if the divisor is a power-of-two constant and the integer type
exceeds the size of division supported by the target architecture.
---------
Signed-off-by: Steffen Holst Larsen <HolstLarsen.Steffen at amd.com>
Commit: 6f5b84232c4ce5d724029cde25662e4968e4ec26
https://github.com/llvm/llvm-project/commit/6f5b84232c4ce5d724029cde25662e4968e4ec26
Author: Anshul Nigham <nigham at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
Fix Bazel build for d005cb2 (#180134)
Co-authored-by: Pranav Kant <prka at google.com>
Commit: 743116acd99cb4b9e1df9072808f219d85e9ce2e
https://github.com/llvm/llvm-project/commit/743116acd99cb4b9e1df9072808f219d85e9ce2e
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Add missing dependency for 61b8a5783972f03d2a5a72713fa0daa095802ce (#180145)
Commit: 15737387c7afdf774bb2aba1b563b9c1de885bb9
https://github.com/llvm/llvm-project/commit/15737387c7afdf774bb2aba1b563b9c1de885bb9
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
Log Message:
-----------
[bazel] Run builidifer. NFC.
Commit: 95f5269a095d010e8f1f7cf84f85d398b69f8a12
https://github.com/llvm/llvm-project/commit/95f5269a095d010e8f1f7cf84f85d398b69f8a12
Author: Matt <MattPD at users.noreply.github.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/lib/Lower/ConvertType.cpp
M flang/lib/Optimizer/Builder/CMakeLists.txt
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/test/Lower/HLFIR/cray-pointers.f90
M flang/test/Lower/HLFIR/proc-pointer-comp-pass.f90
M flang/test/Lower/default-initialization.f90
A flang/test/Lower/derived-type-sequence-alias-assign.f90
M flang/test/Lower/polymorphic.f90
M flang/unittests/Optimizer/CMakeLists.txt
Log Message:
-----------
[flang] Use alias analysis in lowering record assignments (#180010)
Without alias analysis Flang assumes no aliasing in lowering record
assignments which can result in miscompilation of programs using
SEQUENCE types and EQUIVALENCE.
Use alias analysis to guard the fast path in `genRecordAssignment`;
otherwise fall back to element-wise expansion.
Update FIR FileCheck expectations
Add `FIRAnalysis` to `"flang/unittests/Optimizer/CMakeLists.txt"` to fix
the Windows x64 build failure (linker error).
Add `SEQUENCE` handling and update tests accordingly.
Fixes #175246 (and includes the fix to
flang/lib/Optimizer/Builder/CMakeLists.txt in PR #176483).
Co-authored-by: Matt P. Dziubinski <matt-p.dziubinski at hpe.com>
Commit: b02a6363e8950904b81ba1eff1f4d5d0dd296c69
https://github.com/llvm/llvm-project/commit/b02a6363e8950904b81ba1eff1f4d5d0dd296c69
Author: David Spickett <david.spickett at arm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/tools/driver/Options.td
Log Message:
-----------
[lldb] Remove --debug/-d option from lldb (#179978)
The functionality was removed in
d3173f4ab61c17337908eb7df3f1c515ddcd428c after being broken for a long
time.
There's a small risk someone is still passing the option, but I think
it's time to remove it and they can fix their scripts.
Commit: 7037e6e0a4966b65598680b9b7b51714591b5936
https://github.com/llvm/llvm-project/commit/7037e6e0a4966b65598680b9b7b51714591b5936
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/lib/Lower/ConvertType.cpp
M flang/lib/Optimizer/Builder/CMakeLists.txt
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/test/Lower/HLFIR/cray-pointers.f90
M flang/test/Lower/HLFIR/proc-pointer-comp-pass.f90
M flang/test/Lower/default-initialization.f90
R flang/test/Lower/derived-type-sequence-alias-assign.f90
M flang/test/Lower/polymorphic.f90
M flang/unittests/Optimizer/CMakeLists.txt
Log Message:
-----------
Revert "[flang] Use alias analysis in lowering record assignments" (#180150)
Reverts llvm/llvm-project#180010
Still breaking builds
Commit: 4af27b06f517cec52b14e72a30a8a9185b662086
https://github.com/llvm/llvm-project/commit/4af27b06f517cec52b14e72a30a8a9185b662086
Author: Kiran <kiran.sturt at arm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CGExprScalar.cpp
A clang/test/CodeGen/compound-assign-atomic-bool.c
Log Message:
-----------
[Clang] Fix atomic boolean compound assignment (#178220)
Fixes #33210
Commit: 9d11a6670e59d1daf219f2c2717e4fc3a6c19c5f
https://github.com/llvm/llvm-project/commit/9d11a6670e59d1daf219f2c2717e4fc3a6c19c5f
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/test/CodeGen/AMDGPU/freeze.ll
Log Message:
-----------
AMDGPU/GlobalISel: Regbanklegalize rules for G_FREEZE (#179796)
Move G_FREEZE handling to AMDGPURegBankLegalizeRules.cpp.
Added support for uniform S1.
Commit: 8cc06421a547bd757e7467ab79ddf14befdd5d0d
https://github.com/llvm/llvm-project/commit/8cc06421a547bd757e7467ab79ddf14befdd5d0d
Author: Abhinav Garg <39309352+abhigargrepo at users.noreply.github.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f64.ll
Log Message:
-----------
Adding support for G_STRICT_FMA in new reg bank select (#170330)
This patch adds legalization rules for G_STRICT_FMA opcode.
---------
Co-authored-by: Abhinav Garg <abhigarg at amd.com>
Commit: d64a609b2bbb46d8f2ffdb2252c5880bed74941c
https://github.com/llvm/llvm-project/commit/d64a609b2bbb46d8f2ffdb2252c5880bed74941c
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/X86/X86.h
Log Message:
-----------
[NewPM] Uninitialize x86-cleanup-local-dynamic-tls in llvm/lib/Target/X86/X86.h (#180122)
I believe I exposed in
https://github.com/llvm/llvm-project/pull/179864/changes#diff-5b9707ff829bc5b6523a59982f375d99d6b4ded670fbd91dd095555f4ac80a14R428
. Getting rid of it to avoid possible undefined reference/linker errors.
Commit: b738491d2ff950391486140dd39747dd30e5c0c1
https://github.com/llvm/llvm-project/commit/b738491d2ff950391486140dd39747dd30e5c0c1
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
A llvm/test/CodeGen/AMDGPU/memory-legalizer-non-volatile.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.mir
Log Message:
-----------
[AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (#179413)
- Add `MONonVolatile` MachineMemOperand flag.
- Set nv=1 on memory operations on GFX12.5 if the operation accesses a
constant address space,
is an invariant load, or has the `MONonVolatile` flag set.
Commit: 33a2c3ee9ce5db57b9becc244bed834cd72a6cc2
https://github.com/llvm/llvm-project/commit/33a2c3ee9ce5db57b9becc244bed834cd72a6cc2
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
Log Message:
-----------
[VPlan] Ignore poison incoming values when creating blend (#180005)
We have an optimization in VPPredicator when creating blends where if
all the incoming values are the same, we just return that value.
This extends it to handle cases like "phi [%x, %x, poison, %x]" by
ignoring poison values.
This is split off from #176143 to prevent regressions when maintaining
SSA by adding PHIs with a poison incoming value.
Commit: 3f4d94fd4cc1c6c07720eb784ca269a69e19a96f
https://github.com/llvm/llvm-project/commit/3f4d94fd4cc1c6c07720eb784ca269a69e19a96f
Author: Julian Pokrovsky <raventid at users.noreply.github.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/AArch64/select-shuffle.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-binops.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-cmps.ll
Log Message:
-----------
[VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (#179429)
Resolves #173035
Commit: 6824db46c635cca8a2d7013e0e22fece470967e7
https://github.com/llvm/llvm-project/commit/6824db46c635cca8a2d7013e0e22fece470967e7
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/agpr-spill-copy.mir
M llvm/test/CodeGen/AMDGPU/av-spill-expansion-with-machine-cp.mir
M llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
M llvm/test/CodeGen/AMDGPU/bug-undef-spilled-agpr.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
M llvm/test/CodeGen/AMDGPU/frame-index.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir
M llvm/test/CodeGen/AMDGPU/kernel-mubuf-with-voffset.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain-preserve.mir
M llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain.mir
M llvm/test/CodeGen/AMDGPU/pei-build-av-spill.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill-offset-overflow-gfx950.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill.mir
M llvm/test/CodeGen/AMDGPU/pei-reg-scavenger-position.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/pei-vgpr-block-spill-csr.mir
M llvm/test/CodeGen/AMDGPU/regalloc-introduces-copy-sgpr-to-agpr.mir
M llvm/test/CodeGen/AMDGPU/same-slot-agpr-sgpr.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-vmem-large-frame.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/spill-agpr-partially-undef.mir
M llvm/test/CodeGen/AMDGPU/spill-agpr.mir
M llvm/test/CodeGen/AMDGPU/spill-reg-tuple-super-reg-use.mir
M llvm/test/CodeGen/AMDGPU/spill-restore-partial-copy.mir
M llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir
M llvm/test/CodeGen/AMDGPU/spill-to-agpr-partial.mir
M llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir
M llvm/test/CodeGen/AMDGPU/spillv16.ll
M llvm/test/CodeGen/AMDGPU/spillv16.mir
M llvm/test/CodeGen/AMDGPU/tied-op-for-wwm-scratch-reg-spill-restore.mir
M llvm/test/CodeGen/AMDGPU/vector-spill-restore-to-other-vector-type.mir
M llvm/test/CodeGen/AMDGPU/vgpr-spill-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/vgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/wait-xcnt-atomic-rmw-optimization.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-functions-pei.mir
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
Log Message:
-----------
[AMDGPU] Set MOThreadPrivate on memory accesses for spills (#179414)
Mark the memory operand of spill load/stores as MOThreadPrivate, so that
these loads and stores are emitted with `nv` set.
The reason is that scratch memory used by spills will never be shared by
another thread. It's purely thread local and thus a good fit for the
`nv` bit, which is controlled by the MOThreadPrivate flag.
Commit: dfcb0bed1d4e1aa51bb4bdec6466ef10595af0db
https://github.com/llvm/llvm-project/commit/dfcb0bed1d4e1aa51bb4bdec6466ef10595af0db
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
Log Message:
-----------
[AArch64] NFC: Replace CTTZ_ELTS predicate pattern with predicate. (#179909)
This also swaps the general predicate and source operand, to match other
nodes.
Follow-up from
https://github.com/llvm/llvm-project/pull/178674#discussion_r2767753614
Commit: d4638ad3e9be6dfcdd21b495aedb4285c85b90ca
https://github.com/llvm/llvm-project/commit/d4638ad3e9be6dfcdd21b495aedb4285c85b90ca
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InstCombine/double-float-shrink-1.ll
M llvm/test/Transforms/InstCombine/sqrt.ll
Log Message:
-----------
InstCombine: Only propagate callsite attributes in sqrt->sqrtf (#180160)
This was propagating the callee's attributes instead of just the
callsite. It's illegal to set denormal_fpenv on a callsite. This
was also losing callsite attributes which may have been more useful;
there's no point in setting the callee's attributes on the callsite.
Commit: 4f90eb64277c6e618c287e2bf5113003202e119b
https://github.com/llvm/llvm-project/commit/4f90eb64277c6e618c287e2bf5113003202e119b
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll
M llvm/test/Transforms/LoopVectorize/conditional-scalar-assignment-vplan.ll
M llvm/unittests/Analysis/IVDescriptorsTest.cpp
Log Message:
-----------
[LV] Support conditional scalar assignments of masked operations (#178862)
This patch extends the support added in #158088 to loops where the
assignment is non-speculatable (e.g. a conditional load or divide).
For example, the following loop can now be vectorized:
```
int simple_csa_int_load(
int* a, int* b, int default_val, int N, int threshold)
{
int result = default_val;
for (int i = 0; i < N; ++i)
if (a[i] > threshold)
result = b[i];
return result;
}
```
It does this by extending the recurrence matching from only looking for
selects, to include phis where all operands are the header phi, except
for one which can be an arbitrary value outside the recurrence.
Commit: 0287d789e0e3e3d0828b0b7d81b423d9c0447a0b
https://github.com/llvm/llvm-project/commit/0287d789e0e3e3d0828b0b7d81b423d9c0447a0b
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/ExpandIRInsts.cpp
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/X86/expand-large-fp-optnone.ll
M llvm/test/Transforms/ExpandIRInsts/X86/expand-int-convert-small.ll
M llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-si129tofp.ll
M llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-ui129tofp.ll
M llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-optnone.ll
Log Message:
-----------
[ExpandIRInsts] Freeze input in itofp expansion (#180157)
We are introducing branches on the value, and branch on undef/poison is
UB, so the value needs to be frozen.
Commit: 85db121bcf47e6271e973865234ee97bfa966200
https://github.com/llvm/llvm-project/commit/85db121bcf47e6271e973865234ee97bfa966200
Author: Marcell Leleszi <mleleszi at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M libc/src/__support/CMakeLists.txt
M libc/src/__support/wctype_utils.h
M libc/test/src/__support/CMakeLists.txt
A libc/test/src/__support/wctype_utils_test.cpp
Log Message:
-----------
[libc][wctype] Implement internal UTF8 wctype classification functions (#174607)
Closes [#174604](https://github.com/llvm/llvm-project/issues/174604)
This patch implements the internal wide character classification
functions with Unicode support.
The ASCII paths which were not implemented are taken from
[ctype_utils.h](https://github.com/llvm/llvm-project/blob/main/libc/src/__support/ctype_utils.h)
The tests mainly cover the dispatch logic between ASCII and UTF8, the
UTF8 variants are already comprehensively tested in
[wctype_classification_utils_test.cpp](https://github.com/mleleszi/llvm-project/blob/main/libc/test/src/__support/wctype/wctype_classification_utils_test.cpp).
Commit: bde4754bc48029398b5ba22b4478a6b0202ab827
https://github.com/llvm/llvm-project/commit/bde4754bc48029398b5ba22b4478a6b0202ab827
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/tools/lldb-dap/Handler/DisassembleRequestHandler.cpp
Log Message:
-----------
[lldb-dap] Remove end line and column from disassemble response (#180037)
The end line entry calculated from the instruction's end address is
unreliable and could produce incorrect source ranges. especially if the
instruction spans multiple lines.
We can end in situations where the current end line is the next start
line and the source line is show to the client twice. confusing users
what maps to what.
| With EndLine |
| :------------: |
| <img width="892" height="486" alt="Screenshot 2026-02-05 at 21 37 08"
src="https://github.com/user-attachments/assets/f2fef592-5754-4168-bf93-2baba4742c5d"
/> |
| Without Endline |
| :---------------: |
| <img width="892" height="486" alt="Screenshot 2026-02-05 at 21 59 29"
src="https://github.com/user-attachments/assets/538dd462-9c7f-4483-804c-65fd83b5f2f2"
/>|
Or the endline is smaller than the startline.
```json
{
"address": "0x5555555557B4",
"column": 3,
"endLine": 2,
"instruction": "add rsp, 0x20 ",
"instructionBytes": "48 83 c4 20",
"line": 17,
"location": {
"name": "test.cpp",
"path": "/buildbot/test_process/test.cpp"
}
},
```
Commit: 689c99557f3dd22b3910899e0b9ed6a340269384
https://github.com/llvm/llvm-project/commit/689c99557f3dd22b3910899e0b9ed6a340269384
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/load-shufflevector.ll
Log Message:
-----------
[VectorCombine] Skip dead shufflevector in GetIndexRangeInShuffles to fix crash. (#179217)
Update GetIndexRangeInShuffles to skip unused shuffles. This matches the
behavior in the loop below and without it, we end up with an index
mis-match, causing a crash for the added test case.
PR: https://github.com/llvm/llvm-project/pull/179217
Commit: 197bfa9a74d229bb5c5574ea50d8cc30382c4a2d
https://github.com/llvm/llvm-project/commit/197bfa9a74d229bb5c5574ea50d8cc30382c4a2d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
A llvm/test/CodeGen/X86/select-big-integer.ll
Log Message:
-----------
[X86] Add tests showing potential for vectorising i128/256/512 select nodes (#180173)
Commit: f6a9cbb6e573b08e85b2f698eea88c58bdab1b43
https://github.com/llvm/llvm-project/commit/f6a9cbb6e573b08e85b2f698eea88c58bdab1b43
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/Analysis/CostModel/AArch64/bswap.ll
Log Message:
-----------
[AArch64][SDAG] Legalise BSWAP for Neon types. (#179702)
GlobalISel legalised BSWAP for Neon types in #80036.
Legalising the types keeps them from being expanded to vector_shuffle
before being matched to REVs, and allows half-rotations on i16 vectors
to be combined to bswap (see
https://github.com/llvm/llvm-project/pull/178706#discussion_r2742804463).
Commit: c09bb7bd4065c7f454a5f9df60a064f670a54871
https://github.com/llvm/llvm-project/commit/c09bb7bd4065c7f454a5f9df60a064f670a54871
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CoreEngine.h
M clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
Log Message:
-----------
[NFC][analyzer] Remove IndirectGotoNodeBuilder::iterator (#180167)
My recent commit b96ef9c97bee44017bd832efab899ba1ed1f9b8f removed a
needlessly overcomplicated iterator class from SwitchNodeBuilder; this
commit repeats the same cleanup for IndirectGotoNodeBuilder.
(This is just for the sake of consistency -- I don't have plans to work
on indirect goto handling.)
Commit: fdce0ea70848ee71a25304b203b5209ba3d11b7b
https://github.com/llvm/llvm-project/commit/fdce0ea70848ee71a25304b203b5209ba3d11b7b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
Log Message:
-----------
[VPlan] Add ExitingIVValue VPInstruction. (#175651)
Add a new VPInstruction opcode to compute the exiting value of an
induction variable after vectorization. This replaces the pattern of
extracting the last lane from the last part of the induction backedge
value when applicable.
This allows us to always use the pre-computed IV end value. It will also
allow unifying end value creation for both induction resume and exit
values.
PR: https://github.com/llvm/llvm-project/pull/175651
Commit: 56c875a84231fdf84e9e72aa8bb5766cfe0a734c
https://github.com/llvm/llvm-project/commit/56c875a84231fdf84e9e72aa8bb5766cfe0a734c
Author: Kiran <kiran.sturt at arm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CGExprScalar.cpp
R clang/test/CodeGen/compound-assign-atomic-bool.c
Log Message:
-----------
Revert "[Clang] Fix atomic boolean compound assignment (#33210)" (#180183)
Reverts llvm/llvm-project#178220
Commit: 2ba1eba4be3f5225a5dde6223c434a8bd24bb9b6
https://github.com/llvm/llvm-project/commit/2ba1eba4be3f5225a5dde6223c434a8bd24bb9b6
Author: Marcell Leleszi <mleleszi at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M libc/src/__support/CMakeLists.txt
M libc/src/__support/wctype_utils.h
M libc/test/src/__support/CMakeLists.txt
R libc/test/src/__support/wctype_utils_test.cpp
Log Message:
-----------
Revert "[libc][wctype] Implement internal UTF8 wctype classification functions" (#180186)
Reverts llvm/llvm-project#174607
Breaks libc++
Commit: 4096cb60175a3bfdde25dd0cca167416f4f4338e
https://github.com/llvm/llvm-project/commit/4096cb60175a3bfdde25dd0cca167416f4f4338e
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M offload/plugins-nextgen/common/CMakeLists.txt
Log Message:
-----------
[OFFLOAD] Fix TARGET_NAME in plugins common code (#180151)
Unlike other names is set between quotes which prevents our debug macros
to properly match it.
Commit: f735aa061b4c2df5462285583eb8aaa134476b53
https://github.com/llvm/llvm-project/commit/f735aa061b4c2df5462285583eb8aaa134476b53
Author: Christopher Di Bella <cjdb at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M libcxx/include/__vector/vector.h
Log Message:
-----------
[libc++] Tighten `__add_alignment_assumption` return type (#180090)
`__add_alignment_assumption` unilaterally returned a `pointer`, even
when passed a `const_pointer`. This was surfaced by some (but not all)
CI jobs when rebasing `std::vector` to have a layout type.
Commit: 2cbdb5bf3e1b0f5c9d135a8b53815c34ba0ce3ce
https://github.com/llvm/llvm-project/commit/2cbdb5bf3e1b0f5c9d135a8b53815c34ba0ce3ce
Author: Nicole Aschenbrenner <nicole.aschenbrenner at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/Driver/openmp-target-fast-flag.c
Log Message:
-----------
[clang][OpenMP] Add OpenMP GPU optimization flag framework (#178914)
This patch series adds a framework of OpenMP GPU optimization flags to
enable more efficient code generation for GPU offloading. The series
consists of three patches:
1. Add negative flag variants (-fno-*) for existing assume options to
allow explicit disabling of optimizations.
2. Add -fopenmp-target-ignore-env-vars flag to indicate that OpenMP
runtime can ignore environment variables during code generation,
enabling optimizations like skipping runtime checks and eliminating
conditional branches.
3. Add -fopenmp-target-fast meta-flag that implies the above
optimization flags. This convenience flag is automatically enabled by
-Ofast and provides a simple interface for aggressive GPU optimizations.
The flags benefit all GPU targets (NVPTX, AMDGPU, Intel GPU) by
providing a standard way to enable common GPU optimization patterns.
Individual flags can be selectively overridden while keeping others
enabled.
Commit: 20b5849e176d73ffe6959e01d196ebbb0f49e5cf
https://github.com/llvm/llvm-project/commit/20b5849e176d73ffe6959e01d196ebbb0f49e5cf
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/include/clang/Basic/OffloadArch.h
M clang/lib/Basic/OffloadArch.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Driver/amdgpu-mcpu.cl
M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
M flang-rt/CMakeLists.txt
M libclc/CMakeLists.txt
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/TargetParser/TargetParser.h
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
M llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
M llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[AMDGPU] Define new target gfx1170 (#180185)
Commit: 2791f42a0410d6997335700b3207071a951b5b86
https://github.com/llvm/llvm-project/commit/2791f42a0410d6997335700b3207071a951b5b86
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/source/Plugins/Platform/FreeBSD/PlatformFreeBSD.cpp
M lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
M lldb/source/Plugins/Process/Utility/CMakeLists.txt
R lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.cpp
R lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h
R lldb/source/Plugins/Process/Utility/lldb-mips-freebsd-register-enums.h
M lldb/source/Plugins/Process/elf-core/CMakeLists.txt
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
R lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_mips64.cpp
R lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_mips64.h
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
Log Message:
-----------
[lldb][Process] Remove mips64 POSIX support (#179987)
Since ce03a862372a6f36d2fcf80dc80052aa155fcae8 and
427bb1cc1b09ea68b8a13a667810681ba4074f6b, mips64 support for POSIX is
orphaned. Remove any POSIX_mips64 code and other code we missed in those
commits.
---------
Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
Commit: 901d175d18f520f35bd0f7f48ac0fb3bd1541157
https://github.com/llvm/llvm-project/commit/901d175d18f520f35bd0f7f48ac0fb3bd1541157
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/cse-casts.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags-interleave.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_and.ll
Log Message:
-----------
[VPlan] Simplify x & AllOnes -> x (#180049)
Commit: 22a16623e14a900fffefd91fd7b07118a8040470
https://github.com/llvm/llvm-project/commit/22a16623e14a900fffefd91fd7b07118a8040470
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Fix comments in simplifyRecipe around BinaryOr (NFC) (#180050)
Commit: bc706338c11af35d17af996409fd804f92a51207
https://github.com/llvm/llvm-project/commit/bc706338c11af35d17af996409fd804f92a51207
Author: Minsoo Choo <minsoochoo0122 at proton.me>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD/NativeRegisterContextFreeBSD_arm64.cpp
M lldb/source/Plugins/Process/FreeBSD/NativeRegisterContextFreeBSD_arm64.h
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb] [Process/FreeBSD] Assume minimum is FreeBSD 14 (#179587)
Currently versions under 13 are EOLed (see [FreeBSD Release
Information](https://www.freebsd.org/releases/)).
FreeBSD 13 will be EOLed by April 30th (see [Supported FreeBSD
releases](https://www.freebsd.org/security/#sup)) while LLVM 23 is
expected to be released in August 25th according to the LLVM calendar.
Thus assumed that minimum supported FreeBSD version is 14.
Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
Commit: 3473cf589e701bb484f292d87188995addd769b0
https://github.com/llvm/llvm-project/commit/3473cf589e701bb484f292d87188995addd769b0
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Process/Utility/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Plugins/Process/elf-core/BUILD.gn
Log Message:
-----------
[gn build] Port 2791f42a0410
Commit: ba51c8859ca81fe0164b7c561887f2e88f6261de
https://github.com/llvm/llvm-project/commit/ba51c8859ca81fe0164b7c561887f2e88f6261de
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/utils/TableGen/CIRLoweringEmitter.cpp
Log Message:
-----------
[CIR][NFC] Remove LowerModule from LowerToLLVM (#179971)
This patch removes `cir::LowerModule` from the `LowerToLLVM` pass.
Commit: 8c5bdf97029e09bbc98e5cd8bba150e3c5f80ba0
https://github.com/llvm/llvm-project/commit/8c5bdf97029e09bbc98e5cd8bba150e3c5f80ba0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
M llvm/test/MC/AMDGPU/gfx1250_asm_sopp.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_sopp.txt
Log Message:
-----------
AMDGPU: Correct value and name for ID_RTN_SAVE_WAVE_HAS_TDM (#180181)
Commit: 2f00977feaa827e80206253811dfe5e51d679387
https://github.com/llvm/llvm-project/commit/2f00977feaa827e80206253811dfe5e51d679387
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M offload/plugins-nextgen/common/include/RPC.h
M offload/plugins-nextgen/common/src/RPC.cpp
Log Message:
-----------
[Offload] Make the RPC callbacks private to each running server (#178901)
Summary:
The static object mixes callbacks from different plugins because ever
since we moved to the object library target these are actually shared.
Just make it a member of the base class and make it a pointer set just
to do some basic deduplication.
Commit: 48619c8ab27483b29ba87ec61c8489ef7a7416e2
https://github.com/llvm/llvm-project/commit/48619c8ab27483b29ba87ec61c8489ef7a7416e2
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/test/CodeGen/ARM/intrinsics-crypto.ll
Log Message:
-----------
[ARM] Autogenerate checks for crypto intrinsics (#180147)
Commit: 5283f46615665b0bf8a14f3d4f3acaa321fd8832
https://github.com/llvm/llvm-project/commit/5283f46615665b0bf8a14f3d4f3acaa321fd8832
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
A clang/test/CIR/CodeGen/default-func-attrs-cmd-line.cpp
A clang/test/CIR/CodeGen/no-builtin-attr-automatic.cpp
A clang/test/CIR/CodeGen/offload-convergent-attr.cu
A clang/test/CIR/CodeGen/optsize-func-attr.cpp
A clang/test/CIR/CodeGen/save-reg-params-func-attr.cpp
A clang/test/CIR/CodeGen/trap-func-name-attr.cpp
A clang/test/CIR/CodeGen/zero-call-used-regs-func-attr.cpp
M clang/test/CIR/CodeGenBuiltins/X86/avx512-reduceIntrin.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512-reduceMinMaxIntrin.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512fp16-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512vlbf16-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512vlfp16-builtins.c
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Dialect/LLVMIR/func.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/Import/instructions.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[CIR] Add tons of function infra, plus a handful of attributes (#179811)
This patch puts together a lot more of the CIR infrastructure for
function attributes, plus adds a bunch of 'TODO' messages for areas that
have been skipped.
Along the way, we also implement 8 attributes in some way: -Convergent
gets a little more work, to make the `noconvergent` C attribute have an
effect
-optsize/minsize are implemented, sourced from the command line
-nobuiltin is a call-only attribute that tells not to replace the
individual call with a builtin. This is a touch confusing, since
no-builtins is an attribute that means "don't replace anything in the
body of this function with builtins (from this list)". The spelling
confusion is existing, and it seems that changing the names away from
LLVM would be confusing.
-save_reg_params & zero_call_used_regs are boht pretty simple registers
-temp-func-name just passes a string to LLVM, consistent with existing
implementation.
-default-func-attrs is a difficult one. It takes command line arguments
and passes them as LLVM-IR attributes directly on functions/calls. In
the dialect, we are capturing these in their own attribute to pass them
on correctly. However, this is one we cannot recover from LLVM-IR for
obvious reasons, so we instead choose to let the 'passthrough' mechanism
work for those.
Commit: 4a6697f3931665e9bf72c7ce7c86f0bc92a5bbe3
https://github.com/llvm/llvm-project/commit/4a6697f3931665e9bf72c7ce7c86f0bc92a5bbe3
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/fpext-free.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
Log Message:
-----------
[AMDGPU] Fix and simplify patterns selecting fsub to v_fma_mix_f32 (#180169)
Select (fsub x, y) -> (fma y, -1.0, x). Using -1.0 as the constant
avoids the need for ComplexPatterns to negate x or y.
This also fixes the bad pattern (fsub x, y) -> (fma -x, 1.0, y).
Commit: debff926490a37f0677e3335510f527a11b3fafe
https://github.com/llvm/llvm-project/commit/debff926490a37f0677e3335510f527a11b3fafe
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M libsycl/docs/index.rst
A libsycl/include/sycl/__impl/aspect.hpp
A libsycl/include/sycl/__impl/device.hpp
A libsycl/include/sycl/__impl/device_selector.hpp
A libsycl/include/sycl/__impl/info/device.hpp
A libsycl/include/sycl/__impl/info/device_type.hpp
M libsycl/include/sycl/__impl/platform.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/CMakeLists.txt
A libsycl/src/detail/device_impl.cpp
A libsycl/src/detail/device_impl.hpp
M libsycl/src/detail/global_objects.cpp
M libsycl/src/detail/offload/offload_topology.cpp
M libsycl/src/detail/offload/offload_topology.hpp
M libsycl/src/detail/offload/offload_utils.cpp
M libsycl/src/detail/offload/offload_utils.hpp
M libsycl/src/detail/platform_impl.cpp
M libsycl/src/detail/platform_impl.hpp
A libsycl/src/device.cpp
A libsycl/src/device_selector.cpp
M libsycl/src/platform.cpp
M libsycl/tools/sycl-ls/sycl-ls.cpp
Log Message:
-----------
[SYCL] Add sycl::device initial implementation (#176972)
This is part of the SYCL support upstreaming effort. The relevant RFCs
can be found here:
https://discourse.llvm.org/t/rfc-add-full-support-for-the-sycl-programming-model/74080
https://discourse.llvm.org/t/rfc-sycl-runtime-upstreaming/74479
Plan for next PR:
E2E lit configs & test for get_platforms & get_devices impl
context & USM free functions impl
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 21f3875ffde0ec12bec9e719f5c3fad7adb41667
https://github.com/llvm/llvm-project/commit/21f3875ffde0ec12bec9e719f5c3fad7adb41667
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeAnnotations.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/Dataflow.h
M clang/lib/Analysis/LifetimeSafety/Facts.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
M clang/lib/Analysis/LifetimeSafety/LoanPropagation.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/Sema/Inputs/lifetime-analysis.h
A clang/test/Sema/warn-lifetime-safety-invalidations.cpp
Log Message:
-----------
[LifetimeSafety] Detect use-after-invalidation for STL containers (#179093)
Add detection for use-after-invalidation of container references and
iterators.
This change improves the lifetime safety analysis by detecting a common
class of bugs where references or iterators to container elements are
used after operations that invalidate them (like `push_back`, `insert`,
`resize`, etc.). Example:
```cpp
#include <vector>
void test() {
std::vector<int> v = {1, 2, 3};
int &ref = v[0];
v.push_back(4); // This invalidates references
int x = ref; // This should trigger the warning
}
```
- Added a new `InvalidateOriginFact` to track when container elements
are invalidated
- Added a new diagnostic warning for use-after-invalidation scenarios
- Implemented detection for container methods that invalidate
references/iterators
- Added logic to check for uses of references after container
invalidation
- Added the new warning to the `lifetime-safety-strict` diagnostic group
Compile with `-Wlifetime-safety-strict` or
`-Wlifetime-safety-invalidation` to see the new warning.
Current limitations (not yet detected):
* **Field member invalidations** - When invalidation happens on a field
member of a struct:
```cpp
void Invalidate1Use1IsInvalid() {
S s;
auto it = s.strings1.begin();
s.strings1.push_back("1"); // Should invalidate but doesn't
*it; // Should warn but doesn't
}
```
* **Iterator from pointer to container** - When the iterator is obtained
through a pointer:
```cpp
void IteratorFromPointerToContainerIsInvalidated() {
std::vector<std::string> s;
std::vector<std::string>* p = &s;
auto it = p->begin();
p->push_back("1"); // Should invalidate but doesn't
*it; // Should warn but doesn't
}
```
We need to distinguish between the loans to `s` and `s.strings` using
more granular `Path`. Destruction/Invalidation of a prefix of path
destroys/invalidates the complete path.
We would also need some mechanism to differentiate the storage of
between Containers and the owned buffer. This could be done for
`gsl::Owner` and `lifetimebound` member functions.
Commit: 85eb10e2707c9b9b4da1f8cfde64e9478dad258a
https://github.com/llvm/llvm-project/commit/85eb10e2707c9b9b4da1f8cfde64e9478dad258a
Author: Prajwal Nadig <pnadig at apple.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/DeclObjCCommon.h
M clang/lib/Sema/SemaObjCProperty.cpp
M clang/test/ExtractAPI/objc_property.m
Log Message:
-----------
[Sema] Directly use written attributes in ObjC (#179703)
Clang's AST builder uses the `getPropertyAttributesAsWritten()` method
that contains the bitmasks of only the attributes present in the source,
and not the default attributes that are present in
`getPropertyAttributes()`. This method was relevant in the past when two
separate enums existed for Objective-C property attributes, and had to
be updated whenever new property attributes were introduced. As of this
commit, nullability attributes are not present when written due to the
method not containing the bitmask comparison for the `nullable` and
`null_resettable` attributes.
9721fbf85b83c1cb67cea542c5558f99a07766cf consolidated the two property
attribute enums into a single
enum. With this change, the AST can directly store the written
attributes without having to construct the bitmask again. This commit
removes the `getPropertyAttributesAsWritten()` method and updates the
AST to directly store the written attributes instead.
rdar://131053727
Commit: 272d6dd445767854a4c36bacc2889714e42a61ef
https://github.com/llvm/llvm-project/commit/272d6dd445767854a4c36bacc2889714e42a61ef
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll
Log Message:
-----------
[AMDGPU] Support v_lshl_add_u64 with non-constant shift amount (#179904)
This commit also adds GlobalISel testing to llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll.
Commit: 6844af142e5c8309055bcf107b57161f5c7801fe
https://github.com/llvm/llvm-project/commit/6844af142e5c8309055bcf107b57161f5c7801fe
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M offload/test/lit.cfg
Log Message:
-----------
Revert "[Offload][lit] Link against SPIR-V DeviceRTL if present" (#180211)
Reverts https://github.com/llvm/llvm-project/pull/180030
Need to make changes to buildbot first
Commit: c7a253e4001d80ff4a09110926de6acd42961c53
https://github.com/llvm/llvm-project/commit/c7a253e4001d80ff4a09110926de6acd42961c53
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrNEON.td
Log Message:
-----------
[ARM] Use INSERT_SUBREG instead of SUBREG_TO_REG for crypto patterns. NFCI. (#179910)
This removes the only uses of SUBREG_TO_REG in the ARM backend.
Commit: 383e771dff4781281895b473d77ef7920896542b
https://github.com/llvm/llvm-project/commit/383e771dff4781281895b473d77ef7920896542b
Author: David Spickett <david.spickett at arm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/unittests/Process/Utility/RegisterContextFreeBSDTest.cpp
Log Message:
-----------
[lldb][FreeBSD] Remove MIPS64 unit tests (#180207)
427bb1cc1b09ea68b8a13a667810681ba4074f6b removed FreeBSD on MIPS64
support. This test was missed because it only compiles on FreeBSD on
MIPS64.
Commit: 52955f8b27831cf556f875b313a821383cdbb904
https://github.com/llvm/llvm-project/commit/52955f8b27831cf556f875b313a821383cdbb904
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M .github/workflows/libcxx-run-benchmarks.yml
Log Message:
-----------
[libc++] Fix the benchmarking bot
I made changes to test-at-commit but didn't update the Github workflow.
Commit: c8d8e5e2106f6736c4aa4a58d1875f956e1dbae3
https://github.com/llvm/llvm-project/commit/c8d8e5e2106f6736c4aa4a58d1875f956e1dbae3
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/include/llvm/IR/DebugInfo.h
M llvm/lib/Analysis/ModuleDebugInfoPrinter.cpp
M llvm/lib/IR/DebugInfo.cpp
A llvm/test/DebugInfo/Generic/debuginfofinder-macros.ll
Log Message:
-----------
[DebugInfo] Add macro tracking support to DebugInfoFinder (#179931)
Extend `DebugInfoFinder` to collect and expose macro debug information
(`DIMacro` and `DIMacroFile` nodes).
Also update `ModuleDebugInfoPrinter` to display macro information
including the macro type, name, value, and source location.
-----
The motivation behind this PR is that `DebugInfoFinder` is key for the
[SPIRV-LLVM-Translator](https://github.com/KhronosGroup/SPIRV-LLVM-Translator)
and also for future support of debug info in the SPIRV backend in LLVM.
This new lookup of `DIMacro` with their `DIMacroFile` when available
simplifies the logic around the translation for this debug information.
Commit: 65cdee827b76f137986549b69a59e9da74c0e702
https://github.com/llvm/llvm-project/commit/65cdee827b76f137986549b69a59e9da74c0e702
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.h
Log Message:
-----------
[AMDGPU] Move magic strings used for WMMA modifiers (NFC) (#180201)
Commit: 4066ef6ace253fb58fdbd6382e30d68ddc575dd0
https://github.com/llvm/llvm-project/commit/4066ef6ace253fb58fdbd6382e30d68ddc575dd0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
Log Message:
-----------
[X86] Add test showing failure to fold expand(splat,passthrough,mask) to select(splat,passthrough,mask) (#180208)
Commit: 30533d07578ea80b3f2e002e17272f589ffebed8
https://github.com/llvm/llvm-project/commit/30533d07578ea80b3f2e002e17272f589ffebed8
Author: petbernt <167322637+petbernt at users.noreply.github.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M libc/docs/dev/printf_behavior.rst
M libc/docs/dev/undefined_behavior.rst
Log Message:
-----------
[libc][docs] Document printf NULL handling for %s/%n (#180067)
- Fix printf_behavior to describe NULL %s as printing "(null)" when
nullptr checks are enabled
- Point undefined_behavior NULL %s/%n entry at
LIBC_COPT_PRINTF_NO_NULLPTR_CHECKS
- Add Sphinx labels to link directly to the flag and Conversion sections
Commit: 93d0c61d4d391d937e01e038081bdf9a2a08ba19
https://github.com/llvm/llvm-project/commit/93d0c61d4d391d937e01e038081bdf9a2a08ba19
Author: Kiran <kiran.sturt at arm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CGExprScalar.cpp
A clang/test/CodeGen/compound-assign-atomic-bool.c
Log Message:
-----------
[Clang] Fix atomic boolean compound assignment (#33210) (#180200)
This is my second attempt to merge the #33210 fix. My original patch
#178220 caused test failures on risc-v, as I committed a new test file
that was too target-specific. I reverted the PR (#180183) to avoid
causing disruption, as I did not know how long the fix would take.
I have now fixed the test so that it behaves correctly on risc-v. I have
also changed the run lines so it is tested on aarch64, amd64 and risc-v.
Commit: e958bcdd1713d156f8689c1b9f2828e99311a75b
https://github.com/llvm/llvm-project/commit/e958bcdd1713d156f8689c1b9f2828e99311a75b
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/X86/known-bits.ll
Log Message:
-----------
[DAGCombiner] Look through freeze for ext(freeze(extload(x))) (#178669)
This patch fixes a regression introduced by PR #175022, where
a freeze was introduced with the following transformation:
ext(freeze(load(x))) -> freeze(extload(x))
If a new extend is introduced afterwards we then have
ext(freeze(extload(x)))
which doesn't get picked up by existing DAG combines due to
the freeze getting in the way.
Commit: e67bfe85d924ac907edd601c49de43f5175fedef
https://github.com/llvm/llvm-project/commit/e67bfe85d924ac907edd601c49de43f5175fedef
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Fix D16 buffer load RegBankLegalize rules (#179982)
Use fast StandardB rule and add uniform rules and uniform tests.
Commit: d7fa1bc0fab3d69a0a92a8b6ee2cd6e357c23e2a
https://github.com/llvm/llvm-project/commit/d7fa1bc0fab3d69a0a92a8b6ee2cd6e357c23e2a
Author: Artem Dergachev <artem.dergachev at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
[clang][dataflow] Fix crash on base-to-derived cast of unmodeled pointer value. (#179060)
Remove the assertion because null values occur naturally on a regular
basis.
Un-crashes the newly added test.
Commit: 1171450d56e22b32894863c894a487a5813bd5a6
https://github.com/llvm/llvm-project/commit/1171450d56e22b32894863c894a487a5813bd5a6
Author: Nhat Nguyen <nhat7203 at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Options/Options.td
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprClassification.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/Basic/OperatorPrecedence.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Parse/CMakeLists.txt
M clang/lib/Parse/ParseExpr.cpp
A clang/lib/Parse/ParseReflect.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
A clang/test/CodeGenCXX/reflection-mangle-itanium.cpp
A clang/test/CodeGenCXX/reflection-mangle-ms.cpp
A clang/test/Driver/reflection-requires-cxx26.cpp
A clang/test/Parser/parsing-reflection-with-blocks.cpp
A clang/test/Parser/parsing-reflection.cpp
M clang/tools/libclang/CXCursor.cpp
Log Message:
-----------
[clang]: reflection operator parsing for primitive types (#164692)
(After changing the scope) This PR implements parsing the reflection
operator (^^) for primitive types. The goal is to keep the first PR
simple. In subsequent PRs, parsing for the remaining requirements will
be introduced.
This implementation is based on the fork of @katzdm.
Class `CXXReflectExpr` is introduced to represent the operand of the
reflection operator. For now, in this PR, the type std::meta::info is
not implemented yet, so when we construct an AST node CXXReflectExpr,
`VoidTy` is used as placeholder type for now.
The file `ParseReflect.cpp` is introduced, which for now only has the
function `ParseCXXReflectExpression`. It parses the operand of the
reflection operator.
---------
Co-authored-by: Shafik Yaghmour <shafik.yaghmour at intel.com>
Co-authored-by: Hubert Tong <hubert.reinterpretcast at gmail.com>
Co-authored-by: Sirraide <aeternalmail at gmail.com>
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Co-authored-by: Erich Keane <ekeane at nvidia.com>
Commit: 7887e3a39844ddfdf8e55dab6ed207ea3fbcb9fa
https://github.com/llvm/llvm-project/commit/7887e3a39844ddfdf8e55dab6ed207ea3fbcb9fa
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
Log Message:
-----------
[NFC] Change the FuncOp 'UnitAttr's to not be an 'optional'. (#180209)
It appears that these all became `Optional` thanks to a series of
copy/paste errors going back years. CallOp doesn't have this 'feature',
and a "UnitAttr' should be enough as it is effectively already a
true/false value as it is.
So this patch removes the optional here to simplify the implementation,
and changes no tests, as the interface is identical anyway.
Commit: 29891ec07ca26d08122dfe5f97b3443c0bef8b77
https://github.com/llvm/llvm-project/commit/29891ec07ca26d08122dfe5f97b3443c0bef8b77
Author: Kerem Şahin <keremsahin401 at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/test/CodeGen/X86/pr142937.ll
Log Message:
-----------
[SelectionDAG] Use -filetype=null for llc RUN lines in pr142937 (#180004)
This patch adds -filetype=null to the llc RUN lines in pr142937.ll, to
ensure that the test does not attempt to write files to the local
directory.
Follow-up to #179249.
Commit: 115158b176b89b5a97938c842122b7cde6f7a72d
https://github.com/llvm/llvm-project/commit/115158b176b89b5a97938c842122b7cde6f7a72d
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/test/Driver/openmp-target-fast-flag.c
Log Message:
-----------
[clang][OpenMP][test] Use `-fopenmp=libomp` explicitly (#180221)
Using `-fopenmp` uses the default openmp lib, which defaults to `libomp`
but may be something else. This test only passes with `libomp`, so it
passes when using all defaults, but fails downstream if configured for
something else, like `libgomp`.
Commit: 68d704844575d166301cf579b77b947fbe3446bb
https://github.com/llvm/llvm-project/commit/68d704844575d166301cf579b77b947fbe3446bb
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.h
A lldb/test/API/lang/cpp/template-diagnostic-hint/Makefile
A lldb/test/API/lang/cpp/template-diagnostic-hint/TestTemplateDiagnosticHint.py
A lldb/test/API/lang/cpp/template-diagnostic-hint/main.cpp
Log Message:
-----------
[lldb][ClangUserExpression] Emit workaround hint when trying to call function templates (#179916)
Before:
```
(lldb) expression some_template_func<int, long>(5)
˄
╰─ error: 'some_template_func' does not name a template but is followed by template arguments
note: Ran expression as 'C++14'.
note: note: non-template declaration found by name lookup
```
After:
```
(lldb) expression some_template_func<int, long>(5)
˄
╰─ error: 'some_template_func' does not name a template but is followed by template arguments
note: Ran expression as 'C++14'.
note: note: non-template declaration found by name lookup
note: Naming template instantiation not yet supported. Template functions can be invoked via their mangled name. E.g., expression _Z3fooIiEvi(5)
```
There isn't a great way to get to the actual function being named (and
its mangled name) since we're just dealing with raw text. So I just
print an example mangled name.
This doesn't work for all template instantiations. E.g.,:
```
(lldb) p f.method<long>(10)
˄ ˄
│ ╰─ error: expected '(' for function-style cast or type construction
╰─ error: no member named 'method' in 'Foo<int>'
note: Ran expression as 'C++14'.
```
This is a consequence of how we construct the AST for template methods.
Once we fix that, this hint will get emitted there too.
Note this will also trigger in cases where no function is being called
(hence I used the defensive phrase "Template functions can be invoked").
rdar://135725807
Commit: caee8f015e5cc9b6f4006850c3825d5ffeeab93b
https://github.com/llvm/llvm-project/commit/caee8f015e5cc9b6f4006850c3825d5ffeeab93b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/MC/RISCV/rv32p-invalid.s
M llvm/test/MC/RISCV/rv32p-valid.s
M llvm/test/MC/RISCV/rv64p-valid.s
Log Message:
-----------
[RISCV] Add ppair.e and ppaire.w as aliases for pack on RV32 and RV64 respectively (#180100)
Based on this note from
https://jhauser.us/RISCV/ext-P/RVP-baseInstrs-018.pdf
(*1) For RV32, PPAIRE.H is a pseudoinstruction for PACK.
(*2) For RV64, PPAIRE.W is a pseudoinstruction for PACK.
Commit: 1b0d9d57435cf678628d4edf6d7401853d8acf4d
https://github.com/llvm/llvm-project/commit/1b0d9d57435cf678628d4edf6d7401853d8acf4d
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Parse/BUILD.gn
Log Message:
-----------
[gn build] Port 1171450d56e2
Commit: 55ecf62227cc02449ef56d1d731a9c0d62a7ecba
https://github.com/llvm/llvm-project/commit/55ecf62227cc02449ef56d1d731a9c0d62a7ecba
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/test/TableGen/MacroFusion.td
M llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Adopt CodeGenHelpers in MacroFusion emitter (#180132)
Commit: 295eba2058a7dbbeba05def74c9f214c1987a5cb
https://github.com/llvm/llvm-project/commit/295eba2058a7dbbeba05def74c9f214c1987a5cb
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUPrepareAGPRAlloc.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
M llvm/lib/Target/AMDGPU/AMDGPUUniformIntrinsicCombine.cpp
M llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
M llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.cpp
M llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
M llvm/lib/Target/AMDGPU/SIFixVGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp
M llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
M llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
M llvm/lib/Target/AMDGPU/SIPostRABundler.cpp
M llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
Log Message:
-----------
[NFC][AMDGPU] Remove pass initialization from pass constructors (#180149)
Commit: b12e3122c85f16989e15dac8b97024f02b46f296
https://github.com/llvm/llvm-project/commit/b12e3122c85f16989e15dac8b97024f02b46f296
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/GlobalMergeFunctions.cpp
M llvm/lib/CodeGen/InsertCodePrefetch.cpp
M llvm/lib/IR/Dominators.cpp
M llvm/lib/IR/SafepointIRVerifier.cpp
M llvm/lib/IR/Verifier.cpp
Log Message:
-----------
[NFC][Core][CodeGen] Remove pass initialization from pass constructors (#180153)
Commit: 017ca739170286306d0b2949f9d071c8ae5b1b8a
https://github.com/llvm/llvm-project/commit/017ca739170286306d0b2949f9d071c8ae5b1b8a
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
Log Message:
-----------
[NFC][LLVM] Remove pass initialization from pass constructors (#180158)
Commit: 918d57642b96ef73947df777a3c82f9b265872a8
https://github.com/llvm/llvm-project/commit/918d57642b96ef73947df777a3c82f9b265872a8
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/VNCoercion.h
M llvm/lib/Transforms/Utils/VNCoercion.cpp
Log Message:
-----------
[NFC][LLVM] Code cleanup in VNCoercion (#180159)
Use namespace qualifiers to define functions declared in the
`VNCoercion` namespace to conform to LLVM CS.
Commit: bd19bfeb267e2eac39533443445bd5cc04d7c058
https://github.com/llvm/llvm-project/commit/bd19bfeb267e2eac39533443445bd5cc04d7c058
Author: Thurston Dang <thurston at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/switch-icmp.ll
Log Message:
-----------
[msan] Switch switch() from strict handling to (icmp eq)-style handling (#179851)
Currently, the SwitchInst:
```
switch i32 %Val, label %else [ i32 0, label %A
i32 1, label %B
i32 2, label %C ]
```
is strictly handled i.e., MSan will check that %Val is fully
initialized. This is appropriate nearly all the time.
However, sometimes the compiler may convert (icmp + br) into a switch
statement. (icmp + br) has different semantics: MSan allows icmp eq/ne
with partly initialized inputs to still result in a fully initialized
output, if there exists a bit that is initialized in both inputs with a
differing value e.g., suppose:
```
%A = 00000000 00001010
%B = 00000000 00000110
%C = 00000000 00000011
%Val = 00000001 ???????? (where ? denotes an uninitialized bit)
```
Even though %Val has uninitialized bits, the initialized '1' bit
immediately to the left, compared to the corresponding initialized '0'
bit in %A/%B/%C suffices to prove that %Val does not match any of those
cases. This is similar to a real-world case with std::optional (where
the has_value bit may be initialized but the value is not).
This patch adds this relaxed icmp logic to the switch instrumentation as
well, to make MSan's behavior equivalent under optimization.
Note that this edge case only applies if the switch input value
definitively does not match *any* of the cases (matching any of the
cases requires an exact, fully initialized match). If it is uncertain
whether the switch input value could, depending on the uninitialized
bits, match one of the cases or not, MSan will report
use-of-uninitialized memory.
Commit: 4afce0cb3de8e9a849b5150471672f4bb6ee591b
https://github.com/llvm/llvm-project/commit/4afce0cb3de8e9a849b5150471672f4bb6ee591b
Author: David Green <david.green at arm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
Log Message:
-----------
[AArch64] Correct spelling of INSERT_SUBREF->INSERT_SUBREG. NFC
Commit: 621fe6783fb1c766e7f68407b30eb74a5d71a9ef
https://github.com/llvm/llvm-project/commit/621fe6783fb1c766e7f68407b30eb74a5d71a9ef
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M flang-rt/lib/runtime/descriptor-io.cpp
M flang-rt/lib/runtime/extensions.cpp
M flang-rt/lib/runtime/external-unit.cpp
M flang-rt/lib/runtime/io-api.cpp
M flang-rt/lib/runtime/io-stmt.cpp
M flang-rt/lib/runtime/pseudo-unit.cpp
M flang-rt/lib/runtime/unit.h
Log Message:
-----------
[flang] Better "out of memory" error for failure to allocate a unit (#179291)
When the I/O runtime fails to allocate storage for an I/O unit, the
error message cites a source location in the runtime library, not the
user program. Thread instances of Terminator through to the code that
attempts the allocation so that the failure has a source position in the
user's program.
Commit: 9d0043a35f5cb9cd66c940042f6dce85fd874358
https://github.com/llvm/llvm-project/commit/9d0043a35f5cb9cd66c940042f6dce85fd874358
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M flang/include/flang/Evaluate/check-expression.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Semantics/expression.h
M flang/include/flang/Semantics/semantics.h
M flang/include/flang/Semantics/tools.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Semantics/check-coarray.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/semantics.cpp
M flang/lib/Semantics/tools.cpp
A flang/test/Semantics/bug2174.f90
Log Message:
-----------
[flang] Refactor "unused"/"used without definition" warnings (#179539)
I'm emitting a false warning "used without definition" warning for
variable cited in an inquiry intrinsic (e.g. LBOUND), and failing to
emit an "unused local" warning for allocatables that only appear in
ALLOCATE statements.
This patch makes the analysis more context-aware by rewriting it in
terms of typed expression traversal, and moves the analysis part into
Evaluate/check-expression.cpp from Semantics/expression.cpp.
Commit: c15ae96dc7fef09a342a5d0d11df74237600b9a6
https://github.com/llvm/llvm-project/commit/c15ae96dc7fef09a342a5d0d11df74237600b9a6
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/bug1214.cuf
A flang/test/Semantics/bug2131b.cuf
Log Message:
-----------
[flang][CUDA] Better analysis of actual argument CUDA data attrs (#179569)
When checking an actual argument for any CUDA data attributes, be sure
to check the symbols in a designator like a%b%c in order, taking the
last symbol that has a CUDA attribute. And be sure to interpret a
function result symbol of a device function as a device object, at least
for generic interface resolution for defined assignments and operators.
This patch exposed errors in flang/test/Semantics/bug1214.cuf, which
have been fixed.
Commit: d1d9413e7bfdd3e4d1900dc47db5c46cfd3b0a3f
https://github.com/llvm/llvm-project/commit/d1d9413e7bfdd3e4d1900dc47db5c46cfd3b0a3f
Author: Luke Lau <luke at igalia.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
Log Message:
-----------
[VPlan] Don't use std::not_fn
It looks like some Apple based toolchains can't compile this:
https://github.com/llvm/llvm-project/pull/180005#issuecomment-3861614477
There aren't any other users of std::not_fn within LLVM so just use a
lambda for now.
Commit: 73b83be1c9b3fd3c844a789d26e2a08d8f7caf62
https://github.com/llvm/llvm-project/commit/73b83be1c9b3fd3c844a789d26e2a08d8f7caf62
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M flang/docs/Extensions.md
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Semantics/expression.cpp
A flang/test/Semantics/bug179580.f90
Log Message:
-----------
[flang] Add warning and documentation for extension (#179708)
When a pointer component has no default initialization in the derived
type definition and does not appear explicitly as a component in a
structure constructor, we assume that it is meant to be NULL() as an
extension. But there's no warning or documentation for this extension;
add them.
Fixes https://github.com/llvm/llvm-project/issues/179580.
Commit: 4ad58b4fff9264b600f9a234338859796826b3f8
https://github.com/llvm/llvm-project/commit/4ad58b4fff9264b600f9a234338859796826b3f8
Author: tedj <tedmjohnson at protonmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M .gitignore
Log Message:
-----------
[llvm][.gitignore] macOS case-sensitive update (#177971)
If you run macOS on a case-sensitive file system, .DS_store and .DS_Store are different files and the existing lowercase-s version doesn't match. Fix that with the intended case sensitive.
Commit: c32cde4182f02df7a67455ff0567ddcc1cf9bfb7
https://github.com/llvm/llvm-project/commit/c32cde4182f02df7a67455ff0567ddcc1cf9bfb7
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/test/Transforms/LoopIdiom/reuse-lcssa-phi-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
Log Message:
-----------
[SCEVExp] Use SCEVPtrToAddr in tryToReuseLCSSAPhi if possible. (#178727)
This patch updates tryToReuseLCSSAPhi to use SCEVPtrToAddr, unless using
SCEVPtrToInt allows re-use, because the IR already contains a re-usable
phi using PtrToInt.
This is a first step towards migrating to SCEVPtrToAddr and avoids
regressions in follow-up changes.
PR: https://github.com/llvm/llvm-project/pull/178727
Commit: 9f8f90143e54a16c4a7e5b1649b7d1f5896b0cc7
https://github.com/llvm/llvm-project/commit/9f8f90143e54a16c4a7e5b1649b7d1f5896b0cc7
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/test/Shell/helper/toolchain.py
Log Message:
-----------
Revert "[lldb-dap] fix executable substitution in tests (#179685)" (#180241)
This reverts commit 082a47d8944da242993bf28980b07f2c8c3df4a6.
`ToolSubst` should only be used explicitely for passing `extra_args`.
Commit: 368d7ea12c0b597c8bf3b64bfae27d6cfa5959af
https://github.com/llvm/llvm-project/commit/368d7ea12c0b597c8bf3b64bfae27d6cfa5959af
Author: fabrizio-indirli <fabrizio.indirli at arm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/test/Conversion/ConvertToSPIRV/gpu.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
Log Message:
-----------
[mlir][gpu] Add NoMemoryEffect to gpu.subgroup_reduce op (#180227)
Add missing MemoryEffectOpInterface to gpu.subgroup_reduce
Signed-off-by: Fabrizio Indirli <fabrizio.indirli at arm.com>
Commit: 762c32aa08c0521589ef077ace800da09bc8e492
https://github.com/llvm/llvm-project/commit/762c32aa08c0521589ef077ace800da09bc8e492
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUTypes.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUOps.cpp
M mlir/test/Conversion/AMDGPUToROCDL/gfx1250.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[mlir][AMDGPU] Add wrappers for in-memory barriers on gfx1250 (#180112)
This commit introduces the `!amdgpu.ds_barrier_state` type and
operations on that type, including extracting its components and (more
importantly) provides wrappers around the upcoming barrier-management
instructions that will be added in gfx1250.
This commit is loosely based on work done for Triton, but this commit
provides slightly more lower level-primitives (namely a known-atomic
load for getting the barrier state instead of providing a `wait`
operation that includes an entire spin-loop, though if people want one
we could consider adding it.) These operations will allow LDS barriers
to be interacted with in a more type-safe manner.
The types and operations use the Ds naming scheme to match the
underlying instructions and to avoid confusion with the "LDS barrier"
already present in the AMDGPU dialect that was a workaround for LLVM's
memory fencing support.
(To summarize a potential usage pattern, one can use a pair of these
barriers to communicate between wave(s) in a workgroup that load data
into memory and a separate wave(s) that compute with that data.)
---------
Co-authored-by: Claude Opus 4.5 <noreply at anthropic.com>
Commit: 64de25d183be069e7b328be396520fbe462d84e4
https://github.com/llvm/llvm-project/commit/64de25d183be069e7b328be396520fbe462d84e4
Author: Thurston Dang <thurston at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vcmp.ll
Log Message:
-----------
[msan] Handle NEON floating-point absolute compare greater than/equal (#180120)
Uses existing handleVectorComparePackedIntrinsic()
Commit: 544caa627b345bffba47fe3683acb993d598a738
https://github.com/llvm/llvm-project/commit/544caa627b345bffba47fe3683acb993d598a738
Author: Mingming Liu <mingmingl at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Analysis/StaticDataProfileInfo.cpp
M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
M llvm/test/CodeGen/X86/global-variable-partition-with-dap.ll
Log Message:
-----------
[StaticDataLayout] Reconcile string literal hotness from data access profiles and PGO profiles. (#178336)
https://github.com/llvm/llvm-project/pull/178333 updates the memprof
pass to annotate string literal section prefix.
The StaticDataProfileInfo.cpp provides an analysis pass to reconcile
global variable hotness. It's used by StaticDataAnnotator and AsmPrinter
to look up global variable hotness.
This PR updates the analysis pass to compute the hotness of string
literals.
* When both data access profiles and pgo counters provide a hotness
attribute, use the hotter one.
* Otherwise, use the hotness attribute that's available.
Implementation-wise, the option `AnnotateStringLiteralSectionPrefix` is
moved from MemProf (a transform pass) to StaticDataProfileInfo (an
Analysis pass). Otherwise, there might be errors like caught by CI. Note
https://github.com/llvm/llvm-project/pull/178336#issuecomment-3808537817
is an edited message, and its history shows the intermediate failures
like below. ~My understanding is~ Preliminary LLM study (:)) shows that
the error manifests in PowerPC but not X86 due to cmake variable
differences.
```
FAILED: unittests/Target/PowerPC/PowerPCTests
...
>>> referenced by CommandLine.h:1437 (/home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/include/llvm/Support/CommandLine.h:1437)
>>> StaticDataProfileInfo.cpp.o:(llvm::StaticDataProfileInfo::getConstantSectionPrefix(llvm::Constant const*, llvm::ProfileSummaryInfo const*) const) in archive lib/libLLVMAnalysis.a
clang++: error: linker command failed with exit code 1 (use -v to see invocation)
```
Commit: 9f4e8bca0394972bed475bf3046a55744a5794a5
https://github.com/llvm/llvm-project/commit/9f4e8bca0394972bed475bf3046a55744a5794a5
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lld/include/lld/Common/BPSectionOrdererBase.inc
Log Message:
-----------
[lld][BP] Fix nondeterministic function order by using MapVector (#179841)
There are two places where the nondeterministic iteration order of
`DenseMap` (the original type of `startupSectionIdxUNs`) causes the
output function order to be nondeterministic.
https://github.com/llvm/llvm-project/blob/16e2e7f59134e63810228c9a0dc990bfd96f9a1f/lld/include/lld/Common/BPSectionOrdererBase.inc#L240-L245
https://github.com/llvm/llvm-project/blob/16e2e7f59134e63810228c9a0dc990bfd96f9a1f/lld/include/lld/Common/BPSectionOrdererBase.inc#L267-L268
The fix is to use `MapVector` whose iteration order is guaranteed to be
deterministic.
To test, I built a large binary several times and observed this value no
longer changes.
https://github.com/llvm/llvm-project/blob/16e2e7f59134e63810228c9a0dc990bfd96f9a1f/lld/include/lld/Common/BPSectionOrdererBase.inc#L410-L411
It seems that this regresses linktime by a few seconds, but I believe
the tradeoff is worthwhile.
Commit: 8e17489026d14160e0a2461c5678b0117d8a5b58
https://github.com/llvm/llvm-project/commit/8e17489026d14160e0a2461c5678b0117d8a5b58
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalMergeFunctions.cpp
A llvm/test/CodeGen/AArch64/cgdata-merge-preserve-entry-count.ll
Log Message:
-----------
[CGData][GMF] Preserve Profile Data (#180126)
Profile data for instructions (e.g., branch weights) is automatically
preserved via `splice()` which moves the basic blocks along with their
instruction metadata. However, entry count is stored as function
metadata, which was dropped when creating merged function and thunks.
The fix is to explicitly set entry count for both merged function (.Tgm)
and thunks via `setEntryCount()`.
Commit: 5efb69f7c3c146268a715a20aa6d0c49ff3ea83f
https://github.com/llvm/llvm-project/commit/5efb69f7c3c146268a715a20aa6d0c49ff3ea83f
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-readelf.rst
M llvm/docs/CommandGuide/llvm-readobj.rst
Log Message:
-----------
[NFC][llvm][docs] Fix alphabetical order of commands (#178519)
Fix the order of commands for llvm-readelf and llvm-readobj docs.
Commit: 69878f9fa17ac750e9738b552f8b5a02c0290374
https://github.com/llvm/llvm-project/commit/69878f9fa17ac750e9738b552f8b5a02c0290374
Author: John Harrison <harjohn at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/include/lldb/Host/JSONTransport.h
M lldb/include/lldb/Protocol/MCP/Server.h
M lldb/include/lldb/Protocol/MCP/Transport.h
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.cpp
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.h
M lldb/source/Protocol/MCP/Server.cpp
M lldb/source/Protocol/MCP/Transport.cpp
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/Transport.cpp
M lldb/tools/lldb-dap/Transport.h
M lldb/tools/lldb-dap/tool/lldb-dap.cpp
M lldb/unittests/DAP/TestBase.cpp
M lldb/unittests/DAP/TestBase.h
M lldb/unittests/Host/JSONTransportTest.cpp
M lldb/unittests/Protocol/ProtocolMCPServerTest.cpp
M lldb/unittests/TestingSupport/Host/JSONTransportTestUtilities.h
Log Message:
-----------
[lldb] Refactor JSONTransport own MainLoop read handle. (#179564)
When working with a MainLoop, if the file reaches the EOF it will
immediately fire the read handle callback. We cannot readily determine
if the file is at EOF or if the file is pointing to a socket/pipe that
has consumed all the current data in the buffer but the remote end has
not yet hung up. This is causing JSONTransport to continuously fire the
OnRead callback trigging repeated calls to the
`MessageHandler::OnClose`.
Since MainLoop does not perform the actual read, we need to adjust the
behavior of JSONTransport to fully own the read handle.
This change moves the ownership of the `MainLoop::ReadHandleUP` and
additionally own a reference to the `MainLoop` itself to ensure the loop
outlives the JSONTransport object.
This allows us to remove the handle immediately when we detect an EOF /
hang up has occurred.
Commit: 28042a87022b4e4e20883f7df78eed93e216b349
https://github.com/llvm/llvm-project/commit/28042a87022b4e4e20883f7df78eed93e216b349
Author: Fateme Hosseini <quic_fhossein at quicinc.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/Hexagon/CMakeLists.txt
A llvm/lib/Target/Hexagon/HexagonGlobalRegion.cpp
A llvm/lib/Target/Hexagon/HexagonGlobalRegion.h
Log Message:
-----------
[Hexagon] Add global region scaffolding (#179541)
Introduce HexagonGlobalRegion, a data structure that the upcoming
Hexagon scheduler work will build on. It relies on the new
HexagonLiveVariables analysis to keep per-block liveness up to date when
the scheduler moves instructions across basic blocks.
Author: Sergei Larin <slarin at qti.qualcomm.com>
Patch By: Fateme Hosseini <fhossein at qti.qualcomm.com>
Commit: 8244528aee54e823c62f7bee6c6184b530b3f772
https://github.com/llvm/llvm-project/commit/8244528aee54e823c62f7bee6c6184b530b3f772
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/runInTerminal/TestDAP_runInTerminal.py
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
Log Message:
-----------
[lldb-dap] Add validation for RunInTerminal client capability (#180213)
Check if the client supports RunInTerminal before attempting to run in
the preferred terminal.
One less unknown reason for failed to launch
Commit: 823799d9ed604e8db0d22904f22c0705bf2cab67
https://github.com/llvm/llvm-project/commit/823799d9ed604e8db0d22904f22c0705bf2cab67
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel][mlir][AMDGPU] Port #180112: Add td dep (#180248)
Commit: 5f4543fbafb4e4879815f1ac045185398e09efd8
https://github.com/llvm/llvm-project/commit/5f4543fbafb4e4879815f1ac045185398e09efd8
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/include/clang/AST/ComputeDependence.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/ComputeDependence.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprClassification.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
A clang/test/AST/HLSL/matrix-elementexpr-tree-transform.hlsl
A clang/test/AST/HLSL/matrix-member-access-scalar.hlsl
A clang/test/AST/HLSL/matrix-member-access-swizzle-ast-dump-json.hlsl
A clang/test/AST/HLSL/matrix-member-access-swizzle-ast-print.hlsl
A clang/test/AST/HLSL/matrix-member-access-swizzle.hlsl
A clang/test/AST/HLSL/pch_with_matrix_element_accessor.hlsl
A clang/test/CIR/CodeGenHLSL/matrix-element-expr-load.hlsl
A clang/test/CodeGenHLSL/matrix-member-one-based-accessor-scalar-load.hlsl
A clang/test/CodeGenHLSL/matrix-member-one-based-accessor-scalar-store.hlsl
A clang/test/CodeGenHLSL/matrix-member-one-based-swizzle-load.hlsl
A clang/test/CodeGenHLSL/matrix-member-one-based-swizzle-store.hlsl
A clang/test/CodeGenHLSL/matrix-member-zero-based-accessor-scalar-load.hlsl
A clang/test/CodeGenHLSL/matrix-member-zero-based-accessor-scalar-store.hlsl
A clang/test/CodeGenHLSL/matrix-member-zero-based-swizzle-load.hlsl
A clang/test/CodeGenHLSL/matrix-member-zero-based-swizzle-store.hlsl
A clang/test/SemaHLSL/matrix-member-access-errors.hlsl
M clang/tools/libclang/CXCursor.cpp
Log Message:
-----------
[HLSL][Matrix] introduce MatrixElementExpr as accessor and swizzle operator (#171225)
fixes #159438
This patch adds `MatrixElementExpr`, a new AST node for HLSL matrix
element and swizzle access (e.g. M._m00, M._11_22_33).
It introduces a shared `ElementAccessExprBase` used by both matrix and
vector swizzle expressions, updates Sema to parse and validate
zero-based and one-based accessors, detects duplicates for l-value
checks, and emits improved diagnostics. CodeGen is updated to lower
scalar and multi-element accesses consistently, and full AST
serialization, dumping, and tooling support is included. This
implementation reflects the updated
[RFC](https://github.com/llvm/wg-hlsl/pull/357/files) for HLSL matrix
accessor semantics.
Commit: cb905605b2e95f88296afe136b21a7d2476cb058
https://github.com/llvm/llvm-project/commit/cb905605b2e95f88296afe136b21a7d2476cb058
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/test/Transforms/LoopIdiom/reuse-lcssa-phi-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
Log Message:
-----------
Revert "[SCEVExp] Use SCEVPtrToAddr in tryToReuseLCSSAPhi if possible." (#180257)
Reverts llvm/llvm-project#178727
triggers asserts in on some build bots
Commit: 4a7e572a5cfb5a5508574cf6d1ed45c6d469a725
https://github.com/llvm/llvm-project/commit/4a7e572a5cfb5a5508574cf6d1ed45c6d469a725
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/test/API/lang/cpp/template-diagnostic-hint/TestTemplateDiagnosticHint.py
Log Message:
-----------
[lldb][test] TestTemplateDiagnosticHint.py: XFAIL on Windows
Fails on Windows with below error. Probably because we're not
constructing the AST from DWARF correctly for templates. Or perhaps
something to do with the DWARF index.
```
******************** TEST 'lldb-api :: lang/cpp/template-diagnostic-hint/TestTemplateDiagnosticHint.py' FAILED ********************
Script:
--
C:/Users/tcwg/scoop/apps/python/current/python.exe C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/llvm-project/lldb\test\API\dotest.py -u CXXFLAGS -u CFLAGS --env LLVM_LIBS_DIR=C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/./lib --env LLVM_INCLUDE_DIR=C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/include --env LLVM_TOOLS_DIR=C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/./bin --arch aarch64 --build-dir C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/lldb-test-build.noindex --lldb-module-cache-dir C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/lldb-test-build.noindex/module-cache-lldb\lldb-api --clang-module-cache-dir C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/lldb-test-build.noindex/module-cache-clang\lldb-api --executable C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/./bin/lldb.exe --compiler C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/./bin/clang.exe --dsymutil C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/./bin/dsymutil.exe --make C:/Users/tcwg/scoop/shims/make.exe --llvm-tools-dir C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/./bin --lldb-obj-root C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/tools/lldb --lldb-libs-dir C:/Users/tcwg/llvm-worker/lldb-aarch64-windows/build/./lib --cmake-build-type Release --skip-category=watchpoint C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\test\API\lang\cpp\template-diagnostic-hint -p TestTemplateDiagnosticHint.py
--
Exit Code: 1
Command Output (stdout):
--
lldb version 23.0.0git (https://github.com/llvm/llvm-project.git revision 4afce0cb3de8e9a849b5150471672f4bb6ee591b)
clang revision 4afce0cb3de8e9a849b5150471672f4bb6ee591b
llvm revision 4afce0cb3de8e9a849b5150471672f4bb6ee591b
Skipping the following test categories: watchpoint, libc++, libstdcxx, dwo, dsym, gmodules, debugserver, objc, fork, pexpect
--
Command Output (stderr):
--
UNSUPPORTED: LLDB (C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\build\bin\clang.exe-aarch64) :: test_dsym (TestTemplateDiagnosticHint.TestCase.test_dsym) (test case does not fall in any category of interest for this run)
FAIL: LLDB (C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\build\bin\clang.exe-aarch64) :: test_dwarf (TestTemplateDiagnosticHint.TestCase.test_dwarf)
UNSUPPORTED: LLDB (C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\build\bin\clang.exe-aarch64) :: test_dwo (TestTemplateDiagnosticHint.TestCase.test_dwo) (test case does not fall in any category of interest for this run)
======================================================================
FAIL: test_dwarf (TestTemplateDiagnosticHint.TestCase.test_dwarf)
----------------------------------------------------------------------
Traceback (most recent call last):
File "C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\packages\Python\lldbsuite\test\lldbtest.py", line 1844, in test_method
return attrvalue(self)
^^^^^^^^^^^^^^^
File "C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\test\API\lang\cpp\template-diagnostic-hint\TestTemplateDiagnosticHint.py", line 14, in test
self.expect(
File "C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\packages\Python\lldbsuite\test\lldbtest.py", line 2569, in expect
self.fail(log_msg)
AssertionError: Ran command:
"expression some_template_func<int, long>(5)"
Got output:
note: Ran expression as 'C++14'.
error: <user expression 0>:1:1: use of undeclared identifier 'some_template_func'
1 | some_template_func<int, long>(5)
| ^~~~~~~~~~~~~~~~~~
Expecting sub string: "does not name a template but is followed by template arguments" (was not found)
Config=aarch64-C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\build\bin\clang.exe
----------------------------------------------------------------------
Ran 3 tests in 0.601s
FAILED (failures=1, skipped=2)
```
Commit: 9976e5702f05a4019123ee1ad2bb9a8b69ca7dcb
https://github.com/llvm/llvm-project/commit/9976e5702f05a4019123ee1ad2bb9a8b69ca7dcb
Author: Demetrius Kanios <demetrius at kanios.net>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/CMakeLists.txt
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyCallLowering.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyCallLowering.h
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyInstructionSelector.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.h
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyPostLegalizerCombiner.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyPreLegalizerCombiner.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyRegisterBankInfo.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyRegisterBankInfo.h
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssembly.td
A llvm/lib/Target/WebAssembly/WebAssemblyCombine.td
A llvm/lib/Target/WebAssembly/WebAssemblyGISel.td
A llvm/lib/Target/WebAssembly/WebAssemblyRegisterBanks.td
M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
A llvm/test/CodeGen/WebAssembly/GlobalISel/gisel-commandline-option.ll
Log Message:
-----------
[WebAssembly][GlobalISel] Part 1 - Setup skeleton (#178796)
This PR is the first step towards bringing GlobalISel to the Wasm
backend.
Split from #157161
Commit: 09b70ddd3a66de655854fab78cf36dbd37a54655
https://github.com/llvm/llvm-project/commit/09b70ddd3a66de655854fab78cf36dbd37a54655
Author: Omar Hossam <moar.ahmed at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/test/CIR/CodeGenBuiltins/X86/keylocker.c
Log Message:
-----------
[CIR] Support x86 encodeKey builtins (#179308)
This PR implements CodeGen for encodeKey builtins in CIR upstream.
Issue https://github.com/llvm/llvm-project/issues/167765
Commit: bfe80fb3bbaa64c3473f03d7af18e481cb9f7b5c
https://github.com/llvm/llvm-project/commit/bfe80fb3bbaa64c3473f03d7af18e481cb9f7b5c
Author: Vladimir Vereschaka <vvereschaka at accesssoftek.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
A clang/cmake/caches/cross-linux-toolchain.cmake
Log Message:
-----------
[CMake] Add multi-target cross to ARM/AArch64 Linux toolchain CMake cache file. (#179598)
This cache file can be used to build a multi-target cross Windows/Linux
to ARM/Aarch64/etc. Linux toolchain.
[Replacement for CrossWinToARMLinux.cmake on the buildbot]
Commit: 6bdb7b0f000cd6c09e272844700be399f2a1b5b3
https://github.com/llvm/llvm-project/commit/6bdb7b0f000cd6c09e272844700be399f2a1b5b3
Author: jimingham <jingham at apple.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/include/lldb/Target/Process.h
M lldb/source/Target/Process.cpp
Log Message:
-----------
Cleanup the use of m_is_secondary_thread from PR #179799. (#180255)
This ivar was passed to the thread function for the private state thread
- mostly because the equivalent variable was passed in in the original
version of the code. But it was never used, so I didn't notice that the
ivar equivalent wasn't being initialized. I'm going to keep the ivar
because it will be useful when debugging to easily see whether you are
on the main or secondary private state thread.
So in this change, I set m_is_secondary_thread properly in the
constructor, but remove passing it to the thread function since it
wasn't needed there.
Commit: eff21afae01f4a8269a4beb6a7907d2abe6ad82a
https://github.com/llvm/llvm-project/commit/eff21afae01f4a8269a4beb6a7907d2abe6ad82a
Author: Henrik G. Olsson <hnrklssn at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
R llvm/include/llvm/TargetParser/AVRTargetParser.h
M llvm/include/llvm/TargetParser/Triple.h
R llvm/lib/TargetParser/AVRTargetParser.cpp
M llvm/lib/TargetParser/CMakeLists.txt
R llvm/test/tools/llvm-objdump/ELF/AVR/lit.local.cfg
R llvm/test/tools/llvm-objdump/ELF/AVR/mattr.test
M llvm/tools/llvm-objdump/llvm-objdump.cpp
Log Message:
-----------
Revert "[llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling" (#180252)
Reverts llvm/llvm-project#174731 due to introducing a cyclic dependency
when building LLVM with modules enabled: LLVM_Utils -> LLVM_Object ->
LLVM_Utils
Commit: 57d1fbf62cc71b8e1e5e89701d58a7dd47f9229a
https://github.com/llvm/llvm-project/commit/57d1fbf62cc71b8e1e5e89701d58a7dd47f9229a
Author: Vladimir Radosavljevic <129192835+vladimirradosavljevic at users.noreply.github.com>
Date: 2026-02-07 (Sat, 07 Feb 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/and-compare.ll
Log Message:
-----------
[InstCombine] Limit (icmp eq/ne (and (add A, Addend), Msk), C) fold to one use of and (#172858)
If the and has multiple uses, the fold can increase the instruction
count.
Commit: 13d8870d455fafa734d29b1f3703386ef6e3b5f8
https://github.com/llvm/llvm-project/commit/13d8870d455fafa734d29b1f3703386ef6e3b5f8
Author: sstipano <sstipano7 at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/docs/HowToUseInstrMappings.rst
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/MC/MCInstrDesc.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/MCA/InstrBuilder.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.cpp
M llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.h
M llvm/lib/Target/AMDGPU/R600InstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp
M llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
M llvm/lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.h
M llvm/test/TableGen/CPtrWildcard.td
M llvm/test/TableGen/DAGDefaultOps.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-replacerreg.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-imms.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-intrinsics.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-miflags.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-operand-types.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-patfrag-root.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-temp-defs.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-typeof.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-variadics.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
M llvm/test/TableGen/GlobalISelEmitter/ContextlessPredicates.td
M llvm/test/TableGen/GlobalISelEmitter/CustomPredicate.td
M llvm/test/TableGen/GlobalISelEmitter/DefaultOpsGlobalISel.td
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
M llvm/test/TableGen/GlobalISelEmitter/HwModes.td
M llvm/test/TableGen/GlobalISelEmitter/MatchTableOptimizer.td
M llvm/test/TableGen/GlobalISelEmitter/MatchTableOptimizerSameOperand-invalid.td
M llvm/test/TableGen/GlobalISelEmitter/OverloadedPtr.td
M llvm/test/TableGen/GlobalISelEmitter/RegSequence.td
M llvm/test/TableGen/GlobalISelEmitter/Subreg.td
M llvm/test/TableGen/GlobalISelEmitter/Variadic.td
M llvm/test/TableGen/GlobalISelEmitter/atomic-store.td
M llvm/test/TableGen/GlobalISelEmitter/dead-def.td
M llvm/test/TableGen/GlobalISelEmitter/frameindex.td
M llvm/test/TableGen/GlobalISelEmitter/gisel-physreg-input.td
M llvm/test/TableGen/GlobalISelEmitter/immarg-predicated.td
M llvm/test/TableGen/GlobalISelEmitter/immarg.td
M llvm/test/TableGen/GlobalISelEmitter/input-discard.td
M llvm/test/TableGen/GlobalISelEmitter/int64min.td
M llvm/test/TableGen/GlobalISelEmitter/multiple-output-discard.td
M llvm/test/TableGen/GlobalISelEmitter/multiple-output.td
M llvm/test/TableGen/GlobalISelEmitter/nested-subregs.td
M llvm/test/TableGen/GlobalISelEmitter/optional-def.td
M llvm/test/TableGen/GlobalISelEmitter/output-discard.td
M llvm/test/TableGen/GlobalISelEmitter/predicated-pattern-order.td
M llvm/test/TableGen/GlobalISelEmitter/undef-tied-input.td
M llvm/test/TableGen/GlobalISelEmitter/zero-reg.td
M llvm/test/TableGen/HasNoUse.td
M llvm/test/TableGen/RegClassByHwMode.td
M llvm/test/TableGen/dag-isel-instrument.td
M llvm/test/TableGen/dag-isel-regclass-emit-enum.td
M llvm/test/TableGen/dag-isel-res-order.td
M llvm/test/TableGen/get-named-operand-idx.td
M llvm/test/TableGen/multiple-type-casts-patfrags.td
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
M llvm/utils/TableGen/CodeGenMapTable.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
M llvm/utils/TableGen/InstrInfoEmitter.cpp
Log Message:
-----------
[MC][TableGen] Expand Opcode field of MCInstrDesc (#179652)
Increase width of Opcode to `int` from `short` to allow more capacity.
Commit: 85d94e17144f2ca250c91b827b59e6ddea675d31
https://github.com/llvm/llvm-project/commit/85d94e17144f2ca250c91b827b59e6ddea675d31
Author: jimingham <jingham at apple.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M lldb/source/Plugins/Process/Utility/StopInfoMachException.h
A lldb/test/API/macosx/stop-reason-exception/Makefile
A lldb/test/API/macosx/stop-reason-exception/TestMachExceptionData.py
A lldb/test/API/macosx/stop-reason-exception/main.c
Log Message:
-----------
Make StopInfoMachException return the right data. (#180088)
When I changed lldb so that the StopInfo's compute their own stop reason
data (before it was oddly done in SBThread::GetStopReasonData...) I
didn't notice that StopInfoMachException was relying on that routine's
default of returning the Value as the 0th exception data, and didn't
actually return its own data.
This fixes that, and makes us report the exception type, and the code
and subcode if the exception has them. I also added a test for this.
rdar://169755672
Commit: 4a94cddad253d7577f6ae2f53086e01af13b3bf2
https://github.com/llvm/llvm-project/commit/4a94cddad253d7577f6ae2f53086e01af13b3bf2
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel][WebAssembly][GlobalISel] Port 9976e5702f05a4019123ee1ad2bb9a8b69ca7dcb (#180270)
Co-authored-by: Pranav Kant <prka at google.com>
Commit: c0c42c4e3964f146fa5acd581b7d253af1157a27
https://github.com/llvm/llvm-project/commit/c0c42c4e3964f146fa5acd581b7d253af1157a27
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
Revert "Fix Bazel build for d005cb2" (#180271)
Reverts #180134, as the change it fixes was itself reverted in #180252
Commit: 734eb9540299fa519da2eb7015ffa09718ba48d2
https://github.com/llvm/llvm-project/commit/734eb9540299fa519da2eb7015ffa09718ba48d2
Author: Petr Vesely <veselypeta at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
A llvm/test/TableGen/DecoderEmitter/large-islands.td
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[Tablegen] Don't emit decoder tables with islands larger than 64 bits (#179651)
I have a downstream target which has 128-bit instructions where some
instructions can have large sections of encoding to be determined ahead
of time. This results in the island calculations for decoder tables to
emit checks over 64-bits.
This change will emit multiple separate checks when the island exceeds
64-bits.
Commit: 019ecdf7bbfd430cd9f2a61d1139f677621c9c31
https://github.com/llvm/llvm-project/commit/019ecdf7bbfd430cd9f2a61d1139f677621c9c31
Author: Tony Tao <tony.le.tao at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
A llvm/test/CodeGen/SystemZ/zos-alias-unsupported.ll
A llvm/test/CodeGen/SystemZ/zos-func-alias.ll
Log Message:
-----------
[SystemZ][GOFF] Implement emitGlobalAlias for GOFF/HLASM (#180041)
HLASM has a requirement where aliasing labels need to be emitted at the
same time as the aliasee label, similar to AIX. I used their
implementation for reference with some modifications as we can only
alias functions and we must emit all symbol attributes before the label
is emitted to ensure the XATTR instruction contains the correct
attributes.
---------
Co-authored-by: Tony Tao <tonytao at ca.ibm.com>
Commit: ef22f0bfb6a63b4eaf9ff95ba09240c7d6b15a79
https://github.com/llvm/llvm-project/commit/ef22f0bfb6a63b4eaf9ff95ba09240c7d6b15a79
Author: Nico Weber <thakis at chromium.org>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/BUILD.gn
Log Message:
-----------
[gn] port 9976e5702f05a40 (WebAssembly GISel)
Commit: 507c92ac08bad62d8ffa283d01ef93a65b90328c
https://github.com/llvm/llvm-project/commit/507c92ac08bad62d8ffa283d01ef93a65b90328c
Author: Nhat Nguyen <nhat7203 at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/CodeGenCXX/reflection-mangle-itanium.cpp
M clang/test/CodeGenCXX/reflection-mangle-ms.cpp
Log Message:
-----------
[clang]: immediate address of build issue (#180236)
Fixed the build issue happen
[here](https://github.com/llvm/llvm-project/pull/164692)
Issue here is this [function
](https://github.com/llvm/llvm-project/blob/main/clang/lib/Sema/TreeTransform.h#L13057-L13061)
doesn't return a type
Commit: 5c72240617e238d8c75c9cc975dc8a31e36e6fc8
https://github.com/llvm/llvm-project/commit/5c72240617e238d8c75c9cc975dc8a31e36e6fc8
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
A llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.wave.shuffle.ll
Log Message:
-----------
[AMDGPU] Add DPP16 Row Share optimization for llvm.amdgcn.wave.shuffle (#177470)
Adds logic to detect cases where the llvm.amdgcn.wave.shuffle intrinsic
is being applied to an index operand that would make the result
equivalent to the various Row Share flavors of DPP16 operations, and
replaces the intrinsic and the instructions computing the index with an
equivalent llvm.amdgcn.update.dpp call.
Commit: 52eb82e4f942db5e639c018c7757a1cca670333f
https://github.com/llvm/llvm-project/commit/52eb82e4f942db5e639c018c7757a1cca670333f
Author: Derek Schuff <dschuff at chromium.org>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-objcopy.rst
M llvm/docs/CommandGuide/llvm-strip.rst
M llvm/lib/ObjCopy/wasm/WasmObjcopy.cpp
M llvm/test/tools/llvm-objcopy/wasm/basic-strip.test
M llvm/test/tools/llvm-objcopy/wasm/strip-all.test
M llvm/tools/llvm-objcopy/CommonOpts.td
Log Message:
-----------
[objcopy][Wasm] Make strip-all remove all non-engine-interpreted sections (#180246)
Currently the default strip-all behavior is to remove sections known
to LLVM but leave others. Now that the standard specifies the section
name
"metadata.code.*" as used for compiler annotations interpreted by Wasm
engines, we can more confidently give strip its more conventional
behavior
of removing everything that won't be used by the engine.
Commit: 4919e0da50d41edb36670f1f1ce33d80703d7ac9
https://github.com/llvm/llvm-project/commit/4919e0da50d41edb36670f1f1ce33d80703d7ac9
Author: Demetrius Kanios <demetrius at kanios.net>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/test/CodeGen/WebAssembly/offset-fastisel.ll
M llvm/test/CodeGen/WebAssembly/signext-arg.ll
M llvm/test/CodeGen/WebAssembly/signext-inreg.ll
Log Message:
-----------
[WebAssembly][FastISel] Make use of `sign-ext` proposals instructions when available (#179855)
Enables FastISel to use the dedicated sign-extension instructions
(rather than shl, shr) when available.
Commit: 370764c8cb69e2272c7465d854f8291aa2776f53
https://github.com/llvm/llvm-project/commit/370764c8cb69e2272c7465d854f8291aa2776f53
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rv32p.ll
Log Message:
-----------
[RISCV] Use addd/subd for i64 add/sub for RV32+P. (#180129)
Add RISCVISD opcodes and custom type legalize to them.
Commit: a4c8e7537cc5288a25de948d266e56d0bffa6a64
https://github.com/llvm/llvm-project/commit/a4c8e7537cc5288a25de948d266e56d0bffa6a64
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M compiler-rt/lib/asan/asan_flags.cpp
Log Message:
-----------
[asan][AIX] Change #ifdef to #if for AIX guard (#180280)
When `SANITIZER_AIX` is introduced in #131866, it will always be defined
to either 0 or 1, so this guard should use `#if`.
Commit: b5b453d0dfb013de0275ae5bf704df943759e627
https://github.com/llvm/llvm-project/commit/b5b453d0dfb013de0275ae5bf704df943759e627
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
Log Message:
-----------
[NFC] [FlowSensitive] [StatusOr] add more tests for gtest macros
Reviewers: jvoung
Pull Request: https://github.com/llvm/llvm-project/pull/180072
Commit: bf4f5d2194b68c82b8e097f8f675556d76eef39a
https://github.com/llvm/llvm-project/commit/bf4f5d2194b68c82b8e097f8f675556d76eef39a
Author: Mikhail Gudim <mgudim at qti.qualcomm.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M llvm/test/CodeGen/X86/cfi-epilogue-with-return.mir
M llvm/test/CodeGen/X86/cfi-epilogue-without-return.mir
M llvm/test/CodeGen/X86/cfi-inserter-callee-save-register-2.mir
M llvm/test/CodeGen/X86/cfi-inserter-callee-save-register.mir
A llvm/test/CodeGen/X86/cfi-xmm-asm.ll
M llvm/test/CodeGen/X86/cfi-xmm.ll
Log Message:
-----------
[X86][test] Auto-generate test checks for some cfi tests. NFC (#177248)
Commit: 29d374bf90de1cd28af5587724f7ba19b225b92e
https://github.com/llvm/llvm-project/commit/29d374bf90de1cd28af5587724f7ba19b225b92e
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
Log Message:
-----------
[NFC] [FlowSensitive] [StatusOr] Add tests for StatusOr ctors
Reviewers: jvoung
Reviewed By: jvoung
Pull Request: https://github.com/llvm/llvm-project/pull/180076
Commit: 233976c36488a66f0c505934a7bc5cb46d98c05e
https://github.com/llvm/llvm-project/commit/233976c36488a66f0c505934a7bc5cb46d98c05e
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
Log Message:
-----------
[NFC] [FlowSensitive] [StatusOr] Add test for more complicated Status logic
Reviewers: jvoung
Reviewed By: jvoung
Pull Request: https://github.com/llvm/llvm-project/pull/180075
Commit: 21fb35bf0bfa3c935a00898b54719e1f9a332f52
https://github.com/llvm/llvm-project/commit/21fb35bf0bfa3c935a00898b54719e1f9a332f52
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
Log Message:
-----------
[NFC] [FlowSensitive] [StatusOr] Add test for move assignment
Reviewers: jvoung
Reviewed By: jvoung
Pull Request: https://github.com/llvm/llvm-project/pull/180080
Commit: eb03e2e4bd51d6f8d38a0ab5fa141dcc4e00e043
https://github.com/llvm/llvm-project/commit/eb03e2e4bd51d6f8d38a0ab5fa141dcc4e00e043
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libcxx-run-benchmarks.yml
M .gitignore
M clang-tools-extra/clang-apply-replacements/tool/ClangApplyReplacementsMain.cpp
M clang-tools-extra/clangd/Protocol.cpp
M clang-tools-extra/clangd/test/call-hierarchy.test
A clang/cmake/caches/cross-linux-toolchain.cmake
A clang/docs/ClangIRCleanupAndEHDesign.md
M clang/docs/ReleaseNotes.rst
M clang/docs/index.rst
M clang/include/clang/AST/ComputeDependence.h
M clang/include/clang/AST/DeclObjCCommon.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeAnnotations.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/OffloadArch.h
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/Options/Options.td
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CoreEngine.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ComputeDependence.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprClassification.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/Dataflow.h
M clang/lib/Analysis/LifetimeSafety/Facts.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
M clang/lib/Analysis/LifetimeSafety/LoanPropagation.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/OffloadArch.cpp
M clang/lib/Basic/OperatorPrecedence.cpp
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenConstantEmitter.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
M clang/lib/CIR/CodeGen/TargetInfo.cpp
M clang/lib/CIR/CodeGen/TargetInfo.h
M clang/lib/CIR/Lowering/DirectToLLVM/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/TargetInfo.cpp
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Parse/CMakeLists.txt
M clang/lib/Parse/ParseExpr.cpp
A clang/lib/Parse/ParseReflect.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaObjCProperty.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/test/AST/ByteCode/records.cpp
A clang/test/AST/HLSL/matrix-elementexpr-tree-transform.hlsl
A clang/test/AST/HLSL/matrix-member-access-scalar.hlsl
A clang/test/AST/HLSL/matrix-member-access-swizzle-ast-dump-json.hlsl
A clang/test/AST/HLSL/matrix-member-access-swizzle-ast-print.hlsl
A clang/test/AST/HLSL/matrix-member-access-swizzle.hlsl
A clang/test/AST/HLSL/pch_with_matrix_element_accessor.hlsl
A clang/test/CIR/CodeGen/default-func-attrs-cmd-line.cpp
M clang/test/CIR/CodeGen/new.cpp
A clang/test/CIR/CodeGen/no-builtin-attr-automatic.cpp
A clang/test/CIR/CodeGen/offload-convergent-attr.cu
A clang/test/CIR/CodeGen/optsize-func-attr.cpp
A clang/test/CIR/CodeGen/save-reg-params-func-attr.cpp
A clang/test/CIR/CodeGen/trap-func-name-attr.cpp
A clang/test/CIR/CodeGen/zero-call-used-regs-func-attr.cpp
M clang/test/CIR/CodeGenBuiltins/X86/avx512-reduceIntrin.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512-reduceMinMaxIntrin.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512fp16-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512vlbf16-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512vlfp16-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/keylocker.c
A clang/test/CIR/CodeGenHLSL/matrix-element-expr-load.hlsl
M clang/test/CIR/CodeGenOpenMP/not-yet-implemented.c
A clang/test/CIR/CodeGenOpenMP/omp-llvmir.c
M clang/test/CIR/CodeGenOpenMP/parallel.c
M clang/test/CodeGen/builtins-nvptx-ptx60.cu
M clang/test/CodeGen/builtins-nvptx.c
A clang/test/CodeGen/compound-assign-atomic-bool.c
M clang/test/CodeGen/nvptx_attributes.c
M clang/test/CodeGenCUDA/convergent.cu
A clang/test/CodeGenCXX/reflection-mangle-itanium.cpp
A clang/test/CodeGenCXX/reflection-mangle-ms.cpp
M clang/test/CodeGenHLSL/builtins/distance.hlsl
M clang/test/CodeGenHLSL/builtins/length.hlsl
M clang/test/CodeGenHLSL/builtins/max-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/min-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/pow-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/reflect.hlsl
M clang/test/CodeGenHLSL/builtins/refract.hlsl
M clang/test/CodeGenHLSL/builtins/smoothstep.hlsl
A clang/test/CodeGenHLSL/matrix-member-one-based-accessor-scalar-load.hlsl
A clang/test/CodeGenHLSL/matrix-member-one-based-accessor-scalar-store.hlsl
A clang/test/CodeGenHLSL/matrix-member-one-based-swizzle-load.hlsl
A clang/test/CodeGenHLSL/matrix-member-one-based-swizzle-store.hlsl
A clang/test/CodeGenHLSL/matrix-member-zero-based-accessor-scalar-load.hlsl
A clang/test/CodeGenHLSL/matrix-member-zero-based-accessor-scalar-store.hlsl
A clang/test/CodeGenHLSL/matrix-member-zero-based-swizzle-load.hlsl
A clang/test/CodeGenHLSL/matrix-member-zero-based-swizzle-store.hlsl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Driver/amdgpu-mcpu.cl
A clang/test/Driver/openmp-target-fast-flag.c
A clang/test/Driver/reflection-requires-cxx26.cpp
M clang/test/ExtractAPI/objc_property.m
M clang/test/Headers/__clang_hip_cmath.hip
M clang/test/Headers/__clang_hip_math.hip
M clang/test/Headers/gpuintrin.c
M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
A clang/test/Modules/single-module-parse-mode-compiles.m
M clang/test/PCH/reloc.c
A clang/test/Parser/parsing-reflection-with-blocks.cpp
A clang/test/Parser/parsing-reflection.cpp
M clang/test/Sema/Inputs/lifetime-analysis.h
A clang/test/Sema/warn-lifetime-safety-invalidations.cpp
A clang/test/SemaHLSL/matrix-member-access-errors.hlsl
M clang/tools/cir-opt/cir-opt.cpp
M clang/tools/cir-translate/cir-translate.cpp
M clang/tools/libclang/CXCursor.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
M clang/utils/TableGen/CIRLoweringEmitter.cpp
M compiler-rt/lib/asan/asan_flags.cpp
M compiler-rt/test/ubsan/TestCases/Misc/Posix/static-link.cpp
M flang-rt/CMakeLists.txt
M flang-rt/lib/runtime/descriptor-io.cpp
M flang-rt/lib/runtime/extensions.cpp
M flang-rt/lib/runtime/external-unit.cpp
M flang-rt/lib/runtime/io-api.cpp
M flang-rt/lib/runtime/io-stmt.cpp
M flang-rt/lib/runtime/pseudo-unit.cpp
M flang-rt/lib/runtime/unit.h
M flang/docs/Extensions.md
M flang/include/flang/Evaluate/check-expression.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Semantics/expression.h
M flang/include/flang/Semantics/semantics.h
M flang/include/flang/Semantics/tools.h
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-coarray.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/semantics.cpp
M flang/lib/Semantics/tools.cpp
M flang/test/Analysis/AliasAnalysis/alias-analysis-cray-pointers.fir
M flang/test/Analysis/AliasAnalysis/load-ptr-designate.fir
M flang/test/Analysis/AliasAnalysis/ptr-component.fir
M flang/test/Lower/OpenMP/target_cpu_features.f90
M flang/test/Semantics/bug1214.cuf
A flang/test/Semantics/bug179580.f90
A flang/test/Semantics/bug2131b.cuf
A flang/test/Semantics/bug2174.f90
M flang/test/Transforms/licm.fir
M libc/docs/dev/printf_behavior.rst
M libc/docs/dev/undefined_behavior.rst
M libc/shared/math.h
A libc/shared/math/f16fmaf.h
M libc/src/__support/fixed_point/fx_bits.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/f16fmaf.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/f16fmaf.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M libclc/CMakeLists.txt
M libcxx/include/__algorithm/unwrap_range.h
M libcxx/include/__vector/vector.h
M libsycl/docs/index.rst
A libsycl/include/sycl/__impl/aspect.hpp
A libsycl/include/sycl/__impl/device.hpp
A libsycl/include/sycl/__impl/device_selector.hpp
A libsycl/include/sycl/__impl/info/device.hpp
A libsycl/include/sycl/__impl/info/device_type.hpp
M libsycl/include/sycl/__impl/platform.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/CMakeLists.txt
A libsycl/src/detail/device_impl.cpp
A libsycl/src/detail/device_impl.hpp
M libsycl/src/detail/global_objects.cpp
M libsycl/src/detail/offload/offload_topology.cpp
M libsycl/src/detail/offload/offload_topology.hpp
M libsycl/src/detail/offload/offload_utils.cpp
M libsycl/src/detail/offload/offload_utils.hpp
M libsycl/src/detail/platform_impl.cpp
M libsycl/src/detail/platform_impl.hpp
A libsycl/src/device.cpp
A libsycl/src/device_selector.cpp
M libsycl/src/platform.cpp
M libsycl/tools/sycl-ls/sycl-ls.cpp
M lld/include/lld/Common/BPSectionOrdererBase.inc
A lld/test/ELF/eh-frame-fde-encoding.s
A lld/test/ELF/eh-frame-invalid-cie.s
A lld/test/ELF/eh-frame-invalid-fde-encoding.s
R lld/test/ELF/eh-frame-value-format1.s
R lld/test/ELF/eh-frame-value-format2.s
R lld/test/ELF/eh-frame-value-format3.s
R lld/test/ELF/eh-frame-value-format4.s
R lld/test/ELF/eh-frame-value-format5.s
R lld/test/ELF/eh-frame-value-format6.s
R lld/test/ELF/eh-frame-value-format7.s
R lld/test/ELF/eh-frame-value-format8.s
R lld/test/ELF/eh-frame-value-format9.s
R lld/test/ELF/invalid-eh-frame.s
R lld/test/ELF/invalid-eh-frame2.s
R lld/test/ELF/invalid-eh-frame3.s
R lld/test/ELF/invalid-eh-frame4.s
R lld/test/ELF/invalid-eh-frame5.s
R lld/test/ELF/invalid-eh-frame6.s
R lld/test/ELF/invalid-eh-frame7.s
R lld/test/ELF/invalid-eh-frame8.s
R lld/test/ELF/invalid-eh-frame9.s
M lldb/include/lldb/Core/ModuleList.h
M lldb/include/lldb/Host/HostInfoBase.h
M lldb/include/lldb/Host/HostThread.h
M lldb/include/lldb/Host/JSONTransport.h
M lldb/include/lldb/Protocol/MCP/Server.h
M lldb/include/lldb/Protocol/MCP/Transport.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Utility/DataExtractor.h
M lldb/include/lldb/Utility/VirtualDataExtractor.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/source/API/SBModule.cpp
M lldb/source/Core/CoreProperties.td
M lldb/source/Core/DynamicLoader.cpp
M lldb/source/Core/ModuleList.cpp
M lldb/source/Core/Statusline.cpp
M lldb/source/Host/common/HostThread.cpp
M lldb/source/Host/macosx/objcxx/CMakeLists.txt
M lldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm
M lldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.cpp
M lldb/source/Plugins/DynamicLoader/FreeBSD-Kernel/DynamicLoaderFreeBSDKernel.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
M lldb/source/Plugins/DynamicLoader/wasm-DYLD/DynamicLoaderWasmDYLD.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.h
M lldb/source/Plugins/JITLoader/GDB/JITLoaderGDB.cpp
M lldb/source/Plugins/ObjectContainer/BSD-Archive/ObjectContainerBSDArchive.cpp
M lldb/source/Plugins/ObjectContainer/Mach-O-Fileset/ObjectContainerMachOFileset.cpp
M lldb/source/Plugins/ObjectContainer/Universal-Mach-O/ObjectContainerUniversalMachO.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
M lldb/source/Plugins/Platform/FreeBSD/PlatformFreeBSD.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinDevice.cpp
M lldb/source/Plugins/Process/FreeBSD/NativeRegisterContextFreeBSD_arm64.cpp
M lldb/source/Plugins/Process/FreeBSD/NativeRegisterContextFreeBSD_arm64.h
M lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
M lldb/source/Plugins/Process/Utility/CMakeLists.txt
R lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.cpp
R lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h
M lldb/source/Plugins/Process/Utility/StopInfoMachException.h
R lldb/source/Plugins/Process/Utility/lldb-mips-freebsd-register-enums.h
M lldb/source/Plugins/Process/elf-core/CMakeLists.txt
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
R lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_mips64.cpp
R lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_mips64.h
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.cpp
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.h
M lldb/source/Plugins/SymbolLocator/DebugSymbols/SymbolLocatorDebugSymbols.cpp
M lldb/source/Protocol/MCP/Server.cpp
M lldb/source/Protocol/MCP/Transport.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/ProcessTrace.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Utility/VirtualDataExtractor.cpp
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/was_hit/TestWasHit.py
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/was_hit/bkpt_resolver.py
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/was_hit/main.c
M lldb/test/API/functionalities/scripted_frame_provider/TestScriptedFrameProvider.py
A lldb/test/API/lang/cpp/template-diagnostic-hint/Makefile
A lldb/test/API/lang/cpp/template-diagnostic-hint/TestTemplateDiagnosticHint.py
A lldb/test/API/lang/cpp/template-diagnostic-hint/main.cpp
A lldb/test/API/macosx/stop-reason-exception/Makefile
A lldb/test/API/macosx/stop-reason-exception/TestMachExceptionData.py
A lldb/test/API/macosx/stop-reason-exception/main.c
M lldb/test/API/python_api/process/cancel_attach/TestCancelAttach.py
A lldb/test/API/tools/lldb-dap/launch/io/DAP_launch_io.py
R lldb/test/API/tools/lldb-dap/launch/io/TestDAP_launch_io.py
A lldb/test/API/tools/lldb-dap/launch/io/TestDAP_launch_io_integratedTerminal.py
A lldb/test/API/tools/lldb-dap/launch/io/TestDAP_launch_io_internalConsole.py
M lldb/test/API/tools/lldb-dap/runInTerminal/TestDAP_runInTerminal.py
M lldb/test/Shell/helper/toolchain.py
M lldb/tools/driver/Options.td
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/DisassembleRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/EvaluateRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/NextRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ReadMemoryRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StackTraceRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StepInRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StepInTargetsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StepOutRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/WriteMemoryRequestHandler.cpp
M lldb/tools/lldb-dap/Transport.cpp
M lldb/tools/lldb-dap/Transport.h
M lldb/tools/lldb-dap/tool/lldb-dap.cpp
M lldb/unittests/DAP/TestBase.cpp
M lldb/unittests/DAP/TestBase.h
M lldb/unittests/Host/JSONTransportTest.cpp
M lldb/unittests/ObjectFile/MachO/CMakeLists.txt
M lldb/unittests/ObjectFile/MachO/TestObjectFileMachO.cpp
M lldb/unittests/Process/Utility/RegisterContextFreeBSDTest.cpp
M lldb/unittests/Protocol/ProtocolMCPServerTest.cpp
M lldb/unittests/TestingSupport/Host/JSONTransportTestUtilities.h
M lldb/unittests/Utility/VirtualDataExtractorTest.cpp
M llvm/cmake/modules/TableGen.cmake
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CodingStandards.rst
M llvm/docs/CommandGuide/llvm-objcopy.rst
M llvm/docs/CommandGuide/llvm-readelf.rst
M llvm/docs/CommandGuide/llvm-readobj.rst
M llvm/docs/CommandGuide/llvm-strip.rst
M llvm/docs/HowToUseInstrMappings.rst
M llvm/docs/LangRef.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/ADT/ScopeExit.h
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/IR/DebugInfo.h
M llvm/include/llvm/MC/MCInstrDesc.h
M llvm/include/llvm/MC/MCSubtargetInfo.h
M llvm/include/llvm/Target/GlobalISel/Target.td
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/include/llvm/TargetParser/TargetParser.h
M llvm/include/llvm/Transforms/Utils/VNCoercion.h
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/ModuleDebugInfoPrinter.cpp
M llvm/lib/Analysis/StaticDataProfileInfo.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/ExpandIRInsts.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
M llvm/lib/CodeGen/GlobalMergeFunctions.cpp
M llvm/lib/CodeGen/InsertCodePrefetch.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/Dominators.cpp
M llvm/lib/IR/SafepointIRVerifier.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/MC/MCSubtargetInfo.cpp
M llvm/lib/MC/MCWasmStreamer.cpp
M llvm/lib/MCA/InstrBuilder.cpp
M llvm/lib/ObjCopy/wasm/WasmObjcopy.cpp
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/Object/OffloadBinary.cpp
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPrepareAGPRAlloc.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
M llvm/lib/Target/AMDGPU/AMDGPUUniformIntrinsicCombine.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
M llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.cpp
M llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.cpp
M llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/R600InstrInfo.h
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIFixVGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
M llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
M llvm/lib/Target/AMDGPU/SIPostRABundler.cpp
M llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMInstrNEON.td
M llvm/lib/Target/Hexagon/CMakeLists.txt
A llvm/lib/Target/Hexagon/HexagonGlobalRegion.cpp
A llvm/lib/Target/Hexagon/HexagonGlobalRegion.h
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/NVPTX/NVPTX.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXSubtarget.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp
M llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
M llvm/lib/Target/WebAssembly/CMakeLists.txt
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyCallLowering.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyCallLowering.h
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyInstructionSelector.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.h
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyPostLegalizerCombiner.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyPreLegalizerCombiner.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyRegisterBankInfo.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyRegisterBankInfo.h
M llvm/lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.h
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssembly.td
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
A llvm/lib/Target/WebAssembly/WebAssemblyCombine.td
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
A llvm/lib/Target/WebAssembly/WebAssemblyGISel.td
A llvm/lib/Target/WebAssembly/WebAssemblyRegisterBanks.td
M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/X86/CMakeLists.txt
M llvm/lib/Target/X86/X86.h
A llvm/lib/Target/X86/X86CleanupLocalDynamicTLS.cpp
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86IndirectBranchTracking.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86PassRegistry.def
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/TargetParser/RISCVTargetParser.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Utils/VNCoercion.cpp
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Analysis/CostModel/AArch64/bswap.ll
M llvm/test/CodeGen/AArch64/GlobalISel/inline-asm.ll
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-dynamic-alloca-scalable.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
A llvm/test/CodeGen/AArch64/cgdata-merge-preserve-entry-count.ll
M llvm/test/CodeGen/AArch64/fcvt_combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f64.ll
M llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/agpr-spill-copy.mir
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pown.ll
M llvm/test/CodeGen/AMDGPU/av-spill-expansion-with-machine-cp.mir
M llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
M llvm/test/CodeGen/AMDGPU/bug-undef-spilled-agpr.mir
M llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
M llvm/test/CodeGen/AMDGPU/fpext-free.ll
M llvm/test/CodeGen/AMDGPU/frame-index.mir
M llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/kernel-mubuf-with-voffset.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-buffer-atomics.ll
A llvm/test/CodeGen/AMDGPU/memory-legalizer-non-volatile.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain-preserve.mir
M llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain.mir
M llvm/test/CodeGen/AMDGPU/pei-build-av-spill.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill-offset-overflow-gfx950.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill.mir
M llvm/test/CodeGen/AMDGPU/pei-reg-scavenger-position.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/pei-vgpr-block-spill-csr.mir
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.mir
M llvm/test/CodeGen/AMDGPU/regalloc-introduces-copy-sgpr-to-agpr.mir
M llvm/test/CodeGen/AMDGPU/same-slot-agpr-sgpr.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-vmem-large-frame.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr-partially-undef.mir
M llvm/test/CodeGen/AMDGPU/spill-agpr.mir
M llvm/test/CodeGen/AMDGPU/spill-reg-tuple-super-reg-use.mir
M llvm/test/CodeGen/AMDGPU/spill-restore-partial-copy.mir
M llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir
M llvm/test/CodeGen/AMDGPU/spill-to-agpr-partial.mir
M llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir
M llvm/test/CodeGen/AMDGPU/spillv16.ll
M llvm/test/CodeGen/AMDGPU/spillv16.mir
M llvm/test/CodeGen/AMDGPU/tied-op-for-wwm-scratch-reg-spill-restore.mir
M llvm/test/CodeGen/AMDGPU/vector-spill-restore-to-other-vector-type.mir
M llvm/test/CodeGen/AMDGPU/vgpr-spill-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/vgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/wait-xcnt-atomic-rmw-optimization.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-functions-pei.mir
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/ARM/intrinsics-crypto.ll
A llvm/test/CodeGen/LoongArch/lasx/vxi1-masks.ll
A llvm/test/CodeGen/MIR/Mips/mips32r6-copyPhysReg-fcmp-f64-to-gpr.mir
M llvm/test/CodeGen/NVPTX/clusterlaunchcontrol-multicast.ll
M llvm/test/CodeGen/NVPTX/convert-sm100a.ll
M llvm/test/CodeGen/NVPTX/convert-sm103a.ll
M llvm/test/CodeGen/NVPTX/f32-ex2.ll
M llvm/test/CodeGen/NVPTX/fexp2.ll
M llvm/test/CodeGen/NVPTX/flog2.ll
M llvm/test/CodeGen/NVPTX/fma-relu-contract.ll
M llvm/test/CodeGen/NVPTX/i128.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-arch-O0.ll
R llvm/test/CodeGen/NVPTX/ptx-version-validation.ll
M llvm/test/CodeGen/NVPTX/rsqrt.ll
M llvm/test/CodeGen/NVPTX/sm-version.ll
M llvm/test/CodeGen/NVPTX/surf-tex.py
A llvm/test/CodeGen/NVPTX/wmma-ptx86-sm120a.py
M llvm/test/CodeGen/PowerPC/aix-ifunc-toc-restore-query-neg.ll
A llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/alloca.ll
R llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/fallback.ll
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
A llvm/test/CodeGen/SystemZ/zos-alias-unsupported.ll
A llvm/test/CodeGen/SystemZ/zos-func-alias.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/gisel-commandline-option.ll
A llvm/test/CodeGen/WebAssembly/common-error.ll
M llvm/test/CodeGen/WebAssembly/offset-fastisel.ll
M llvm/test/CodeGen/WebAssembly/signext-arg.ll
M llvm/test/CodeGen/WebAssembly/signext-inreg.ll
M llvm/test/CodeGen/X86/bitcast-vector-bool.ll
M llvm/test/CodeGen/X86/cfi-epilogue-with-return.mir
M llvm/test/CodeGen/X86/cfi-epilogue-without-return.mir
M llvm/test/CodeGen/X86/cfi-inserter-callee-save-register-2.mir
M llvm/test/CodeGen/X86/cfi-inserter-callee-save-register.mir
A llvm/test/CodeGen/X86/cfi-xmm-asm.ll
M llvm/test/CodeGen/X86/cfi-xmm.ll
M llvm/test/CodeGen/X86/combine-adc.ll
A llvm/test/CodeGen/X86/div_i129_v_pow2k.ll
M llvm/test/CodeGen/X86/expand-large-fp-optnone.ll
M llvm/test/CodeGen/X86/global-variable-partition-with-dap.ll
M llvm/test/CodeGen/X86/known-bits.ll
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
M llvm/test/CodeGen/X86/pr142937.ll
A llvm/test/CodeGen/X86/select-big-integer.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
A llvm/test/DebugInfo/Generic/debuginfofinder-macros.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/aarch64-bf16-dotprod-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/aarch64-matmul.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vcmp.ll
M llvm/test/Instrumentation/MemorySanitizer/switch-icmp.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_sopp.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_sopp.txt
M llvm/test/MC/RISCV/rv32p-invalid.s
M llvm/test/MC/RISCV/rv32p-valid.s
M llvm/test/MC/RISCV/rv64p-valid.s
A llvm/test/MC/WebAssembly/common-error.s
M llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
M llvm/test/TableGen/CPtrWildcard.td
M llvm/test/TableGen/DAGDefaultOps.td
A llvm/test/TableGen/DecoderEmitter/large-islands.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-replacerreg.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-imms.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-intrinsics.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-miflags.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-operand-types.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-patfrag-root.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-temp-defs.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-typeof.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-variadics.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
M llvm/test/TableGen/GlobalISelEmitter/ContextlessPredicates.td
M llvm/test/TableGen/GlobalISelEmitter/CustomPredicate.td
M llvm/test/TableGen/GlobalISelEmitter/DefaultOpsGlobalISel.td
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
M llvm/test/TableGen/GlobalISelEmitter/HwModes.td
M llvm/test/TableGen/GlobalISelEmitter/MatchTableOptimizer.td
M llvm/test/TableGen/GlobalISelEmitter/MatchTableOptimizerSameOperand-invalid.td
M llvm/test/TableGen/GlobalISelEmitter/OverloadedPtr.td
M llvm/test/TableGen/GlobalISelEmitter/RegSequence.td
M llvm/test/TableGen/GlobalISelEmitter/Subreg.td
M llvm/test/TableGen/GlobalISelEmitter/Variadic.td
M llvm/test/TableGen/GlobalISelEmitter/atomic-store.td
M llvm/test/TableGen/GlobalISelEmitter/dead-def.td
M llvm/test/TableGen/GlobalISelEmitter/frameindex.td
M llvm/test/TableGen/GlobalISelEmitter/gisel-physreg-input.td
M llvm/test/TableGen/GlobalISelEmitter/immarg-predicated.td
M llvm/test/TableGen/GlobalISelEmitter/immarg.td
M llvm/test/TableGen/GlobalISelEmitter/input-discard.td
M llvm/test/TableGen/GlobalISelEmitter/int64min.td
M llvm/test/TableGen/GlobalISelEmitter/multiple-output-discard.td
M llvm/test/TableGen/GlobalISelEmitter/multiple-output.td
M llvm/test/TableGen/GlobalISelEmitter/nested-subregs.td
M llvm/test/TableGen/GlobalISelEmitter/optional-def.td
M llvm/test/TableGen/GlobalISelEmitter/output-discard.td
M llvm/test/TableGen/GlobalISelEmitter/predicated-pattern-order.td
M llvm/test/TableGen/GlobalISelEmitter/undef-tied-input.td
M llvm/test/TableGen/GlobalISelEmitter/zero-reg.td
M llvm/test/TableGen/HasNoUse.td
M llvm/test/TableGen/MacroFusion.td
M llvm/test/TableGen/RegClassByHwMode.td
M llvm/test/TableGen/dag-isel-instrument.td
M llvm/test/TableGen/dag-isel-regclass-emit-enum.td
M llvm/test/TableGen/dag-isel-res-order.td
M llvm/test/TableGen/get-named-operand-idx.td
M llvm/test/TableGen/multiple-type-casts-patfrags.td
M llvm/test/TableGen/riscv-target-def.td
M llvm/test/Transforms/ExpandIRInsts/X86/expand-int-convert-small.ll
M llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-si129tofp.ll
M llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-ui129tofp.ll
M llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-optnone.ll
A llvm/test/Transforms/Inline/ret_attr_nofpclass.ll
A llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.wave.shuffle.ll
M llvm/test/Transforms/InstCombine/add-shl-mul-umax.ll
M llvm/test/Transforms/InstCombine/and-compare.ll
M llvm/test/Transforms/InstCombine/cttz.ll
M llvm/test/Transforms/InstCombine/double-float-shrink-1.ll
M llvm/test/Transforms/InstCombine/sqrt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll
M llvm/test/Transforms/LoopVectorize/conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/cse-casts.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags-interleave.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_and.ll
M llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-metadata.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-reductions.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge-vf1.ll
M llvm/test/Transforms/PhaseOrdering/X86/loadcombine.ll
M llvm/test/Transforms/SLPVectorizer/X86/bad-reduction.ll
A llvm/test/Transforms/SLPVectorizer/X86/bswap-reduction-aliased.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
A llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation5.ll
M llvm/test/Transforms/VectorCombine/AArch64/select-shuffle.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-binops.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-cmps.ll
M llvm/test/Transforms/VectorCombine/load-shufflevector.ll
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-bindings.py
M llvm/test/tools/llvm-objcopy/wasm/basic-strip.test
M llvm/test/tools/llvm-objcopy/wasm/strip-all.test
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
M llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
M llvm/tools/llvm-ir2vec/Bindings/PyIR2Vec.cpp
M llvm/tools/llvm-objcopy/CommonOpts.td
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/unittests/Analysis/IVDescriptorsTest.cpp
M llvm/unittests/TargetParser/RISCVTargetParserTest.cpp
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
M llvm/utils/TableGen/Basic/RISCVTargetDefEmitter.cpp
M llvm/utils/TableGen/CodeGenMapTable.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/InstrInfoEmitter.cpp
M llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
M llvm/utils/gn/secondary/clang/lib/Analysis/Scalable/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Parse/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Analysis/Scalable/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Plugins/Process/Utility/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Plugins/Process/elf-core/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/TargetParser/BUILD.gn
M llvm/utils/profcheck-xfail.txt
M mlir/include/mlir-c/Support.h
M mlir/include/mlir/Bindings/Python/NanobindUtils.h
M mlir/include/mlir/CAPI/Support.h
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUTypes.td
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/include/mlir/Dialect/GPU/Pipelines/Passes.h
M mlir/include/mlir/Dialect/GPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/Utils/ReshapeOpsUtils.h
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/Transforms.h
A mlir/include/mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h
M mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h
M mlir/include/mlir/Dialect/XeGPU/uArch/IntelGpuXe2.h
M mlir/include/mlir/Dialect/XeGPU/uArch/uArchBase.h
M mlir/include/mlir/ExecutionEngine/MemRefUtils.h
M mlir/include/mlir/IR/Remarks.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/CAPI/IR/Support.cpp
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUOps.cpp
M mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/CMakeLists.txt
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
A mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPeepHoleOptimizer.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/lib/RegisterAllExtensions.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/python/CMakeLists.txt
A mlir/python/mlir/dialects/X86Vector.td
A mlir/python/mlir/dialects/X86VectorTransformOps.td
A mlir/python/mlir/dialects/transform/x86vector.py
A mlir/python/mlir/dialects/x86vector.py
M mlir/test/Conversion/AMDGPUToROCDL/gfx1250.mlir
M mlir/test/Conversion/ConvertToSPIRV/gpu.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
M mlir/test/Conversion/XeGPUToXeVM/materializecast.mlir
A mlir/test/Conversion/XeVMToLLVM/legalize_large_vector.mlir
M mlir/test/Conversion/XeVMToLLVM/xevm-to-llvm.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
M mlir/test/Dialect/LLVMIR/func.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Dialect/MemRef/canonicalize.mlir
M mlir/test/Dialect/Tensor/invalid.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/Import/instructions.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
A mlir/test/python/dialects/transform_x86vector_ext.py
A mlir/test/python/dialects/x86vector.py
M mlir/unittests/ExecutionEngine/CMakeLists.txt
R mlir/unittests/ExecutionEngine/OwningMemRef.cpp
M offload/libomptarget/DeviceImage.cpp
M offload/plugins-nextgen/common/CMakeLists.txt
M offload/plugins-nextgen/common/include/RPC.h
M offload/plugins-nextgen/common/src/RPC.cpp
M openmp/device/src/LibC.cpp
M openmp/runtime/CMakeLists.txt
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Commit: 178bda4ced5a0c387270e51b2657809f156a7ce6
https://github.com/llvm/llvm-project/commit/178bda4ced5a0c387270e51b2657809f156a7ce6
Author: Florian Mayer <fmayer at google.com>
Date: 2026-02-06 (Fri, 06 Feb 2026)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libcxx-run-benchmarks.yml
M .gitignore
M clang-tools-extra/clang-apply-replacements/tool/ClangApplyReplacementsMain.cpp
M clang-tools-extra/clangd/Protocol.cpp
M clang-tools-extra/clangd/test/call-hierarchy.test
A clang/cmake/caches/cross-linux-toolchain.cmake
A clang/docs/ClangIRCleanupAndEHDesign.md
M clang/docs/ReleaseNotes.rst
M clang/docs/index.rst
M clang/include/clang/AST/ComputeDependence.h
M clang/include/clang/AST/DeclObjCCommon.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/TextNodeDumper.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeAnnotations.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/OffloadArch.h
M clang/include/clang/Basic/StmtNodes.td
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/Options/Options.td
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/CoreEngine.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ComputeDependence.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprClassification.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/Dataflow.h
M clang/lib/Analysis/LifetimeSafety/Facts.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
M clang/lib/Analysis/LifetimeSafety/LoanPropagation.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/OffloadArch.cpp
M clang/lib/Basic/OperatorPrecedence.cpp
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenConstantEmitter.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
M clang/lib/CIR/CodeGen/TargetInfo.cpp
M clang/lib/CIR/CodeGen/TargetInfo.h
M clang/lib/CIR/Lowering/DirectToLLVM/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/lib/CodeGen/CGAtomic.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/TargetInfo.cpp
M clang/lib/CodeGen/TargetInfo.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Parse/CMakeLists.txt
M clang/lib/Parse/ParseExpr.cpp
A clang/lib/Parse/ParseReflect.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/SemaExceptionSpec.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaObjCProperty.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/test/AST/ByteCode/records.cpp
A clang/test/AST/HLSL/matrix-elementexpr-tree-transform.hlsl
A clang/test/AST/HLSL/matrix-member-access-scalar.hlsl
A clang/test/AST/HLSL/matrix-member-access-swizzle-ast-dump-json.hlsl
A clang/test/AST/HLSL/matrix-member-access-swizzle-ast-print.hlsl
A clang/test/AST/HLSL/matrix-member-access-swizzle.hlsl
A clang/test/AST/HLSL/pch_with_matrix_element_accessor.hlsl
A clang/test/CIR/CodeGen/default-func-attrs-cmd-line.cpp
M clang/test/CIR/CodeGen/new.cpp
A clang/test/CIR/CodeGen/no-builtin-attr-automatic.cpp
A clang/test/CIR/CodeGen/offload-convergent-attr.cu
A clang/test/CIR/CodeGen/optsize-func-attr.cpp
A clang/test/CIR/CodeGen/save-reg-params-func-attr.cpp
A clang/test/CIR/CodeGen/trap-func-name-attr.cpp
A clang/test/CIR/CodeGen/zero-call-used-regs-func-attr.cpp
M clang/test/CIR/CodeGenBuiltins/X86/avx512-reduceIntrin.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512-reduceMinMaxIntrin.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512fp16-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512vlbf16-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512vlfp16-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/keylocker.c
A clang/test/CIR/CodeGenHLSL/matrix-element-expr-load.hlsl
M clang/test/CIR/CodeGenOpenMP/not-yet-implemented.c
A clang/test/CIR/CodeGenOpenMP/omp-llvmir.c
M clang/test/CIR/CodeGenOpenMP/parallel.c
M clang/test/CodeGen/builtins-nvptx-ptx60.cu
M clang/test/CodeGen/builtins-nvptx.c
A clang/test/CodeGen/compound-assign-atomic-bool.c
M clang/test/CodeGen/nvptx_attributes.c
M clang/test/CodeGenCUDA/convergent.cu
A clang/test/CodeGenCXX/reflection-mangle-itanium.cpp
A clang/test/CodeGenCXX/reflection-mangle-ms.cpp
M clang/test/CodeGenHLSL/builtins/distance.hlsl
M clang/test/CodeGenHLSL/builtins/length.hlsl
M clang/test/CodeGenHLSL/builtins/max-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/min-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/pow-overloads.hlsl
M clang/test/CodeGenHLSL/builtins/reflect.hlsl
M clang/test/CodeGenHLSL/builtins/refract.hlsl
M clang/test/CodeGenHLSL/builtins/smoothstep.hlsl
A clang/test/CodeGenHLSL/matrix-member-one-based-accessor-scalar-load.hlsl
A clang/test/CodeGenHLSL/matrix-member-one-based-accessor-scalar-store.hlsl
A clang/test/CodeGenHLSL/matrix-member-one-based-swizzle-load.hlsl
A clang/test/CodeGenHLSL/matrix-member-one-based-swizzle-store.hlsl
A clang/test/CodeGenHLSL/matrix-member-zero-based-accessor-scalar-load.hlsl
A clang/test/CodeGenHLSL/matrix-member-zero-based-accessor-scalar-store.hlsl
A clang/test/CodeGenHLSL/matrix-member-zero-based-swizzle-load.hlsl
A clang/test/CodeGenHLSL/matrix-member-zero-based-swizzle-store.hlsl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Driver/amdgpu-mcpu.cl
A clang/test/Driver/openmp-target-fast-flag.c
A clang/test/Driver/reflection-requires-cxx26.cpp
M clang/test/ExtractAPI/objc_property.m
M clang/test/Headers/__clang_hip_cmath.hip
M clang/test/Headers/__clang_hip_math.hip
M clang/test/Headers/gpuintrin.c
M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
A clang/test/Modules/single-module-parse-mode-compiles.m
M clang/test/PCH/reloc.c
A clang/test/Parser/parsing-reflection-with-blocks.cpp
A clang/test/Parser/parsing-reflection.cpp
M clang/test/Sema/Inputs/lifetime-analysis.h
A clang/test/Sema/warn-lifetime-safety-invalidations.cpp
A clang/test/SemaHLSL/matrix-member-access-errors.hlsl
M clang/tools/cir-opt/cir-opt.cpp
M clang/tools/cir-translate/cir-translate.cpp
M clang/tools/libclang/CXCursor.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
M clang/utils/TableGen/CIRLoweringEmitter.cpp
M compiler-rt/lib/asan/asan_flags.cpp
M compiler-rt/test/ubsan/TestCases/Misc/Posix/static-link.cpp
M flang-rt/CMakeLists.txt
M flang-rt/lib/runtime/descriptor-io.cpp
M flang-rt/lib/runtime/extensions.cpp
M flang-rt/lib/runtime/external-unit.cpp
M flang-rt/lib/runtime/io-api.cpp
M flang-rt/lib/runtime/io-stmt.cpp
M flang-rt/lib/runtime/pseudo-unit.cpp
M flang-rt/lib/runtime/unit.h
M flang/docs/Extensions.md
M flang/include/flang/Evaluate/check-expression.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Semantics/expression.h
M flang/include/flang/Semantics/semantics.h
M flang/include/flang/Semantics/tools.h
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-coarray.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/semantics.cpp
M flang/lib/Semantics/tools.cpp
M flang/test/Analysis/AliasAnalysis/alias-analysis-cray-pointers.fir
M flang/test/Analysis/AliasAnalysis/load-ptr-designate.fir
M flang/test/Analysis/AliasAnalysis/ptr-component.fir
M flang/test/Lower/OpenMP/target_cpu_features.f90
M flang/test/Semantics/bug1214.cuf
A flang/test/Semantics/bug179580.f90
A flang/test/Semantics/bug2131b.cuf
A flang/test/Semantics/bug2174.f90
M flang/test/Transforms/licm.fir
M libc/docs/dev/printf_behavior.rst
M libc/docs/dev/undefined_behavior.rst
M libc/shared/math.h
A libc/shared/math/f16fmaf.h
M libc/src/__support/fixed_point/fx_bits.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/f16fmaf.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/f16fmaf.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M libclc/CMakeLists.txt
M libcxx/include/__algorithm/unwrap_range.h
M libcxx/include/__vector/vector.h
M libsycl/docs/index.rst
A libsycl/include/sycl/__impl/aspect.hpp
A libsycl/include/sycl/__impl/device.hpp
A libsycl/include/sycl/__impl/device_selector.hpp
A libsycl/include/sycl/__impl/info/device.hpp
A libsycl/include/sycl/__impl/info/device_type.hpp
M libsycl/include/sycl/__impl/platform.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/CMakeLists.txt
A libsycl/src/detail/device_impl.cpp
A libsycl/src/detail/device_impl.hpp
M libsycl/src/detail/global_objects.cpp
M libsycl/src/detail/offload/offload_topology.cpp
M libsycl/src/detail/offload/offload_topology.hpp
M libsycl/src/detail/offload/offload_utils.cpp
M libsycl/src/detail/offload/offload_utils.hpp
M libsycl/src/detail/platform_impl.cpp
M libsycl/src/detail/platform_impl.hpp
A libsycl/src/device.cpp
A libsycl/src/device_selector.cpp
M libsycl/src/platform.cpp
M libsycl/tools/sycl-ls/sycl-ls.cpp
M lld/include/lld/Common/BPSectionOrdererBase.inc
A lld/test/ELF/eh-frame-fde-encoding.s
A lld/test/ELF/eh-frame-invalid-cie.s
A lld/test/ELF/eh-frame-invalid-fde-encoding.s
R lld/test/ELF/eh-frame-value-format1.s
R lld/test/ELF/eh-frame-value-format2.s
R lld/test/ELF/eh-frame-value-format3.s
R lld/test/ELF/eh-frame-value-format4.s
R lld/test/ELF/eh-frame-value-format5.s
R lld/test/ELF/eh-frame-value-format6.s
R lld/test/ELF/eh-frame-value-format7.s
R lld/test/ELF/eh-frame-value-format8.s
R lld/test/ELF/eh-frame-value-format9.s
R lld/test/ELF/invalid-eh-frame.s
R lld/test/ELF/invalid-eh-frame2.s
R lld/test/ELF/invalid-eh-frame3.s
R lld/test/ELF/invalid-eh-frame4.s
R lld/test/ELF/invalid-eh-frame5.s
R lld/test/ELF/invalid-eh-frame6.s
R lld/test/ELF/invalid-eh-frame7.s
R lld/test/ELF/invalid-eh-frame8.s
R lld/test/ELF/invalid-eh-frame9.s
M lldb/include/lldb/Core/ModuleList.h
M lldb/include/lldb/Host/HostInfoBase.h
M lldb/include/lldb/Host/HostThread.h
M lldb/include/lldb/Host/JSONTransport.h
M lldb/include/lldb/Protocol/MCP/Server.h
M lldb/include/lldb/Protocol/MCP/Transport.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Utility/DataExtractor.h
M lldb/include/lldb/Utility/VirtualDataExtractor.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/source/API/SBModule.cpp
M lldb/source/Core/CoreProperties.td
M lldb/source/Core/DynamicLoader.cpp
M lldb/source/Core/ModuleList.cpp
M lldb/source/Core/Statusline.cpp
M lldb/source/Host/common/HostThread.cpp
M lldb/source/Host/macosx/objcxx/CMakeLists.txt
M lldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm
M lldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.cpp
M lldb/source/Plugins/DynamicLoader/FreeBSD-Kernel/DynamicLoaderFreeBSDKernel.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
M lldb/source/Plugins/DynamicLoader/wasm-DYLD/DynamicLoaderWasmDYLD.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.h
M lldb/source/Plugins/JITLoader/GDB/JITLoaderGDB.cpp
M lldb/source/Plugins/ObjectContainer/BSD-Archive/ObjectContainerBSDArchive.cpp
M lldb/source/Plugins/ObjectContainer/Mach-O-Fileset/ObjectContainerMachOFileset.cpp
M lldb/source/Plugins/ObjectContainer/Universal-Mach-O/ObjectContainerUniversalMachO.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
M lldb/source/Plugins/Platform/FreeBSD/PlatformFreeBSD.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinDevice.cpp
M lldb/source/Plugins/Process/FreeBSD/NativeRegisterContextFreeBSD_arm64.cpp
M lldb/source/Plugins/Process/FreeBSD/NativeRegisterContextFreeBSD_arm64.h
M lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
M lldb/source/Plugins/Process/Utility/CMakeLists.txt
R lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.cpp
R lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h
M lldb/source/Plugins/Process/Utility/StopInfoMachException.h
R lldb/source/Plugins/Process/Utility/lldb-mips-freebsd-register-enums.h
M lldb/source/Plugins/Process/elf-core/CMakeLists.txt
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
R lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_mips64.cpp
R lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_mips64.h
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.cpp
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.h
M lldb/source/Plugins/SymbolLocator/DebugSymbols/SymbolLocatorDebugSymbols.cpp
M lldb/source/Protocol/MCP/Server.cpp
M lldb/source/Protocol/MCP/Transport.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/ProcessTrace.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Utility/VirtualDataExtractor.cpp
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/was_hit/TestWasHit.py
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/was_hit/bkpt_resolver.py
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/was_hit/main.c
M lldb/test/API/functionalities/scripted_frame_provider/TestScriptedFrameProvider.py
A lldb/test/API/lang/cpp/template-diagnostic-hint/Makefile
A lldb/test/API/lang/cpp/template-diagnostic-hint/TestTemplateDiagnosticHint.py
A lldb/test/API/lang/cpp/template-diagnostic-hint/main.cpp
A lldb/test/API/macosx/stop-reason-exception/Makefile
A lldb/test/API/macosx/stop-reason-exception/TestMachExceptionData.py
A lldb/test/API/macosx/stop-reason-exception/main.c
M lldb/test/API/python_api/process/cancel_attach/TestCancelAttach.py
A lldb/test/API/tools/lldb-dap/launch/io/DAP_launch_io.py
R lldb/test/API/tools/lldb-dap/launch/io/TestDAP_launch_io.py
A lldb/test/API/tools/lldb-dap/launch/io/TestDAP_launch_io_integratedTerminal.py
A lldb/test/API/tools/lldb-dap/launch/io/TestDAP_launch_io_internalConsole.py
M lldb/test/API/tools/lldb-dap/runInTerminal/TestDAP_runInTerminal.py
M lldb/test/Shell/helper/toolchain.py
M lldb/tools/driver/Options.td
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/DisassembleRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/EvaluateRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/NextRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/ReadMemoryRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StackTraceRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StepInRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StepInTargetsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/StepOutRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/WriteMemoryRequestHandler.cpp
M lldb/tools/lldb-dap/Transport.cpp
M lldb/tools/lldb-dap/Transport.h
M lldb/tools/lldb-dap/tool/lldb-dap.cpp
M lldb/unittests/DAP/TestBase.cpp
M lldb/unittests/DAP/TestBase.h
M lldb/unittests/Host/JSONTransportTest.cpp
M lldb/unittests/ObjectFile/MachO/CMakeLists.txt
M lldb/unittests/ObjectFile/MachO/TestObjectFileMachO.cpp
M lldb/unittests/Process/Utility/RegisterContextFreeBSDTest.cpp
M lldb/unittests/Protocol/ProtocolMCPServerTest.cpp
M lldb/unittests/TestingSupport/Host/JSONTransportTestUtilities.h
M lldb/unittests/Utility/VirtualDataExtractorTest.cpp
M llvm/cmake/modules/TableGen.cmake
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CodingStandards.rst
M llvm/docs/CommandGuide/llvm-objcopy.rst
M llvm/docs/CommandGuide/llvm-readelf.rst
M llvm/docs/CommandGuide/llvm-readobj.rst
M llvm/docs/CommandGuide/llvm-strip.rst
M llvm/docs/HowToUseInstrMappings.rst
M llvm/docs/LangRef.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/ADT/ScopeExit.h
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/IR/DebugInfo.h
M llvm/include/llvm/MC/MCInstrDesc.h
M llvm/include/llvm/MC/MCSubtargetInfo.h
M llvm/include/llvm/Target/GlobalISel/Target.td
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/include/llvm/TargetParser/TargetParser.h
M llvm/include/llvm/Transforms/Utils/VNCoercion.h
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/ModuleDebugInfoPrinter.cpp
M llvm/lib/Analysis/StaticDataProfileInfo.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/ExpandIRInsts.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
M llvm/lib/CodeGen/GlobalMergeFunctions.cpp
M llvm/lib/CodeGen/InsertCodePrefetch.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/Dominators.cpp
M llvm/lib/IR/SafepointIRVerifier.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/MC/MCSubtargetInfo.cpp
M llvm/lib/MC/MCWasmStreamer.cpp
M llvm/lib/MCA/InstrBuilder.cpp
M llvm/lib/ObjCopy/wasm/WasmObjcopy.cpp
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/Object/OffloadBinary.cpp
M llvm/lib/ObjectYAML/ELFYAML.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPrepareAGPRAlloc.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
M llvm/lib/Target/AMDGPU/AMDGPUUniformIntrinsicCombine.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
M llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.cpp
M llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.cpp
M llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/R600InstrInfo.h
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIFixVGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
M llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
M llvm/lib/Target/AMDGPU/SIPostRABundler.cpp
M llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMInstrNEON.td
M llvm/lib/Target/Hexagon/CMakeLists.txt
A llvm/lib/Target/Hexagon/HexagonGlobalRegion.cpp
A llvm/lib/Target/Hexagon/HexagonGlobalRegion.h
M llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
M llvm/lib/Target/NVPTX/NVPTX.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXSubtarget.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp
M llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
M llvm/lib/Target/WebAssembly/CMakeLists.txt
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyCallLowering.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyCallLowering.h
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyInstructionSelector.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.h
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyPostLegalizerCombiner.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyPreLegalizerCombiner.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyRegisterBankInfo.cpp
A llvm/lib/Target/WebAssembly/GISel/WebAssemblyRegisterBankInfo.h
M llvm/lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.h
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssembly.td
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
A llvm/lib/Target/WebAssembly/WebAssemblyCombine.td
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
A llvm/lib/Target/WebAssembly/WebAssemblyGISel.td
A llvm/lib/Target/WebAssembly/WebAssemblyRegisterBanks.td
M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/X86/CMakeLists.txt
M llvm/lib/Target/X86/X86.h
A llvm/lib/Target/X86/X86CleanupLocalDynamicTLS.cpp
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86IndirectBranchTracking.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86PassRegistry.def
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/TargetParser/RISCVTargetParser.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Utils/VNCoercion.cpp
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Analysis/CostModel/AArch64/bswap.ll
M llvm/test/CodeGen/AArch64/GlobalISel/inline-asm.ll
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-dynamic-alloca-scalable.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
A llvm/test/CodeGen/AArch64/cgdata-merge-preserve-entry-count.ll
M llvm/test/CodeGen/AArch64/fcvt_combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f64.ll
M llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/agpr-spill-copy.mir
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pown.ll
M llvm/test/CodeGen/AMDGPU/av-spill-expansion-with-machine-cp.mir
M llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
M llvm/test/CodeGen/AMDGPU/bug-undef-spilled-agpr.mir
M llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
M llvm/test/CodeGen/AMDGPU/fpext-free.ll
M llvm/test/CodeGen/AMDGPU/frame-index.mir
M llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/kernel-mubuf-with-voffset.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-buffer-atomics.ll
A llvm/test/CodeGen/AMDGPU/memory-legalizer-non-volatile.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain-preserve.mir
M llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain.mir
M llvm/test/CodeGen/AMDGPU/pei-build-av-spill.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill-offset-overflow-gfx950.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
M llvm/test/CodeGen/AMDGPU/pei-build-spill.mir
M llvm/test/CodeGen/AMDGPU/pei-reg-scavenger-position.mir
M llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/pei-vgpr-block-spill-csr.mir
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.mir
M llvm/test/CodeGen/AMDGPU/regalloc-introduces-copy-sgpr-to-agpr.mir
M llvm/test/CodeGen/AMDGPU/same-slot-agpr-sgpr.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-vmem-large-frame.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr-partially-undef.mir
M llvm/test/CodeGen/AMDGPU/spill-agpr.mir
M llvm/test/CodeGen/AMDGPU/spill-reg-tuple-super-reg-use.mir
M llvm/test/CodeGen/AMDGPU/spill-restore-partial-copy.mir
M llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir
M llvm/test/CodeGen/AMDGPU/spill-to-agpr-partial.mir
M llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir
M llvm/test/CodeGen/AMDGPU/spillv16.ll
M llvm/test/CodeGen/AMDGPU/spillv16.mir
M llvm/test/CodeGen/AMDGPU/tied-op-for-wwm-scratch-reg-spill-restore.mir
M llvm/test/CodeGen/AMDGPU/vector-spill-restore-to-other-vector-type.mir
M llvm/test/CodeGen/AMDGPU/vgpr-spill-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/vgpr-spill.mir
M llvm/test/CodeGen/AMDGPU/wait-xcnt-atomic-rmw-optimization.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-functions-pei.mir
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/ARM/intrinsics-crypto.ll
A llvm/test/CodeGen/LoongArch/lasx/vxi1-masks.ll
A llvm/test/CodeGen/MIR/Mips/mips32r6-copyPhysReg-fcmp-f64-to-gpr.mir
M llvm/test/CodeGen/NVPTX/clusterlaunchcontrol-multicast.ll
M llvm/test/CodeGen/NVPTX/convert-sm100a.ll
M llvm/test/CodeGen/NVPTX/convert-sm103a.ll
M llvm/test/CodeGen/NVPTX/f32-ex2.ll
M llvm/test/CodeGen/NVPTX/fexp2.ll
M llvm/test/CodeGen/NVPTX/flog2.ll
M llvm/test/CodeGen/NVPTX/fma-relu-contract.ll
M llvm/test/CodeGen/NVPTX/i128.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-arch-O0.ll
R llvm/test/CodeGen/NVPTX/ptx-version-validation.ll
M llvm/test/CodeGen/NVPTX/rsqrt.ll
M llvm/test/CodeGen/NVPTX/sm-version.ll
M llvm/test/CodeGen/NVPTX/surf-tex.py
A llvm/test/CodeGen/NVPTX/wmma-ptx86-sm120a.py
M llvm/test/CodeGen/PowerPC/aix-ifunc-toc-restore-query-neg.ll
A llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/alloca.ll
R llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/fallback.ll
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
A llvm/test/CodeGen/SystemZ/zos-alias-unsupported.ll
A llvm/test/CodeGen/SystemZ/zos-func-alias.ll
A llvm/test/CodeGen/WebAssembly/GlobalISel/gisel-commandline-option.ll
A llvm/test/CodeGen/WebAssembly/common-error.ll
M llvm/test/CodeGen/WebAssembly/offset-fastisel.ll
M llvm/test/CodeGen/WebAssembly/signext-arg.ll
M llvm/test/CodeGen/WebAssembly/signext-inreg.ll
M llvm/test/CodeGen/X86/bitcast-vector-bool.ll
M llvm/test/CodeGen/X86/cfi-epilogue-with-return.mir
M llvm/test/CodeGen/X86/cfi-epilogue-without-return.mir
M llvm/test/CodeGen/X86/cfi-inserter-callee-save-register-2.mir
M llvm/test/CodeGen/X86/cfi-inserter-callee-save-register.mir
A llvm/test/CodeGen/X86/cfi-xmm-asm.ll
M llvm/test/CodeGen/X86/cfi-xmm.ll
M llvm/test/CodeGen/X86/combine-adc.ll
A llvm/test/CodeGen/X86/div_i129_v_pow2k.ll
M llvm/test/CodeGen/X86/expand-large-fp-optnone.ll
M llvm/test/CodeGen/X86/global-variable-partition-with-dap.ll
M llvm/test/CodeGen/X86/known-bits.ll
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
M llvm/test/CodeGen/X86/pr142937.ll
A llvm/test/CodeGen/X86/select-big-integer.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
A llvm/test/DebugInfo/Generic/debuginfofinder-macros.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/aarch64-bf16-dotprod-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/aarch64-matmul.ll
A llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vcmp.ll
M llvm/test/Instrumentation/MemorySanitizer/switch-icmp.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_sopp.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_sopp.txt
M llvm/test/MC/RISCV/rv32p-invalid.s
M llvm/test/MC/RISCV/rv32p-valid.s
M llvm/test/MC/RISCV/rv64p-valid.s
A llvm/test/MC/WebAssembly/common-error.s
M llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
M llvm/test/TableGen/CPtrWildcard.td
M llvm/test/TableGen/DAGDefaultOps.td
A llvm/test/TableGen/DecoderEmitter/large-islands.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-replacerreg.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-imms.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-intrinsics.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-miflags.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-operand-types.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-patfrag-root.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-temp-defs.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-typeof.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-variadics.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
M llvm/test/TableGen/GlobalISelEmitter/ContextlessPredicates.td
M llvm/test/TableGen/GlobalISelEmitter/CustomPredicate.td
M llvm/test/TableGen/GlobalISelEmitter/DefaultOpsGlobalISel.td
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
M llvm/test/TableGen/GlobalISelEmitter/HwModes.td
M llvm/test/TableGen/GlobalISelEmitter/MatchTableOptimizer.td
M llvm/test/TableGen/GlobalISelEmitter/MatchTableOptimizerSameOperand-invalid.td
M llvm/test/TableGen/GlobalISelEmitter/OverloadedPtr.td
M llvm/test/TableGen/GlobalISelEmitter/RegSequence.td
M llvm/test/TableGen/GlobalISelEmitter/Subreg.td
M llvm/test/TableGen/GlobalISelEmitter/Variadic.td
M llvm/test/TableGen/GlobalISelEmitter/atomic-store.td
M llvm/test/TableGen/GlobalISelEmitter/dead-def.td
M llvm/test/TableGen/GlobalISelEmitter/frameindex.td
M llvm/test/TableGen/GlobalISelEmitter/gisel-physreg-input.td
M llvm/test/TableGen/GlobalISelEmitter/immarg-predicated.td
M llvm/test/TableGen/GlobalISelEmitter/immarg.td
M llvm/test/TableGen/GlobalISelEmitter/input-discard.td
M llvm/test/TableGen/GlobalISelEmitter/int64min.td
M llvm/test/TableGen/GlobalISelEmitter/multiple-output-discard.td
M llvm/test/TableGen/GlobalISelEmitter/multiple-output.td
M llvm/test/TableGen/GlobalISelEmitter/nested-subregs.td
M llvm/test/TableGen/GlobalISelEmitter/optional-def.td
M llvm/test/TableGen/GlobalISelEmitter/output-discard.td
M llvm/test/TableGen/GlobalISelEmitter/predicated-pattern-order.td
M llvm/test/TableGen/GlobalISelEmitter/undef-tied-input.td
M llvm/test/TableGen/GlobalISelEmitter/zero-reg.td
M llvm/test/TableGen/HasNoUse.td
M llvm/test/TableGen/MacroFusion.td
M llvm/test/TableGen/RegClassByHwMode.td
M llvm/test/TableGen/dag-isel-instrument.td
M llvm/test/TableGen/dag-isel-regclass-emit-enum.td
M llvm/test/TableGen/dag-isel-res-order.td
M llvm/test/TableGen/get-named-operand-idx.td
M llvm/test/TableGen/multiple-type-casts-patfrags.td
M llvm/test/TableGen/riscv-target-def.td
M llvm/test/Transforms/ExpandIRInsts/X86/expand-int-convert-small.ll
M llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-si129tofp.ll
M llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-ui129tofp.ll
M llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-optnone.ll
A llvm/test/Transforms/Inline/ret_attr_nofpclass.ll
A llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.wave.shuffle.ll
M llvm/test/Transforms/InstCombine/add-shl-mul-umax.ll
M llvm/test/Transforms/InstCombine/and-compare.ll
M llvm/test/Transforms/InstCombine/cttz.ll
M llvm/test/Transforms/InstCombine/double-float-shrink-1.ll
M llvm/test/Transforms/InstCombine/sqrt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll
M llvm/test/Transforms/LoopVectorize/conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/cse-casts.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags-interleave.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_and.ll
M llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-metadata.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-reductions.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge-vf1.ll
M llvm/test/Transforms/PhaseOrdering/X86/loadcombine.ll
M llvm/test/Transforms/SLPVectorizer/X86/bad-reduction.ll
A llvm/test/Transforms/SLPVectorizer/X86/bswap-reduction-aliased.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
A llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation5.ll
M llvm/test/Transforms/VectorCombine/AArch64/select-shuffle.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-binops.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-cmps.ll
M llvm/test/Transforms/VectorCombine/load-shufflevector.ll
M llvm/test/tools/llvm-ir2vec/bindings/ir2vec-bindings.py
M llvm/test/tools/llvm-objcopy/wasm/basic-strip.test
M llvm/test/tools/llvm-objcopy/wasm/strip-all.test
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
M llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
M llvm/tools/llvm-ir2vec/Bindings/PyIR2Vec.cpp
M llvm/tools/llvm-objcopy/CommonOpts.td
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/unittests/Analysis/IVDescriptorsTest.cpp
M llvm/unittests/TargetParser/RISCVTargetParserTest.cpp
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
M llvm/utils/TableGen/Basic/RISCVTargetDefEmitter.cpp
M llvm/utils/TableGen/CodeGenMapTable.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/InstrInfoEmitter.cpp
M llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
M llvm/utils/gn/secondary/clang/lib/Analysis/Scalable/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Parse/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Analysis/Scalable/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Plugins/Process/Utility/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Plugins/Process/elf-core/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/TargetParser/BUILD.gn
M llvm/utils/profcheck-xfail.txt
M mlir/include/mlir-c/Support.h
M mlir/include/mlir/Bindings/Python/NanobindUtils.h
M mlir/include/mlir/CAPI/Support.h
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUTypes.td
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/include/mlir/Dialect/GPU/Pipelines/Passes.h
M mlir/include/mlir/Dialect/GPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/Utils/ReshapeOpsUtils.h
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/Transforms.h
A mlir/include/mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h
M mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h
M mlir/include/mlir/Dialect/XeGPU/uArch/IntelGpuXe2.h
M mlir/include/mlir/Dialect/XeGPU/uArch/uArchBase.h
M mlir/include/mlir/ExecutionEngine/MemRefUtils.h
M mlir/include/mlir/IR/Remarks.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/CAPI/IR/Support.cpp
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUOps.cpp
M mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/CMakeLists.txt
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
A mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPeepHoleOptimizer.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/lib/RegisterAllExtensions.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/python/CMakeLists.txt
A mlir/python/mlir/dialects/X86Vector.td
A mlir/python/mlir/dialects/X86VectorTransformOps.td
A mlir/python/mlir/dialects/transform/x86vector.py
A mlir/python/mlir/dialects/x86vector.py
M mlir/test/Conversion/AMDGPUToROCDL/gfx1250.mlir
M mlir/test/Conversion/ConvertToSPIRV/gpu.mlir
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
M mlir/test/Conversion/XeGPUToXeVM/materializecast.mlir
A mlir/test/Conversion/XeVMToLLVM/legalize_large_vector.mlir
M mlir/test/Conversion/XeVMToLLVM/xevm-to-llvm.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
M mlir/test/Dialect/LLVMIR/func.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Dialect/MemRef/canonicalize.mlir
M mlir/test/Dialect/Tensor/invalid.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
M mlir/test/Target/LLVMIR/Import/function-attributes.ll
M mlir/test/Target/LLVMIR/Import/instructions.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
A mlir/test/python/dialects/transform_x86vector_ext.py
A mlir/test/python/dialects/x86vector.py
M mlir/unittests/ExecutionEngine/CMakeLists.txt
R mlir/unittests/ExecutionEngine/OwningMemRef.cpp
M offload/libomptarget/DeviceImage.cpp
M offload/plugins-nextgen/common/CMakeLists.txt
M offload/plugins-nextgen/common/include/RPC.h
M offload/plugins-nextgen/common/src/RPC.cpp
M openmp/device/src/LibC.cpp
M openmp/runtime/CMakeLists.txt
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel
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