[all-commits] [llvm/llvm-project] ed2aa3: [RISCV] Use RVInstVV as the base for CustomSiFiveV...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ed2aa304cac86e7fa88cd271c2d73ffd9e324e22
      https://github.com/llvm/llvm-project/commit/ed2aa304cac86e7fa88cd271c2d73ffd9e324e22
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2026-02-03 (Tue, 03 Feb 2026)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td

  Log Message:
  -----------
  [RISCV] Use RVInstVV as the base for CustomSiFiveVMACC. NFC (#179565)

This correctly names the operands vd, vs1, and vs2 instead of rd, rs1,
and rs2. RVInstVCCustom2 is now only used for VCIX which has its own
operand naming problems.

I'm considering using named operand indices in
RISCVAsmParser::validateInstruction for the RVVConstraints, but first I
would have to make vs1, vs2 named correctly across all vector
instructions.



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