[all-commits] [llvm/llvm-project] 668f1c: [AArch64][GlobalISel] Add GISelPredicateCode for s...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 668f1c01624b2a7b15bc1639c49f6d0b39cd2e32
      https://github.com/llvm/llvm-project/commit/668f1c01624b2a7b15bc1639c49f6d0b39cd2e32
  Author: David Green <david.green at arm.com>
  Date:   2026-01-24 (Sat, 24 Jan 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/aarch64-mull-masks.ll
    M llvm/test/CodeGen/AArch64/cpa-globalisel.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Add GISelPredicateCode for smullwithsignbits

This allows us to select more smull instructions in the same way that SDAG does
using known sign bits.



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