[all-commits] [llvm/llvm-project] e78674: Set rematerialized MIs' reg operands to sentinel reg

[Lucas Ramirez via All-commits]

  Branch: refs/heads/users/lucas-rami/rematerialization-reapply/4
  Home:   https://github.com/llvm/llvm-project
  Commit: e7867402482feec663d6e3a17be5d7b815c3a110
      https://github.com/llvm/llvm-project/commit/e7867402482feec663d6e3a17be5d7b815c3a110
  Author: Lucas Ramirez <lucas.rami at proton.me>
  Date:   2026-01-22 (Thu, 22 Jan 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
    M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
    M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-debug.mir

  Log Message:
  -----------
  Set rematerialized MIs' reg operands to sentinel reg

Also removes a bunch of const specified on class members that prevents
std::sort from compiling on some configs.



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