[all-commits] [llvm/llvm-project] c94739: [MachineCombiner] Defer pattern order verfication....

[Min-Yih Hsu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c94739a5d523883663d237ad9072275ff6c847b1
      https://github.com/llvm/llvm-project/commit/c94739a5d523883663d237ad9072275ff6c847b1
  Author: Min-Yih Hsu <min.hsu at sifive.com>
  Date:   2026-01-20 (Tue, 20 Jan 2026)

  Changed paths:
    M llvm/lib/CodeGen/MachineCombiner.cpp

  Log Message:
  -----------
  [MachineCombiner] Defer pattern order verfication. NFC (#177081)

The `verifyPatternOrder` function was created to check if machine
combiner patterns are ordered by their latency reduction degree. This
function can be merged into the following loop, which iterates through
all the patterns, such that (1) `TII::genAlternativeCodeSequence`, which
can be quite expensive, won't be called twice (2) since it's now placed
after we print out the candidate sequence through debug print, if
anything goes wrong during the verification, we at least know what the
sequence looks like (3) we don't need to verify all patterns if we will
eventually exit early.

This should be a NFC



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