[all-commits] [llvm/llvm-project] 4cbca4: [RISCV] Add missing arch features of tt-ascalon-d8...

[Ramkumar Ramachandra via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4cbca489c3b1d1f5b25e4f70e7942a7e4abfae65
      https://github.com/llvm/llvm-project/commit/4cbca489c3b1d1f5b25e4f70e7942a7e4abfae65
  Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
  Date:   2026-01-15 (Thu, 15 Jan 2026)

  Changed paths:
    M clang/test/Driver/riscv-cpus.c
    M llvm/lib/Target/RISCV/RISCVProcessors.td

  Log Message:
  -----------
  [RISCV] Add missing arch features of tt-ascalon-d8 (#176071)

A GCC patch has been landed, which can be used as a reference for the
architectural features of tt-ascalon-d8. The patch is missing Zvfbfmin
(reported to GCC patch author), but we should align the architectural
features in LLVM with that tested patch otherwise.

Ref: https://gcc.gnu.org/pipermail/gcc-patches/2026-January/705300.html



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications