[all-commits] [llvm/llvm-project] 58c8f5: [compiler-rt] Add CMake flag for AArch64 Linux wit...

Florian Mayer via All-commits all-commits at lists.llvm.org
Wed Dec 10 13:57:05 PST 2025


  Branch: refs/heads/users/fmayer/spr/main.flowsensitive-statusor-15n-support-nested-statusors
  Home:   https://github.com/llvm/llvm-project
  Commit: 58c8f5768102751ce932b597563aaa4a3b7fa430
      https://github.com/llvm/llvm-project/commit/58c8f5768102751ce932b597563aaa4a3b7fa430
  Author: Eli Friedman <efriedma at qti.qualcomm.com>
  Date:   2025-12-05 (Fri, 05 Dec 2025)

  Changed paths:
    M compiler-rt/CMakeLists.txt

  Log Message:
  -----------
  [compiler-rt] Add CMake flag for AArch64 Linux with 39-bit VA. (#167028)

Sanitizers currently assume AArch64 Linux has 48-bit VA. Followup
patches will add checks for this flag to asan and hwasan.


  Commit: 7982688b69c75ff40f34184438d3ef7e905ff006
      https://github.com/llvm/llvm-project/commit/7982688b69c75ff40f34184438d3ef7e905ff006
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-12-05 (Fri, 05 Dec 2025)

  Changed paths:
    M compiler-rt/test/profile/Linux/instrprof-debug-info-correlate-debuginfod.c

  Log Message:
  -----------
  [Profile] Fix debuginfod test with internal shell

The recent relanding of the internal shell broke one of the debuginfod
tests as it is not tested by any upstream buildbot due to the use of
curl. Rewriting the test to not use subshells is pretty simple.


  Commit: a55221da6047dace6ec7f24967ce0113429d093f
      https://github.com/llvm/llvm-project/commit/a55221da6047dace6ec7f24967ce0113429d093f
  Author: Louis Dionne <ldionne.2 at gmail.com>
  Date:   2025-12-05 (Fri, 05 Dec 2025)

  Changed paths:
    M clang/lib/Driver/ToolChains/Darwin.cpp
    R clang/test/Driver/Inputs/basic_darwin_toolchain/usr/lib/libc++.dylib
    R clang/test/Driver/Inputs/basic_darwin_toolchain/usr/lib/libc++experimental.a
    R clang/test/Driver/Inputs/basic_darwin_toolchain_static/usr/bin/.keep
    R clang/test/Driver/Inputs/basic_darwin_toolchain_static/usr/include/c++/v1/.keep
    R clang/test/Driver/Inputs/basic_darwin_toolchain_static/usr/lib/libc++.a
    R clang/test/Driver/Inputs/basic_darwin_toolchain_static/usr/lib/libc++experimental.a
    M clang/test/Driver/darwin-header-search-libcxx.cpp
    R clang/test/Driver/darwin-link-libcxx.cpp
    M clang/test/Driver/experimental-library-flag.cpp
    M compiler-rt/cmake/config-ix.cmake

  Log Message:
  -----------
  [clang] Revert changes to prefer the toolchain-provided libc++.dylib

This patch reverts the change that made clang prefer the toolchain
libc++.dylib when there is one (#170303), and the subsequent test
workaround we landed to fix bots (#170912).

We are seeing some failure on macOS LLDB bots that need to be
investigated, and that will require more time than I can spare
before the end of today.

This reverts commits bad1a88963 and 190b8d0b.


  Commit: 7afeea414d57300399bf917eaba7efe1fd821bae
      https://github.com/llvm/llvm-project/commit/7afeea414d57300399bf917eaba7efe1fd821bae
  Author: Eli Friedman <efriedma at qti.qualcomm.com>
  Date:   2025-12-05 (Fri, 05 Dec 2025)

  Changed paths:
    M llvm/test/CodeGen/AArch64/wineh-pac.ll

  Log Message:
  -----------
  Autogenerate llvm/test/CodeGen/AArch64/wineh-pac.ll (#170925)

Using custom CHECK lines doesn't really help here.


  Commit: 0cb237d69e16a8c5d234a5c5ab1b1ebcf6f94cd3
      https://github.com/llvm/llvm-project/commit/0cb237d69e16a8c5d234a5c5ab1b1ebcf6f94cd3
  Author: Hendrik Hübner <117831077+HendrikHuebner at users.noreply.github.com>
  Date:   2025-12-05 (Fri, 05 Dec 2025)

  Changed paths:
    M clang/include/clang/CIR/Dialect/IR/CIROps.td
    M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
    M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
    A clang/test/CIR/CodeGen/atomic-thread-fence.c

  Log Message:
  -----------
  [CIR] Add AtomicFenceOp and signal/thread fence builtins and required helpers (#168346)

This PR adds the AtomicFenceOp and signal/thread fence builtins.


  Commit: 27bf5fdcc69364f991756e978d184f2dbee04a19
      https://github.com/llvm/llvm-project/commit/27bf5fdcc69364f991756e978d184f2dbee04a19
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-12-05 (Fri, 05 Dec 2025)

  Changed paths:
    M llvm/include/llvm/CodeGen/SelectionDAG.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

  Log Message:
  -----------
  DAG: Add overload of getExternalSymbol using RTLIB::LibcallImpl (#170587)


  Commit: 7ba71012ee89229b86ab12cd31f0e69744131555
      https://github.com/llvm/llvm-project/commit/7ba71012ee89229b86ab12cd31f0e69744131555
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2025-12-05 (Fri, 05 Dec 2025)

  Changed paths:
    M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
    M flang/lib/Lower/Allocatable.cpp
    M flang/lib/Optimizer/Transforms/CUDA/CUFAllocationConversion.cpp
    M flang/test/Fir/CUDA/cuda-allocate.fir
    M flang/test/Lower/CUDA/cuda-allocatable.cuf

  Log Message:
  -----------
  [flang][cuda] Add pointer attribute to allocate/deallocate ops (#170937)

Similar for the double descriptor information added in
https://github.com/llvm/llvm-project/pull/170901, we need to carry over
the pointer information until the op can be converted. The correct
detection would fail if the op is converted late.


  Commit: 2e2fe683af53884ce1f371dc8162db22a0ebbbe8
      https://github.com/llvm/llvm-project/commit/2e2fe683af53884ce1f371dc8162db22a0ebbbe8
  Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
  Date:   2025-12-05 (Fri, 05 Dec 2025)

  Changed paths:
    M clang/include/clang/DependencyScanning/DependencyScanningWorker.h
    M clang/include/clang/Tooling/DependencyScanningTool.h
    M clang/lib/DependencyScanning/DependencyScannerImpl.cpp
    M clang/lib/DependencyScanning/DependencyScanningWorker.cpp
    M clang/lib/Tooling/DependencyScanningTool.cpp

  Log Message:
  -----------
  [clang][DependencyScanning] Use ArrayRef in function signatures over const std::vector& (NFC) (#170941)

This updates the dependency-scanning tooling to consistently use
`ArrayRef<std::string>` rather than `const std::vector<std::string>&` in
function signatures.

This is done to help break PR #169964 into smaller, more manageable
pieces.


  Commit: 8d57635c59cbe535258dc3b7c69daf6b68b9e2a2
      https://github.com/llvm/llvm-project/commit/8d57635c59cbe535258dc3b7c69daf6b68b9e2a2
  Author: John Harrison <harjohn at google.com>
  Date:   2025-12-05 (Fri, 05 Dec 2025)

  Changed paths:
    M lldb/tools/lldb-dap/DAP.cpp
    M lldb/tools/lldb-dap/DAP.h
    M lldb/tools/lldb-dap/DAPLog.cpp
    M lldb/tools/lldb-dap/DAPLog.h
    M lldb/tools/lldb-dap/DAPSessionManager.cpp
    M lldb/tools/lldb-dap/EventHelper.cpp
    M lldb/tools/lldb-dap/EventHelper.h
    M lldb/tools/lldb-dap/Transport.cpp
    M lldb/tools/lldb-dap/Transport.h
    M lldb/tools/lldb-dap/tool/lldb-dap.cpp
    M lldb/unittests/DAP/CMakeLists.txt
    A lldb/unittests/DAP/DAPLogTest.cpp
    M lldb/unittests/DAP/TestBase.cpp
    M lldb/unittests/DAP/TestBase.h

  Log Message:
  -----------
  [lldb-dap] Improving logging support and formatting. (#170731)

Adjusting logs in a few ways:

* The `DAP_LOG` and `DAP_LOG_ERROR` macros now include the file/line of
the log statement.
* Added support for creating a log with a prefix. This simplifies how we
create logs for the `lldb_dap::DAP` instance and `lldb_dap::Transport`
instance, allowing us to not have to pass the client name around as
much.
* Updated logging usage to take the `lldb_dap::Log` as a reference but
it now defaults to `llvm::raw_null_stream` if not configured. This
ensures more uniform access to the logger, even if its not written
anywhere.

The logs now look like:

```
1764896564.038788080 (stdio) --> {"command":"initialize","arguments":{...},"type":"request","seq":1}
1764896564.039064884 DAP.cpp:1007 (stdio) queued (command=initialize seq=1)
1764896564.039768934 (stdio) <-- {"body":{...},"command":"initialize","request_seq":1,"seq":1,"success":true,"type":"response"}
```


  Commit: 113b2d7f0778cec0eb1b5d5813301ffb1ed67b59
      https://github.com/llvm/llvm-project/commit/113b2d7f0778cec0eb1b5d5813301ffb1ed67b59
  Author: Teresa Johnson <tejohnson at google.com>
  Date:   2025-12-05 (Fri, 05 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
    M llvm/test/Transforms/PGOProfile/memprof-dump-matched-alloc-site.ll
    M llvm/test/Transforms/PGOProfile/memprof-dump-matched-call-sites.ll

  Log Message:
  -----------
  [MemProf] Add remarks for matched allocs and calls (#170379)

The new remarks are somewhat equivalent to the -memprof-print-match-info
messages, however, are not deduplicated across the module so will be
generally more verbose.


  Commit: 96c733e0dbc1d1426ec2ea23898e23ff9851fde0
      https://github.com/llvm/llvm-project/commit/96c733e0dbc1d1426ec2ea23898e23ff9851fde0
  Author: Med Ismail Bennani <ismail at bennani.ma>
  Date:   2025-12-05 (Fri, 05 Dec 2025)

  Changed paths:
    M lldb/include/lldb/Target/StackID.h
    M lldb/source/Core/CoreProperties.td
    M lldb/source/Core/FormatEntity.cpp
    M lldb/source/Plugins/Process/scripted/ScriptedFrame.cpp
    M lldb/source/Plugins/Process/scripted/ScriptedFrame.h
    M lldb/source/Target/StackFrame.cpp
    M lldb/source/Target/StackFrameList.cpp
    M lldb/test/API/functionalities/scripted_frame_provider/TestScriptedFrameProvider.py
    A lldb/test/API/functionalities/scripted_frame_provider/python_helper.py
    M lldb/test/API/functionalities/scripted_frame_provider/test_frame_providers.py
    M lldb/test/API/functionalities/scripted_process/dummy_scripted_process.py

  Log Message:
  -----------
  [lldb] Add support for PC-less scripted frames (#170805)

Scripted frames that materialize Python functions or other non-native
code are PC-less by design, meaning they don't have valid program
counter values. Previously, these frames would display invalid addresses
(`0xffffffffffffffff`) in backtrace output.

This patch updates `FormatEntity` to detect and suppress invalid address
display for PC-less frames, adds fallback to frame methods when symbol
context is unavailable, and modifies `StackFrame::GetSymbolContext` to
skip PC-based symbol resolution for invalid addresses.

The changes enable PC-less frames to display cleanly with proper
function names, file paths, and line numbers, and allow for source
display of foreign sources (like Python). Includes comprehensive test
coverage demonstrating frames pointing to Python source files.

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>


  Commit: dedcf88569c4b45b1ab78d05304045326336de0c
      https://github.com/llvm/llvm-project/commit/dedcf88569c4b45b1ab78d05304045326336de0c
  Author: Andy Kaylor <akaylor at nvidia.com>
  Date:   2025-12-05 (Fri, 05 Dec 2025)

  Changed paths:
    M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
    M clang/include/clang/CIR/MissingFeatures.h
    M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
    M clang/test/CIR/CodeGen/nrvo.cpp

  Log Message:
  -----------
  [CIR] Implement NRVO variable cleanup (#170774)

This implements the cleanup handling for C++ NRVO variables. Because
exception handling is still incomplete, this doesn't behave any
differently with exceptions enabled yet, but the NRVO-specific code for
that case is trivial.


  Commit: ce2518f59d9bc67553f05536ac9bb200827c36da
      https://github.com/llvm/llvm-project/commit/ce2518f59d9bc67553f05536ac9bb200827c36da
  Author: Jin Huang <jinhuang1102 at gmail.com>
  Date:   2025-12-05 (Fri, 05 Dec 2025)

  Changed paths:
    M llvm/lib/Analysis/AliasAnalysis.cpp
    R llvm/test/Transforms/DeadStoreElimination/atomic-todo.ll
    M llvm/test/Transforms/DeadStoreElimination/atomic.ll

  Log Message:
  -----------
  [AA] Improve precision for monotonic atomic load/store operations (#158169)

Refines `getModRefInfo` for `Monotonic` and `Unordered` atomic
operations to perform a full alias evaluation instead of conservatively
returning `ModRef`.

This allows AA to return more precise results (e.g., `NoModRef`),
unblocking optimizations in passes like DSE/PRE when the pointers are
proven not to alias.

LIT testing: 
1. Fixed the `XFAIL` test `@test9` in `DSE/atomic-todo.ll`, where the
improved AA now allows DSE to correctly remove a dead store.
2. Added test `@test9a` to the same file to ensure DSE is still blocked
when pointers may alias.
3. I am also reviewing tests in GVN/PRE to see where this change may be
beneficial. While all existing tests pass, I will update this PR with
any new GVN test cases in a follow-up commit.

---------

Co-authored-by: Jin Huang <jingold at google.com>


  Commit: 762a171b3d6f6eb64dc5a844fcb25caa4ece7d00
      https://github.com/llvm/llvm-project/commit/762a171b3d6f6eb64dc5a844fcb25caa4ece7d00
  Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
  Date:   2025-12-05 (Fri, 05 Dec 2025)

  Changed paths:
    M clang/include/clang/CIR/Dialect/IR/CIROps.td
    M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
    M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
    M clang/lib/CIR/CodeGen/CIRGenFunction.h
    M clang/lib/CIR/CodeGen/CIRGenModule.cpp
    M clang/lib/CIR/CodeGen/CIRGenModule.h
    M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
    M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
    M clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp
    M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
    M clang/test/CIR/CodeGen/label-values.c
    A clang/test/CIR/IR/indirect-br.cir

  Log Message:
  -----------
  [CIR] Upstream support for cir.indirectbr (#169967)

This PR upstreams support for the `cir.indirectBr` operation, which is
used to implement GCC’s labels-as-values `indirect goto`.
To ensure correct lowering, we introduce precise bookkeeping to
associate each `block_address` operation with its corresponding `label`
op. This is required because a `block_address` may be emitted before the
`label` it refers to. In such cases, the reference is deferred and later
resolved by `resolveBlockAddresses`, which guarantees that all
`indirectBr` successors are emitted in the correct and fully resolved
order.


  Commit: ee77c58e5b592379db7f50031fb41c15ba72118b
      https://github.com/llvm/llvm-project/commit/ee77c58e5b592379db7f50031fb41c15ba72118b
  Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
    A llvm/test/CodeGen/AMDGPU/promote-alloca-cfg.ll

  Log Message:
  -----------
  Reland "AMDGPU/PromoteAlloca: Simplify how deferred loads work (#170510)" (#170955)

The second pass of promotion to vector can be quite simple. Reflect that
simplicity in the code for better maintainability.

v2:
- don't put placeholders into the SSAUpdater, and add a test that shows
the problem


  Commit: 6d8714b52375b3b7a7f269cd1ec4cc73baece38b
      https://github.com/llvm/llvm-project/commit/6d8714b52375b3b7a7f269cd1ec4cc73baece38b
  Author: Andy Kaylor <akaylor at nvidia.com>
  Date:   2025-12-05 (Fri, 05 Dec 2025)

  Changed paths:
    A clang/docs/ClangIRCodeDuplication.rst
    M clang/docs/index.rst

  Log Message:
  -----------
  [Clang][CIR][Doc] Document CIR code duplication plans (#166457)

This adds a document describing known problems with code duplication in
the CIR codegen implementation, strategies to mitigate the risks caused
by that code duplication, and a general long-term plan for minimizing
the problem.


  Commit: b1ee4d08be7b53eb4676df5833127adbb778a487
      https://github.com/llvm/llvm-project/commit/b1ee4d08be7b53eb4676df5833127adbb778a487
  Author: Sudharsan Veeravalli <svs at qti.qualcomm.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp

  Log Message:
  -----------
  [RISCV] Refactor some code in RISCVMergeBaseOffset.NFC (#170839)


  Commit: e546d0f5d4179ac95e464ea968f7759e61aea8a3
      https://github.com/llvm/llvm-project/commit/e546d0f5d4179ac95e464ea968f7759e61aea8a3
  Author: Sudharsan Veeravalli <svs at qti.qualcomm.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    A llvm/test/Analysis/CostModel/RISCV/fshl_fshr.ll

  Log Message:
  -----------
  [RISCV][TTI] Add cost model for ROTL/ROTR (#170824)

A funnel shift with the same first two operands is a rotate. When
`Zbb/Zbkb` is enabled we can use the `ROL(W)/ROR(I)(W)` instruction to
represent this. Add cost model support for this.

Similar to https://github.com/llvm/llvm-project/pull/169335 for AArch64.


  Commit: 472fd70ace5d8522452b98e803e11676cad8753f
      https://github.com/llvm/llvm-project/commit/472fd70ace5d8522452b98e803e11676cad8753f
  Author: mitchell <mitchell.xu2 at gmail.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M llvm/utils/git/code-lint-helper.py

  Log Message:
  -----------
  [Github][CI] Introduce `LintHelper` class in `code-lint-helper.py`  (#168827)

This commit introduces a new `LintHelper` class to
`llvm/utils/git/code-lint-helper.py`, which lays the groundwork for
integrating additional linters (`doc8`) into Github Action workflow.

---------

Co-authored-by: EugeneZelenko <eugene.zelenko at gmail.com>


  Commit: 72d5fe5ec4d400b1e9444d78f2022f486aa19af1
      https://github.com/llvm/llvm-project/commit/72d5fe5ec4d400b1e9444d78f2022f486aa19af1
  Author: Katya Romanova <56653669+romanova-ekaterina at users.noreply.github.com>
  Date:   2025-12-05 (Fri, 05 Dec 2025)

  Changed paths:
    M clang/lib/Headers/cpuid.h

  Log Message:
  -----------
  [clang] [doc] Added documentation to intrinsics in cpuid.h (#170507)

Added doxygen comments to 4 intrinsincs in cpuid.h


  Commit: 90e3ac6c55e61f0cc9ec9921dfa9d85b8a582a5d
      https://github.com/llvm/llvm-project/commit/90e3ac6c55e61f0cc9ec9921dfa9d85b8a582a5d
  Author: Vitaly Buka <vitalybuka at google.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M llvm/docs/ReleaseNotes.md
    M llvm/include/llvm-c/Core.h
    M llvm/include/llvm/IR/Instructions.h
    M llvm/include/llvm/IR/User.h
    M llvm/lib/Bitcode/Writer/ValueEnumerator.cpp
    M llvm/lib/CodeGen/TypePromotion.cpp
    M llvm/lib/IR/Core.cpp
    M llvm/lib/IR/Instructions.cpp
    M llvm/lib/IR/User.cpp
    M llvm/lib/IR/Verifier.cpp
    M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
    M llvm/unittests/IR/InstructionsTest.cpp
    M llvm/unittests/IR/VerifierTest.cpp

  Log Message:
  -----------
  Revert "[IR] Don't store switch case values as operands" (#170962)

Reverts llvm/llvm-project#166842

Breaks Mips LLVM tests, and LLD on bots.
See llvm/llvm-project#166842


  Commit: b889df39d61ba4ca003473749ee620fab87895b0
      https://github.com/llvm/llvm-project/commit/b889df39d61ba4ca003473749ee620fab87895b0
  Author: Teresa Johnson <tejohnson at google.com>
  Date:   2025-12-05 (Fri, 05 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
    M llvm/test/Transforms/PGOProfile/memprof-dump-matched-alloc-site.ll

  Log Message:
  -----------
  [MemProf] Add option to print function GUIDs during matching (#170946)

For debugging, add -memprof-print-function-guids option that will cause
memprof matching to emit the computed function GUID for every function
definition in the module to stderr. This is helpful because the profile
only contains the function GUID and not the names.


  Commit: 9e9e64af48bce45c8f569e02d568ec58a855aadb
      https://github.com/llvm/llvm-project/commit/9e9e64af48bce45c8f569e02d568ec58a855aadb
  Author: Sairudra More <sairudra60 at gmail.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M clang/lib/CodeGen/CGOpenMPRuntime.cpp
    M clang/test/OpenMP/target_defaultmap_codegen_01.cpp
    A clang/test/OpenMP/target_firstprivate_pointer_codegen.cpp
    M clang/test/OpenMP/target_map_codegen_26.cpp

  Log Message:
  -----------
  [OpenMP] Fix defaultmap(firstprivate:pointer) handling  (#169622)

This fixes a bug where pointers from defaultmap(firstprivate:pointer)
were incorrectly treated as firstprivate literals, causing
OMP_MAP_LITERAL to be set. This prevented the runtime from performing
device address lookup.
Realted PR https://github.com/llvm/llvm-project/pull/167879

Co-authored-by: Sairudra More <moresair at pe31.hpc.amslabs.hpecorp.net>


  Commit: 75aa7bdf45fc810bbf5efd3d029948857ded4de5
      https://github.com/llvm/llvm-project/commit/75aa7bdf45fc810bbf5efd3d029948857ded4de5
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M compiler-rt/test/asan/TestCases/scariness_score_test.cpp

  Log Message:
  -----------
  [ASan] Disable another test on Darwin due to ulimit stack issues

Similar to #170786.


  Commit: 8fe38c4c9c71c7a86ecdba476ee5bae4c02c0dfe
      https://github.com/llvm/llvm-project/commit/8fe38c4c9c71c7a86ecdba476ee5bae4c02c0dfe
  Author: Timm Baeder <tbaeder at redhat.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M clang/lib/AST/ByteCode/Descriptor.cpp
    M clang/lib/AST/ByteCode/Descriptor.h
    M clang/lib/AST/ByteCode/Disasm.cpp
    M clang/lib/AST/ByteCode/EvaluationResult.cpp
    M clang/lib/AST/ByteCode/Interp.cpp
    M clang/lib/AST/ByteCode/Interp.h
    M clang/lib/AST/ByteCode/InterpBuiltin.cpp
    M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
    M clang/lib/AST/ByteCode/InterpBuiltinBitCast.h
    M clang/lib/AST/ByteCode/Pointer.cpp
    M clang/lib/AST/ByteCode/Pointer.h
    M clang/test/AST/ByteCode/const-eval.c

  Log Message:
  -----------
  [clang][bytecode] Allocate InitMaps via Program/InterpState allocators (#170272)

Save them as a pointer intead of using a shared_ptr. This we we can use
the pointer integer value to differentiate the "no initmap yet" and "all
values initialzed" cases.

This regresses one test case in const-eval.c, but as it turns out, that
only worked coincidentally before.


  Commit: 5fc8e87fe20d41654d8efc6bc93f7503b3bfdd36
      https://github.com/llvm/llvm-project/commit/5fc8e87fe20d41654d8efc6bc93f7503b3bfdd36
  Author: Nishant Patel <nishant.b.patel at intel.com>
  Date:   2025-12-05 (Fri, 05 Dec 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
    M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
    M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
    M mlir/lib/Dialect/XeGPU/TransformOps/XeGPUTransformOps.cpp
    M mlir/lib/Dialect/XeGPU/Transforms/XeGPUOptimizeBlockLoads.cpp
    M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
    M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
    M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir

  Log Message:
  -----------
  [MLIR][XeGPU] Retain anchor op layouts for XeGPU nD ops (#170934)

This PR adds support to retain the anchor op layouts (after dropping
what's not required) for xegpu nD ops during workgroup to subgroup &
unroll transformation


  Commit: fa2eabd7706d2f47064c980b456d3a255e9ea3f3
      https://github.com/llvm/llvm-project/commit/fa2eabd7706d2f47064c980b456d3a255e9ea3f3
  Author: Kunqiu Chen <camsyn at foxmail.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M clang/test/Headers/__clang_hip_math.hip
    M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
    M llvm/test/Transforms/SimplifyCFG/hoist-common-code.ll

  Log Message:
  -----------
  [SimplifyCFG] Hoist common code for switch multi-case destinations (#165700)

Previously, hoistCommonCodeFromSuccessors did not support hoisting
common code for multi-case destinations of `switch`.

However, if all the predecessors of a given Succ are the same (i.e.,
multi-case destination), it is safe to hoist the common code from Succ
to Pred, which is what this PR does.

See discussion
https://github.com/llvm/llvm-project/pull/165570#discussion_r2473290327.
Alive2 proof: https://alive2.llvm.org/ce/z/cYuczq
Optimization Impact:
https://github.com/dtcxzyw/llvm-opt-benchmark/pull/3003


  Commit: 979462c876c96c3023c0b5e42c8eda88323fd745
      https://github.com/llvm/llvm-project/commit/979462c876c96c3023c0b5e42c8eda88323fd745
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
    M llvm/lib/Target/AMDGPU/CMakeLists.txt
    R llvm/lib/Target/AMDGPU/InstCombineTables.td
    M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn

  Log Message:
  -----------
  [AMDGPU] Eliminate InstCombineTables.td. NFC. (#170857)

This also eliminates the generated file InstCombineTables.inc which was
99% identical to the existing AMDGPUGenSearchableTables.inc.


  Commit: 9dc8caef09d9d0b631639e54de097b4603b9c369
      https://github.com/llvm/llvm-project/commit/9dc8caef09d9d0b631639e54de097b4603b9c369
  Author: Benjamin Kramer <benny.kra at googlemail.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel

  Log Message:
  -----------
  [bazel] Port 979462c876c96c3023c0b5e42c8eda88323fd745


  Commit: dda048665317077d677cea0a15894be4d021b9c7
      https://github.com/llvm/llvm-project/commit/dda048665317077d677cea0a15894be4d021b9c7
  Author: Alexander Root <32245479+rootjalex at users.noreply.github.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M mlir/docs/LangRef.md

  Log Message:
  -----------
  [MLIR] Update broken link in LangRef.md (#170938)

Noticed the link was dead when reading the docs. According to the
wayback machine, it was a link to "Revisiting Out-of-SSA Translation for
Correctness, Code Quality, and Efficiency" by Boissinot et al., so
providing a more permanent link.


  Commit: af27159e17b91cc5f49c2b6ed24f3d422312d6ec
      https://github.com/llvm/llvm-project/commit/af27159e17b91cc5f49c2b6ed24f3d422312d6ec
  Author: Baranov Victor <bar.victor.2002 at gmail.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M clang-tools-extra/test/clang-tidy/infrastructure/alphabetical-order.test

  Log Message:
  -----------
  [clang-tidy] Show correct diff instructions when check_alphabetical_order.py fails (#170971)

Before the change, when given such incorrect ordering:
```
   :doc:`modernize-use-designated-initializers <modernize/use-designated-initializers>`, "Yes"
   :doc:`modernize-use-equals-default <modernize/use-equals-default>`, "Yes"
   :doc:`modernize-use-emplace <modernize/use-emplace>`, "Yes"
   :doc:`modernize-use-equals-delete <modernize/use-equals-delete>`, "Yes"
   :doc:`modernize-use-integer-sign-comparison <modernize/use-integer-sign-comparison>`, "Yes"
```
Script output suggested removing `modernize-use-equals-default` line
that came after `modernize-use-emplace` but in my actual file, we can
see that current ordering is different (same as 2nd part of the diff):
```
# |      :doc:`modernize-use-constraints <modernize/use-constraints>`, "Yes"
# |      :doc:`modernize-use-default-member-init <modernize/use-default-member-init>`, "Yes"
# |      :doc:`modernize-use-designated-initializers <modernize/use-designated-initializers>`, "Yes"
# |      :doc:`modernize-use-emplace <modernize/use-emplace>`, "Yes"
# | -    :doc:`modernize-use-equals-default <modernize/use-equals-default>`, "Yes"
# |      :doc:`modernize-use-equals-delete <modernize/use-equals-delete>`, "Yes"
# |      :doc:`modernize-use-integer-sign-comparison <modernize/use-integer-sign-comparison>`, "Yes"
# |      :doc:`modernize-use-nodiscard <modernize/use-nodiscard>`, "Yes"
# | --- 316,323 ----
# |      :doc:`modernize-use-constraints <modernize/use-constraints>`, "Yes"
# |      :doc:`modernize-use-default-member-init <modernize/use-default-member-init>`, "Yes"
# |      :doc:`modernize-use-designated-initializers <modernize/use-designated-initializers>`, "Yes"
# | +    :doc:`modernize-use-equals-default <modernize/use-equals-default>`, "Yes"
# |      :doc:`modernize-use-emplace <modernize/use-emplace>`, "Yes"
# |      :doc:`modernize-use-equals-delete <modernize/use-equals-delete>`, "Yes"
```

We need to invert the diff, so the user can correctly follow its
recommendations.


  Commit: 830ef4e4e2d0f181ed1cfacbc3daacb2555ff9e4
      https://github.com/llvm/llvm-project/commit/830ef4e4e2d0f181ed1cfacbc3daacb2555ff9e4
  Author: Michael Kruse <llvm-project at meinersbur.de>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M openmp/CMakeLists.txt
    A openmp/cmake/modules/LibompCheckFortranFlag.cmake
    A openmp/cmake/modules/LibompHandleFlags.cmake
    A openmp/cmake/modules/LibompUtils.cmake
    A openmp/module/CMakeLists.txt
    A openmp/module/omp_lib.F90.var
    A openmp/module/omp_lib.h.var
    M openmp/runtime/CMakeLists.txt
    R openmp/runtime/cmake/LibompCheckFortranFlag.cmake
    M openmp/runtime/cmake/LibompExports.cmake
    R openmp/runtime/cmake/LibompHandleFlags.cmake
    R openmp/runtime/cmake/LibompUtils.cmake
    M openmp/runtime/cmake/config-ix.cmake
    M openmp/runtime/src/CMakeLists.txt
    R openmp/runtime/src/include/omp_lib.F90.var
    R openmp/runtime/src/include/omp_lib.h.var

  Log Message:
  -----------
  [openmp][NFCI] Move .mod code out of runtimes subdir (#169909)

Extracted out of #169638. The motivation is that we want to build
Fortran module files for device triples (amdgpu-amd-amdhsa and
nvptx64-nvidia-cuda) as well, but the runtimes/ directory is only
included for host devices.

This PR itself should not change anything, including that omp_lib.mod is
only built on host devices triple. Some dependencies used for building
omp_lib.mod are hoisted out of runtimes/ as well. IMHO they all make
sense to hoist, e.g. LIBOMP_VERSION_MAJOR/LIBOMP_VERSION_MINOR should be
usable in the entire OpenMP subproject.


  Commit: 404a9032c78f85241c952a97d1d363b9ae865cc1
      https://github.com/llvm/llvm-project/commit/404a9032c78f85241c952a97d1d363b9ae865cc1
  Author: Baranov Victor <bar.victor.2002 at gmail.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M clang-tools-extra/clang-tidy/tool/check_alphabetical_order.py
    M clang-tools-extra/clang-tidy/tool/check_alphabetical_order_test.py

  Log Message:
  -----------
  [clang-tidy] Show descriptive error message when check_alphabetical_order.py fails (#170975)

Now we give clearer instructions on how to interpret the output of the
script to fix issues it reported


  Commit: 6d38c876478dac4a42f9d6e37692348deabf6a25
      https://github.com/llvm/llvm-project/commit/6d38c876478dac4a42f9d6e37692348deabf6a25
  Author: Martin Storsjö <martin at martin.st>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/include/clang/Basic/CodeGenOptions.def
    M clang/include/clang/Options/Options.td
    M clang/lib/CodeGen/CGCall.cpp
    R clang/test/CodeGen/lifetime-call-temp.c
    R clang/test/CodeGen/lifetime-invoke-c.c
    R clang/test/CodeGenCXX/aggregate-lifetime-invoke.cpp
    R clang/test/CodeGenCXX/amdgcn-call-with-aggarg.cc
    M clang/test/CodeGenCXX/stack-reuse-miscompile.cpp
    M clang/test/CodeGenCoroutines/pr59181.cpp

  Log Message:
  -----------
  Revert "[clang] Limit lifetimes of temporaries to the full expression (#170517)"

This reverts commit 5daad5bf45b3c7280f7b06979fb580f70e2c4fd0.

That commit caused broken compilation for some cases, see
https://github.com/llvm/llvm-project/pull/170517#issuecomment-3620079591.


  Commit: ba836dc5ede411f90a8f5ba1f706983db8caf4e7
      https://github.com/llvm/llvm-project/commit/ba836dc5ede411f90a8f5ba1f706983db8caf4e7
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
    M llvm/test/Transforms/LoopVectorize/vplan-printing.ll

  Log Message:
  -----------
  [VPlan] Remove stray space before ops when printing vector-ptr (NFC)


  Commit: 9031544772dc3a39c27feccf845a43ec38925bc0
      https://github.com/llvm/llvm-project/commit/9031544772dc3a39c27feccf845a43ec38925bc0
  Author: Hristo Hristov <hghristov.rmm at gmail.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M libcxx/include/__bit_reference
    M libcxx/include/bitset
    A libcxx/test/libcxx/utilities/template.bitset/nodiscard.verify.cpp

  Log Message:
  -----------
  [libc++][bitset] Applied `[[nodiscard]]` (#170623)

`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.

- https://libcxx.llvm.org/CodingGuidelines.html
- https://wg21.link/bitset


  Commit: 6bb786398efdbc496edd517e682caeaaefd46f6e
      https://github.com/llvm/llvm-project/commit/6bb786398efdbc496edd517e682caeaaefd46f6e
  Author: Amr Hesham <amr96 at programmer.net>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M clang/include/clang/CIR/Dialect/IR/CIROps.td
    A clang/test/CIR/IR/catch-param.cir

  Log Message:
  -----------
  [CIR] Add structured CatchParamOp (#165110)

Upstream, the structured CatchParamOp as a prerequisite for implementing
exception handlers

Issue https://github.com/llvm/llvm-project/issues/154992


  Commit: ddd770d97b2c4a071d4cd9cb471ed9a397e0135c
      https://github.com/llvm/llvm-project/commit/ddd770d97b2c4a071d4cd9cb471ed9a397e0135c
  Author: Hristo Hristov <hghristov.rmm at gmail.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M libcxx/include/__exception/exception.h
    M libcxx/include/__exception/nested_exception.h
    M libcxx/include/__exception/operations.h
    M libcxx/include/__system_error/error_category.h
    M libcxx/include/__system_error/error_code.h
    M libcxx/include/__system_error/error_condition.h
    M libcxx/include/__system_error/system_error.h
    M libcxx/include/stdexcept
    A libcxx/test/libcxx/diagnostics/syserr/nodiscard.verify.cpp
    M libcxx/test/libcxx/language.support/nodiscard.verify.cpp

  Log Message:
  -----------
  [libc++] Applied `[[nodiscard]]` to `<exception>`, `<stdexcept>` and `<system_error>` (#170837)

[[nodiscard]] should be applied to functions where discarding the return
value is most likely a correctness issue.

- https://libcxx.llvm.org/CodingGuidelines.html


  Commit: 0cd523e55244db709987b619a7a9a2add94869fc
      https://github.com/llvm/llvm-project/commit/0cd523e55244db709987b619a7a9a2add94869fc
  Author: Dark Steve <Prasoon.Mishra at amd.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M llvm/lib/CodeGen/PHIElimination.cpp
    A llvm/test/CodeGen/AMDGPU/phi-elim-mli-available.mir

  Log Message:
  -----------
  [PHIElimination] Declare MachineLoopInfo dependency for Legacy PM (#169693)

PHIElimination uses MachineLoopInfo for loop-exiting critical edge
splitting but wasn't declaring this dependency via addUsedIfAvailable()
in getAnalysisUsage(). Without this declaration, the pass manager does
not make MachineLoopInfo accessible to PHIElimination, causing
getAnalysisIfAvailable() to return nullptr.

Without MachineLoopInfo, the loop-exiting edge optimization doesn't
fire, resulting in fewer critical edge splits and potentially suboptimal
code placement.

This patch adds:
- MachineLoopInfo as an optional dependency
- A test that verifies the optimization fires when MLI is accessible


  Commit: 0e5fd438f407712b220510a2fd2e094d3b49d43e
      https://github.com/llvm/llvm-project/commit/0e5fd438f407712b220510a2fd2e094d3b49d43e
  Author: Baranov Victor <bar.victor.2002 at gmail.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M clang-tools-extra/clang-tidy/.clang-tidy
    M clang-tools-extra/clang-tidy/bugprone/UnsafeFunctionsCheck.cpp
    M clang-tools-extra/clang-tidy/utils/UseRangesCheck.cpp

  Log Message:
  -----------
  [clang-tidy][NFC] Add a few cppcoreguidelines checks to codebase (#170977)


  Commit: a805147ac1ba123916de182babb0831fbb148756
      https://github.com/llvm/llvm-project/commit/a805147ac1ba123916de182babb0831fbb148756
  Author: Baranov Victor <bar.victor.2002 at gmail.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M clang-tools-extra/clang-tidy/NoLintDirectiveHandler.cpp
    M clang-tools-extra/clang-tidy/bugprone/ChainedComparisonCheck.cpp
    M clang-tools-extra/clang-tidy/bugprone/DanglingHandleCheck.cpp
    M clang-tools-extra/clang-tidy/bugprone/NonZeroEnumToBoolConversionCheck.cpp
    M clang-tools-extra/clang-tidy/llvm/UseNewMLIROpBuilderCheck.cpp
    M clang-tools-extra/clang-tidy/modernize/MakeSmartPtrCheck.cpp
    M clang-tools-extra/clang-tidy/readability/RedundantInlineSpecifierCheck.cpp
    M clang-tools-extra/clang-tidy/readability/RedundantStringInitCheck.cpp
    M clang-tools-extra/clang-tidy/utils/LexerUtils.cpp
    M clang-tools-extra/clang-tidy/utils/TransformerClangTidyCheck.cpp

  Log Message:
  -----------
  [clang-tidy][NFC] Remove unused headers (flagged by misc-include-cleaner) (#170982)

But `misc-include-cleaner` still has reasonable amount of FP in
codebase, so we can't enable it clang-tidy.


  Commit: ff05da6042f0fba9fca6c6c18d0337ccf499b60d
      https://github.com/llvm/llvm-project/commit/ff05da6042f0fba9fca6c6c18d0337ccf499b60d
  Author: Baranov Victor <bar.victor.2002 at gmail.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M clang-tools-extra/clang-tidy/.clang-tidy
    M clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
    M clang-tools-extra/clang-tidy/altera/StructPackAlignCheck.cpp
    M clang-tools-extra/clang-tidy/altera/UnrollLoopsCheck.cpp
    M clang-tools-extra/clang-tidy/bugprone/SuspiciousMissingCommaCheck.cpp
    M clang-tools-extra/clang-tidy/misc/ConfusableIdentifierCheck.cpp
    M clang-tools-extra/clang-tidy/misc/MisleadingBidirectionalCheck.cpp
    M clang-tools-extra/clang-tidy/misc/MisleadingIdentifierCheck.cpp
    M clang-tools-extra/clang-tidy/openmp/UseDefaultNoneCheck.cpp
    M clang-tools-extra/clang-tidy/readability/FunctionCognitiveComplexityCheck.cpp

  Log Message:
  -----------
  [clang-tidy][NFC] Add google-readability-casting check to codebase (#170980)


  Commit: 8dee997a8558b460b82b23fb43b197d68258baac
      https://github.com/llvm/llvm-project/commit/8dee997a8558b460b82b23fb43b197d68258baac
  Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
    M llvm/test/CodeGen/AMDGPU/promote-alloca-multidim.ll
    M llvm/test/CodeGen/AMDGPU/promote-alloca-negative-index.ll
    M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-to-vector.ll

  Log Message:
  -----------
  Reland "AMDGPU/PromoteAlloca: Always use i32 for indexing (#170511)" (#170956)

Create more canonical code that may even lead to slightly better
codegen.


  Commit: 4930e94011f6c62231de880273821d453dae0f14
      https://github.com/llvm/llvm-project/commit/4930e94011f6c62231de880273821d453dae0f14
  Author: owenca <owenpiano at gmail.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M clang/lib/Format/UnwrappedLineParser.cpp
    M clang/unittests/Format/TokenAnnotatorTest.cpp

  Log Message:
  -----------
  [clang-format] Fix a regression in annotating star before lambda (#170969)

Fixes #170573


  Commit: 49a7772be5bfc86a64103a08a190133f7e4ea823
      https://github.com/llvm/llvm-project/commit/49a7772be5bfc86a64103a08a190133f7e4ea823
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M llvm/include/llvm/CodeGen/MachineFrameInfo.h
    M llvm/include/llvm/CodeGen/TargetFrameLowering.h
    M llvm/lib/CodeGen/PrologEpilogInserter.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.h
    M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
    M llvm/lib/Target/AMDGPU/SIFrameLowering.h
    M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
    M llvm/lib/Target/RISCV/RISCVFrameLowering.h

  Log Message:
  -----------
  [CodeGen] Replace (Min,Max)CSFrameIndex with flag on frame object [NFCI] (#170905)

This removes the tracking of the MinCSFrameIndex, and MaxCSFrameIndex markers, simplifying the target API. This brings the tracking for callee save spill slots in line with how we handle other properties of stack locations.

A couple notes:
1) This requires doing scans of the entire object range, but we have other such instances in the code already, so I doubt this will matter in practice.
2) This removes the requirement that callee saved spill slots be contiguous in the frame index identified space.

I marked this as NFCI because if prior code violated the contiguous range assumption - I can't find a case where we did - then this change might adjust frame layout in some edge cases.

The motivation for this is mostly code readability, but I might use this as a primitive for something in an upcoming patch series around shrink wrapping. Haven't decided yet.


  Commit: 02482f42739e5b16035f4169923cb6abe0bb9698
      https://github.com/llvm/llvm-project/commit/02482f42739e5b16035f4169923cb6abe0bb9698
  Author: Maksim Panchenko <maks at fb.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M bolt/include/bolt/Core/BinaryFunction.h
    M bolt/lib/Core/BinaryFunction.cpp
    M bolt/test/X86/unclaimed-jt-entries.s
    M bolt/test/runtime/X86/unclaimed-jt-entries.s

  Log Message:
  -----------
  [BOLT] Properly validate relocations against internals of a function (#167451)

Validation of data relocations targeting internals of a function was
happening based on offsets inside a function. As a result, if multiple
relocations were targeting the same offset, and one of the relocations
was verified, e.g. as belonging to a jump table, then all relocations
targeting the offset would be considered verified and valid.

Now that we are tracking relocations pointing inside every function, we
can do a better validation based on the location of the relocation.
E.g., if a relocation belongs to a jump table only that relocation will
be accounted for and other relocations pointing to the same address will
be evaluated independently.


  Commit: 315c904e3e1c00ea1ec7f0757e4c538ec2513624
      https://github.com/llvm/llvm-project/commit/315c904e3e1c00ea1ec7f0757e4c538ec2513624
  Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M clang/include/clang/AST/IgnoreExpr.h

  Log Message:
  -----------
  [clang][NFC] Simplify implementation of `IgnoreExprNodes` (#164193)

Using a fold instead of template recursion.


  Commit: 0dff5b5824f2fb958039da7f55b501127476a7c3
      https://github.com/llvm/llvm-project/commit/0dff5b5824f2fb958039da7f55b501127476a7c3
  Author: Feng Zou <feng.zou at intel.com>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86CompressEVEX.cpp
    M llvm/test/CodeGen/X86/apx/compress-evex.mir
    M llvm/test/TableGen/x86-instr-mapping.inc
    M llvm/utils/TableGen/X86InstrMappingEmitter.cpp
    M llvm/utils/TableGen/X86ManualInstrMapping.def

  Log Message:
  -----------
  [X86][APX] Compress setzucc with memory operand to setcc (#170842)

setzucc with memory operand is same as setcc but the later is shorter.


  Commit: 3b355b26bf4e8d5706a0a920698c1611357479f4
      https://github.com/llvm/llvm-project/commit/3b355b26bf4e8d5706a0a920698c1611357479f4
  Author: Jacques Pienaar <jpienaar at google.com>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M mlir/tools/mlir-tblgen/PassGen.cpp

  Log Message:
  -----------
  [mlir] Remove deprecated GEN_PASS_CLASSES. (#166904)

This was marked as deprecated in 2022, but as comment. Switch to error
to make visible and stop generating. Will remove the error message in
follow up, just felt this was easier for folks to understand compilation
errors. The change required to new form is rather minimal.


  Commit: bdb918e10a0856080b697ca7fce13263b6b63867
      https://github.com/llvm/llvm-project/commit/bdb918e10a0856080b697ca7fce13263b6b63867
  Author: Matthias Springer <me at m-sp.org>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
    M mlir/test/Conversion/ArithToApfloat/arith-to-apfloat.mlir

  Log Message:
  -----------
  [mlir][arith] `arith-to-apfloat`: Bail on unsupported bitwidth (#170994)

Bitwidths greater than 64 are not supported by `arith-to-apfloat`.


  Commit: a1ba1fa5788c4cc0e72b7af6a555eb046510e86c
      https://github.com/llvm/llvm-project/commit/a1ba1fa5788c4cc0e72b7af6a555eb046510e86c
  Author: Gil Rapaport <gil.rapaport at mobileye.com>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M mlir/lib/Target/Cpp/TranslateToCpp.cpp

  Log Message:
  -----------
  [mlir][emitc] Simplify inlining logic (NFCI) (#169978)

This change makes inlining logic in the translator simpler and more
consistent by

(a) Extending the inlining concept to include CExpression ops, which by
    definition are inlined if and only if they reside within an
    ExpressionOp.

(b) Concentraing all inlining decisions in `shouldBeInlined()` to make
    sure that ops get the same decision when queried as operations and
    as operands.


  Commit: fb0400fe1f1f9e83f3148db8ce2c72ab5bc6728e
      https://github.com/llvm/llvm-project/commit/fb0400fe1f1f9e83f3148db8ce2c72ab5bc6728e
  Author: Gil Rapaport <gil.rapaport at mobileye.com>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M mlir/lib/Target/Cpp/TranslateToCpp.cpp
    M mlir/test/Target/Cpp/common-cpp.mlir

  Log Message:
  -----------
  [mlir][emitc] Fix bug in dereference translation (#171028)

The op was not added to `hasDeferredEmission()` when introduced by
f17abc280c70, causing incorrect translation.


  Commit: 73a13839d3ec4dab9330b3909890105efad9b3bd
      https://github.com/llvm/llvm-project/commit/73a13839d3ec4dab9330b3909890105efad9b3bd
  Author: Hui <hui.xie1990 at gmail.com>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M libcxx/docs/ABIGuarantees.rst
    M libcxx/docs/ReleaseNotes/22.rst
    M libcxx/include/__atomic/atomic.h
    M libcxx/include/__atomic/atomic_flag.h
    M libcxx/include/__atomic/atomic_ref.h
    M libcxx/include/__atomic/atomic_sync.h
    M libcxx/include/__atomic/contention_t.h
    M libcxx/include/__configuration/abi.h
    M libcxx/include/__configuration/availability.h
    M libcxx/lib/abi/CHANGELOG.TXT
    M libcxx/lib/abi/arm64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
    M libcxx/lib/abi/i686-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
    M libcxx/lib/abi/powerpc-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
    M libcxx/lib/abi/powerpc64-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
    M libcxx/lib/abi/x86_64-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
    M libcxx/lib/abi/x86_64-unknown-freebsd.libcxxabi.v1.stable.exceptions.nonew.abilist
    M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.exceptions.nonew.abilist
    M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.noexceptions.nonew.abilist
    M libcxx/src/atomic.cpp
    M libcxx/test/libcxx/atomics/atomics.syn/wait.issue_85107.pass.cpp
    A libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.wait/lost_wakeup.pass.cpp

  Log Message:
  -----------
  [libc++] Allows any types of size 4 and 8 to use native platform ulock_wait (#161086)

This is to address #146145

The issue before was that, for `std::atomic::wait/notify`, we only
support `uint64_t` to go through the native `ulock_wait` directly. Any
other types will go through the global contention table's `atomic`,
increasing the chances of spurious wakeup. This PR tries to allow any
types that are of size 4 or 8 to directly go to the `ulock_wait`.

This PR is just proof of concept. If we like this idea, I can go further
to update the Linux/FreeBSD branch and add ABI macros so the existing
behaviours are reserved under the stable ABI

Here are some benchmark results

```
Benchmark                                                               Time             CPU      Time Old      Time New       CPU Old       CPU New
----------------------------------------------------------------------------------------------------------------------------------------------------
BM_stop_token_single_thread_reg_unreg_callback/1024                  -0.1113         -0.1165         51519         45785         51397         45408
BM_stop_token_single_thread_reg_unreg_callback/4096                  -0.2727         -0.1447        249685        181608        211865        181203
BM_stop_token_single_thread_reg_unreg_callback/65536                 -0.1241         -0.1237       3308930       2898396       3300986       2892608
BM_stop_token_single_thread_reg_unreg_callback/262144                +0.0335         -0.1920      13237682      13681632      13208849      10673254
OVERALL_GEOMEAN                                                      -0.1254         -0.1447             0             0             0             0
```

```
Benchmark                                                                                    Time             CPU      Time Old      Time New       CPU Old       CPU New
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------
BM_1_atomic_1_waiter_1_notifier<KeepNotifying, NumHighPrioTasks<0>>/65536                 -0.3344         -0.2424       5960741       3967212       5232250       3964085
BM_1_atomic_1_waiter_1_notifier<KeepNotifying, NumHighPrioTasks<0>>/131072                -0.1474         -0.1475       9144356       7796745       9137547       7790193
BM_1_atomic_1_waiter_1_notifier<KeepNotifying, NumHighPrioTasks<0>>/262144                -0.1336         -0.1340      18333441      15883805      18323711      15868500
OVERALL_GEOMEAN                                                                           -0.2107         -0.1761             0             0             0             0
```

```
Benchmark                                                                                                             Time             CPU      Time Old      Time New       CPU Old       CPU New
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<2>, NumHighPrioTasks<0>>/16384                +0.2321         -0.0081        836618       1030772        833197        826476
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<2>, NumHighPrioTasks<0>>/32768                -0.3034         -0.1329       2182721       1520569       1747211       1515028
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<2>, NumHighPrioTasks<0>>/65536                -0.0924         -0.0924       3389098       3075897       3378486       3066448
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<8>, NumHighPrioTasks<0>>/4096                 +0.0464         +0.0474        664233        695080        657736        688892
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<8>, NumHighPrioTasks<0>>/8192                 -0.0279         -0.0267       1336041       1298794       1324270       1288953
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<8>, NumHighPrioTasks<0>>/16384                +0.0270         +0.0304       2543004       2611786       2517471       2593975
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<32>, NumHighPrioTasks<0>>/1024                +0.0423         +0.0941        473621        493657        325604        356245
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<32>, NumHighPrioTasks<0>>/2048                +0.0420         +0.0675        906266        944349        636253        679169
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<32>, NumHighPrioTasks<0>>/4096                +0.0359         +0.0378       1761584       1824783       1015092       1053439
OVERALL_GEOMEAN                                                                                                    -0.0097         -0.0007             0             0             0             0
```

```
Benchmark                                                                                                        Time             CPU      Time Old      Time New       CPU Old       CPU New
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<2>, NumHighPrioTasks<0>>/4096                 -0.0990         -0.1001        371100        334370        369984        332955
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<2>, NumHighPrioTasks<0>>/8192                 -0.0305         -0.0314        698228        676908        696418        674585
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<2>, NumHighPrioTasks<0>>/16384                -0.0258         -0.0268       1383530       1347894       1380665       1343680
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<8>, NumHighPrioTasks<0>>/1024                 +0.0465         +0.4702        937821        981388        472087        694082
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<8>, NumHighPrioTasks<0>>/2048                 +0.1596         +0.9140       1704819       1976899        616419       1179852
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<8>, NumHighPrioTasks<0>>/4096                 -0.1018         -0.2316       3793976       3407609       1912209       1469331
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<32>, NumHighPrioTasks<0>>/256                 +0.0395         +0.5818      30102662      31292982        174650        276270
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<32>, NumHighPrioTasks<0>>/512                 -0.0065         +1.2860      33079634      32863968        162150        370680
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<32>, NumHighPrioTasks<0>>/1024                -0.0325         +0.4683      36581740      35392385        282320        414520
OVERALL_GEOMEAN                                                                                               -0.0084         +0.2878             0             0             0             0
```

---------

Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>


  Commit: 1226a6d8c34ca007c4192e6039866a65b98b2625
      https://github.com/llvm/llvm-project/commit/1226a6d8c34ca007c4192e6039866a65b98b2625
  Author: mitchell <mitchell.xu2 at gmail.com>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M clang-tools-extra/test/clang-tidy/infrastructure/Inputs/param/parameters.txt

  Log Message:
  -----------
  [clang-tidy] Fix fragile test in `read-parameters-from-file` (#171033)

[CommandLine.cpp](https://github.com/llvm/llvm-project/blob/fb0400fe1f1f9e83f3148db8ce2c72ab5bc6728e/llvm/lib/Support/CommandLine.cpp#L940)
treats single quote as literal characters on Windows, so the argument is
parsed as a check named `' -*,llvm-namespace-comment '`, which matches
no existing checks, so no checks are enabled via the command line.

Previously, the test passed because it fell back to the root
`.clang-tidy` configuration which enables `llvm-*`.


  Commit: 9e7ce77573b2fad126a367475cbe807c10826691
      https://github.com/llvm/llvm-project/commit/9e7ce77573b2fad126a367475cbe807c10826691
  Author: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/docs/UsersManual.rst
    M clang/include/clang/Basic/CodeGenOptions.def
    M clang/include/clang/Options/Options.td
    M clang/lib/CodeGen/BackendUtil.cpp
    M clang/lib/CodeGen/CGClass.cpp
    M clang/lib/CodeGen/CGVTables.cpp
    M clang/lib/CodeGen/ItaniumCXXABI.cpp
    M clang/lib/Driver/ToolChains/Clang.cpp
    A clang/test/CodeGenCXX/speculative-devirt-metadata.cpp
    M clang/test/Driver/clang_f_opts.c
    M llvm/include/llvm/Passes/PassBuilder.h
    M llvm/include/llvm/Transforms/IPO/WholeProgramDevirt.h
    M llvm/lib/Passes/PassBuilderPipelines.cpp
    M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
    A llvm/test/Transforms/PhaseOrdering/speculative-devirt-then-inliner.ll
    A llvm/test/Transforms/WholeProgramDevirt/devirt-metadata.ll

  Log Message:
  -----------
  [Clang]: Support opt-in speculative devirtualization (#159685)

This patch adds Clang support for speculative devirtualization and
integrates the related pass into the pass pipeline.
It's building on the LLVM backend implementation from PR #159048.
Speculative devirtualization transforms an indirect call (the virtual
function) to a guarded direct call.
It is guarded by a comparison of the virtual function pointer to the
expected target.
This optimization is still safe without LTO because it doesn't do direct
calls, it's conditional according to the function ptr.
This optimization:
- Opt-in: Disabled by default, enabled via `-fdevirtualize-speculatively`
- Works in non-LTO mode
- Handles publicly-visible objects.
- Uses guarded devirtualization with fallback to indirect calls when the
speculation is incorrect.

For this C++ example:
```
class Base {
public:
    __attribute__((noinline))
    virtual void virtual_function1() { asm volatile("NOP"); }
    virtual void virtual_function2() { asm volatile("NOP"); }
};
class Derived : public Base {
public:
    void virtual_function2() override { asm volatile("NOP"); }
};
__attribute__((noinline))
void foo(Base *BV) {
    BV->virtual_function1();
}
void bar() {
    Base *b = new Derived();
    foo(b);
}
```
Here is the IR without enabling speculative devirtualization:
```
define dso_local void @_Z3fooP4Base(ptr noundef %BV) local_unnamed_addr #0 {
entry:
  %vtable = load ptr, ptr %BV, align 8, !tbaa !6
  %0 = load ptr, ptr %vtable, align 8
  tail call void %0(ptr noundef nonnull align 8 dereferenceable(8) %BV)
  ret void
}
```
IR after enabling speculative devirtualization:
```
define dso_local void @_Z3fooP4Base(ptr noundef %BV) local_unnamed_addr #0 {
entry:
  %vtable = load ptr, ptr %BV, align 8, !tbaa !12
  %0 = load ptr, ptr %vtable, align 8
  %1 = icmp eq ptr %0, @_ZN4Base17virtual_function1Ev
  br i1 %1, label %if.true.direct_targ, label %if.false.orig_indirect, !prof !15

if.true.direct_targ:                              ; preds = %entry
  tail call void @_ZN4Base17virtual_function1Ev(ptr noundef nonnull align 8 dereferenceable(8) %BV)
  br label %if.end.icp

if.false.orig_indirect:                           ; preds = %entry
  tail call void %0(ptr noundef nonnull align 8 dereferenceable(8) %BV)
  br label %if.end.icp

if.end.icp:                                       ; preds = %if.false.orig_indirect, %if.true.direct_targ
  ret void
}
```


  Commit: 3fc741923643040cc17ef9562983994e73c74efb
      https://github.com/llvm/llvm-project/commit/3fc741923643040cc17ef9562983994e73c74efb
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/lib/Transforms/Vectorize/VPlan.h
    M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
    M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
    M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
    M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
    M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
    M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
    M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
    M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
    M llvm/test/Transforms/LoopVectorize/vplan-printing-reductions.ll
    M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
    M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp

  Log Message:
  -----------
  [VPlan] Replace ExtractLast(Elem|LanePerPart) with ExtractLast(Lane/Part) (#164124)

Replace ExtractLastElement and ExtractLastLanePerPart with more generic
and specific ExtractLastLane and ExtractLastPart, which model distinct
parts of extracting across parts and lanes. ExtractLastElement ==
ExtractLastLane(ExtractLastPart) and ExtractLastLanePerPart ==
ExtractLastLane, the latter clarifying the name of the opcode. A new
m_ExtractLastElement matcher is provided for convenience.

The patch should be NFC modulo printing changes.

PR: https://github.com/llvm/llvm-project/pull/164124


  Commit: 11fd760e3a13b5c519e49abc7c9e3b684a94e6f8
      https://github.com/llvm/llvm-project/commit/11fd760e3a13b5c519e49abc7c9e3b684a94e6f8
  Author: Tianqi Chen <tqchen at users.noreply.github.com>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M mlir/include/mlir-c/ExecutionEngine.h
    M mlir/lib/Bindings/Python/ExecutionEngineModule.cpp
    M mlir/lib/CAPI/ExecutionEngine/ExecutionEngine.cpp
    M mlir/test/CAPI/execution_engine.c
    M mlir/test/CAPI/global_constructors.c
    M mlir/test/python/execution_engine.py

  Log Message:
  -----------
  [MLIR][ExecutionEngine] Enable PIC option (#170995)

This PR enables the MLIR execution engine to dump object file as PIC
code, which is needed when the object file is later bundled into a dynamic
shared library.

---------

Co-authored-by: Mehdi Amini <joker.eph at gmail.com>


  Commit: 68fea00dfb736656ded58e1017733019b9664d88
      https://github.com/llvm/llvm-project/commit/68fea00dfb736656ded58e1017733019b9664d88
  Author: Alex Voicu <alexandru.voicu at amd.com>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M clang/lib/CodeGen/Targets/SPIR.cpp
    M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
    M clang/test/CodeGenCUDA/kernel-args.cu
    A clang/test/CodeGenHIP/amdgcnspirv-uses-amdgpu-abi.cpp
    M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
    A llvm/test/CodeGen/SPIRV/pointers/ptr-argument-byref-amdgcnspirv.ll

  Log Message:
  -----------
  [SPIRV] Use AMDGPU ABI for AMDGCN flavoured SPIRV (#169865)

At the moment AMDGCN flavoured SPIRV uses the SPIRV ABI with some tweaks
revolving around passing aggregates as direct. This is problematic in
multiple ways:

- it leads to divergence from code compiled for a concrete target, which
makes it difficult to debug;
- it incurs a run time cost, when dealing with larger aggregates;
- it incurs a compile time cost, when dealing with larger aggregates.

This patch switches over AMDGCN flavoured SPIRV to implement the AMDGPU
ABI (except for dealing with variadic functions, which will be added in
the future). One additional complication (and the primary motivation
behind the current less than ideal state of affairs) stems from `byref`,
which AMDGPU uses, not being expressible in SPIR-V. We deal with this by
CodeGen-ing for `byref`, lowering it to the `FuncParamAttr ByVal` in
SPIR-V, and restoring it when doing reverse translation from AMDGCN
flavoured SPIR-V.


  Commit: 7bfdaa51f155432346e507d8ce389802c92eb530
      https://github.com/llvm/llvm-project/commit/7bfdaa51f155432346e507d8ce389802c92eb530
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp

  Log Message:
  -----------
  [VPlan] Fix unused variable warning

llvm-project/llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp:312:19: warning: unused variable 'EB' [-Wunused-variable]
  312 |     VPBasicBlock *EB = Plan.getExitBlocks().front();
      |                   ^~

This showed up in a non-assertions build.


  Commit: 5dbd049662001535a475cdb7d290dfb63a0515fc
      https://github.com/llvm/llvm-project/commit/5dbd049662001535a475cdb7d290dfb63a0515fc
  Author: Matthias Springer <me at m-sp.org>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M mlir/include/mlir/Conversion/Passes.td
    M mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
    M mlir/lib/Conversion/ArithToAPFloat/CMakeLists.txt
    M mlir/test/Conversion/ArithToApfloat/arith-to-apfloat.mlir
    A mlir/test/Integration/Dialect/Arith/CPU/test-apfloat-emulation-vector.mlir

  Log Message:
  -----------
  [mlir][arith] `arith-to-apfloat`: Add vector support (#171024)

Add support for vectorized operations such as `arith.addf ... :
vector<4xf4E2M1FN>`. The computation is scalarized: scalar operands are
extracted with `vector.to_elements`, multiple scalar computations are
performed and the result is inserted back into a vector with
`vector.from_elements`.


  Commit: ffc55815ef3208a3802513c33ac66a122d2fb680
      https://github.com/llvm/llvm-project/commit/ffc55815ef3208a3802513c33ac66a122d2fb680
  Author: Alex Voicu <alexandru.voicu at amd.com>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
    M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
    M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
    M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
    M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
    M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
    M llvm/lib/Target/SPIRV/SPIRVUtils.h
    A llvm/test/CodeGen/SPIRV/pointers/fun-with-aggregate-arg-in-const-init.ll

  Log Message:
  -----------
  [SPIRV] Add support for pointers to functions with aggregate args/returns as global variables / constant initialisers (#169595)

This patch does two things:

1. it extends the aggregate arg / ret replacement transform to work on
indirect calls / pointers to function. It is somewhat spread out as
retrieving the original function type is needed in a few places. In
general, we should rethink / rework the entire infrastructure around
aggregate arg/ret handling, using an opaque target specific type rather
than i32;
2. it enables global variables of pointer to function type, and, more
specifically, global variables of a aggregate type (arrays / structures)
with pointer to function elements.

This also exposes some issues in how we handle pointers to function and
lowering indirect function calls, primarily around not using the program
address space. These will be handled in a subsequent patch as they'll
require somewhat more intrusive surgery, possibly involving modifying
the data layout.


  Commit: 359cac491195af10e7481f5a322be689ba01a267
      https://github.com/llvm/llvm-project/commit/359cac491195af10e7481f5a322be689ba01a267
  Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M clang-tools-extra/clang-tidy/fuchsia/MultipleInheritanceCheck.cpp
    M clang-tools-extra/clang-tidy/fuchsia/MultipleInheritanceCheck.h
    M clang-tools-extra/docs/ReleaseNotes.rst
    M clang-tools-extra/test/clang-tidy/checkers/fuchsia/multiple-inheritance.cpp

  Log Message:
  -----------
  [clang-tidy] Don't cache classes by name in `fuchsia-multiple-inheritance` (#171016)

Context: for every class, this check needs to compute whether that class
is an interface (i.e. only has pure virtual methods). This is expensive,
so the check caches the computation. But it caches by class name, which
is problematic, because the same name can refer to different classes at
different scopes. Here's for example a false negative it causes:
https://godbolt.org/z/bMGc5sYqh. This PR changes it to cache by
`CXXRecordDecl *` instead.


  Commit: 8378a6fa4f5c83298fb0b5e240bb7f254f7b1137
      https://github.com/llvm/llvm-project/commit/8378a6fa4f5c83298fb0b5e240bb7f254f7b1137
  Author: Matthias Springer <me at m-sp.org>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M mlir/test/Integration/Dialect/Arith/CPU/test-apfloat-emulation-vector.mlir

  Log Message:
  -----------
  [mlir][arith] Fix build after #171024 (#171057)

Fix build after #171024.


  Commit: 72b4a5d3b05d25f2442d1f6cb9105cf2cc29d4de
      https://github.com/llvm/llvm-project/commit/72b4a5d3b05d25f2442d1f6cb9105cf2cc29d4de
  Author: Vojtěch Michal <50836015+vmichal at users.noreply.github.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/copy_assign.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/deduct.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/deduct_pmr.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/initializer_list.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/iter_iter.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/move_assign.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/pmr.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/range.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/sorted_container.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/sorted_initializer_list.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/sorted_iter_iter.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.modifiers/erase_key.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.observers/comp.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy_assign.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/deduct.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/deduct_pmr.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/initializer_list.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/iter_iter.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_assign.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/pmr.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/range.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_container.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_initializer_list.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_iter_iter.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_key.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.observers/comp.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.multiset/flat.multiset.cons/move.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.multiset/flat.multiset.cons/move_assign.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.multiset/flat.multiset.cons/sorted_iter_iter.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.multiset/flat.multiset.iterators/iterator.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.set/flat.set.cons/move.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.set/flat.set.cons/move_assign.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.set/flat.set.cons/sorted_iter_iter.pass.cpp
    M libcxx/test/std/containers/container.adaptors/flat.set/flat.set.iterators/iterator.pass.cpp

  Log Message:
  -----------
  [libcxx] Removal of narrowing conversions in `flat_[multi]{set, map}` tests for compatibility with MSVC (#170909)

Impacts files in `test/std/containers/container.adaptors/flat.xxx`. No
meaning is changed; only appropriate types are spelled out to prevent
compiler warnings.

- Replace `char`s and `short`s used in tests of `flat_[multi]{set, map}`
with `long`s to prevent warnings about narrowing conversions when
running tests. Allow increased test coverage for MSVC STL.
- Make test code robust against evil overloads of operator comma .(2
files)
- Add `[[maybe_unused]]` to some local `typedef`s that are sometimes
unused due to usage of `LIBCPP_STATIC_ASSERT`.

For discussion and suggested changes, see the LLVM Discord
https://discord.com/channels/636084430946959380/636732894974312448/1445901676400742533


  Commit: 000e46219ba1ee53fc42d35e00c314c2807e8b14
      https://github.com/llvm/llvm-project/commit/000e46219ba1ee53fc42d35e00c314c2807e8b14
  Author: Jorge Gorbe Moya <jgorbe at slackito.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

  Log Message:
  -----------
  [bazel] Fix mlir build after #171024 (#171068)


  Commit: fc92e4dec9a6dfcb4fb77d863d0bf1dbc53033e5
      https://github.com/llvm/llvm-project/commit/fc92e4dec9a6dfcb4fb77d863d0bf1dbc53033e5
  Author: Mingjie Xu <xumingjie.enna1 at bytedance.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp

  Log Message:
  -----------
  [InstCombine] Fix bail-out in `PHIsEqualValue()` (#170650)

We encountered a such case: `PHIsEqualValue()` is called with a PHI node
`PN` whose incoming values are all PHI nodes, and `NonPhiInVal` is
nullptr. When the size of `ValueEqualPHIs` reaches 16, `NonPhiInVal` is
still nullptr, then we keep scanning PHI node operands, this time the
recursion won't bail out even if we have visited too many PHI nodes.

In our case, the recursion ends with ~1700 PHI nodes visited, causes
InstCombine time-consuming.


  Commit: 62355f19edd7435bbf6fdae512db3e725a0f6647
      https://github.com/llvm/llvm-project/commit/62355f19edd7435bbf6fdae512db3e725a0f6647
  Author: Mend Renovate <bot at renovateapp.com>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M .github/workflows/release-sources.yml

  Log Message:
  -----------
  Update actions/checkout action to v6 (#171065)

This PR contains the following updates:

| Package | Type | Update | Change |
|---|---|---|---|
| [actions/checkout](https://redirect.github.com/actions/checkout) |
action | major | `v5.0.0` -> `v6.0.1` |


  Commit: 2d80486656b75ed80490d27667a5e8191bb40079
      https://github.com/llvm/llvm-project/commit/2d80486656b75ed80490d27667a5e8191bb40079
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp

  Log Message:
  -----------
  [RISCV] Use a switch in RISCVInstrInfo::verifyInstruction. NFC (#170961)

The immediate only operands handled with a range check and a switch
nested under the default case.


  Commit: b0e98426f390c3f0d86c3a2c860a6d980a91e5de
      https://github.com/llvm/llvm-project/commit/b0e98426f390c3f0d86c3a2c860a6d980a91e5de
  Author: Brad Smith <brad at comstyle.com>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M compiler-rt/lib/builtins/cpu_model/aarch64.c
    M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/android.inc
    M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/elf_aux_info.inc
    M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/getauxval.inc
    M compiler-rt/lib/builtins/cpu_model/aarch64/hwcap.inc

  Log Message:
  -----------
  Revert "[FMV][AArch64] Add initial AT_HWCAP3 / AT_HWCAP4 support (#161595)" (#171071)

Crashing with older glibc.

This reverts commit edb43192516a55165cc4c158eb4fd4b2d81a8fce,
57b5ba00cb421b9be17bac10036763f42fbe9298 and
9715ccae1f98162f03ac0884a3dce5045b6b9a6e.


  Commit: 6ec8c4351cfc1d0627d1633b02ea787bd29c77d8
      https://github.com/llvm/llvm-project/commit/6ec8c4351cfc1d0627d1633b02ea787bd29c77d8
  Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
    M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-gep.ll

  Log Message:
  -----------
  [AMDGPU] Enable i8 GEP promotion for vector allocas (#166132)

This patch adds support for the pattern:
```llvm
  %index = select i1 %idx_sel, i32 0, i32 4
  %elt = getelementptr inbounds i8, ptr addrspace(5) %alloca, i32 %index
```
by scaling the byte offset to an element index (index >>
log2(ElemSize)),
allowing the vector element to be updated with insertelement instead of
using
scratch memory.


  Commit: e442904e706b9957bbe81389f05e137d141a2c85
      https://github.com/llvm/llvm-project/commit/e442904e706b9957bbe81389f05e137d141a2c85
  Author: Shoreshen <372660931 at qq.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
    M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
    A llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll
    M llvm/test/Transforms/Attributor/AMDGPU/tag-invariant-loads.ll

  Log Message:
  -----------
  [AMDGPU] Apply alignment attr for make.buffer.rsrc (#166914)

Calculating alignment for `make.buffer.rsrc` intrinsic. The logic is the
alignment on use of return value of `make.buffer.rsrc` should be capped
by the base operand's alignment of `make.buffer.rsrc`.

For example:
```ll
define float @foo(ptr addrspace(1) align X %ptr) {
  %fat.ptr = call ptr addrspace(7) @llvm.amdgcn.make.buffer.rsrc.p7.p1(ptr addrspace(1) %ptr, i16 0, i32 C, i32 0)
  %y = load float, ptr addrspace(7) %fat.ptr, align Y
  ret float %y
}
```

We hopes that `Y = min(X, Y)`

---

After discussion, it seems improper for letting `Y = min(X, Y)` since it
contradict with the semantic of align on load.

So we would apply the origin behavior of align, which is letting `X` and
`Y` both equal to `max(X, Y)`

---------

Co-authored-by: Shilei Tian <i at tianshilei.me>


  Commit: 4125e73cdc6188cca4c1c72b72e2b2d85c157483
      https://github.com/llvm/llvm-project/commit/4125e73cdc6188cca4c1c72b72e2b2d85c157483
  Author: Hristo Hristov <hghristov.rmm at gmail.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M libcxx/include/__functional/hash.h
    M libcxx/include/__memory/shared_ptr.h
    M libcxx/include/__memory/unique_ptr.h
    M libcxx/include/__utility/integer_sequence.h
    M libcxx/include/module.modulemap.in
    M libcxx/test/libcxx/diagnostics/functional.nodiscard.verify.cpp
    M libcxx/test/libcxx/language.support/nodiscard.verify.cpp
    A libcxx/test/libcxx/utilities/intseq/nodiscard.verify.cpp
    M libcxx/test/libcxx/utilities/smartptr/nodiscard.verify.cpp

  Log Message:
  -----------
  [libc++] Applied `[[nodiscard]]` to `hash<shared_ptr>`, `hash<unique_ptr>`, etc. (#170674)

`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.

- https://libcxx.llvm.org/CodingGuidelines.html


1. `hash<shared_ptr>`, `hash<unique_ptr>`, `std::integer_sequence<>`
etc.
2. Also implements fixes to
https://github.com/llvm/llvm-project/issues/169634 on the go (issues
discovered during current implementation)

---------

Co-authored-by: A. Jiang <de34 at live.cn>
Co-authored-by: Hristo Hristov <zingam at outlook.com>


  Commit: c6f45f51fbb93fd6d38f2a22e61053831fc553d4
      https://github.com/llvm/llvm-project/commit/c6f45f51fbb93fd6d38f2a22e61053831fc553d4
  Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/lib/Target/PowerPC/PPCInstrVSX.td
    M llvm/test/CodeGen/PowerPC/fminimum-fmaximum.ll
    M llvm/test/CodeGen/PowerPC/scalar-min-max.ll

  Log Message:
  -----------
  PowerPC/VSX: Select FMINNUM and FMAXNUM (#135739)

In LangRef, we claim that FMINNUM and FMAXNUM should follow the minNum
and maxNum operators in IEEE754-2008.

PowerPC/VSX does have these instructions XSMINDP and XSMAXDP.

Now we use FMINNUM_IEEE and FMAXNUM_IEEE, since they are used by the
non-arch expand codes now.
In future, we may replace all FMINNUM_IEEE/FMAXNUM_IEEE with FMINNUM and
FMAXNUM.

---------

Co-authored-by: Your Name <you at example.com>


  Commit: 8e39bcd9c37f7d35cf34dd78e7b57b7fbc2b4312
      https://github.com/llvm/llvm-project/commit/8e39bcd9c37f7d35cf34dd78e7b57b7fbc2b4312
  Author: Mingming Liu <mingmingl at google.com>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M lld/docs/ELF/linker_script.rst

  Log Message:
  -----------
  [lld][docs] Document two linker-script related options for lld ELF (#166313)

This is a follow up of the discussions in
https://github.com/llvm/llvm-project/pull/163497


  Commit: 4b800d309920889504ff04b57cb818a45b28d748
      https://github.com/llvm/llvm-project/commit/4b800d309920889504ff04b57cb818a45b28d748
  Author: Luke Lau <luke at igalia.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp

  Log Message:
  -----------
  [RISCV] Remove last use of @llvm.experimental.vp.splat in RISCVCodeGenPrepare. NFCI (#170543)

RISCVCodeGenPrepare is the last user of the vp.splat intrinsic, where it
uses it to expand a zero strided load into a scalar load and splat.
Originally this was to avoid vl toggles inside vectorized loops, but
nowadays this shouldn't be necessary because we have RISCVVLOptimizer.
To preserve the test cases where there's no store with VL, this replaces
it with a regular splat followed by a vp_merge to set the lanes past EVL
as poison. We need to set the EVL here because RISCVISelDAGToDAG will
try and recombine it back into a zero strided load, and we want to
preserve the original VL.


  Commit: 446a3a19ed93449a9b50533f924f4bb658fd113e
      https://github.com/llvm/llvm-project/commit/446a3a19ed93449a9b50533f924f4bb658fd113e
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td

  Log Message:
  -----------
  [RISCV] Use GPRNoX0 instead of AVL for Xsfmm pseudos. NFC (#170726)

AVL allows immediates, but we don't have an equivalent of vsetivli for
XSfmm.


  Commit: 46341d5938a060834f92da6e507fcd5fddf0155b
      https://github.com/llvm/llvm-project/commit/46341d5938a060834f92da6e507fcd5fddf0155b
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M clang/test/Driver/print-supported-extensions-riscv.c
    M llvm/docs/RISCVUsage.rst
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
    M llvm/lib/Target/RISCV/RISCVSubtarget.h
    M llvm/test/CodeGen/RISCV/attributes.ll
    M llvm/test/CodeGen/RISCV/rv32p.ll
    M llvm/test/CodeGen/RISCV/rv64p.ll
    M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
    M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
    M llvm/test/MC/RISCV/attribute-arch.s
    M llvm/test/MC/RISCV/rv32i-invalid.s
    M llvm/test/MC/RISCV/rv32p-invalid.s
    M llvm/test/MC/RISCV/rv32p-valid.s
    M llvm/test/MC/RISCV/rv64p-valid.s
    M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp

  Log Message:
  -----------
  [RISCV] Update P extension to the 018 version of the spec. (#170399)

Rename the PPACK* instructions to PPAIR*. Rename PDIF* to PABD*. Remove
Zba/Zbb instructions from P.

https://www.jhauser.us/RISCV/ext-P/


  Commit: 9c60d70df9212734d0cf332b4b687a4942cc7257
      https://github.com/llvm/llvm-project/commit/9c60d70df9212734d0cf332b4b687a4942cc7257
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-12-07 (Sun, 07 Dec 2025)

  Changed paths:
    M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll

  Log Message:
  -----------
  [RISCV] Re-generate rvp-ext-rv32.ll after #170399. NFC

Some instructions got renamed by #170399, but new tests cases were
added after that PR was created.


  Commit: 3d24efd85a62e22115a8582aea147f208bf8095f
      https://github.com/llvm/llvm-project/commit/3d24efd85a62e22115a8582aea147f208bf8095f
  Author: Baranov Victor <bar.victor.2002 at gmail.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    A clang-tools-extra/test/clang-tidy/.clang-tidy

  Log Message:
  -----------
  [clang-tidy][NFC] Add empty '.clang-tidy' file in tests dir to silent warnings in IDE (#171029)

When working on tests, `clangd` with option `--clang-tidy` will report
warnings from
[root](https://github.com/llvm/llvm-project/blob/main/.clang-tidy)
clang-tidy config.
I believe these warnings serve no purpose in tests, so we better disable
them to silent warnings in IDE.


  Commit: 7b652195d79bf79dab3d40f962e3b8063a39e20f
      https://github.com/llvm/llvm-project/commit/7b652195d79bf79dab3d40f962e3b8063a39e20f
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/include/llvm/IR/Constants.h
    M llvm/lib/IR/Constants.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp

  Log Message:
  -----------
  [IR] Add ImplicitTrunc argument to ConstantInt::get() (#170865)

Add an ImplicitTrunc argument to ConstantInt::get(), which allows
controlling whether implicit truncation of the value is permitted.
    
This argument currently defaults to true, but will be switched to false
in the future to guard against signed/unsigned confusion, similar to
what has already happened for APInt.
    
The argument gives an opt-out for cases where the truncation is
intended. The patch contains one illustrative example where this
happens.


  Commit: 95470b6c620d75cdfe5a2a6b2388a90cc53e66c3
      https://github.com/llvm/llvm-project/commit/95470b6c620d75cdfe5a2a6b2388a90cc53e66c3
  Author: adbox53 <123413623+adbox53 at users.noreply.github.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M clang/lib/AST/ByteCode/InterpBuiltin.cpp

  Log Message:
  -----------
  Replace interp__builtin_blend with interp__builtin_ia32_shuffle_gener… (#170217)

Fixes #169994

---------

Co-authored-by: Timm Baeder <tbaeder at redhat.com>


  Commit: ec787501dc3d60f2927abfcf4c8d322ea6baa82a
      https://github.com/llvm/llvm-project/commit/ec787501dc3d60f2927abfcf4c8d322ea6baa82a
  Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
    M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-gep.ll

  Log Message:
  -----------
  Revert "[AMDGPU] Enable i8 GEP promotion for vector allocas" (#171087)

Reverts llvm/llvm-project#166132

Broke libc on GPU tests.
https://lab.llvm.org/buildbot/#/builders/10/builds/18635


  Commit: ec1ea0a4ca02451731036ce04915e30aad0c81dd
      https://github.com/llvm/llvm-project/commit/ec1ea0a4ca02451731036ce04915e30aad0c81dd
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/bindings/ocaml/llvm/llvm_ocaml.c
    M llvm/docs/ReleaseNotes.md
    M llvm/examples/OrcV2Examples/OrcV2CBindingsAddObjectFile/OrcV2CBindingsAddObjectFile.c
    M llvm/examples/OrcV2Examples/OrcV2CBindingsBasicUsage/OrcV2CBindingsBasicUsage.c
    M llvm/examples/OrcV2Examples/OrcV2CBindingsDumpObjects/OrcV2CBindingsDumpObjects.c
    M llvm/examples/OrcV2Examples/OrcV2CBindingsIRTransforms/OrcV2CBindingsIRTransforms.c
    M llvm/examples/OrcV2Examples/OrcV2CBindingsMCJITLikeMemoryManager/OrcV2CBindingsMCJITLikeMemoryManager.c
    M llvm/examples/OrcV2Examples/OrcV2CBindingsRemovableCode/OrcV2CBindingsRemovableCode.c
    M llvm/include/llvm-c/BitReader.h
    M llvm/include/llvm-c/Core.h
    M llvm/include/llvm-c/Target.h
    M llvm/include/llvm/IR/LLVMContext.h
    M llvm/lib/Bitcode/Reader/BitReader.cpp
    M llvm/lib/IR/Core.cpp
    M llvm/lib/Target/Target.cpp
    M llvm/tools/llvm-c-test/attributes.c
    M llvm/tools/llvm-c-test/calc.c
    M llvm/tools/llvm-c-test/debuginfo.c
    M llvm/tools/llvm-c-test/diagnostic.c
    M llvm/tools/llvm-c-test/echo.cpp
    M llvm/tools/llvm-c-test/metadata.c
    M llvm/tools/llvm-c-test/module.c
    M llvm/tools/llvm-c-test/object.c
    M llvm/unittests/ExecutionEngine/MCJIT/MCJITCAPITest.cpp
    M llvm/unittests/IR/ConstantsTest.cpp

  Log Message:
  -----------
  [llvm-c] Deprecate functions working on the global context (#163979)

One of the most common mistakes when working with the LLVM C API is to
mix functions that work on the global context and those that work on an
explicit context. This often results in seemingly nonsensical errors
because types from different contexts are mixed.

We have considered the APIs working on the global context to be obsolete
for a long time already, and do not add any new APIs using the global
context. However, the fact that these still exist (and have shorter
names) continues to cause issues.

This PR proposes to deprecate these APIs, with intent to remove them at
some point in the future.

RFC:
https://discourse.llvm.org/t/rfc-deprecate-c-api-functions-using-the-global-context/88639


  Commit: bd1bd178f8e3770b296f9b042bef1d45bd736e51
      https://github.com/llvm/llvm-project/commit/bd1bd178f8e3770b296f9b042bef1d45bd736e51
  Author: Dan Blackwell <dan_blackwell at apple.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M compiler-rt/test/fuzzer/reduce_inputs.test

  Log Message:
  -----------
  [fuzzer][test-only] Bump runs for reduce_inputs.test unseeded run (#169641)

I have seen a failure whereby the fuzzer failed to reach the expected
input and thus failed the test.

This patch bumps the max executions to 10,000,000 in order to give the
fuzzer a better chance of reaching the expected input. Most runs
complete successfully, so I do not see this adding test time in the
general case; I believe it's a fair tradeoff for the unlucky seed to run
for longer if it reduces the noise from false positives. Note, this
updates a different `RUN:` to
https://github.com/llvm/llvm-project/pull/165402.

rdar://162122184


  Commit: c347b2669bc82385d6269a26e57f8dedc2a802d9
      https://github.com/llvm/llvm-project/commit/c347b2669bc82385d6269a26e57f8dedc2a802d9
  Author: Stefan Gränitz <stefan.graenitz at gmail.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/include/llvm/Analysis/RuntimeLibcallInfo.h

  Log Message:
  -----------
  Remove LLVM_ABI from members of RuntimeLibraryAnalysis (NFC) (#170850)

Fix Windows build error: attribute 'dllexport' cannot be applied to member of 'dllexport' class


  Commit: 448ac1fb00df7aadc207dc3f5e87d7dcb5b933c5
      https://github.com/llvm/llvm-project/commit/448ac1fb00df7aadc207dc3f5e87d7dcb5b933c5
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
    M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll

  Log Message:
  -----------
  AMDGPU/GlobalISel: Fix broken exp10 lowering for f16 (#170708)


  Commit: 7a59ab0e1a0c51c06b61eb66b37aeb592924a963
      https://github.com/llvm/llvm-project/commit/7a59ab0e1a0c51c06b61eb66b37aeb592924a963
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

  Log Message:
  -----------
  [AMDGPU] Common up some unsafe fexp lowering. NFC. (#170841)


  Commit: 8aa82eff569388f50a2fec60b61d9771b0912f0e
      https://github.com/llvm/llvm-project/commit/8aa82eff569388f50a2fec60b61d9771b0912f0e
  Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
    M llvm/test/CodeGen/AMDGPU/lds-dma-waits.ll

  Log Message:
  -----------
  [AMDGPU][SIInsertWaitcnts] Wait on all LDS DMA operations when no aliasing store is found (#170660)

Previously, we would miss inserting a wait if the ds_read had AA info,
but it didn't match
any LDS DMA op, for example if we didn't track the LDS DMA op it aliases
with because it exceeded the tracking limit.


  Commit: 2e238bfa36decb416d7245850261e7e5246f9056
      https://github.com/llvm/llvm-project/commit/2e238bfa36decb416d7245850261e7e5246f9056
  Author: Hans Wennborg <hans at hanshq.net>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/utils/release/build_llvm_release.bat

  Log Message:
  -----------
  Build win release packages with LLDB_ENABLE_LIBXML2 (#170513)

Fixes #170461


  Commit: bb926c157f3096088d4da381243eb7522c6b6ab7
      https://github.com/llvm/llvm-project/commit/bb926c157f3096088d4da381243eb7522c6b6ab7
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/test/CodeGen/X86/bitcnt-big-integer.ll

  Log Message:
  -----------
  [X86] bitcnt-big-integer.ll - add test coverage for AVX512 targets with no VLX support (#171104)


  Commit: 49496c531da2d1acf0d1e2e74dd84c190347c039
      https://github.com/llvm/llvm-project/commit/49496c531da2d1acf0d1e2e74dd84c190347c039
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M mlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp

  Log Message:
  -----------
  [MLIR] Apply clang-tidy fixes for misc-use-internal-linkage in LLVMIRIntrinsicGen.cpp (NFC)


  Commit: f9e0fa8ba4100e8acb8907a5a32c0175d0711162
      https://github.com/llvm/llvm-project/commit/f9e0fa8ba4100e8acb8907a5a32c0175d0711162
  Author: guillem-bartrina-sonarsource <guillem.bartrina at sonarsource.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M clang/lib/StaticAnalyzer/Checkers/MoveChecker.cpp
    A clang/test/Analysis/use-after-move-invalidation.cpp

  Log Message:
  -----------
  [analyzer] MoveChecker: correct invalidation of this-regions (#169626)

By completely omitting invalidation in the case of InstanceCall, we do
not clear the moved state of the fields of the this object after an
opaque call to a member function of the object itself.


  Commit: 405403c8ed4b2956dc03c270373fac2576a23a65
      https://github.com/llvm/llvm-project/commit/405403c8ed4b2956dc03c270373fac2576a23a65
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M mlir/lib/Dialect/Transform/TuneExtension/TuneExtensionOps.cpp

  Log Message:
  -----------
  [mlir] Fix GCC compilation warning in TuneExtensionOps.cpp (#168850)

Building with GCC produces:
```
<...>/TuneExtensionOps.cpp:180:26: warning: comparison of unsigned expression in ‘< 0’ is always false [-Wtype-limits]
  180 |   if (*selectedRegionIdx < 0 || *selectedRegionIdx >= getNumRegions())
      |       ~~~~~~~~~~~~~~~~~~~^~~
<...>/TuneExtensionOps.cpp: In member function ‘llvm::LogicalResult mlir::transform::tune::AlternativesOp::verify()’:
/home/david.spickett/llvm-project/mlir/lib/Dialect/Transform/TuneExtension/TuneExtensionOps.cpp:236:19: warning: comparison of unsigned expression in ‘< 0’ is always false [-Wtype-limits]
  236 |     if (regionIdx < 0 || regionIdx >= getNumRegions())
      |         ~~~~~~~~~~^~~
```

As we are sign extending these variables, use int64_t instead of size_t
for their type.


  Commit: e52cddc4326031cc78db370c150384c12157d3b7
      https://github.com/llvm/llvm-project/commit/e52cddc4326031cc78db370c150384c12157d3b7
  Author: Tom Stellard <tstellar at redhat.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M .github/workflows/release-binaries.yml

  Log Message:
  -----------
  workflows/release-binaries: Use upload-release-artifact action for uploading (#170528)


  Commit: 56beac9f0c2629b34d65dff2ea63605cc43dad39
      https://github.com/llvm/llvm-project/commit/56beac9f0c2629b34d65dff2ea63605cc43dad39
  Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
    A llvm/test/CodeGen/SPIRV/const-array-gep.ll

  Log Message:
  -----------
  [SPIRV] Fix assertion violation caused by unexpected ConstantExpr. (#170524)

`SPIRVEmitIntrinsics::simplifyZeroLengthArrayGepInst` asserted that it
always expected a `GetElementPtrInst` from `IRBuilder::CreateGEP` (which
returns a `Value`). `IRBuilder` can fold and return a `ConstantExpr`
instead, thus violating the assertion. The patch fixes this by using
`GetElementPtrInst::Create` to always return a `GetElementPtrInst`.

This LLVM defect was identified via the AMD Fuzzing project.


  Commit: f41edb3fb9143e1fdc0bd326241af12d4a3cf56b
      https://github.com/llvm/llvm-project/commit/f41edb3fb9143e1fdc0bd326241af12d4a3cf56b
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll

  Log Message:
  -----------
  [AMDGPU] Add test cases for v_fmac_dx9_zero_f32 aka v_fmac_legacy_f32 (#171108)


  Commit: 5e3ffd66e7c434ac615432cdfbfb0d6ed47b643c
      https://github.com/llvm/llvm-project/commit/5e3ffd66e7c434ac615432cdfbfb0d6ed47b643c
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M mlir/lib/ExecutionEngine/ArmRunnerUtils.cpp

  Log Message:
  -----------
  [MLIR] Apply clang-tidy fixes for readability-identifier-naming in ArmRunnerUtils.cpp (NFC)


  Commit: 32ff7100d737bcfce2f713dd9838df88bdd3b631
      https://github.com/llvm/llvm-project/commit/32ff7100d737bcfce2f713dd9838df88bdd3b631
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
    M llvm/test/CodeGen/AArch64/fixed-length-bf16-arith.ll

  Log Message:
  -----------
  [AArch64] Lower v8bf16 FMUL to BFMLAL top/bottom with +sve (#169655)

Assuming the predicate is hoisted, this should have a slightly better
throughput: https://godbolt.org/z/jb7aP7Efc

Note: SVE must be used to convert back to bf16 as the bfmlalb/t
instructions operate on even/odd lanes, but the neon bfcvtn/2 process
the top/bottom halves of vectors.


  Commit: 3a6781ea4d21ce9c21c227131141fcf9665cdf6d
      https://github.com/llvm/llvm-project/commit/3a6781ea4d21ce9c21c227131141fcf9665cdf6d
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll

  Log Message:
  -----------
  [X86] vector-shuffle-combining-avx512f.ll - add tests showing failure to simplify expand/compress nodes (#171113)


  Commit: d94958b2f27affe00c42c1338f99674d2f6271c8
      https://github.com/llvm/llvm-project/commit/d94958b2f27affe00c42c1338f99674d2f6271c8
  Author: Tirthankar Mazumder <63574588+wermos at users.noreply.github.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
    M llvm/test/Transforms/InstCombine/icmp-add.ll

  Log Message:
  -----------
  [InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (#169960)

Fixes #166973

Partially addresses #134028

Alive2 proof: https://alive2.llvm.org/ce/z/BqHQNN


  Commit: 1bbff7290f481388e5ec915436181deb4972819e
      https://github.com/llvm/llvm-project/commit/1bbff7290f481388e5ec915436181deb4972819e
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M mlir/lib/ExecutionEngine/VulkanRuntimeWrappers.cpp

  Log Message:
  -----------
  [MLIR] Apply clang-tidy fixes for llvm-qualified-auto in VulkanRuntimeWrappers.cpp (NFC)


  Commit: 60492898f8d4143f99f1dc2d3015e97f56acc870
      https://github.com/llvm/llvm-project/commit/60492898f8d4143f99f1dc2d3015e97f56acc870
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M mlir/lib/Dialect/Shard/IR/ShardOps.cpp

  Log Message:
  -----------
  [MLIR] Apply clang-tidy fixes for readability-identifier-naming in ShardOps.cpp (NFC)


  Commit: a5e8e77f7ccd15945eb432a3619e57f9600c142a
      https://github.com/llvm/llvm-project/commit/a5e8e77f7ccd15945eb432a3619e57f9600c142a
  Author: Gergely Bálint <gergely.balint at arm.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M bolt/lib/Passes/PointerAuthCFIAnalyzer.cpp
    M bolt/test/AArch64/pacret-cfi-incorrect.s
    A bolt/test/runtime/AArch64/pacret-synchronous-unwind.cpp

  Log Message:
  -----------
  [BOLT][PAC] Warn about synchronous unwind tables (#165227)

BOLT currently ignores functions with synchronous PAuth DWARF info.
If more than 10% of functions get ignored for inconsistencies, we
should emit a warning to only use asynchronous unwind tables.

See related issue: #165215


  Commit: 7c832fca5374cde2804cebc2ba3c5ad635fb76a1
      https://github.com/llvm/llvm-project/commit/7c832fca5374cde2804cebc2ba3c5ad635fb76a1
  Author: Adrian Vogelsgesang <avogelsgesang at salesforce.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M lldb/source/Commands/CommandObjectTarget.cpp

  Log Message:
  -----------
  [lldb] Fix command line of `target frame-provider register` (#167803)

So far, the syntax was `target frame-provider register <cmd-options>
[<run-args>]`. Note the optional `run-args` at the end. They are
completely ignored by the actual command, but the command line parser
still accepts them.

This commit removes them.

This was probably a copy-paste error from `CommandObjectProcessLaunch`
which was probably used as a blue-print for `target frame-provider
register`.


  Commit: 33d779dfbf258eac826b2a22b4fece602cce321f
      https://github.com/llvm/llvm-project/commit/33d779dfbf258eac826b2a22b4fece602cce321f
  Author: Robert Imschweiler <robert.imschweiler at amd.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M openmp/runtime/src/kmp_ftn_entry.h

  Log Message:
  -----------
  [OpenMP] Fix undefined symbol for Darwin builds (#170999)

cf.
https://github.com/llvm/llvm-project/pull/168554#issuecomment-3617253169


  Commit: 07bafab83de2ba9f7d15fb194e0d34cd71f17af2
      https://github.com/llvm/llvm-project/commit/07bafab83de2ba9f7d15fb194e0d34cd71f17af2
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPU.td
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    M llvm/lib/Target/AMDGPU/VOP2Instructions.td
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll

  Log Message:
  -----------
  [AMDGPU] Do not generate V_FMAC_DX9_ZERO_F32 on GFX12 (#171116)

GFX12 does not have the FMAC form of this instruction, only the FMA
form.

Fixes: #170437


  Commit: c1d030e9a48c2167b52b8b296c9e30ecfb7adb40
      https://github.com/llvm/llvm-project/commit/c1d030e9a48c2167b52b8b296c9e30ecfb7adb40
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M mlir/lib/ExecutionEngine/ExecutionEngine.cpp

  Log Message:
  -----------
  [MLIR][ExecutionEngine] Don't create a `_mlir_` wrapper function for internal linkage (#171115)

This is somehow NFC, we were creating wrapper for interal functions,
which are de-facto not callable.


  Commit: 7fbd443491db62a3fe316f9cc4e3e47036f5730b
      https://github.com/llvm/llvm-project/commit/7fbd443491db62a3fe316f9cc4e3e47036f5730b
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M lldb/source/Commands/CommandObjectBreakpoint.cpp

  Log Message:
  -----------
  [lldb] Remove printf in breakpoint add command

Added in 2110db0f49593 / #156067.


  Commit: f29f01db8fa0be64e8de66adc2c0037f3e18d448
      https://github.com/llvm/llvm-project/commit/f29f01db8fa0be64e8de66adc2c0037f3e18d448
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M compiler-rt/test/sanitizer_common/TestCases/Linux/soft_rss_limit_mb_test.cpp

  Log Message:
  -----------
  [Sanitizer] Bump soft_rss_limit_mb in test (#170911)

This test is failing on some buildbots now that the internal shell has
been turned on and was failing previously on some ppc bots when turning
it on a while back (before it got reverted).

At least one X86 bot is barely hitting the limit
(https://lab.llvm.org/buildbot/#/builders/174/builds/28487 224MB-235MB).

This likely needs to be bumped due to changes in the process tree (now
that we invoke things through python rather than a bash shell) with the
enablement of the internal shell.


  Commit: f1af9b027eaf41f884e63b7121f6b6af6dd81126
      https://github.com/llvm/llvm-project/commit/f1af9b027eaf41f884e63b7121f6b6af6dd81126
  Author: Mend Renovate <bot at renovateapp.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M .github/workflows/bazel-checks.yml
    M .github/workflows/build-ci-container-tooling.yml
    M .github/workflows/build-ci-container-windows.yml
    M .github/workflows/build-ci-container.yml
    M .github/workflows/build-metrics-container.yml
    M .github/workflows/check-ci.yml
    M .github/workflows/ci-post-commit-analyzer.yml
    M .github/workflows/commit-access-greeter.yml
    M .github/workflows/commit-access-review.yml
    M .github/workflows/docs.yml
    M .github/workflows/email-check.yaml
    M .github/workflows/gha-codeql.yml
    M .github/workflows/hlsl-test-all.yaml
    M .github/workflows/issue-release-workflow.yml
    M .github/workflows/issue-subscriber.yml
    M .github/workflows/issue-write.yml
    M .github/workflows/libc-fullbuild-tests.yml
    M .github/workflows/libc-overlay-tests.yml
    M .github/workflows/libclang-abi-tests.yml
    M .github/workflows/libclang-python-tests.yml
    M .github/workflows/libcxx-build-and-test.yaml
    M .github/workflows/libcxx-build-containers.yml
    M .github/workflows/libcxx-check-generated-files.yml
    M .github/workflows/libcxx-run-benchmarks.yml
    M .github/workflows/llvm-abi-tests.yml
    M .github/workflows/llvm-bugs.yml
    M .github/workflows/merged-prs.yml
    M .github/workflows/mlir-spirv-tests.yml
    M .github/workflows/new-prs.yml
    M .github/workflows/pr-code-format.yml
    M .github/workflows/pr-code-lint.yml
    M .github/workflows/pr-request-release-note.yml
    M .github/workflows/pr-subscriber.yml
    M .github/workflows/premerge.yaml
    M .github/workflows/release-asset-audit.yml
    M .github/workflows/release-binaries.yml
    M .github/workflows/release-documentation.yml
    M .github/workflows/release-doxygen.yml
    M .github/workflows/release-lit.yml
    M .github/workflows/release-sources.yml
    M .github/workflows/release-tasks.yml
    M .github/workflows/scorecard.yml
    M .github/workflows/spirv-tests.yml
    M .github/workflows/test-unprivileged-download-artifact.yml
    M .github/workflows/version-check.yml

  Log Message:
  -----------
  Update [Github] Update GHA Dependencies (#171064)

This PR contains the following updates:

| Package | Type | Update | Change | Pending |
|---|---|---|---|---|
| [actions/checkout](https://redirect.github.com/actions/checkout) |
action | patch | `v6.0.0` -> `v6.0.1` | |
| [actions/setup-node](https://redirect.github.com/actions/setup-node) |
action | minor | `v6.0.0` -> `v6.1.0` | |
|
[github/codeql-action](https://redirect.github.com/github/codeql-action)
| action | patch | `v4.31.5` -> `v4.31.6` | `v4.31.7` |


  Commit: 11866c499b06ae2f259ef870c8ea15c560bee04d
      https://github.com/llvm/llvm-project/commit/11866c499b06ae2f259ef870c8ea15c560bee04d
  Author: Hongyu Chen <xxs_chy at outlook.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/RISCV/mul.ll

  Log Message:
  -----------
  [DAGCombiner] Don't peek through bitcast when checking isMulAddWithConstProfitable (#171056)

Fixes https://github.com/llvm/llvm-project/issues/171035
Peeking through bitcast may cause type mismatch between `AddNode` and
`ConstNode` in `isMulAddWithConstProfitable`.


  Commit: bab4d1e8b2ada6b238b1672d589726f18ee464c1
      https://github.com/llvm/llvm-project/commit/bab4d1e8b2ada6b238b1672d589726f18ee464c1
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/test/CodeGen/X86/shift-i512.ll

  Log Message:
  -----------
  [X86] shift-i512.ll - extend test coverage (#171125)

Remove v8i64 dependency from original shift-by-1 tests - this was added for #132601 but is unlikely to be necessary

Add tests for general shifts as well as shift-by-constant and shift-of-constant examples


  Commit: dd06214394977729a3f2715bfadf1b31467551b8
      https://github.com/llvm/llvm-project/commit/dd06214394977729a3f2715bfadf1b31467551b8
  Author: Erich Keane <ekeane at nvidia.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M clang/lib/CIR/CodeGen/CIRGenDeclOpenACC.cpp
    A clang/test/CIR/CodeGenOpenACC/routine-bind.c
    A clang/test/CIR/CodeGenOpenACC/routine-bind.cpp
    M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
    M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp

  Log Message:
  -----------
  [OpenACC][CIR] Implement routine 'bind'-with-a-string lowering (#170916)

The 'bind' clause emits an attribute on the RoutineOp that states which
function it should call on the device side. When provided in
double-quotes, the function on the device side should be the exact name
given. This patch emits the IR to do that.

As a part of that, we add a helper function to the OpenACC dialect to do
so, as well as a version that adds the ID version (though we don't
    exercise th at yet).

The 'bind' with an ID should do the MANGLED name, but it isn't quite
clear what that name SHOULD be yet. Since the signature of a function is
included in its mangling, and we're not providing said signature, we
have to come up with something. This is left as an exercise for a future
patch.


  Commit: e8219e5ce84db26fd521ce5091d18e75c7afbc6a
      https://github.com/llvm/llvm-project/commit/e8219e5ce84db26fd521ce5091d18e75c7afbc6a
  Author: Luke Lau <luke at igalia.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
    M llvm/include/llvm/Transforms/Vectorize/LoopVectorize.h
    M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/test/Transforms/LoopVectorize/AArch64/early_exit_costs.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
    A llvm/test/Transforms/LoopVectorize/AArch64/sve-predicated-costs.ll
    A llvm/test/Transforms/LoopVectorize/RISCV/predicated-costs.ll
    M llvm/test/Transforms/PhaseOrdering/AArch64/std-find.ll
    A llvm/test/Transforms/PhaseOrdering/loop-vectorize-bfi.ll

  Log Message:
  -----------
  [VPlan] Use BlockFrequencyInfo in getPredBlockCostDivisor (#158690)

In 531.deepsjeng_r from SPEC CPU 2017 there's a loop that we
unprofitably loop vectorize on RISC-V.

The loop looks something like:

```c
  for (int i = 0; i < n; i++) {
    if (x0[i] == a)
      if (x1[i] == b)
        if (x2[i] == c)
          // do stuff...
  }
```

Because it's so deeply nested the actual inner level of the loop rarely
gets executed. However we still deem it profitable to vectorize, which
due to the if-conversion means we now always execute the body.

This stems from the fact that `getPredBlockCostDivisor` currently
assumes that blocks have 50% chance of being executed as a heuristic.

We can fix this by using BlockFrequencyInfo, which gives a more accurate
estimate of the innermost block being executed 12.5% of the time. We can
then calculate the probability as `HeaderFrequency / BlockFrequency`.

Fixing the cost here gives a 7% speedup for 531.deepsjeng_r on RISC-V.

Whilst there's a lot of changes in the in-tree tests, this doesn't
affect llvm-test-suite or SPEC CPU 2017 that much:

- On armv9-a -flto -O3 there's 0.0%/0.2% more geomean loops vectorized
on llvm-test-suite/SPEC CPU 2017.
- On x86-64 -flto -O3 **with PGO** there's 0.9%/0% less geomean loops
vectorized on llvm-test-suite/SPEC CPU 2017.

Overall geomean compile time impact is 0.03% on stage1-ReleaseLTO:
https://llvm-compile-time-tracker.com/compare.php?from=9eee396c58d2e24beb93c460141170def328776d&to=32fbff48f965d03b51549fdf9bbc4ca06473b623&stat=instructions%3Au


  Commit: 048715458855222919cd2632d740e9221ef3cb50
      https://github.com/llvm/llvm-project/commit/048715458855222919cd2632d740e9221ef3cb50
  Author: Tim Gymnich <tim at gymni.ch>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
    M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
    M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
    M mlir/test/Conversion/AMDGPUToROCDL/gfx1250.mlir
    M mlir/test/Dialect/AMDGPU/ops.mlir

  Log Message:
  -----------
  [mlir][amdgpu] Add workgroup_mask to MakeDmaDescriptorOp (#171103)

- add `workgroup_mask` and `early_timeout`


  Commit: cc19f420b99fcda4ab4252fcf857d0e7ed6339e7
      https://github.com/llvm/llvm-project/commit/cc19f420b99fcda4ab4252fcf857d0e7ed6339e7
  Author: Dark Steve <Prasoon.Mishra at amd.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPU.h
    M llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll

  Log Message:
  -----------
  [AMDGPU][NPM] Port AMDGPUArgumentUsageInfo to NPM (#170886)

Port AMDGPUArgumentUsageInfo analysis to the NPM to fix suboptimal code
generation when NPM is enabled by default.

Previously, DAG.getPass() returns nullptr when using NPM, causing the
argument usage info to be unavailable during ISel. This resulted in
fallback to FixedABIFunctionInfo which assumes all implicit arguments
are needed, generating unnecessary register setup code for entry
functions.

Fixes LLVM::CodeGen/AMDGPU/cc-entry.ll

Changes:
- Split AMDGPUArgumentUsageInfo into a data class and NPM analysis
wrapper
- Update SIISelLowering to use DAG.getMFAM() for NPM path
- Add RequireAnalysisPass in addPreISel() to ensure analysis
availability

This follows the same pattern used for PhysicalRegisterUsageInfo.


  Commit: ce73cbb6abdcd3188150c9063933bfe15c73f523
      https://github.com/llvm/llvm-project/commit/ce73cbb6abdcd3188150c9063933bfe15c73f523
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M clang/lib/Headers/__clang_cuda_complex_builtins.h
    M clang/test/Headers/amdgcn-openmp-device-math-complex.c
    M clang/test/Headers/amdgcn-openmp-device-math-complex.cpp
    M clang/test/Headers/nvptx_device_math_complex.c
    M clang/test/Headers/nvptx_device_math_complex.cpp

  Log Message:
  -----------
  clang: Use generic builtins in cuda complex builtins header (#171106)

There's no reason to use the ocml or nv prefixed functions and
maintain this list of alias macros. I left these macros in for
NVPTX in the scalbn and logb case, since those have a special
case hack in the AMDGPU codegen and probably do not work on ptx.


  Commit: a6fc5a1d77e78333f26a44b145ad43149e9ada17
      https://github.com/llvm/llvm-project/commit/a6fc5a1d77e78333f26a44b145ad43149e9ada17
  Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M clang-tools-extra/clang-tidy/fuchsia/MultipleInheritanceCheck.cpp
    M clang-tools-extra/clang-tidy/fuchsia/MultipleInheritanceCheck.h

  Log Message:
  -----------
  [clang-tidy][NFC] Refactor `fuchsia-multiple-inheritance` (#171059)


  Commit: 1ae957515cccf8825733fbe100ff32864543d248
      https://github.com/llvm/llvm-project/commit/1ae957515cccf8825733fbe100ff32864543d248
  Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp

  Log Message:
  -----------
  [AMDGPU][NFC] Update a comment about FLAT v/s LDSDMA

The change in #170263 does not do justice to common knowledge in the backend.
Fix the comment to reflect the relation between FLAT encoding, flat pointer
access, and LDSDMA operations.


  Commit: 886f54a04c04d1b7c4649ae9d00f85cf7655269a
      https://github.com/llvm/llvm-project/commit/886f54a04c04d1b7c4649ae9d00f85cf7655269a
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

  Log Message:
  -----------
  DAG: Set MachinePointerInfo for stack when expanding divrem libcall (#170537)


  Commit: 9a5fa3075ac670e7d748b693895d4d347af5f83d
      https://github.com/llvm/llvm-project/commit/9a5fa3075ac670e7d748b693895d4d347af5f83d
  Author: Benjamin Maxwell <macdue at dueutil.tech>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/include/llvm/ADT/STLExtras.h
    M llvm/unittests/ADT/STLExtrasTest.cpp

  Log Message:
  -----------
  [ADT] Add `llvm::reverse_conditionally()` iterator (#171040)

This patch adds a simple iterator range that allows conditionally
iterating a collection in reverse. It works with any collection
supported by `llvm::reverse(Collection)`.

```
void foo(bool Reverse, std::vector<int>& C) {
  for (int I : reverse_conditionally(C, Reverse)) {
    // ...
  }
}
```


  Commit: c5b90103da58c261fcc9720e8700a06fac7e0388
      https://github.com/llvm/llvm-project/commit/c5b90103da58c261fcc9720e8700a06fac7e0388
  Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
    M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
    M llvm/test/Transforms/LoopVectorize/scalable-assume.ll
    M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
    M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
    M llvm/test/Transforms/LoopVectorize/scalable-iv-outside-user.ll

  Log Message:
  -----------
  [VPlan] Use nuw when computing {VF,VScale}xUF (#170710)

These quantities should never unsigned-wrap. This matches the behavior
if only VFxUF is used (and not VF): when computing both VF and VFxUF,
nuw should hold for each step separately.


  Commit: b08c72b26c95cf8e76cfb1af46a1ed7cab9d721e
      https://github.com/llvm/llvm-project/commit/b08c72b26c95cf8e76cfb1af46a1ed7cab9d721e
  Author: Anchu Rajendran S <asudhaku at amd.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M flang/lib/Parser/openmp-parsers.cpp
    M flang/lib/Parser/unparse.cpp
    A flang/test/Lower/OpenMP/Todo/threadset.f90
    A flang/test/Parser/OpenMP/threadset-clause.f90
    A flang/test/Semantics/OpenMP/threadset-clause.f90

  Log Message:
  -----------
  [Flang][OpenMP] Enables parsing of threadset clause (#169856)


  Commit: ebdb903c105deefc2598181497f0aebcf65f4b01
      https://github.com/llvm/llvm-project/commit/ebdb903c105deefc2598181497f0aebcf65f4b01
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/compress-undef-float-passthrough.ll
    M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll

  Log Message:
  -----------
  [X86] Handle X86ISD::EXPAND/COMPRESS nodes as target shuffles (#171119)

Allows for shuffle simplification

Required a minor fix to the overly reduced compress-undef-float-passthrough.ll regression test


  Commit: ca8419d6cc59c14e20d8de5c73ed3c51d739eb93
      https://github.com/llvm/llvm-project/commit/ca8419d6cc59c14e20d8de5c73ed3c51d739eb93
  Author: Ivan Butygin <ivan.butygin at gmail.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
    M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
    M mlir/test/Dialect/AMDGPU/canonicalize.mlir

  Log Message:
  -----------
  [mlir][amdgpu] Fuse adjacent `MemoryCounterWaitOp` (#171148)

Taking the minimum value.


  Commit: b8ddbc4f0398e363ba74276b8c9e299110d1b6e8
      https://github.com/llvm/llvm-project/commit/b8ddbc4f0398e363ba74276b8c9e299110d1b6e8
  Author: Sang Ik Lee <sang.ik.lee at intel.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M mlir/test/Integration/Dialect/XeVM/GPU/gpu_printf.mlir

  Log Message:
  -----------
  [MLIR][XeVM] gpu.printf test: use correct runtime. (#170754)

gpu printf test was not using the runtime required by lit.local.cfg
All other tests in the directory are correctly using level zero runtime.
But gpu printf test is using sycl runtime.


  Commit: 447af32fbb8c9522bc01948caadd1ae562c01373
      https://github.com/llvm/llvm-project/commit/447af32fbb8c9522bc01948caadd1ae562c01373
  Author: Sang Ik Lee <sang.ik.lee at intel.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
    M mlir/test/Conversion/XeGPUToXeVM/create_nd_tdesc.mlir
    M mlir/test/Conversion/XeGPUToXeVM/loadstore_nd.mlir
    M mlir/test/Conversion/XeGPUToXeVM/prefetch_nd.mlir

  Log Message:
  -----------
  [MLIR][XeGPU][XeVM] create_nd_tdesc: use correct pitch from strides. (#170384)

Base memory pitch should be derived from base stride, not base width.
Remove offset fields from tensor descriptor payload and add pitch field.


  Commit: d1ad0856f8264543f8814150889a13bb27839a17
      https://github.com/llvm/llvm-project/commit/d1ad0856f8264543f8814150889a13bb27839a17
  Author: zhijian lin <zhijian at ca.ibm.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
    A llvm/test/CodeGen/PowerPC/splat-after-xxsldwi.ll

  Log Message:
  -----------
  Fix [PowerPC] llc crashed at -O1/O2/O3: Assertion `isImm() && "Wrong MachineOperand mutator"' failed. (#170548)

Fixed issue 
[[PowerPC] llc crashed at -O1/O2/O3: Assertion `isImm() && "Wrong
MachineOperand mutator"'
failed.](https://github.com/llvm/llvm-project/issues/167672)

the root cause of the crash, the IMM operand is in different operand num
of the instruction PPC::XXSPLTW and PPC::XXSPLTB/PPC::XXSPLTH.

and the patch also fix a potential bug that the new element index of
PPC::XXSPLTB/PPC::XXSPLTH/XXSPLTW use the same logic. It should be
different .We need to convert the element index into the proper unit
(byte for VSPLTB, halfword for VSPLTH, word for VSPLTW) because
PPC::XXSLDWI interprets its ShiftImm in 32-bit word units.


  Commit: a05fc9edb99b143f837baf136a68c35444558069
      https://github.com/llvm/llvm-project/commit/a05fc9edb99b143f837baf136a68c35444558069
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Target/Hexagon/HexagonGenWideningVecInstr.cpp

  Log Message:
  -----------
  HexagonGenWideningVecInstr.cpp - fix MSVC "result of 32-bit shift implicitly converted to 64 bits" warning. NFC. (#171095)


  Commit: fccb65ef8f0faf40ca5dfaaa0ef70821f8843821
      https://github.com/llvm/llvm-project/commit/fccb65ef8f0faf40ca5dfaaa0ef70821f8843821
  Author: Michael Liao <michael.hliao at gmail.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M mlir/lib/Pass/PassRegistry.cpp

  Log Message:
  -----------
  [mlir] Fix '-Wtemplate-id-cdtor'. NFC


  Commit: b32a2f418ac21cba03d73a87b89cd82bf7b318a6
      https://github.com/llvm/llvm-project/commit/b32a2f418ac21cba03d73a87b89cd82bf7b318a6
  Author: Rana Pratap Reddy <109514914+ranapratap55 at users.noreply.github.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsAMDGPU.def
    M clang/lib/AST/ASTContext.cpp
    M clang/lib/Sema/SemaExpr.cpp
    A clang/test/CodeGen/half-float16-vector-compatibility.cl
    A clang/test/SemaOpenCL/half-float16-vector-compatibility.cl

  Log Message:
  -----------
  [Clang][OpenCL][AMDGPU] Allow _Float16 and half vector type compatibility (#170605)

## Summary
Allowing implicit compatibility between `_Float16` vector types and
`half` vector types in OpenCL mode. This enables AMDGPU builtins to work
correctly across OpenCL, HIP, and C++ without requiring separate builtin
definitions.
## Problem Statement
When using AMDGPU image builtins that return half-precision vectors in
OpenCL, users encounter type incompatibility errors:
**Builtin Definition:**
`TARGET_BUILTIN(__builtin_amdgcn_image_load_1d_v4f16_i32, "V4xiiQtii",
"nc", "image-insts")`

**Test Case:**
```
typedef half half4 __attribute__((ext_vector_type(4)));
half4 test_builtin_image_load_1d_2(half4 v4f16, int i32, __amdgpu_texture_t tex) {
  return __builtin_amdgcn_image_load_1d_v4f16_i32(100, i32, tex, 120, i32);
}
```
**Error:**
```
error: returning '__attribute__((__vector_size__(4 * sizeof(_Float16)))) _Float16' 
(vector of 4 '_Float16' values) from a function with incompatible result type 
'half4' (vector of 4 'half' values)
```
## Solution
In OpenCL, allow implicit compatibility between `_Float16` vector types
and `half` vector types. This is needed for AMDGPU builtins that may
return _Float16 vectors to work correctly with OpenCL half vector types.


  Commit: 614fe6da145e883cb0aa1b1406bbd5e5d103747b
      https://github.com/llvm/llvm-project/commit/614fe6da145e883cb0aa1b1406bbd5e5d103747b
  Author: Men-cotton <mencotton0410 at gmail.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
    A mlir/test/Conversion/OpenMPToLLVM/map-info-type-conversion-fail.mlir

  Log Message:
  -----------
  [mlir][OpenMP] Fix crash in MapInfoOp conversion when type conversion fails (#171045)

Check the result of `convertType` before calling `TypeAttr::get`. This
prevents a crash on unsupported types (e.g. `tensor`) by ensuring the
pattern fails gracefully.

Added regression test: map-info-type-conversion-fail.mlir

Fixes: #108159


  Commit: 2a5420ea5184a334c2af9f2f9f43de4dfc6b76d3
      https://github.com/llvm/llvm-project/commit/2a5420ea5184a334c2af9f2f9f43de4dfc6b76d3
  Author: Shreeyash Pandey <shreeyash335 at gmail.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M libc/hdr/errno_macros.h
    M libc/include/errno.h.def
    M libc/src/__support/threads/linux/CMakeLists.txt
    M libc/src/__support/threads/linux/futex_utils.h
    M libc/src/__support/threads/linux/raw_mutex.h
    M libc/src/__support/threads/linux/rwlock.h
    M libc/src/__support/time/CMakeLists.txt
    A libc/src/__support/time/abs_timeout.h
    M libc/src/__support/time/linux/CMakeLists.txt
    R libc/src/__support/time/linux/abs_timeout.h
    R libc/src/__support/time/linux/monotonicity.h
    A libc/src/__support/time/monotonicity.h
    M libc/src/pthread/pthread_rwlock_clockwrlock.cpp
    M libc/src/pthread/pthread_rwlock_timedrdlock.cpp
    M libc/src/pthread/pthread_rwlock_timedwrlock.cpp
    M libc/test/src/__support/time/linux/CMakeLists.txt
    M libc/test/src/__support/time/linux/timeout_test.cpp

  Log Message:
  -----------
  [libc] move abs_timesout and monotonicity out of linux dir (#167719)

This patch moves abs_timeout and monotonicity out of the linux dir into
common. Both of these functions depend on clock_gettime which is the
actual os-dependent component. As other features in `__support/threads`
may want to use these, it's better to share it in common.


  Commit: 58cb4873f965271956ca32f0a9dfdad20012a6c5
      https://github.com/llvm/llvm-project/commit/58cb4873f965271956ca32f0a9dfdad20012a6c5
  Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M mlir/lib/Pass/PassRegistry.cpp

  Log Message:
  -----------
  Revert "[mlir] Fix '-Wtemplate-id-cdtor'. NFC"

This reverts commit fccb65ef8f0faf40ca5dfaaa0ef70821f8843821.

It breaks pre-merge CI:
```
2025-12-08T16:35:11.7239054Z /home/gha/actions-runner/_work/llvm-project/llvm-project/mlir/lib/Pass/PassRegistry.cpp:439:37: error: ISO C++ requires the name after '::~' to be found in the same scope as the name before '::~' [-Werror,-Wdtor-name]
2025-12-08T16:35:11.7240458Z   439 | llvm::cl::OptionValue<OpPassManager>::~OptionValue() = default;
2025-12-08T16:35:11.7241014Z       | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~
2025-12-08T16:35:11.7241494Z       |                                     ::OptionValue
2025-12-08T16:35:11.7241903Z 1 error generated.
```


  Commit: cbce30e0f862099758c4f375cc35fb214fb1b513
      https://github.com/llvm/llvm-project/commit/cbce30e0f862099758c4f375cc35fb214fb1b513
  Author: Anutosh Bhat <andersonbhat491 at gmail.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M clang/lib/Interpreter/IncrementalAction.cpp
    M clang/test/Interpreter/pretty-print.c

  Log Message:
  -----------
  [clang-repl] Skip CodeGen for top-level decls when diagnostics report errors (#169989)

We can see the following while running clang-repl in C mode 
```
anutosh491 at vv-nuc:/build/anutosh491/llvm-project/build/bin$ ./clang-repl --Xcc=-x --Xcc=c --Xcc=-std=c23
clang-repl> printf("hi\n");
In file included from <<< inputs >>>:1:
input_line_1:1:1: error: call to undeclared library function 'printf' with type 'int (const char *, ...)'; ISO C99 and
      later do not support implicit function declarations [-Wimplicit-function-declaration]
    1 | printf("hi\n");
      | ^
input_line_1:1:1: note: include the header <stdio.h> or explicitly provide a declaration for 'printf'
error: Parsing failed.
clang-repl> #include <stdio.h>
hi
```

In debug mode while dumping the generated Module, i see this 
```
clang-repl> printf("hi\n");
In file included from <<< inputs >>>:1:
input_line_1:1:1: error: call to undeclared library function 'printf' with type 'int (const char *, ...)'; ISO C99 and
      later do not support implicit function declarations [-Wimplicit-function-declaration]
    1 | printf("hi\n");
      | ^
input_line_1:1:1: note: include the header <stdio.h> or explicitly provide a declaration for 'printf'
error: Parsing failed.
clang-repl> #include <stdio.h>

=== compile-ptu 1 ===
[TU=0x55556cfbf830, M=0x55556cfc13a0 (incr_module_1)]
[LLVM IR]
; ModuleID = 'incr_module_1'
source_filename = "incr_module_1"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@.str = private unnamed_addr constant [4 x i8] c"hi\0A\00", align 1
@llvm.global_ctors = appending global [1 x { i32, ptr, ptr }] [{ i32, ptr, ptr } { i32 65535, ptr @_GLOBAL__sub_I_incr_module_1, ptr null }]

define internal void @__stmts__0() #0 {
entry:
  %call = call i32 (ptr, ...) @printf(ptr noundef @.str)
  ret void
}

declare i32 @printf(ptr noundef, ...) #1

; Function Attrs: noinline nounwind uwtable
define internal void @_GLOBAL__sub_I_incr_module_1() #2 section ".text.startup" {
entry:
  call void @__stmts__0()
  ret void
}

attributes #0 = { "min-legal-vector-width"="0" }
attributes #1 = { "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noinline nounwind uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{i32 7, !"frame-pointer", i32 2}
!5 = !{!"clang version 22.0.0git (https://github.com/anutosh491/llvm-project.git 81ad8fbc2bb09bae61ed59316468011e4a42cf47)"}
=== end compile-ptu ===

execute-ptu 1: [TU=0x55556cfbf830, M=0x55556cfc13a0 (incr_module_1)]
hi
```

Basically I see that CodeGen emits IR for a cell before we know whether
DiagnosticsEngine has an error. For C code like `printf("hi\n");`
without <stdio.h>, Sema emits a diagnostic but still produces a
"codegen-able" `TopLevelStmt`, so the `printf` call is IR-generated into
the current module.

Previously, when `Diags.hasErrorOccurred()` was true, we only cleaned up
the PTU AST and left the CodeGen module untouched. The next successful
cell then called `GenModule()`, which returned that same module (now
also containing the next cell’s IR), causing side effects from the
failed cell (e.g. printf)


  Commit: f27fbca37c4a66d4e237bae1256d775ca7471cb9
      https://github.com/llvm/llvm-project/commit/f27fbca37c4a66d4e237bae1256d775ca7471cb9
  Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M lldb/include/lldb/Core/Module.h
    M lldb/include/lldb/Symbol/SymbolFile.h
    M lldb/source/Core/Module.cpp
    M lldb/source/Symbol/SymbolFile.cpp

  Log Message:
  -----------
  [lldb][NFC] Replace const std::vector& with ArrayRef in APIs (#170834)

Inside the LLVM codebase, const vector& should just be ArrayRef, as this
more general API works both with vectors, SmallVectors and
SmallVectorImpl, as well as with single elements.

This commit replaces two uses introduced in
https://github.com/llvm/llvm-project/pull/168797 .


  Commit: f88d060c4176d17df56587a083944637ca865cb3
      https://github.com/llvm/llvm-project/commit/f88d060c4176d17df56587a083944637ca865cb3
  Author: Ivan Butygin <ivan.butygin at gmail.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
    M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
    M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
    M mlir/test/Conversion/AMDGPUToROCDL/memory_counter_wait.mlir
    A mlir/test/Conversion/AMDGPUToROCDL/memory_counter_wait_tensor.mlir
    A mlir/test/Conversion/AMDGPUToROCDL/memory_counter_wait_unsupported.mlir
    M mlir/test/Dialect/AMDGPU/canonicalize.mlir
    M mlir/test/Dialect/AMDGPU/ops.mlir

  Log Message:
  -----------
  [mlir][amdgpu] `memory_counter_wait` tensor counter support (#171153)


  Commit: c3579f01996a0ac018b9d452b8ae1cc2cac36acf
      https://github.com/llvm/llvm-project/commit/c3579f01996a0ac018b9d452b8ae1cc2cac36acf
  Author: Sang Ik Lee <sang.ik.lee at intel.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
    M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
    A mlir/test/Conversion/XeGPUToXeVM/loadstore_nd_sub_byte.mlir
    A mlir/test/Conversion/XeGPUToXeVM/prefetch_nd_sub_byte.mlir

  Log Message:
  -----------
  [MLIR][XeGPU][Conversion] Add 2D block op support for sub byte types (#169099)

Some usage case or shapes for 2D block op with sub byte types can be
emulated with 2D block operations for non-sub byte types. Add sub byte
type i4 as a valid XeGPU type. And add lowering of certain 2D
block operations by emulating with larger element types.


  Commit: fdd0d53430e87b6ee792735ee714e756235978ba
      https://github.com/llvm/llvm-project/commit/fdd0d53430e87b6ee792735ee714e756235978ba
  Author: Folkert de Vries <folkert at folkertdev.nl>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
    M llvm/lib/Target/ARM/ARMAsmPrinter.h
    A llvm/test/CodeGen/ARM/cmse-entry-alias.ll

  Log Message:
  -----------
  cmse: emit `__acle_se_` symbol for aliases to entry functions (#162109)

Emitting the symbol in `emitGlobalAlias` seemed most efficient,
otherwise I think you'd have to traverse all aliases. I have verified
that the additional symbol is picked up by `arm-none-eabi-ld` and
correctly generates an entry in `veneers.o`.

Fixes #162084


  Commit: 8c8074f0fa516210011c7b3beb63807ffbe5c5f7
      https://github.com/llvm/llvm-project/commit/8c8074f0fa516210011c7b3beb63807ffbe5c5f7
  Author: Michael Klemm <michael.klemm at amd.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M clang/test/OpenMP/irbuilder_for_unsigned_static_chunked.c
    M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp

  Log Message:
  -----------
  [Flang][OpenMP] Fix OpenMP static scheduling when trip count is zero (#170863)

Code-gen produced incorrect code for cases when the trip count an
associated DO loop was zero. The generated code evaluated the trip count
of the loop and substracted 1 from it. When this was passed to
__kmpc_for_static_init_4u, the value was interpreted as unsigned, which
made the upper bound of the worksharing loop 2^32-1 and caused a
division by zero in the calculation of the loop bounds for the threads.


  Commit: 66134e7136154cbb839484afd8f356cc4ed4a021
      https://github.com/llvm/llvm-project/commit/66134e7136154cbb839484afd8f356cc4ed4a021
  Author: Artem Kroviakov <71938912+akroviakov at users.noreply.github.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
    M mlir/test/Conversion/XeGPUToXeVM/loadstore_matrix.mlir

  Log Message:
  -----------
  [MLIR][XeVM] Improve matrix ops lowering (#170268)


  Commit: 039c834b031b52f6a316e9ec0eadd2c42fc71cef
      https://github.com/llvm/llvm-project/commit/039c834b031b52f6a316e9ec0eadd2c42fc71cef
  Author: Michael Liao <michael.hliao at gmail.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/CodeGen/RegisterScavenging.cpp

  Log Message:
  -----------
  [scavenger] Remove unused iterator. NFC


  Commit: 0e92beb0c0f050e1180c88aa31713f3d6ba9d34e
      https://github.com/llvm/llvm-project/commit/0e92beb0c0f050e1180c88aa31713f3d6ba9d34e
  Author: Kevin Sala Penades <salapenades1 at llnl.gov>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
    M clang/test/OpenMP/amdgcn_target_device_vla.cpp
    M clang/test/OpenMP/amdgpu_target_with_aligned_attribute.c
    M clang/test/OpenMP/declare_target_codegen_globalization.cpp
    M clang/test/OpenMP/metadirective_device_arch_codegen.cpp
    M clang/test/OpenMP/metadirective_device_isa_codegen_amdgcn.cpp
    M clang/test/OpenMP/nvptx_SPMD_codegen.cpp
    M clang/test/OpenMP/nvptx_allocate_codegen.cpp
    M clang/test/OpenMP/nvptx_data_sharing.cpp
    M clang/test/OpenMP/nvptx_distribute_parallel_generic_mode_codegen.cpp
    M clang/test/OpenMP/nvptx_lambda_capturing.cpp
    M clang/test/OpenMP/nvptx_multi_target_parallel_codegen.cpp
    M clang/test/OpenMP/nvptx_nested_parallel_codegen.cpp
    M clang/test/OpenMP/nvptx_parallel_codegen.cpp
    M clang/test/OpenMP/nvptx_parallel_for_codegen.cpp
    M clang/test/OpenMP/nvptx_target_codegen.cpp
    M clang/test/OpenMP/nvptx_target_parallel_codegen.cpp
    M clang/test/OpenMP/nvptx_target_parallel_num_threads_codegen.cpp
    M clang/test/OpenMP/nvptx_target_parallel_proc_bind_codegen.cpp
    M clang/test/OpenMP/nvptx_target_parallel_reduction_codegen.cpp
    M clang/test/OpenMP/nvptx_target_parallel_reduction_codegen_tbaa_PR46146.cpp
    M clang/test/OpenMP/nvptx_target_teams_codegen.cpp
    M clang/test/OpenMP/nvptx_target_teams_distribute_codegen.cpp
    M clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_codegen.cpp
    M clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_generic_mode_codegen.cpp
    M clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_simd_codegen.cpp
    M clang/test/OpenMP/nvptx_target_teams_generic_loop_codegen.cpp
    M clang/test/OpenMP/nvptx_teams_reduction_codegen.cpp
    M clang/test/OpenMP/reduction_implicit_map.cpp
    M clang/test/OpenMP/target_parallel_debug_codegen.cpp
    M clang/test/OpenMP/target_parallel_for_debug_codegen.cpp
    M clang/test/OpenMP/target_parallel_generic_loop_codegen-3.cpp
    M clang/test/OpenMP/target_parallel_generic_loop_codegen.cpp
    M clang/test/OpenMP/target_teams_generic_loop_codegen.cpp
    M clang/test/OpenMP/target_teams_generic_loop_codegen_as_parallel_for.cpp
    M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
    M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
    M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
    M llvm/test/Transforms/OpenMP/add_attributes.ll
    M llvm/test/Transforms/OpenMP/custom_state_machines.ll
    M llvm/test/Transforms/OpenMP/custom_state_machines_pre_lto.ll
    M llvm/test/Transforms/OpenMP/custom_state_machines_remarks.ll
    M llvm/test/Transforms/OpenMP/get_hardware_num_threads_in_block_fold.ll
    M llvm/test/Transforms/OpenMP/gpu_state_machine_function_ptr_replacement.ll
    M llvm/test/Transforms/OpenMP/indirect_call_kernel_info_crash.ll
    M llvm/test/Transforms/OpenMP/is_spmd_exec_mode_fold.ll
    M llvm/test/Transforms/OpenMP/nested_parallelism.ll
    M llvm/test/Transforms/OpenMP/parallel_level_fold.ll
    M llvm/test/Transforms/OpenMP/spmdization.ll
    M llvm/test/Transforms/OpenMP/spmdization_assumes.ll
    M llvm/test/Transforms/OpenMP/spmdization_constant_prop.ll
    M llvm/test/Transforms/OpenMP/spmdization_guarding.ll
    M llvm/test/Transforms/OpenMP/spmdization_guarding_two_reaching_kernels.ll
    M llvm/test/Transforms/OpenMP/spmdization_indirect.ll
    M llvm/test/Transforms/OpenMP/spmdization_no_guarding_two_reaching_kernels.ll
    M llvm/test/Transforms/OpenMP/spmdization_remarks.ll
    M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
    M mlir/test/Target/LLVMIR/omptarget-multi-block-reduction.mlir
    M mlir/test/Target/LLVMIR/omptarget-parallel-llvm.mlir
    M mlir/test/Target/LLVMIR/omptarget-parallel-wsloop.mlir
    M mlir/test/Target/LLVMIR/openmp-target-generic-spmd.mlir
    M mlir/test/Target/LLVMIR/openmp-target-spmd.mlir
    M openmp/device/src/Parallelism.cpp

  Log Message:
  -----------
  [Clang][OpenMP] Switch to __kmpc_parallel_60 with strict parameter (#171082)

This commit switches the `__kmpc_parallel_51` to `__kmpc_parallel_60`,
and adds the strict boolean for the number of threads.


  Commit: f8d0c355f5f8d373b1c31161d31d490b771aa03e
      https://github.com/llvm/llvm-project/commit/f8d0c355f5f8d373b1c31161d31d490b771aa03e
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/SLPVectorizer/X86/copyable-child-node-used-outside.ll
    A llvm/test/Transforms/SLPVectorizer/X86/copyable-with-used-outside-bb.ll

  Log Message:
  -----------
  [SLP]Prefer instructions, ued outside the block, as the initial main copyable instructions

Instructions, used outside the block, must be considered the first
choice for the main instructionsin the copyable nodes, to avoid
use-before-def.

Fixes #171055


  Commit: da7174958be43d69b2ed6b581c8ac8a382b59180
      https://github.com/llvm/llvm-project/commit/da7174958be43d69b2ed6b581c8ac8a382b59180
  Author: Tarun Prabhu <tarun at lanl.gov>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M clang/include/clang/Options/Options.td
    M clang/lib/Driver/ToolChains/Flang.cpp
    M flang/test/Driver/flang-f-opts.f90

  Log Message:
  -----------
  [flang][Driver] Accept (and ignore) some gfortran-specific options

Enable the clang_ignored_gcc_optimization_f_group in flang. These
options are accepted by clang, but ignored after emitting a warning
message. flang's behavior now mirrors both clang and gfortran.

Fixes #158436


  Commit: c7f62d28eac6fe0e9e9219cf57e32a1c8e61be15
      https://github.com/llvm/llvm-project/commit/c7f62d28eac6fe0e9e9219cf57e32a1c8e61be15
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M utils/bazel/llvm-project-overlay/libc/BUILD.bazel

  Log Message:
  -----------
  [bazel] Port 2a5420ea5184a334c2af9f2f9f43de4dfc6b76d3 (#171161)

Move some headers into the common __support_time library now that they
are no longer platform specific.


  Commit: 57607e2b51e318519c171801ebce99d8ee01a2da
      https://github.com/llvm/llvm-project/commit/57607e2b51e318519c171801ebce99d8ee01a2da
  Author: anonymous <shyeyian at icloud.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/include/clang/Basic/Sarif.h
    M clang/include/clang/Frontend/SARIFDiagnostic.h
    M clang/lib/Basic/Sarif.cpp
    M clang/lib/Frontend/SARIFDiagnostic.cpp
    M clang/lib/StaticAnalyzer/Core/SarifDiagnostics.cpp
    M clang/unittests/Basic/SarifTest.cpp

  Log Message:
  -----------
  [Clang][Diagnose] Minimal support on emit-include-location in sarif mode (#170415)

Currently, invoking `clang++` with `-fdiagnostics-format=sarif` causes a
crash, with stack traces indicating that
`SARIFDiagnostic::emitIncludeLocation` is unimplemented.

This PR adds minimal support for converting `In file included from ...`
and `In module ...` into `SARIF.result.relatedLocations`. With this
change, `clang++ -fdiagnostics-format=sarif` no longer crashes and now
provides a minimal amount of useful information.

Thank you.


  Commit: 3e008cb333d1824a1f69b01d0fab9ee69ce3d9ed
      https://github.com/llvm/llvm-project/commit/3e008cb333d1824a1f69b01d0fab9ee69ce3d9ed
  Author: Chow <Shaochi.Zhou at amd.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Scalar/Scalarizer.cpp
    M llvm/test/Transforms/Scalarizer/min-bits.ll
    A llvm/test/Transforms/Scalarizer/vector-bool-not-aligned-min-bits.ll

  Log Message:
  -----------
  Scalarizer : Fix vector shuffle issue when can't aligned to customized minBits. (#163912)

When set a value to minBits, and doing scalarizer pass, if last remained
boolean vector size can't be aligned to min bits, remained bits should
be processed each by each, and not allowed to do a direct shuffle during
packing.

Problem:
In 'concatenate' step, when processing a boolean vector, if last
remained bits (fragment) can't be aligned to minBits, but required to be
packed, those bits should be processed each by each.

A direct call to vector shuffle is to assume those remained boolean bits
can be packed to target pack size. For example, when processing a
boolean vector with `size = 7`, but set `min bits = 4`, first fragment
with `4` bits can be packed correctly, but there are still `3` bits
remained which can't be used in a vector shuffle call.

Solution:
If remained bits can't be aligned to required target (min bits) pack
size, process them each by each.
(This will mostly only influence boolean vector as they have bit width
not aligned to pow(2).)

---------

Co-authored-by: Zhou, Shaochi(AMD) <shaozhou at amd.com>


  Commit: bc9f96a5e62d0b89588092343d137995811a9b80
      https://github.com/llvm/llvm-project/commit/bc9f96a5e62d0b89588092343d137995811a9b80
  Author: Jonas Devlieghere <jonas at devlieghere.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M lldb/include/lldb/Core/Debugger.h
    M lldb/source/API/SBDebugger.cpp
    M lldb/source/Commands/CommandObjectVersion.cpp
    M lldb/source/Commands/CommandObjectVersion.h
    M lldb/source/Commands/Options.td
    M lldb/source/Core/Debugger.cpp
    A lldb/test/Shell/Commands/command-version.test

  Log Message:
  -----------
  [lldb] Dump build configuration with `version -v` (#170772)

Add a verbose option to the version command and include the "build
configuration" in the command output. This allows users to quickly
identify if their version of LLDB was built with support for
xml/curl/python/lua etc. This data is already available through the SB
API using SBDebugger::GetBuildConfiguration, but this makes it more
discoverable.

```
(lldb) version -v
lldb version 22.0.0git (git at github.com:llvm/llvm-project.git revision 21a2aac5e5456f9181384406f3b3fcad621a7076)
  clang revision 21a2aac5e5456f9181384406f3b3fcad621a7076
  llvm revision 21a2aac5e5456f9181384406f3b3fcad621a7076
  editline_wchar: yes
  lzma: yes
  curses: yes
  editline: yes
  fbsdvmcore: yes
  xml: yes
  lua: yes
  python: yes
  targets: [AArch64, AMDGPU, ARM, AVR, BPF, Hexagon, Lanai, LoongArch, Mips, MSP430, NVPTX, PowerPC, RISCV, Sparc, SPIRV, SystemZ, VE, WebAssembly, X86, XCore]
  curl: yes
```

Resolves #170727


  Commit: c6e23ab80753a01dce270f5f8a133fbec942315d
      https://github.com/llvm/llvm-project/commit/c6e23ab80753a01dce270f5f8a133fbec942315d
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp

  Log Message:
  -----------
  [MLIR][XeVM] Fix unused variable warning in 66134e7 (#171171)

Inline the variable only used in an assert per the LLVM coding
standards.


  Commit: 7305ed7e1554d5af652bdf7afc731f217cc49f09
      https://github.com/llvm/llvm-project/commit/7305ed7e1554d5af652bdf7afc731f217cc49f09
  Author: Ravil Dorozhinskii <ravil.aviva.com at gmail.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
    M mlir/test/Dialect/LLVMIR/rocdl.mlir
    M mlir/test/Target/LLVMIR/rocdl.mlir

  Log Message:
  -----------
  [ROCDL] added math instructions to the ROCDL dialect (#169672)

Exposed llvm amdgcn math intrinsic calls through ROCDL


  Commit: 371da58cfa05caa6ff654e538b913b059d9a1f44
      https://github.com/llvm/llvm-project/commit/371da58cfa05caa6ff654e538b913b059d9a1f44
  Author: Sergei Druzhkov <serzhdruzhok at gmail.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M lldb/tools/lldb-dap/Handler/PauseRequestHandler.cpp
    M lldb/tools/lldb-dap/Handler/RequestHandler.h
    M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
    M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
    M lldb/unittests/DAP/ProtocolRequestsTest.cpp

  Log Message:
  -----------
  [lldb-dap] Migrate pause request to structured types (#171096)

This patch migrates `pause` request into structured types and adds test
for it.


  Commit: 4709018c8c8632093337ddcd67ddba1dbf17d718
      https://github.com/llvm/llvm-project/commit/4709018c8c8632093337ddcd67ddba1dbf17d718
  Author: Stefan Weigl-Bosker <stefan at s00.xyz>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
    M mlir/test/Conversion/TensorToSPIRV/tensor-ops-to-spirv.mlir

  Log Message:
  -----------
  [MLIR][Spirv] Don't lower tensors that can't be represented by an ArrayType (#171002)

I noticed this because of
https://github.com/llvm/llvm-project/issues/159738, though it was only
caught by his fuzzer because it wrapped to 0.
Also, is there a reason for the usage of `unsigned` for sizes in spirv
types? I believe most of the builtin types use `int64_t` for sizes, so
it may make sense to do the same for spirv.


  Commit: c9a3ab293bda9b73e9df03459ea26ee536d78d64
      https://github.com/llvm/llvm-project/commit/c9a3ab293bda9b73e9df03459ea26ee536d78d64
  Author: Robert Imschweiler <robert.imschweiler at amd.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
    M llvm/test/Transforms/UnifyLoopExits/basic.ll

  Log Message:
  -----------
  [AMDGPU][UnifyLoopExits] Fix duplicate successor handling (#170759)

Fixes https://github.com/llvm/llvm-project/issues/170730

Maybe I can also come up with a more elegant solution. But I think it
wouldn't make a lot of sense trying to avoid multiple "fake" target
blocks. Would require a mapping between original and fake target
blocks...


  Commit: fa511cde48ea218dadfa8b35658ac06368f34607
      https://github.com/llvm/llvm-project/commit/fa511cde48ea218dadfa8b35658ac06368f34607
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M .ci/premerge_advisor_explain.py

  Log Message:
  -----------
  [CI] Make premerge advisor log comments path

This is necessary to debug a problem where Windows comments are not
being uploaded correctly. This should also make future debugging easier
if a similar issue ever comes up again.


  Commit: c5d17bdf0cec7b0cfd9bb497228bad160be361af
      https://github.com/llvm/llvm-project/commit/c5d17bdf0cec7b0cfd9bb497228bad160be361af
  Author: Andrew Haberlandt <ndrewh at users.noreply.github.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M compiler-rt/cmake/Modules/CompilerRTDarwinUtils.cmake
    M compiler-rt/cmake/builtin-config-ix.cmake
    M compiler-rt/lib/builtins/CMakeLists.txt
    M compiler-rt/test/CMakeLists.txt
    M compiler-rt/test/builtins/CMakeLists.txt
    M llvm/runtimes/CMakeLists.txt

  Log Message:
  -----------
  [compiler-rt] Add check-builtins target for LLVM_ENABLE_RUNTIMES builds (#166837)

When doing a LLVM_ENABLE_RUNTIMES-based build of clang+compiler_rt, the
`check-builtins` target is missing and builtins tests are not run
(#112105, #144090).

This provides one possible path forward for enabling these tests.

The approach taken here is to test the builtins with the `compiler-rt`
runtime build (i.e. only if you pass
`LLVM_ENABLE_RUNTIMES='compiler-rt'`). The builtins tests currently rely
on shared test infrastructure in `compiler-rt/`, so this is probably the
easiest solution without relocating the builtins and their tests outside
of `compiler-rt/`.

The main challenge is that the built-ins test configuration expects to
be able to inspect the builtin target and see the sources used to build
it:
```
    get_target_property(BUILTIN_LIB_SOURCES "${BUILTIN_LIB_TARGET_NAME}" SOURCES)
```

Since the builtins build and runtimes build are separate under
LLVM_ENABLE_RUNTIMES, this target inspection is not possible. To get
around this, we write a temporary file alongside each builtins library
containing the list of sources (e.g.
`"${CMAKE_BINARY_DIR}/clang_rt.builtins-${arch}.sources.txt"`). Then, we
introduce an undocumented compiler-rt option
`COMPILER_RT_FORCE_TEST_BUILTINS_DIR` (which is only intended to be used
by the LLVM_ENABLE_RUNTIMES build, and could be removed after builtins
re relocated) that passes the path to the directory containing this
file, and configures builtins tests (even though the runtimes build has
`COMPILER_RT_BUILD_BUILTINS=OFF`)

rdar://163518748


  Commit: 2ac832bac344a4b73dd2d8b7e3c02ba05629b914
      https://github.com/llvm/llvm-project/commit/2ac832bac344a4b73dd2d8b7e3c02ba05629b914
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M clang/test/Headers/__clang_hip_math.hip

  Log Message:
  -----------
  clang/HIP: Regenerate __clang_hip_math test checks (#171185)


  Commit: de53b1a4ef4cd7c641b3ec7ca6ac272a1b292185
      https://github.com/llvm/llvm-project/commit/de53b1a4ef4cd7c641b3ec7ca6ac272a1b292185
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/test/Transforms/LoopVectorize/AArch64/gather-cost.ll
    M llvm/test/Transforms/LoopVectorize/ARM/gather-cost.ll
    M llvm/test/Transforms/LoopVectorize/X86/gather-cost.ll

  Log Message:
  -----------
  [LV] Simplify IR for gather-cost.ll, auto-generate checks. (NFC)

Simplify tests and auto-generate check in preparation for further
updates.


  Commit: a38f84718713b5c6fedb1ca0f2e800c2f1851fa1
      https://github.com/llvm/llvm-project/commit/a38f84718713b5c6fedb1ca0f2e800c2f1851fa1
  Author: Steven Wu <stevenwu at apple.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/CAS/OnDiskCommon.cpp
    M llvm/lib/CAS/OnDiskCommon.h
    M llvm/lib/CAS/UnifiedOnDiskCache.cpp

  Log Message:
  -----------
  [CAS] Fix deprecation warning in `getBootTime` (#171168)

For some older Linux distro that still ships deprecated sysctl header,
there can be deprecation warnings when building LLVMCAS. This also
results LLVMCAS to use the deprecated sysctl function, while it is only
intended to be used on Darwin platforms.

Fix the issue by only including sysctl on Apple platforms. Also move the
platform dependent `getBootTime` code into OnDiskCommon.cpp.


  Commit: 7c9aa14b964ceab0ff9d06042f9d57b7979893f8
      https://github.com/llvm/llvm-project/commit/7c9aa14b964ceab0ff9d06042f9d57b7979893f8
  Author: David Green <david.green at arm.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/sve-int-mulh-pred.ll
    M llvm/test/CodeGen/AArch64/sve2-int-mulh.ll

  Log Message:
  -----------
  [AArch64] Use sve instructions for fixed-width smulh/umulh. (#166168)

Like v2i64 mul and operations like divide, we should be able to use the SVE
umulh and smulh instructions with 128bit vectors, providing that we have
SVE/SVE2. There are a number of other instructions that look like they should
presumably be treated the same way.


  Commit: 7be3973a27e7ff231135687c8705e84a19987aab
      https://github.com/llvm/llvm-project/commit/7be3973a27e7ff231135687c8705e84a19987aab
  Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/test/ThinLTO/X86/pr35472.ll

  Log Message:
  -----------
  [DebugInfo][test] Fix llvm/test/ThinLTO/X86/pr35472.ll (NFC) (#170952)

The test is intended to verify lazy loading of debug-location scope
metadata. However, after d5d3eb16b7ab72529c83dacb2889811491e48909,
DILexicalScope that was expected to be lazily loaded was not used in IR,
so lazy loading did not occur.

This patch fixes that, and adds an extra bcanalyzer check to ensure that
DILexicalScope record is emitted.


  Commit: 0959bb30016f439e8f9e975e770c49b2eb0dd129
      https://github.com/llvm/llvm-project/commit/0959bb30016f439e8f9e975e770c49b2eb0dd129
  Author: David Green <david.green at arm.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetLowering.h
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/Thumb2/mve-vmulh.ll

  Log Message:
  -----------
  [DAG] Generate UMULH/SMULH with wider vector types (#170283)

The existing code for generating umulh/smulh was checking that that the
getTypeToTransformTo was a LegalOrCustom operation. This only takes a
single legalization step though, so if v4i32 was legal, a v8i32 would be
transformed but a v16i32 would not.

This patch introduces a getLegalTypeToTransformTo that performs
getTypeToTransformTo until a legal type is reached. The umulh/smulh code
can then use it to check if the final resultant type will be legal.


  Commit: 7dfe599bda5bd2b6644ca2ec339565d53d20a718
      https://github.com/llvm/llvm-project/commit/7dfe599bda5bd2b6644ca2ec339565d53d20a718
  Author: Sean Fertile <sd.fertile at gmail.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg-mir.ll
    M llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
    M llvm/test/CodeGen/PowerPC/aix32-vector-vararg-callee.ll
    M llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg-mir.ll
    M llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
    M llvm/test/CodeGen/PowerPC/aix64-vector-vararg-callee.ll
    M llvm/test/CodeGen/PowerPC/aix64-vector-vararg-fixed-callee.ll

  Log Message:
  -----------
  Fix VarArgs FixedStack object on AIX. (#170240)

Create a mutable aliased fixed stack object for the va_list when any of
the optional arguments are passed in gprs. Since we need to spill the
gpr registers into the parameter save area the stack object is not
immutable, and since the values will almost certainly be accessed
through the IR value for a va_list make the stack object aliased as
well.


  Commit: b8a50c7cdb08ad757a931e6b6005e758258e1781
      https://github.com/llvm/llvm-project/commit/b8a50c7cdb08ad757a931e6b6005e758258e1781
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M clang/lib/Headers/__clang_hip_math.h
    M clang/test/Headers/__clang_hip_math.hip

  Log Message:
  -----------
  clang/HIP: Avoid using ocml logb (#171186)

We have special case handling for the logb builtins, so use them.


  Commit: 3ccd67295bfb9bf6f88e3315506fda8359df2668
      https://github.com/llvm/llvm-project/commit/3ccd67295bfb9bf6f88e3315506fda8359df2668
  Author: Shilei Tian <i at tianshilei.me>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/inlineasm-mismatched-size-error.ll

  Log Message:
  -----------
  [AMDGPU] Fix a crash when a bool variable is used in inline asm (#171004)

Fixes SWDEV-570184.


  Commit: 83fd2c994a82119edf249ac3c169250c26f0b21c
      https://github.com/llvm/llvm-project/commit/83fd2c994a82119edf249ac3c169250c26f0b21c
  Author: Jonas Devlieghere <jonas at devlieghere.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/tools/dsymutil/dsymutil.cpp

  Log Message:
  -----------
  [dsymutil] Remove spurious exit when falling back to fat64 header (#171189)

In #118898 I changed dsymutil to emit a warning instead of an error when
exceeding the 4GB limit for a slice and automatically fall back to using
the fat64 header. However, while doing so, I forgot to remove the return
which defeats the whole purpose.

rdar://140998416


  Commit: 56fdc61e3a73cad6acb3e7f52c30590b215506b4
      https://github.com/llvm/llvm-project/commit/56fdc61e3a73cad6acb3e7f52c30590b215506b4
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M mlir/lib/Dialect/SCF/IR/SCF.cpp

  Log Message:
  -----------
  [MLIR] Apply clang-tidy fixes for llvm-qualified-auto in SCF.cpp (NFC)


  Commit: 5d53085d7aa832452efcfae3a187724a0456ac7e
      https://github.com/llvm/llvm-project/commit/5d53085d7aa832452efcfae3a187724a0456ac7e
  Author: Florian Mayer <fmayer at google.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M clang/unittests/Analysis/FlowSensitive/MockHeaders.cpp

  Log Message:
  -----------
  [NFC] [FlowSensitive] Fix missing namespace in MockHeaders (#170954)

This happened to work because we were missing both a namespace close and
open and things happened to be included in the correct order.


  Commit: 863a4e410b0ac1c734291b79ddb84cbe19936220
      https://github.com/llvm/llvm-project/commit/863a4e410b0ac1c734291b79ddb84cbe19936220
  Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
    A llvm/test/Verifier/AMDGPU/test-cvt-fp4f6f8-immarg-ranges.ll

  Log Message:
  -----------
  [AMDGPU] Add argument range annotations to intrinsics where applicable (#170958)

This commit adds annotations to AMDGPU intrinscis that take arguments
which are documented to lie within a specified range, ensuring that
invalid instances of these intrinsics don't pass verification.

(Note that certain intrinsics that could have range annothations don't,
as their existing behavior is to clamp out-of-range values silently.)

Disclaimer: tests generated by LLM (code is mine)


  Commit: 7ecc9ee9198931ceabbd85cc4a39c5f07a5437a2
      https://github.com/llvm/llvm-project/commit/7ecc9ee9198931ceabbd85cc4a39c5f07a5437a2
  Author: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
    M llvm/test/CodeGen/X86/isel-icmp.ll

  Log Message:
  -----------
  [X86][GlobalISel] Set Dst register correctly when narrowing G_ICMP (#169947)

Due to untested branch in #119335

Fixes #167326


  Commit: b802fdbe76ae52f2e66fd6aea32b3299136a6f31
      https://github.com/llvm/llvm-project/commit/b802fdbe76ae52f2e66fd6aea32b3299136a6f31
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h

  Log Message:
  -----------
  [RISCV] Remove unnecesary override of getVectorTypeBreakdownForCallingConv. NFC (#171155)

There used to be code in here to make i32 legal on RV64, but it was
removed.

Also remove unnecessary temporary variable from
getRegisterTypeForCallingConv.


  Commit: bb79b350681493ce0718d0ae70a080c981010e6a
      https://github.com/llvm/llvm-project/commit/bb79b350681493ce0718d0ae70a080c981010e6a
  Author: Florian Mayer <fmayer at google.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M clang/include/clang/Analysis/FlowSensitive/Models/UncheckedStatusOrAccessModel.h
    M clang/lib/Analysis/FlowSensitive/Models/UncheckedStatusOrAccessModel.cpp
    M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp

  Log Message:
  -----------
  [FlowSensitive] [StatusOr] [11/N] Assume const accessor calls are stable (#170935)

This is not necessarily correct, but prevents us from flagging lots of
false positives because code usually abides by this.


  Commit: 41363b40bebaad3e04fa128a177b85224ef66214
      https://github.com/llvm/llvm-project/commit/41363b40bebaad3e04fa128a177b85224ef66214
  Author: Florian Mayer <fmayer at google.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M clang/unittests/Analysis/FlowSensitive/MockHeaders.cpp

  Log Message:
  -----------
  [NFC] [FlowSensitive] Add mock unique_ptr header (#170942)


  Commit: d17f3b53e913a9ceb0b3747bb83eeb6dbe3d727b
      https://github.com/llvm/llvm-project/commit/d17f3b53e913a9ceb0b3747bb83eeb6dbe3d727b
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M compiler-rt/test/xray/TestCases/Posix/basic-filtering.cpp
    M compiler-rt/test/xray/TestCases/Posix/fdr-mode.cpp

  Log Message:
  -----------
  [XRay] Disable two more tests on armhf

Similar to d6f92050c0c2f60e78f3c8bcf557c5e69b025d7a. Needed now that
these tests are actually running more broadly.


  Commit: 1e16f4e43d4bda3dc21b4a66dd0ce95e8dac8fd5
      https://github.com/llvm/llvm-project/commit/1e16f4e43d4bda3dc21b4a66dd0ce95e8dac8fd5
  Author: stomfaig <55883018+stomfaig at users.noreply.github.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M flang/include/flang/Optimizer/Builder/FIRBuilder.h
    M flang/lib/Optimizer/Builder/FIRBuilder.cpp
    M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
    A flang/test/HLFIR/simplify-hlfir-intrinsics-product.fir

  Log Message:
  -----------
  [flang] add simplification for ProductOp intrinsic (#169575)

Add simplification for `ProductOp`, by implementing support for
`ReductionConversion` and adding it to the pattern list in
`SimplifyHLFIRIntrinsics` pass.

Closes:
https://github.com/issues/recent?issue=llvm%7Cllvm-project%7C169433

---------

Co-authored-by: Eugene Epshteyn <eepshteyn at nvidia.com>


  Commit: e3905a4aa6aaeef643f4e0c64fc6402186548057
      https://github.com/llvm/llvm-project/commit/e3905a4aa6aaeef643f4e0c64fc6402186548057
  Author: Teresa Johnson <tejohnson at google.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
    M llvm/test/Transforms/PGOProfile/memprof_annotate_indirect_call.test

  Log Message:
  -----------
  [MemProf] Merge all callee guids for indirect call VP metadata (#170964)

When matching memprof profiles, for indirect calls we use the callee
guids recorded on callsites in the profile to synthesize indirect call
VP metadata when none exists. However, we only do this for the first
matching CallSiteEntry from the profile.

In some case there can be multiple, for example when the current
function was eventually inlined into multiple callers. Profile
generation propagates the CallSiteEntry from those callers into the
inlined callee's profile as it may not yet have been inlined in the
new compile.

To capture all of these potential indirect call targets, merge callee
guids across all matching CallSiteEntries.


  Commit: f6971bf25daff242590ea025ae3b37603845c0b4
      https://github.com/llvm/llvm-project/commit/f6971bf25daff242590ea025ae3b37603845c0b4
  Author: Florian Mayer <fmayer at google.com>
  Date:   2025-12-08 (Mon, 08 Dec 2025)

  Changed paths:
    M clang/lib/Analysis/FlowSensitive/Models/UncheckedStatusOrAccessModel.cpp
    M clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp

  Log Message:
  -----------
  [FlowSensitive] [StatusOr] [12/N] Add support for smart pointers (#170943)


  Commit: 8e8d92c9144850bdc19caaf3ae53df9a3d1bcd28
      https://github.com/llvm/llvm-project/commit/8e8d92c9144850bdc19caaf3ae53df9a3d1bcd28
  Author: Florian Mayer <fmayer at google.com>
  Date:   2025-12-10 (Wed, 10 Dec 2025)

  Changed paths:
    M .ci/premerge_advisor_explain.py
    M .github/workflows/bazel-checks.yml
    M .github/workflows/build-ci-container-tooling.yml
    M .github/workflows/build-ci-container-windows.yml
    M .github/workflows/build-ci-container.yml
    M .github/workflows/build-metrics-container.yml
    M .github/workflows/check-ci.yml
    M .github/workflows/ci-post-commit-analyzer.yml
    M .github/workflows/commit-access-greeter.yml
    M .github/workflows/commit-access-review.yml
    M .github/workflows/docs.yml
    M .github/workflows/email-check.yaml
    M .github/workflows/gha-codeql.yml
    M .github/workflows/hlsl-test-all.yaml
    M .github/workflows/issue-release-workflow.yml
    M .github/workflows/issue-subscriber.yml
    M .github/workflows/issue-write.yml
    M .github/workflows/libc-fullbuild-tests.yml
    M .github/workflows/libc-overlay-tests.yml
    M .github/workflows/libclang-abi-tests.yml
    M .github/workflows/libclang-python-tests.yml
    M .github/workflows/libcxx-build-and-test.yaml
    M .github/workflows/libcxx-build-containers.yml
    M .github/workflows/libcxx-check-generated-files.yml
    M .github/workflows/libcxx-run-benchmarks.yml
    M .github/workflows/llvm-abi-tests.yml
    M .github/workflows/llvm-bugs.yml
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    A bolt/test/runtime/AArch64/pacret-synchronous-unwind.cpp
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    M lldb/source/Plugins/Process/scripted/ScriptedFrame.h
    M lldb/source/Symbol/SymbolFile.cpp
    M lldb/source/Target/StackFrame.cpp
    M lldb/source/Target/StackFrameList.cpp
    M lldb/test/API/functionalities/scripted_frame_provider/TestScriptedFrameProvider.py
    A lldb/test/API/functionalities/scripted_frame_provider/python_helper.py
    M lldb/test/API/functionalities/scripted_frame_provider/test_frame_providers.py
    M lldb/test/API/functionalities/scripted_process/dummy_scripted_process.py
    A lldb/test/Shell/Commands/command-version.test
    M lldb/tools/lldb-dap/DAP.cpp
    M lldb/tools/lldb-dap/DAP.h
    M lldb/tools/lldb-dap/DAPLog.cpp
    M lldb/tools/lldb-dap/DAPLog.h
    M lldb/tools/lldb-dap/DAPSessionManager.cpp
    M lldb/tools/lldb-dap/EventHelper.cpp
    M lldb/tools/lldb-dap/EventHelper.h
    M lldb/tools/lldb-dap/Handler/PauseRequestHandler.cpp
    M lldb/tools/lldb-dap/Handler/RequestHandler.h
    M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
    M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
    M lldb/tools/lldb-dap/Transport.cpp
    M lldb/tools/lldb-dap/Transport.h
    M lldb/tools/lldb-dap/tool/lldb-dap.cpp
    M lldb/unittests/DAP/CMakeLists.txt
    A lldb/unittests/DAP/DAPLogTest.cpp
    M lldb/unittests/DAP/ProtocolRequestsTest.cpp
    M lldb/unittests/DAP/TestBase.cpp
    M lldb/unittests/DAP/TestBase.h
    M llvm/bindings/ocaml/llvm/llvm_ocaml.c
    M llvm/docs/RISCVUsage.rst
    M llvm/docs/ReleaseNotes.md
    M llvm/examples/OrcV2Examples/OrcV2CBindingsAddObjectFile/OrcV2CBindingsAddObjectFile.c
    M llvm/examples/OrcV2Examples/OrcV2CBindingsBasicUsage/OrcV2CBindingsBasicUsage.c
    M llvm/examples/OrcV2Examples/OrcV2CBindingsDumpObjects/OrcV2CBindingsDumpObjects.c
    M llvm/examples/OrcV2Examples/OrcV2CBindingsIRTransforms/OrcV2CBindingsIRTransforms.c
    M llvm/examples/OrcV2Examples/OrcV2CBindingsMCJITLikeMemoryManager/OrcV2CBindingsMCJITLikeMemoryManager.c
    M llvm/examples/OrcV2Examples/OrcV2CBindingsRemovableCode/OrcV2CBindingsRemovableCode.c
    M llvm/include/llvm-c/BitReader.h
    M llvm/include/llvm-c/Core.h
    M llvm/include/llvm-c/Target.h
    M llvm/include/llvm/ADT/STLExtras.h
    M llvm/include/llvm/Analysis/RuntimeLibcallInfo.h
    M llvm/include/llvm/CodeGen/MachineFrameInfo.h
    M llvm/include/llvm/CodeGen/SelectionDAG.h
    M llvm/include/llvm/CodeGen/TargetFrameLowering.h
    M llvm/include/llvm/CodeGen/TargetLowering.h
    M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
    M llvm/include/llvm/IR/Constants.h
    M llvm/include/llvm/IR/Instructions.h
    M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
    M llvm/include/llvm/IR/LLVMContext.h
    M llvm/include/llvm/IR/User.h
    M llvm/include/llvm/Passes/PassBuilder.h
    M llvm/include/llvm/Transforms/IPO/WholeProgramDevirt.h
    M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
    M llvm/include/llvm/Transforms/Vectorize/LoopVectorize.h
    M llvm/lib/Analysis/AliasAnalysis.cpp
    M llvm/lib/Bitcode/Reader/BitReader.cpp
    M llvm/lib/Bitcode/Writer/ValueEnumerator.cpp
    M llvm/lib/CAS/OnDiskCommon.cpp
    M llvm/lib/CAS/OnDiskCommon.h
    M llvm/lib/CAS/UnifiedOnDiskCache.cpp
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/CodeGen/PHIElimination.cpp
    M llvm/lib/CodeGen/PrologEpilogInserter.cpp
    M llvm/lib/CodeGen/RegisterScavenging.cpp
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/lib/CodeGen/TypePromotion.cpp
    M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
    M llvm/lib/IR/Constants.cpp
    M llvm/lib/IR/Core.cpp
    M llvm/lib/IR/Instructions.cpp
    M llvm/lib/IR/User.cpp
    M llvm/lib/IR/Verifier.cpp
    M llvm/lib/Passes/PassBuilderPipelines.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.h
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AMDGPU/AMDGPU.h
    M llvm/lib/Target/AMDGPU/AMDGPU.td
    M llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h
    M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
    M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
    M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/CMakeLists.txt
    R llvm/lib/Target/AMDGPU/InstCombineTables.td
    M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
    M llvm/lib/Target/AMDGPU/SIFrameLowering.h
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    M llvm/lib/Target/AMDGPU/VOP2Instructions.td
    M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
    M llvm/lib/Target/ARM/ARMAsmPrinter.h
    M llvm/lib/Target/Hexagon/HexagonGenWideningVecInstr.cpp
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/lib/Target/PowerPC/PPCInstrVSX.td
    M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
    M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
    M llvm/lib/Target/RISCV/RISCVFrameLowering.h
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
    M llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
    M llvm/lib/Target/RISCV/RISCVSubtarget.h
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
    M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
    M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
    M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
    M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
    M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
    M llvm/lib/Target/SPIRV/SPIRVUtils.h
    M llvm/lib/Target/Target.cpp
    M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
    M llvm/lib/Target/X86/X86CompressEVEX.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
    M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
    M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
    M llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
    M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
    M llvm/lib/Transforms/Scalar/Scalarizer.cpp
    M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
    M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
    M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/lib/Transforms/Vectorize/VPlan.h
    M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
    M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
    M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
    M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
    M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
    M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
    M llvm/runtimes/CMakeLists.txt
    A llvm/test/Analysis/CostModel/RISCV/fshl_fshr.ll
    M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
    M llvm/test/CodeGen/AArch64/fixed-length-bf16-arith.ll
    M llvm/test/CodeGen/AArch64/sve-int-mulh-pred.ll
    M llvm/test/CodeGen/AArch64/sve2-int-mulh.ll
    M llvm/test/CodeGen/AArch64/wineh-pac.ll
    A llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll
    M llvm/test/CodeGen/AMDGPU/inlineasm-mismatched-size-error.ll
    M llvm/test/CodeGen/AMDGPU/lds-dma-waits.ll
    M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll
    M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
    A llvm/test/CodeGen/AMDGPU/phi-elim-mli-available.mir
    A llvm/test/CodeGen/AMDGPU/promote-alloca-cfg.ll
    M llvm/test/CodeGen/AMDGPU/promote-alloca-multidim.ll
    M llvm/test/CodeGen/AMDGPU/promote-alloca-negative-index.ll
    M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-to-vector.ll
    A llvm/test/CodeGen/ARM/cmse-entry-alias.ll
    M llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg-mir.ll
    M llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
    M llvm/test/CodeGen/PowerPC/aix32-vector-vararg-callee.ll
    M llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg-mir.ll
    M llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
    M llvm/test/CodeGen/PowerPC/aix64-vector-vararg-callee.ll
    M llvm/test/CodeGen/PowerPC/aix64-vector-vararg-fixed-callee.ll
    M llvm/test/CodeGen/PowerPC/fminimum-fmaximum.ll
    M llvm/test/CodeGen/PowerPC/scalar-min-max.ll
    A llvm/test/CodeGen/PowerPC/splat-after-xxsldwi.ll
    M llvm/test/CodeGen/RISCV/attributes.ll
    M llvm/test/CodeGen/RISCV/mul.ll
    M llvm/test/CodeGen/RISCV/rv32p.ll
    M llvm/test/CodeGen/RISCV/rv64p.ll
    M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
    M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
    A llvm/test/CodeGen/SPIRV/const-array-gep.ll
    A llvm/test/CodeGen/SPIRV/pointers/fun-with-aggregate-arg-in-const-init.ll
    A llvm/test/CodeGen/SPIRV/pointers/ptr-argument-byref-amdgcnspirv.ll
    M llvm/test/CodeGen/Thumb2/mve-vmulh.ll
    M llvm/test/CodeGen/X86/apx/compress-evex.mir
    M llvm/test/CodeGen/X86/bitcnt-big-integer.ll
    M llvm/test/CodeGen/X86/compress-undef-float-passthrough.ll
    M llvm/test/CodeGen/X86/isel-icmp.ll
    M llvm/test/CodeGen/X86/shift-i512.ll
    M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
    M llvm/test/MC/RISCV/attribute-arch.s
    M llvm/test/MC/RISCV/rv32i-invalid.s
    M llvm/test/MC/RISCV/rv32p-invalid.s
    M llvm/test/MC/RISCV/rv32p-valid.s
    M llvm/test/MC/RISCV/rv64p-valid.s
    M llvm/test/TableGen/x86-instr-mapping.inc
    M llvm/test/ThinLTO/X86/pr35472.ll
    M llvm/test/Transforms/Attributor/AMDGPU/tag-invariant-loads.ll
    R llvm/test/Transforms/DeadStoreElimination/atomic-todo.ll
    M llvm/test/Transforms/DeadStoreElimination/atomic.ll
    M llvm/test/Transforms/InstCombine/icmp-add.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/early_exit_costs.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/gather-cost.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
    A llvm/test/Transforms/LoopVectorize/AArch64/sve-predicated-costs.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
    M llvm/test/Transforms/LoopVectorize/ARM/gather-cost.ll
    A llvm/test/Transforms/LoopVectorize/RISCV/predicated-costs.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
    M llvm/test/Transforms/LoopVectorize/X86/gather-cost.ll
    M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
    M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
    M llvm/test/Transforms/LoopVectorize/scalable-assume.ll
    M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
    M llvm/test/Transforms/LoopVectorize/scalable-inductions.ll
    M llvm/test/Transforms/LoopVectorize/scalable-iv-outside-user.ll
    M llvm/test/Transforms/LoopVectorize/vplan-printing-reductions.ll
    M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
    M llvm/test/Transforms/OpenMP/add_attributes.ll
    M llvm/test/Transforms/OpenMP/custom_state_machines.ll
    M llvm/test/Transforms/OpenMP/custom_state_machines_pre_lto.ll
    M llvm/test/Transforms/OpenMP/custom_state_machines_remarks.ll
    M llvm/test/Transforms/OpenMP/get_hardware_num_threads_in_block_fold.ll
    M llvm/test/Transforms/OpenMP/gpu_state_machine_function_ptr_replacement.ll
    M llvm/test/Transforms/OpenMP/indirect_call_kernel_info_crash.ll
    M llvm/test/Transforms/OpenMP/is_spmd_exec_mode_fold.ll
    M llvm/test/Transforms/OpenMP/nested_parallelism.ll
    M llvm/test/Transforms/OpenMP/parallel_level_fold.ll
    M llvm/test/Transforms/OpenMP/spmdization.ll
    M llvm/test/Transforms/OpenMP/spmdization_assumes.ll
    M llvm/test/Transforms/OpenMP/spmdization_constant_prop.ll
    M llvm/test/Transforms/OpenMP/spmdization_guarding.ll
    M llvm/test/Transforms/OpenMP/spmdization_guarding_two_reaching_kernels.ll
    M llvm/test/Transforms/OpenMP/spmdization_indirect.ll
    M llvm/test/Transforms/OpenMP/spmdization_no_guarding_two_reaching_kernels.ll
    M llvm/test/Transforms/OpenMP/spmdization_remarks.ll
    M llvm/test/Transforms/PGOProfile/memprof-dump-matched-alloc-site.ll
    M llvm/test/Transforms/PGOProfile/memprof-dump-matched-call-sites.ll
    M llvm/test/Transforms/PGOProfile/memprof_annotate_indirect_call.test
    M llvm/test/Transforms/PhaseOrdering/AArch64/std-find.ll
    A llvm/test/Transforms/PhaseOrdering/loop-vectorize-bfi.ll
    A llvm/test/Transforms/PhaseOrdering/speculative-devirt-then-inliner.ll
    M llvm/test/Transforms/SLPVectorizer/X86/copyable-child-node-used-outside.ll
    A llvm/test/Transforms/SLPVectorizer/X86/copyable-with-used-outside-bb.ll
    M llvm/test/Transforms/Scalarizer/min-bits.ll
    A llvm/test/Transforms/Scalarizer/vector-bool-not-aligned-min-bits.ll
    M llvm/test/Transforms/SimplifyCFG/hoist-common-code.ll
    M llvm/test/Transforms/UnifyLoopExits/basic.ll
    A llvm/test/Transforms/WholeProgramDevirt/devirt-metadata.ll
    A llvm/test/Verifier/AMDGPU/test-cvt-fp4f6f8-immarg-ranges.ll
    M llvm/tools/dsymutil/dsymutil.cpp
    M llvm/tools/llvm-c-test/attributes.c
    M llvm/tools/llvm-c-test/calc.c
    M llvm/tools/llvm-c-test/debuginfo.c
    M llvm/tools/llvm-c-test/diagnostic.c
    M llvm/tools/llvm-c-test/echo.cpp
    M llvm/tools/llvm-c-test/metadata.c
    M llvm/tools/llvm-c-test/module.c
    M llvm/tools/llvm-c-test/object.c
    M llvm/unittests/ADT/STLExtrasTest.cpp
    M llvm/unittests/ExecutionEngine/MCJIT/MCJITCAPITest.cpp
    M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
    M llvm/unittests/IR/ConstantsTest.cpp
    M llvm/unittests/IR/InstructionsTest.cpp
    M llvm/unittests/IR/VerifierTest.cpp
    M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
    M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
    M llvm/utils/TableGen/X86InstrMappingEmitter.cpp
    M llvm/utils/TableGen/X86ManualInstrMapping.def
    M llvm/utils/git/code-lint-helper.py
    M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
    M llvm/utils/release/build_llvm_release.bat
    M mlir/docs/LangRef.md
    M mlir/include/mlir-c/ExecutionEngine.h
    M mlir/include/mlir/Conversion/Passes.td
    M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
    M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
    M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
    M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
    M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
    M mlir/lib/Bindings/Python/ExecutionEngineModule.cpp
    M mlir/lib/CAPI/ExecutionEngine/ExecutionEngine.cpp
    M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
    M mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
    M mlir/lib/Conversion/ArithToAPFloat/CMakeLists.txt
    M mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
    M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
    M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
    M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
    M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
    M mlir/lib/Dialect/SCF/IR/SCF.cpp
    M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
    M mlir/lib/Dialect/Shard/IR/ShardOps.cpp
    M mlir/lib/Dialect/Transform/TuneExtension/TuneExtensionOps.cpp
    M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
    M mlir/lib/Dialect/XeGPU/TransformOps/XeGPUTransformOps.cpp
    M mlir/lib/Dialect/XeGPU/Transforms/XeGPUOptimizeBlockLoads.cpp
    M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
    M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
    M mlir/lib/ExecutionEngine/ArmRunnerUtils.cpp
    M mlir/lib/ExecutionEngine/ExecutionEngine.cpp
    M mlir/lib/ExecutionEngine/VulkanRuntimeWrappers.cpp
    M mlir/lib/Target/Cpp/TranslateToCpp.cpp
    M mlir/test/CAPI/execution_engine.c
    M mlir/test/CAPI/global_constructors.c
    M mlir/test/Conversion/AMDGPUToROCDL/gfx1250.mlir
    M mlir/test/Conversion/AMDGPUToROCDL/memory_counter_wait.mlir
    A mlir/test/Conversion/AMDGPUToROCDL/memory_counter_wait_tensor.mlir
    A mlir/test/Conversion/AMDGPUToROCDL/memory_counter_wait_unsupported.mlir
    M mlir/test/Conversion/ArithToApfloat/arith-to-apfloat.mlir
    A mlir/test/Conversion/OpenMPToLLVM/map-info-type-conversion-fail.mlir
    M mlir/test/Conversion/TensorToSPIRV/tensor-ops-to-spirv.mlir
    M mlir/test/Conversion/XeGPUToXeVM/create_nd_tdesc.mlir
    M mlir/test/Conversion/XeGPUToXeVM/loadstore_matrix.mlir
    M mlir/test/Conversion/XeGPUToXeVM/loadstore_nd.mlir
    A mlir/test/Conversion/XeGPUToXeVM/loadstore_nd_sub_byte.mlir
    M mlir/test/Conversion/XeGPUToXeVM/prefetch_nd.mlir
    A mlir/test/Conversion/XeGPUToXeVM/prefetch_nd_sub_byte.mlir
    M mlir/test/Dialect/AMDGPU/canonicalize.mlir
    M mlir/test/Dialect/AMDGPU/ops.mlir
    M mlir/test/Dialect/LLVMIR/rocdl.mlir
    M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
    A mlir/test/Integration/Dialect/Arith/CPU/test-apfloat-emulation-vector.mlir
    M mlir/test/Integration/Dialect/XeVM/GPU/gpu_printf.mlir
    M mlir/test/Target/Cpp/common-cpp.mlir
    M mlir/test/Target/LLVMIR/omptarget-multi-block-reduction.mlir
    M mlir/test/Target/LLVMIR/omptarget-parallel-llvm.mlir
    M mlir/test/Target/LLVMIR/omptarget-parallel-wsloop.mlir
    M mlir/test/Target/LLVMIR/openmp-target-generic-spmd.mlir
    M mlir/test/Target/LLVMIR/openmp-target-spmd.mlir
    M mlir/test/Target/LLVMIR/rocdl.mlir
    M mlir/test/python/execution_engine.py
    M mlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp
    M mlir/tools/mlir-tblgen/PassGen.cpp
    M openmp/CMakeLists.txt
    A openmp/cmake/modules/LibompCheckFortranFlag.cmake
    A openmp/cmake/modules/LibompHandleFlags.cmake
    A openmp/cmake/modules/LibompUtils.cmake
    M openmp/device/src/Parallelism.cpp
    A openmp/module/CMakeLists.txt
    A openmp/module/omp_lib.F90.var
    A openmp/module/omp_lib.h.var
    M openmp/runtime/CMakeLists.txt
    R openmp/runtime/cmake/LibompCheckFortranFlag.cmake
    M openmp/runtime/cmake/LibompExports.cmake
    R openmp/runtime/cmake/LibompHandleFlags.cmake
    R openmp/runtime/cmake/LibompUtils.cmake
    M openmp/runtime/cmake/config-ix.cmake
    M openmp/runtime/src/CMakeLists.txt
    R openmp/runtime/src/include/omp_lib.F90.var
    R openmp/runtime/src/include/omp_lib.h.var
    M openmp/runtime/src/kmp_ftn_entry.h
    M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
    M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

  Log Message:
  -----------
  [𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]


Compare: https://github.com/llvm/llvm-project/compare/53835d4a7eb8...8e8d92c91448

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