[all-commits] [llvm/llvm-project] ba836d: [VPlan] Remove stray space before ops when printin...
Alexis Engelke via All-commits
all-commits at lists.llvm.org
Mon Dec 8 07:27:51 PST 2025
Branch: refs/heads/users/aengelke/spr/ir-dont-store-switch-case-values-as-operands
Home: https://github.com/llvm/llvm-project
Commit: ba836dc5ede411f90a8f5ba1f706983db8caf4e7
https://github.com/llvm/llvm-project/commit/ba836dc5ede411f90a8f5ba1f706983db8caf4e7
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-12-06 (Sat, 06 Dec 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
Log Message:
-----------
[VPlan] Remove stray space before ops when printing vector-ptr (NFC)
Commit: 9031544772dc3a39c27feccf845a43ec38925bc0
https://github.com/llvm/llvm-project/commit/9031544772dc3a39c27feccf845a43ec38925bc0
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2025-12-06 (Sat, 06 Dec 2025)
Changed paths:
M libcxx/include/__bit_reference
M libcxx/include/bitset
A libcxx/test/libcxx/utilities/template.bitset/nodiscard.verify.cpp
Log Message:
-----------
[libc++][bitset] Applied `[[nodiscard]]` (#170623)
`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.
- https://libcxx.llvm.org/CodingGuidelines.html
- https://wg21.link/bitset
Commit: 6bb786398efdbc496edd517e682caeaaefd46f6e
https://github.com/llvm/llvm-project/commit/6bb786398efdbc496edd517e682caeaaefd46f6e
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-12-06 (Sat, 06 Dec 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
A clang/test/CIR/IR/catch-param.cir
Log Message:
-----------
[CIR] Add structured CatchParamOp (#165110)
Upstream, the structured CatchParamOp as a prerequisite for implementing
exception handlers
Issue https://github.com/llvm/llvm-project/issues/154992
Commit: ddd770d97b2c4a071d4cd9cb471ed9a397e0135c
https://github.com/llvm/llvm-project/commit/ddd770d97b2c4a071d4cd9cb471ed9a397e0135c
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2025-12-06 (Sat, 06 Dec 2025)
Changed paths:
M libcxx/include/__exception/exception.h
M libcxx/include/__exception/nested_exception.h
M libcxx/include/__exception/operations.h
M libcxx/include/__system_error/error_category.h
M libcxx/include/__system_error/error_code.h
M libcxx/include/__system_error/error_condition.h
M libcxx/include/__system_error/system_error.h
M libcxx/include/stdexcept
A libcxx/test/libcxx/diagnostics/syserr/nodiscard.verify.cpp
M libcxx/test/libcxx/language.support/nodiscard.verify.cpp
Log Message:
-----------
[libc++] Applied `[[nodiscard]]` to `<exception>`, `<stdexcept>` and `<system_error>` (#170837)
[[nodiscard]] should be applied to functions where discarding the return
value is most likely a correctness issue.
- https://libcxx.llvm.org/CodingGuidelines.html
Commit: 0cd523e55244db709987b619a7a9a2add94869fc
https://github.com/llvm/llvm-project/commit/0cd523e55244db709987b619a7a9a2add94869fc
Author: Dark Steve <Prasoon.Mishra at amd.com>
Date: 2025-12-06 (Sat, 06 Dec 2025)
Changed paths:
M llvm/lib/CodeGen/PHIElimination.cpp
A llvm/test/CodeGen/AMDGPU/phi-elim-mli-available.mir
Log Message:
-----------
[PHIElimination] Declare MachineLoopInfo dependency for Legacy PM (#169693)
PHIElimination uses MachineLoopInfo for loop-exiting critical edge
splitting but wasn't declaring this dependency via addUsedIfAvailable()
in getAnalysisUsage(). Without this declaration, the pass manager does
not make MachineLoopInfo accessible to PHIElimination, causing
getAnalysisIfAvailable() to return nullptr.
Without MachineLoopInfo, the loop-exiting edge optimization doesn't
fire, resulting in fewer critical edge splits and potentially suboptimal
code placement.
This patch adds:
- MachineLoopInfo as an optional dependency
- A test that verifies the optimization fires when MLI is accessible
Commit: 0e5fd438f407712b220510a2fd2e094d3b49d43e
https://github.com/llvm/llvm-project/commit/0e5fd438f407712b220510a2fd2e094d3b49d43e
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2025-12-06 (Sat, 06 Dec 2025)
Changed paths:
M clang-tools-extra/clang-tidy/.clang-tidy
M clang-tools-extra/clang-tidy/bugprone/UnsafeFunctionsCheck.cpp
M clang-tools-extra/clang-tidy/utils/UseRangesCheck.cpp
Log Message:
-----------
[clang-tidy][NFC] Add a few cppcoreguidelines checks to codebase (#170977)
Commit: a805147ac1ba123916de182babb0831fbb148756
https://github.com/llvm/llvm-project/commit/a805147ac1ba123916de182babb0831fbb148756
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2025-12-06 (Sat, 06 Dec 2025)
Changed paths:
M clang-tools-extra/clang-tidy/NoLintDirectiveHandler.cpp
M clang-tools-extra/clang-tidy/bugprone/ChainedComparisonCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/DanglingHandleCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/NonZeroEnumToBoolConversionCheck.cpp
M clang-tools-extra/clang-tidy/llvm/UseNewMLIROpBuilderCheck.cpp
M clang-tools-extra/clang-tidy/modernize/MakeSmartPtrCheck.cpp
M clang-tools-extra/clang-tidy/readability/RedundantInlineSpecifierCheck.cpp
M clang-tools-extra/clang-tidy/readability/RedundantStringInitCheck.cpp
M clang-tools-extra/clang-tidy/utils/LexerUtils.cpp
M clang-tools-extra/clang-tidy/utils/TransformerClangTidyCheck.cpp
Log Message:
-----------
[clang-tidy][NFC] Remove unused headers (flagged by misc-include-cleaner) (#170982)
But `misc-include-cleaner` still has reasonable amount of FP in
codebase, so we can't enable it clang-tidy.
Commit: ff05da6042f0fba9fca6c6c18d0337ccf499b60d
https://github.com/llvm/llvm-project/commit/ff05da6042f0fba9fca6c6c18d0337ccf499b60d
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2025-12-06 (Sat, 06 Dec 2025)
Changed paths:
M clang-tools-extra/clang-tidy/.clang-tidy
M clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
M clang-tools-extra/clang-tidy/altera/StructPackAlignCheck.cpp
M clang-tools-extra/clang-tidy/altera/UnrollLoopsCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SuspiciousMissingCommaCheck.cpp
M clang-tools-extra/clang-tidy/misc/ConfusableIdentifierCheck.cpp
M clang-tools-extra/clang-tidy/misc/MisleadingBidirectionalCheck.cpp
M clang-tools-extra/clang-tidy/misc/MisleadingIdentifierCheck.cpp
M clang-tools-extra/clang-tidy/openmp/UseDefaultNoneCheck.cpp
M clang-tools-extra/clang-tidy/readability/FunctionCognitiveComplexityCheck.cpp
Log Message:
-----------
[clang-tidy][NFC] Add google-readability-casting check to codebase (#170980)
Commit: 8dee997a8558b460b82b23fb43b197d68258baac
https://github.com/llvm/llvm-project/commit/8dee997a8558b460b82b23fb43b197d68258baac
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date: 2025-12-06 (Sat, 06 Dec 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/test/CodeGen/AMDGPU/promote-alloca-multidim.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-negative-index.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-to-vector.ll
Log Message:
-----------
Reland "AMDGPU/PromoteAlloca: Always use i32 for indexing (#170511)" (#170956)
Create more canonical code that may even lead to slightly better
codegen.
Commit: 4930e94011f6c62231de880273821d453dae0f14
https://github.com/llvm/llvm-project/commit/4930e94011f6c62231de880273821d453dae0f14
Author: owenca <owenpiano at gmail.com>
Date: 2025-12-06 (Sat, 06 Dec 2025)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Fix a regression in annotating star before lambda (#170969)
Fixes #170573
Commit: 49a7772be5bfc86a64103a08a190133f7e4ea823
https://github.com/llvm/llvm-project/commit/49a7772be5bfc86a64103a08a190133f7e4ea823
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-12-06 (Sat, 06 Dec 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineFrameInfo.h
M llvm/include/llvm/CodeGen/TargetFrameLowering.h
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.h
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.h
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
Log Message:
-----------
[CodeGen] Replace (Min,Max)CSFrameIndex with flag on frame object [NFCI] (#170905)
This removes the tracking of the MinCSFrameIndex, and MaxCSFrameIndex markers, simplifying the target API. This brings the tracking for callee save spill slots in line with how we handle other properties of stack locations.
A couple notes:
1) This requires doing scans of the entire object range, but we have other such instances in the code already, so I doubt this will matter in practice.
2) This removes the requirement that callee saved spill slots be contiguous in the frame index identified space.
I marked this as NFCI because if prior code violated the contiguous range assumption - I can't find a case where we did - then this change might adjust frame layout in some edge cases.
The motivation for this is mostly code readability, but I might use this as a primitive for something in an upcoming patch series around shrink wrapping. Haven't decided yet.
Commit: 02482f42739e5b16035f4169923cb6abe0bb9698
https://github.com/llvm/llvm-project/commit/02482f42739e5b16035f4169923cb6abe0bb9698
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-12-06 (Sat, 06 Dec 2025)
Changed paths:
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/lib/Core/BinaryFunction.cpp
M bolt/test/X86/unclaimed-jt-entries.s
M bolt/test/runtime/X86/unclaimed-jt-entries.s
Log Message:
-----------
[BOLT] Properly validate relocations against internals of a function (#167451)
Validation of data relocations targeting internals of a function was
happening based on offsets inside a function. As a result, if multiple
relocations were targeting the same offset, and one of the relocations
was verified, e.g. as belonging to a jump table, then all relocations
targeting the offset would be considered verified and valid.
Now that we are tracking relocations pointing inside every function, we
can do a better validation based on the location of the relocation.
E.g., if a relocation belongs to a jump table only that relocation will
be accounted for and other relocations pointing to the same address will
be evaluated independently.
Commit: 315c904e3e1c00ea1ec7f0757e4c538ec2513624
https://github.com/llvm/llvm-project/commit/315c904e3e1c00ea1ec7f0757e4c538ec2513624
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2025-12-06 (Sat, 06 Dec 2025)
Changed paths:
M clang/include/clang/AST/IgnoreExpr.h
Log Message:
-----------
[clang][NFC] Simplify implementation of `IgnoreExprNodes` (#164193)
Using a fold instead of template recursion.
Commit: 0dff5b5824f2fb958039da7f55b501127476a7c3
https://github.com/llvm/llvm-project/commit/0dff5b5824f2fb958039da7f55b501127476a7c3
Author: Feng Zou <feng.zou at intel.com>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/test/CodeGen/X86/apx/compress-evex.mir
M llvm/test/TableGen/x86-instr-mapping.inc
M llvm/utils/TableGen/X86InstrMappingEmitter.cpp
M llvm/utils/TableGen/X86ManualInstrMapping.def
Log Message:
-----------
[X86][APX] Compress setzucc with memory operand to setcc (#170842)
setzucc with memory operand is same as setcc but the later is shorter.
Commit: 3b355b26bf4e8d5706a0a920698c1611357479f4
https://github.com/llvm/llvm-project/commit/3b355b26bf4e8d5706a0a920698c1611357479f4
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M mlir/tools/mlir-tblgen/PassGen.cpp
Log Message:
-----------
[mlir] Remove deprecated GEN_PASS_CLASSES. (#166904)
This was marked as deprecated in 2022, but as comment. Switch to error
to make visible and stop generating. Will remove the error message in
follow up, just felt this was easier for folks to understand compilation
errors. The change required to new form is rather minimal.
Commit: bdb918e10a0856080b697ca7fce13263b6b63867
https://github.com/llvm/llvm-project/commit/bdb918e10a0856080b697ca7fce13263b6b63867
Author: Matthias Springer <me at m-sp.org>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
M mlir/test/Conversion/ArithToApfloat/arith-to-apfloat.mlir
Log Message:
-----------
[mlir][arith] `arith-to-apfloat`: Bail on unsupported bitwidth (#170994)
Bitwidths greater than 64 are not supported by `arith-to-apfloat`.
Commit: a1ba1fa5788c4cc0e72b7af6a555eb046510e86c
https://github.com/llvm/llvm-project/commit/a1ba1fa5788c4cc0e72b7af6a555eb046510e86c
Author: Gil Rapaport <gil.rapaport at mobileye.com>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
Log Message:
-----------
[mlir][emitc] Simplify inlining logic (NFCI) (#169978)
This change makes inlining logic in the translator simpler and more
consistent by
(a) Extending the inlining concept to include CExpression ops, which by
definition are inlined if and only if they reside within an
ExpressionOp.
(b) Concentraing all inlining decisions in `shouldBeInlined()` to make
sure that ops get the same decision when queried as operations and
as operands.
Commit: fb0400fe1f1f9e83f3148db8ce2c72ab5bc6728e
https://github.com/llvm/llvm-project/commit/fb0400fe1f1f9e83f3148db8ce2c72ab5bc6728e
Author: Gil Rapaport <gil.rapaport at mobileye.com>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Target/Cpp/common-cpp.mlir
Log Message:
-----------
[mlir][emitc] Fix bug in dereference translation (#171028)
The op was not added to `hasDeferredEmission()` when introduced by
f17abc280c70, causing incorrect translation.
Commit: 73a13839d3ec4dab9330b3909890105efad9b3bd
https://github.com/llvm/llvm-project/commit/73a13839d3ec4dab9330b3909890105efad9b3bd
Author: Hui <hui.xie1990 at gmail.com>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M libcxx/docs/ABIGuarantees.rst
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/include/__atomic/atomic.h
M libcxx/include/__atomic/atomic_flag.h
M libcxx/include/__atomic/atomic_ref.h
M libcxx/include/__atomic/atomic_sync.h
M libcxx/include/__atomic/contention_t.h
M libcxx/include/__configuration/abi.h
M libcxx/include/__configuration/availability.h
M libcxx/lib/abi/CHANGELOG.TXT
M libcxx/lib/abi/arm64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/i686-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc64-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-freebsd.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.noexceptions.nonew.abilist
M libcxx/src/atomic.cpp
M libcxx/test/libcxx/atomics/atomics.syn/wait.issue_85107.pass.cpp
A libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.wait/lost_wakeup.pass.cpp
Log Message:
-----------
[libc++] Allows any types of size 4 and 8 to use native platform ulock_wait (#161086)
This is to address #146145
The issue before was that, for `std::atomic::wait/notify`, we only
support `uint64_t` to go through the native `ulock_wait` directly. Any
other types will go through the global contention table's `atomic`,
increasing the chances of spurious wakeup. This PR tries to allow any
types that are of size 4 or 8 to directly go to the `ulock_wait`.
This PR is just proof of concept. If we like this idea, I can go further
to update the Linux/FreeBSD branch and add ABI macros so the existing
behaviours are reserved under the stable ABI
Here are some benchmark results
```
Benchmark Time CPU Time Old Time New CPU Old CPU New
----------------------------------------------------------------------------------------------------------------------------------------------------
BM_stop_token_single_thread_reg_unreg_callback/1024 -0.1113 -0.1165 51519 45785 51397 45408
BM_stop_token_single_thread_reg_unreg_callback/4096 -0.2727 -0.1447 249685 181608 211865 181203
BM_stop_token_single_thread_reg_unreg_callback/65536 -0.1241 -0.1237 3308930 2898396 3300986 2892608
BM_stop_token_single_thread_reg_unreg_callback/262144 +0.0335 -0.1920 13237682 13681632 13208849 10673254
OVERALL_GEOMEAN -0.1254 -0.1447 0 0 0 0
```
```
Benchmark Time CPU Time Old Time New CPU Old CPU New
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------
BM_1_atomic_1_waiter_1_notifier<KeepNotifying, NumHighPrioTasks<0>>/65536 -0.3344 -0.2424 5960741 3967212 5232250 3964085
BM_1_atomic_1_waiter_1_notifier<KeepNotifying, NumHighPrioTasks<0>>/131072 -0.1474 -0.1475 9144356 7796745 9137547 7790193
BM_1_atomic_1_waiter_1_notifier<KeepNotifying, NumHighPrioTasks<0>>/262144 -0.1336 -0.1340 18333441 15883805 18323711 15868500
OVERALL_GEOMEAN -0.2107 -0.1761 0 0 0 0
```
```
Benchmark Time CPU Time Old Time New CPU Old CPU New
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<2>, NumHighPrioTasks<0>>/16384 +0.2321 -0.0081 836618 1030772 833197 826476
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<2>, NumHighPrioTasks<0>>/32768 -0.3034 -0.1329 2182721 1520569 1747211 1515028
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<2>, NumHighPrioTasks<0>>/65536 -0.0924 -0.0924 3389098 3075897 3378486 3066448
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<8>, NumHighPrioTasks<0>>/4096 +0.0464 +0.0474 664233 695080 657736 688892
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<8>, NumHighPrioTasks<0>>/8192 -0.0279 -0.0267 1336041 1298794 1324270 1288953
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<8>, NumHighPrioTasks<0>>/16384 +0.0270 +0.0304 2543004 2611786 2517471 2593975
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<32>, NumHighPrioTasks<0>>/1024 +0.0423 +0.0941 473621 493657 325604 356245
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<32>, NumHighPrioTasks<0>>/2048 +0.0420 +0.0675 906266 944349 636253 679169
BM_1_atomic_multi_waiter_1_notifier<KeepNotifying, NumWaitingThreads<32>, NumHighPrioTasks<0>>/4096 +0.0359 +0.0378 1761584 1824783 1015092 1053439
OVERALL_GEOMEAN -0.0097 -0.0007 0 0 0 0
```
```
Benchmark Time CPU Time Old Time New CPU Old CPU New
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<2>, NumHighPrioTasks<0>>/4096 -0.0990 -0.1001 371100 334370 369984 332955
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<2>, NumHighPrioTasks<0>>/8192 -0.0305 -0.0314 698228 676908 696418 674585
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<2>, NumHighPrioTasks<0>>/16384 -0.0258 -0.0268 1383530 1347894 1380665 1343680
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<8>, NumHighPrioTasks<0>>/1024 +0.0465 +0.4702 937821 981388 472087 694082
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<8>, NumHighPrioTasks<0>>/2048 +0.1596 +0.9140 1704819 1976899 616419 1179852
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<8>, NumHighPrioTasks<0>>/4096 -0.1018 -0.2316 3793976 3407609 1912209 1469331
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<32>, NumHighPrioTasks<0>>/256 +0.0395 +0.5818 30102662 31292982 174650 276270
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<32>, NumHighPrioTasks<0>>/512 -0.0065 +1.2860 33079634 32863968 162150 370680
BM_N_atomics_N_waiter_N_notifier<KeepNotifying, NumberOfAtomics<32>, NumHighPrioTasks<0>>/1024 -0.0325 +0.4683 36581740 35392385 282320 414520
OVERALL_GEOMEAN -0.0084 +0.2878 0 0 0 0
```
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: 1226a6d8c34ca007c4192e6039866a65b98b2625
https://github.com/llvm/llvm-project/commit/1226a6d8c34ca007c4192e6039866a65b98b2625
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M clang-tools-extra/test/clang-tidy/infrastructure/Inputs/param/parameters.txt
Log Message:
-----------
[clang-tidy] Fix fragile test in `read-parameters-from-file` (#171033)
[CommandLine.cpp](https://github.com/llvm/llvm-project/blob/fb0400fe1f1f9e83f3148db8ce2c72ab5bc6728e/llvm/lib/Support/CommandLine.cpp#L940)
treats single quote as literal characters on Windows, so the argument is
parsed as a check named `' -*,llvm-namespace-comment '`, which matches
no existing checks, so no checks are enabled via the command line.
Previously, the test passed because it fell back to the root
`.clang-tidy` configuration which enables `llvm-*`.
Commit: 9e7ce77573b2fad126a367475cbe807c10826691
https://github.com/llvm/llvm-project/commit/9e7ce77573b2fad126a367475cbe807c10826691
Author: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/docs/UsersManual.rst
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/CodeGenCXX/speculative-devirt-metadata.cpp
M clang/test/Driver/clang_f_opts.c
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/include/llvm/Transforms/IPO/WholeProgramDevirt.h
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
A llvm/test/Transforms/PhaseOrdering/speculative-devirt-then-inliner.ll
A llvm/test/Transforms/WholeProgramDevirt/devirt-metadata.ll
Log Message:
-----------
[Clang]: Support opt-in speculative devirtualization (#159685)
This patch adds Clang support for speculative devirtualization and
integrates the related pass into the pass pipeline.
It's building on the LLVM backend implementation from PR #159048.
Speculative devirtualization transforms an indirect call (the virtual
function) to a guarded direct call.
It is guarded by a comparison of the virtual function pointer to the
expected target.
This optimization is still safe without LTO because it doesn't do direct
calls, it's conditional according to the function ptr.
This optimization:
- Opt-in: Disabled by default, enabled via `-fdevirtualize-speculatively`
- Works in non-LTO mode
- Handles publicly-visible objects.
- Uses guarded devirtualization with fallback to indirect calls when the
speculation is incorrect.
For this C++ example:
```
class Base {
public:
__attribute__((noinline))
virtual void virtual_function1() { asm volatile("NOP"); }
virtual void virtual_function2() { asm volatile("NOP"); }
};
class Derived : public Base {
public:
void virtual_function2() override { asm volatile("NOP"); }
};
__attribute__((noinline))
void foo(Base *BV) {
BV->virtual_function1();
}
void bar() {
Base *b = new Derived();
foo(b);
}
```
Here is the IR without enabling speculative devirtualization:
```
define dso_local void @_Z3fooP4Base(ptr noundef %BV) local_unnamed_addr #0 {
entry:
%vtable = load ptr, ptr %BV, align 8, !tbaa !6
%0 = load ptr, ptr %vtable, align 8
tail call void %0(ptr noundef nonnull align 8 dereferenceable(8) %BV)
ret void
}
```
IR after enabling speculative devirtualization:
```
define dso_local void @_Z3fooP4Base(ptr noundef %BV) local_unnamed_addr #0 {
entry:
%vtable = load ptr, ptr %BV, align 8, !tbaa !12
%0 = load ptr, ptr %vtable, align 8
%1 = icmp eq ptr %0, @_ZN4Base17virtual_function1Ev
br i1 %1, label %if.true.direct_targ, label %if.false.orig_indirect, !prof !15
if.true.direct_targ: ; preds = %entry
tail call void @_ZN4Base17virtual_function1Ev(ptr noundef nonnull align 8 dereferenceable(8) %BV)
br label %if.end.icp
if.false.orig_indirect: ; preds = %entry
tail call void %0(ptr noundef nonnull align 8 dereferenceable(8) %BV)
br label %if.end.icp
if.end.icp: ; preds = %if.false.orig_indirect, %if.true.direct_targ
ret void
}
```
Commit: 3fc741923643040cc17ef9562983994e73c74efb
https://github.com/llvm/llvm-project/commit/3fc741923643040cc17ef9562983994e73c74efb
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-reductions.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
Log Message:
-----------
[VPlan] Replace ExtractLast(Elem|LanePerPart) with ExtractLast(Lane/Part) (#164124)
Replace ExtractLastElement and ExtractLastLanePerPart with more generic
and specific ExtractLastLane and ExtractLastPart, which model distinct
parts of extracting across parts and lanes. ExtractLastElement ==
ExtractLastLane(ExtractLastPart) and ExtractLastLanePerPart ==
ExtractLastLane, the latter clarifying the name of the opcode. A new
m_ExtractLastElement matcher is provided for convenience.
The patch should be NFC modulo printing changes.
PR: https://github.com/llvm/llvm-project/pull/164124
Commit: 11fd760e3a13b5c519e49abc7c9e3b684a94e6f8
https://github.com/llvm/llvm-project/commit/11fd760e3a13b5c519e49abc7c9e3b684a94e6f8
Author: Tianqi Chen <tqchen at users.noreply.github.com>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M mlir/include/mlir-c/ExecutionEngine.h
M mlir/lib/Bindings/Python/ExecutionEngineModule.cpp
M mlir/lib/CAPI/ExecutionEngine/ExecutionEngine.cpp
M mlir/test/CAPI/execution_engine.c
M mlir/test/CAPI/global_constructors.c
M mlir/test/python/execution_engine.py
Log Message:
-----------
[MLIR][ExecutionEngine] Enable PIC option (#170995)
This PR enables the MLIR execution engine to dump object file as PIC
code, which is needed when the object file is later bundled into a dynamic
shared library.
---------
Co-authored-by: Mehdi Amini <joker.eph at gmail.com>
Commit: 68fea00dfb736656ded58e1017733019b9664d88
https://github.com/llvm/llvm-project/commit/68fea00dfb736656ded58e1017733019b9664d88
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
M clang/test/CodeGenCUDA/kernel-args.cu
A clang/test/CodeGenHIP/amdgcnspirv-uses-amdgpu-abi.cpp
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
A llvm/test/CodeGen/SPIRV/pointers/ptr-argument-byref-amdgcnspirv.ll
Log Message:
-----------
[SPIRV] Use AMDGPU ABI for AMDGCN flavoured SPIRV (#169865)
At the moment AMDGCN flavoured SPIRV uses the SPIRV ABI with some tweaks
revolving around passing aggregates as direct. This is problematic in
multiple ways:
- it leads to divergence from code compiled for a concrete target, which
makes it difficult to debug;
- it incurs a run time cost, when dealing with larger aggregates;
- it incurs a compile time cost, when dealing with larger aggregates.
This patch switches over AMDGCN flavoured SPIRV to implement the AMDGPU
ABI (except for dealing with variadic functions, which will be added in
the future). One additional complication (and the primary motivation
behind the current less than ideal state of affairs) stems from `byref`,
which AMDGPU uses, not being expressible in SPIR-V. We deal with this by
CodeGen-ing for `byref`, lowering it to the `FuncParamAttr ByVal` in
SPIR-V, and restoring it when doing reverse translation from AMDGCN
flavoured SPIR-V.
Commit: 7bfdaa51f155432346e507d8ce389802c92eb530
https://github.com/llvm/llvm-project/commit/7bfdaa51f155432346e507d8ce389802c92eb530
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
Log Message:
-----------
[VPlan] Fix unused variable warning
llvm-project/llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp:312:19: warning: unused variable 'EB' [-Wunused-variable]
312 | VPBasicBlock *EB = Plan.getExitBlocks().front();
| ^~
This showed up in a non-assertions build.
Commit: 5dbd049662001535a475cdb7d290dfb63a0515fc
https://github.com/llvm/llvm-project/commit/5dbd049662001535a475cdb7d290dfb63a0515fc
Author: Matthias Springer <me at m-sp.org>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
M mlir/lib/Conversion/ArithToAPFloat/CMakeLists.txt
M mlir/test/Conversion/ArithToApfloat/arith-to-apfloat.mlir
A mlir/test/Integration/Dialect/Arith/CPU/test-apfloat-emulation-vector.mlir
Log Message:
-----------
[mlir][arith] `arith-to-apfloat`: Add vector support (#171024)
Add support for vectorized operations such as `arith.addf ... :
vector<4xf4E2M1FN>`. The computation is scalarized: scalar operands are
extracted with `vector.to_elements`, multiple scalar computations are
performed and the result is inserted back into a vector with
`vector.from_elements`.
Commit: ffc55815ef3208a3802513c33ac66a122d2fb680
https://github.com/llvm/llvm-project/commit/ffc55815ef3208a3802513c33ac66a122d2fb680
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
A llvm/test/CodeGen/SPIRV/pointers/fun-with-aggregate-arg-in-const-init.ll
Log Message:
-----------
[SPIRV] Add support for pointers to functions with aggregate args/returns as global variables / constant initialisers (#169595)
This patch does two things:
1. it extends the aggregate arg / ret replacement transform to work on
indirect calls / pointers to function. It is somewhat spread out as
retrieving the original function type is needed in a few places. In
general, we should rethink / rework the entire infrastructure around
aggregate arg/ret handling, using an opaque target specific type rather
than i32;
2. it enables global variables of pointer to function type, and, more
specifically, global variables of a aggregate type (arrays / structures)
with pointer to function elements.
This also exposes some issues in how we handle pointers to function and
lowering indirect function calls, primarily around not using the program
address space. These will be handled in a subsequent patch as they'll
require somewhat more intrusive surgery, possibly involving modifying
the data layout.
Commit: 359cac491195af10e7481f5a322be689ba01a267
https://github.com/llvm/llvm-project/commit/359cac491195af10e7481f5a322be689ba01a267
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M clang-tools-extra/clang-tidy/fuchsia/MultipleInheritanceCheck.cpp
M clang-tools-extra/clang-tidy/fuchsia/MultipleInheritanceCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/fuchsia/multiple-inheritance.cpp
Log Message:
-----------
[clang-tidy] Don't cache classes by name in `fuchsia-multiple-inheritance` (#171016)
Context: for every class, this check needs to compute whether that class
is an interface (i.e. only has pure virtual methods). This is expensive,
so the check caches the computation. But it caches by class name, which
is problematic, because the same name can refer to different classes at
different scopes. Here's for example a false negative it causes:
https://godbolt.org/z/bMGc5sYqh. This PR changes it to cache by
`CXXRecordDecl *` instead.
Commit: 8378a6fa4f5c83298fb0b5e240bb7f254f7b1137
https://github.com/llvm/llvm-project/commit/8378a6fa4f5c83298fb0b5e240bb7f254f7b1137
Author: Matthias Springer <me at m-sp.org>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M mlir/test/Integration/Dialect/Arith/CPU/test-apfloat-emulation-vector.mlir
Log Message:
-----------
[mlir][arith] Fix build after #171024 (#171057)
Fix build after #171024.
Commit: 72b4a5d3b05d25f2442d1f6cb9105cf2cc29d4de
https://github.com/llvm/llvm-project/commit/72b4a5d3b05d25f2442d1f6cb9105cf2cc29d4de
Author: Vojtěch Michal <50836015+vmichal at users.noreply.github.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/copy_assign.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/deduct.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/deduct_pmr.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/initializer_list.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/iter_iter.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/move_assign.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/pmr.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/range.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/sorted_container.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/sorted_initializer_list.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/sorted_iter_iter.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.modifiers/erase_key.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.observers/comp.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy_assign.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/deduct.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/deduct_pmr.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/initializer_list.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/iter_iter.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_assign.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/pmr.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/range.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_container.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_initializer_list.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_iter_iter.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_key.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.observers/comp.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multiset/flat.multiset.cons/move.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multiset/flat.multiset.cons/move_assign.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multiset/flat.multiset.cons/sorted_iter_iter.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multiset/flat.multiset.iterators/iterator.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.set/flat.set.cons/move.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.set/flat.set.cons/move_assign.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.set/flat.set.cons/sorted_iter_iter.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.set/flat.set.iterators/iterator.pass.cpp
Log Message:
-----------
[libcxx] Removal of narrowing conversions in `flat_[multi]{set, map}` tests for compatibility with MSVC (#170909)
Impacts files in `test/std/containers/container.adaptors/flat.xxx`. No
meaning is changed; only appropriate types are spelled out to prevent
compiler warnings.
- Replace `char`s and `short`s used in tests of `flat_[multi]{set, map}`
with `long`s to prevent warnings about narrowing conversions when
running tests. Allow increased test coverage for MSVC STL.
- Make test code robust against evil overloads of operator comma .(2
files)
- Add `[[maybe_unused]]` to some local `typedef`s that are sometimes
unused due to usage of `LIBCPP_STATIC_ASSERT`.
For discussion and suggested changes, see the LLVM Discord
https://discord.com/channels/636084430946959380/636732894974312448/1445901676400742533
Commit: 000e46219ba1ee53fc42d35e00c314c2807e8b14
https://github.com/llvm/llvm-project/commit/000e46219ba1ee53fc42d35e00c314c2807e8b14
Author: Jorge Gorbe Moya <jgorbe at slackito.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Fix mlir build after #171024 (#171068)
Commit: fc92e4dec9a6dfcb4fb77d863d0bf1dbc53033e5
https://github.com/llvm/llvm-project/commit/fc92e4dec9a6dfcb4fb77d863d0bf1dbc53033e5
Author: Mingjie Xu <xumingjie.enna1 at bytedance.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
Log Message:
-----------
[InstCombine] Fix bail-out in `PHIsEqualValue()` (#170650)
We encountered a such case: `PHIsEqualValue()` is called with a PHI node
`PN` whose incoming values are all PHI nodes, and `NonPhiInVal` is
nullptr. When the size of `ValueEqualPHIs` reaches 16, `NonPhiInVal` is
still nullptr, then we keep scanning PHI node operands, this time the
recursion won't bail out even if we have visited too many PHI nodes.
In our case, the recursion ends with ~1700 PHI nodes visited, causes
InstCombine time-consuming.
Commit: 62355f19edd7435bbf6fdae512db3e725a0f6647
https://github.com/llvm/llvm-project/commit/62355f19edd7435bbf6fdae512db3e725a0f6647
Author: Mend Renovate <bot at renovateapp.com>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M .github/workflows/release-sources.yml
Log Message:
-----------
Update actions/checkout action to v6 (#171065)
This PR contains the following updates:
| Package | Type | Update | Change |
|---|---|---|---|
| [actions/checkout](https://redirect.github.com/actions/checkout) |
action | major | `v5.0.0` -> `v6.0.1` |
Commit: 2d80486656b75ed80490d27667a5e8191bb40079
https://github.com/llvm/llvm-project/commit/2d80486656b75ed80490d27667a5e8191bb40079
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
Log Message:
-----------
[RISCV] Use a switch in RISCVInstrInfo::verifyInstruction. NFC (#170961)
The immediate only operands handled with a range check and a switch
nested under the default case.
Commit: b0e98426f390c3f0d86c3a2c860a6d980a91e5de
https://github.com/llvm/llvm-project/commit/b0e98426f390c3f0d86c3a2c860a6d980a91e5de
Author: Brad Smith <brad at comstyle.com>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/aarch64.c
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/android.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/elf_aux_info.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/getauxval.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/hwcap.inc
Log Message:
-----------
Revert "[FMV][AArch64] Add initial AT_HWCAP3 / AT_HWCAP4 support (#161595)" (#171071)
Crashing with older glibc.
This reverts commit edb43192516a55165cc4c158eb4fd4b2d81a8fce,
57b5ba00cb421b9be17bac10036763f42fbe9298 and
9715ccae1f98162f03ac0884a3dce5045b6b9a6e.
Commit: 6ec8c4351cfc1d0627d1633b02ea787bd29c77d8
https://github.com/llvm/llvm-project/commit/6ec8c4351cfc1d0627d1633b02ea787bd29c77d8
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-gep.ll
Log Message:
-----------
[AMDGPU] Enable i8 GEP promotion for vector allocas (#166132)
This patch adds support for the pattern:
```llvm
%index = select i1 %idx_sel, i32 0, i32 4
%elt = getelementptr inbounds i8, ptr addrspace(5) %alloca, i32 %index
```
by scaling the byte offset to an element index (index >>
log2(ElemSize)),
allowing the vector element to be updated with insertelement instead of
using
scratch memory.
Commit: e442904e706b9957bbe81389f05e137d141a2c85
https://github.com/llvm/llvm-project/commit/e442904e706b9957bbe81389f05e137d141a2c85
Author: Shoreshen <372660931 at qq.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
A llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll
M llvm/test/Transforms/Attributor/AMDGPU/tag-invariant-loads.ll
Log Message:
-----------
[AMDGPU] Apply alignment attr for make.buffer.rsrc (#166914)
Calculating alignment for `make.buffer.rsrc` intrinsic. The logic is the
alignment on use of return value of `make.buffer.rsrc` should be capped
by the base operand's alignment of `make.buffer.rsrc`.
For example:
```ll
define float @foo(ptr addrspace(1) align X %ptr) {
%fat.ptr = call ptr addrspace(7) @llvm.amdgcn.make.buffer.rsrc.p7.p1(ptr addrspace(1) %ptr, i16 0, i32 C, i32 0)
%y = load float, ptr addrspace(7) %fat.ptr, align Y
ret float %y
}
```
We hopes that `Y = min(X, Y)`
---
After discussion, it seems improper for letting `Y = min(X, Y)` since it
contradict with the semantic of align on load.
So we would apply the origin behavior of align, which is letting `X` and
`Y` both equal to `max(X, Y)`
---------
Co-authored-by: Shilei Tian <i at tianshilei.me>
Commit: 4125e73cdc6188cca4c1c72b72e2b2d85c157483
https://github.com/llvm/llvm-project/commit/4125e73cdc6188cca4c1c72b72e2b2d85c157483
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M libcxx/include/__functional/hash.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/unique_ptr.h
M libcxx/include/__utility/integer_sequence.h
M libcxx/include/module.modulemap.in
M libcxx/test/libcxx/diagnostics/functional.nodiscard.verify.cpp
M libcxx/test/libcxx/language.support/nodiscard.verify.cpp
A libcxx/test/libcxx/utilities/intseq/nodiscard.verify.cpp
M libcxx/test/libcxx/utilities/smartptr/nodiscard.verify.cpp
Log Message:
-----------
[libc++] Applied `[[nodiscard]]` to `hash<shared_ptr>`, `hash<unique_ptr>`, etc. (#170674)
`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.
- https://libcxx.llvm.org/CodingGuidelines.html
1. `hash<shared_ptr>`, `hash<unique_ptr>`, `std::integer_sequence<>`
etc.
2. Also implements fixes to
https://github.com/llvm/llvm-project/issues/169634 on the go (issues
discovered during current implementation)
---------
Co-authored-by: A. Jiang <de34 at live.cn>
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: c6f45f51fbb93fd6d38f2a22e61053831fc553d4
https://github.com/llvm/llvm-project/commit/c6f45f51fbb93fd6d38f2a22e61053831fc553d4
Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCInstrVSX.td
M llvm/test/CodeGen/PowerPC/fminimum-fmaximum.ll
M llvm/test/CodeGen/PowerPC/scalar-min-max.ll
Log Message:
-----------
PowerPC/VSX: Select FMINNUM and FMAXNUM (#135739)
In LangRef, we claim that FMINNUM and FMAXNUM should follow the minNum
and maxNum operators in IEEE754-2008.
PowerPC/VSX does have these instructions XSMINDP and XSMAXDP.
Now we use FMINNUM_IEEE and FMAXNUM_IEEE, since they are used by the
non-arch expand codes now.
In future, we may replace all FMINNUM_IEEE/FMAXNUM_IEEE with FMINNUM and
FMAXNUM.
---------
Co-authored-by: Your Name <you at example.com>
Commit: 8e39bcd9c37f7d35cf34dd78e7b57b7fbc2b4312
https://github.com/llvm/llvm-project/commit/8e39bcd9c37f7d35cf34dd78e7b57b7fbc2b4312
Author: Mingming Liu <mingmingl at google.com>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M lld/docs/ELF/linker_script.rst
Log Message:
-----------
[lld][docs] Document two linker-script related options for lld ELF (#166313)
This is a follow up of the discussions in
https://github.com/llvm/llvm-project/pull/163497
Commit: 4b800d309920889504ff04b57cb818a45b28d748
https://github.com/llvm/llvm-project/commit/4b800d309920889504ff04b57cb818a45b28d748
Author: Luke Lau <luke at igalia.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
Log Message:
-----------
[RISCV] Remove last use of @llvm.experimental.vp.splat in RISCVCodeGenPrepare. NFCI (#170543)
RISCVCodeGenPrepare is the last user of the vp.splat intrinsic, where it
uses it to expand a zero strided load into a scalar load and splat.
Originally this was to avoid vl toggles inside vectorized loops, but
nowadays this shouldn't be necessary because we have RISCVVLOptimizer.
To preserve the test cases where there's no store with VL, this replaces
it with a regular splat followed by a vp_merge to set the lanes past EVL
as poison. We need to set the EVL here because RISCVISelDAGToDAG will
try and recombine it back into a zero strided load, and we want to
preserve the original VL.
Commit: 446a3a19ed93449a9b50533f924f4bb658fd113e
https://github.com/llvm/llvm-project/commit/446a3a19ed93449a9b50533f924f4bb658fd113e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td
Log Message:
-----------
[RISCV] Use GPRNoX0 instead of AVL for Xsfmm pseudos. NFC (#170726)
AVL allows immediates, but we don't have an equivalent of vsetivli for
XSfmm.
Commit: 46341d5938a060834f92da6e507fcd5fddf0155b
https://github.com/llvm/llvm-project/commit/46341d5938a060834f92da6e507fcd5fddf0155b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/docs/RISCVUsage.rst
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rv64p.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/rv32i-invalid.s
M llvm/test/MC/RISCV/rv32p-invalid.s
M llvm/test/MC/RISCV/rv32p-valid.s
M llvm/test/MC/RISCV/rv64p-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Update P extension to the 018 version of the spec. (#170399)
Rename the PPACK* instructions to PPAIR*. Rename PDIF* to PABD*. Remove
Zba/Zbb instructions from P.
https://www.jhauser.us/RISCV/ext-P/
Commit: 9c60d70df9212734d0cf332b4b687a4942cc7257
https://github.com/llvm/llvm-project/commit/9c60d70df9212734d0cf332b4b687a4942cc7257
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-12-07 (Sun, 07 Dec 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
Log Message:
-----------
[RISCV] Re-generate rvp-ext-rv32.ll after #170399. NFC
Some instructions got renamed by #170399, but new tests cases were
added after that PR was created.
Commit: 3d24efd85a62e22115a8582aea147f208bf8095f
https://github.com/llvm/llvm-project/commit/3d24efd85a62e22115a8582aea147f208bf8095f
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
A clang-tools-extra/test/clang-tidy/.clang-tidy
Log Message:
-----------
[clang-tidy][NFC] Add empty '.clang-tidy' file in tests dir to silent warnings in IDE (#171029)
When working on tests, `clangd` with option `--clang-tidy` will report
warnings from
[root](https://github.com/llvm/llvm-project/blob/main/.clang-tidy)
clang-tidy config.
I believe these warnings serve no purpose in tests, so we better disable
them to silent warnings in IDE.
Commit: 7b652195d79bf79dab3d40f962e3b8063a39e20f
https://github.com/llvm/llvm-project/commit/7b652195d79bf79dab3d40f962e3b8063a39e20f
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/include/llvm/IR/Constants.h
M llvm/lib/IR/Constants.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
Log Message:
-----------
[IR] Add ImplicitTrunc argument to ConstantInt::get() (#170865)
Add an ImplicitTrunc argument to ConstantInt::get(), which allows
controlling whether implicit truncation of the value is permitted.
This argument currently defaults to true, but will be switched to false
in the future to guard against signed/unsigned confusion, similar to
what has already happened for APInt.
The argument gives an opt-out for cases where the truncation is
intended. The patch contains one illustrative example where this
happens.
Commit: 95470b6c620d75cdfe5a2a6b2388a90cc53e66c3
https://github.com/llvm/llvm-project/commit/95470b6c620d75cdfe5a2a6b2388a90cc53e66c3
Author: adbox53 <123413623+adbox53 at users.noreply.github.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
Log Message:
-----------
Replace interp__builtin_blend with interp__builtin_ia32_shuffle_gener… (#170217)
Fixes #169994
---------
Co-authored-by: Timm Baeder <tbaeder at redhat.com>
Commit: ec787501dc3d60f2927abfcf4c8d322ea6baa82a
https://github.com/llvm/llvm-project/commit/ec787501dc3d60f2927abfcf4c8d322ea6baa82a
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-gep.ll
Log Message:
-----------
Revert "[AMDGPU] Enable i8 GEP promotion for vector allocas" (#171087)
Reverts llvm/llvm-project#166132
Broke libc on GPU tests.
https://lab.llvm.org/buildbot/#/builders/10/builds/18635
Commit: ec1ea0a4ca02451731036ce04915e30aad0c81dd
https://github.com/llvm/llvm-project/commit/ec1ea0a4ca02451731036ce04915e30aad0c81dd
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/bindings/ocaml/llvm/llvm_ocaml.c
M llvm/docs/ReleaseNotes.md
M llvm/examples/OrcV2Examples/OrcV2CBindingsAddObjectFile/OrcV2CBindingsAddObjectFile.c
M llvm/examples/OrcV2Examples/OrcV2CBindingsBasicUsage/OrcV2CBindingsBasicUsage.c
M llvm/examples/OrcV2Examples/OrcV2CBindingsDumpObjects/OrcV2CBindingsDumpObjects.c
M llvm/examples/OrcV2Examples/OrcV2CBindingsIRTransforms/OrcV2CBindingsIRTransforms.c
M llvm/examples/OrcV2Examples/OrcV2CBindingsMCJITLikeMemoryManager/OrcV2CBindingsMCJITLikeMemoryManager.c
M llvm/examples/OrcV2Examples/OrcV2CBindingsRemovableCode/OrcV2CBindingsRemovableCode.c
M llvm/include/llvm-c/BitReader.h
M llvm/include/llvm-c/Core.h
M llvm/include/llvm-c/Target.h
M llvm/include/llvm/IR/LLVMContext.h
M llvm/lib/Bitcode/Reader/BitReader.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/Target/Target.cpp
M llvm/tools/llvm-c-test/attributes.c
M llvm/tools/llvm-c-test/calc.c
M llvm/tools/llvm-c-test/debuginfo.c
M llvm/tools/llvm-c-test/diagnostic.c
M llvm/tools/llvm-c-test/echo.cpp
M llvm/tools/llvm-c-test/metadata.c
M llvm/tools/llvm-c-test/module.c
M llvm/tools/llvm-c-test/object.c
M llvm/unittests/ExecutionEngine/MCJIT/MCJITCAPITest.cpp
M llvm/unittests/IR/ConstantsTest.cpp
Log Message:
-----------
[llvm-c] Deprecate functions working on the global context (#163979)
One of the most common mistakes when working with the LLVM C API is to
mix functions that work on the global context and those that work on an
explicit context. This often results in seemingly nonsensical errors
because types from different contexts are mixed.
We have considered the APIs working on the global context to be obsolete
for a long time already, and do not add any new APIs using the global
context. However, the fact that these still exist (and have shorter
names) continues to cause issues.
This PR proposes to deprecate these APIs, with intent to remove them at
some point in the future.
RFC:
https://discourse.llvm.org/t/rfc-deprecate-c-api-functions-using-the-global-context/88639
Commit: bd1bd178f8e3770b296f9b042bef1d45bd736e51
https://github.com/llvm/llvm-project/commit/bd1bd178f8e3770b296f9b042bef1d45bd736e51
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M compiler-rt/test/fuzzer/reduce_inputs.test
Log Message:
-----------
[fuzzer][test-only] Bump runs for reduce_inputs.test unseeded run (#169641)
I have seen a failure whereby the fuzzer failed to reach the expected
input and thus failed the test.
This patch bumps the max executions to 10,000,000 in order to give the
fuzzer a better chance of reaching the expected input. Most runs
complete successfully, so I do not see this adding test time in the
general case; I believe it's a fair tradeoff for the unlucky seed to run
for longer if it reduces the noise from false positives. Note, this
updates a different `RUN:` to
https://github.com/llvm/llvm-project/pull/165402.
rdar://162122184
Commit: c347b2669bc82385d6269a26e57f8dedc2a802d9
https://github.com/llvm/llvm-project/commit/c347b2669bc82385d6269a26e57f8dedc2a802d9
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/include/llvm/Analysis/RuntimeLibcallInfo.h
Log Message:
-----------
Remove LLVM_ABI from members of RuntimeLibraryAnalysis (NFC) (#170850)
Fix Windows build error: attribute 'dllexport' cannot be applied to member of 'dllexport' class
Commit: 448ac1fb00df7aadc207dc3f5e87d7dcb5b933c5
https://github.com/llvm/llvm-project/commit/448ac1fb00df7aadc207dc3f5e87d7dcb5b933c5
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
Log Message:
-----------
AMDGPU/GlobalISel: Fix broken exp10 lowering for f16 (#170708)
Commit: 7a59ab0e1a0c51c06b61eb66b37aeb592924a963
https://github.com/llvm/llvm-project/commit/7a59ab0e1a0c51c06b61eb66b37aeb592924a963
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
Log Message:
-----------
[AMDGPU] Common up some unsafe fexp lowering. NFC. (#170841)
Commit: 8aa82eff569388f50a2fec60b61d9771b0912f0e
https://github.com/llvm/llvm-project/commit/8aa82eff569388f50a2fec60b61d9771b0912f0e
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/lds-dma-waits.ll
Log Message:
-----------
[AMDGPU][SIInsertWaitcnts] Wait on all LDS DMA operations when no aliasing store is found (#170660)
Previously, we would miss inserting a wait if the ds_read had AA info,
but it didn't match
any LDS DMA op, for example if we didn't track the LDS DMA op it aliases
with because it exceeded the tracking limit.
Commit: 2e238bfa36decb416d7245850261e7e5246f9056
https://github.com/llvm/llvm-project/commit/2e238bfa36decb416d7245850261e7e5246f9056
Author: Hans Wennborg <hans at hanshq.net>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/utils/release/build_llvm_release.bat
Log Message:
-----------
Build win release packages with LLDB_ENABLE_LIBXML2 (#170513)
Fixes #170461
Commit: bb926c157f3096088d4da381243eb7522c6b6ab7
https://github.com/llvm/llvm-project/commit/bb926c157f3096088d4da381243eb7522c6b6ab7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/test/CodeGen/X86/bitcnt-big-integer.ll
Log Message:
-----------
[X86] bitcnt-big-integer.ll - add test coverage for AVX512 targets with no VLX support (#171104)
Commit: 49496c531da2d1acf0d1e2e74dd84c190347c039
https://github.com/llvm/llvm-project/commit/49496c531da2d1acf0d1e2e74dd84c190347c039
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M mlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for misc-use-internal-linkage in LLVMIRIntrinsicGen.cpp (NFC)
Commit: f9e0fa8ba4100e8acb8907a5a32c0175d0711162
https://github.com/llvm/llvm-project/commit/f9e0fa8ba4100e8acb8907a5a32c0175d0711162
Author: guillem-bartrina-sonarsource <guillem.bartrina at sonarsource.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/MoveChecker.cpp
A clang/test/Analysis/use-after-move-invalidation.cpp
Log Message:
-----------
[analyzer] MoveChecker: correct invalidation of this-regions (#169626)
By completely omitting invalidation in the case of InstanceCall, we do
not clear the moved state of the fields of the this object after an
opaque call to a member function of the object itself.
Commit: 405403c8ed4b2956dc03c270373fac2576a23a65
https://github.com/llvm/llvm-project/commit/405403c8ed4b2956dc03c270373fac2576a23a65
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M mlir/lib/Dialect/Transform/TuneExtension/TuneExtensionOps.cpp
Log Message:
-----------
[mlir] Fix GCC compilation warning in TuneExtensionOps.cpp (#168850)
Building with GCC produces:
```
<...>/TuneExtensionOps.cpp:180:26: warning: comparison of unsigned expression in ‘< 0’ is always false [-Wtype-limits]
180 | if (*selectedRegionIdx < 0 || *selectedRegionIdx >= getNumRegions())
| ~~~~~~~~~~~~~~~~~~~^~~
<...>/TuneExtensionOps.cpp: In member function ‘llvm::LogicalResult mlir::transform::tune::AlternativesOp::verify()’:
/home/david.spickett/llvm-project/mlir/lib/Dialect/Transform/TuneExtension/TuneExtensionOps.cpp:236:19: warning: comparison of unsigned expression in ‘< 0’ is always false [-Wtype-limits]
236 | if (regionIdx < 0 || regionIdx >= getNumRegions())
| ~~~~~~~~~~^~~
```
As we are sign extending these variables, use int64_t instead of size_t
for their type.
Commit: e52cddc4326031cc78db370c150384c12157d3b7
https://github.com/llvm/llvm-project/commit/e52cddc4326031cc78db370c150384c12157d3b7
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M .github/workflows/release-binaries.yml
Log Message:
-----------
workflows/release-binaries: Use upload-release-artifact action for uploading (#170528)
Commit: 56beac9f0c2629b34d65dff2ea63605cc43dad39
https://github.com/llvm/llvm-project/commit/56beac9f0c2629b34d65dff2ea63605cc43dad39
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
A llvm/test/CodeGen/SPIRV/const-array-gep.ll
Log Message:
-----------
[SPIRV] Fix assertion violation caused by unexpected ConstantExpr. (#170524)
`SPIRVEmitIntrinsics::simplifyZeroLengthArrayGepInst` asserted that it
always expected a `GetElementPtrInst` from `IRBuilder::CreateGEP` (which
returns a `Value`). `IRBuilder` can fold and return a `ConstantExpr`
instead, thus violating the assertion. The patch fixes this by using
`GetElementPtrInst::Create` to always return a `GetElementPtrInst`.
This LLVM defect was identified via the AMD Fuzzing project.
Commit: f41edb3fb9143e1fdc0bd326241af12d4a3cf56b
https://github.com/llvm/llvm-project/commit/f41edb3fb9143e1fdc0bd326241af12d4a3cf56b
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll
Log Message:
-----------
[AMDGPU] Add test cases for v_fmac_dx9_zero_f32 aka v_fmac_legacy_f32 (#171108)
Commit: 5e3ffd66e7c434ac615432cdfbfb0d6ed47b643c
https://github.com/llvm/llvm-project/commit/5e3ffd66e7c434ac615432cdfbfb0d6ed47b643c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M mlir/lib/ExecutionEngine/ArmRunnerUtils.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for readability-identifier-naming in ArmRunnerUtils.cpp (NFC)
Commit: 32ff7100d737bcfce2f713dd9838df88bdd3b631
https://github.com/llvm/llvm-project/commit/32ff7100d737bcfce2f713dd9838df88bdd3b631
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/fixed-length-bf16-arith.ll
Log Message:
-----------
[AArch64] Lower v8bf16 FMUL to BFMLAL top/bottom with +sve (#169655)
Assuming the predicate is hoisted, this should have a slightly better
throughput: https://godbolt.org/z/jb7aP7Efc
Note: SVE must be used to convert back to bf16 as the bfmlalb/t
instructions operate on even/odd lanes, but the neon bfcvtn/2 process
the top/bottom halves of vectors.
Commit: 3a6781ea4d21ce9c21c227131141fcf9665cdf6d
https://github.com/llvm/llvm-project/commit/3a6781ea4d21ce9c21c227131141fcf9665cdf6d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
Log Message:
-----------
[X86] vector-shuffle-combining-avx512f.ll - add tests showing failure to simplify expand/compress nodes (#171113)
Commit: d94958b2f27affe00c42c1338f99674d2f6271c8
https://github.com/llvm/llvm-project/commit/d94958b2f27affe00c42c1338f99674d2f6271c8
Author: Tirthankar Mazumder <63574588+wermos at users.noreply.github.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-add.ll
Log Message:
-----------
[InstCombine] Fold `icmp samesign u{gt/lt} (X +nsw C2), C` -> `icmp s{gt/lt} X, (C - C2)` (#169960)
Fixes #166973
Partially addresses #134028
Alive2 proof: https://alive2.llvm.org/ce/z/BqHQNN
Commit: 1bbff7290f481388e5ec915436181deb4972819e
https://github.com/llvm/llvm-project/commit/1bbff7290f481388e5ec915436181deb4972819e
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M mlir/lib/ExecutionEngine/VulkanRuntimeWrappers.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for llvm-qualified-auto in VulkanRuntimeWrappers.cpp (NFC)
Commit: 60492898f8d4143f99f1dc2d3015e97f56acc870
https://github.com/llvm/llvm-project/commit/60492898f8d4143f99f1dc2d3015e97f56acc870
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M mlir/lib/Dialect/Shard/IR/ShardOps.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for readability-identifier-naming in ShardOps.cpp (NFC)
Commit: a5e8e77f7ccd15945eb432a3619e57f9600c142a
https://github.com/llvm/llvm-project/commit/a5e8e77f7ccd15945eb432a3619e57f9600c142a
Author: Gergely Bálint <gergely.balint at arm.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M bolt/lib/Passes/PointerAuthCFIAnalyzer.cpp
M bolt/test/AArch64/pacret-cfi-incorrect.s
A bolt/test/runtime/AArch64/pacret-synchronous-unwind.cpp
Log Message:
-----------
[BOLT][PAC] Warn about synchronous unwind tables (#165227)
BOLT currently ignores functions with synchronous PAuth DWARF info.
If more than 10% of functions get ignored for inconsistencies, we
should emit a warning to only use asynchronous unwind tables.
See related issue: #165215
Commit: 7c832fca5374cde2804cebc2ba3c5ad635fb76a1
https://github.com/llvm/llvm-project/commit/7c832fca5374cde2804cebc2ba3c5ad635fb76a1
Author: Adrian Vogelsgesang <avogelsgesang at salesforce.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M lldb/source/Commands/CommandObjectTarget.cpp
Log Message:
-----------
[lldb] Fix command line of `target frame-provider register` (#167803)
So far, the syntax was `target frame-provider register <cmd-options>
[<run-args>]`. Note the optional `run-args` at the end. They are
completely ignored by the actual command, but the command line parser
still accepts them.
This commit removes them.
This was probably a copy-paste error from `CommandObjectProcessLaunch`
which was probably used as a blue-print for `target frame-provider
register`.
Commit: 33d779dfbf258eac826b2a22b4fece602cce321f
https://github.com/llvm/llvm-project/commit/33d779dfbf258eac826b2a22b4fece602cce321f
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M openmp/runtime/src/kmp_ftn_entry.h
Log Message:
-----------
[OpenMP] Fix undefined symbol for Darwin builds (#170999)
cf.
https://github.com/llvm/llvm-project/pull/168554#issuecomment-3617253169
Commit: 07bafab83de2ba9f7d15fb194e0d34cd71f17af2
https://github.com/llvm/llvm-project/commit/07bafab83de2ba9f7d15fb194e0d34cd71f17af2
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll
Log Message:
-----------
[AMDGPU] Do not generate V_FMAC_DX9_ZERO_F32 on GFX12 (#171116)
GFX12 does not have the FMAC form of this instruction, only the FMA
form.
Fixes: #170437
Commit: c1d030e9a48c2167b52b8b296c9e30ecfb7adb40
https://github.com/llvm/llvm-project/commit/c1d030e9a48c2167b52b8b296c9e30ecfb7adb40
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M mlir/lib/ExecutionEngine/ExecutionEngine.cpp
Log Message:
-----------
[MLIR][ExecutionEngine] Don't create a `_mlir_` wrapper function for internal linkage (#171115)
This is somehow NFC, we were creating wrapper for interal functions,
which are de-facto not callable.
Commit: 7fbd443491db62a3fe316f9cc4e3e47036f5730b
https://github.com/llvm/llvm-project/commit/7fbd443491db62a3fe316f9cc4e3e47036f5730b
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M lldb/source/Commands/CommandObjectBreakpoint.cpp
Log Message:
-----------
[lldb] Remove printf in breakpoint add command
Added in 2110db0f49593 / #156067.
Commit: f29f01db8fa0be64e8de66adc2c0037f3e18d448
https://github.com/llvm/llvm-project/commit/f29f01db8fa0be64e8de66adc2c0037f3e18d448
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Linux/soft_rss_limit_mb_test.cpp
Log Message:
-----------
[Sanitizer] Bump soft_rss_limit_mb in test (#170911)
This test is failing on some buildbots now that the internal shell has
been turned on and was failing previously on some ppc bots when turning
it on a while back (before it got reverted).
At least one X86 bot is barely hitting the limit
(https://lab.llvm.org/buildbot/#/builders/174/builds/28487 224MB-235MB).
This likely needs to be bumped due to changes in the process tree (now
that we invoke things through python rather than a bash shell) with the
enablement of the internal shell.
Commit: f1af9b027eaf41f884e63b7121f6b6af6dd81126
https://github.com/llvm/llvm-project/commit/f1af9b027eaf41f884e63b7121f6b6af6dd81126
Author: Mend Renovate <bot at renovateapp.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M .github/workflows/bazel-checks.yml
M .github/workflows/build-ci-container-tooling.yml
M .github/workflows/build-ci-container-windows.yml
M .github/workflows/build-ci-container.yml
M .github/workflows/build-metrics-container.yml
M .github/workflows/check-ci.yml
M .github/workflows/ci-post-commit-analyzer.yml
M .github/workflows/commit-access-greeter.yml
M .github/workflows/commit-access-review.yml
M .github/workflows/docs.yml
M .github/workflows/email-check.yaml
M .github/workflows/gha-codeql.yml
M .github/workflows/hlsl-test-all.yaml
M .github/workflows/issue-release-workflow.yml
M .github/workflows/issue-subscriber.yml
M .github/workflows/issue-write.yml
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/libclang-python-tests.yml
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/libcxx-build-containers.yml
M .github/workflows/libcxx-check-generated-files.yml
M .github/workflows/libcxx-run-benchmarks.yml
M .github/workflows/llvm-abi-tests.yml
M .github/workflows/llvm-bugs.yml
M .github/workflows/merged-prs.yml
M .github/workflows/mlir-spirv-tests.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-code-format.yml
M .github/workflows/pr-code-lint.yml
M .github/workflows/pr-request-release-note.yml
M .github/workflows/pr-subscriber.yml
M .github/workflows/premerge.yaml
M .github/workflows/release-asset-audit.yml
M .github/workflows/release-binaries.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-doxygen.yml
M .github/workflows/release-lit.yml
M .github/workflows/release-sources.yml
M .github/workflows/release-tasks.yml
M .github/workflows/scorecard.yml
M .github/workflows/spirv-tests.yml
M .github/workflows/test-unprivileged-download-artifact.yml
M .github/workflows/version-check.yml
Log Message:
-----------
Update [Github] Update GHA Dependencies (#171064)
This PR contains the following updates:
| Package | Type | Update | Change | Pending |
|---|---|---|---|---|
| [actions/checkout](https://redirect.github.com/actions/checkout) |
action | patch | `v6.0.0` -> `v6.0.1` | |
| [actions/setup-node](https://redirect.github.com/actions/setup-node) |
action | minor | `v6.0.0` -> `v6.1.0` | |
|
[github/codeql-action](https://redirect.github.com/github/codeql-action)
| action | patch | `v4.31.5` -> `v4.31.6` | `v4.31.7` |
Commit: 11866c499b06ae2f259ef870c8ea15c560bee04d
https://github.com/llvm/llvm-project/commit/11866c499b06ae2f259ef870c8ea15c560bee04d
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/RISCV/mul.ll
Log Message:
-----------
[DAGCombiner] Don't peek through bitcast when checking isMulAddWithConstProfitable (#171056)
Fixes https://github.com/llvm/llvm-project/issues/171035
Peeking through bitcast may cause type mismatch between `AddNode` and
`ConstNode` in `isMulAddWithConstProfitable`.
Commit: bab4d1e8b2ada6b238b1672d589726f18ee464c1
https://github.com/llvm/llvm-project/commit/bab4d1e8b2ada6b238b1672d589726f18ee464c1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/test/CodeGen/X86/shift-i512.ll
Log Message:
-----------
[X86] shift-i512.ll - extend test coverage (#171125)
Remove v8i64 dependency from original shift-by-1 tests - this was added for #132601 but is unlikely to be necessary
Add tests for general shifts as well as shift-by-constant and shift-of-constant examples
Commit: dd06214394977729a3f2715bfadf1b31467551b8
https://github.com/llvm/llvm-project/commit/dd06214394977729a3f2715bfadf1b31467551b8
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenDeclOpenACC.cpp
A clang/test/CIR/CodeGenOpenACC/routine-bind.c
A clang/test/CIR/CodeGenOpenACC/routine-bind.cpp
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
Log Message:
-----------
[OpenACC][CIR] Implement routine 'bind'-with-a-string lowering (#170916)
The 'bind' clause emits an attribute on the RoutineOp that states which
function it should call on the device side. When provided in
double-quotes, the function on the device side should be the exact name
given. This patch emits the IR to do that.
As a part of that, we add a helper function to the OpenACC dialect to do
so, as well as a version that adds the ID version (though we don't
exercise th at yet).
The 'bind' with an ID should do the MANGLED name, but it isn't quite
clear what that name SHOULD be yet. Since the signature of a function is
included in its mangling, and we're not providing said signature, we
have to come up with something. This is left as an exercise for a future
patch.
Commit: e8219e5ce84db26fd521ce5091d18e75c7afbc6a
https://github.com/llvm/llvm-project/commit/e8219e5ce84db26fd521ce5091d18e75c7afbc6a
Author: Luke Lau <luke at igalia.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorize.h
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/early_exit_costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
A llvm/test/Transforms/LoopVectorize/AArch64/sve-predicated-costs.ll
A llvm/test/Transforms/LoopVectorize/RISCV/predicated-costs.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/std-find.ll
A llvm/test/Transforms/PhaseOrdering/loop-vectorize-bfi.ll
Log Message:
-----------
[VPlan] Use BlockFrequencyInfo in getPredBlockCostDivisor (#158690)
In 531.deepsjeng_r from SPEC CPU 2017 there's a loop that we
unprofitably loop vectorize on RISC-V.
The loop looks something like:
```c
for (int i = 0; i < n; i++) {
if (x0[i] == a)
if (x1[i] == b)
if (x2[i] == c)
// do stuff...
}
```
Because it's so deeply nested the actual inner level of the loop rarely
gets executed. However we still deem it profitable to vectorize, which
due to the if-conversion means we now always execute the body.
This stems from the fact that `getPredBlockCostDivisor` currently
assumes that blocks have 50% chance of being executed as a heuristic.
We can fix this by using BlockFrequencyInfo, which gives a more accurate
estimate of the innermost block being executed 12.5% of the time. We can
then calculate the probability as `HeaderFrequency / BlockFrequency`.
Fixing the cost here gives a 7% speedup for 531.deepsjeng_r on RISC-V.
Whilst there's a lot of changes in the in-tree tests, this doesn't
affect llvm-test-suite or SPEC CPU 2017 that much:
- On armv9-a -flto -O3 there's 0.0%/0.2% more geomean loops vectorized
on llvm-test-suite/SPEC CPU 2017.
- On x86-64 -flto -O3 **with PGO** there's 0.9%/0% less geomean loops
vectorized on llvm-test-suite/SPEC CPU 2017.
Overall geomean compile time impact is 0.03% on stage1-ReleaseLTO:
https://llvm-compile-time-tracker.com/compare.php?from=9eee396c58d2e24beb93c460141170def328776d&to=32fbff48f965d03b51549fdf9bbc4ca06473b623&stat=instructions%3Au
Commit: 048715458855222919cd2632d740e9221ef3cb50
https://github.com/llvm/llvm-project/commit/048715458855222919cd2632d740e9221ef3cb50
Author: Tim Gymnich <tim at gymni.ch>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/test/Conversion/AMDGPUToROCDL/gfx1250.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[mlir][amdgpu] Add workgroup_mask to MakeDmaDescriptorOp (#171103)
- add `workgroup_mask` and `early_timeout`
Commit: cc19f420b99fcda4ab4252fcf857d0e7ed6339e7
https://github.com/llvm/llvm-project/commit/cc19f420b99fcda4ab4252fcf857d0e7ed6339e7
Author: Dark Steve <Prasoon.Mishra at amd.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
Log Message:
-----------
[AMDGPU][NPM] Port AMDGPUArgumentUsageInfo to NPM (#170886)
Port AMDGPUArgumentUsageInfo analysis to the NPM to fix suboptimal code
generation when NPM is enabled by default.
Previously, DAG.getPass() returns nullptr when using NPM, causing the
argument usage info to be unavailable during ISel. This resulted in
fallback to FixedABIFunctionInfo which assumes all implicit arguments
are needed, generating unnecessary register setup code for entry
functions.
Fixes LLVM::CodeGen/AMDGPU/cc-entry.ll
Changes:
- Split AMDGPUArgumentUsageInfo into a data class and NPM analysis
wrapper
- Update SIISelLowering to use DAG.getMFAM() for NPM path
- Add RequireAnalysisPass in addPreISel() to ensure analysis
availability
This follows the same pattern used for PhysicalRegisterUsageInfo.
Commit: ce73cbb6abdcd3188150c9063933bfe15c73f523
https://github.com/llvm/llvm-project/commit/ce73cbb6abdcd3188150c9063933bfe15c73f523
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M clang/lib/Headers/__clang_cuda_complex_builtins.h
M clang/test/Headers/amdgcn-openmp-device-math-complex.c
M clang/test/Headers/amdgcn-openmp-device-math-complex.cpp
M clang/test/Headers/nvptx_device_math_complex.c
M clang/test/Headers/nvptx_device_math_complex.cpp
Log Message:
-----------
clang: Use generic builtins in cuda complex builtins header (#171106)
There's no reason to use the ocml or nv prefixed functions and
maintain this list of alias macros. I left these macros in for
NVPTX in the scalbn and logb case, since those have a special
case hack in the AMDGPU codegen and probably do not work on ptx.
Commit: a6fc5a1d77e78333f26a44b145ad43149e9ada17
https://github.com/llvm/llvm-project/commit/a6fc5a1d77e78333f26a44b145ad43149e9ada17
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M clang-tools-extra/clang-tidy/fuchsia/MultipleInheritanceCheck.cpp
M clang-tools-extra/clang-tidy/fuchsia/MultipleInheritanceCheck.h
Log Message:
-----------
[clang-tidy][NFC] Refactor `fuchsia-multiple-inheritance` (#171059)
Commit: 1ae957515cccf8825733fbe100ff32864543d248
https://github.com/llvm/llvm-project/commit/1ae957515cccf8825733fbe100ff32864543d248
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU][NFC] Update a comment about FLAT v/s LDSDMA
The change in #170263 does not do justice to common knowledge in the backend.
Fix the comment to reflect the relation between FLAT encoding, flat pointer
access, and LDSDMA operations.
Commit: 886f54a04c04d1b7c4649ae9d00f85cf7655269a
https://github.com/llvm/llvm-project/commit/886f54a04c04d1b7c4649ae9d00f85cf7655269a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Log Message:
-----------
DAG: Set MachinePointerInfo for stack when expanding divrem libcall (#170537)
Commit: 2a389fdc6bb5e0d141bbfc5f514d63043d1d5071
https://github.com/llvm/llvm-project/commit/2a389fdc6bb5e0d141bbfc5f514d63043d1d5071
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2025-12-08 (Mon, 08 Dec 2025)
Changed paths:
M .github/workflows/bazel-checks.yml
M .github/workflows/build-ci-container-tooling.yml
M .github/workflows/build-ci-container-windows.yml
M .github/workflows/build-ci-container.yml
M .github/workflows/build-metrics-container.yml
M .github/workflows/check-ci.yml
M .github/workflows/ci-post-commit-analyzer.yml
M .github/workflows/commit-access-greeter.yml
M .github/workflows/commit-access-review.yml
M .github/workflows/docs.yml
M .github/workflows/email-check.yaml
M .github/workflows/gha-codeql.yml
M .github/workflows/hlsl-test-all.yaml
M .github/workflows/issue-release-workflow.yml
M .github/workflows/issue-subscriber.yml
M .github/workflows/issue-write.yml
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/libclang-python-tests.yml
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/libcxx-build-containers.yml
M .github/workflows/libcxx-check-generated-files.yml
M .github/workflows/libcxx-run-benchmarks.yml
M .github/workflows/llvm-abi-tests.yml
M .github/workflows/llvm-bugs.yml
M .github/workflows/merged-prs.yml
M .github/workflows/mlir-spirv-tests.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-code-format.yml
M .github/workflows/pr-code-lint.yml
M .github/workflows/pr-request-release-note.yml
M .github/workflows/pr-subscriber.yml
M .github/workflows/premerge.yaml
M .github/workflows/release-asset-audit.yml
M .github/workflows/release-binaries.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-doxygen.yml
M .github/workflows/release-lit.yml
M .github/workflows/release-sources.yml
M .github/workflows/release-tasks.yml
M .github/workflows/scorecard.yml
M .github/workflows/spirv-tests.yml
M .github/workflows/test-unprivileged-download-artifact.yml
M .github/workflows/version-check.yml
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Passes/PointerAuthCFIAnalyzer.cpp
M bolt/test/AArch64/pacret-cfi-incorrect.s
M bolt/test/X86/unclaimed-jt-entries.s
A bolt/test/runtime/AArch64/pacret-synchronous-unwind.cpp
M bolt/test/runtime/X86/unclaimed-jt-entries.s
M clang-tools-extra/clang-tidy/.clang-tidy
M clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
M clang-tools-extra/clang-tidy/NoLintDirectiveHandler.cpp
M clang-tools-extra/clang-tidy/altera/StructPackAlignCheck.cpp
M clang-tools-extra/clang-tidy/altera/UnrollLoopsCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/ChainedComparisonCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/DanglingHandleCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/NonZeroEnumToBoolConversionCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SuspiciousMissingCommaCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/UnsafeFunctionsCheck.cpp
M clang-tools-extra/clang-tidy/fuchsia/MultipleInheritanceCheck.cpp
M clang-tools-extra/clang-tidy/fuchsia/MultipleInheritanceCheck.h
M clang-tools-extra/clang-tidy/llvm/UseNewMLIROpBuilderCheck.cpp
M clang-tools-extra/clang-tidy/misc/ConfusableIdentifierCheck.cpp
M clang-tools-extra/clang-tidy/misc/MisleadingBidirectionalCheck.cpp
M clang-tools-extra/clang-tidy/misc/MisleadingIdentifierCheck.cpp
M clang-tools-extra/clang-tidy/modernize/MakeSmartPtrCheck.cpp
M clang-tools-extra/clang-tidy/openmp/UseDefaultNoneCheck.cpp
M clang-tools-extra/clang-tidy/readability/FunctionCognitiveComplexityCheck.cpp
M clang-tools-extra/clang-tidy/readability/RedundantInlineSpecifierCheck.cpp
M clang-tools-extra/clang-tidy/readability/RedundantStringInitCheck.cpp
M clang-tools-extra/clang-tidy/utils/LexerUtils.cpp
M clang-tools-extra/clang-tidy/utils/TransformerClangTidyCheck.cpp
M clang-tools-extra/clang-tidy/utils/UseRangesCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/.clang-tidy
M clang-tools-extra/test/clang-tidy/checkers/fuchsia/multiple-inheritance.cpp
M clang-tools-extra/test/clang-tidy/infrastructure/Inputs/param/parameters.txt
M clang/docs/ReleaseNotes.rst
M clang/docs/UsersManual.rst
M clang/include/clang/AST/IgnoreExpr.h
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/Options/Options.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenDeclOpenACC.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Headers/__clang_cuda_complex_builtins.h
M clang/lib/StaticAnalyzer/Checkers/MoveChecker.cpp
A clang/test/Analysis/use-after-move-invalidation.cpp
A clang/test/CIR/CodeGenOpenACC/routine-bind.c
A clang/test/CIR/CodeGenOpenACC/routine-bind.cpp
A clang/test/CIR/IR/catch-param.cir
M clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
M clang/test/CodeGenCUDA/kernel-args.cu
A clang/test/CodeGenCXX/speculative-devirt-metadata.cpp
A clang/test/CodeGenHIP/amdgcnspirv-uses-amdgpu-abi.cpp
M clang/test/Driver/clang_f_opts.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Headers/amdgcn-openmp-device-math-complex.c
M clang/test/Headers/amdgcn-openmp-device-math-complex.cpp
M clang/test/Headers/nvptx_device_math_complex.c
M clang/test/Headers/nvptx_device_math_complex.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M compiler-rt/lib/builtins/cpu_model/aarch64.c
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/android.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/elf_aux_info.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/getauxval.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/hwcap.inc
M compiler-rt/test/fuzzer/reduce_inputs.test
M compiler-rt/test/sanitizer_common/TestCases/Linux/soft_rss_limit_mb_test.cpp
M libcxx/docs/ABIGuarantees.rst
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/include/__atomic/atomic.h
M libcxx/include/__atomic/atomic_flag.h
M libcxx/include/__atomic/atomic_ref.h
M libcxx/include/__atomic/atomic_sync.h
M libcxx/include/__atomic/contention_t.h
M libcxx/include/__bit_reference
M libcxx/include/__configuration/abi.h
M libcxx/include/__configuration/availability.h
M libcxx/include/__exception/exception.h
M libcxx/include/__exception/nested_exception.h
M libcxx/include/__exception/operations.h
M libcxx/include/__functional/hash.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/unique_ptr.h
M libcxx/include/__system_error/error_category.h
M libcxx/include/__system_error/error_code.h
M libcxx/include/__system_error/error_condition.h
M libcxx/include/__system_error/system_error.h
M libcxx/include/__utility/integer_sequence.h
M libcxx/include/bitset
M libcxx/include/module.modulemap.in
M libcxx/include/stdexcept
M libcxx/lib/abi/CHANGELOG.TXT
M libcxx/lib/abi/arm64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/i686-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc64-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-freebsd.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.noexceptions.nonew.abilist
M libcxx/src/atomic.cpp
M libcxx/test/libcxx/atomics/atomics.syn/wait.issue_85107.pass.cpp
M libcxx/test/libcxx/diagnostics/functional.nodiscard.verify.cpp
A libcxx/test/libcxx/diagnostics/syserr/nodiscard.verify.cpp
M libcxx/test/libcxx/language.support/nodiscard.verify.cpp
A libcxx/test/libcxx/utilities/intseq/nodiscard.verify.cpp
M libcxx/test/libcxx/utilities/smartptr/nodiscard.verify.cpp
A libcxx/test/libcxx/utilities/template.bitset/nodiscard.verify.cpp
A libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.wait/lost_wakeup.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/copy_assign.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/deduct.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/deduct_pmr.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/initializer_list.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/iter_iter.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/move_assign.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/pmr.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/range.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/sorted_container.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/sorted_initializer_list.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.cons/sorted_iter_iter.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.modifiers/erase_key.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.observers/comp.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy_assign.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/deduct.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/deduct_pmr.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/initializer_list.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/iter_iter.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_assign.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/pmr.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/range.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_container.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_initializer_list.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_iter_iter.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_key.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.observers/comp.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multiset/flat.multiset.cons/move.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multiset/flat.multiset.cons/move_assign.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multiset/flat.multiset.cons/sorted_iter_iter.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multiset/flat.multiset.iterators/iterator.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.set/flat.set.cons/move.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.set/flat.set.cons/move_assign.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.set/flat.set.cons/sorted_iter_iter.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.set/flat.set.iterators/iterator.pass.cpp
M lld/docs/ELF/linker_script.rst
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/CommandObjectTarget.cpp
M llvm/bindings/ocaml/llvm/llvm_ocaml.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/examples/OrcV2Examples/OrcV2CBindingsAddObjectFile/OrcV2CBindingsAddObjectFile.c
M llvm/examples/OrcV2Examples/OrcV2CBindingsBasicUsage/OrcV2CBindingsBasicUsage.c
M llvm/examples/OrcV2Examples/OrcV2CBindingsDumpObjects/OrcV2CBindingsDumpObjects.c
M llvm/examples/OrcV2Examples/OrcV2CBindingsIRTransforms/OrcV2CBindingsIRTransforms.c
M llvm/examples/OrcV2Examples/OrcV2CBindingsMCJITLikeMemoryManager/OrcV2CBindingsMCJITLikeMemoryManager.c
M llvm/examples/OrcV2Examples/OrcV2CBindingsRemovableCode/OrcV2CBindingsRemovableCode.c
M llvm/include/llvm-c/BitReader.h
M llvm/include/llvm-c/Core.h
M llvm/include/llvm-c/Target.h
M llvm/include/llvm/Analysis/RuntimeLibcallInfo.h
M llvm/include/llvm/CodeGen/MachineFrameInfo.h
M llvm/include/llvm/CodeGen/TargetFrameLowering.h
M llvm/include/llvm/IR/Constants.h
M llvm/include/llvm/IR/LLVMContext.h
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/include/llvm/Transforms/IPO/WholeProgramDevirt.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorize.h
M llvm/lib/Bitcode/Reader/BitReader.cpp
M llvm/lib/CodeGen/PHIElimination.cpp
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.h
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCInstrVSX.td
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSfmm.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/Target.cpp
M llvm/lib/Target/X86/X86CompressEVEX.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/fixed-length-bf16-arith.ll
A llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll
M llvm/test/CodeGen/AMDGPU/lds-dma-waits.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
A llvm/test/CodeGen/AMDGPU/phi-elim-mli-available.mir
M llvm/test/CodeGen/AMDGPU/promote-alloca-multidim.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-negative-index.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-to-vector.ll
M llvm/test/CodeGen/PowerPC/fminimum-fmaximum.ll
M llvm/test/CodeGen/PowerPC/scalar-min-max.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/mul.ll
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rv64p.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
A llvm/test/CodeGen/SPIRV/const-array-gep.ll
A llvm/test/CodeGen/SPIRV/pointers/fun-with-aggregate-arg-in-const-init.ll
A llvm/test/CodeGen/SPIRV/pointers/ptr-argument-byref-amdgcnspirv.ll
M llvm/test/CodeGen/X86/apx/compress-evex.mir
M llvm/test/CodeGen/X86/bitcnt-big-integer.ll
M llvm/test/CodeGen/X86/shift-i512.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/rv32i-invalid.s
M llvm/test/MC/RISCV/rv32p-invalid.s
M llvm/test/MC/RISCV/rv32p-valid.s
M llvm/test/MC/RISCV/rv64p-valid.s
M llvm/test/TableGen/x86-instr-mapping.inc
M llvm/test/Transforms/Attributor/AMDGPU/tag-invariant-loads.ll
M llvm/test/Transforms/InstCombine/icmp-add.ll
M llvm/test/Transforms/LoopVectorize/AArch64/early_exit_costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
A llvm/test/Transforms/LoopVectorize/AArch64/sve-predicated-costs.ll
A llvm/test/Transforms/LoopVectorize/RISCV/predicated-costs.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-reductions.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/std-find.ll
A llvm/test/Transforms/PhaseOrdering/loop-vectorize-bfi.ll
A llvm/test/Transforms/PhaseOrdering/speculative-devirt-then-inliner.ll
A llvm/test/Transforms/WholeProgramDevirt/devirt-metadata.ll
M llvm/tools/llvm-c-test/attributes.c
M llvm/tools/llvm-c-test/calc.c
M llvm/tools/llvm-c-test/debuginfo.c
M llvm/tools/llvm-c-test/diagnostic.c
M llvm/tools/llvm-c-test/echo.cpp
M llvm/tools/llvm-c-test/metadata.c
M llvm/tools/llvm-c-test/module.c
M llvm/tools/llvm-c-test/object.c
M llvm/unittests/ExecutionEngine/MCJIT/MCJITCAPITest.cpp
M llvm/unittests/IR/ConstantsTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
M llvm/utils/TableGen/X86InstrMappingEmitter.cpp
M llvm/utils/TableGen/X86ManualInstrMapping.def
M llvm/utils/release/build_llvm_release.bat
M mlir/include/mlir-c/ExecutionEngine.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/lib/Bindings/Python/ExecutionEngineModule.cpp
M mlir/lib/CAPI/ExecutionEngine/ExecutionEngine.cpp
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
M mlir/lib/Conversion/ArithToAPFloat/CMakeLists.txt
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/Shard/IR/ShardOps.cpp
M mlir/lib/Dialect/Transform/TuneExtension/TuneExtensionOps.cpp
M mlir/lib/ExecutionEngine/ArmRunnerUtils.cpp
M mlir/lib/ExecutionEngine/ExecutionEngine.cpp
M mlir/lib/ExecutionEngine/VulkanRuntimeWrappers.cpp
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/CAPI/execution_engine.c
M mlir/test/CAPI/global_constructors.c
M mlir/test/Conversion/AMDGPUToROCDL/gfx1250.mlir
M mlir/test/Conversion/ArithToApfloat/arith-to-apfloat.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
A mlir/test/Integration/Dialect/Arith/CPU/test-apfloat-emulation-vector.mlir
M mlir/test/Target/Cpp/common-cpp.mlir
M mlir/test/python/execution_engine.py
M mlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp
M mlir/tools/mlir-tblgen/PassGen.cpp
M openmp/runtime/src/kmp_ftn_entry.h
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
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-----------
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