[all-commits] [llvm/llvm-project] 740d0b: [MLIR][Python] add GetTypeID for llvm.struct_type ...

Sat Dec 6 02:23:18 PST 2025

Branch: refs/heads/users/aengelke/spr/rfcllvmclang-add-llvm-plugin-hook-for-back-ends
 Home: https://github.com/llvm/llvm-project
 Commit: 740d0bd385967f6ae0171896722143d9a70b66a5
 https://github.com/llvm/llvm-project/commit/740d0bd385967f6ae0171896722143d9a70b66a5
 Author: Maksim Levental <maksim.levental at gmail.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M mlir/include/mlir-c/Dialect/LLVM.h
 M mlir/lib/Bindings/Python/DialectLLVM.cpp
 M mlir/lib/CAPI/Dialect/LLVM.cpp
 M mlir/test/python/dialects/llvm.py

 Log Message:
 -----------
 [MLIR][Python] add GetTypeID for llvm.struct_type and llvm.ptr and enable downcasting (#169383)


 Commit: d4cd331b7efc8cd5f15faa846697d9d61b0ff246
 https://github.com/llvm/llvm-project/commit/d4cd331b7efc8cd5f15faa846697d9d61b0ff246
 Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M llvm/utils/gn/secondary/libcxx/include/BUILD.gn

 Log Message:
 -----------
 [gn build] Port 2bdd1357c826


 Commit: 0e86510c787d68f5f87708b2efdaf92a7501b6c3
 https://github.com/llvm/llvm-project/commit/0e86510c787d68f5f87708b2efdaf92a7501b6c3
 Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
 M llvm/utils/gn/secondary/clang/lib/Frontend/BUILD.gn

 Log Message:
 -----------
 [gn build] Port 3773bbe9e791


 Commit: 40fb2ca506a873b031f90dac619ccca1d6ff0de5
 https://github.com/llvm/llvm-project/commit/40fb2ca506a873b031f90dac619ccca1d6ff0de5
 Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn

 Log Message:
 -----------
 [gn build] Port 645e0dcbff33


 Commit: 445956443bdf5dcc7fb8beb7dd9e571f31551519
 https://github.com/llvm/llvm-project/commit/445956443bdf5dcc7fb8beb7dd9e571f31551519
 Author: Henry Baba-Weiss <henry.babaweiss at gmail.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M clang/docs/ReleaseNotes.rst
 M clang/lib/Sema/SemaDecl.cpp
 M clang/test/CodeGen/attr-target-clones.c
 M clang/test/Sema/attr-target-clones.c

 Log Message:
 -----------
 [clang][Sema] Handle target_clones redeclarations that omit the attribute (#169259)

This patch adds a case to `CheckMultiVersionAdditionalDecl()` that
detects redeclarations of `target_clones` functions which omit the
attribute, and makes sure they are marked as redeclarations. It also
updates the comment at the call site of
`CheckMultiVersionAdditionalDecl()` to reflect this.

Previously, `target_clones` multiversioned functions that omitted the
attribute from subsequent declarations would cause Clang to hit an
`llvm_unreachable` and crash. In the following example, the second
declaration (the function definition) should inherit the `target_clones`
attribute from the first declaration (the forward declaration):

```
__attribute__((target_clones("arch=atom", "default")))
void foo(void);

void foo(void) { /* ... */ }
```

However, `CheckMultiVersionAdditionalDecl()` was not recognizing the
function definition as a redeclaration of the forward declaration, which
prevented `Sema::MergeFunctionDecl()` from automatically inheriting the
attribute.

A side effect of this fix is that Clang now catches redeclarations of
`target_clones` functions that have conflicting types, which previously
caused Clang to crash by hitting that same `llvm_unreachable`. The
`bad_overload1` case in `clang/test/Sema/attr-target-clones.c` has been
updated to reflect this.

Fixes #165517
Fixes #129483


 Commit: f5e228b32ac0a59b5aa834caa80150ba877e82ce
 https://github.com/llvm/llvm-project/commit/f5e228b32ac0a59b5aa834caa80150ba877e82ce
 Author: Deric C. <cheung.deric at gmail.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M llvm/lib/Target/DirectX/DXILDataScalarization.cpp
 M llvm/test/CodeGen/DirectX/bugfix_150050_data_scalarize_const_gep.ll
 M llvm/test/CodeGen/DirectX/scalarize-alloca.ll
 M llvm/test/CodeGen/DirectX/scalarize-global.ll

 Log Message:
 -----------
 [DirectX] Simplify DXIL data scalarization, and data scalarize whole GEP chains (#168096)

- The DXIL data scalarizer only needs to change vectors into arrays. It
does not need to change the types of GEPs to match the pointer type.
This PR simplifies the `visitGetElementPtrInst` method to do just that
while also accounting for nested GEPs from ConstantExprs. (Before this
PR, there were still vector types lingering in nested GEPs with
ConstantExprs.)
- The `equivalentArrayTypeFromVector` function was awkwardly placed near
the top of the file and away from the other helper functions. The
function is now moved next to the other helper functions.
- Removed an unnecessary `||` condition from `isVectorOrArrayOfVectors`

Related tests have also been cleaned up, and the test CHECKs have been
modified to account for the new simplified behavior.


 Commit: 4a0d4850d77c13b71cd0bdd40b38a5afc46fb62b
 https://github.com/llvm/llvm-project/commit/4a0d4850d77c13b71cd0bdd40b38a5afc46fb62b
 Author: Erick Velez <erickvelez7 at gmail.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M clang-tools-extra/clang-doc/assets/class-template.mustache
 M clang-tools-extra/test/clang-doc/namespace.cpp

 Log Message:
 -----------
 [clang-doc] Add definition information to class templates (#169109)


 Commit: 658675fad794197a2a41207b8e4b422becd78f28
 https://github.com/llvm/llvm-project/commit/658675fad794197a2a41207b8e4b422becd78f28
 Author: Erich Keane <ekeane at nvidia.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M clang/lib/CIR/CodeGen/CIRGenDeclOpenACC.cpp
 M clang/lib/CIR/CodeGen/CIRGenOpenACCClause.cpp
 A clang/test/CIR/CodeGenOpenACC/declare-deviceresident.cpp

 Log Message:
 -----------
 [OpenACC][CIR] 'device_resident' clause lowering for local declare (#169389)

Just like the last handful of clauses, this is a pretty simple one,
doing device_resident (Entry op: declare_device_resident, and exit:
 delete). This should be the last of the 'local' declare patches.


 Commit: 0549aa11c2c1b619c673a0644a25f939bf13746f
 https://github.com/llvm/llvm-project/commit/0549aa11c2c1b619c673a0644a25f939bf13746f
 Author: Michael Buch <michaelbuch12 at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/include/llvm/DWARFLinker/Classic/DWARFLinker.h
 M llvm/include/llvm/DWARFLinker/Classic/DWARFLinkerDeclContext.h
 M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
 M llvm/lib/DWARFLinker/Classic/DWARFLinkerDeclContext.cpp
 M llvm/test/tools/dsymutil/AArch64/dummy-debug-map-arm64.map
 M llvm/test/tools/dsymutil/AArch64/dwarf5-str-offsets-base-strx.test
 M llvm/test/tools/dsymutil/AArch64/inlined-low_pc.c
 A llvm/test/tools/dsymutil/AArch64/odr-uniquing-DW_AT_name-conflict.test
 A llvm/test/tools/dsymutil/Inputs/odr-uniquing-DW_AT_name-conflict/1.o
 A llvm/test/tools/dsymutil/Inputs/odr-uniquing-DW_AT_name-conflict/2.o
 A llvm/test/tools/dsymutil/Inputs/odr-uniquing-DW_AT_name-conflict/lib1.cpp
 A llvm/test/tools/dsymutil/Inputs/odr-uniquing-DW_AT_name-conflict/lib1.h
 A llvm/test/tools/dsymutil/Inputs/odr-uniquing-DW_AT_name-conflict/lib2.cpp
 A llvm/test/tools/dsymutil/Inputs/odr-uniquing-DW_AT_name-conflict/main.cpp

 Log Message:
 -----------
 [llvm][dsymutil] Use the DW_AT_name of the uniqued DIE for insertion into .debug_names (#168513)

Depends on:
* https://github.com/llvm/llvm-project/pull/168895

Note, the last commit is the one with the actual fix. The others are
drive-by/test changes

We've been seeing dsymutil verification failures like:
```
error: Name Index @ 0x0: Entry @ 0x11949d: mismatched Name of DIE @ 0x9c644c:
index - apply<(lambda at /some/build/dir/lib/LLVMSupport/include/llvm/Support/Error.h:1070:35)>;
debug_info - apply<(lambda at /some/build/dir/lib/LLVMCustom/include/llvm/Support/Error.h:1070:35)>
apply, _ZN11custom_llvm18ErrorHandlerTraitsIRFvRNS_13ErrorInfoBaseEEE5applyIZNS_12consumeErrorENS_5ErrorEEUlRKS1_E_EES7_OT_NSt3__110unique_ptrIS1_NSD_14default_deleteIS1_EEEE.
```
Not how the name of the DIE has a different lambda path than the one
that was used to insert the DIE into debug_names.

The root cause of the issue is that we have a DW_AT_subprogram
definition whose DW_AT_specification DIE got deduplicated. But the
DW_AT_name of the original specification is different than the one it
got uniqued to. That’s technically fine because dsymutil uniques by
linkage name, which uniquely identifies any function with non-internal
linkage.

But we insert the definition DIE into the debug-names table using the
DW_AT_name of the original specification (we call
`getDIENames(InputDIE…)`). But what we really want to do is use the name
of the adjusted `DW_AT_specifcation` (i.e., the `DW_AT_specification` of
the output DIE). That’s not as simple as it sounds because we can’t just
get ahold of the DIE in the output CU. We have to grab the ODR
`DeclContext` of the input DIE’s specification. That is the only link
back to the canonical specification DIE. For that to be of any use, we
have to stash the `DW_AT_name` into `DeclContext` so we can use it in
`getDIENames`.

We have to account for the possibility of multiple levels of
`DW_AT_specification`/`DW_AT_abstract_origin`. So my proposed solution
is to recursively scan the referenced DIE’s, grab the canonical DIE for
those and get the name from the `DeclContext` (if none exists then use
the `DW_AT_name` of the DIE itself).

One remaining question is whether we need to handle the case where a DIE
has a `DW_AT_specification` *and* a `DW_AT_abstract_origin`? That
complicates the way we locate `DW_AT_name`. We'd have to adjust
`getCanonicalDIEName` to handle this. But it's not clear what a
`DW_AT_name` would be for such cases. Worst case at the moment we take
the wrong path up the specifications and don't find any `DW_AT_name`,
and don't end up indexing that DIE. Something to keep an eye out for.

rdar://149239553


 Commit: e92bb83c1810c61a7fa81d55a1690cffa2b14b60
 https://github.com/llvm/llvm-project/commit/e92bb83c1810c61a7fa81d55a1690cffa2b14b60
 Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp

 Log Message:
 -----------
 [AArch64][PAC] Simplify emission of authenticated pointer check (NFC) (#160899)

The `AArch64AsmPrinter::emitPtrauthCheckAuthenticatedValue` method accepts
two arguments, `bool ShouldTrap` and `const MCSymbol *OnFailure`, that
control the behavior of the emitted instruction sequence when the check
fails:
* `ShouldTrap` requests an error to be generated
* `OnFailure` requests branching to the given label after clearing the
 PAC field

An assertion in `emitPtrauthCheckAuthenticatedValue` ensures that when
`ShouldTrap` is true, `OnFailure` must be null. But the opposite holds
as well: when `ShouldTrap` is false, `OnFailure` is always non-null,
as otherwise the entire sequence following `AUT[ID][AB]` instruction
would turn into a very expensive equivalent of XPAC (unless the CPU
implements FEAT_FPAC):

 authenticate Xn
 inspect PAC field of Xn
 if PAC field was not cleared:
 clear PAC field

In other words, the value of `ShouldTrap` argument can be computed as
`OnFailure == nullptr` at all existing call sites. In fact, at three
of four call sites, constant `true` and `nullptr` are passed as the
values of these function arguments. `emitPtrauthAuthResign` is the
only caller that potentially makes use of checking-but-not-trapping
mode of `emitPtrauthCheckAuthenticatedValue`, and it passes a non-null
pointer as `OnFailure` when `ShouldTrap` is false.

This commit makes the invariant explicit by omitting the `ShouldTrap`
argument and inferring its value from the `OnFailure` argument instead.


 Commit: 48eb697441e20f2e1a66d953436b9d66e0fc466d
 https://github.com/llvm/llvm-project/commit/48eb697441e20f2e1a66d953436b9d66e0fc466d
 Author: Florian Hahn <flo at fhahn.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
 M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll

 Log Message:
 -----------
 [LV] Count cost of middle block if TC <= VF. (#168949)

If the expected trip count is less than the VF, the vector loop will
only execute a single iteration. When that's the case, the cost of the
middle block has the same impact as the cost of the vector loop. Include
it in isOutsideLoopWorkProfitable to avoid vectorizing when the extra
work in the middle block makes it unprofitable.

Note that isOutsideLoopWorkProfitable already scales the cost of blocks
outside the vector region, but the patch restricts accounting for the
middle block to cases where VF <= ExpectedTC, to initially catch some
worst cases and avoid regressions.

This initial version should specifically avoid unprofitable tail-folding
for loops with low trip counts after re-applying
https://github.com/llvm/llvm-project/pull/149042.

PR: https://github.com/llvm/llvm-project/pull/168949


 Commit: 7b186e4bf0f1485657697bc79c66b5792dcd562e
 https://github.com/llvm/llvm-project/commit/7b186e4bf0f1485657697bc79c66b5792dcd562e
 Author: Daan De Meyer <daan.j.demeyer at gmail.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M clang/lib/Format/TokenAnnotator.cpp
 M clang/unittests/Format/TokenAnnotatorTest.cpp

 Log Message:
 -----------
 [clang-format] Fix designated initializer detection (#169228)

Currently, in the following snippet, the second designated initializer
is incorrectly detected as an OBJC method expr. Fix that and a test to
make sure we don't regress.

```
Foo foo[] = {[0] = 1, [1] = 2};
```


 Commit: 40334b8632f6d065e6672ada1c4342d07ecce629
 https://github.com/llvm/llvm-project/commit/40334b8632f6d065e6672ada1c4342d07ecce629
 Author: Shilei Tian 
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M clang-tools-extra/clangd/CompileCommands.cpp
 M clang-tools-extra/clangd/Compiler.cpp
 M clang/docs/ReleaseNotes.rst
 M clang/include/clang/Driver/CommonArgs.h
 R clang/include/clang/Driver/CreateASTUnitFromArgs.h
 R clang/include/clang/Driver/CreateInvocationFromArgs.h
 M clang/include/clang/Driver/Driver.h
 M clang/include/clang/Frontend/ASTUnit.h
 M clang/include/clang/Frontend/ChainedDiagnosticConsumer.h
 M clang/include/clang/Frontend/CompilerInvocation.h
 R clang/include/clang/Frontend/StandaloneDiagnostic.h
 M clang/include/clang/Frontend/Utils.h
 M clang/include/clang/Options/OptionUtils.h
 M clang/lib/CrossTU/CMakeLists.txt
 M clang/lib/CrossTU/CrossTranslationUnit.cpp
 M clang/lib/Driver/CMakeLists.txt
 R clang/lib/Driver/CreateASTUnitFromArgs.cpp
 R clang/lib/Driver/CreateInvocationFromArgs.cpp
 M clang/lib/Driver/Driver.cpp
 M clang/lib/Driver/ToolChains/Clang.cpp
 M clang/lib/Driver/ToolChains/CommonArgs.cpp
 M clang/lib/Driver/ToolChains/Flang.cpp
 M clang/lib/Frontend/ASTUnit.cpp
 M clang/lib/Frontend/CMakeLists.txt
 M clang/lib/Frontend/CompilerInvocation.cpp
 A clang/lib/Frontend/CreateInvocationFromCommandLine.cpp
 R clang/lib/Frontend/StandaloneDiagnostic.cpp
 M clang/lib/Interpreter/CMakeLists.txt
 M clang/lib/Interpreter/Interpreter.cpp
 M clang/lib/Options/OptionUtils.cpp
 M clang/lib/Tooling/Tooling.cpp
 M clang/tools/c-index-test/CMakeLists.txt
 M clang/tools/c-index-test/core_main.cpp
 M clang/tools/diagtool/CMakeLists.txt
 M clang/tools/diagtool/ShowEnabledWarnings.cpp
 M clang/tools/driver/cc1_main.cpp
 M clang/tools/libclang/CIndex.cpp
 M clang/tools/libclang/CIndexer.cpp
 M clang/tools/libclang/CMakeLists.txt
 M clang/tools/libclang/Indexing.cpp
 M clang/unittests/Driver/DXCModeTest.cpp
 M clang/unittests/Driver/ToolChainTest.cpp
 M clang/unittests/Frontend/ASTUnitTest.cpp
 M clang/unittests/Frontend/CompilerInstanceTest.cpp
 M clang/unittests/Frontend/UtilsTest.cpp
 M clang/unittests/Sema/CMakeLists.txt
 M clang/unittests/Sema/SemaNoloadLookupTest.cpp
 M clang/unittests/Serialization/ForceCheckFileInputTest.cpp
 M clang/unittests/Serialization/LoadSpecLazilyTest.cpp
 M clang/unittests/Serialization/ModuleCacheTest.cpp
 M clang/unittests/Serialization/NoCommentsTest.cpp
 M clang/unittests/Serialization/PreambleInNamedModulesTest.cpp
 M clang/unittests/Serialization/VarDeclConstantInitTest.cpp
 M clang/unittests/Tooling/Syntax/TokensTest.cpp
 M clang/unittests/Tooling/Syntax/TreeTestBase.cpp
 M flang/lib/Frontend/CMakeLists.txt
 M flang/lib/Frontend/CompilerInvocation.cpp
 M lldb/source/Commands/CommandObjectTarget.cpp
 M lldb/source/Plugins/ExpressionParser/Clang/CMakeLists.txt
 M lldb/source/Plugins/ExpressionParser/Clang/ClangHost.cpp
 M lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
 M lldb/unittests/Expression/ClangParserTest.cpp

 Log Message:
 -----------
 Revert " [clang] Refactor to remove clangDriver dependency from clangFrontend and flangFrontend (#165277)"

This reverts commit 3773bbe9e7916ec89fb3e3cd02e29c54cabac82b.


 Commit: 5a9c62ba48ea2fa899e3ff54d6b4779c1902f34b
 https://github.com/llvm/llvm-project/commit/5a9c62ba48ea2fa899e3ff54d6b4779c1902f34b
 Author: Vishruth Thimmaiah <vishruththimmaiah at gmail.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
 A clang/test/CIR/CodeGen/X86/avx512bw-builtins.c

 Log Message:
 -----------
 [CIR][X86] Add support for `kshiftl`/`kshiftr` builtins (#168591)

Adds support for the `__builtin_ia32_kshiftli` and
`__builtin_ia32_kshiftri` X86 builtins.

Part of #167765

---------

Signed-off-by: vishruth-thimmaiah <vishruththimmaiah at gmail.com>


 Commit: 5c15f579234f0ac4e40037ebc7e250499525ac48
 https://github.com/llvm/llvm-project/commit/5c15f579234f0ac4e40037ebc7e250499525ac48
 Author: Shilei Tian 
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M clang-tools-extra/clangd/CompileCommands.cpp
 M clang-tools-extra/clangd/Compiler.cpp
 M clang/docs/ReleaseNotes.rst
 M clang/include/clang/Driver/CommonArgs.h
 A clang/include/clang/Driver/CreateASTUnitFromArgs.h
 A clang/include/clang/Driver/CreateInvocationFromArgs.h
 M clang/include/clang/Driver/Driver.h
 M clang/include/clang/Frontend/ASTUnit.h
 M clang/include/clang/Frontend/ChainedDiagnosticConsumer.h
 M clang/include/clang/Frontend/CompilerInvocation.h
 A clang/include/clang/Frontend/StandaloneDiagnostic.h
 M clang/include/clang/Frontend/Utils.h
 M clang/include/clang/Options/OptionUtils.h
 M clang/lib/CrossTU/CMakeLists.txt
 M clang/lib/CrossTU/CrossTranslationUnit.cpp
 M clang/lib/Driver/CMakeLists.txt
 A clang/lib/Driver/CreateASTUnitFromArgs.cpp
 A clang/lib/Driver/CreateInvocationFromArgs.cpp
 M clang/lib/Driver/Driver.cpp
 M clang/lib/Driver/ToolChains/Clang.cpp
 M clang/lib/Driver/ToolChains/CommonArgs.cpp
 M clang/lib/Driver/ToolChains/Flang.cpp
 M clang/lib/Frontend/ASTUnit.cpp
 M clang/lib/Frontend/CMakeLists.txt
 M clang/lib/Frontend/CompilerInvocation.cpp
 R clang/lib/Frontend/CreateInvocationFromCommandLine.cpp
 A clang/lib/Frontend/StandaloneDiagnostic.cpp
 M clang/lib/Interpreter/CMakeLists.txt
 M clang/lib/Interpreter/Interpreter.cpp
 M clang/lib/Options/OptionUtils.cpp
 M clang/lib/Tooling/Tooling.cpp
 M clang/tools/c-index-test/CMakeLists.txt
 M clang/tools/c-index-test/core_main.cpp
 M clang/tools/diagtool/CMakeLists.txt
 M clang/tools/diagtool/ShowEnabledWarnings.cpp
 M clang/tools/driver/cc1_main.cpp
 M clang/tools/libclang/CIndex.cpp
 M clang/tools/libclang/CIndexer.cpp
 M clang/tools/libclang/CMakeLists.txt
 M clang/tools/libclang/Indexing.cpp
 M clang/unittests/Driver/DXCModeTest.cpp
 M clang/unittests/Driver/ToolChainTest.cpp
 M clang/unittests/Frontend/ASTUnitTest.cpp
 M clang/unittests/Frontend/CompilerInstanceTest.cpp
 M clang/unittests/Frontend/UtilsTest.cpp
 M clang/unittests/Sema/CMakeLists.txt
 M clang/unittests/Sema/SemaNoloadLookupTest.cpp
 M clang/unittests/Serialization/ForceCheckFileInputTest.cpp
 M clang/unittests/Serialization/LoadSpecLazilyTest.cpp
 M clang/unittests/Serialization/ModuleCacheTest.cpp
 M clang/unittests/Serialization/NoCommentsTest.cpp
 M clang/unittests/Serialization/PreambleInNamedModulesTest.cpp
 M clang/unittests/Serialization/VarDeclConstantInitTest.cpp
 M clang/unittests/Tooling/Syntax/TokensTest.cpp
 M clang/unittests/Tooling/Syntax/TreeTestBase.cpp
 M flang/lib/Frontend/CMakeLists.txt
 M flang/lib/Frontend/CompilerInvocation.cpp
 M lldb/source/Commands/CommandObjectTarget.cpp
 M lldb/source/Plugins/ExpressionParser/Clang/CMakeLists.txt
 M lldb/source/Plugins/ExpressionParser/Clang/ClangHost.cpp
 M lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
 M lldb/unittests/Expression/ClangParserTest.cpp

 Log Message:
 -----------
 Reapply " [clang] Refactor to remove clangDriver dependency from clangFrontend and flangFrontend (#165277)"

This reverts commit 40334b8632f6d065e6672ada1c4342d07ecce629.

Unfortunately the revert breaks the build.


 Commit: dea330b38d9c18b68219abdb52baaa72c9f1103d
 https://github.com/llvm/llvm-project/commit/dea330b38d9c18b68219abdb52baaa72c9f1103d
 Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M clang-tools-extra/clangd/CompileCommands.cpp
 M clang-tools-extra/clangd/Compiler.cpp
 M clang/docs/ReleaseNotes.rst
 M clang/include/clang/Driver/CommonArgs.h
 R clang/include/clang/Driver/CreateASTUnitFromArgs.h
 R clang/include/clang/Driver/CreateInvocationFromArgs.h
 M clang/include/clang/Driver/Driver.h
 M clang/include/clang/Frontend/ASTUnit.h
 M clang/include/clang/Frontend/CompilerInvocation.h
 R clang/include/clang/Frontend/StandaloneDiagnostic.h
 M clang/include/clang/Frontend/Utils.h
 M clang/include/clang/Options/OptionUtils.h
 M clang/lib/CrossTU/CMakeLists.txt
 M clang/lib/CrossTU/CrossTranslationUnit.cpp
 M clang/lib/Driver/CMakeLists.txt
 R clang/lib/Driver/CreateASTUnitFromArgs.cpp
 R clang/lib/Driver/CreateInvocationFromArgs.cpp
 M clang/lib/Driver/Driver.cpp
 M clang/lib/Driver/ToolChains/Clang.cpp
 M clang/lib/Driver/ToolChains/CommonArgs.cpp
 M clang/lib/Driver/ToolChains/Flang.cpp
 M clang/lib/Frontend/ASTUnit.cpp
 M clang/lib/Frontend/CMakeLists.txt
 M clang/lib/Frontend/CompilerInvocation.cpp
 A clang/lib/Frontend/CreateInvocationFromCommandLine.cpp
 R clang/lib/Frontend/StandaloneDiagnostic.cpp
 M clang/lib/Interpreter/CMakeLists.txt
 M clang/lib/Interpreter/Interpreter.cpp
 M clang/lib/Options/OptionUtils.cpp
 M clang/lib/Tooling/Tooling.cpp
 M clang/tools/c-index-test/CMakeLists.txt
 M clang/tools/c-index-test/core_main.cpp
 M clang/tools/diagtool/CMakeLists.txt
 M clang/tools/diagtool/ShowEnabledWarnings.cpp
 M clang/tools/driver/cc1_main.cpp
 M clang/tools/libclang/CIndex.cpp
 M clang/tools/libclang/CIndexer.cpp
 M clang/tools/libclang/CMakeLists.txt
 M clang/tools/libclang/Indexing.cpp
 M clang/unittests/Driver/DXCModeTest.cpp
 M clang/unittests/Driver/ToolChainTest.cpp
 M clang/unittests/Frontend/ASTUnitTest.cpp
 M clang/unittests/Frontend/CompilerInstanceTest.cpp
 M clang/unittests/Frontend/UtilsTest.cpp
 M clang/unittests/Sema/CMakeLists.txt
 M clang/unittests/Sema/SemaNoloadLookupTest.cpp
 M clang/unittests/Serialization/ForceCheckFileInputTest.cpp
 M clang/unittests/Serialization/LoadSpecLazilyTest.cpp
 M clang/unittests/Serialization/ModuleCacheTest.cpp
 M clang/unittests/Serialization/NoCommentsTest.cpp
 M clang/unittests/Serialization/PreambleInNamedModulesTest.cpp
 M clang/unittests/Serialization/VarDeclConstantInitTest.cpp
 M clang/unittests/Tooling/Syntax/TokensTest.cpp
 M clang/unittests/Tooling/Syntax/TreeTestBase.cpp
 M flang/lib/Frontend/CMakeLists.txt
 M flang/lib/Frontend/CompilerInvocation.cpp
 M lldb/source/Commands/CommandObjectTarget.cpp
 M lldb/source/Plugins/ExpressionParser/Clang/CMakeLists.txt
 M lldb/source/Plugins/ExpressionParser/Clang/ClangHost.cpp
 M lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
 M lldb/unittests/Expression/ClangParserTest.cpp

 Log Message:
 -----------
 Revert " [clang] Refactor to remove clangDriver dependency from clangFrontend and flangFrontend (#165277)" (#169397)

This reverts commit 3773bbe and relands the last revert attempt 40334b8.
3773bbe broke the build for the build configuration described in here:
https://github.com/llvm/llvm-project/pull/165277#issuecomment-3572432250


 Commit: 72dd4f75d6c6f7964a6612599ff09895ffd8d7e6
 https://github.com/llvm/llvm-project/commit/72dd4f75d6c6f7964a6612599ff09895ffd8d7e6
 Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
 M llvm/utils/gn/secondary/clang/lib/Frontend/BUILD.gn

 Log Message:
 -----------
 [gn build] Port dea330b38d9c


 Commit: 20929abb85633e4f17e5df21c9ac2fd80650f9d4
 https://github.com/llvm/llvm-project/commit/20929abb85633e4f17e5df21c9ac2fd80650f9d4
 Author: agozillon <Andrew.Gozillon at amd.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M flang/test/Integration/OpenMP/map-types-and-sizes.f90
 M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
 M mlir/test/Target/LLVMIR/omptarget-data-use-dev-ordering.mlir
 A mlir/test/Target/LLVMIR/omptarget-declare-target-to-host.mlir
 M mlir/test/Target/LLVMIR/omptarget-nowait.mlir
 A mlir/test/Target/LLVMIR/omptarget-overlapping-record-member-map.mlir
 M mlir/test/Target/LLVMIR/omptarget-record-type-with-ptr-member-host.mlir
 A offload/test/offloading/fortran/dtype-member-overlap-map.f90

 Log Message:
 -----------
 [MLIR][OpenMP] Introduce overlapped record type map support (#119588)

This PR introduces a new additional type of map lowering for record
types that Clang currently supports, in which a user can map a top-level
record type and then individual members with different mapping,
effectively creating a sort of "overlapping" mapping that we attempt to
cut around.

This is currently most predominantly used in Fortran, when mapping
descriptors and there data, we map the descriptor and its data with
separate map modifiers and "cut around" the pointer data, so that wedo
not overwrite it unless the runtime deems it a neccesary action based on
its reference counting mechanism. However, it is a mechanism that will
come in handy/trigger when a user explitily maps a record type (derived
type or structure) and then explicitly maps a member with a different
map type.

These additions were predominantly in the OpenMPToLLVMIRTranslation.cpp
file and phase, however, one Flang test that checks end-to-end IR
compilation (as far as we care for now at least) was altered.

2/3 required PRs to enable declare target to mapping, should look at PR
3/3 to check for full green passes (this one will fail a number due to
some dependencies).

Co-authored-by: Raghu Maddhipatla raghu.maddhipatla at amd.com


 Commit: 173600880b8f469ad9ae8da757bdc94959690ffa
 https://github.com/llvm/llvm-project/commit/173600880b8f469ad9ae8da757bdc94959690ffa
 Author: agozillon <Andrew.Gozillon at amd.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
 M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-allocatable.f90
 M flang/test/Lower/OpenMP/DelayedPrivatization/target-teams-private-implicit-scalar-map.f90
 M flang/test/Lower/OpenMP/allocatable-array-bounds.f90
 M flang/test/Lower/OpenMP/allocatable-map.f90
 M flang/test/Lower/OpenMP/array-bounds.f90
 M flang/test/Lower/OpenMP/declare-mapper.f90
 M flang/test/Lower/OpenMP/declare-target-link-tarop-cap.f90
 M flang/test/Lower/OpenMP/defaultmap.f90
 M flang/test/Lower/OpenMP/derived-type-allocatable-map.f90
 M flang/test/Lower/OpenMP/derived-type-map.f90
 M flang/test/Lower/OpenMP/map-character.f90
 M flang/test/Lower/OpenMP/map-descriptor-deferral.f90
 M flang/test/Lower/OpenMP/map-neg-alloca-derived-type-array.f90
 M flang/test/Lower/OpenMP/optional-argument-map-2.f90
 M flang/test/Lower/OpenMP/optional-argument-map-3.f90
 M flang/test/Lower/OpenMP/target-enter-data-default-openmp52.f90
 M flang/test/Lower/OpenMP/target.f90
 M flang/test/Lower/volatile-openmp.f90
 M flang/test/Transforms/omp-map-info-finalization.fir
 M mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
 M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
 A mlir/test/Target/LLVMIR/omptarget-declare-target-to-device.mlir
 A offload/test/offloading/fortran/declare-target-to-allocatable-vars-in-target-with-update.f90
 A offload/test/offloading/fortran/declare-target-to-vars-target-region-and-update.f90
 A offload/test/offloading/fortran/declare-target-to-zero-index-allocatable-target-map.f90

 Log Message:
 -----------
 [Flang][OpenMP][MLIR] Initial declare target to for variables implementation (#119589)

While the infrastructure for declare target to/enter and link for
variables exists in the MLIR dialect and at the Flang level, the current
lowering from MLIR -> LLVM IR isn't in place, it's only in place for
variables that have the link clause applied.

This PR aims to extend that lowering to an initial implementation that
incorporates declare target to as well, which primarily requires changes
in the OpenMPToLLVMIRTranslation phase. However, a minor addition to the
OpenMP dialect was required to extend the declare target enumerator to
include a default None field as well.

This also requires a minor change to the Flang lowering's
MapInfoFinlization.cpp pass to alter the map type for descriptors to
deal with cases where a variable is marked declare to. Currently, when a
descriptor variable is mapped declare target to the descriptor component
can become attatched, and cannot be updated, this results in issues when
an unusual allocation range is specified (effectively an off-by X
error). The current solution is to map the descriptor always, as we
always require an up-to-date version of this data. However, this also
requires an interlinked PR that adds a more intricate type of mapping of
structures/record types that clang currently implements, to circumvent
the overwriting of the pointer in the descriptor.

3/3 required PRs to enable declare target to mapping, this PR should
pass all tests and provide an all green CI.

Co-authored-by: Raghu Maddhipatla raghu.maddhipatla at amd.com


 Commit: ff80de72c4ce5cb5fa2a764e1e1a6097e82fc5f9
 https://github.com/llvm/llvm-project/commit/ff80de72c4ce5cb5fa2a764e1e1a6097e82fc5f9
 Author: Florian Mayer <fmayer at google.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp
 M compiler-rt/test/ubsan_minimal/TestCases/test-darwin-interface.c

 Log Message:
 -----------
 Reapply "[UBSan] [compiler-rt] add preservecc variants of handlers" (#168973) (#169091)

This reverts commit 418204d9c108351340fe21194ace0e31157b7189.


 Commit: 51d93e73975e5fc70008c286aaae2216fde097b6
 https://github.com/llvm/llvm-project/commit/51d93e73975e5fc70008c286aaae2216fde097b6
 Author: Danila Malyutin <danilaml at users.noreply.github.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/include/llvm/ADT/StringTable.h

 Log Message:
 -----------
 [ADT] Fix implicit reliance on cassert in StringTable.h (#169324)

Adds an explicit include of `<cassert>` in StringTable.h rather than
relying on the one in StringRef.h. Fixes potential compile errors if
assert() was undef'ed between StringRef.h and StringTable.h inclusion.


 Commit: f581d8ad8f0cd08da6465c6843f9c6841d49e522
 https://github.com/llvm/llvm-project/commit/f581d8ad8f0cd08da6465c6843f9c6841d49e522
 Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

 Log Message:
 -----------
 AMDGPU: Fix a comment (#169403)

This verifier check will complain if there aren't enough implicit
operands -- so it doesn't *allow* those operands, it *requires* them.


 Commit: 3e86f056217afbe46cd515b3d3c2f1dc7664bebf
 https://github.com/llvm/llvm-project/commit/3e86f056217afbe46cd515b3d3c2f1dc7664bebf
 Author: Jan Leyonberg <jan_sjodin at yahoo.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M flang/include/flang/Lower/Support/ReductionProcessor.h
 M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
 M flang/lib/Lower/OpenMP/ClauseProcessor.h
 M flang/lib/Lower/OpenMP/Clauses.cpp
 M flang/lib/Lower/OpenMP/OpenMP.cpp
 M flang/lib/Lower/Support/ReductionProcessor.cpp
 M flang/lib/Optimizer/OpenMP/MarkDeclareTarget.cpp
 A flang/test/Lower/OpenMP/Todo/omp-declare-reduction-advanced-types.f90
 R flang/test/Lower/OpenMP/Todo/omp-declare-reduction-initsub.f90
 R flang/test/Lower/OpenMP/Todo/omp-declare-reduction.f90
 A flang/test/Lower/OpenMP/declare-target-deferred-marking-reductions.f90
 A flang/test/Lower/OpenMP/omp-declare-reduction-derivedtype.f90
 A flang/test/Lower/OpenMP/omp-declare-reduction-initsub.f90
 A flang/test/Lower/OpenMP/omp-declare-reduction.f90
 M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
 A offload/test/offloading/fortran/target-custom-reduction-derivedtype.f90

 Log Message:
 -----------
 [OpenMP][flang] Lowering of OpenMP custom reductions to MLIR (#168417)

This patch add support for lowering of custom reductions to MLIR. It
also enhances the capability of the pass to automatically mark functions
as "declare target" by traversing custom reduction initializers and
combiners.


 Commit: 01a98b383c700c2580e11a166dce1180188cb236
 https://github.com/llvm/llvm-project/commit/01a98b383c700c2580e11a166dce1180188cb236
 Author: Martin Storsjö <martin at martin.st>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M libcxx/test/std/input.output/file.streams/c.files/gets-removed.verify.cpp

 Log Message:
 -----------
 [libcxx] [test] Fix the gets-removed.verify.cpp test with Clang 21 (#169235)

This fixes test errors like this, at least for a mingw target, if
building with Clang 21 instead of Clang 20, as in the CI environment:

 # .---command stderr------------
 # | error: 'expected-error' diagnostics seen but not expected:
 # | File C:\a\llvm-mingw\llvm-mingw\llvm-project\libcxx\test\std\input.output\file.streams\c.files\gets-removed.verify.cpp Line 16: cannot initialize a parameter of type 'char *' with an lvalue of type 'const char *'
 # | 1 error generated.
 # `-----------------------------
 # error: command failed with exit status: 1

This extra, unexpected diagnostic appears in Clang 21, since commit
9eef4d1c5fa6b1bcbbe675c14ca8301d5d346f7b ("Remove delayed typo
expressions"). Before this, we got the expected diagnostic `error: no
member named 'gets' in namespace 'std'`, with the typo correction hint
`did you mean 'puts'?`. After this change, we get the typo correction
hint `did you mean simply 'gets'?` instead. And with the typo correction
finding `::gets`, it goes on to produce a second diagnostic about
mismatched parameter for that function.

Avoid these unexpected diagnostics by passing the right type of
parameter to the gets function.


 Commit: 89206de09c698f0f2e9ba106ebf3b67953041d2c
 https://github.com/llvm/llvm-project/commit/89206de09c698f0f2e9ba106ebf3b67953041d2c
 Author: David Peixotto <peix at meta.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M lldb/unittests/Expression/DWARFExpressionTest.cpp

 Log Message:
 -----------
 [lldb] Add mock dwarf delegate for testing dwarf expressions (#168468)

This commit adds a `MockDwarfDelegate` class that can be used to control
what dwarf version is used when evaluating an expression. We also add a
simple test that shows how dwarf version can change the result of the
expression.


 Commit: 3dcdb4c7658fb955d61fde5bd5232bdeadfc7eeb
 https://github.com/llvm/llvm-project/commit/3dcdb4c7658fb955d61fde5bd5232bdeadfc7eeb
 Author: Nikolas Klauser <nikolasklauser at berlin.de>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M libcxx/include/CMakeLists.txt
 M libcxx/include/__config
 R libcxx/include/__memory/aligned_alloc.h
 M libcxx/include/module.modulemap.in
 A libcxx/src/include/aligned_alloc.h
 M libcxx/test/libcxx/language.support/support.dynamic/libcpp_deallocate.sh.cpp
 M libcxxabi/src/fallback_malloc.cpp
 M libcxxabi/src/stdlib_new_delete.cpp

 Log Message:
 -----------
 [libc++][NFC] Move __memory/aligned_alloc.h into src/ (#166172)

This header is only ever used inside `src/`, so we might as well move it
there. As a drive-by this also removes some dead code.


 Commit: 8a431db0045b33ad9a7e4d4d89f5691ffc897088
 https://github.com/llvm/llvm-project/commit/8a431db0045b33ad9a7e4d4d89f5691ffc897088
 Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M llvm/utils/gn/secondary/libcxx/include/BUILD.gn

 Log Message:
 -----------
 [gn build] Port 3dcdb4c7658f


 Commit: e737f67fcf883e90683e1dd46247bd176fe15b5f
 https://github.com/llvm/llvm-project/commit/e737f67fcf883e90683e1dd46247bd176fe15b5f
 Author: Yu Hao <yuhaoyu at google.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M clang/lib/Tooling/Transformer/RangeSelector.cpp
 M clang/unittests/Tooling/RangeSelectorTest.cpp

 Log Message:
 -----------
 [clang][transformer] Fix `node` range-selector to include type name qualifiers of type locs. (#167619)

Previously, e.g. for TypeLoc "MyNamespace::MyClass", `node()` selects
only "MyClass" without the qualifier. With this change, it now selects
"MyNamespace::MyClass".

---------

Co-authored-by: Florian Mayer <fmayer at google.com>


 Commit: 1e1974a903c505de1f42257044b7a03a390d7a8b
 https://github.com/llvm/llvm-project/commit/1e1974a903c505de1f42257044b7a03a390d7a8b
 Author: Martin Storsjö <martin at martin.st>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M compiler-rt/test/lit.common.cfg.py

 Log Message:
 -----------
 [compiler-rt] [test] Avoid error printouts if os.sysconf is missing (#168857)

This avoids dozens of instances of benign error messages being printed
when running the tests on e.g. Windows:

 Traceback (most recent call last):
 File "<stdin>", line 1, in <module>
 AttributeError: module 'os' has no attribute 'sysconf'

Co-authored-by: Florian Mayer <fmayer at google.com>


 Commit: adf4c1dbb62600747fc74843efcdca5c3ee9c26a
 https://github.com/llvm/llvm-project/commit/adf4c1dbb62600747fc74843efcdca5c3ee9c26a
 Author: Jordan Rupprecht <rupprecht at google.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M utils/bazel/llvm-project-overlay/clang/BUILD.bazel

 Log Message:
 -----------
 [bazel][clang] Port dea330b38d9c18b68219abdb52baaa72c9f1103d (#169410)


 Commit: ba98668dcacc6d6b223f8a53b3c52a7cea2063e8
 https://github.com/llvm/llvm-project/commit/ba98668dcacc6d6b223f8a53b3c52a7cea2063e8
 Author: Tarun Prabhu <tarun at lanl.gov>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M flang/test/Lower/identical-block-merge-disable.f90
 M flang/test/Lower/implicit-interface.f90
 M flang/test/Lower/inline_directive.f90
 M flang/test/Lower/io-statement-1.f90
 M flang/test/Lower/io-write.f90
 M flang/test/Lower/location.f90
 M flang/test/Lower/module_definition.f90
 M flang/test/Lower/module_use.f90
 M flang/test/Lower/module_use_in_same_file.f90
 M flang/test/Lower/namelist-common-block.f90
 M flang/test/Lower/nested-where.f90
 M flang/test/Lower/nullify-polymorphic.f90
 M flang/test/Lower/pointer-association-polymorphic.f90
 M flang/test/Lower/pointer-disassociate.f90
 M flang/test/Lower/polymorphic-temp.f90
 M flang/test/Lower/polymorphic-types.f90
 M flang/test/Lower/polymorphic.f90
 M flang/test/Lower/pre-fir-tree02.f90
 M flang/test/Lower/procedure-declarations.f90
 M flang/test/Lower/read-write-buffer.f90
 M flang/test/Lower/select-type.f90
 M flang/test/Lower/statement-function.f90
 M flang/test/Lower/variable.f90
 M flang/test/Lower/volatile-allocatable.f90
 M flang/test/Lower/volatile-openmp1.f90

 Log Message:
 -----------
 [flang][NFC] Strip trailing whitespace from tests (8 of N)

Only some fortran source files in flang/test/Lower have been modified.
The other files in the directory will be cleaned up in subsequent commits


 Commit: 4650f8521d85a4dea310b47bd7edce9e0b73ecf0
 https://github.com/llvm/llvm-project/commit/4650f8521d85a4dea310b47bd7edce9e0b73ecf0
 Author: Benjamin Kramer <benny.kra at googlemail.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
 M mlir/test/Dialect/MemRef/canonicalize.mlir

 Log Message:
 -----------
 [MemRef] Remove memref.dim OffsetSizeAndStrideOpInterface folding (#169327)

OffsetSizeAndStrideOpInterface does not specify whether it's operating
on the input or output shape and in fact different ops implement this in
different ways, which is also why SubviewOp is special cased here.

This "marked as dynamic but not really dynamic" folding is better
handled by shape inference, so just remove the bad fold.


 Commit: 590bb3e8e63af0fb46eadf510761bd00e264c018
 https://github.com/llvm/llvm-project/commit/590bb3e8e63af0fb46eadf510761bd00e264c018
 Author: Eli Friedman <efriedma at qti.qualcomm.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M llvm/lib/TargetParser/Host.cpp

 Log Message:
 -----------
 [AArch64] Improve host feature detection. (#160410)

SVE depends on a combination of host support and operating system
support. Sometimes those don't line up with detected host CPU name; make
sure SVE is disabled when it isn't available. Implement this for both
Windows and Linux. (We don't have a codepath for other operating
systems. If someone wants to implement this, it should be possible to
adapt fmv code from compiler-rt.)

While I'm here, also add support for detecting other Windows CPU
features.

For Windows, declare constants ourselves so the code builds on older
SDKs; we also do this in compiler-rt.


 Commit: a50824926c07bc42e3d9a9e39de19cc7c71714a5
 https://github.com/llvm/llvm-project/commit/a50824926c07bc42e3d9a9e39de19cc7c71714a5
 Author: Florian Mayer <fmayer at google.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M clang/include/clang/Basic/CodeGenOptions.def
 M clang/include/clang/Driver/SanitizerArgs.h
 M clang/include/clang/Options/Options.td
 M clang/lib/Driver/SanitizerArgs.cpp
 M clang/test/Driver/fsanitize.c

 Log Message:
 -----------
 [UBsan] add -fsanitize-handler-preserve-all-regs flag (#168644)

This is currently a no op.
This will be supported for the minimal runtime in a follow up. This
allows
to improve codegen for fsanitize-recover by compiling the handlers with
[[clang::preserve_all]]. This makes sure that the caller does not need
to spill any registers. We do not expect this function to be called
frequently, so this is beneficial for code size.


 Commit: ab5ae9a61febab0c76430acc061336b3b8fffe52
 https://github.com/llvm/llvm-project/commit/ab5ae9a61febab0c76430acc061336b3b8fffe52
 Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M flang/include/flang/Optimizer/Builder/CUDAIntrinsicCall.h
 M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
 M flang/module/cooperative_groups.f90

 Log Message:
 -----------
 [flang][cuda] Implement this_cluster for cooperative groups (#169414)

Implement `this_cluster` like `this_group` by lowering it directly like
an intrinsic function. Use the NVVM operation to get the rank and size
information and populate the derived type.


 Commit: 4e7ce57e0e2ea04ab04c45127e6862a710460ebd
 https://github.com/llvm/llvm-project/commit/4e7ce57e0e2ea04ab04c45127e6862a710460ebd
 Author: Yury Plyakhin <yury.plyakhin at intel.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M llvm/include/llvm/Frontend/Offloading/OffloadWrapper.h
 M llvm/lib/Frontend/Offloading/OffloadWrapper.cpp

 Log Message:
 -----------
 [Offload][NFC] Offload wrapper cleanup/refactoring (#169411)

Addresses feedback from

https://github.com/llvm/llvm-project/pull/147508#pullrequestreview-3272708203
:
- Update access modifiers for SYCLWrapper members.
- Update comments.
- Update types.


 Commit: 9cff3f51d35c4273a48b987bdeddd10248ecb5e4
 https://github.com/llvm/llvm-project/commit/9cff3f51d35c4273a48b987bdeddd10248ecb5e4
 Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M flang/lib/Lower/OpenMP/Utils.cpp
 M flang/lib/Semantics/check-omp-loop.cpp
 M flang/lib/Semantics/resolve-directives.cpp
 A flang/test/Semantics/OpenMP/compiler-directives-loop.f90
 M flang/test/Semantics/OpenMP/loop-association.f90

 Log Message:
 -----------
 [flang][OpenMP] Tolerate compiler directives in loop constructs (#169346)

PR168884 flagged compiler directives (!dir$ ...) inside OpenMP loop
constructs as errors. This caused some customer applications to fail to
compile (issue 169229).

Downgrade the error to a warning, and gracefully ignore compiler
directives when lowering loop constructs to MLIR.

Fixes https://github.com/llvm/llvm-project/issues/169229


 Commit: 435dbbacad475b12b6cae0a8296e8a46ea684812
 https://github.com/llvm/llvm-project/commit/435dbbacad475b12b6cae0a8296e8a46ea684812
 Author: Andy Kaylor <akaylor at nvidia.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
 A clang/test/CIR/CodeGen/global-array-dtor.cpp

 Log Message:
 -----------
 [CIR] Fix a problem with global array dtor lowering (#169416)

In the LoweringPrepare pass, the handling for global array destructor
lowering was mishandling the insertion point, so that if this code
needed to create a declaration for the __cxa_atexit function, that
declaration was being created in the dtor region, rather than at module
scope. This change fixes that.


 Commit: fd94b410ef60ca0a0494c2164d7897b698315443
 https://github.com/llvm/llvm-project/commit/fd94b410ef60ca0a0494c2164d7897b698315443
 Author: Scott Linder <scott.linder at amd.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M llvm/include/llvm/MC/MCDwarf.h

 Log Message:
 -----------
 [MC] Use a variant to hold MCCFIInstruction state (NFC) (#164720)

AMDGPU requires more complex CFI rules, normally these would be
expressed with .cfi_escape, however this would make the CFI unreadable
and makes it difficult to update registers in CFI instructions (also
something AMDGPU requires).

Authored-by: Emma Pilkington <Emma.Pilkington at amd.com>


 Commit: ab2a302f0ee8b31404aa4cc454caee40f46602bd
 https://github.com/llvm/llvm-project/commit/ab2a302f0ee8b31404aa4cc454caee40f46602bd
 Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M flang/include/flang/Optimizer/Builder/CUDAIntrinsicCall.h
 M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
 M flang/module/cooperative_groups.f90
 A flang/test/Lower/CUDA/cuda-cluster.cuf

 Log Message:
 -----------
 [flang][cuda] Add support for cluster_dim_blocks in cooperative_groups (#169417)


 Commit: 420f62e05cc8c54253f52bb99f9b44ad5b9c4f89
 https://github.com/llvm/llvm-project/commit/420f62e05cc8c54253f52bb99f9b44ad5b9c4f89
 Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
 M compiler-rt/lib/scudo/standalone/tests/primary_test.cpp
 M compiler-rt/lib/scudo/standalone/tests/quarantine_test.cpp
 M compiler-rt/lib/scudo/standalone/tests/size_class_map_test.cpp

 Log Message:
 -----------
 [scudo] Only print stats when the test fails. (#168000)

When running the tests on other platforms, printing the stats on all of
the passing tests makes it hard to see failure output. Therefore, this
change only prints the stats if the test actually fails.


 Commit: d9cf0db2a26245394a1722f688f520e745358373
 https://github.com/llvm/llvm-project/commit/d9cf0db2a26245394a1722f688f520e745358373
 Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M libcxx/src/new.cpp

 Log Message:
 -----------
 Fix path to aligned_alloc.h in #include statement (#169418)

This fixes #166172.


 Commit: 73de1e26b4500f4ffd97c52922b0d45308d54f6d
 https://github.com/llvm/llvm-project/commit/73de1e26b4500f4ffd97c52922b0d45308d54f6d
 Author: Lang Hames <lhames at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/include/llvm/ExecutionEngine/Orc/WaitingOnGraph.h

 Log Message:
 -----------
 Orc fix waitingongraph coalescer remove (#169287)


 Commit: a8a504a08d14b7e855af7616a2663f25508cc184
 https://github.com/llvm/llvm-project/commit/a8a504a08d14b7e855af7616a2663f25508cc184
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M llvm/include/llvm/IR/RuntimeLibcalls.td

 Log Message:
 -----------
 RuntimeLibcalls: Add definitions for vector math functions (#167026)

This is mostly the output of a vibe coded script running on
VecFuncs.def, with a lot of manual cleanups and fixing where the
vibes were off. This is not yet wired up to anything (except for the
handful of calls which are already manually enabled). In the future
the SystemLibrary mechanism needs to be generalized to allow plugging
these sets in based on the flag.

One annoying piece is there are some name conflicts across the
libraries. Some of the libmvec functions have name collisions with some 
sleef functions. I solved this by just adding a prefix to the libmvec functions. 
It would probably be a good idea to add a prefix to every group. It gets ugly,
particularly since some of the sleef functions started to use a Sleef_
prefix, but mostly do not.


 Commit: 25dee656c7d2a3ba90cf4d243c047ea14616e91a
 https://github.com/llvm/llvm-project/commit/25dee656c7d2a3ba90cf4d243c047ea14616e91a
 Author: Wenju He <wenju.he at intel.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/include/clang/Basic/TargetInfo.h
 M clang/lib/Basic/TargetInfo.cpp
 M clang/lib/Basic/Targets.cpp
 A clang/test/Misc/opencl-c-3.0.incorrect_define.cl

 Log Message:
 -----------
 [OpenCL] Disable __opencl_c_ext_fp64_* features if cl_khr_fp64 is not supported (#169252)

Fix kernel build when cl_khr_fp64 is not enabled:
opencl-c.h:13785:50: error: unknown type name 'atomic_double'
13785 | double __ovld atomic_fetch_min(volatile __global atomic_double
*, double);
opencl-c.h:13785:67: error: use of type 'double' requires cl_khr_fp64
and __opencl_c_fp64 support
13785 | double __ovld atomic_fetch_min(volatile __global atomic_double
*, double);

This is a regression introduced by 423bdb2b. Before that commit,
__opencl_c_ext_fp64_global_atomic_add was guarded by cl_khr_fp64 in
opencl-c-base.h.


 Commit: 8947ba017fd8968292e7541a1bbfb82863e54041
 https://github.com/llvm/llvm-project/commit/8947ba017fd8968292e7541a1bbfb82863e54041
 Author: Wenju He <wenju.he at intel.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 A libclc/clc/include/clc/atomic/clc_atomic_flag_clear.h
 A libclc/clc/include/clc/atomic/clc_atomic_flag_test_and_set.h
 M libclc/clc/lib/generic/SOURCES
 A libclc/clc/lib/generic/atomic/clc_atomic_flag_clear.cl
 A libclc/clc/lib/generic/atomic/clc_atomic_flag_test_and_set.cl
 A libclc/opencl/include/clc/opencl/atomic/atomic_flag_clear.h
 A libclc/opencl/include/clc/opencl/atomic/atomic_flag_test_and_set.h
 A libclc/opencl/include/clc/opencl/atomic/atomic_init.h
 A libclc/opencl/include/clc/opencl/atomic/atomic_init.inc
 A libclc/opencl/include/clc/opencl/types.h
 A libclc/opencl/include/clc/opencl/utils.h
 M libclc/opencl/lib/generic/SOURCES
 A libclc/opencl/lib/generic/atomic/atomic_flag_clear.cl
 A libclc/opencl/lib/generic/atomic/atomic_flag_test_and_set.cl
 A libclc/opencl/lib/generic/atomic/atomic_init.cl
 A libclc/opencl/lib/generic/atomic/atomic_init.inc

 Log Message:
 -----------
 [libclc] Add atomic_init, atomic_flag_clear and atomic_flag_test_and_set (#168329)


 Commit: 81e91ea1c52a77093a44a186958cca29cf4d3dd8
 https://github.com/llvm/llvm-project/commit/81e91ea1c52a77093a44a186958cca29cf4d3dd8
 Author: Chengjun <chengjunp at Nvidia.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
 M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
 M llvm/test/CodeGen/NVPTX/bswap.ll

 Log Message:
 -----------
 [NVPTX] Use PRMT instruction to lower i16 bswap (#168968)

Previously, i16 `bswap` was lowered using multiple shift and OR
operations. This patch adds a pattern to directly lower i16 `bswap`
using the `PRMT` (permute) instruction, which is more efficient.

Additionally, the lowering of `bswap` is moved into operation
legalization, which allows for DAGCombiner to optimize the lowered code.


 Commit: ac4cf404d8f39e316f37c3732ab75be729604107
 https://github.com/llvm/llvm-project/commit/ac4cf404d8f39e316f37c3732ab75be729604107
 Author: Keith Smiley <keithbsmiley at gmail.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M utils/bazel/MODULE.bazel
 M utils/bazel/MODULE.bazel.lock
 M utils/bazel/extensions.bzl
 M utils/bazel/llvm-project-overlay/lld/BUILD.bazel
 M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
 A utils/bazel/llvm-project-overlay/third-party/BUILD.bazel
 A utils/bazel/llvm-project-overlay/third-party/cc_library_wrapper.bzl
 M utils/bazel/third_party_build/zstd.BUILD

 Log Message:
 -----------
 [bazel] Use zstd from the BCR (#169146)

This way if the downstream consuming project uses zstd we make sure
they are dedup'd. This uses a new rule to make sure layering_check still
works while allowing us to augment the upstream library rules with LLVM
specific `defines`.


 Commit: e23328b45719683c76deae7fab9a24523bf25520
 https://github.com/llvm/llvm-project/commit/e23328b45719683c76deae7fab9a24523bf25520
 Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M flang/include/flang/Optimizer/Builder/CUDAIntrinsicCall.h
 M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
 M flang/module/cooperative_groups.f90
 M flang/test/Lower/CUDA/cuda-cluster.cuf

 Log Message:
 -----------
 [flang][cuda] Add support for cluster_block_index in cooperative groups (#169427)


 Commit: 1b8626b5064fc58caa8dfd268b8b854f9f1b8543
 https://github.com/llvm/llvm-project/commit/1b8626b5064fc58caa8dfd268b8b854f9f1b8543
 Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M clang/docs/HIPSupport.rst

 Log Message:
 -----------
 Improve HIP docs on fat binary registration ordering (#168566)

Clarify how Clang-generated HIP fat binaries are registered and
unregistered with the HIP runtime, and how this interacts with global
constructors, destructors, and atexit handlers. Document that there is
no strong guarantee on ordering relative to user-defined global
ctors/dtors, recommend that HIP application developers avoid using
kernels or device variables from global ctors/dtors, and describe the
implications for HIP runtime developers (synchronization and guards in
__hipRegisterFatBinary/__hipUnregisterFatBinary). This is motivated by
questions from HIP application and runtime developers about fat binary
registration/unregistration order and its potential interference with
their own initialization and teardown code.


 Commit: 2f8e71287542a597be246d34699c93345d096f22
 https://github.com/llvm/llvm-project/commit/2f8e71287542a597be246d34699c93345d096f22
 Author: Abhinav Gaba <abhinav.gaba at intel.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 A offload/test/mapping/use_device_addr/target_data_use_device_addr_arrsec_fallback.c
 A offload/test/mapping/use_device_addr/target_data_use_device_addr_var_fallback.c
 A offload/test/mapping/use_device_ptr/target_data_use_device_ptr_var_fallback.c

 Log Message:
 -----------
 [NFC][OpenMP] Add use_device_ptr/addr tests for when the lookup fails. (#169428)

As per OpenMP 5.1, the pointers are expected to retain their original
values when a lookup fails and there is no device pointer to translate
to.


 Commit: 78994706d87e617e8063dfb73a585c8f7c7e738c
 https://github.com/llvm/llvm-project/commit/78994706d87e617e8063dfb73a585c8f7c7e738c
 Author: Matthias Springer <me at m-sp.org>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
 M mlir/lib/ExecutionEngine/APFloatWrappers.cpp
 M mlir/test/Conversion/ArithToApfloat/arith-to-apfloat.mlir
 M mlir/test/Integration/Dialect/Arith/CPU/test-apfloat-emulation.mlir

 Log Message:
 -----------
 [mlir][arith] Add support for `extf`, `truncf` to `ArithToAPFloat` (#169275)

Add support for `arith.extf` and `arith.truncf`. No support for custom
rounding modes yet.


 Commit: e6f2fbb0fa6b519643916e11552c88d680958ede
 https://github.com/llvm/llvm-project/commit/e6f2fbb0fa6b519643916e11552c88d680958ede
 Author: Ryan Mast <3969255+nightlark at users.noreply.github.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M .gitattributes
 A clang/bindings/python/.git_archival.txt
 A clang/bindings/python/.gitignore
 A clang/bindings/python/pyproject.toml

 Log Message:
 -----------
 [libclang/python] Enable packaging clang python bindings (#125806)

This adds a pyproject.toml file for packaging the clang Python bindings
as a sdist tarball and pure Python wheel packages for the clang python
bindings. It is required to move updates of the clang and libclang PyPI
packages to the LLVM monorepo. Versioning information is derived from
LLVM git tags (using hatch-vcs, which is based on setuptools_scm), so no
manual updates are needed to bump version numbers. The minimum python
version required is set to 3.10 due to cindex.py using PEP 604 union
type syntax (str | bytes | None).

The .git_archival.txt file is populated with version information needed
to get accurate version information if the bindings are installed from
an LLVM/clang source code archive. The .gitignore file is populated with
files that may get created as part of building/testing the sdist and
wheel that should not be committed to source control.

This is first step for addressing #125220, and moving publishing of the
clang and libclang PyPI packages into the LLVM monorepo.

Signed-off-by: Ryan Mast <mast.ryan at gmail.com>


 Commit: 1782d27e67b9cde01a3722a1380ae3558da64452
 https://github.com/llvm/llvm-project/commit/1782d27e67b9cde01a3722a1380ae3558da64452
 Author: ZhaoQi <zhaoqi01 at loongson.cn>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
 M llvm/lib/Target/LoongArch/LoongArchSelectionDAGInfo.cpp
 M llvm/lib/Target/LoongArch/LoongArchSelectionDAGInfo.h

 Log Message:
 -----------
 [LoongArch] Fix for `VLDREPL` node validation (#168993)


 Commit: 196f6de75a0fe6c66e58a9bbd90b30f7c4a69bde
 https://github.com/llvm/llvm-project/commit/196f6de75a0fe6c66e58a9bbd90b30f7c4a69bde
 Author: Mend Renovate <bot at renovateapp.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M .github/workflows/bazel-checks.yml
 M .github/workflows/build-ci-container-tooling.yml
 M .github/workflows/build-ci-container-windows.yml
 M .github/workflows/build-ci-container.yml
 M .github/workflows/build-metrics-container.yml
 M .github/workflows/check-ci.yml
 M .github/workflows/ci-post-commit-analyzer.yml
 M .github/workflows/commit-access-greeter.yml
 M .github/workflows/commit-access-review.yml
 M .github/workflows/docs.yml
 M .github/workflows/email-check.yaml
 M .github/workflows/gha-codeql.yml
 M .github/workflows/hlsl-test-all.yaml
 M .github/workflows/issue-release-workflow.yml
 M .github/workflows/issue-subscriber.yml
 M .github/workflows/issue-write.yml
 M .github/workflows/libc-fullbuild-tests.yml
 M .github/workflows/libc-overlay-tests.yml
 M .github/workflows/libclang-abi-tests.yml
 M .github/workflows/libclang-python-tests.yml
 M .github/workflows/libcxx-build-and-test.yaml
 M .github/workflows/libcxx-build-containers.yml
 M .github/workflows/libcxx-check-generated-files.yml
 M .github/workflows/libcxx-run-benchmarks.yml
 M .github/workflows/llvm-abi-tests.yml
 M .github/workflows/merged-prs.yml
 M .github/workflows/mlir-spirv-tests.yml
 M .github/workflows/new-prs.yml
 M .github/workflows/pr-code-format.yml
 M .github/workflows/pr-code-lint.yml
 M .github/workflows/pr-request-release-note.yml
 M .github/workflows/pr-subscriber.yml
 M .github/workflows/premerge.yaml
 M .github/workflows/release-asset-audit.yml
 M .github/workflows/release-binaries.yml
 M .github/workflows/release-documentation.yml
 M .github/workflows/release-doxygen.yml
 M .github/workflows/release-lit.yml
 M .github/workflows/release-sources.yml
 M .github/workflows/release-tasks.yml
 M .github/workflows/scorecard.yml
 M .github/workflows/spirv-tests.yml
 M .github/workflows/test-unprivileged-download-artifact.yml
 M .github/workflows/version-check.yml

 Log Message:
 -----------
 Update actions/checkout action to v6 (#169258)

This PR contains the following updates:

| Package | Type | Update | Change |
|---|---|---|---|
| [actions/checkout](https://redirect.github.com/actions/checkout) |
action | major | `v5.0.0` -> `v6.0.0` |


 Commit: 3db8ed05004d4a1f2fb7cb34813c5e44a2e6722a
 https://github.com/llvm/llvm-project/commit/3db8ed05004d4a1f2fb7cb34813c5e44a2e6722a
 Author: Matthias Springer <me at m-sp.org>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
 M mlir/lib/ExecutionEngine/APFloatWrappers.cpp
 M mlir/test/Conversion/ArithToApfloat/arith-to-apfloat.mlir
 M mlir/test/Integration/Dialect/Arith/CPU/test-apfloat-emulation.mlir

 Log Message:
 -----------
 [mlir][arith] Add support for `fptosi`, `fptoui` to `ArithToAPFloat` (#169277)

Add support for `arith.fptosi` and `arith.fptoui`.


 Commit: d7f630139023d3d13d38f0bc42536b67f1f5e38f
 https://github.com/llvm/llvm-project/commit/d7f630139023d3d13d38f0bc42536b67f1f5e38f
 Author: Hristo Hristov <hghristov.rmm at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M libcxx/include/string
 M libcxx/test/libcxx/diagnostics/string.nodiscard.verify.cpp

 Log Message:
 -----------
 [libc++][string] Applied `[[nodiscard]]` to non-member functions (#169330)

`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.
- https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant


 Commit: b63a1883c153245837933e646bdf6c2b4a7bb36b
 https://github.com/llvm/llvm-project/commit/b63a1883c153245837933e646bdf6c2b4a7bb36b
 Author: Craig Topper <craig.topper at sifive.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp

 Log Message:
 -----------
 [RISCV] Use a switch in VSETVLIInfo::print(). NFC (#169441)

This allows the compiler to verify we've covered all enum values.


 Commit: 8217c6415ab76c2a0f06705100c76207cd1e6bc0
 https://github.com/llvm/llvm-project/commit/8217c6415ab76c2a0f06705100c76207cd1e6bc0
 Author: Kewen Meng <Kewen.Meng at amd.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M llvm/include/llvm/MC/MCDwarf.h

 Log Message:
 -----------
 Revert "[MC] Use a variant to hold MCCFIInstruction state (NFC)" (#169442)

Reverts llvm/llvm-project#164720

Revert to unblock bots.
https://lab.llvm.org/buildbot/#/builders/140/builds/34645


 Commit: 6ec686735c850d05592b28783f8300c725a50d78
 https://github.com/llvm/llvm-project/commit/6ec686735c850d05592b28783f8300c725a50d78
 Author: Matthias Springer <me at m-sp.org>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
 M mlir/lib/ExecutionEngine/APFloatWrappers.cpp
 M mlir/test/Conversion/ArithToApfloat/arith-to-apfloat.mlir
 M mlir/test/Integration/Dialect/Arith/CPU/test-apfloat-emulation.mlir

 Log Message:
 -----------
 [mlir][arith] Add support for `sitofp`, `uitofp` to `ArithToAPFloat` (#169284)

Add support for `arith.sitofp` and `arith.uitofp`.


 Commit: 31d4150fd476f204d3f2a8e2d656a668158a70d8
 https://github.com/llvm/llvm-project/commit/31d4150fd476f204d3f2a8e2d656a668158a70d8
 Author: Alexander Richardson <alexrichardson at google.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 A llvm/test/TableGen/ValueTypeByHwModeMissingRegInfo.td
 M llvm/utils/TableGen/Common/CodeGenRegisters.cpp

 Log Message:
 -----------
 [TableGen] Change a reachable assert to a fatal error

I hit this when using a RegisterClass with a ValueTypeByHwMode that
was missing the RegInfos field. Add a test for this error.

Reviewed By: arsenm

Pull Request: https://github.com/llvm/llvm-project/pull/169439


 Commit: f0bb5cfda7c54f3fa0c1ef0bbe82e3405ed80110
 https://github.com/llvm/llvm-project/commit/f0bb5cfda7c54f3fa0c1ef0bbe82e3405ed80110
 Author: Erik Enikeev <evonatarius at gmail.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M llvm/lib/Target/Mips/MipsISelLowering.cpp
 M llvm/lib/Target/Mips/MipsISelLowering.h
 M llvm/lib/Target/Mips/MipsInstrFPU.td
 M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
 A llvm/test/CodeGen/Mips/fp-intrinsics.ll

 Log Message:
 -----------
 [Mips] Add instruction selection for strict FP (#168870)

This consists of marking the various strict opcodes as legal, and
adjusting instruction selection patterns so that 'op' is 'any_op'. The
changes are similar to those in D114946 for AArch64 and #160696 for ARM.
Only Mips32/64 FPU instructions are affected.

Added lowering for for STRICT_FP_TO_UINT and STRICT_FP_TO_SINT ops.


 Commit: c6f433e880a01a29325f4d7d2b98c84feecf2297
 https://github.com/llvm/llvm-project/commit/c6f433e880a01a29325f4d7d2b98c84feecf2297
 Author: Chandler Carruth <chandlerc at gmail.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M utils/bazel/llvm-project-overlay/libc/BUILD.bazel

 Log Message:
 -----------
 [bazel][libc] Remove target compatibility restrictions for float128 (#169292)

The restrictions here aren't nearly as much about the OS as the compiler
and architecture, but the Bazel restriction was OS-based. Everything
seems to work well on even Arm64 macOS, and I would expect most BSDs and
other OSes to work well with Clang's support on x86-64.

The source code here already handles detecting when there is compiler
support for the type. And the users of this don't `select` or do
anything else to conditionally include the header, so it seems better to
not restrict access to the header from the build system, and instead
continue making the source code compatible or a no-op on relevant
configurations.


 Commit: 26362c68579dd4375198aae4651b4d5f8a36c715
 https://github.com/llvm/llvm-project/commit/26362c68579dd4375198aae4651b4d5f8a36c715
 Author: Petr Penzin <ppenzin at tenstorrent.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M llvm/lib/Target/RISCV/RISCVProcessors.td

 Log Message:
 -----------
 [RISCV] Add segmented tunes to tt-ascalon-d8 (#168800)

Add TuneOptimizedNFnSegmentedLoadStore tune flags to tt-ascalon-d8
processor definition.


 Commit: b1111356e697a7f5c436846f97adf18a353766dc
 https://github.com/llvm/llvm-project/commit/b1111356e697a7f5c436846f97adf18a353766dc
 Author: Carl Ritson <carl.ritson at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir

 Log Message:
 -----------
 [AMDGPU] Pre-commit test for #169213 (NFC)


 Commit: 9626c90c335cca55c1a8094f2e802c4139c7173d
 https://github.com/llvm/llvm-project/commit/9626c90c335cca55c1a8094f2e802c4139c7173d
 Author: Keith Smiley <keithbsmiley at gmail.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M utils/bazel/MODULE.bazel
 M utils/bazel/MODULE.bazel.lock
 M utils/bazel/extensions.bzl
 M utils/bazel/llvm-project-overlay/lld/BUILD.bazel
 M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
 M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
 M utils/bazel/llvm-project-overlay/third-party/BUILD.bazel
 M utils/bazel/third_party_build/zlib-ng.BUILD

 Log Message:
 -----------
 [bazel] Use zlib-ng from the BCR (#169450)

This way if a downstream project also uses this, it is dedup'd


 Commit: 9c2d5e29947c0ccf5eaef2c11b4533a62bad1f67
 https://github.com/llvm/llvm-project/commit/9c2d5e29947c0ccf5eaef2c11b4533a62bad1f67
 Author: Erik Enikeev <evonatarius at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/Mips/MipsISelLowering.cpp
 M llvm/lib/Target/Mips/MipsISelLowering.h
 A llvm/test/CodeGen/Mips/fp-strict-fcmp.ll

 Log Message:
 -----------
 [Mips] Set custom lowering for STRICT_FSETCC/STRICT_FSETCCS ops. (#168303)


 Commit: 28fde68501032b292f91246c0e79872558d0e74b
 https://github.com/llvm/llvm-project/commit/28fde68501032b292f91246c0e79872558d0e74b
 Author: Pranav Bhandarkar <pranav.bhandarkar at amd.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M flang/lib/Semantics/check-omp-loop.cpp
 M flang/lib/Semantics/check-omp-structure.cpp
 A flang/test/Semantics/OpenMP/target-teams-nesting.f90

 Log Message:
 -----------
 [Flang] - Enhance testing for strictly-nested teams in target regions. (#168437)

This patch enhances the semantics test for checking that teams
directives are strictly nested inside target directives.

Fixes https://github.com/llvm/llvm-project/issues/153173


 Commit: 488ed96d665f47d5c31b811288ec1be1b3fa01bc
 https://github.com/llvm/llvm-project/commit/488ed96d665f47d5c31b811288ec1be1b3fa01bc
 Author: Lang Hames <lhames at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M orc-rt/unittests/SessionTest.cpp

 Log Message:
 -----------
 [orc-rt] Remove stray debugging output. NFCI. (#169451)


 Commit: c25e0d3e2942007919e5a7a0738bea86907bcdb4
 https://github.com/llvm/llvm-project/commit/c25e0d3e2942007919e5a7a0738bea86907bcdb4
 Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
 M llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-derived-ivs.ll
 M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
 M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
 M llvm/test/Transforms/LoopVectorize/single-early-exit-cond-poison.ll
 M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll

 Log Message:
 -----------
 [VPlan] Simplify x + 0 -> x (#169394)


 Commit: 675dc35d808d94011f52e650fe1e3218254b5041
 https://github.com/llvm/llvm-project/commit/675dc35d808d94011f52e650fe1e3218254b5041
 Author: Mend Renovate <bot at renovateapp.com>
 Date: 2025-11-24 (Mon, 24 Nov 2025)

 Changed paths:
 M .github/workflows/gha-codeql.yml
 M .github/workflows/libclang-abi-tests.yml
 M .github/workflows/llvm-abi-tests.yml
 M .github/workflows/scorecard.yml

 Log Message:
 -----------
 Update [Github] Update GHA Dependencies (#169257)

This PR contains the following updates:

| Package | Type | Update | Change | Pending |
|---|---|---|---|---|
| ghcr.io/llvm/ci-ubuntu-24.04-abi-tests | container | digest |
`f80125c` -> `9138b6a` | |
|
[github/codeql-action](https://redirect.github.com/github/codeql-action)
| action | patch | `v4.31.3` -> `v4.31.4` | `v4.31.5` |

---

> [!WARNING]
> Some dependencies could not be looked up. Check the Dependency
Dashboard for more information.

---

### Release Notes

<details>
<summary>github/codeql-action (github/codeql-action)</summary>

###
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[Compare
Source](https://redirect.github.com/github/codeql-action/compare/v4.31.3...v4.31.4)

##### CodeQL Action Changelog

See the [releases
page](https://redirect.github.com/github/codeql-action/releases) for the
relevant changes to the CodeQL CLI and language packs.

##### 4.31.4 - 18 Nov 2025

No user facing changes.

See the full
[CHANGELOG.md](https://redirect.github.com/github/codeql-action/blob/v4.31.4/CHANGELOG.md)
for more information.

</details>

---

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are satisfied.

♻ **Rebasing**: Whenever PR becomes conflicted, or you tick the
rebase/retry checkbox.

👻 **Immortal**: This PR will be recreated if closed unmerged. Get
[config
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that's undesired.

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---

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View the [repository job
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 Commit: 44a7d2f22aec6ac2019a3674e1390276c2ee7ca5
 https://github.com/llvm/llvm-project/commit/44a7d2f22aec6ac2019a3674e1390276c2ee7ca5
 Author: David Green <david.green at arm.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AArch64/AArch64InstrInfo.td
 M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
 M llvm/test/CodeGen/AArch64/combine-sdiv.ll
 M llvm/test/CodeGen/AArch64/rem-by-const.ll
 M llvm/test/CodeGen/AArch64/srem-lkk.ll

 Log Message:
 -----------
 [AArch64] Add patterns for add(x, trunc(shift)) (#168927)

This can be lowered to a 64bit add where we only use the bottom 32bits
of the result. It is conceptually the same as
https://alive2.llvm.org/ce/z/Xfz3Rf, but with the sext replaced by an
anyext.


 Commit: 1d64fd5d42671d15ed8cd0fc31f71a4ad1e791b6
 https://github.com/llvm/llvm-project/commit/1d64fd5d42671d15ed8cd0fc31f71a4ad1e791b6
 Author: David Green <david.green at arm.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/include/clang/Basic/arm_mve_defs.td
 M clang/test/CodeGen/arm-mve-intrinsics/vaddq.c
 M clang/test/CodeGen/arm-mve-intrinsics/vmulq.c
 M clang/test/CodeGen/arm-mve-intrinsics/vsubq.c
 M clang/utils/TableGen/MveEmitter.cpp
 M llvm/include/llvm/IR/IntrinsicsARM.td
 M llvm/lib/Target/ARM/ARMInstrMVE.td
 A llvm/test/CodeGen/Thumb2/mve-intrinsics/strict-intrinsics.ll
 M llvm/test/CodeGen/Thumb2/mve-intrinsics/vabdq.ll
 M llvm/test/CodeGen/Thumb2/mve-pred-ext.ll

 Log Message:
 -----------
 [ARM] Introduce intrinsics for MVE add/sub/mul under strict-fp. (#169156)

As far as I understand, the MVE fp vadd/vsub/vmul instructions will set
exception flags in the same ways as scalar fadd/fsub/fmul, but will not
honor flush-to-zero (for f32 they always flush, for f16 they follows the
fpsrc flags) and will always use the default rounding mode.

This means that we cannot convert the vadd_f23/vsub_f32/vmul_f32
intrinsics to llvm.constrained.fadd/fsub/fmul and then vadd/vsub/vmul
without changing the expected behaviour under strict-fp. This patch
introduces a set in intrinsics that we can use instead, going from
vadd_f32 -> llvm.arm.mve.vadd -> MVE_VADD.

The current implementations assumes that the standard variant of a
strictfp alternative will be a IRBuilder, this can be changed to take a
IRBuilder or IRInt.


 Commit: 30c49a40222a8e2f90565370ab20253c1e426383
 https://github.com/llvm/llvm-project/commit/30c49a40222a8e2f90565370ab20253c1e426383
 Author: Men-cotton <mencotton0410 at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
 A mlir/test/Target/LLVMIR/anonymous-tbaa.mlir

 Log Message:
 -----------
 [mlir][LLVMIR] Handle anonymous TBAA roots during metadata emission (#169167)

This commit enhances MLIR's TBAA export with support for anonymous TBAA roots. The import for this was around for a bit but the export was missing.

Fixes: #160721


 Commit: 5490bcf4aa3c028e5c2cdbcd0d906e5a876d23bc
 https://github.com/llvm/llvm-project/commit/5490bcf4aa3c028e5c2cdbcd0d906e5a876d23bc
 Author: Maksim Panchenko <maks at fb.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M bolt/lib/Rewrite/RewriteInstance.cpp

 Log Message:
 -----------
 [BOLT] Add missing new line. NFC


 Commit: f817a1b0394b7f722b4bb13e9aeead5e177ff6d7
 https://github.com/llvm/llvm-project/commit/f817a1b0394b7f722b4bb13e9aeead5e177ff6d7
 Author: Longsheng Mou <longshengmou at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M flang/lib/Optimizer/Builder/Runtime/Reduction.cpp
 M lldb/include/lldb/API/SBStructuredData.h
 M mlir/include/mlir/Analysis/DataFlow/IntegerRangeAnalysis.h
 M mlir/lib/Target/LLVMIR/ModuleImport.cpp

 Log Message:
 -----------
 [NFC] Fix typo of `integer` (#169325)


 Commit: a39af125dba2c07f100236d210b6a948b7316acb
 https://github.com/llvm/llvm-project/commit/a39af125dba2c07f100236d210b6a948b7316acb
 Author: Dharuni R Acharya <125176188+DharuniRAcharya at users.noreply.github.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
 M llvm/lib/IR/CMakeLists.txt
 A llvm/lib/IR/NVVMIntrinsicUtils.cpp

 Log Message:
 -----------
 [NVVM] Move pretty-print functions from NVVMIntrinsicUtils.h to cpp file (#168997)

This patch moves the print functions from `NVVMIntrinsicUtils.h` to
`NVVMIntrinsicUtils.cpp`, a file created in the `llvm/lib/IR` directory.

Signed-off-by: Dharuni R Acharya <dharunira at nvidia.com>


 Commit: 6193f2aeda1d5ca30cf990e28956824eefdc97f1
 https://github.com/llvm/llvm-project/commit/6193f2aeda1d5ca30cf990e28956824eefdc97f1
 Author: Tomer Shafir <tomer.shafir8 at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AArch64/AArch64ExpandImm.cpp

 Log Message:
 -----------
 [AArch64] Assert `expandMOVImm` prioritizes optimal single MOVZ/N (#169341)

The expansion of move immediate in `expandMOVImm` follows the priority
of the `MOV` alias. In addition, the selection there properly prefers
expansion based on perf optimality order. This change adds a simple
assert that `expandMOVImmSimple` expands a single optimal MOVZ/MOVK.


 Commit: ed95c4d6ecf0a8e842cb9d91c09d9679c1f3bf79
 https://github.com/llvm/llvm-project/commit/ed95c4d6ecf0a8e842cb9d91c09d9679c1f3bf79
 Author: Gergely Bálint <gergely.balint at arm.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M bolt/include/bolt/Core/MCPlusBuilder.h
 M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
 M bolt/unittests/Core/MCPlusBuilder.cpp
 M llvm/lib/Target/AArch64/AArch64BranchTargets.cpp
 M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h

 Log Message:
 -----------
 [BOLT][BTI] Add MCPlusBuilder::createBTI (#167305)

- creates a BTI j|c landing pad MCInst.
- create getBTIHintNum utility in AArch64/Utils, to make sure BOLT
 generates BTI immediates the same way as LLVM.
- add MCPlusBuilder unittests to cover new function.


 Commit: 2ce363d25226c2d502d19917ca8502115c953599
 https://github.com/llvm/llvm-project/commit/2ce363d25226c2d502d19917ca8502115c953599
 Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/utils/gn/secondary/llvm/lib/IR/BUILD.gn

 Log Message:
 -----------
 [gn build] Port a39af125dba2


 Commit: eb568d6d0ce1a2b0f26f47e20b0051842a3f9746
 https://github.com/llvm/llvm-project/commit/eb568d6d0ce1a2b0f26f47e20b0051842a3f9746
 Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
 M llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
 M llvm/test/CodeGen/AArch64/sme-zt0-state.ll

 Log Message:
 -----------
 [AArch64][SME] Handle zeroing ZA and ZT0 in functions with ZT0 state (#166361)

In the MachineSMEABIPass, if we have a function with ZT0 state, then
there are some additional cases where we need to zero ZA and ZT0.

If the function has a private ZA interface, i.e., new ZT0 (and new ZA if
present). Then ZT0/ZA must be zeroed when committing the incoming ZA
save.

If the function has a shared ZA interface, e.g. new ZA and shared ZT0.
Then ZA must be zeroed on function entry (without a ZA save commit).

The logic in the ABI pass has been reworked to use an "ENTRY" state to
handle this (rather than the more specific "CALLER_DORMANT" state).


 Commit: a086fb2fbbc0f488dd2a2c60d09196ea7218742f
 https://github.com/llvm/llvm-project/commit/a086fb2fbbc0f488dd2a2c60d09196ea7218742f
 Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AMDGPU/GCNSubtarget.h
 M llvm/lib/Target/AMDGPU/SIInstrInfo.h
 M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
 M llvm/test/CodeGen/AMDGPU/bf16.ll
 M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
 A llvm/test/CodeGen/AMDGPU/memory-legalizer-buffer-atomics.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-lastuse.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-lastuse.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-lastuse.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
 M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
 M llvm/test/CodeGen/AMDGPU/spillv16.ll
 M llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.mir

 Log Message:
 -----------
 [AMDGPU][gfx1250] Add wait_xcnt before any access that cannot be repeated (#168852)

The xcnt wait is actually required before any memory access that can
only be done once, so atomic stores and volatile accesses are affected.
This patch also ensures buffer instructions are handled.


 Commit: cf5234bac45567e2431b9e668999d4f6d65b7ac8
 https://github.com/llvm/llvm-project/commit/cf5234bac45567e2431b9e668999d4f6d65b7ac8
 Author: Jie Fu <jiefu at tencent.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AArch64/MachineSMEABIPass.cpp

 Log Message:
 -----------
 [AArch64] Silence a warning (NFC)

/llvm-project/llvm/lib/Target/AArch64/MachineSMEABIPass.cpp:952:12:
 error: unused variable 'SMEFnAttrs' [-Werror,-Wunused-variable]
 SMEAttrs SMEFnAttrs = AFI->getSMEFnAttrs();
 ^
1 error generated.


 Commit: a11e7347fb9618b981cde12f494f58d55b509e2c
 https://github.com/llvm/llvm-project/commit/a11e7347fb9618b981cde12f494f58d55b509e2c
 Author: Cullen Rhodes <cullen.rhodes at arm.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M .gitignore

 Log Message:
 -----------
 [llvm][nfc] Ignore OpenAI Codex artifacts (#162481)

Follow-up to #153853 to also ignore Codex artifacts [1]. AGENTS.md may
be at the root or in sub-directories, so unlike other Markdown config
files I've not prefixed it with '/'.

[1] https://github.com/openai/codex/blob/main/docs/getting-started.md#memory-with-agentsmd


 Commit: 86fbaef99a53c5a0d3d5b96011797215296ec478
 https://github.com/llvm/llvm-project/commit/86fbaef99a53c5a0d3d5b96011797215296ec478
 Author: Michael Kruse <llvm-project at meinersbur.de>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/include/clang/Driver/ToolChain.h
 M clang/include/clang/Options/Options.td
 M clang/lib/Driver/Driver.cpp
 M clang/lib/Driver/ToolChain.cpp
 M clang/lib/Driver/ToolChains/Flang.cpp
 A cmake/Modules/GetToolchainDirs.cmake
 M flang-rt/CMakeLists.txt
 M flang-rt/cmake/modules/AddFlangRT.cmake
 M flang-rt/cmake/modules/AddFlangRTOffload.cmake
 A flang-rt/cmake/modules/FlangRTIntrospection.cmake
 R flang-rt/cmake/modules/GetToolchainDirs.cmake
 M flang-rt/lib/runtime/CMakeLists.txt
 A flang-rt/lib/runtime/__cuda_builtins.f90
 A flang-rt/lib/runtime/__cuda_device.f90
 A flang-rt/lib/runtime/__fortran_builtins.f90
 A flang-rt/lib/runtime/__fortran_ieee_exceptions.f90
 A flang-rt/lib/runtime/__fortran_type_info.f90
 A flang-rt/lib/runtime/__ppc_intrinsics.f90
 A flang-rt/lib/runtime/__ppc_types.f90
 A flang-rt/lib/runtime/cooperative_groups.f90
 A flang-rt/lib/runtime/cudadevice.f90
 A flang-rt/lib/runtime/ieee_arithmetic.f90
 A flang-rt/lib/runtime/ieee_exceptions.f90
 A flang-rt/lib/runtime/ieee_features.f90
 A flang-rt/lib/runtime/iso_c_binding.f90
 A flang-rt/lib/runtime/iso_fortran_env.f90
 A flang-rt/lib/runtime/iso_fortran_env_impl.f90
 A flang-rt/lib/runtime/mma.f90
 M flang-rt/test/lit.site.cfg.py.in
 M flang-rt/unittests/CMakeLists.txt
 M flang/CMakeLists.txt
 M flang/include/flang/Frontend/CompilerInvocation.h
 M flang/lib/Frontend/CompilerInvocation.cpp
 M flang/lib/Semantics/semantics.cpp
 R flang/module/.clang-format
 R flang/module/__cuda_builtins.f90
 R flang/module/__cuda_device.f90
 R flang/module/__fortran_builtins.f90
 R flang/module/__fortran_ieee_exceptions.f90
 R flang/module/__fortran_type_info.f90
 R flang/module/__ppc_intrinsics.f90
 R flang/module/__ppc_types.f90
 R flang/module/cooperative_groups.f90
 R flang/module/cudadevice.f90
 R flang/module/ieee_arithmetic.f90
 R flang/module/ieee_exceptions.f90
 R flang/module/ieee_features.f90
 R flang/module/iso_c_binding.f90
 R flang/module/iso_fortran_env.f90
 R flang/module/iso_fortran_env_impl.f90
 R flang/module/mma.f90
 M flang/test/CMakeLists.txt
 M flang/test/Driver/Inputs/ieee_arithmetic.mod
 M flang/test/Driver/Inputs/iso_fortran_env.mod
 A flang/test/Driver/intrinsic-module-path.F90
 R flang/test/Driver/intrinsic-module-path.f90
 M flang/test/Driver/lto-fatlto.f90
 M flang/test/Driver/pp-fixed-form.f90
 M flang/test/Lower/HLFIR/type-bound-call-mismatch.f90
 M flang/test/Lower/OpenMP/simd_aarch64.f90
 M flang/test/Lower/OpenMP/target-enter-data-default-openmp52.f90
 M flang/test/Preprocessing/fixed-free.f
 M flang/test/Preprocessing/no-pp-if.f90
 M flang/test/Semantics/bug163242.f90
 M flang/test/Semantics/bug164303.f90
 M flang/test/lit.cfg.py
 M flang/test/lit.site.cfg.py.in
 M flang/tools/CMakeLists.txt
 M flang/tools/bbc/bbc.cpp
 R flang/tools/f18/CMakeLists.txt
 R flang/tools/f18/dump.cpp
 M llvm/runtimes/CMakeLists.txt
 M openmp/CMakeLists.txt
 M openmp/runtime/CMakeLists.txt
 R openmp/runtime/cmake/LibompCheckFortranFlag.cmake
 M openmp/runtime/cmake/LibompHandleFlags.cmake
 M openmp/runtime/cmake/config-ix.cmake
 M openmp/runtime/src/CMakeLists.txt
 M openmp/runtime/test/lit.cfg
 M openmp/runtime/test/lit.site.cfg.in
 M runtimes/CMakeLists.txt

 Log Message:
 -----------
 [Flang] Move builtin .mod generation into runtimes (#137828)

Move building the .mod files from openmp/flang to openmp/flang-rt using
a shared mechanism. Motivations to do so are:

1. Most modules are target-dependent and need to be re-compiled for each
target separately, which is something the LLVM_ENABLE_RUNTIMES system
already does. Prime example is `iso_c_binding.mod` which encodes the
target's ABI. Most other modules have `#ifdef`-enclosed code as well.

2. CMake has support for Fortran that we should use. Among other things,
it automatically determines module dependencies so there is no need to
hardcode them in the CMakeLists.txt.

3. It allows using Fortran itself to implement Flang-RT. Currently, only
`iso_fortran_env_impl.f90` emits object files that are needed by Fortran
applications (#89403). The workaround of #95388 could be reverted.


Some new dependencies come into play:
* openmp depends on flang-rt for building `lib_omp.mod` and
`lib_omp_kinds.mod`. Currently, if flang-rt is not found then the
modules are not built.
* check-flang depends on flang-rt: If not found, the majority of tests
are disabled. If not building in a bootstrpping build, the location of
the module files can be pointed to using
`-DFLANG_INTRINSIC_MODULES_DIR=<path>`, e.g. in a flang-standalone
build. Alternatively, the test needing any of the intrinsic modules
could be marked with `REQUIRES: flangrt-modules`.
* check-flang depends on openmp: Not a change; tests requiring
`lib_omp.mod` and `lib_omp_kinds.mod` those are already marked with
`openmp_runtime`.

As intrinsic are now specific to the target, their location is moved
from `include/flang` to `<resource-dir>/finclude/flang/<triple>`. The
mechnism to compute the location have been moved from flang-rt
(previously used to compute the location of `libflang_rt.*.a`) to common
locations in `cmake/GetToolchainDirs.cmake` and
`runtimes/CMakeLists.txt` so they can be used by both, openmp and
flang-rt. Potentially the mechnism could also be shared by other
libraries such as compiler-rt.

`finclude` was chosen because `gfortran` uses it as well and avoids
misuse such as `#include <flang/iso_c_binding.mod>`. The search location
is now determined by `ToolChain` in the driver, instead of by the
frontend. Now the driver adds `-fintrinsic-module-path` for that
location to the frontend call (Just like gfortran does).
`-fintrinsic-module-path` had to be fixed for this because ironically it
was only added to `searchDirectories`, but not
`intrinsicModuleDirectories_`. Since the driver determines the location,
tests invoking `flang -fc1` and `bbc` must also be passed the location
by llvm-lit. This works like llvm-lit does for finding the include dirs
for Clang using `-print-file-name=...`.


 Commit: f287abd53e03bf0fda9099c0845b25a340a20102
 https://github.com/llvm/llvm-project/commit/f287abd53e03bf0fda9099c0845b25a340a20102
 Author: Simon Pilgrim <llvm-dev at redking.me.uk>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/include/llvm/CodeGen/ValueTypes.td
 M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
 M llvm/lib/Target/X86/X86ISelLowering.cpp
 M llvm/test/CodeGen/X86/bitcnt-big-integer.ll
 M llvm/test/TableGen/CPtrWildcard.td

 Log Message:
 -----------
 [DAG][X86] Improve custom i256/i512 AVX512 CTLZ/CTTZ Handling with MVT::i256/i512 (#168860)

This patch proposes to move the AVX512 CTLZ/CTTZ i256/i512 codegen to
ReplaceNodeResults to allow them to be declared as custom lowering -
this allows expansion of larger int types (e.g. i1024) to fallback to
them during their expansion.

However to declare these i256/i512 ops as custom, we need to add
MVT::i256/i512 simple types - I'm intending to add further large integer
handling in the future, some of which will use vector register
instructions, and its going to be much easier if this can be handled
with i128/i256/i512 types that match the vector register sizes.

This exposed a regression in NVPTX due to their use of EVT::isSimple()
to match their upper integer size bounds.


 Commit: 5e7631e14ae334a708b6fc52991a12ab3bb95633
 https://github.com/llvm/llvm-project/commit/5e7631e14ae334a708b6fc52991a12ab3bb95633
 Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
 M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
 M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
 M llvm/test/CodeGen/LoongArch/lasx/and-not-combine.ll
 M llvm/test/CodeGen/LoongArch/lsx/and-not-combine.ll

 Log Message:
 -----------
 [LoongArch][DAGCombiner] Combine vand (vnot ..) to vandn (#161037)

After this commit, DAGCombiner will have more opportunities to perform
vector folding. This patch includes several foldings, as follows:
- VANDN(x,NOT(y)) -> AND(NOT(x),NOT(y)) -> NOT(OR(X,Y))
- VANDN(x, SplatVector(Imm)) -> AND(NOT(x), NOT(SplatVector(~Imm)))


 Commit: cb63e99e58cbbb687575f2ab3139f9ba7b6e95bf
 https://github.com/llvm/llvm-project/commit/cb63e99e58cbbb687575f2ab3139f9ba7b6e95bf
 Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
 M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-vplan.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/synthesize-mask-for-call.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/widen-call-with-intrinsic-or-libfunc.ll
 M llvm/test/Transforms/LoopVectorize/ARM/mve-icmpcost.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-fixed-order-recurrence.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics.ll
 M llvm/test/Transforms/LoopVectorize/X86/CostModel/vpinstruction-cost.ll
 M llvm/test/Transforms/LoopVectorize/X86/reduction-small-size.ll
 M llvm/test/Transforms/LoopVectorize/X86/vplan-vp-intrinsics.ll
 M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
 M llvm/test/Transforms/LoopVectorize/uncountable-early-exit-vplan.ll
 M llvm/test/Transforms/LoopVectorize/vplan-dot-printing.ll
 M llvm/test/Transforms/LoopVectorize/vplan-iv-transforms.ll
 M llvm/test/Transforms/LoopVectorize/vplan-printing-reductions.ll
 M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
 M llvm/test/Transforms/LoopVectorize/vplan-widen-struct-return.ll

 Log Message:
 -----------
 [VPlan] Include flags in VectorPointerRecipe::printRecipe (#169466)

The change is non-functional with respect to emitted IR.


 Commit: 4b137e7446718973e209eb97402d9d06f90b8b0d
 https://github.com/llvm/llvm-project/commit/4b137e7446718973e209eb97402d9d06f90b8b0d
 Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp

 Log Message:
 -----------
 [lldb][NFC] Remove code dupl in favour of a named variable in UnwindAssemblyInstEmulation (#169369)


 Commit: bc4143b27afaeee1fcf3e8f0024774f3adc1eef9
 https://github.com/llvm/llvm-project/commit/bc4143b27afaeee1fcf3e8f0024774f3adc1eef9
 Author: Ravil Dorozhinskii <ravil.aviva.com at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/include/llvm/CodeGen/SDPatternMatch.h
 M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp

 Log Message:
 -----------
 [DAG] SDPatternMatch - add m_SpecificFP matcher (#167438)

This patch introduces SpecificFP matcher for SelectionDAG nodes.

This includes:

Adding SpecificFP_match() in SDPatternMatch.h.
Adding test coverage in SelectionDAGPatternMatchTest.cpp.

Closes #165566


 Commit: e1b08731e5d81a0483a91da5eb89b1087876b9c2
 https://github.com/llvm/llvm-project/commit/e1b08731e5d81a0483a91da5eb89b1087876b9c2
 Author: Sander de Smalen <sander.desmalen at arm.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/CodeGen/RegisterCoalescer.cpp
 M llvm/lib/CodeGen/SplitKit.cpp
 M llvm/test/CodeGen/AArch64/GlobalISel/arm64-pcsections.ll
 M llvm/test/CodeGen/AArch64/implicit-def-subreg-to-reg-regression.ll
 R llvm/test/CodeGen/AArch64/pr151592.mir
 R llvm/test/CodeGen/AArch64/pr151888.mir
 R llvm/test/CodeGen/AArch64/pr164181-reduced.ll
 M llvm/test/CodeGen/AArch64/preserve_nonecc_varargs_darwin.ll
 R llvm/test/CodeGen/AArch64/register-coalesce-implicit-def-subreg-to-reg.mir
 M llvm/test/CodeGen/AArch64/register-coalesce-update-subranges-remat.mir
 M llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
 M llvm/test/CodeGen/LoongArch/lasx/fpowi.ll
 M llvm/test/CodeGen/LoongArch/lasx/scalar-to-vector.ll
 M llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
 M llvm/test/CodeGen/PowerPC/build-vector-tests.ll
 M llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
 M llvm/test/CodeGen/PowerPC/combine-fneg.ll
 M llvm/test/CodeGen/PowerPC/fp-strict-round.ll
 M llvm/test/CodeGen/PowerPC/frem.ll
 M llvm/test/CodeGen/PowerPC/froundeven-legalization.ll
 M llvm/test/CodeGen/PowerPC/half.ll
 M llvm/test/CodeGen/PowerPC/ldexp.ll
 M llvm/test/CodeGen/PowerPC/llvm.modf.ll
 M llvm/test/CodeGen/PowerPC/vec_insert_elt.ll
 M llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
 R llvm/test/CodeGen/X86/coalescer-breaks-subreg-to-reg-liveness.ll
 M llvm/test/CodeGen/X86/coalescer-implicit-def-regression-imp-operand-assert.mir
 R llvm/test/CodeGen/X86/coalescing-subreg-to-reg-requires-subrange-update.mir
 R llvm/test/CodeGen/X86/pr76416.ll
 M llvm/test/CodeGen/X86/subreg-fail.mir
 R llvm/test/CodeGen/X86/subreg-to-reg-coalescing.mir

 Log Message:
 -----------
 Revert "Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG""

This reverts commit bb78728826ff57f3df859e79bfd857b5a175bb6d.


 Commit: 51dd3ec13c51b0e399cbceafb84698b7241ed731
 https://github.com/llvm/llvm-project/commit/51dd3ec13c51b0e399cbceafb84698b7241ed731
 Author: Aiden Grossman <aidengrossman at google.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp

 Log Message:
 -----------
 [MLIR][OpenMP] Bail early in sortMapIndices if indices are the same (#169474)

If we are given the same index in the comparator callback, simply return
false. Otherwise we will end up adding invalid items to
occludedChildren, causing extra items to get removed that should not be,
resulting in failures that manifest in different forms (assertions, asan
failures, ubsan failures, etc.).


 Commit: 68c2a8140f7b8a487b7a9d9a53c6568b7336ee62
 https://github.com/llvm/llvm-project/commit/68c2a8140f7b8a487b7a9d9a53c6568b7336ee62
 Author: Nikolas Klauser <nikolasklauser at berlin.de>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M libcxx/test/extensions/libcxx/odr_signature.exceptions.sh.cpp
 M libcxx/test/extensions/libcxx/odr_signature.hardening.sh.cpp

 Log Message:
 -----------
 [libc++][C++03] Fix ODR tests (#169349)

We don't really need to include `<__config>`. We just need to include a
public C++ header.


 Commit: 105900ced185558633e2ca8aa812c8c6c39ef59b
 https://github.com/llvm/llvm-project/commit/105900ced185558633e2ca8aa812c8c6c39ef59b
 Author: Nikolas Klauser <nikolasklauser at berlin.de>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M libcxx/include/__config
 M libcxx/include/__configuration/platform.h
 M libcxx/include/__random/binomial_distribution.h
 M libcxx/src/filesystem/operations.cpp

 Log Message:
 -----------
 [libc++] Always define _LIBCPP_GLIBC_PREREQ (#169405)

Always defining the macro allows us to simplify the few places where
it's used.


 Commit: d748c81218bee39dafb9cc0c00ed7831a3ed44c3
 https://github.com/llvm/llvm-project/commit/d748c81218bee39dafb9cc0c00ed7831a3ed44c3
 Author: Jay Foad <jay.foad at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.cpp
 M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
 M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
 M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
 M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
 M llvm/test/CodeGen/AMDGPU/GlobalISel/add.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr-new-regbank-select.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.powi.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/load-zero-and-sign-extending-uniform-in-vgpr.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.ll
 M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.ll
 M llvm/test/CodeGen/AMDGPU/add_i1.ll
 M llvm/test/CodeGen/AMDGPU/amdgcn-call-whole-wave.ll
 M llvm/test/CodeGen/AMDGPU/amdgcn-cs-chain-intrinsic-dyn-vgpr-w32.ll
 M llvm/test/CodeGen/AMDGPU/amdgpu-branch-weight-metadata.ll
 M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-fp-nosave.ll
 M llvm/test/CodeGen/AMDGPU/atomic-optimizer-strict-wqm.ll
 M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
 M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
 M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
 M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
 M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
 M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
 M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
 M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior2.ll
 M llvm/test/CodeGen/AMDGPU/bf16.ll
 M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
 M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
 M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
 M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
 M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
 M llvm/test/CodeGen/AMDGPU/cc-entry.ll
 M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
 M llvm/test/CodeGen/AMDGPU/code-size-estimate.ll
 M llvm/test/CodeGen/AMDGPU/cse-convergent.ll
 M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
 M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
 M llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
 M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
 M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
 M llvm/test/CodeGen/AMDGPU/fdiv.ll
 M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-wwm.ll
 M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
 M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
 M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
 M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
 M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
 M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
 M llvm/test/CodeGen/AMDGPU/fma.f16.ll
 M llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
 M llvm/test/CodeGen/AMDGPU/fmaximum.ll
 M llvm/test/CodeGen/AMDGPU/fmaximum3.ll
 M llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
 M llvm/test/CodeGen/AMDGPU/fminimum.ll
 M llvm/test/CodeGen/AMDGPU/fminimum3.ll
 M llvm/test/CodeGen/AMDGPU/fneg-combines.f16.ll
 M llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
 M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
 M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
 M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
 M llvm/test/CodeGen/AMDGPU/fpow.ll
 M llvm/test/CodeGen/AMDGPU/fract-match.ll
 M llvm/test/CodeGen/AMDGPU/freeze-binary.ll
 M llvm/test/CodeGen/AMDGPU/frem.ll
 M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
 M llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
 M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
 M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
 M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
 M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
 M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
 M llvm/test/CodeGen/AMDGPU/global-saddr-atomics-min-max-system.ll
 M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
 M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
 M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
 M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
 M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
 M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
 M llvm/test/CodeGen/AMDGPU/hazards-gfx1250.mir
 M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
 M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
 M llvm/test/CodeGen/AMDGPU/idot2.ll
 M llvm/test/CodeGen/AMDGPU/idot4s.ll
 M llvm/test/CodeGen/AMDGPU/idot4u.ll
 M llvm/test/CodeGen/AMDGPU/idot8s.ll
 M llvm/test/CodeGen/AMDGPU/idot8u.ll
 M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
 M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
 M llvm/test/CodeGen/AMDGPU/lds-direct-hazards-gfx11.mir
 M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dead.ll
 M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll
 M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
 M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
 M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
 M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll
 M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
 M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ptr.ll
 M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.v2bf16.ll
 M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
 M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
 M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.signal.isfirst.ll
 M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.v3f16.ll
 M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16.ll
 M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_nortn.ll
 M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_rtn.ll
 M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f32.ll
 M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f32.ll
 M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.v3f16.ll
 M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.id.ll
 M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
 M llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll
 M llvm/test/CodeGen/AMDGPU/llvm.exp2.bf16.ll
 M llvm/test/CodeGen/AMDGPU/llvm.log.ll
 M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
 M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
 M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
 M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
 M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
 M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
 M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
 M llvm/test/CodeGen/AMDGPU/llvm.powi.ll
 M llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll
 M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
 M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
 M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
 M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
 M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
 M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
 M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
 M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
 M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
 M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
 M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll
 M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
 M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
 M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics.ll
 M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
 M llvm/test/CodeGen/AMDGPU/madak.ll
 M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
 M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
 M llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-lastuse.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-lastuse.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-cluster.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-lastuse.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-singlethread.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-wavefront.ll
 M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-workgroup.ll
 M llvm/test/CodeGen/AMDGPU/merge-consecutive-wait-alus.mir
 M llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll
 M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
 M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
 M llvm/test/CodeGen/AMDGPU/no-folding-imm-to-inst-with-fi.ll
 M llvm/test/CodeGen/AMDGPU/nor-divergent-lanemask.ll
 M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
 M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
 M llvm/test/CodeGen/AMDGPU/partial-forwarding-hazards.mir
 M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
 M llvm/test/CodeGen/AMDGPU/ptradd-sdag.ll
 M llvm/test/CodeGen/AMDGPU/repeated-divisor.ll
 M llvm/test/CodeGen/AMDGPU/s-barrier.ll
 M llvm/test/CodeGen/AMDGPU/s-getpc-b64-remat.ll
 M llvm/test/CodeGen/AMDGPU/select-flags-to-fmin-fmax.ll
 M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
 M llvm/test/CodeGen/AMDGPU/should-not-hoist-set-inactive.ll
 M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
 M llvm/test/CodeGen/AMDGPU/spill-vgpr-block.ll
 M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
 M llvm/test/CodeGen/AMDGPU/sub.ll
 M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
 M llvm/test/CodeGen/AMDGPU/sub_i1.ll
 M llvm/test/CodeGen/AMDGPU/trans-forwarding-hazards.mir
 M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
 M llvm/test/CodeGen/AMDGPU/v_swap_b16.ll
 M llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard-true16.mir
 M llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir
 M llvm/test/CodeGen/AMDGPU/valu-read-sgpr-hazard-attrs.mir
 M llvm/test/CodeGen/AMDGPU/valu-read-sgpr-hazard.mir
 M llvm/test/CodeGen/AMDGPU/vcmpx-exec-war-hazard.mir
 M llvm/test/CodeGen/AMDGPU/vector-reduce-add.ll
 M llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
 M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
 M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
 M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
 M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
 M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
 M llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
 M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
 M llvm/test/CodeGen/AMDGPU/vmem-to-salu-hazard.mir
 M llvm/test/CodeGen/AMDGPU/wave32.ll
 M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
 M llvm/test/CodeGen/AMDGPU/workitem-intrinsic-opts.ll

 Log Message:
 -----------
 [AMDGPU] Change the immediate operand of s_waitcnt_depctr / s_wait_alu (#169378)

The 16-bit immediate operand of s_waitcnt_depctr / s_wait_alu has some
unused bits. Previously codegen would set these bits to 1, but setting
them to 0 matches the SP3 assembler behaviour better, which in turn
means that we can print them using the human readable SP3 syntax:

s_wait_alu 0xfffd ; unused bits set to 1
s_wait_alu 0xff9d ; unused bits set to 0
s_wait_alu depctr_va_vcc(0) ; unused bits set to 0, human readable

Note that the set of unused bits changed between GFX10.1 and GFX10.3.


 Commit: 17b19c50349053ed7721357f806233d633696bf0
 https://github.com/llvm/llvm-project/commit/17b19c50349053ed7721357f806233d633696bf0
 Author: Balázs Benics <benicsbalazs at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/lib/StaticAnalyzer/Core/LoopUnrolling.cpp
 M clang/test/Analysis/loop-unrolling.cpp

 Log Message:
 -----------
 [analyzer] Unroll loops of compile-time upper-bounded loops (#169400)

Previously, only literal upper-bounded loops were recognized. This patch
relaxes this matching to accept any compile-time deducible constant
expression.

It would be better to rely on the SVals (values from the symbolic
domain), as those could potentially have more accurate answers, but this
one is much simpler.
Note that at the time we calculate this value, we have not evaluated the
sub-exprs of the condition, consequently, we can't just query the
Environment for the folded SVal.
Because of this, the next best tool in our toolbox is comp-time
evaluating the Expr.

rdar://165363923


 Commit: 4e37526fdb37bb6e778a5445b05cb1be539fbda7
 https://github.com/llvm/llvm-project/commit/4e37526fdb37bb6e778a5445b05cb1be539fbda7
 Author: Jay Foad <jay.foad at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir

 Log Message:
 -----------
 [AMDGPU] Fix test after #169378


 Commit: af3af8ea5a4a0102bfd3998d1898eef6d735b2e4
 https://github.com/llvm/llvm-project/commit/af3af8ea5a4a0102bfd3998d1898eef6d735b2e4
 Author: Simon Pilgrim <llvm-dev at redking.me.uk>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/test/CodeGen/X86/setcc-wide-types.ll

 Log Message:
 -----------
 [X86] setcc-wide-types.ll - cleanup check prefixes NFC (#169488)

Match typical prefixes used in x86 SSE/AVX tests


 Commit: e06c148af7ed118ef2ff0774c8ad00838638bb2a
 https://github.com/llvm/llvm-project/commit/e06c148af7ed118ef2ff0774c8ad00838638bb2a
 Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Analysis/IVDescriptors.cpp

 Log Message:
 -----------
 [IVDesc] Use SCEVPatternMatch to improve code (NFC) (#168397)


 Commit: 07ad928d92eac995e8d2fc48b0aafde511e9f3a0
 https://github.com/llvm/llvm-project/commit/07ad928d92eac995e8d2fc48b0aafde511e9f3a0
 Author: Nikolas Klauser <nikolasklauser at berlin.de>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M libcxx/include/CMakeLists.txt
 M libcxx/include/__algorithm/fill_n.h
 A libcxx/include/__algorithm/specialized_algorithms.h
 M libcxx/include/__bit_reference
 M libcxx/include/module.modulemap.in

 Log Message:
 -----------
 [libc++] Introduce __specialized_algorithms (#167295)


 Commit: 262716b35be1fc2c8de511b32d65f54448e0e204
 https://github.com/llvm/llvm-project/commit/262716b35be1fc2c8de511b32d65f54448e0e204
 Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/utils/gn/secondary/libcxx/include/BUILD.gn

 Log Message:
 -----------
 [gn build] Port 07ad928d92ea


 Commit: 4bc654d6497430c1dd5e4e25aaa84b3dec3e1113
 https://github.com/llvm/llvm-project/commit/4bc654d6497430c1dd5e4e25aaa84b3dec3e1113
 Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/include/clang/Driver/ToolChain.h
 M clang/include/clang/Options/Options.td
 M clang/lib/Driver/Driver.cpp
 M clang/lib/Driver/ToolChain.cpp
 M clang/lib/Driver/ToolChains/Flang.cpp
 R cmake/Modules/GetToolchainDirs.cmake
 M flang-rt/CMakeLists.txt
 M flang-rt/cmake/modules/AddFlangRT.cmake
 M flang-rt/cmake/modules/AddFlangRTOffload.cmake
 R flang-rt/cmake/modules/FlangRTIntrospection.cmake
 A flang-rt/cmake/modules/GetToolchainDirs.cmake
 M flang-rt/lib/runtime/CMakeLists.txt
 R flang-rt/lib/runtime/__cuda_builtins.f90
 R flang-rt/lib/runtime/__cuda_device.f90
 R flang-rt/lib/runtime/__fortran_builtins.f90
 R flang-rt/lib/runtime/__fortran_ieee_exceptions.f90
 R flang-rt/lib/runtime/__fortran_type_info.f90
 R flang-rt/lib/runtime/__ppc_intrinsics.f90
 R flang-rt/lib/runtime/__ppc_types.f90
 R flang-rt/lib/runtime/cooperative_groups.f90
 R flang-rt/lib/runtime/cudadevice.f90
 R flang-rt/lib/runtime/ieee_arithmetic.f90
 R flang-rt/lib/runtime/ieee_exceptions.f90
 R flang-rt/lib/runtime/ieee_features.f90
 R flang-rt/lib/runtime/iso_c_binding.f90
 R flang-rt/lib/runtime/iso_fortran_env.f90
 R flang-rt/lib/runtime/iso_fortran_env_impl.f90
 R flang-rt/lib/runtime/mma.f90
 M flang-rt/test/lit.site.cfg.py.in
 M flang-rt/unittests/CMakeLists.txt
 M flang/CMakeLists.txt
 M flang/include/flang/Frontend/CompilerInvocation.h
 M flang/lib/Frontend/CompilerInvocation.cpp
 M flang/lib/Semantics/semantics.cpp
 A flang/module/.clang-format
 A flang/module/__cuda_builtins.f90
 A flang/module/__cuda_device.f90
 A flang/module/__fortran_builtins.f90
 A flang/module/__fortran_ieee_exceptions.f90
 A flang/module/__fortran_type_info.f90
 A flang/module/__ppc_intrinsics.f90
 A flang/module/__ppc_types.f90
 A flang/module/cooperative_groups.f90
 A flang/module/cudadevice.f90
 A flang/module/ieee_arithmetic.f90
 A flang/module/ieee_exceptions.f90
 A flang/module/ieee_features.f90
 A flang/module/iso_c_binding.f90
 A flang/module/iso_fortran_env.f90
 A flang/module/iso_fortran_env_impl.f90
 A flang/module/mma.f90
 M flang/test/CMakeLists.txt
 M flang/test/Driver/Inputs/ieee_arithmetic.mod
 M flang/test/Driver/Inputs/iso_fortran_env.mod
 R flang/test/Driver/intrinsic-module-path.F90
 A flang/test/Driver/intrinsic-module-path.f90
 M flang/test/Driver/lto-fatlto.f90
 M flang/test/Driver/pp-fixed-form.f90
 M flang/test/Lower/HLFIR/type-bound-call-mismatch.f90
 M flang/test/Lower/OpenMP/simd_aarch64.f90
 M flang/test/Lower/OpenMP/target-enter-data-default-openmp52.f90
 M flang/test/Preprocessing/fixed-free.f
 M flang/test/Preprocessing/no-pp-if.f90
 M flang/test/Semantics/bug163242.f90
 M flang/test/Semantics/bug164303.f90
 M flang/test/lit.cfg.py
 M flang/test/lit.site.cfg.py.in
 M flang/tools/CMakeLists.txt
 M flang/tools/bbc/bbc.cpp
 A flang/tools/f18/CMakeLists.txt
 A flang/tools/f18/dump.cpp
 M llvm/runtimes/CMakeLists.txt
 M openmp/CMakeLists.txt
 M openmp/runtime/CMakeLists.txt
 A openmp/runtime/cmake/LibompCheckFortranFlag.cmake
 M openmp/runtime/cmake/LibompHandleFlags.cmake
 M openmp/runtime/cmake/config-ix.cmake
 M openmp/runtime/src/CMakeLists.txt
 M openmp/runtime/test/lit.cfg
 M openmp/runtime/test/lit.site.cfg.in
 M runtimes/CMakeLists.txt

 Log Message:
 -----------
 Revert "[Flang] Move builtin .mod generation into runtimes" (#169489)

Reverts llvm/llvm-project#137828

Buildbot error in
https://lab.llvm.org/staging/#/builders/105/builds/37275


 Commit: 9e53ef3d8c18648517c7afb06bc0cd01ebbbdfa9
 https://github.com/llvm/llvm-project/commit/9e53ef3d8c18648517c7afb06bc0cd01ebbbdfa9
 Author: Durgadoss R <durgadossr at nvidia.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
 M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
 M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
 A mlir/test/Target/LLVMIR/nvvm/mbar_arrive.mlir
 A mlir/test/Target/LLVMIR/nvvm/mbar_arrive_drop.mlir
 A mlir/test/Target/LLVMIR/nvvm/mbar_complete_tx.mlir
 A mlir/test/Target/LLVMIR/nvvm/mbar_expect_tx.mlir
 A mlir/test/Target/LLVMIR/nvvm/mbar_init.mlir
 A mlir/test/Target/LLVMIR/nvvm/mbar_invalid.mlir
 R mlir/test/Target/LLVMIR/nvvm/mbarriers.mlir

 Log Message:
 -----------
 [MLIR][NVVM] Update mbarrier.arrive.* Op (#168758)

This patch updates the mbarrier.arrive.* family of Ops to include 
all features added up-to Blackwell.
* Update the `mbarrier.arrive` Op to include shared_cluster
 memory space, cta/cluster scope and an option to lower using
 relaxed semantics.
* An `arrive_drop` variant is added for both the `arrive` and
 `arrive.nocomplete` operations.
* Updates for expect_tx and complete_tx operations.
* Verifier checks are added wherever appropriate.
* lit tests are added to verify the lowering to the intrinsics.

TODO:
* Updates for the remaining mbarrier family will be done in
 subsequent PRs. (mainly, arrive.expect-tx, test_wait and try_waits)

Signed-off-by: Durgadoss R <durgadossr at nvidia.com>


 Commit: 6bf3249fe9771c5732d993304ecee11f55927f9f
 https://github.com/llvm/llvm-project/commit/6bf3249fe9771c5732d993304ecee11f55927f9f
 Author: Paul Walker <paul.walker at arm.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/include/clang/Sema/SemaARM.h
 M clang/lib/Sema/Sema.cpp
 M clang/lib/Sema/SemaARM.cpp
 M clang/lib/Sema/SemaDecl.cpp
 M clang/lib/Sema/SemaExpr.cpp
 A clang/test/Sema/AArch64/builtin_vectorelements.c

 Log Message:
 -----------
 [Clang][Sema] Emit diagnostic for __builtin_vectorelements(<SVEType>) when SVE is not available. (#168097)

As is done for other targets, I've moved the target type checking code
into SemaARM and migrated existing uses.

Fixes https://github.com/llvm/llvm-project/issues/155736


 Commit: f0e0a2215827facf1f480753a96833f60ccbcb62
 https://github.com/llvm/llvm-project/commit/f0e0a2215827facf1f480753a96833f60ccbcb62
 Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M utils/bazel/llvm-project-overlay/third-party/BUILD.bazel

 Log Message:
 -----------
 [bazel] Delete redundant visibility (#169493)

default_visibility is already public.


 Commit: 1919cd63223fdd6acd8a2c2d515f190160275226
 https://github.com/llvm/llvm-project/commit/1919cd63223fdd6acd8a2c2d515f190160275226
 Author: Colin Kinloch <colin at kinlo.ch>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/lib/StaticAnalyzer/Core/CheckerHelpers.cpp
 A clang/test/Analysis/std-c-library-functions-eof-2-rad.c

 Log Message:
 -----------
 [analyzer] Fix non decimal macro values in tryExpandAsInteger (#168632)

Values were parsed into an unsigned APInt with just enough of a bit
width to hold the number then interpreted as signed values. This
resulted in hex, octal and binary literals from being interpreted as
negative when the most significant bit is 1.

For example the `-0b11` would have a bit width of 2, would be
interpreted as -1, then negated to become 1.


 Commit: 4e9b76e23b29a0576c0b950e06daa2f2a84c1b65
 https://github.com/llvm/llvm-project/commit/4e9b76e23b29a0576c0b950e06daa2f2a84c1b65
 Author: Erich Keane <ekeane at nvidia.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/lib/CIR/CodeGen/CIRGenDeclOpenACC.cpp
 M clang/lib/CIR/CodeGen/CIRGenModule.cpp
 M clang/lib/CIR/CodeGen/CIRGenModule.h
 M clang/lib/CIR/CodeGen/CIRGenOpenACCClause.cpp
 A clang/lib/CIR/CodeGen/CIRGenOpenACCHelpers.h
 M clang/test/CIR/CodeGenOpenACC/declare-create.cpp
 M clang/test/CIR/CodeGenOpenACC/openacc-not-implemented-global.cpp
 R clang/test/CIR/CodeGenOpenACC/openacc-not-implemented.cpp

 Log Message:
 -----------
 [OpenACC][CIR] 'declare' lowering for globals/ns/struct-scopes (+create) (#169409)

This patch does the lowering for a 'declare' construct that is not a
function-local-scope. It also does the lowering for 'create', which has
an entry-op of create and exit-op of delete.

Global/NS/Struct scope 'declare's emit a single 'acc_ctor' and
'acc_dtor' (except in the case of 'link') per variable referenced. The
ctor is the entry op followed by a declare_enter. The dtor is a
get_device_ptr, followed by a declare_exit, followed by a delete(exit
op). This DOES include any necessary bounds.

This patch implements all of the above. We use a separate 'visitor' for
the clauses here since it is particularly different from the other uses,
AND there are only 4 valid clauses. Additionally, we had to split the
modifier conversion into its own 'helpers' file, which will hopefully
get some additional use in the future.


 Commit: d54168013aa49876c21d53b9a4a39eec23953096
 https://github.com/llvm/llvm-project/commit/d54168013aa49876c21d53b9a4a39eec23953096
 Author: Jay Foad <jay.foad at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/include/llvm/Bitcode/LLVMBitCodes.h
 M llvm/include/llvm/Transforms/Utils/FunctionComparator.h
 M llvm/lib/Bitcode/Reader/BitcodeReader.cpp

 Log Message:
 -----------
 [LLVM] Use "syncscope" instead of "synchscope" in comments. NFC. (#134615)

This matches the spelling of the keyword in LLVM IR.


 Commit: d615c14c22003522c16f7b82646542eb8e2dddca
 https://github.com/llvm/llvm-project/commit/d615c14c22003522c16f7b82646542eb8e2dddca
 Author: Mikhail R. Gadelha <mikhail at igalia.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
 M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-conversion.s
 M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fma.s
 M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fp.s
 M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s

 Log Message:
 -----------
 [RISCV] Update SpacemiT-X60 vector floating-point instructions latencies (#150618)

This PR adds hardware-measured latencies for all instructions defined in
Section 13 of the RVV specification: "Vector Floating-Point
Instructions" to the SpacemiT-X60 scheduling model.


 Commit: a7e715a1419ec977ff7d82f028a0449f9d20bf1c
 https://github.com/llvm/llvm-project/commit/a7e715a1419ec977ff7d82f028a0449f9d20bf1c
 Author: Paul Osmialowski <pawel.osmialowski at arm.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/docs/Vectorizers.rst

 Log Message:
 -----------
 [llvm][docs] Correct the list of the available -fveclib= options to match with the reality (#168205)

The command line reality is this:

$ clang -c prog.c -fveclib=accelerate
error: invalid value 'accelerate' in '-fveclib=accelerate'

$ clang -c prog.c -fveclib=Accelerate
prog.c:1:2: warning: This is only a test [-W#warnings]
 1 | #warning This is only a test
 | ^
1 warning generated.

$ clang -c prog.c -fveclib=libmvec
prog.c:1:2: warning: This is only a test [-W#warnings]
 1 | #warning This is only a test
 | ^
1 warning generated.

$ clang -c prog.c -fveclib=LIBMVEC
error: invalid value 'LIBMVEC' in '-fveclib=LIBMVEC'

$ clang -c prog.c -fveclib=massv
error: invalid value 'massv' in '-fveclib=massv'

$ clang -c prog.c -fveclib=MASSV
prog.c:1:2: warning: This is only a test [-W#warnings]
 1 | #warning This is only a test
 | ^
1 warning generated.

$ clang -c prog.c -fveclib=sleef
error: invalid value 'sleef' in '-fveclib=sleef'

$ clang -c prog.c -fveclib=sleefgnuabi
error: invalid value 'sleefgnuabi' in '-fveclib=sleefgnuabi'

$ clang -c prog.c -fveclib=SLEEF
prog.c:1:2: warning: This is only a test [-W#warnings]
 1 | #warning This is only a test
 | ^
1 warning generated.

$ clang -c prog.c -fveclib=darwin_libsystem_m
error: invalid value 'darwin' in '-fveclib=darwin_libsystem_m'

$ clang -c prog.c -fveclib=Darwin_libsystem_m
prog.c:1:2: warning: This is only a test [-W#warnings]
 1 | #warning This is only a test
 | ^
1 warning generated.

$ clang -c prog.c -fveclib=armpl
error: invalid value 'armpl' in '-fveclib=armpl'

$ clang -c prog.c -fveclib=ARMPL
error: invalid value 'ARMPL' in '-fveclib=ARMPL'

$ clang -c prog.c -fveclib=ArmPL
prog.c:1:2: warning: This is only a test [-W#warnings]
 1 | #warning This is only a test
 | ^
1 warning generated.

$ clang -c prog.c -fveclib=amdlibm
error: invalid value 'amdlibm' in '-fveclib=amdlibm'

$ clang -c prog.c -fveclib=AMDLIBM
clang: error: unsupported option 'AMDLIBM' for target 'aarch64'


 Commit: b37b307715fd1c449698aabad1fcfd188b265f2c
 https://github.com/llvm/llvm-project/commit/b37b307715fd1c449698aabad1fcfd188b265f2c
 Author: Hristo Hristov <hghristov.rmm at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M libcxx/include/__functional/bind.h
 M libcxx/include/__functional/bind_back.h
 M libcxx/include/__functional/bind_front.h
 M libcxx/include/__functional/function.h
 M libcxx/include/__functional/mem_fn.h
 M libcxx/include/__functional/reference_wrapper.h
 M libcxx/test/libcxx/diagnostics/functional.nodiscard.verify.cpp
 M libcxx/test/std/utilities/function.objects/refwrap/refwrap.invoke/robust_against_adl.pass.cpp

 Log Message:
 -----------
 [libc++] Applied `[[nodiscard]]` to some general utilities (#169322)

`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.
- https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant

The following functions/classes have been annotated in this patch:
- [x] `bind_back`, `bind_front`, `bind`
- [x] `function`, `mem_fn`
- [x] `reference_wrapper`


 Commit: 077a280cf586b29c6aa37a17637bcb6b91dc121c
 https://github.com/llvm/llvm-project/commit/077a280cf586b29c6aa37a17637bcb6b91dc121c
 Author: jeanPerier <jperier at nvidia.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M flang/lib/Lower/OpenACC.cpp
 A flang/test/Lower/OpenACC/acc-reduction-remapping.f90

 Log Message:
 -----------
 [flang][acc] remap symbol appearing in reduction clause (#168876)

This patch is a follow-up of #162306 for the reduction clause.

Inside the compute region that carries the reduction clause, a new
hlfir.declare is generated for symbol appearing in the reduction clause.
The input of this hlfir.declare is the acc.reduction result. The related
semantics::Symbol is remapped to the hlfir.declare result so that any
reference to the symbol inside the compute region will use this SSA
value as the starting point instead of the SSA value for the host
address.


 Commit: 5818435c437c654c8c17c7ba8b7eb8833b7c3229
 https://github.com/llvm/llvm-project/commit/5818435c437c654c8c17c7ba8b7eb8833b7c3229
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/include/llvm/IR/RuntimeLibcalls.td
 M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/basic.ll

 Log Message:
 -----------
 RuntimeLibcalls: Add a few libm entries from TargetLibraryInfo (#167049)

These are floating-point functions recorded in TargetLibraryInfo,
but missing from RuntimeLibcalls.


 Commit: 7f8c43a24949e2aa33e5f03f75ac865bb2f11ad8
 https://github.com/llvm/llvm-project/commit/7f8c43a24949e2aa33e5f03f75ac865bb2f11ad8
 Author: GrumpyPigSkin <130710602+GrumpyPigSkin at users.noreply.github.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
 M llvm/lib/Target/X86/X86InstrInfo.cpp
 A llvm/test/CodeGen/X86/GlobalISel/fp-bitcast.ll

 Log Message:
 -----------
 [X86][GISel] Fix crash on bitcasting i16 <-> half with gisel enabled. (#168456)

Added missing checks for casting half to/from i16 with global-isel
enabled.


Fixes #166557


 Commit: d8ae4d503ada5509fb526a782816540eb4d15012
 https://github.com/llvm/llvm-project/commit/d8ae4d503ada5509fb526a782816540eb4d15012
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/include/llvm/IR/RuntimeLibcalls.td
 M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/basic.ll
 A llvm/test/Transforms/Util/DeclareRuntimeLibcalls/ps.ll

 Log Message:
 -----------
 RuntimeLibcalls: Add __memcpy_chk, __memmove_chk, __memset_chk (#167053)

These were in TargetLibraryInfo, but missing from RuntimeLibcalls.
This only adds the cases that already have the non-chk variants
already. Copies the enabled-by-default logic from TargetLibraryInfo,
which is probably overly permissive. Only isPS opts-out.


 Commit: 25c95ebfa82e2f6a20cf1282aaef09d1cc598ee7
 https://github.com/llvm/llvm-project/commit/25c95ebfa82e2f6a20cf1282aaef09d1cc598ee7
 Author: Ming Yan <ming.yan at terapines.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M flang/include/flang/Optimizer/Transforms/Passes.h
 M flang/include/flang/Optimizer/Transforms/Passes.td
 M flang/lib/Optimizer/Transforms/FIRToSCF.cpp
 M flang/test/Fir/FirToSCF/do-loop.fir

 Log Message:
 -----------
 [flang][fir] Convert `fir.do_loop` with the unordered attribute to `scf.parallel`. (#168510)

Refines the existing conversion to allow `fir.do_loop` annotated with
`unordered` to be lowered to `scf.parallel`, while other loops retain
their original lowering.


 Commit: a51e2ef0fe73dd9ab6e608304ddf2b489c350cf4
 https://github.com/llvm/llvm-project/commit/a51e2ef0fe73dd9ab6e608304ddf2b489c350cf4
 Author: Florian Hahn <flo at fhahn.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp

 Log Message:
 -----------
 [VPlan] Treat VPVector(End)PointerRecipe as single-scalar, if ops are. (#169249)

VPVector(End)PointerRecipes are single-scalar if all their operands are.
This should be effectively NFC currently, but it should re-enable cost
checking for some more VPWidenMemoryRecipe after
https://github.com/llvm/llvm-project/pull/157387 as discovered by
John Brawn.


 Commit: eb5297e0ade96fe8a6297763f28219be97dfac76
 https://github.com/llvm/llvm-project/commit/eb5297e0ade96fe8a6297763f28219be97dfac76
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/IR/RuntimeLibcalls.cpp
 M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/armpl.ll
 M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/merge_attributes.ll
 M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/sincos_stret.ll
 M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/sleef.ll

 Log Message:
 -----------
 RuntimeLibcalls: Add mustprogress to common function attributes (#167080)


 Commit: be2dfce6472c65270900dce1754f5352a83c2e98
 https://github.com/llvm/llvm-project/commit/be2dfce6472c65270900dce1754f5352a83c2e98
 Author: Erich Keane <ekeane at nvidia.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/lib/CIR/CodeGen/CIRGenDeclOpenACC.cpp
 M clang/test/CIR/CodeGenOpenACC/declare-copyin.cpp

 Log Message:
 -----------
 [OpenACC][CIR] Global declare 'copyin' clause lowering (#169498)

JUST like the 'create' clause, except the entry op is copyin instead of
create. Most of this is the test.


 Commit: 9007b36b4250dff51e1a22f0b1f4084d5ab4fd4a
 https://github.com/llvm/llvm-project/commit/9007b36b4250dff51e1a22f0b1f4084d5ab4fd4a
 Author: Craig Topper <craig.topper at sifive.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
 M llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll

 Log Message:
 -----------
 [RISCV] Add a InstRW to COPY in RISCVSchedSpacemitX60.td. (#169423)

This prevents the scheduler from thinking copy instructions are free. In
#167008, we saw cases where the scheduler moved ABI copies past other
instructions creating high register pressure that caused the register
allocator to run out of registers. They can't be spilled because the
physical register lifetime was increased, not the virtual register.

Ideally, we would detect what register class the COPY is for, but for now
I've just treated it as a scalar integer copy.


 Commit: 4f5fb36ddba6f538ff859d494fe15f19691b88f1
 https://github.com/llvm/llvm-project/commit/4f5fb36ddba6f538ff859d494fe15f19691b88f1
 Author: Craig Topper <craig.topper at sifive.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp

 Log Message:
 -----------
 [RISCV] Use an enum class for AVL state ins RISCVInsertVSETVLI. NFC (#169455)


 Commit: 3564870a9fbfe49b11b47136127b6f972fbac43b
 https://github.com/llvm/llvm-project/commit/3564870a9fbfe49b11b47136127b6f972fbac43b
 Author: Craig Topper <craig.topper at sifive.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp

 Log Message:
 -----------
 [RISCV] Initialize AltFmt and TWiden in the VSETVLIInfo default constructor. (#169457)


 Commit: b3b83ac1e80e4a3f3e4241b2ae0ceabef369a5bf
 https://github.com/llvm/llvm-project/commit/b3b83ac1e80e4a3f3e4241b2ae0ceabef369a5bf
 Author: Nick Sarnie <nick.sarnie at intel.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M offload/test/offloading/shared_lib_fp_mapping.c
 M offload/test/offloading/static_linking.c

 Log Message:
 -----------
 [offload][lit] Fix compilation of two offload tests (#169399)

These are C tests, not C++, so no function parameters means unspecified
number of parameters, not `void`.

These compile fine on the current tested offload targets because an
error is only
[thrown](https://github.com/llvm/llvm-project/blob/main/clang/lib/Sema/SemaDecl.cpp#L10695)
if the calling convention doesn't support variadic arguments, which they
happen to.

When compiling this test for other targets that do not support variadic
arguments, we get an error, which does not seem intentional.

Just add `void` to the parameter list.

---------

Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>


 Commit: 031d99836de51f2d6dfeb4f539e2d1af85f4f263
 https://github.com/llvm/llvm-project/commit/031d99836de51f2d6dfeb4f539e2d1af85f4f263
 Author: Nick Sarnie <nick.sarnie at intel.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
 M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
 A llvm/test/CodeGen/SPIRV/function/vararg.ll

 Log Message:
 -----------
 [SPIRV] Error in backend for vararg functions (#169111)

SPIR-V doesn't support variadic functions, though we make an exception
for `printf`.

If we don't error, we generate invalid SPIR-V because the backend has no
idea how to codegen vararg functions as it is not described in the spec.
We get asm like this:

```
%27 = OpFunction %6 None %7
%28 = OpFunctionParameter %4
 ; -- End function
```

The above asm is totally invalid, there's no `OpFunctionEnd` and it
causes crashes in downstream tools like `spirv-as` and `spirv-link`.

We already have many `printf` tests locking down that this doesn't break
`printf`, it was already handled elsewhere at the time the error check
runs.

Note the SPIR-V Translator does the same thing, see
[here](https://github.com/KhronosGroup/SPIRV-LLVM-Translator/pull/2703).

---------

Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>


 Commit: ccbd0d1a69eb71268bfa7066a962bbd37c9893b1
 https://github.com/llvm/llvm-project/commit/ccbd0d1a69eb71268bfa7066a962bbd37c9893b1
 Author: Craig Topper <craig.topper at sifive.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp

 Log Message:
 -----------
 [RISCV] Add assertions to VSETVLIInfo accessors. NFC (#169462)


 Commit: 177e38286cd61a7b5a968636e1f147f128dd25a2
 https://github.com/llvm/llvm-project/commit/177e38286cd61a7b5a968636e1f147f128dd25a2
 Author: Sayan Saha <sayans at mathworks.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M mlir/include/mlir/Dialect/Tosa/Utils/QuantUtils.h
 M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
 M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
 M mlir/lib/Dialect/Tosa/Utils/QuantUtils.cpp
 M mlir/test/Dialect/Tosa/canonicalize.mlir
 M mlir/test/Dialect/Tosa/ops.mlir
 M mlir/test/Dialect/Tosa/quant-test.mlir
 M mlir/test/Dialect/Tosa/verifier.mlir

 Log Message:
 -----------
 [mlir][tosa] Get quantized element type with sign info. (#169387)

As mentioned in
https://github.com/llvm/llvm-project/blob/a27bb38ee6f5762e715803d8eb6ffc5a8dd09575/mlir/include/mlir/Dialect/Quant/IR/QuantTypes.h#L109
`QuantType::getStorageType` doesn't capture the sign information. This
lead to the following IR to fail during verification:
```
func.func @clamp(%arg0:tensor<?x112x112x32x!quant.uniform<u8:f32, 0.023529412224888802:-128>>) -> (tensor<?x112x112x32x!quant.uniform<u8:f32, 0.023529412224888802:-128>>) {
 %0 = tosa.clamp %arg0 {max_val = 255 : ui8, min_val = 0 : ui8} : (tensor<?x112x112x32x!quant.uniform<u8:f32, 0.023529412224888802:-128>>) -> tensor<?x112x112x32x!quant.uniform<u8:f32, 0.023529412224888802:-128>>
 return %0 : tensor<?x112x112x32x!quant.uniform<u8:f32, 0.023529412224888802:-128>>
}
```
with `'tosa.clamp' op min/max attributes types are incompatible with
input/output element types` error
since `getStorageType` was returning signed integer but the clamp
attributes were unsigned.

This PR updates the usage of `getStorageType` in tosa codebase to
correctly use the signed info for the quantized type.


 Commit: 1c3b10f2e2d8f9600fedd5e579aef69d7d31fadc
 https://github.com/llvm/llvm-project/commit/1c3b10f2e2d8f9600fedd5e579aef69d7d31fadc
 Author: Jay Foad <jay.foad at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
 M llvm/lib/Target/AMDGPU/AMDGPULowerExecSync.cpp
 M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
 M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
 M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h
 M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
 M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
 M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
 M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h

 Log Message:
 -----------
 [AMDGPU] Remove isKernelLDS, add isKernel(const Function &). NFC. (#167300)

Since #142598 isKernelLDS has been a pointless wrapper around isKernel.


 Commit: 02c9e8987a22753417c721eba5e5848f3fe33a24
 https://github.com/llvm/llvm-project/commit/02c9e8987a22753417c721eba5e5848f3fe33a24
 Author: Marco Elver <elver at google.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
 M llvm/test/Transforms/InstCombine/simplify-libcalls-new.ll

 Log Message:
 -----------
 [InstCombine][MemProf] Preserve all metadata (#169242)

When rewriting operator new calls to their hot/cold variants for PGHO,
`!alloc_token` metadata was being dropped. This metadata is required by
the AllocToken pass to correctly instrument the optimized allocation.

Fix it by preserving all metadata.


 Commit: b8ef25aa643761233dc5b74d9fb7c38a2064d9c7
 https://github.com/llvm/llvm-project/commit/b8ef25aa643761233dc5b74d9fb7c38a2064d9c7
 Author: Joel E. Denny <jdenny.ornl at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/docs/LangRef.rst
 M llvm/include/llvm/Transforms/Utils/LoopUtils.h
 M llvm/lib/Transforms/Utils/LoopUtils.cpp
 A llvm/test/Transforms/LoopVectorize/vectorize-zero-estimated-trip-count.ll
 M llvm/test/Verifier/llvm.loop.estimated_trip_count.ll
 M llvm/unittests/Transforms/Utils/LoopUtilsTest.cpp

 Log Message:
 -----------
 [PGO] Fix zeroed estimated trip count (#167792)

Before PR #152775, `llvm::getLoopEstimatedTripCount` never returned 0.
If `llvm::setLoopEstimatedTripCount` were called with 0, it would zero
branch weights, causing `llvm::getLoopEstimatedTripCount` to return
`std::nullopt`.

PR #152775 changed that behavior: if `llvm::setLoopEstimatedTripCount`
is called with 0, it sets `llvm.loop.estimated_trip_count` to 0, causing
`llvm::getLoopEstimatedTripCount` to return 0. However, it kept
documentation saying `llvm::getLoopEstimatedTripCount` returns a
positive count.

Some passes continue to assume `llvm::getLoopEstimatedTripCount` never
returns 0 and crash if it does, as reported in issue #164254. To restore
the behavior they expect, this patch changes
`llvm::getLoopEstimatedTripCount` to return `std::nullopt` when
`llvm.loop.estimated_trip_count` is 0.


 Commit: c582688b6912c615da1d08630c178dd3d0072aeb
 https://github.com/llvm/llvm-project/commit/c582688b6912c615da1d08630c178dd3d0072aeb
 Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
 M mlir/lib/Dialect/Linalg/Transforms/DropUnitDims.cpp
 M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
 M mlir/lib/Dialect/Tensor/Transforms/ReshapePatterns.cpp

 Log Message:
 -----------
 [MLIR][tensor] Simplify ExtractSliceOp::inferResultType (nfc) (#169313)

The `offsets` and `strides` arguments are neither used nor required -
removed them and simplify this hook.


 Commit: 6d21ce8797317814ad6f2372d98d21c9900f0579
 https://github.com/llvm/llvm-project/commit/6d21ce8797317814ad6f2372d98d21c9900f0579
 Author: Erich Keane <ekeane at nvidia.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/lib/CIR/CodeGen/CIRGenDeclOpenACC.cpp
 M clang/test/CIR/CodeGenOpenACC/declare-deviceresident.cpp

 Log Message:
 -----------
 [OpenACC][CIR] device_resident lowering for NS/global/struct declare (#169507)

This is the same as create/copyin, except it uses
declare_device_resident for the entry op.


 Commit: 7b5163d3001613e9c449f7603f4a0f7f521e79a1
 https://github.com/llvm/llvm-project/commit/7b5163d3001613e9c449f7603f4a0f7f521e79a1
 Author: Ebuka Ezike <yerimyah1 at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
 M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.h
 M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
 M lldb/unittests/Language/CPlusPlus/CPlusPlusLanguageTest.cpp

 Log Message:
 -----------
 [lldb][NFC] use llvm::StringRef in `ExtractContextAndIdentifer` function (#169506)

this avoids allocation when checking if a method contains a path.


 Commit: e04cca8561c65b9820f2c284eea164ab9fb7cdce
 https://github.com/llvm/llvm-project/commit/e04cca8561c65b9820f2c284eea164ab9fb7cdce
 Author: Marco Elver <elver at google.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 A clang/test/CodeGen/memprof-pgho.cpp

 Log Message:
 -----------
 [Clang][MemProf] Add end-to-end test for PGHO rewriting (#169243)

Add an end-to-end (non-LTO) test verifying that the optimization
pipeline is set up correctly for Profile Guided Heap Optimization (PGHO)
transforms. Ensure that both PGHO and AllocToken can stack, and the
AllocToken pass does not interfere with PGHO and vice versa.


 Commit: 1a036732d210c2b78404067a1aa0b3a3bba3eaf8
 https://github.com/llvm/llvm-project/commit/1a036732d210c2b78404067a1aa0b3a3bba3eaf8
 Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/include/clang/Options/Options.td
 M clang/lib/Driver/Driver.cpp
 M clang/lib/Driver/ToolChains/Clang.cpp
 M clang/lib/Driver/ToolChains/HIPAMD.cpp
 A clang/test/Driver/hip-spirv-backend-bindings.c
 A clang/test/Driver/hip-spirv-backend-opt.c
 A clang/test/Driver/hip-spirv-backend-phases.c

 Log Message:
 -----------
 [clang][Driver] Support for the SPIR-V backend when compiling HIP (#167543)

For HIP, the SPIR-V backend can be optionally activated with the -use-spirv-backend flag. This option uses the SPIR-V BE instead of the SPIR-V translator. These changes also ensure that -use-spirv-backend does not require external dependencies, such as spirv-as and spirv-link


 Commit: 17852deda7fb9dabb41023e2673025c630b9369d
 https://github.com/llvm/llvm-project/commit/17852deda7fb9dabb41023e2673025c630b9369d
 Author: Drew Kersnar <dkersnar at nvidia.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/include/llvm/Analysis/TargetTransformInfo.h
 M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
 M llvm/lib/Analysis/TargetTransformInfo.cpp
 M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
 M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
 M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
 M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
 M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
 M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
 M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
 M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
 M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
 M llvm/lib/Target/NVPTX/NVPTXForwardParams.cpp
 M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
 M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
 M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
 M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
 M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
 M llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
 M llvm/lib/Target/NVPTX/NVPTXSelectionDAGInfo.cpp
 M llvm/lib/Target/NVPTX/NVPTXSelectionDAGInfo.h
 M llvm/lib/Target/NVPTX/NVPTXTagInvariantLoads.cpp
 M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
 M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
 M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
 M llvm/lib/Target/VE/VETargetTransformInfo.h
 M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
 M llvm/lib/Target/X86/X86TargetTransformInfo.h
 M llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp
 M llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
 M llvm/test/CodeGen/NVPTX/ldg-invariant-256.ll
 M llvm/test/CodeGen/NVPTX/machinelicm-no-preheader.mir
 A llvm/test/CodeGen/NVPTX/masked-load-vectors.ll
 A llvm/test/CodeGen/NVPTX/masked-store-variable-mask.ll
 A llvm/test/CodeGen/NVPTX/masked-store-vectors-256.ll
 M llvm/test/CodeGen/NVPTX/proxy-reg-erasure.mir

 Log Message:
 -----------
 [NVPTX] Lower LLVM masked vector loads and stores to PTX (#159387)

This backend support will allow the LoadStoreVectorizer, in certain
cases, to fill in gaps when creating load/store vectors and generate
LLVM masked load/stores
(https://llvm.org/docs/LangRef.html#llvm-masked-store-intrinsics). To
accomplish this, changes are separated into two parts. This first part
has the backend lowering and TTI changes, and a follow up PR will have
the LSV generate these intrinsics:
https://github.com/llvm/llvm-project/pull/159388.

In this backend change, Masked Loads get lowered to PTX with `#pragma
"used_bytes_mask" [mask];`
(https://docs.nvidia.com/cuda/parallel-thread-execution/#pragma-strings-used-bytes-mask).
And Masked Stores get lowered to PTX using the new sink symbol syntax
(https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-st).

# TTI Changes
TTI changes are needed because NVPTX only supports masked loads/stores
with _constant_ masks. `ScalarizeMaskedMemIntrin.cpp` is adjusted to
check that the mask is constant and pass that result into the TTI check.
Behavior shouldn't change for non-NVPTX targets, which do not care
whether the mask is variable or constant when determining legality, but
all TTI files that implement these API need to be updated.

# Masked store lowering implementation details
If the masked stores make it to the NVPTX backend without being
scalarized, they are handled by the following:
* `NVPTXISelLowering.cpp` - Sets up a custom operation action and
handles it in lowerMSTORE. Similar handling to normal store vectors,
except we read the mask and place a sentinel register `$noreg` in each
position where the mask reads as false.

For example, 
```
t10: v8i1 = BUILD_VECTOR Constant:i1<-1>, Constant:i1<0>, Constant:i1<0>, Constant:i1<-1>, Constant:i1<-1>, Constant:i1<0>, Constant:i1<0>, Constant:i1<-1>
t11: ch = masked_store<(store unknown-size into %ir.lsr.iv28, align 32, addrspace 1)> t5:1, t5, t7, undef:i64, t10

->

STV_i32_v8 killed %13:int32regs, $noreg, $noreg, killed %16:int32regs, killed %17:int32regs, $noreg, $noreg, killed %20:int32regs, 0, 0, 1, 8, 0, 32, %4:int64regs, 0, debug-location !18 :: (store unknown-size into %ir.lsr.iv28, align 32, addrspace 1);

```

* `NVPTXInstInfo.td` - changes the definition of store vectors to allow
for a mix of sink symbols and registers.
* `NVPXInstPrinter.h/.cpp` - Handles the `$noreg` case by printing "_".

# Masked load lowering implementation details
Masked loads are routed to normal PTX loads, with one difference: a
`#pragma "used_bytes_mask"` is emitted before the load instruction
(https://docs.nvidia.com/cuda/parallel-thread-execution/#pragma-strings-used-bytes-mask).
To accomplish this, a new operand is added to every NVPTXISD Load type
representing this mask.
* `NVPTXISelLowering.h/.cpp` - Masked loads are converted into normal
NVPTXISD loads with a mask operand in two ways. 1) In type legalization
through replaceLoadVector, which is the normal path, and 2) through
LowerMLOAD, to handle the legal vector types
(v2f16/v2bf16/v2i16/v4i8/v2f32) that will not be type legalized. Both
share the same convertMLOADToLoadWithUsedBytesMask helper. Both default
this operand to UINT32_MAX, representing all bytes on. For the latter,
we need a new `NVPTXISD::MLoadV1` type to represent that edge case
because we cannot put the used bytes mask operand on a generic
LoadSDNode.
* `NVPTXISelDAGToDAG.cpp` - Extract used bytes mask from loads, add them
to created machine instructions.
* `NVPTXInstPrinter.h/.cpp` - Print the pragma when the used bytes mask
isn't all ones.
* `NVPTXForwardParams.cpp`, `NVPTXReplaceImageHandles.cpp` - Update
manual indexing of load operands to account for new operand.
* `NVPTXInsrtInfo.td`, `NVPTXIntrinsics.td` - Add the used bytes mask to
the MI definitions.
* `NVPTXTagInvariantLoads.cpp` - Ensure that masked loads also get
tagged as invariant.

Some generic changes that are needed:
* `LegalizeVectorTypes.cpp` - Ensure flags are preserved when splitting
masked loads.
* `SelectionDAGBuilder.cpp` - Preserve `MD_invariant_load` on masked
load SDNode creation


 Commit: 6a395fec1f7663e02c6607e8e10791838c949389
 https://github.com/llvm/llvm-project/commit/6a395fec1f7663e02c6607e8e10791838c949389
 Author: Guy David <guyda96 at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AArch64/AArch64InstrInfo.td
 A llvm/test/CodeGen/AArch64/remat-fmov-vector-imm.mir

 Log Message:
 -----------
 [AArch64] Mark FMOVvXfY_ns as rematerializable, cheap (#169186)


 Commit: b93bb69dfad5f94565d90575a92203a1a2f3395b
 https://github.com/llvm/llvm-project/commit/b93bb69dfad5f94565d90575a92203a1a2f3395b
 Author: Samira Bakon <bazuzi at google.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/include/clang/Analysis/FlowSensitive/ASTOps.h
 M clang/lib/Analysis/FlowSensitive/ASTOps.cpp

 Log Message:
 -----------
 [clang][dataflow] Use containers with deterministic iteration order. (#169512)


 Commit: eb1ff56e26fdb48728642f7d26e47b337b7235ea
 https://github.com/llvm/llvm-project/commit/eb1ff56e26fdb48728642f7d26e47b337b7235ea
 Author: Alexey Bataev <a.bataev at outlook.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 A llvm/test/Transforms/SLPVectorizer/X86/multi-node-for-copyable-parent.ll

 Log Message:
 -----------
 [SLP][NFC]Add a test for copyable operands, used multiple times, NFC


 Commit: d69e70149636efa0293310303878fbf9a5f31433
 https://github.com/llvm/llvm-project/commit/d69e70149636efa0293310303878fbf9a5f31433
 Author: Joel E. Denny <jdenny.ornl at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/test/Transforms/LoopVectorize/vectorize-zero-estimated-trip-count.ll

 Log Message:
 -----------
 [PGO] Add missing target datalayout in test (#169520)

The test was added by b8ef25aa643761233dc5b74d9fb7c38a2064d9c7. It
failed on at least the following bots, but the failure did not reproduce
on my test machines or in pre-commit CI:

- https://lab.llvm.org/buildbot/#/builders/190/builds/31638
- https://lab.llvm.org/buildbot/#/builders/190/builds/31638

This fix hopefully addresses at least the warnings there.


 Commit: 5999cc8ceef3acef128e1baf8fcefd7164acc677
 https://github.com/llvm/llvm-project/commit/5999cc8ceef3acef128e1baf8fcefd7164acc677
 Author: Hristo Hristov <hghristov.rmm at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M libcxx/include/stack
 M libcxx/test/libcxx/diagnostics/stack.nodiscard.verify.cpp

 Log Message:
 -----------
 [libc++][stack] Applied `[[nodiscard]]` (#169468)

`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.

-
https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant


 Commit: 1c5b1501ca50e039ae39075465972761449013e9
 https://github.com/llvm/llvm-project/commit/1c5b1501ca50e039ae39075465972761449013e9
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/include/llvm/CodeGen/LibcallLoweringInfo.h
 M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
 M llvm/lib/CodeGen/LibcallLoweringInfo.cpp
 M llvm/lib/CodeGen/TargetLoweringBase.cpp
 M llvm/lib/Target/ARM/ARMISelLowering.cpp
 M llvm/lib/Target/ARM/ARMSubtarget.cpp
 M llvm/lib/Target/ARM/ARMSubtarget.h
 M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
 M llvm/lib/Target/MSP430/MSP430Subtarget.cpp
 M llvm/lib/Target/MSP430/MSP430Subtarget.h
 M llvm/lib/Target/Mips/Mips16ISelLowering.cpp
 M llvm/lib/Target/Mips/Mips16ISelLowering.h
 M llvm/lib/Target/Mips/MipsSubtarget.cpp
 M llvm/lib/Target/Mips/MipsSubtarget.h
 M llvm/lib/Target/Sparc/SparcISelLowering.cpp
 M llvm/lib/Target/Sparc/SparcSubtarget.cpp
 M llvm/lib/Target/Sparc/SparcSubtarget.h

 Log Message:
 -----------
 CodeGen: Move libcall lowering configuration to subtarget (#168621)

Previously libcall lowering decisions were made directly
in the TargetLowering constructor. Pull these into the subtarget
to facilitate turning LibcallLoweringInfo into a separate analysis
in the future.


 Commit: 5017370a1ce5009aed2855b645194bc141f72a2d
 https://github.com/llvm/llvm-project/commit/5017370a1ce5009aed2855b645194bc141f72a2d
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 A llvm/test/CodeGen/AMDGPU/gws_agpr.ll

 Log Message:
 -----------
 AMDGPU: Add baseline test for gws handling with AGPR inputs (#169372)


 Commit: a860c8378f91d9b7713171888e76962b2747fe4e
 https://github.com/llvm/llvm-project/commit/a860c8378f91d9b7713171888e76962b2747fe4e
 Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/include/clang/Options/Options.td
 M clang/lib/Driver/Driver.cpp
 M clang/lib/Driver/ToolChains/Clang.cpp
 M clang/lib/Driver/ToolChains/HIPAMD.cpp
 R clang/test/Driver/hip-spirv-backend-bindings.c
 R clang/test/Driver/hip-spirv-backend-opt.c
 R clang/test/Driver/hip-spirv-backend-phases.c

 Log Message:
 -----------
 Revert "[clang][Driver] Support for the SPIR-V backend when compiling HIP (#167543)" (#169528)

This reverts commit 1a036732d210c2b78404067a1aa0b3a3bba3eaf8.

Reverted due to a failure in hip-spirv-backend-opt.c for
fuchsia-x86_64-linux.


 Commit: 53e5cfdf8b13e2427797ca6eeda1860f8aa190ef
 https://github.com/llvm/llvm-project/commit/53e5cfdf8b13e2427797ca6eeda1860f8aa190ef
 Author: Erich Keane <ekeane at nvidia.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/lib/CIR/CodeGen/CIRGenDeclOpenACC.cpp
 M clang/test/CIR/CodeGenOpenACC/combined-copy.c
 M clang/test/CIR/CodeGenOpenACC/compute-copy.c
 M clang/test/CIR/CodeGenOpenACC/declare-copy.cpp
 M clang/test/CIR/CodeGenOpenACC/declare-copyout.cpp
 M clang/test/CIR/CodeGenOpenACC/declare-deviceptr.cpp
 M clang/test/CIR/CodeGenOpenACC/declare-link.cpp
 M clang/test/CIR/CodeGenOpenACC/declare-present.cpp

 Log Message:
 -----------
 [OpenACC][CIR] link clause lowering for global declare (#169524)

The 'link' clause is like the rest of the global clauses (copyin,
 create, device_resident), except it only has an entry op(thus no
dtor).

This patch also removes a bunch of now stales TODOs from the tests.


 Commit: 8380a48aa0b62be28b653ba6b3d38198680b2bd9
 https://github.com/llvm/llvm-project/commit/8380a48aa0b62be28b653ba6b3d38198680b2bd9
 Author: Joel E. Denny <jdenny.ornl at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/test/Transforms/LoopVectorize/vectorize-zero-estimated-trip-count.ll

 Log Message:
 -----------
 [PGO] Add REQUIRES to test (#169531)

The test was added by b8ef25aa643761233dc5b74d9fb7c38a2064d9c7. It
failed on at least the following bots, but the failure did not reproduce
on my test machines or in pre-commit CI:

- https://lab.llvm.org/buildbot/#/builders/190/builds/31643
- https://lab.llvm.org/buildbot/#/builders/65/builds/25949
- https://lab.llvm.org/buildbot/#/builders/154/builds/24417

d69e70149636efa0293310303878fbf9a5f31433 did not fix the failure.
Hopefully this will.


 Commit: 1441f0458545243f9278cf87a35c4cb4e1cd62bd
 https://github.com/llvm/llvm-project/commit/1441f0458545243f9278cf87a35c4cb4e1cd62bd
 Author: Andy Kaylor <akaylor at nvidia.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/lib/CIR/CodeGen/Address.h
 M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
 A clang/test/CIR/CodeGen/placement-new.cpp

 Log Message:
 -----------
 [CIR] Upstream reserved placement new handling (#169436)

This upstreams the code to support reserved placement new calls.


 Commit: 45336992453c83d083ccadf62ae56626dfb0f761
 https://github.com/llvm/llvm-project/commit/45336992453c83d083ccadf62ae56626dfb0f761
 Author: Gergely Bálint <gergely.balint at arm.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M bolt/include/bolt/Core/MCPlusBuilder.h
 M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
 M bolt/unittests/Core/MCPlusBuilder.cpp
 M llvm/lib/Target/AArch64/AArch64BranchTargets.cpp

 Log Message:
 -----------
 [BOLT][BTI] Add MCPlusBuilder::isBTILandingPad (#167306)

- takes both implicit and explicit BTIs into account
- fix related comment in 
 llvm/lib/Target/AArch64/AArch64BranchTargets.cpp


 Commit: 83d9c636b753ab37842a25606d95d800dce90398
 https://github.com/llvm/llvm-project/commit/83d9c636b753ab37842a25606d95d800dce90398
 Author: Keith Smiley <keithbsmiley at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M utils/bazel/third_party_build/zlib-ng.BUILD

 Log Message:
 -----------
 [bazel] Add alias for zlib-ng for WORKSPACE compat (#169530)

The consumer of zlib in third-party/BUILD.bazel expects zlib-ng from the
BCR, if you still load this version from your WORKSPACE / MODULE.bazel
you need to use this name instead.


 Commit: 012721d3200ceed635495394fe96b17bbaa8653e
 https://github.com/llvm/llvm-project/commit/012721d3200ceed635495394fe96b17bbaa8653e
 Author: Benjamin Chetioui <3920784+bchetioui at users.noreply.github.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M mlir/lib/Bindings/Python/IRCore.cpp
 M mlir/test/python/ir/operation.py

 Log Message:
 -----------
 [mlir][python] Propagate error diagnostics when an op couldn't be created. (#169499)


 Commit: 4877c593a873657cd18a1ee0bd4a13f4b84c4d3b
 https://github.com/llvm/llvm-project/commit/4877c593a873657cd18a1ee0bd4a13f4b84c4d3b
 Author: Kaitlin Peng <kaitlinpeng at microsoft.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/SPIRV/SPIRVCombine.td
 M llvm/lib/Target/SPIRV/SPIRVCombinerHelper.cpp
 M llvm/lib/Target/SPIRV/SPIRVCombinerHelper.h
 A llvm/test/CodeGen/SPIRV/GlobalISel/InstCombine/prelegalizercombiner-select-to-faceforward.mir
 M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/faceforward.ll
 A llvm/test/CodeGen/SPIRV/opencl/faceforward-error.ll
 A llvm/test/CodeGen/SPIRV/opencl/faceforward.ll

 Log Message:
 -----------
 [SPIRV] Add PreLegalizer pattern matching for `faceforward` (#139959)

Tasks completed:
- Pattern match`select(fcmp(dot(p2, p3), 0), p1, -p1)` to
`faceforward(p1, p2, p3)`
- Add pattern matching tests to
`prelegalizercombiner-select-to-faceforward.mir` and `faceforward.ll`
- Add CL extension error test
`llvm/test/CodeGen/SPIRV/opencl/faceforward-error.ll`
- Add CL extension test for no pattern matching in
`llvm/test/CodeGen/SPIRV/opencl/faceforward.ll`

Closes #137255.


 Commit: d125cab13f08eee4d02d02e46223d14285bb2353
 https://github.com/llvm/llvm-project/commit/d125cab13f08eee4d02d02e46223d14285bb2353
 Author: Valeriy Savchenko <vsavchenko at apple.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
 M llvm/test/Transforms/InstCombine/cast-mul-select.ll
 M llvm/test/Transforms/InstCombine/cast.ll
 M llvm/test/Transforms/InstCombine/catchswitch-phi.ll
 M llvm/test/Transforms/InstCombine/icmp-mul-zext.ll
 M llvm/test/Transforms/InstCombine/known-bits-lerp-pattern.ll
 M llvm/test/Transforms/InstCombine/logical-select-inseltpoison.ll
 M llvm/test/Transforms/InstCombine/logical-select.ll

 Log Message:
 -----------
 [InstCombine] Support multi-use values in cast elimination transforms (#165877)

`canEvaluateTruncated` and `canEvaluateSExtd` previously rejected
multi-use values to avoid duplication. This was overly conservative, if
all users of a multi-use value are part of the transform, we can
evaluate it in a different type without duplication.

This change tracks visited values and defers decisions on multi-use
values until we verify all their users were visited.
`EvaluateInDifferentType` now memoizes multi-use values to avoid
creating duplicates.

Applied to truncation and sext. Zext unchanged due to its dual-return
nature.


 Commit: 84df446af980f33f8014578856f8b1f8037888ee
 https://github.com/llvm/llvm-project/commit/84df446af980f33f8014578856f8b1f8037888ee
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
 M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll

 Log Message:
 -----------
 AMDGPU: Remove DummyCGSCC use after buffer lowering passes (#169519)

The fixme the comment refers to was removed.


 Commit: 44cffbe5d8de5947780288ca3c366bbd52650314
 https://github.com/llvm/llvm-project/commit/44cffbe5d8de5947780288ca3c366bbd52650314
 Author: Min-Yih Hsu <min.hsu at sifive.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
 A llvm/test/CodeGen/RISCV/fma-combine.ll

 Log Message:
 -----------
 [RISCV] Propagate SDNode flags when combining `(fmul (fneg X), ...)` (#169460)

In #157388, we turned `(fmul (fneg X), Y)` into `(fneg (fmul X, Y))`.
However, we forgot to propagate SDNode flags, specifically fast math
flags, from the original FMUL to the new one. This hinders some of the
subsequent (FMA) DAG combiner patterns that relied on the contraction
flag and as a consequence, missed some of the opportunities to generate
negation FMA instructions like `fnmadd`.

This patch fixes this issue by propagating the flags.

---------

Co-authored-by: Craig Topper <craig.topper at sifive.com>


 Commit: 6a6b99aa8010f16f4e74f78bca1f3c6ca9e94b9f
 https://github.com/llvm/llvm-project/commit/6a6b99aa8010f16f4e74f78bca1f3c6ca9e94b9f
 Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/test/CIR/CodeGenOpenACC/combined-firstprivate-clause.cpp
 M clang/test/CIR/CodeGenOpenACC/combined-private-clause.cpp
 M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause-templates.cpp
 M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.c
 M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.cpp
 M clang/test/CIR/CodeGenOpenACC/compute-private-clause-templates.cpp
 M clang/test/CIR/CodeGenOpenACC/compute-private-clause.c
 M clang/test/CIR/CodeGenOpenACC/compute-private-clause.cpp
 M clang/test/CIR/CodeGenOpenACC/loop-private-clause.cpp
 M flang/lib/Lower/OpenACC.cpp
 M flang/lib/Optimizer/OpenACC/Transforms/ACCRecipeBufferization.cpp
 M flang/test/Fir/OpenACC/recipe-bufferization.mlir
 M flang/test/Lower/OpenACC/acc-firstprivate-derived-allocatable-component.f90
 M flang/test/Lower/OpenACC/acc-firstprivate-derived-pointer-component.f90
 M flang/test/Lower/OpenACC/acc-firstprivate-derived-user-assign.f90
 M flang/test/Lower/OpenACC/acc-firstprivate-derived.f90
 M flang/test/Lower/OpenACC/acc-kernels-loop.f90
 M flang/test/Lower/OpenACC/acc-loop.f90
 M flang/test/Lower/OpenACC/acc-parallel-loop.f90
 M flang/test/Lower/OpenACC/acc-parallel.f90
 M flang/test/Lower/OpenACC/acc-private.f90
 M flang/test/Lower/OpenACC/acc-reduction-remapping.f90
 M flang/test/Lower/OpenACC/acc-reduction.f90
 M flang/test/Lower/OpenACC/acc-serial-loop.f90
 M flang/test/Lower/OpenACC/acc-serial.f90
 M flang/test/Lower/OpenACC/acc-unstructured.f90
 M flang/test/Lower/OpenACC/do-loops-to-acc-loops.f90
 M flang/test/Transforms/OpenACC/acc-implicit-copy-reduction.fir
 M flang/test/Transforms/OpenACC/acc-implicit-data-fortran.F90
 M flang/test/Transforms/OpenACC/acc-implicit-data.fir
 M flang/test/Transforms/OpenACC/acc-implicit-firstprivate.fir
 M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
 M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
 M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
 M mlir/lib/Dialect/OpenACC/Transforms/ACCImplicitData.cpp
 M mlir/test/Dialect/OpenACC/acc-implicit-data-reduction.mlir
 M mlir/test/Dialect/OpenACC/acc-implicit-data.mlir
 M mlir/test/Dialect/OpenACC/invalid.mlir
 M mlir/test/Dialect/OpenACC/legalize-data.mlir
 M mlir/test/Dialect/OpenACC/ops.mlir

 Log Message:
 -----------
 [acc][flang][cir] Add recipes to data entry operations (#149210)

This patch refactors the OpenACC dialect to attach recipe symbols
directly to data operations (acc.private, acc.firstprivate,
acc.reduction)
rather than to compute constructs (acc.parallel, acc.serial, acc.loop).

Motivation:
The previous design required compute constructs to carry both the recipe
symbol and the variable reference, leading to complexity. Additionally,
recipes were required even when they could be generated automatically
through MappableType interfaces.

Changes:
- Data operations (acc.private, acc.firstprivate, acc.reduction) now
 require a 'recipe' attribute referencing their respective recipe
 operations
- Verifier enforces recipe attribute presence for non-MappableType
 operands; MappableType operands can generate recipes on demand
- Compute constructs (acc.parallel, acc.serial, acc.loop) no longer
 carry recipe symbols in their operands
- Updated flang lowering to attach recipes to data operations instead
 of passing them to compute constructs

Format Migration:
Old format:
```
 acc.parallel private(@recipe -> %var : !fir.ref<i32>) { ... }
```

New format:
```
 %private = acc.private varPtr(%var : !fir.ref<i32>)
 recipe(@recipe) -> !fir.ref<i32>
 acc.parallel private(%private : !fir.ref<i32>) { ... }
```

Test Updates:
- Updated all CIR and Flang OpenACC tests to new format
- Fixed CHECK lines to verify recipe attributes on data operations


 Commit: d5aa686636e0824f2d39ac333537d19bb4f8fc34
 https://github.com/llvm/llvm-project/commit/d5aa686636e0824f2d39ac333537d19bb4f8fc34
 Author: Md Abdullah Shahneous Bari <98356296+mshahneo at users.noreply.github.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp

 Log Message:
 -----------
 [GPUToXeVMPipeline][Pipeline] Modify pipeline to add `convert-vector-to-llvm`. (#166204)

`convert-vector-to-llvm` pass applies a set of vector transformation
patterns that are not included in the standard `convert-to-llvm` pass
interface. These additional transformations are required to properly
lower MLIR vector operations. Since not all vector ops have direct
`llvm` dialect lowering, many of them must first be progressively
rewritten into simpler or more canonical vector ops, which are then
lowered to `llvm`. Therefore, running `convert-vector-to-llvm` is
necessary to ensure a complete and correct lowering of vector operations
to the `llvm` dialect.


 Commit: 4822f4986fae9bb212e2f35e29839bbd9fb26bea
 https://github.com/llvm/llvm-project/commit/4822f4986fae9bb212e2f35e29839bbd9fb26bea
 Author: Utkarsh Saxena <usx at google.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/lib/Analysis/CFG.cpp
 M clang/test/Analysis/lifetime-cfg-output.cpp
 M clang/test/Analysis/scopes-cfg-output.cpp
 M clang/test/Sema/warn-lifetime-safety.cpp
 M clang/unittests/Analysis/FlowSensitive/LoggerTest.cpp

 Log Message:
 -----------
 [LifetimeSafety] Add parameter lifetime tracking in CFG (#169320)

This PR enhances the CFG builder to properly handle function parameters
in lifetime analysis:

1. Added code to include parameters in the initial scope during CFG
construction for both `FunctionDecl` and `BlockDecl` types
2. Added a special case to skip reference parameters, as they don't need
automatic destruction
3. Fixed several test cases that were previously marked as "FIXME" due
to missing parameter lifetime tracking

Previously, Clang's lifetime analysis was not properly tracking the
lifetime of function parameters, causing it to miss important
use-after-return bugs when parameter values were returned by reference
or address. This change ensures that parameters are properly tracked in
the CFG, allowing the analyzer to correctly identify when stack memory
associated with parameters is returned.

Fixes https://github.com/llvm/llvm-project/issues/169014


 Commit: f545c2cec12f77f1fb61ccf07393f434d456ad94
 https://github.com/llvm/llvm-project/commit/f545c2cec12f77f1fb61ccf07393f434d456ad94
 Author: David Stone <davidfromonline at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/lib/Sema/SemaDeclCXX.cpp

 Log Message:
 -----------
 [clang][NFC] Don't copy into a vector just to iterate in `IsInitListMemberExprInitialized` (#169385)


 Commit: 0c9c62adf165ebf4128bcfe9863fa0c524b46b7b
 https://github.com/llvm/llvm-project/commit/0c9c62adf165ebf4128bcfe9863fa0c524b46b7b
 Author: zhijian lin <zhijian at ca.ibm.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
 M llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll

 Log Message:
 -----------
 [PowerPC ]convert `(setcc (and X, 1), 0, eq)` to `XORI (and X, 1), 1` (#168384)

Convert `(setcc (and X, 1), 0, eq)` to `XORI (and X, 1), 1` , it will save one instruction.


 Commit: d7dcc108fc3ada2330277424495b676d52de1765
 https://github.com/llvm/llvm-project/commit/d7dcc108fc3ada2330277424495b676d52de1765
 Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/docs/DeveloperPolicy.rst
 M llvm/utils/git/github-automation.py

 Log Message:
 -----------
 [GitHub] Add review instructions for commit access requests (#168971)

As discussed in
https://discourse.llvm.org/t/clarification-on-how-to-accept-commit-access-requests/88728,
clarify reviewer instructions for how to accept commit access requests.


 Commit: 1d30ae6e402a28018a5574b7c68d71aac14acd63
 https://github.com/llvm/llvm-project/commit/1d30ae6e402a28018a5574b7c68d71aac14acd63
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

 Log Message:
 -----------
 AMDGPU: Stop forcing RequiresCodeGenSCCOrder (#169522)

This hasn't been strictly necessary since c897c13dde.
Practically this makes little difference; we still enable IPRA
by default which implies this option. By removing this explicit
force, -enable-ipra=0 has the expected change in the pass pipeline
to remove the DummyCGSCC runs.


 Commit: 8f1bb92bbfa45d49103953dad0d0a5dcfd388959
 https://github.com/llvm/llvm-project/commit/8f1bb92bbfa45d49103953dad0d0a5dcfd388959
 Author: Drew Kersnar <dkersnar at nvidia.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/test/CodeGen/NVPTX/masked-load-vectors.ll
 M llvm/test/CodeGen/NVPTX/masked-store-variable-mask.ll
 M llvm/test/CodeGen/NVPTX/masked-store-vectors-256.ll

 Log Message:
 -----------
 [NVPTX] Fix lit test issues from masked load/store implementation (#169535)

>From this commit:
https://github.com/llvm/llvm-project/commit/17852deda7fb9dabb41023e2673025c630b9369d,
Build was broken here:
https://lab.llvm.org/buildbot/#/builders/155/builds/15135/steps/7/logs/stdio.
I think this should fix things.


 Commit: 6c8ff4f2bbae6fe29b0ef67edb70e6d73b47beb3
 https://github.com/llvm/llvm-project/commit/6c8ff4f2bbae6fe29b0ef67edb70e6d73b47beb3
 Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp

 Log Message:
 -----------
 [NVPTX] Fix maybe unused variable in 17852ded (#169542)


 Commit: dce95b2ea41e8585cd1e3e2ce07f5d692a970949
 https://github.com/llvm/llvm-project/commit/dce95b2ea41e8585cd1e3e2ce07f5d692a970949
 Author: Erich Keane <ekeane at nvidia.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/lib/CIR/CodeGen/CIRGenDeclOpenACC.cpp
 M clang/lib/CIR/CodeGen/CIRGenFunction.h
 M clang/lib/CIR/CodeGen/CIRGenOpenACCClause.cpp
 M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
 M clang/lib/CIR/CodeGen/CIRGenStmtOpenACCLoop.cpp

 Log Message:
 -----------
 [OpenACC][CIR][NFC] Remove 'NYI' diagnostics, since we're done with t… (#169543)

…hese

We've finished all of the clauses/etc that we're going to use this
visitor for, so we can remove the SourceLocation we used just for that,
and replace all NYI with unreachables.


 Commit: a8e0afe98853418e1367274e6f04f7ba255de199
 https://github.com/llvm/llvm-project/commit/a8e0afe98853418e1367274e6f04f7ba255de199
 Author: Amr Hesham <amr96 at programmer.net>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
 M clang/lib/CIR/CodeGen/CIRGenFunction.h
 M clang/test/CIR/CodeGen/vector-ext-element.cpp

 Log Message:
 -----------
 [CIR] ArraySubscriptExpr on ExtVectorElementExpr (#169158)

Implement ArraySubscriptExpr support for ExtVectorElementExpr


 Commit: 2d78b1409eeab558cfc1b64ab39211af00c5f35f
 https://github.com/llvm/llvm-project/commit/2d78b1409eeab558cfc1b64ab39211af00c5f35f
 Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/include/clang/Basic/DiagnosticParseKinds.td
 M clang/include/clang/Basic/OpenMPKinds.def
 M clang/include/clang/Basic/OpenMPKinds.h
 M clang/include/clang/Sema/SemaOpenMP.h
 M clang/lib/Parse/ParseOpenMP.cpp
 A clang/test/OpenMP/need_device_ptr_kind_ast_print.cpp
 A clang/test/OpenMP/need_device_ptr_kind_messages.cpp

 Log Message:
 -----------
 [OpenMP][Clang] Parsing/Sema support for `need_device_ptr(fb_nullify/fb_preserve)`. (#168905)

This patch adds parsing, semantic handling, and diagnostics for the
`OpenMP 6.1 fb_nullify` and` fb_preserve` fallback modifiers used with
the `need_device_ptr` map modifier.


 Commit: 622dbb372bfefc135c3cdf967ae6f3b55ffa4a16
 https://github.com/llvm/llvm-project/commit/622dbb372bfefc135c3cdf967ae6f3b55ffa4a16
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/test/CodeGen/AMDGPU/constant-address-space-32bit.ll

 Log Message:
 -----------
 AMDGPU: Add more tests for 32-bit constant address space (#168976)

The sub-dword cases just assert now, so comment those out.


 Commit: 20ca85b69fc06feb75f67414d54f3830748bb456
 https://github.com/llvm/llvm-project/commit/20ca85b69fc06feb75f67414d54f3830748bb456
 Author: Jez Ng <me at jezng.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M lld/MachO/Arch/X86_64.cpp
 M lld/MachO/InputFiles.cpp
 M lld/test/MachO/x86-64-relocs.s

 Log Message:
 -----------
 [lld] macho: Support section branch relocations, including the 1-byte form (#169062)

I noticed that we had a hardcoded value of 4 for the pcrel section
relocations, which seems like an issue given that we recently added
support for 1-byte branch relocations in
https://github.com/llvm/llvm-project/pull/164439. The code included an
assert that the relevant relocation had the BYTE4 attribute, but that is
actually not enough to use a hardcoded value of 4: we need to assert
that the *other* `BYTE<n>` attributes are not set either.

However, since we did not support local branch relocations, that doesn't
seem to have mattered in practice. That said, local branch relocations
can be emitted by compilers, and ld64 does handle the 4-byte version of
them, so I've added support for it here.

ld64 actually seems to reject 1-byte section relocations, so the
questionable code is actually probably fine (minus the incorrect
assert). So we have two options: add an equivalent check in LLD, or just
support 1-byte local branch relocations. Supporting it actually requires
less code, so I've gone with that option here.


 Commit: 2ee12f191a005363259e3a95ccdf459d9044eadf
 https://github.com/llvm/llvm-project/commit/2ee12f191a005363259e3a95ccdf459d9044eadf
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
 M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
 M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
 M llvm/lib/Target/AMDGPU/DSInstructions.td
 M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
 M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
 M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
 M llvm/lib/Target/AMDGPU/SIInstrInfo.h
 M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
 M llvm/test/CodeGen/AMDGPU/gws_agpr.ll
 M llvm/test/CodeGen/AMDGPU/verify-ds-gws-align.mir
 A llvm/test/MC/AMDGPU/ds_gws_sgpr_err.s
 M llvm/test/MC/AMDGPU/gfx90a_ldst_acc.s

 Log Message:
 -----------
 AMDGPU: Use RegClassByHwMode to manage GWS operand special case (#169373)

On targets that require even aligned 64-bit VGPRs, GWS operands
require even alignment of a 32-bit operand. Previously we had a hacky
post-processing which added an implicit operand to try to manage
the constraint. This would require special casing in other passes
to avoid breaking the operand constraint. This moves the handling
into the instruction definition, so other passes no longer need
to consider this edge case. MC still does need to special case this,
to print/parse as a 32-bit register. This also still ends up net
less work than introducing even aligned 32-bit register classes.

This also should be applied to the image special case.


 Commit: 3a27fc48117ba7e062c3cfa0006badb64446ed69
 https://github.com/llvm/llvm-project/commit/3a27fc48117ba7e062c3cfa0006badb64446ed69
 Author: Craig Topper <craig.topper at sifive.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp

 Log Message:
 -----------
 [RISCV] Omit VTYPE in VSETVLIInfo::print() when state is uninit or unknown. (#169459)


 Commit: eab23e199aef18c2052c08171129633233ab98f5
 https://github.com/llvm/llvm-project/commit/eab23e199aef18c2052c08171129633233ab98f5
 Author: Craig Topper <craig.topper at sifive.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp

 Log Message:
 -----------
 [RISCV] Don't add Zilsd pairing hints if other part of the pair is reserved. (#169538)


 Commit: ebe40066545fd0ad2e88c5e48b7751195d9a9eca
 https://github.com/llvm/llvm-project/commit/ebe40066545fd0ad2e88c5e48b7751195d9a9eca
 Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M mlir/lib/Dialect/GPU/Pipelines/CMakeLists.txt

 Log Message:
 -----------
 [mlir] Fix build failure with BUILD_SHARED_LIBS=ON

/usr/bin/ld: tools/mlir/lib/Dialect/GPU/Pipelines/CMakeFiles/obj.MLIRGP
UPipelines.dir/GPUToXeVMPipeline.cpp.o: in function `mlir::gpu::buildLo
werToXeVMPassPipeline(mlir::OpPassManager&, mlir::gpu::GPUToXeVMPipelin
eOptions const&)':
GPUToXeVMPipeline.cpp:(.text._ZN4mlir3gpu28buildLowerToXeVMPassPipeline
ERNS_13OpPassManagerERKNS0_24GPUToXeVMPipelineOptionsE+0x1293): undefin
ed reference to `mlir::createConvertVectorToLLVMPass()'


 Commit: 6c48fbc1dcfbd44a47f126f21e575340b67aac06
 https://github.com/llvm/llvm-project/commit/6c48fbc1dcfbd44a47f126f21e575340b67aac06
 Author: Maksim Panchenko <maks at fb.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M bolt/test/X86/lit.local.cfg
 M bolt/test/lit.local.cfg

 Log Message:
 -----------
 [BOLT][Tests] Use AT&T assembler syntax only for X86 tests (#169541)

Enabling AT&T syntax for all tests is broken when X86 target is not
enabled as reported in #167225.


 Commit: 0917a38c694bd2558b79c2b6d51fee2308dd94dd
 https://github.com/llvm/llvm-project/commit/0917a38c694bd2558b79c2b6d51fee2308dd94dd
 Author: Kazu Hirata <kazu at google.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/PowerPC/PPCISelLowering.cpp

 Log Message:
 -----------
 [PowerPC] Fix a warning

This patch fixes:

 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:15676:17: error: unused
 variable 'CC' [-Werror,-Wunused-variable]


 Commit: af0fcf85c812867c1d03f390d5afbbbc5b7f1584
 https://github.com/llvm/llvm-project/commit/af0fcf85c812867c1d03f390d5afbbbc5b7f1584
 Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M mlir/include/mlir/TableGen/Pattern.h
 M mlir/lib/TableGen/Pattern.cpp
 M mlir/tools/mlir-tblgen/RewriterGen.cpp

 Log Message:
 -----------
 [mlir][tblgen] Don't echo absolute paths into rewrite pattern source (#168984)

Currently, the declarative pattern rewrite generator will always print
the [source]:[line](s) from which a pattern came. This is a useful
debugging hint, but it causes problem when absolute paths are used as
arguments to mlir-tblgen (which LLVM's build rules automatically do).
Specifially, it causes the source to be tied to the build location,
harning reproducability and our collective ability to get ccache hits
from, say, separate worktrees.

This commit resolves the issue by replacing absolute paths in thes
"Generated from:" comments with their filenames. (The alternative would
have been to implement an entire file-prefix-map the way the C compilers
do, but since this is an isolated incident, I chose to resolve it
locally.)


 Commit: 36947982106686570383945c2bbf367f447d9edc
 https://github.com/llvm/llvm-project/commit/36947982106686570383945c2bbf367f447d9edc
 Author: Sergei Druzhkov <serzhdruzhok at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
 M lldb/test/API/tools/lldb-dap/evaluate/TestDAP_evaluate.py
 M lldb/tools/lldb-dap/Handler/EvaluateRequestHandler.cpp
 M lldb/tools/lldb-dap/Protocol/ProtocolTypes.h

 Log Message:
 -----------
 [lldb-dap] Add format support for evaluate request (#169132)

This patch adds support for format option in the `evaluate` request
according to
[DAP](https://microsoft.github.io/debug-adapter-protocol/specification#Requests_Evaluate)
specification. Also, fixed typo in `LLDB_DAP_INVALID_VARRERF` constant.


 Commit: 0f941f6866910e55e0e7cff30c48740477be0cd8
 https://github.com/llvm/llvm-project/commit/0f941f6866910e55e0e7cff30c48740477be0cd8
 Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
 M flang/test/Fir/CUDA/cuda-alloc-free.fir

 Log Message:
 -----------
 [flang][cuda] Add support to allocate scalar character types (#169550)

Add support for character declared like: 

```
subroutine sub1()
 character*4, device :: b
end subroutine
```


 Commit: ad3d9fb3cab7f2e9a7337ca3c1bd0018ff6c6158
 https://github.com/llvm/llvm-project/commit/ad3d9fb3cab7f2e9a7337ca3c1bd0018ff6c6158
 Author: Petr Penzin <ppenzin at tenstorrent.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/RISCV/RISCVSchedTTAscalonD8.td
 M llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/fp.s
 M llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/fx.s
 A llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/vdiv_vsqrt.s
 A llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/vislide-vx.s
 A llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/vle-vse-vlm.s
 A llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/vlse-vsse.s
 A llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/vlseg-vsseg.s
 A llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/vlxe-vsxe.s
 A llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/vmv.s
 A llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/vreduce.s
 A llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/vrgather-vcompress.s
 A llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/vshift-vmul.s

 Log Message:
 -----------
 [RISCV] tt-ascalon-d8 vector scheduling (#167066)

Add the vector scheduling model for tt-ascalon-d8 and corresponding
llvm-mca tests.

---------

Co-authored-by: Craig Topper <craig.topper at sifive.com>


 Commit: 8d920725ca56930d301df1c7e090905423645a49
 https://github.com/llvm/llvm-project/commit/8d920725ca56930d301df1c7e090905423645a49
 Author: Sam Elliott <aelliott at qti.qualcomm.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
 M llvm/test/CodeGen/RISCV/double-maximum-minimum.ll
 M llvm/test/CodeGen/RISCV/double-select-fcmp.ll
 M llvm/test/CodeGen/RISCV/double-select-icmp.ll
 M llvm/test/CodeGen/RISCV/fold-addi-loadstore-zilsd.ll
 M llvm/test/CodeGen/RISCV/make-compressible-zilsd.mir

 Log Message:
 -----------
 [RISCV] Use FMV.D for moving GPRPairs on RV32_Zdinx (#169556)

This is noted by the specification, and should save a dynamic
instruction.

Code size should be no worse than before, as the pairs of moves can
usually be turned into two 16-bit moves, but `fmv.d` is always a 32-bit
instruction.

LLVM can look through a `FSGNJ_D_IN32X`, in
`RISCVInstrInfo::isCopyInstrImpl` which helps copy propagation.


 Commit: dbcf5688cca37543ea3304be68516b3ac476eef3
 https://github.com/llvm/llvm-project/commit/dbcf5688cca37543ea3304be68516b3ac476eef3
 Author: Jay Foad <jay.foad at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AMDGPU/SIInstrInfo.td
 M llvm/lib/Target/AMDGPU/VOP3Instructions.td

 Log Message:
 -----------
 [AMDGPU] Simplify VT comparisons. NFC. (#169526)

Automated with `sed -i 's/\.Value//g' lib/Target/AMDGPU/*.td` plus a
tiny bit of manual reformatting.


 Commit: 1c9368e01e6ed45e7dbc523d3bddfd900bb6e504
 https://github.com/llvm/llvm-project/commit/1c9368e01e6ed45e7dbc523d3bddfd900bb6e504
 Author: Andy Kaylor <akaylor at nvidia.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/lib/CIR/CodeGen/CIRGenCXXABI.h
 M clang/lib/CIR/CodeGen/CIRGenClass.cpp
 M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
 A clang/test/CIR/CodeGen/copy-constructor.cpp

 Log Message:
 -----------
 [CIR] Upstream non-record array init handling (#169429)

This upstreams the code to handle member initialization for non-record
arrays.


 Commit: c475f8e5d809e2109a67c8523472eb28cd7bbb2a
 https://github.com/llvm/llvm-project/commit/c475f8e5d809e2109a67c8523472eb28cd7bbb2a
 Author: Helena Kotas <hekotas at microsoft.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/lib/CodeGen/CGExpr.cpp
 M clang/test/CodeGenHLSL/BasicFeatures/OutputArguments.hlsl
 M clang/test/CodeGenHLSL/builtins/ScalarSwizzles.hlsl
 A clang/test/CodeGenHLSL/builtins/VectorSwizzles.hlsl

 Log Message:
 -----------
 [HLSL] Update vector swizzle elements individually (#169090)

When individual elements of a vector are updated via vector swizzle, it needs to be handled as separate store operations to the individual vector elements.

Clang treats vectors as one unit, so if a part of a vector needs to be updated, the whole vector is loaded, some elements modified, and then the whole vector is stored.

In HLSL vector elements are handled separately. We need to avoid this load/modify/store sequence to prevent overwriting other vector elements that might be getting updated in parallel.

Fixes #152815


 Commit: 091aece72b0149bda6d465301fe3934ca570a592
 https://github.com/llvm/llvm-project/commit/091aece72b0149bda6d465301fe3934ca570a592
 Author: Florian Hahn <flo at fhahn.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp

 Log Message:
 -----------
 [VPlan] Remove redundant transferFlags call from replicateByVF (NFC).

Flags are now passed on construction/cloning. Remove unnecessary
transferFlags call, and make code independent of VPRecipeWithIRFlags, to
support additional recipes in the future.


 Commit: 00ffc70ba154b8670fc37d1398ce4473bca3a516
 https://github.com/llvm/llvm-project/commit/00ffc70ba154b8670fc37d1398ce4473bca3a516
 Author: Alexey Bataev <a.bataev at outlook.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 A llvm/test/Transforms/SLPVectorizer/X86/non-commutative-op-in-commutative-inst.ll

 Log Message:
 -----------
 [SLP][NFC]Add a test with commutative instruction with non-commutative op, NFC


 Commit: 074d17e9c8cbc6f22e65ba1211787453ea629ccb
 https://github.com/llvm/llvm-project/commit/074d17e9c8cbc6f22e65ba1211787453ea629ccb
 Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M compiler-rt/lib/scudo/standalone/tsd_shared.h

 Log Message:
 -----------
 [scudo] Lock/unlock MutexTSDs in disable/enable. (#169440)

It is possible that a fork could occur while MutexTSDs is being held and
then cause a deadlock in a forked process when something attempts to
lock it again. Instead add it to the enable/disable list of mutexes.


 Commit: e894654532a74b669b0b0830007cc6c979b35d56
 https://github.com/llvm/llvm-project/commit/e894654532a74b669b0b0830007cc6c979b35d56
 Author: Florian Hahn <flo at fhahn.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 A llvm/test/Analysis/ScalarEvolution/addrec-may-wrap-udiv-canonicalize.ll

 Log Message:
 -----------
 [SCEV] Add tests for UDiv canonicalization of AddRecs that may wrap.

Add test cases for canonicalizing AddRecs that may wrap.


 Commit: 9bf78ab8dd17ecbbecd4157c67e8fb4d95528194
 https://github.com/llvm/llvm-project/commit/9bf78ab8dd17ecbbecd4157c67e8fb4d95528194
 Author: Md Abdullah Shahneous Bari <98356296+mshahneo at users.noreply.github.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp

 Log Message:
 -----------
 Revert "[GPUToXeVMPipeline][Pipeline] Modify pipeline to add `convert-vector-to-llvm`." (#169570)

Reverts llvm/llvm-project#166204

There was a build issue due to a missing dependency.


 Commit: 49828c23b59959ca9f2c0dc83aeb9ce7f84b5c31
 https://github.com/llvm/llvm-project/commit/49828c23b59959ca9f2c0dc83aeb9ce7f84b5c31
 Author: Haowei <haowei at google.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/cmake/caches/Fuchsia-stage2.cmake
 M clang/cmake/caches/Fuchsia.cmake

 Log Message:
 -----------
 [Fuchsia] Bump minimal OS X target to 11.0 (#169568)

libcxx requires minimal macOS 11 to build. This patch bumps the minimal
OS X target in Fuchsia's cmake cache file to 11.0 to satisfy this
requirement.


 Commit: 4f39a4ff0ada92870ca1c2dccad382ea04947da8
 https://github.com/llvm/llvm-project/commit/4f39a4ff0ada92870ca1c2dccad382ea04947da8
 Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.h
 M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
 M mlir/include/mlir/Dialect/OpenACC/OpenACCOpsInterfaces.td
 M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
 M mlir/unittests/Dialect/OpenACC/OpenACCOpsInterfacesTest.cpp

 Log Message:
 -----------
 [acc][flang] Add getInitRegion() to GlobalVariableOpInterface (#169569)

Some globals (e.g., fir.global) have initialization regions that may
transitively reference other globals or type descriptors. Add
getInitRegion() to GlobalVariableOpInterface to retrieve these regions,
returning Region* (nullptr if the global uses attributes for
initialization, as with memref.global).


 Commit: 5f777b2c8faca3fe28079fc81a7aefbca1edb803
 https://github.com/llvm/llvm-project/commit/5f777b2c8faca3fe28079fc81a7aefbca1edb803
 Author: daniilavdeev <daniilavdeev237 at gmail.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/include/llvm/MC/MCSymbol.h
 M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
 M llvm/lib/MC/MCSymbol.cpp
 A llvm/test/DebugInfo/RISCV/relax_dwo_ranges.ll

 Log Message:
 -----------
 [dwarf] make dwarf fission compatible with RISCV relaxations 1/2 (#166597)

Currently, -gsplit-dwarf and -mrelax are incompatible options in Clang.
The issue is that .dwo files should not contain any relocations, as they
are not processed by the linker. However, relaxable code emits
relocations in DWARF for debug ranges that reside in the .dwo file when
DWARF fission is enabled.

This patch makes DWARF fission compatible with RISC-V relaxations. It
uses the StartxEndx DWARF forms in .debug_rnglists.dwo, which allow
referencing addresses from .debug_addr instead of using absolute
addresses. This approach eliminates relocations from .dwo files.


 Commit: 97023fba5546f9d0e762ccbca89cbb8324a9131a
 https://github.com/llvm/llvm-project/commit/97023fba5546f9d0e762ccbca89cbb8324a9131a
 Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/include/clang/CIR/MissingFeatures.h
 M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
 M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
 M clang/lib/CIR/CodeGen/CIRGenFunction.h
 M clang/test/CIR/CodeGen/coro-task.cpp

 Log Message:
 -----------
 [CIR] Emit ready and suspend branches for cir.await (#168814)

This PR adds codegen for `cir.await` ready and suspend. One notable
difference from the classic codegen is that, in the suspend branch, it
emits an `AwaitSuspendWrapper`(`.__await_suspend_wrapper__init`)
function that is always inlined. This function wraps the suspend logic
inside an internal wrapper that gets inlined. Example here:
https://godbolt.org/z/rWYGcaaG4


 Commit: ebf5d9ef7de29b55fd9e9d504f83689b4013e0de
 https://github.com/llvm/llvm-project/commit/ebf5d9ef7de29b55fd9e9d504f83689b4013e0de
 Author: Alan Li <me at alanli.org>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Scalar/StraightLineStrengthReduce.cpp
 M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
 M llvm/test/CodeGen/AMDGPU/dagcombine-reassociate-bug.ll
 M llvm/test/CodeGen/AMDGPU/idot2.ll
 M llvm/test/CodeGen/AMDGPU/idot4s.ll
 M llvm/test/CodeGen/AMDGPU/idot8u.ll
 M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
 M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
 M llvm/test/CodeGen/AMDGPU/waitcnt-vscnt.ll
 M llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/pr23975.ll
 M llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/reassociate-geps-and-slsr-addrspace.ll
 R llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/slsr-i8-gep.ll
 R llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/slsr-var-delta.ll
 R llvm/test/Transforms/StraightLineStrengthReduce/path-compression.ll
 R llvm/test/Transforms/StraightLineStrengthReduce/pick-candidate.ll
 M llvm/test/Transforms/StraightLineStrengthReduce/slsr-add.ll
 M llvm/test/Transforms/StraightLineStrengthReduce/slsr-gep.ll

 Log Message:
 -----------
 Revert "Redesign Straight-Line Strength Reduction (SLSR) (#162930)" (#169546)

This reverts commit f67409c3ec7cd45c55656c8159bc42b3918f1116.

cc @fiigii 
Including us, several separate groups are experiencing regressions with
this change. This is the smallest reproducer pasted by @akuegel :
https://github.com/llvm/llvm-project/pull/162930#issuecomment-3574307330


 Commit: 9534ed9f30043318798a9544461bc174e273e1f3
 https://github.com/llvm/llvm-project/commit/9534ed9f30043318798a9544461bc174e273e1f3
 Author: Lang Hames <lhames at gmail.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M orc-rt/include/orc-rt/Error.h
 M orc-rt/unittests/ErrorTest.cpp

 Log Message:
 -----------
 [orc-rt] Add ErrorAsOutParameter convenience constructor. (#169467)

Allows construction of ErrorAsOutParameters from Error references.


 Commit: fd22706e937f7d2563cfa0e433dd735cc5284599
 https://github.com/llvm/llvm-project/commit/fd22706e937f7d2563cfa0e433dd735cc5284599
 Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M flang/lib/Lower/OpenMP/OpenMP.cpp
 M flang/lib/Lower/OpenMP/Utils.cpp
 M flang/lib/Lower/OpenMP/Utils.h
 A flang/test/Lower/OpenMP/compiler-directives-loop.f90

 Log Message:
 -----------
 [flang][OpenMP] Skip compiler directives in getCollapsedLoopEval (#169565)

Use `getNestedDoConstruct` from Utils to get the nested DoConstructs.

Fixes https://github.com/llvm/llvm-project/issues/169532


 Commit: f7a9fcad99e155fed32d98a2d41d1e3bfdeebf48
 https://github.com/llvm/llvm-project/commit/f7a9fcad99e155fed32d98a2d41d1e3bfdeebf48
 Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M flang/include/flang/Optimizer/Builder/CUDAIntrinsicCall.h
 M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
 M flang/test/Lower/CUDA/cuda-atomicadd.cuf

 Log Message:
 -----------
 [flang][cuda] Use PTX instruction for atomicAdd with 4xf32 (#169581)

Implementation similar to the clang one in
`clang/lib/Headers/__clang_cuda_intrinsics.h`


 Commit: 1c034a372403d539700292cd564773ef3531a423
 https://github.com/llvm/llvm-project/commit/1c034a372403d539700292cd564773ef3531a423
 Author: Florian Mayer <fmayer at google.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/test/CodeGen/cfi-icall-trap-recover-runtime.c
 M clang/test/CodeGenCXX/cfi-vcall-trap-recover-runtime.cpp

 Log Message:
 -----------
 [compiler-rt] [UBsan] precommit test (#169579)


 Commit: 9c414c428d8464c829d551d0d91029339e746842
 https://github.com/llvm/llvm-project/commit/9c414c428d8464c829d551d0d91029339e746842
 Author: Aiden Grossman <aidengrossman at google.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang-tools-extra/clangd/test/CMakeLists.txt
 M clang-tools-extra/clangd/test/include-cleaner-batch-fix.test
 M clang-tools-extra/clangd/test/index-tools.test
 M clang-tools-extra/clangd/test/system-include-extractor.test

 Log Message:
 -----------
 [clangd] Make lit tests work with the internal shell

This makes all of the clangd tests work with the internal shell.
Modifications needed for each test are as follows:
1. system-include-extractor.test was using variable expansion which is
 not supported in the internal shell. This patch rewrites it to use
 the readfile mechanism along with python. This isn't super pretty but
 is readily understandable and there are only two tests across the
 monorepo that use this construction, so making it prettier is hard to
 justify.
2. include-cleaner-batch-fix.test - Was using $'' construction to create
 new lines in a string. Simply replace it with multiple echo commands
 to be canonical with the rest of the repository.
3. index-tools.test - Just add IndexBenchmark to the clangd test
 depends, so the test now just works unconditionally. This should
 significantly increase test coverage at little cost.

Reviewers: ilovepi, HighCommander4, petrhosek, kadircet

Reviewed By: ilovepi

Pull Request: https://github.com/llvm/llvm-project/pull/169539


 Commit: c51c382c8752e7ba5049ed3662fefb9ffe9283c3
 https://github.com/llvm/llvm-project/commit/c51c382c8752e7ba5049ed3662fefb9ffe9283c3
 Author: Aiden Grossman <aidengrossman at google.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang-tools-extra/clangd/test/lit.cfg.py

 Log Message:
 -----------
 [clangd] Enable lit internal shell by default

Enable it now that all of the tests pass under the internal shell. The
internal shell is slightly faster (10-15%) and also provides a better
debugging experience.

Reviewers: petrhosek, ilovepi, kadircet, HighCommander4

Reviewed By: ilovepi

Pull Request: https://github.com/llvm/llvm-project/pull/169540


 Commit: 4cfbc44ebe26692c209655c37aeb0b6cbf1d479b
 https://github.com/llvm/llvm-project/commit/4cfbc44ebe26692c209655c37aeb0b6cbf1d479b
 Author: Aiden Grossman <aidengrossman at google.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang-tools-extra/clangd/test/lit.cfg.py

 Log Message:
 -----------
 Revert "[clangd] Enable lit internal shell by default"

This reverts commit c51c382c8752e7ba5049ed3662fefb9ffe9283c3.

This breaks at least one buildbot:
1. https://lab.llvm.org/buildbot/#/builders/134/builds/30460


 Commit: bd04ef6df50e8e6e5212762fc798ea9fbdcfc897
 https://github.com/llvm/llvm-project/commit/bd04ef6df50e8e6e5212762fc798ea9fbdcfc897
 Author: Aiden Grossman <aidengrossman at google.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang-tools-extra/clangd/test/CMakeLists.txt
 M clang-tools-extra/clangd/test/include-cleaner-batch-fix.test
 M clang-tools-extra/clangd/test/index-tools.test
 M clang-tools-extra/clangd/test/system-include-extractor.test

 Log Message:
 -----------
 Revert "[clangd] Make lit tests work with the internal shell"

This reverts commit 9c414c428d8464c829d551d0d91029339e746842.

This one is causing buildbot failures too at CMake configure time:
1. https://lab.llvm.org/buildbot/#/builders/193/builds/12452


 Commit: 3f22ed1152c4c00e95381368ec7d88878f2fd9f9
 https://github.com/llvm/llvm-project/commit/3f22ed1152c4c00e95381368ec7d88878f2fd9f9
 Author: Alex Duran <alejandro.duran at intel.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M offload/include/OpenMP/InteropAPI.h
 M offload/include/PerThreadTable.h

 Log Message:
 -----------
 [OFFLOAD] Add support for indexed per-thread containers (#164263)

Split from #158900 it adds a PerThreadContainer that can use STL-like
indexed containers based on a slightly refactored PerThreadTable.

---------

Co-authored-by: Joseph Huber <huberjn at outlook.com>


 Commit: 5d38cddc3b00b428f848fdeddc8334c4560db36a
 https://github.com/llvm/llvm-project/commit/5d38cddc3b00b428f848fdeddc8334c4560db36a
 Author: Wenju He <wenju.he at intel.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/docs/LanguageExtensions.rst
 M clang/docs/ReleaseNotes.rst
 M clang/include/clang/Basic/Builtins.td
 M clang/lib/AST/Expr.cpp
 M clang/lib/CodeGen/CGAtomic.cpp
 M clang/lib/Sema/SemaChecking.cpp
 M clang/test/CodeGen/scoped-atomic-ops.c
 M clang/test/Sema/scoped-atomic-ops.c

 Log Message:
 -----------
 [Clang] Add __scoped_atomic_uinc_wrap and __scoped_atomic_udec_wrap builtins (#168666)

This PR extends __scoped_atomic builtins with inc and dec functions.
They map to LLVM IR `atomicrmw uinc_wrap` and `atomicrmw udec_wrap`.
These enable implementation of OpenCL-style atomic_inc / atomic_dec with
wrap semantics on targets supporting scoped atomics (e.g. GPUs).

---------

Co-authored-by: Copilot <175728472+Copilot at users.noreply.github.com>


 Commit: d889b97f2b1cd7264a5a225edd7daf18c3709bfa
 https://github.com/llvm/llvm-project/commit/d889b97f2b1cd7264a5a225edd7daf18c3709bfa
 Author: Brandon Wu <brandon.wu at sifive.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
 M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
 M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
 M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
 M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll

 Log Message:
 -----------
 [RISCV][llvm] Support BUILD_VECTOR codegen for P extension (#169083)


 Commit: 44c8a011764ae5fb9178d938fc3f1f1bf76bfe49
 https://github.com/llvm/llvm-project/commit/44c8a011764ae5fb9178d938fc3f1f1bf76bfe49
 Author: Florian Mayer <fmayer at google.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/test/CodeGen/cfi-icall-trap-recover-runtime.c
 M clang/test/CodeGenCXX/cfi-vcall-trap-recover-runtime.cpp

 Log Message:
 -----------
 [compiler-rt] [UBSan] remove unneeded test cases (#169594)

the target handling will be done in the driver, so removing codegen
tests.


 Commit: 175168c620d6a62ab7360693c6415cc1ab1eeb4b
 https://github.com/llvm/llvm-project/commit/175168c620d6a62ab7360693c6415cc1ab1eeb4b
 Author: Aiden Grossman <aidengrossman at google.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/lib/Analysis/ThreadSafety.cpp
 A clang/test/SemaCXX/no-warn-thread-safety-analysis.cpp

 Log Message:
 -----------
 [Analysis] Make ThreadSafety correctly handle base class destructors (#169593)


 Commit: 40f21a7b2f3e7d034cac4a981b09c1a0049df427
 https://github.com/llvm/llvm-project/commit/40f21a7b2f3e7d034cac4a981b09c1a0049df427
 Author: Brandon Wu <brandon.wu at sifive.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
 M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
 M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
 M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll

 Log Message:
 -----------
 [llvm][RISCV] Support P Extension CodeGen (#167895)

This patch supports: PSLLI_B, PSLLI_H, PSLLI_W, PSSLAI_H and PSSLAI_W


 Commit: 1ea4aa1b91553847ab155f7ed6c22d392d06b38e
 https://github.com/llvm/llvm-project/commit/1ea4aa1b91553847ab155f7ed6c22d392d06b38e
 Author: Wenju He <wenju.he at intel.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M libclc/clc/lib/generic/atomic/clc_atomic_dec.cl
 M libclc/clc/lib/generic/atomic/clc_atomic_def.inc
 M libclc/clc/lib/generic/atomic/clc_atomic_inc.cl

 Log Message:
 -----------
 [libclc] Use __scoped_atomic_udec/uinc_wrap to implement _clc_atomic_dec/inc (#168327)


 Commit: 222ba6f5ce96d3612b7f62aeacd1d5599fbb8141
 https://github.com/llvm/llvm-project/commit/222ba6f5ce96d3612b7f62aeacd1d5599fbb8141
 Author: Jan Voung <jvoung at google.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M clang/lib/Analysis/FlowSensitive/Transfer.cpp
 M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp

 Log Message:
 -----------
 [clang][dataflow] Handle more glvalue cases of the ConditionalOperator transfer (#168994)

In the dataflow framework, the builtin transfer function currently only
handles the GLValue result case of ConditionalOperator when the
true and false expression StorageLocations are exactly the same.

Ideally / we have wanted to introduce alias sets to handle when the Locs
are different. However, that is a larger change to the framework
(and we may need to introduce weak updates).

For now, do something simpler to at least handle when the GLValue is
immediately cast to an RValue, by making up a distinct StorageLocation
that holds the join of the true and false expression values (when not a
record). This seems like the most common case, so seems worth covering.
The case when an LValue is needed and can be updated later (and
thus needs a link to the original storage locations) seems more rare,
and we currently do not handle such updates either, so this intermediate
step is no different (for that case).


 Commit: bfc732efbda2dc1caa78de89600834c083bedd83
 https://github.com/llvm/llvm-project/commit/bfc732efbda2dc1caa78de89600834c083bedd83
 Author: Lang Hames <lhames at gmail.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M orc-rt/include/orc-rt/Session.h
 M orc-rt/lib/executor/Session.cpp
 M orc-rt/unittests/SessionTest.cpp

 Log Message:
 -----------
 [orc-rt] Add ControllerAccess interface. (#169598)

ControllerAccess provides an abstract interface for bidirectional RPC
between the executor (running JIT'd code) and the controller (containing
the llvm::orc::ExecutionSession). ControllerAccess implementations are
expected to implement IPC / RPC using a concrete communication method
(shared memory, pipes, sockets, native system IPC, etc).

Calls from executor to controller are made via callController, with
"handler tags" (addresses in the executor) specifying the target handler
in the controller. A handler must be associated in the controller with
the given tag for the call to succeed. This ensures that only registered
entry points in the controller can be used, and avoids leaking
controller addresses into the executor.

Calls in both directions are to "wrapper functions" that take a buffer
of bytes as input and return a buffer of bytes as output. In the ORC
runtime these must be `orc_rt_WrapperFunction`s (see
Session::handleWrapperCall). The interpretation of the byte buffers is
up to the wrapper functions: the ORC runtime imposes no restrictions on
how the bytes are to be interpreted.

ControllerAccess objects may be detached from the Session prior to
Session shutdown, in which case no further calls may be made in either
direction, and any pending results (from calls made that haven't
returned yet) should return errors. If the ControllerAccess class is
still attached at Session shutdown time it will be detached as part of
the shutdown process. The ControllerAccess::disconnect method must
support concurrent entry on multiple threads, and all callers must block
until they can guarantee that no further calls will be received or
accepted.


 Commit: e81a564cb0031e93d34a941224b14ec73c69bf65
 https://github.com/llvm/llvm-project/commit/e81a564cb0031e93d34a941224b14ec73c69bf65
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/test/tools/opt/invalid-target.ll
 M llvm/tools/opt/optdriver.cpp

 Log Message:
 -----------
 opt: Stop creating TargetMachine to infer the datalayout (#169585)

The Triple directly has the datalayout string in it, so just
use that.

The logical flow here is kind of a mess. We were constructing
a temporary target machine in the asm parser to infer the datalayout,
throwing it away, and then creating another target machine for the
actual compilation. The flow of the Triple construction is still
convoluted, but we can at least drop the TargetMachine.


 Commit: 76ec25f729fcc7ae576caf21293cc393e68e7cf7
 https://github.com/llvm/llvm-project/commit/76ec25f729fcc7ae576caf21293cc393e68e7cf7
 Author: Lang Hames <lhames at gmail.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/include/llvm/ExecutionEngine/Orc/WaitingOnGraph.h

 Log Message:
 -----------
 [ORC] Pass FailedSNs by const-ref. NFCI. (#169600)

Avoids a vector copy.


 Commit: 4e7c65e85f47443ab3af729e5cf8e693081abb87
 https://github.com/llvm/llvm-project/commit/4e7c65e85f47443ab3af729e5cf8e693081abb87
 Author: Craig Topper <craig.topper at sifive.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp

 Log Message:
 -----------
 [RISCV] Don't add duplicate Zilsd hints. (#169554)

This matches what ARM does. I'm not sure if there are any bad effects
from the duplicate hints. I have seen the duplicates hints in the debug
output and confirmed this removes them.


 Commit: a7f9a4db895561b7bf4a1b91fe306b29fd61af6c
 https://github.com/llvm/llvm-project/commit/a7f9a4db895561b7bf4a1b91fe306b29fd61af6c
 Author: Chinmay Deshpande <chdeshpa at amd.com>
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
 M llvm/test/CodeGen/AMDGPU/strict_fadd.f32.ll
 M llvm/test/CodeGen/AMDGPU/strict_fadd.f64.ll
 M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
 M llvm/test/CodeGen/AMDGPU/strict_fmul.f32.ll
 M llvm/test/CodeGen/AMDGPU/strict_fmul.f64.ll
 M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
 M llvm/test/CodeGen/AMDGPU/strict_fsub.f32.ll
 M llvm/test/CodeGen/AMDGPU/strict_fsub.f64.ll

 Log Message:
 -----------
 [AMDGPU] Update strict floating point tests to be more comprehensive (#169578)


 Commit: a57fe84af0679871d914e0d5fc3f449069f22a19
 https://github.com/llvm/llvm-project/commit/a57fe84af0679871d914e0d5fc3f449069f22a19
 Author: Timm Baeder <tbaeder at redhat.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/lib/AST/TextNodeDumper.cpp
 A clang/test/AST/ast-dump-APValue-addrlabeldiff.c

 Log Message:
 -----------
 [clang] Implement dump() for AddrLabelDiff APValues (#169505)


 Commit: 8396d4c10e98fedba5d8f6861087078b2de49674
 https://github.com/llvm/llvm-project/commit/8396d4c10e98fedba5d8f6861087078b2de49674
 Author: Timm Baeder <tbaeder at redhat.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/lib/AST/ByteCode/Integral.h

 Log Message:
 -----------
 [clang][bytecode][NFC] Clean up Integral::from() functions (#169513)


 Commit: 6459f39c377dc8b7d5d81ef365553c8625fb4def
 https://github.com/llvm/llvm-project/commit/6459f39c377dc8b7d5d81ef365553c8625fb4def
 Author: Timm Baeder <tbaeder at redhat.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/lib/AST/ByteCode/BitcastBuffer.h
 M clang/lib/AST/ByteCode/InterpBuiltin.cpp

 Log Message:
 -----------
 [clang][bytecode] Add some convenience API to BitcastBuffer (#169516)

So we check the offsets before using them.


 Commit: 00aca530b1e49281f461965a304a8a36cb41142d
 https://github.com/llvm/llvm-project/commit/00aca530b1e49281f461965a304a8a36cb41142d
 Author: Dominik Adamski <dominik.adamski at amd.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M flang-rt/cmake/modules/HandleLibs.cmake

 Log Message:
 -----------
 [Flang-rt] Remove COMPILE_ONLY from flang-rt CMake file. (#169534)

COMPILE_ONLY was introduced in cmake 3.27.0. We cannot use this feature,
because LLVM supports cmake 3.20.0.


 Commit: e04c01bcc91226d632f81bd3290c180deb0b6db8
 https://github.com/llvm/llvm-project/commit/e04c01bcc91226d632f81bd3290c180deb0b6db8
 Author: Fangrui Song 
 Date: 2025-11-25 (Tue, 25 Nov 2025)

 Changed paths:
 M llvm/include/llvm/MC/MCObjectStreamer.h
 M llvm/lib/MC/MCELFStreamer.cpp
 M llvm/lib/MC/MCMachOStreamer.cpp
 M llvm/lib/MC/MCObjectStreamer.cpp
 M llvm/lib/MC/MCWasmStreamer.cpp
 M llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFStreamer.cpp
 M llvm/lib/Target/ARM/MCTargetDesc/ARMWinCOFFStreamer.cpp
 M llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFStreamer.cpp

 Log Message:
 -----------
 MC: Remove unneeded parameter `MCAsmBackend *`. NFC


 Commit: 97732ddb5d921a7d5cd6ffc2a23438b607c0d3f6
 https://github.com/llvm/llvm-project/commit/97732ddb5d921a7d5cd6ffc2a23438b607c0d3f6
 Author: Timm Baeder <tbaeder at redhat.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/lib/AST/ByteCode/Program.cpp
 M clang/lib/AST/ByteCode/Program.h

 Log Message:
 -----------
 [clang][bytecode][NFC] Make Program::getNativePointer() const (#169502)


 Commit: e493e90a890d92cb13090710d74bb16b3e1075f8
 https://github.com/llvm/llvm-project/commit/e493e90a890d92cb13090710d74bb16b3e1075f8
 Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp

 Log Message:
 -----------
 [lldb][NFC] Fix incorrect comments in TestArm64InstEmulation


 Commit: 93f2deb1d0a886672683e1e6df9797d11cddf7c5
 https://github.com/llvm/llvm-project/commit/93f2deb1d0a886672683e1e6df9797d11cddf7c5
 Author: Jianjian Guan <jacquesguan at me.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/test/CodeGen/RISCV/GlobalISel/double-arith.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/double-intrinsics.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/float-arith.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/iabs.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vacopy.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vararg.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/rotl-rotr.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb-zbkb.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb-zbkb.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vadd.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vfadd.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vle.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vlm.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vloxei-rv64.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vloxei.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vlse.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vluxei-rv64.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vluxei.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vse.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vsm.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vsoxei-rv64.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vsoxei.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vsse.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vsuxei-rv64.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/rvv/vsuxei.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/shifts.ll
 M llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
 M llvm/test/CodeGen/RISCV/abds-neg.ll
 M llvm/test/CodeGen/RISCV/abds.ll
 M llvm/test/CodeGen/RISCV/abdu-neg.ll
 M llvm/test/CodeGen/RISCV/abdu.ll
 M llvm/test/CodeGen/RISCV/addcarry.ll
 M llvm/test/CodeGen/RISCV/alloca.ll
 M llvm/test/CodeGen/RISCV/allow-check.ll
 M llvm/test/CodeGen/RISCV/arith-with-overflow.ll
 M llvm/test/CodeGen/RISCV/atomic-signext.ll
 M llvm/test/CodeGen/RISCV/bfloat-arith.ll
 M llvm/test/CodeGen/RISCV/bfloat-convert.ll
 M llvm/test/CodeGen/RISCV/bitreverse-shift.ll
 M llvm/test/CodeGen/RISCV/bswap-bitreverse.ll
 M llvm/test/CodeGen/RISCV/bswap-shift.ll
 M llvm/test/CodeGen/RISCV/clear-cache.ll
 M llvm/test/CodeGen/RISCV/copy-frameindex.mir
 M llvm/test/CodeGen/RISCV/copysign-casts.ll
 M llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll
 M llvm/test/CodeGen/RISCV/ctz_zero_return_test.ll
 M llvm/test/CodeGen/RISCV/double-arith-strict.ll
 M llvm/test/CodeGen/RISCV/double-arith.ll
 M llvm/test/CodeGen/RISCV/double-bitmanip-dagcombines.ll
 M llvm/test/CodeGen/RISCV/double-convert-strict.ll
 M llvm/test/CodeGen/RISCV/double-convert.ll
 M llvm/test/CodeGen/RISCV/double-fcmp-strict.ll
 M llvm/test/CodeGen/RISCV/double-intrinsics-strict.ll
 M llvm/test/CodeGen/RISCV/double-intrinsics.ll
 M llvm/test/CodeGen/RISCV/double-maximum-minimum.ll
 M llvm/test/CodeGen/RISCV/double-round-conv-sat.ll
 M llvm/test/CodeGen/RISCV/double-round-conv.ll
 M llvm/test/CodeGen/RISCV/double-zfa.ll
 M llvm/test/CodeGen/RISCV/double_reduct.ll
 M llvm/test/CodeGen/RISCV/early-clobber-tied-def-subreg-liveness.ll
 M llvm/test/CodeGen/RISCV/eh-dwarf-cfa.ll
 M llvm/test/CodeGen/RISCV/fixed-csr.ll
 M llvm/test/CodeGen/RISCV/float-arith-strict.ll
 M llvm/test/CodeGen/RISCV/float-arith.ll
 M llvm/test/CodeGen/RISCV/float-bitmanip-dagcombines.ll
 M llvm/test/CodeGen/RISCV/float-convert-strict.ll
 M llvm/test/CodeGen/RISCV/float-convert.ll
 M llvm/test/CodeGen/RISCV/float-fcmp-strict.ll
 M llvm/test/CodeGen/RISCV/float-intrinsics-strict.ll
 M llvm/test/CodeGen/RISCV/float-intrinsics.ll
 M llvm/test/CodeGen/RISCV/float-maximum-minimum.ll
 M llvm/test/CodeGen/RISCV/float-round-conv-sat.ll
 M llvm/test/CodeGen/RISCV/float-round-conv.ll
 M llvm/test/CodeGen/RISCV/float-select-verify.ll
 M llvm/test/CodeGen/RISCV/float-zfa.ll
 M llvm/test/CodeGen/RISCV/flt-rounds.ll
 M llvm/test/CodeGen/RISCV/fmax-fmin.ll
 M llvm/test/CodeGen/RISCV/fp-fcanonicalize.ll
 M llvm/test/CodeGen/RISCV/fpclamptosat.ll
 M llvm/test/CodeGen/RISCV/fpenv.ll
 M llvm/test/CodeGen/RISCV/frame.ll
 M llvm/test/CodeGen/RISCV/frameaddr-returnaddr.ll
 M llvm/test/CodeGen/RISCV/frm-dependency.ll
 M llvm/test/CodeGen/RISCV/get-register-invalid.ll
 M llvm/test/CodeGen/RISCV/get-register-noreserve.ll
 M llvm/test/CodeGen/RISCV/get-register-reserve.ll
 M llvm/test/CodeGen/RISCV/half-arith-strict.ll
 M llvm/test/CodeGen/RISCV/half-arith.ll
 M llvm/test/CodeGen/RISCV/half-bitmanip-dagcombines.ll
 M llvm/test/CodeGen/RISCV/half-convert-strict.ll
 M llvm/test/CodeGen/RISCV/half-convert.ll
 M llvm/test/CodeGen/RISCV/half-fcmp-strict.ll
 M llvm/test/CodeGen/RISCV/half-intrinsics.ll
 M llvm/test/CodeGen/RISCV/half-maximum-minimum.ll
 M llvm/test/CodeGen/RISCV/half-round-conv-sat.ll
 M llvm/test/CodeGen/RISCV/half-round-conv.ll
 M llvm/test/CodeGen/RISCV/half-zfa.ll
 M llvm/test/CodeGen/RISCV/hwasan-check-memaccess.ll
 M llvm/test/CodeGen/RISCV/i64-icmp.ll
 M llvm/test/CodeGen/RISCV/iabs.ll
 M llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll
 M llvm/test/CodeGen/RISCV/intrinsic-cttz-elts.ll
 M llvm/test/CodeGen/RISCV/intrinsics/trap.ll
 M llvm/test/CodeGen/RISCV/libcall-tail-calls.ll
 M llvm/test/CodeGen/RISCV/live-sp.mir
 M llvm/test/CodeGen/RISCV/llvm.exp10.ll
 M llvm/test/CodeGen/RISCV/llvm.frexp.ll
 M llvm/test/CodeGen/RISCV/machine-combiner.ll
 M llvm/test/CodeGen/RISCV/machine-cse.ll
 M llvm/test/CodeGen/RISCV/machinelicm-constant-phys-reg.ll
 M llvm/test/CodeGen/RISCV/memcpy-inline.ll
 M llvm/test/CodeGen/RISCV/memcpy.ll
 M llvm/test/CodeGen/RISCV/memmove.ll
 M llvm/test/CodeGen/RISCV/memset-inline.ll
 M llvm/test/CodeGen/RISCV/min-max.ll
 M llvm/test/CodeGen/RISCV/miss-sp-restore-eh.ll
 M llvm/test/CodeGen/RISCV/module-target-abi3.ll
 M llvm/test/CodeGen/RISCV/neg-abs.ll
 M llvm/test/CodeGen/RISCV/overflow-intrinsic-optimizations.ll
 M llvm/test/CodeGen/RISCV/pei-crash.ll
 M llvm/test/CodeGen/RISCV/pr135206.ll
 M llvm/test/CodeGen/RISCV/pr56457.ll
 M llvm/test/CodeGen/RISCV/pr69586.ll
 M llvm/test/CodeGen/RISCV/pr92193.ll
 M llvm/test/CodeGen/RISCV/prefetch.ll
 M llvm/test/CodeGen/RISCV/push-pop-popret.ll
 M llvm/test/CodeGen/RISCV/readcyclecounter.ll
 M llvm/test/CodeGen/RISCV/readsteadycounter.ll
 M llvm/test/CodeGen/RISCV/redundant-copy-from-tail-duplicate.ll
 M llvm/test/CodeGen/RISCV/regalloc-last-chance-recoloring-failure.ll
 M llvm/test/CodeGen/RISCV/replace-with-veclib-sleef-scalable.ll
 M llvm/test/CodeGen/RISCV/riscv-zihintpause.ll
 M llvm/test/CodeGen/RISCV/rotl-rotr.ll
 M llvm/test/CodeGen/RISCV/rv32p.ll
 M llvm/test/CodeGen/RISCV/rv32xtheadbb.ll
 M llvm/test/CodeGen/RISCV/rv32zbb-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rv32zbb-zbkb.ll
 M llvm/test/CodeGen/RISCV/rv32zbb.ll
 M llvm/test/CodeGen/RISCV/rv32zbc-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rv32zbc-zbkc-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rv32zbkb-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rv32zbkx-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rv32zimop-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rv32zknd-intrinsic-autoupgrade.ll
 M llvm/test/CodeGen/RISCV/rv32zknd-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rv32zkne-intrinsic-autoupgrade.ll
 M llvm/test/CodeGen/RISCV/rv32zkne-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rv32zknh-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rv32zksed-intrinsic-autoupgrade.ll
 M llvm/test/CodeGen/RISCV/rv32zksed-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rv32zksh-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rv64-double-convert.ll
 M llvm/test/CodeGen/RISCV/rv64-float-convert.ll
 M llvm/test/CodeGen/RISCV/rv64-half-convert.ll
 M llvm/test/CodeGen/RISCV/rv64-patchpoint.ll
 M llvm/test/CodeGen/RISCV/rv64-stackmap-args.ll
 M llvm/test/CodeGen/RISCV/rv64-stackmap-frame-setup.ll
 M llvm/test/CodeGen/RISCV/rv64-stackmap-nops.ll
 M llvm/test/CodeGen/RISCV/rv64-stackmap.ll
 M llvm/test/CodeGen/RISCV/rv64-statepoint-call-lowering-x1.ll
 M llvm/test/CodeGen/RISCV/rv64-statepoint-call-lowering-x2.ll
 M llvm/test/CodeGen/RISCV/rv64-statepoint-call-lowering.ll
 M llvm/test/CodeGen/RISCV/rv64-trampoline-cfi.ll
 M llvm/test/CodeGen/RISCV/rv64-trampoline.ll
 M llvm/test/CodeGen/RISCV/rv64d-double-convert-strict.ll
 M llvm/test/CodeGen/RISCV/rv64f-float-convert-strict.ll
 M llvm/test/CodeGen/RISCV/rv64i-double-softfloat.ll
 M llvm/test/CodeGen/RISCV/rv64i-single-softfloat.ll
 M llvm/test/CodeGen/RISCV/rv64p.ll
 M llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
 M llvm/test/CodeGen/RISCV/rv64zbb-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rv64zbb-zbkb.ll
 M llvm/test/CodeGen/RISCV/rv64zbb.ll
 M llvm/test/CodeGen/RISCV/rv64zbc-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rv64zbc-zbkc-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rv64zbkb-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rv64zbkx-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rv64zfh-half-convert-strict.ll
 M llvm/test/CodeGen/RISCV/rv64zfh-half-intrinsics.ll
 M llvm/test/CodeGen/RISCV/rv64zfhmin-half-convert-strict.ll
 M llvm/test/CodeGen/RISCV/rv64zfhmin-half-intrinsics.ll
 M llvm/test/CodeGen/RISCV/rv64zimop-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rv64zknd-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rv64zknd-zkne-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rv64zkne-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rv64zknh-intrinsic-autoupgrade.ll
 M llvm/test/CodeGen/RISCV/rv64zknh-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rv64zksed-intrinsic-autoupgrade.ll
 M llvm/test/CodeGen/RISCV/rv64zksed-intrinsic-autoupgrade2.ll
 M llvm/test/CodeGen/RISCV/rv64zksed-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rv64zksh-intrinsic-autoupgrade.ll
 M llvm/test/CodeGen/RISCV/rv64zksh-intrinsic.ll
 M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
 M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
 M llvm/test/CodeGen/RISCV/rvv/65704-illegal-instruction.ll
 M llvm/test/CodeGen/RISCV/rvv/abd.ll
 M llvm/test/CodeGen/RISCV/rvv/abs-sdnode.ll
 M llvm/test/CodeGen/RISCV/rvv/abs-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/access-fixed-objects-by-rvv.ll
 M llvm/test/CodeGen/RISCV/rvv/active_lane_mask.ll
 M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-struct.ll
 M llvm/test/CodeGen/RISCV/rvv/allone-masked-to-unmasked.ll
 M llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll
 M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll
 M llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/ceil-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/combine-sats.ll
 M llvm/test/CodeGen/RISCV/rvv/combine-store-extract-crash.ll
 M llvm/test/CodeGen/RISCV/rvv/commutable.ll
 M llvm/test/CodeGen/RISCV/rvv/compressstore.ll
 M llvm/test/CodeGen/RISCV/rvv/constant-folding-crash.ll
 M llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll
 M llvm/test/CodeGen/RISCV/rvv/ctlz-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll
 M llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll
 M llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/debug-info-rvv-dbg-value.mir
 M llvm/test/CodeGen/RISCV/rvv/dont-sink-splat-operands.ll
 M llvm/test/CodeGen/RISCV/rvv/double-round-conv.ll
 M llvm/test/CodeGen/RISCV/rvv/expand-no-v.ll
 M llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll
 M llvm/test/CodeGen/RISCV/rvv/extractelt-fp.ll
 M llvm/test/CodeGen/RISCV/rvv/fceil-constrained-sdnode.ll
 M llvm/test/CodeGen/RISCV/rvv/fceil-sdnode.ll
 M llvm/test/CodeGen/RISCV/rvv/ffloor-constrained-sdnode.ll
 M llvm/test/CodeGen/RISCV/rvv/ffloor-sdnode.ll
 M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abd.ll
 M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll
 M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll
 M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll
 M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-compressstore-fp.ll
 M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-compressstore-int.ll
 M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll
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 M llvm/test/CodeGen/RISCV/rvv/vp-reverse-mask-fixed-vectors.ll
 M llvm/test/CodeGen/RISCV/rvv/vp-reverse-mask.ll
 M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-fixed-vectors.ll
 M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-vectors.ll
 M llvm/test/CodeGen/RISCV/rvv/vp-vaaddu.ll
 M llvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll
 M llvm/test/CodeGen/RISCV/rvv/vpload.ll
 M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode-bf16.ll
 M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
 M llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll
 M llvm/test/CodeGen/RISCV/rvv/vpstore.ll
 M llvm/test/CodeGen/RISCV/rvv/vqdot.ll
 M llvm/test/CodeGen/RISCV/rvv/vqdotsu.ll
 M llvm/test/CodeGen/RISCV/rvv/vqdotu.ll
 M llvm/test/CodeGen/RISCV/rvv/vqdotus.ll
 M llvm/test/CodeGen/RISCV/rvv/vredand.ll
 M llvm/test/CodeGen/RISCV/rvv/vredmax.ll
 M llvm/test/CodeGen/RISCV/rvv/vredmaxu.ll
 M llvm/test/CodeGen/RISCV/rvv/vredmin.ll
 M llvm/test/CodeGen/RISCV/rvv/vredminu.ll
 M llvm/test/CodeGen/RISCV/rvv/vredor.ll
 M llvm/test/CodeGen/RISCV/rvv/vredsum.ll
 M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll
 M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vreductions-int.ll
 M llvm/test/CodeGen/RISCV/rvv/vreductions-mask-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll
 M llvm/test/CodeGen/RISCV/rvv/vredxor.ll
 M llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vrem.ll
 M llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vremu.ll
 M llvm/test/CodeGen/RISCV/rvv/vrev8.ll
 M llvm/test/CodeGen/RISCV/rvv/vrgather.ll
 M llvm/test/CodeGen/RISCV/rvv/vrgatherei16-subreg-liveness.ll
 M llvm/test/CodeGen/RISCV/rvv/vrgatherei16.ll
 M llvm/test/CodeGen/RISCV/rvv/vrol-sdnode.ll
 M llvm/test/CodeGen/RISCV/rvv/vrol.ll
 M llvm/test/CodeGen/RISCV/rvv/vror-sdnode.ll
 M llvm/test/CodeGen/RISCV/rvv/vror.ll
 M llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vrsub.ll
 M llvm/test/CodeGen/RISCV/rvv/vsadd-sdnode.ll
 M llvm/test/CodeGen/RISCV/rvv/vsadd-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vsadd.ll
 M llvm/test/CodeGen/RISCV/rvv/vsaddu-sdnode.ll
 M llvm/test/CodeGen/RISCV/rvv/vsaddu-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vsaddu.ll
 M llvm/test/CodeGen/RISCV/rvv/vsbc.ll
 M llvm/test/CodeGen/RISCV/rvv/vscale-power-of-two.ll
 M llvm/test/CodeGen/RISCV/rvv/vse.ll
 M llvm/test/CodeGen/RISCV/rvv/vselect-vp-bf16.ll
 M llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vsetvl-ext.ll
 M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-O0.ll
 M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
 M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
 M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
 M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
 M llvm/test/CodeGen/RISCV/rvv/vsetvli-intrinsics.ll
 M llvm/test/CodeGen/RISCV/rvv/vsetvli-valid-elen-fp.ll
 M llvm/test/CodeGen/RISCV/rvv/vsetvlmax-ext.ll
 M llvm/test/CodeGen/RISCV/rvv/vsext-vp-mask.ll
 M llvm/test/CodeGen/RISCV/rvv/vsext-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vsext.ll
 M llvm/test/CodeGen/RISCV/rvv/vsha2ch.ll
 M llvm/test/CodeGen/RISCV/rvv/vsha2cl.ll
 M llvm/test/CodeGen/RISCV/rvv/vsha2ms.ll
 M llvm/test/CodeGen/RISCV/rvv/vshl-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp-mask.ll
 M llvm/test/CodeGen/RISCV/rvv/vsitofp-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vslide1down-constant-vl-rv32.ll
 M llvm/test/CodeGen/RISCV/rvv/vslide1down.ll
 M llvm/test/CodeGen/RISCV/rvv/vslide1up-constant-vl-rv32.ll
 M llvm/test/CodeGen/RISCV/rvv/vslide1up.ll
 M llvm/test/CodeGen/RISCV/rvv/vslidedown.ll
 M llvm/test/CodeGen/RISCV/rvv/vslideup.ll
 M llvm/test/CodeGen/RISCV/rvv/vsll.ll
 M llvm/test/CodeGen/RISCV/rvv/vsm.ll
 M llvm/test/CodeGen/RISCV/rvv/vsm3c.ll
 M llvm/test/CodeGen/RISCV/rvv/vsm3me.ll
 M llvm/test/CodeGen/RISCV/rvv/vsm4k.ll
 M llvm/test/CodeGen/RISCV/rvv/vsm4r.ll
 M llvm/test/CodeGen/RISCV/rvv/vsmul.ll
 M llvm/test/CodeGen/RISCV/rvv/vsoxei-rv64.ll
 M llvm/test/CodeGen/RISCV/rvv/vsoxei.ll
 M llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv32.ll
 M llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv64.ll
 M llvm/test/CodeGen/RISCV/rvv/vsra-sdnode.ll
 M llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vsra.ll
 M llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vsrl.ll
 M llvm/test/CodeGen/RISCV/rvv/vsse.ll
 M llvm/test/CodeGen/RISCV/rvv/vsseg-rv32.ll
 M llvm/test/CodeGen/RISCV/rvv/vsseg-rv64.ll
 M llvm/test/CodeGen/RISCV/rvv/vssra-rv32.ll
 M llvm/test/CodeGen/RISCV/rvv/vssra-rv64.ll
 M llvm/test/CodeGen/RISCV/rvv/vssrl-rv32.ll
 M llvm/test/CodeGen/RISCV/rvv/vssrl-rv64.ll
 M llvm/test/CodeGen/RISCV/rvv/vssseg-rv32.ll
 M llvm/test/CodeGen/RISCV/rvv/vssseg-rv64.ll
 M llvm/test/CodeGen/RISCV/rvv/vssub-sdnode.ll
 M llvm/test/CodeGen/RISCV/rvv/vssub-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vssub.ll
 M llvm/test/CodeGen/RISCV/rvv/vssubu-sdnode.ll
 M llvm/test/CodeGen/RISCV/rvv/vssubu-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vssubu.ll
 M llvm/test/CodeGen/RISCV/rvv/vsub-vp-mask.ll
 M llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vsub.ll
 M llvm/test/CodeGen/RISCV/rvv/vsuxei-rv64.ll
 M llvm/test/CodeGen/RISCV/rvv/vsuxei.ll
 M llvm/test/CodeGen/RISCV/rvv/vsuxseg-rv32.ll
 M llvm/test/CodeGen/RISCV/rvv/vsuxseg-rv64.ll
 M llvm/test/CodeGen/RISCV/rvv/vtrunc-vp-mask.ll
 M llvm/test/CodeGen/RISCV/rvv/vtrunc-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp-mask.ll
 M llvm/test/CodeGen/RISCV/rvv/vuitofp-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vwadd-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vwadd.ll
 M llvm/test/CodeGen/RISCV/rvv/vwadd.w.ll
 M llvm/test/CodeGen/RISCV/rvv/vwaddu.ll
 M llvm/test/CodeGen/RISCV/rvv/vwaddu.w.ll
 M llvm/test/CodeGen/RISCV/rvv/vwmacc-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vwmacc.ll
 M llvm/test/CodeGen/RISCV/rvv/vwmaccsu-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vwmaccsu.ll
 M llvm/test/CodeGen/RISCV/rvv/vwmaccu-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vwmaccu.ll
 M llvm/test/CodeGen/RISCV/rvv/vwmaccus.ll
 M llvm/test/CodeGen/RISCV/rvv/vwmul.ll
 M llvm/test/CodeGen/RISCV/rvv/vwmulsu.ll
 M llvm/test/CodeGen/RISCV/rvv/vwmulu.ll
 M llvm/test/CodeGen/RISCV/rvv/vwredsum.ll
 M llvm/test/CodeGen/RISCV/rvv/vwredsumu.ll
 M llvm/test/CodeGen/RISCV/rvv/vwsll-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vwsll.ll
 M llvm/test/CodeGen/RISCV/rvv/vwsub.ll
 M llvm/test/CodeGen/RISCV/rvv/vwsub.w.ll
 M llvm/test/CodeGen/RISCV/rvv/vwsubu.ll
 M llvm/test/CodeGen/RISCV/rvv/vwsubu.w.ll
 M llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vxor.ll
 M llvm/test/CodeGen/RISCV/rvv/vxrm-insert.ll
 M llvm/test/CodeGen/RISCV/rvv/vzext-vp-mask.ll
 M llvm/test/CodeGen/RISCV/rvv/vzext-vp.ll
 M llvm/test/CodeGen/RISCV/rvv/vzext.ll
 M llvm/test/CodeGen/RISCV/rvv/wrong-chain-fixed-load.ll
 M llvm/test/CodeGen/RISCV/rvv/xsfvcp-x.ll
 M llvm/test/CodeGen/RISCV/rvv/xsfvcp-xv.ll
 M llvm/test/CodeGen/RISCV/rvv/xsfvcp-xvv.ll
 M llvm/test/CodeGen/RISCV/rvv/xsfvcp-xvw.ll
 M llvm/test/CodeGen/RISCV/rvv/xtheadvdot-vmaqa.ll
 M llvm/test/CodeGen/RISCV/rvv/xtheadvdot-vmaqasu.ll
 M llvm/test/CodeGen/RISCV/rvv/xtheadvdot-vmaqau.ll
 M llvm/test/CodeGen/RISCV/rvv/xtheadvdot-vmaqaus.ll
 M llvm/test/CodeGen/RISCV/rvv/zvlsseg-zero-vl.ll
 M llvm/test/CodeGen/RISCV/sadd_sat.ll
 M llvm/test/CodeGen/RISCV/sadd_sat_plus.ll
 M llvm/test/CodeGen/RISCV/saverestore.ll
 M llvm/test/CodeGen/RISCV/sextw-removal-debug.mir
 M llvm/test/CodeGen/RISCV/sextw-removal.ll
 M llvm/test/CodeGen/RISCV/shifts.ll
 M llvm/test/CodeGen/RISCV/short-forward-branch-opt.ll
 M llvm/test/CodeGen/RISCV/simplify-condbr.ll
 M llvm/test/CodeGen/RISCV/ssub_sat.ll
 M llvm/test/CodeGen/RISCV/ssub_sat_plus.ll
 M llvm/test/CodeGen/RISCV/tail-calls.ll
 M llvm/test/CodeGen/RISCV/thread-pointer.ll
 M llvm/test/CodeGen/RISCV/uadd_sat.ll
 M llvm/test/CodeGen/RISCV/uadd_sat_plus.ll
 M llvm/test/CodeGen/RISCV/umulo-128-legalisation-lowering.ll
 M llvm/test/CodeGen/RISCV/usub_sat.ll
 M llvm/test/CodeGen/RISCV/usub_sat_plus.ll
 M llvm/test/CodeGen/RISCV/vararg-ilp32e.ll
 M llvm/test/CodeGen/RISCV/vararg.ll
 M llvm/test/CodeGen/RISCV/varargs-with-fp-and-second-adj.ll
 M llvm/test/CodeGen/RISCV/vlenb.ll
 M llvm/test/CodeGen/RISCV/vscale-demanded-bits.ll
 M llvm/test/CodeGen/RISCV/xaluo.ll
 M llvm/test/CodeGen/RISCV/xcvalu.ll
 M llvm/test/CodeGen/RISCV/xcvbitmanip.ll
 M llvm/test/CodeGen/RISCV/xcvmac.ll
 M llvm/test/CodeGen/RISCV/xqccmp-push-pop-popret.ll
 M llvm/test/CodeGen/RISCV/xqcibm-cto-clo-brev.ll
 M llvm/test/CodeGen/RISCV/xqcilsm-memset.ll
 M llvm/test/CodeGen/RISCV/zfh-half-intrinsics-strict.ll
 M llvm/test/CodeGen/RISCV/zfh-half-intrinsics.ll
 M llvm/test/CodeGen/RISCV/zfhmin-half-intrinsics-strict.ll
 M llvm/test/CodeGen/RISCV/zfhmin-half-intrinsics.ll

 Log Message:
 -----------
 [RISCV] Remove intrinsic declarations in tests, NFC (#167474)

As @mshockwave mentioned in
https://github.com/llvm/llvm-project/pull/156415, we don't need to
declare intrinsics in tests now, this pr removes them.


 Commit: de674fb6c250608197a70ae3fdef5519597054f6
 https://github.com/llvm/llvm-project/commit/de674fb6c250608197a70ae3fdef5519597054f6
 Author: David Green <david.green at arm.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 A llvm/test/CodeGen/AArch64/addtruncshift.ll

 Log Message:
 -----------
 [AArch64] Add vector tests for add(trunc(shift))


 Commit: 19655231718929362f338fb73a6d4ae587ad927e
 https://github.com/llvm/llvm-project/commit/19655231718929362f338fb73a6d4ae587ad927e
 Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
 M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
 M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp

 Log Message:
 -----------
 [mlir][tensor] Add new builders for insert_slice/extract_slice Ops (nfc) (#169533)

Adds new builders for `tensor.insert_slice` and `tensor.extract_slice`
Ops for which the _offsets_ and the _strides_ are all 0s and 1s,
respecitvely. This allows us to write:
```cpp
// No offsets and no strides - implicitly set to 0s and 1s,
// respectively.
tensor::InsertSliceOp::create(rewriter, loc, src, dest, writeSizes);
```

instead of:
```cpp
// Strides are initialised explicitly to 1s
Attribute oneIdxAttr = rewriter.getIndexAttr(1);
SmallVector<OpFoldResult> writeStrides(destRank, oneIdxAttr);

// Offsets are initialised explicitly to 0s
Attribute zeroIdxAttr = rewriter.getIndexAttr(0);
SmallVector<OpFoldResult> writeOffsets(destRank, zeroIdxAttr);

tensor::InsertSliceOp::create(rewriter, loc, src, dest, writeOffsets,
 writeSizes, writeStrides);
```


 Commit: 76079ecc891e2781168d9a92a4ff024aaffa77db
 https://github.com/llvm/llvm-project/commit/76079ecc891e2781168d9a92a4ff024aaffa77db
 Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/include/clang/Basic/DiagnosticSemaKinds.td
 M clang/include/clang/Sema/Sema.h
 M clang/lib/Sema/SemaExprCXX.cpp
 A clang/test/Sema/AArch64/sve-vector-conditional-op.cpp

 Log Message:
 -----------
 [clang][Sema] Merge Check[Sizeless]VectorConditionalTypes implementations (#169165)

These two functions are almost identical, except for the handling
different vector types, so merging them eliminates some duplication.
This also fixes some bugs, as "sizeless" vector code was missing checks
for several cases.

This meant type checking would crash if:

 - The LHS or RHS type was void
 - The LHS or RHS type was a fixed-length vector type
- There was not a scalable vector type for the result element count/size

These are fixed with this patch and tested in
Sema/AArch64/sve-vector-conditional-op.cpp.

Fixes #169025


 Commit: 63e4b8c64105ea429f0d35f82b8492d6526b8c54
 https://github.com/llvm/llvm-project/commit/63e4b8c64105ea429f0d35f82b8492d6526b8c54
 Author: Timm Baeder <tbaeder at redhat.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/lib/AST/ByteCode/Integral.h

 Log Message:
 -----------
 [clang][bytecode][NFC] Remove unused Integral range functions (#169508)


 Commit: f481f5bef90d0dd10a9d885b2e4bbfd015e6606d
 https://github.com/llvm/llvm-project/commit/f481f5bef90d0dd10a9d885b2e4bbfd015e6606d
 Author: Kareem Ergawy <kareem.ergawy at amd.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
 M flang/include/flang/Optimizer/Dialect/FIROps.td
 M flang/lib/Lower/Support/ReductionProcessor.cpp
 M flang/lib/Optimizer/OpenMP/DoConcurrentConversion.cpp
 M flang/test/Lower/OpenMP/delayed-privatization-reduction-byref.f90
 M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
 M flang/test/Lower/OpenMP/parallel-reduction-array-lb.f90
 M flang/test/Lower/OpenMP/parallel-reduction-array.f90
 M flang/test/Lower/OpenMP/parallel-reduction-array2.f90
 M flang/test/Lower/OpenMP/parallel-reduction-pointer-array.f90
 M flang/test/Lower/OpenMP/parallel-reduction3.f90
 M flang/test/Lower/OpenMP/reduction-array-intrinsic.f90
 M flang/test/Lower/OpenMP/sections-array-reduction.f90
 M flang/test/Lower/OpenMP/taskgroup-task-array-reduction.f90
 M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
 M flang/test/Lower/OpenMP/wsloop-reduction-allocatable.f90
 M flang/test/Lower/OpenMP/wsloop-reduction-array-assumed-shape.f90
 M flang/test/Lower/OpenMP/wsloop-reduction-array-lb.f90
 M flang/test/Lower/OpenMP/wsloop-reduction-array-lb2.f90
 M flang/test/Lower/OpenMP/wsloop-reduction-array.f90
 M flang/test/Lower/OpenMP/wsloop-reduction-array2.f90
 M flang/test/Lower/OpenMP/wsloop-reduction-multiple-clauses.f90
 M flang/test/Lower/OpenMP/wsloop-reduction-pointer.f90
 M flang/test/Lower/do_concurrent_reduce_allocatable.f90
 M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
 M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
 M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
 M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
 M mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
 M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
 A mlir/test/Target/LLVMIR/allocatable_gpu_reduction.mlir
 M mlir/test/Target/LLVMIR/omptarget-multi-block-reduction.mlir
 M mlir/test/Target/LLVMIR/omptarget-multi-reduction.mlir
 M mlir/test/Target/LLVMIR/omptarget-teams-distribute-reduction.mlir
 M mlir/test/Target/LLVMIR/omptarget-teams-reduction.mlir

 Log Message:
 -----------
 [OpenMP][flang] Add initial support for by-ref reductions on the GPU (#165714)

Adds initial support for GPU by-ref reductions. The main problem for
reduction by reference is that, prior to this PR, we were shuffling
(from remote lanes within the same warp or across different warps within
the block) pointers/references to the private reduction values rather
than the private reduction values themselves.

In particular, this diff adds support for reductions on scalar
allocatables where reductions happen on loops nested in `target`
regions. For example:

```fortran
 integer :: i
 real, allocatable :: scalar_alloc

 allocate(scalar_alloc)
 scalar_alloc = 0

 !$omp target map(tofrom: scalar_alloc)
 !$omp parallel do reduction(+: scalar_alloc)
 do i = 1, 1000000
 scalar_alloc = scalar_alloc + 1
 end do
 !$omp end target
```

This PR supports by-ref reductions on the intra- and inter-warp levels.

So far, there are still steps to be takens for full support of by-ref
reductions, for example:
* Support inter-block value combination is still not supported.
Therefore, `target teams distribute parallel do` is still not supported.
* Support for dynamically-sized arrays still needs to be added.
* Support for more than one allocatable/array on the same `reduction`
clause.


 Commit: c43ac96331bc309c2a92ae20a7ae5fadfecbd073
 https://github.com/llvm/llvm-project/commit/c43ac96331bc309c2a92ae20a7ae5fadfecbd073
 Author: Utkarsh Saxena <usx at google.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeAnnotations.h
 M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
 M clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
 M clang/lib/Sema/CheckExprLifetime.cpp
 M clang/lib/Sema/CheckExprLifetime.h
 M clang/lib/Sema/SemaAttr.cpp

 Log Message:
 -----------
 [LifetimeSafety] Move GSL pointer/owner type detection to LifetimeAnnotations (#169620)

Refactored GSL pointer and owner type detection functions to improve code organization and reusability.


 Commit: 3036de77239f0b29b3619ff6e468ccf5845c7e91
 https://github.com/llvm/llvm-project/commit/3036de77239f0b29b3619ff6e468ccf5845c7e91
 Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/Analysis/LoopCacheAnalysis.cpp
 A llvm/test/Analysis/LoopCacheAnalysis/crash-after-pr164798.ll

 Log Message:
 -----------
 [LoopCacheAnalysis] Fix crash after #164798 (#169486)

Fix the assertion failure after #164798. The issue is that the
comparison `Sizes.back() == ElementSize` can fail when their types are
different. We should cast them to the wider type before the comparison.


 Commit: c0a7b15d0158a79786a38f5e94fa8315d4c9f0fe
 https://github.com/llvm/llvm-project/commit/c0a7b15d0158a79786a38f5e94fa8315d4c9f0fe
 Author: David Sherwood <david.sherwood at arm.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/test/Transforms/LoopVectorize/X86/pr39160.ll
 M llvm/test/Transforms/LoopVectorize/if-conversion.ll
 M llvm/test/Transforms/LoopVectorize/incorrect-dom-info.ll
 M llvm/test/Transforms/LoopVectorize/interleaved-accesses-uniform-load.ll
 M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
 M llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll
 M llvm/test/Transforms/LoopVectorize/nsw-crash.ll
 M llvm/test/Transforms/LoopVectorize/scev-exitlim-crash.ll
 M llvm/test/Transforms/LoopVectorize/value-ptr-bug.ll
 M llvm/test/Transforms/LoopVectorize/vector-to-scalar-cast.ll
 M llvm/test/Transforms/LoopVectorize/version-mem-access.ll

 Log Message:
 -----------
 [LV][NFC] Remove remaining uses of undef in tests (#169357)

Split off from PR #163525, this standalone patch replaces almost all the
remaining cases where undef is used as value in loop vectoriser tests.
This will reduce the likelihood of contributors hitting the `undef
deprecator` warning in github.
NOTE: The remaining use of undef in iv_outside_user.ll will be fixed in
a separate PR.

I've removed the test stride_undef from version-mem-access.ll, since
there is already a stride_poison test.


 Commit: 04bddda08ab2126f74c902f6630c133382170001
 https://github.com/llvm/llvm-project/commit/04bddda08ab2126f74c902f6630c133382170001
 Author: Steven Perron <stevenperron at google.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
 M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
 M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
 A llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer-array.ll
 A llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer-simple.ll
 A llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer-struct.ll

 Log Message:
 -----------
 [SPIRV] Improve Logical SPIR-V Pointer Access and GEP Legalization (#169076)

This commit improves the handling of GetElementPtr (GEP) instructions
for
Logical SPIR-V. It includes:

- Rewriting of GEPs that are not allowed in Logical SPIR-V
(specifically,
handling non-zero first indices by rebuilding access chains or adjusting
 types).
- Better deduction of element types for pointer casting.
- Updates to instruction selection to ensure GEPs are correctly lowered
to
OpAccessChain or OpInBoundsAccessChain only when valid (e.g. first index
0).
- Support for standard HLSL cbuffer layouts in tests.


 Commit: 2d4a8dadba88889ca19adee4fbf907d8c5a40282
 https://github.com/llvm/llvm-project/commit/2d4a8dadba88889ca19adee4fbf907d8c5a40282
 Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
 M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-factors.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/epilogue-vectorization-fix-scalar-resume-values.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/f128-fmuladd-reduction.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/fixed-order-recurrence.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/fixed-wide-lane-mask.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/fmax-without-fast-math-flags.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/fmin-without-fast-math-flags.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/fminimumnum.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/licm-calls.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-mixed.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-neon.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-interleave.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/pr151664-cost-hoisted-vector-scalable.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/replicating-load-store-costs.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/sve-fixed-width-inorder-core.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-cost.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-multi-block.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-unroll.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/vector-loop-backedge-elimination-epilogue.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
 M llvm/test/Transforms/LoopVectorize/LoongArch/defaults.ll
 M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
 M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
 M llvm/test/Transforms/LoopVectorize/PowerPC/small-loop-rdx.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
 M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
 M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
 M llvm/test/Transforms/LoopVectorize/X86/drop-inbounds-flags-for-reverse-vector-pointer.ll
 M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
 M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
 M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
 M llvm/test/Transforms/LoopVectorize/X86/fminimumnum.ll
 M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
 M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
 M llvm/test/Transforms/LoopVectorize/X86/induction-step.ll
 M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
 M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
 M llvm/test/Transforms/LoopVectorize/X86/iv-live-outs.ll
 M llvm/test/Transforms/LoopVectorize/X86/limit-vf-by-tripcount.ll
 M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
 M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
 M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
 M llvm/test/Transforms/LoopVectorize/X86/metadata-enable.ll
 M llvm/test/Transforms/LoopVectorize/X86/multi-exit-cost.ll
 M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
 M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
 M llvm/test/Transforms/LoopVectorize/X86/pr47437.ll
 M llvm/test/Transforms/LoopVectorize/X86/pr81872.ll
 M llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll
 M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
 M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
 M llvm/test/Transforms/LoopVectorize/X86/uniform_load.ll
 M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
 M llvm/test/Transforms/LoopVectorize/X86/vectorize-force-tail-with-evl.ll
 M llvm/test/Transforms/LoopVectorize/X86/widened-value-used-as-scalar-and-first-lane.ll
 M llvm/test/Transforms/LoopVectorize/assume.ll
 M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
 M llvm/test/Transforms/LoopVectorize/cse-casts.ll
 M llvm/test/Transforms/LoopVectorize/cse-gep-source-element-type.ll
 M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
 M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
 M llvm/test/Transforms/LoopVectorize/expand-scev-after-invoke.ll
 M llvm/test/Transforms/LoopVectorize/fcmp-uno-fold-interleave.ll
 M llvm/test/Transforms/LoopVectorize/first-order-recurrence-dead-instructions.ll
 M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
 M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags-interleave.ll
 M llvm/test/Transforms/LoopVectorize/if-reduction.ll
 M llvm/test/Transforms/LoopVectorize/induction-wrapflags.ll
 M llvm/test/Transforms/LoopVectorize/induction.ll
 M llvm/test/Transforms/LoopVectorize/interleave-with-i65-induction.ll
 M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
 M llvm/test/Transforms/LoopVectorize/iv-select-cmp-nested-loop.ll
 M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
 M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
 M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
 M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
 M llvm/test/Transforms/LoopVectorize/metadata.ll
 M llvm/test/Transforms/LoopVectorize/minimumnum-maximumnum-reductions.ll
 M llvm/test/Transforms/LoopVectorize/narrow-to-single-scalar.ll
 M llvm/test/Transforms/LoopVectorize/nested-loops-scev-expansion.ll
 M llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll
 M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
 M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
 M llvm/test/Transforms/LoopVectorize/pr37248.ll
 M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
 M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
 M llvm/test/Transforms/LoopVectorize/reduction-odd-interleave-counts.ll
 M llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
 M llvm/test/Transforms/LoopVectorize/reverse-induction-gep-nowrap-flags.ll
 M llvm/test/Transforms/LoopVectorize/reverse_induction.ll
 M llvm/test/Transforms/LoopVectorize/runtime-check-known-true.ll
 M llvm/test/Transforms/LoopVectorize/runtime-check-needed-but-empty.ll
 M llvm/test/Transforms/LoopVectorize/runtime-checks-hoist.ll
 M llvm/test/Transforms/LoopVectorize/scalar_after_vectorization.ll
 M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
 M llvm/test/Transforms/LoopVectorize/select-cmp.ll
 M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave-hint.ll
 M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave.ll
 M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
 M llvm/test/Transforms/LoopVectorize/skeleton-lcssa-crash.ll
 M llvm/test/Transforms/LoopVectorize/struct-return-replicate.ll
 M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-branch-weights.ll
 M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
 M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-outside-iv-users.ll
 M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
 A llvm/test/Transforms/LoopVectorize/vector-pointer-gep-idxty-addrspace.ll

 Log Message:
 -----------
 [VPlan] Use DL index type consistently for GEPs (#169396)

In preparation to strip VPUnrollPartAccessor and unroll recipes
directly, strip unnecessary complication in getGEPIndexTy, as the unroll
part will no longer be available in follow-ups (see #168886 for
instance). The patch also helps by doing a mass test update up-front.
Narrowing the GEP index type conditionally does not yield any benefit,
and the change is non-functional in terms of emitted assembly. While at
it, avoid hard-coding address-space 0, and use the pointer operand's
address space to get the GEP index type.


 Commit: 800da10a3a697922042303daa4fe3e06aea34729
 https://github.com/llvm/llvm-project/commit/800da10a3a697922042303daa4fe3e06aea34729
 Author: J. Ryan Stinnett <jryans at gmail.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/include/clang/Basic/DebugOptions.def
 M clang/include/clang/Options/Options.td
 M clang/lib/CodeGen/CGDebugInfo.cpp
 M clang/lib/Driver/ToolChains/Clang.cpp
 M clang/test/DebugInfo/Generic/dbg-info-all-calls-described.c
 M clang/test/Driver/debug-options.c

 Log Message:
 -----------
 [clang][DebugInfo] Add call site debug info flag (#169574)

This adds a default enabled flag to control attachment of call site
debug info. `-gno-call-site-info` can be used to disable this feature
when needed.

This should help those concerned about debug info size in
https://github.com/llvm/llvm-project/issues/168851.


 Commit: d090311aa7df7cbd93412c31685893aefc4ad341
 https://github.com/llvm/llvm-project/commit/d090311aa7df7cbd93412c31685893aefc4ad341
 Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang-tools-extra/clangd/CompileCommands.cpp
 M clang-tools-extra/clangd/Compiler.cpp
 M clang/docs/ReleaseNotes.rst
 M clang/include/clang/Driver/CommonArgs.h
 A clang/include/clang/Driver/CreateASTUnitFromArgs.h
 A clang/include/clang/Driver/CreateInvocationFromArgs.h
 M clang/include/clang/Driver/Driver.h
 M clang/include/clang/Frontend/ASTUnit.h
 M clang/include/clang/Frontend/CompilerInvocation.h
 A clang/include/clang/Frontend/StandaloneDiagnostic.h
 M clang/include/clang/Frontend/Utils.h
 M clang/include/clang/Options/OptionUtils.h
 M clang/lib/CrossTU/CMakeLists.txt
 M clang/lib/CrossTU/CrossTranslationUnit.cpp
 M clang/lib/Driver/CMakeLists.txt
 A clang/lib/Driver/CreateASTUnitFromArgs.cpp
 A clang/lib/Driver/CreateInvocationFromArgs.cpp
 M clang/lib/Driver/Driver.cpp
 M clang/lib/Driver/ToolChains/Clang.cpp
 M clang/lib/Driver/ToolChains/CommonArgs.cpp
 M clang/lib/Driver/ToolChains/Flang.cpp
 M clang/lib/Frontend/ASTUnit.cpp
 M clang/lib/Frontend/CMakeLists.txt
 M clang/lib/Frontend/CompilerInvocation.cpp
 R clang/lib/Frontend/CreateInvocationFromCommandLine.cpp
 A clang/lib/Frontend/StandaloneDiagnostic.cpp
 M clang/lib/Interpreter/CMakeLists.txt
 M clang/lib/Interpreter/Interpreter.cpp
 M clang/lib/Options/OptionUtils.cpp
 M clang/lib/Tooling/Tooling.cpp
 M clang/tools/c-index-test/CMakeLists.txt
 M clang/tools/c-index-test/core_main.cpp
 M clang/tools/diagtool/CMakeLists.txt
 M clang/tools/diagtool/ShowEnabledWarnings.cpp
 M clang/tools/driver/cc1_main.cpp
 M clang/tools/libclang/CIndex.cpp
 M clang/tools/libclang/CIndexer.cpp
 M clang/tools/libclang/CMakeLists.txt
 M clang/tools/libclang/Indexing.cpp
 M clang/unittests/Driver/DXCModeTest.cpp
 M clang/unittests/Driver/ToolChainTest.cpp
 M clang/unittests/Frontend/ASTUnitTest.cpp
 M clang/unittests/Frontend/CompilerInstanceTest.cpp
 M clang/unittests/Frontend/UtilsTest.cpp
 M clang/unittests/Sema/CMakeLists.txt
 M clang/unittests/Sema/SemaNoloadLookupTest.cpp
 M clang/unittests/Serialization/ForceCheckFileInputTest.cpp
 M clang/unittests/Serialization/LoadSpecLazilyTest.cpp
 M clang/unittests/Serialization/ModuleCacheTest.cpp
 M clang/unittests/Serialization/NoCommentsTest.cpp
 M clang/unittests/Serialization/PreambleInNamedModulesTest.cpp
 M clang/unittests/Serialization/VarDeclConstantInitTest.cpp
 M clang/unittests/Tooling/Syntax/TokensTest.cpp
 M clang/unittests/Tooling/Syntax/TreeTestBase.cpp
 M flang/lib/Frontend/CMakeLists.txt
 M flang/lib/Frontend/CompilerInvocation.cpp
 M lldb/source/Commands/CommandObjectTarget.cpp
 M lldb/source/Plugins/ExpressionParser/Clang/CMakeLists.txt
 M lldb/source/Plugins/ExpressionParser/Clang/ClangHost.cpp
 M lldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
 M lldb/unittests/Expression/ClangParserTest.cpp
 M utils/bazel/llvm-project-overlay/clang/BUILD.bazel

 Log Message:
 -----------
 Reland "[clang] Refactor to remove clangDriver dependency from clangFrontend and flangFrontend" (#169599)

This relands #165277 by reverting #169397.
This also relands the corresponding Bazel port by reverting #169410.

The original revert was due to a report of a broken build, which was
later resolved by fully clearing the build directory.


 Commit: cc1c41724ddab0112937e30e1eaa984595b7f48e
 https://github.com/llvm/llvm-project/commit/cc1c41724ddab0112937e30e1eaa984595b7f48e
 Author: daniilavdeev <daniilavdeev237 at gmail.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
 M llvm/test/DebugInfo/RISCV/relax_dwo_ranges.ll

 Log Message:
 -----------
 [dwarf] make dwarf fission compatible with RISCV relaxations 2/2 (#164813)

This patch makes DWARF fission compatible with RISC-V relaxations by
using indirect addressing for the DW_AT_high_pc attribute. This
eliminates the remaining relocations in .dwo files.


 Commit: bbbe511ea2f8d6e4f3977ef1bb28a4fb30323f9a
 https://github.com/llvm/llvm-project/commit/bbbe511ea2f8d6e4f3977ef1bb28a4fb30323f9a
 Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/include/clang/Options/Options.td
 M clang/lib/Driver/Driver.cpp
 M clang/lib/Driver/ToolChains/Clang.cpp
 M clang/lib/Driver/ToolChains/HIPAMD.cpp
 A clang/test/Driver/hip-spirv-backend-bindings.c
 A clang/test/Driver/hip-spirv-backend-opt.c
 A clang/test/Driver/hip-spirv-backend-phases.c

 Log Message:
 -----------
 Reland "[clang][Driver] Support for the SPIR-V backend when compiling HIP" (#169637)

This relands "[clang][Driver] Support for the SPIR-V backend when compiling HIP" #167543. The only new change is a small fix for the multicall driver.

For HIP, the SPIR-V backend can be optionally activated with the -use-spirv-backend flag. This option uses the SPIR-V BE instead of the SPIR-V translator. These changes also ensure that -use-spirv-backend does not require external dependencies, such as spirv-as and spirv-link


 Commit: 2b8d363ac1a8cca21c32afc039cb28f0f1608300
 https://github.com/llvm/llvm-project/commit/2b8d363ac1a8cca21c32afc039cb28f0f1608300
 Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/include/llvm/Analysis/Delinearization.h
 M llvm/include/llvm/Analysis/DependenceAnalysis.h
 M llvm/lib/Analysis/Delinearization.cpp

 Log Message:
 -----------
 [Delinearization] Remove tryDelinearizeFixedSizeImpl (#169046)

`tryDelinearizeFixedSizeImpl` is a heuristic function relying on GEP's
type information. Using these information to drive an optimization
heuristic is not allowed, so this function should be removed. As #161822
and #164798 have eliminated all calls to this, this patch removes the
function itself.


 Commit: 23f90304507612fde6d4afb79e58dd4283b7be49
 https://github.com/llvm/llvm-project/commit/23f90304507612fde6d4afb79e58dd4283b7be49
 Author: Md Abdullah Shahneous Bari <md.abdullah.shahneous.bari at intel.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp

 Log Message:
 -----------
 Reland: [GPUToXeVMPipeline][Pipeline] Modify pipeline to add `convert-vector-to-llvm`. (#169573)

`convert-vector-to-llvm` pass applies a set of vector transformation
patterns that are not included in the standard `convert-to-llvm` pass
interface. These additional transformations are required to properly
lower MLIR vector operations. Since not all vector ops have direct
`llvm` dialect lowering, many of them must first be progressively
rewritten into simpler or more canonical vector ops, which are then
lowered to `llvm`. Therefore, running `convert-vector-to-llvm` is
necessary to ensure a complete and correct lowering of vector operations
to the `llvm` dialect.

Original PR: https://github.com/llvm/llvm-project/pull/166204 +
post-commit failure fixes.


 Commit: 0a35f44f58f322dece584265e252e21b3ca03530
 https://github.com/llvm/llvm-project/commit/0a35f44f58f322dece584265e252e21b3ca03530
 Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/lib/Sema/SemaExpr.cpp
 M clang/test/SemaHIP/amdgpu-gfx950-load-to-lds.hip

 Log Message:
 -----------
 [HIP] Perform implicit pointer cast when compiling HIP, not when -fcuda-is-device (#165387)

When compiling HIP device code, we add implicit casts for the pointer arguments passed to built-in calls.

When compiling for the host, apply the same casts, since the device side of the source (device functions and kernels) should still pass type checks.


 Commit: e3de8ff548a84645141fe16fad156525604c12ca
 https://github.com/llvm/llvm-project/commit/e3de8ff548a84645141fe16fad156525604c12ca
 Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
 M llvm/utils/gn/secondary/clang/lib/Frontend/BUILD.gn

 Log Message:
 -----------
 [gn build] Port d090311aa7df


 Commit: 4cc8cc81e3aa10e01ce6d54321cbddbc64f1bd15
 https://github.com/llvm/llvm-project/commit/4cc8cc81e3aa10e01ce6d54321cbddbc64f1bd15
 Author: Florian Hahn <flo at fhahn.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
 M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
 M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
 M llvm/test/Transforms/LoopVectorize/hoist-predicated-loads-with-predicated-stores.ll
 M llvm/test/Transforms/LoopVectorize/hoist-predicated-loads.ll

 Log Message:
 -----------
 [VPlan] Hoist predicated loads with complementary masks. (#168373)

This patch adds a new VPlan transformation to hoist predicated loads, if
we can prove they execute unconditionally, i.e. there are 2 predicated
loads to the same address with complementary masks. Then we are
guaranteed to execute one of them on each iteration, allowing us to
remove the mask.

The transform groups masked replicating loads by their address SCEV,
then checks if there are 2 loads with complementary mask. If that is the
case, we check if there are any writes that may alias the load address
in the blocks between the first and last load with the same address.
The transforms operates after linearizing the CFG, but before
introducing replicate regions, which means this is just checking a chain
of consecutive blocks.

Currently this only uses noalias metadata to check for no-alias (using
the helpers added in https://github.com/llvm/llvm-project/pull/166247).

Then we create an unpredicated VPReplicateRecipe at the position of the
first load, then replace all users of the grouped loads with it.

Small Alive2 proof for hoisting with complementary masks:
https://alive2.llvm.org/ce/z/kUx742

PR: https://github.com/llvm/llvm-project/pull/168373


 Commit: 637f206241756e769c5cf84da27aacc217549a52
 https://github.com/llvm/llvm-project/commit/637f206241756e769c5cf84da27aacc217549a52
 Author: Marco Elver <elver at google.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/lib/Frontend/CompilerInvocation.cpp
 M llvm/include/llvm/Support/AllocToken.h
 M llvm/lib/Support/AllocToken.cpp

 Log Message:
 -----------
 [Support] Add getAllocTokenModeAsString() helper (#169650)

Add a helper function getAllocTokenModeAsString() to convert
AllocTokenMode values to their string representation.

NFC.


 Commit: b20d35c4a2b01090e54b8732a3a9d5b69de3e10c
 https://github.com/llvm/llvm-project/commit/b20d35c4a2b01090e54b8732a3a9d5b69de3e10c
 Author: David Green <david.green at arm.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
 M llvm/test/CodeGen/AArch64/addtruncshift.ll

 Log Message:
 -----------
 [AArch64] Combine vector add(trunc(shift)) (#169523)

This adds a combine for
add(trunc(ashr(A, C)), trunc(lshr(A, BW-1))), with C >= BW
->
X = trunc(ashr(A, C)); add(x, lshr(X, BW-1)

The original converts into ashr+lshr+xtn+xtn+add. The second becomes
ashr+xtn+usra. The first form has less total latency due to more
parallelism,
but more micro-ops and seems to be slower in practice.


 Commit: cd1ad5a9e08800043f03f73348b56372a983afa2
 https://github.com/llvm/llvm-project/commit/cd1ad5a9e08800043f03f73348b56372a983afa2
 Author: Wenju He <wenju.he at intel.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp

 Log Message:
 -----------
 [CIR] Add missing switch cases for AO__scoped_atomic_uinc/udec_wrap in emitAtomicOp (#169610)

Fix build error: enumeration values 'AO__scoped_atomic_udec_wrap' and
'AO__scoped_atomic_uinc_wrap' not handled in switch [-Werror,-Wswitch]
The two builtins were added in 5d38cddc3b00.


 Commit: de4e12849bae65699f705bbf10110366ab36dfc4
 https://github.com/llvm/llvm-project/commit/de4e12849bae65699f705bbf10110366ab36dfc4
 Author: Gergely Bálint <gergely.balint at arm.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M bolt/unittests/Core/MCPlusBuilder.cpp

 Log Message:
 -----------
 [BOLT] Fix assertion test (#169635)

The AArch64_BTI MCPlusBuilder unittest was failing in no assertion
builds. Add `#ifndef NDEBUG` to exclude the assertion test from
no assertion builds.


 Commit: 75ae0e882d923fd08360380e010935dd3e960a1b
 https://github.com/llvm/llvm-project/commit/75ae0e882d923fd08360380e010935dd3e960a1b
 Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/docs/OpenMPSupport.rst
 M clang/docs/ReleaseNotes.rst

 Log Message:
 -----------
 [OpenMP] Add docs for fb_nullify/fb_preserve (#169558)

Adding documentation following the merge of
https://github.com/llvm/llvm-project/pull/168905.


 Commit: ff0c347d003098db82db312d5da8ac925c0002dd
 https://github.com/llvm/llvm-project/commit/ff0c347d003098db82db312d5da8ac925c0002dd
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h
 M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
 A llvm/test/tools/opt/infer-data-layout-target-abi.ll
 M llvm/tools/opt/optdriver.cpp

 Log Message:
 -----------
 opt: Try to respect target-abi command line option (#169604)

Mips seems kind of broken with these options. n32 seems to
override the 64-bit arch with 32-bit pointers, and trying
to use any 32-bit mips triple also just errors with any
options.


 Commit: 35dfeb7b4d720f16e9ded25527a0631d63736d78
 https://github.com/llvm/llvm-project/commit/35dfeb7b4d720f16e9ded25527a0631d63736d78
 Author: Steven Perron <stevenperron at google.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
 M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
 M llvm/test/CodeGen/SPIRV/OpVariable_order.ll
 M llvm/test/CodeGen/SPIRV/SpecConstants/restore-spec-type.ll
 M llvm/test/CodeGen/SPIRV/basic_float_types.ll
 M llvm/test/CodeGen/SPIRV/basic_int_types.ll
 M llvm/test/CodeGen/SPIRV/basic_int_types_spirvdis.ll
 M llvm/test/CodeGen/SPIRV/builtin_intrinsics_32.ll
 M llvm/test/CodeGen/SPIRV/builtin_intrinsics_64.ll
 M llvm/test/CodeGen/SPIRV/builtin_vars-decorate.ll
 M llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
 M llvm/test/CodeGen/SPIRV/event-zero-const.ll
 M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fun-ptr-addrcast.ll
 M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bfloat16/bfloat16.ll
 M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_float_controls2/decoration.ll
 M llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions-but-one.ll
 M llvm/test/CodeGen/SPIRV/freeze.ll
 M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/AddUint64.ll
 M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/abs.ll
 M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log10.ll
 M llvm/test/CodeGen/SPIRV/instructions/insertvalue-undef-ptr.ll
 M llvm/test/CodeGen/SPIRV/instructions/select-ptr-load.ll
 R llvm/test/CodeGen/SPIRV/keep-tracked-const.ll
 M llvm/test/CodeGen/SPIRV/llvm-intrinsics/assume.ll
 M llvm/test/CodeGen/SPIRV/llvm-intrinsics/bitreverse_small_type.ll
 M llvm/test/CodeGen/SPIRV/llvm-intrinsics/constrained-arithmetic.ll
 M llvm/test/CodeGen/SPIRV/llvm-intrinsics/lifetime.ll
 M llvm/test/CodeGen/SPIRV/llvm-intrinsics/satur-arith.ll
 M llvm/test/CodeGen/SPIRV/llvm-intrinsics/uadd.with.overflow.ll
 M llvm/test/CodeGen/SPIRV/logical-access-chain.ll
 M llvm/test/CodeGen/SPIRV/logical-struct-access.ll
 M llvm/test/CodeGen/SPIRV/phi-insert-point.ll
 M llvm/test/CodeGen/SPIRV/phi-ptrcast-dominate.ll
 M llvm/test/CodeGen/SPIRV/pointers/bitcast-fix-accesschain.ll
 M llvm/test/CodeGen/SPIRV/pointers/bitcast-fix-load.ll
 M llvm/test/CodeGen/SPIRV/pointers/gep-types-1.ll
 M llvm/test/CodeGen/SPIRV/pointers/getelementptr-addressspace.ll
 M llvm/test/CodeGen/SPIRV/pointers/getelementptr-base-type.ll
 M llvm/test/CodeGen/SPIRV/pointers/getelementptr-bitcast-load.ll
 M llvm/test/CodeGen/SPIRV/pointers/getelementptr-kernel-arg-char.ll
 M llvm/test/CodeGen/SPIRV/pointers/global-addrspacecast.ll
 M llvm/test/CodeGen/SPIRV/pointers/load-addressspace.ll
 M llvm/test/CodeGen/SPIRV/pointers/phi-chain-types.ll
 M llvm/test/CodeGen/SPIRV/pointers/pointer-addrspacecast.ll
 M llvm/test/CodeGen/SPIRV/pointers/ptr-eq-types.ll
 M llvm/test/CodeGen/SPIRV/pointers/resource-vector-load-store.ll
 M llvm/test/CodeGen/SPIRV/pointers/type-deduce-call-no-bitcast.ll
 A llvm/test/CodeGen/SPIRV/remove-dead-type-intrinsics.ll
 M llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse-subbyte.ll
 M llvm/test/CodeGen/SPIRV/transcoding/OpGenericCastToPtr.ll
 M llvm/test/CodeGen/SPIRV/transcoding/OpPtrCastToGeneric.ll
 M llvm/test/CodeGen/SPIRV/transcoding/fcmp.ll
 M llvm/test/CodeGen/SPIRV/transcoding/spirv-event-null.ll
 M llvm/test/CodeGen/SPIRV/uitofp-with-bool.ll

 Log Message:
 -----------
 [SPIRV] Enable DCE in instruction selection and update tests (#168428)

The instruction selection pass for SPIR-V now performs dead code
elimination (DCE).
This change removes unused instructions, leading to more optimized
SPIR-V output.

As a consequence of this, several tests were updated to ensure their
continued
correctness and to prevent previously tested code from being optimized
away.
Specifically:
- Many tests now store computed values into global variables to ensure
they are
 not eliminated by DCE, allowing their code generation to be verified.
- The test `keep-tracked-const.ll` was removed because it no longer
tested
its original intent. The check statements in this test were for
constants
generated when expanding a G_TRUNC instruction, which is now removed by
DCE
 instead of being expanded.
- A new test, `remove-dead-type-intrinsics.ll`, was added to confirm
that dead
 struct types are correctly removed by the compiler.

These updates improve the SPIR-V backends optimization capabilities and
maintain the robustness of the test suite.

---------

Co-authored-by: Nathan Gauër <github at keenuts.net>


 Commit: 0c2701fe7fa002e1befc5f86c268a7964f96d286
 https://github.com/llvm/llvm-project/commit/0c2701fe7fa002e1befc5f86c268a7964f96d286
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AArch64/AArch64.td
 M llvm/lib/Target/AMDGPU/R600.td
 M llvm/lib/Target/AMDGPU/SIInstructions.td
 M llvm/lib/Target/ARM/ARM.td
 M llvm/lib/Target/AVR/AVR.td
 M llvm/lib/Target/BPF/BPF.td
 M llvm/lib/Target/CSKY/CSKY.td
 M llvm/lib/Target/DirectX/DirectX.td
 M llvm/lib/Target/Hexagon/Hexagon.td
 M llvm/lib/Target/Lanai/Lanai.td
 M llvm/lib/Target/LoongArch/LoongArch.td
 M llvm/lib/Target/M68k/M68k.td
 M llvm/lib/Target/MSP430/MSP430.td
 M llvm/lib/Target/Mips/Mips.td
 M llvm/lib/Target/NVPTX/NVPTX.td
 M llvm/lib/Target/PowerPC/PPC.td
 M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
 M llvm/lib/Target/RISCV/RISCV.td
 M llvm/lib/Target/SPIRV/SPIRV.td
 M llvm/lib/Target/Sparc/Sparc.td
 M llvm/lib/Target/SystemZ/SystemZ.td
 M llvm/lib/Target/VE/VE.td
 M llvm/lib/Target/WebAssembly/WebAssembly.td
 M llvm/lib/Target/X86/X86.td
 M llvm/lib/Target/XCore/XCore.td
 M llvm/lib/Target/Xtensa/Xtensa.td

 Log Message:
 -----------
 CodeGen: Make all targets override pseudos with pointers (#159881)

This eliminates the need to have PointerLikeRegClass handling in
codegen.


 Commit: 6e983e3876afe5e502d96cef3d4b0fbb7cd068ed
 https://github.com/llvm/llvm-project/commit/6e983e3876afe5e502d96cef3d4b0fbb7cd068ed
 Author: Steven Perron <stevenperron at google.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
 M llvm/lib/Target/SPIRV/SPIRVCBufferAccess.cpp
 M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
 M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
 M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
 M llvm/lib/Target/SPIRV/SPIRVIRMapping.h
 M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
 M llvm/lib/Target/SPIRV/SPIRVUtils.h
 A llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer-peeled-array-minimal.ll
 A llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer-peeled-array.ll

 Log Message:
 -----------
 [SPIRV] Support Peeled Array Layouts for HLSL CBuffers (#169078)

This commit adds support for 'peeled arrays' in HLSL constant buffers.
HLSL CBuffers may have padding between array elements but not after the
last element. This is represented in LLVM IR as {[N-1 x {T, pad}], T}.

Changes include:
- Recognition of the peeled array pattern.
- Logic to reconstitute these into SPIR-V compatible arrays.
- Support for spirv.Padding type in GlobalRegistry and Builtins.
- Updates to SPIRVCBufferAccess to correctly calculate member offsets
 in these padded structures.

Depends on https://github.com/llvm/llvm-project/pull/169076


 Commit: e7bcd80e5bbc9c4c287d835a1df46742ba0fc3e9
 https://github.com/llvm/llvm-project/commit/e7bcd80e5bbc9c4c287d835a1df46742ba0fc3e9
 Author: Steven Perron <stevenperron at google.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
 A llvm/test/CodeGen/SPIRV/llvm-intrinsics/logical-memcpy.ll

 Log Message:
 -----------
 [SPIRV] Use OpCopyMemory for logical SPIRV memcpy (#169348)

This commit modifies the SPIRV instruction selector to emit
`OpCopyMemory`
instead of `OpCopyMemorySized` when generating SPIRV for logical
addressing.

Previously, `G_MEMCPY` was translated to `OpCopyMemorySized`, which
requires an
explicit size operand. However, for logical SPIRV, the size of the
pointee type
is implicitly known. This change ensures that `OpCopyMemory` is used,
which is
more appropriate for logical SPIRV and aligns with the SPIR-V
specification for
logical addressing.


 Commit: 7bf459bce34280273942e4a75ce9eab4d4b4e496
 https://github.com/llvm/llvm-project/commit/7bf459bce34280273942e4a75ce9eab4d4b4e496
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/test/TableGen/DuplicateFieldValues.td
 M llvm/test/TableGen/RegClassByHwMode.td
 M llvm/test/TableGen/def-multiple-operands.td
 M llvm/test/TableGen/get-named-operand-idx.td
 M llvm/test/TableGen/get-operand-type-no-expand.td
 M llvm/test/TableGen/get-operand-type.td
 M llvm/test/TableGen/target-specialized-pseudos.td
 M llvm/utils/TableGen/InstrInfoEmitter.cpp

 Log Message:
 -----------
 CodeGen: Make target overrides of PointerLikeRegClass mandatory (#159882)

Most targets should now use the convenience multiclass to fixup
the operand definitions of pointer-using pseudoinstructions:

defm : RemapAllTargetPseudoPointerOperands<target_ptr_regclass>;


 Commit: 9b88cd9945c5077f0d07f04cd9c9e8e146c48a1b
 https://github.com/llvm/llvm-project/commit/9b88cd9945c5077f0d07f04cd9c9e8e146c48a1b
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/include/llvm/MC/MCInstrDesc.h
 M llvm/include/llvm/Target/Target.td
 M llvm/lib/CodeGen/TargetInstrInfo.cpp
 M llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp
 M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
 M llvm/utils/TableGen/Common/InstructionEncoding.cpp
 M llvm/utils/TableGen/DAGISelMatcherGen.cpp
 M llvm/utils/TableGen/InstrInfoEmitter.cpp

 Log Message:
 -----------
 CodeGen: Remove PointerLikeRegClass handling from codegen (#159883)

All uses have been migrated to RegClassByHwMode. This is now
an implementation detail of InstrInfoEmitter for pseudoinstructions.


 Commit: 43e69b18920ecabcf7c6c5fb898f9b18120200f2
 https://github.com/llvm/llvm-project/commit/43e69b18920ecabcf7c6c5fb898f9b18120200f2
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/include/llvm/IR/RuntimeLibcalls.td
 M llvm/lib/IR/RuntimeLibcalls.cpp
 M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/basic.ll

 Log Message:
 -----------
 RuntimeLibcalls: Add malloc and free entries (#167081)

Calloc was already here, but not the others. Also add
manual type information.


 Commit: 59b3d1814afca973d1417ed2f1d5dac4af3de636
 https://github.com/llvm/llvm-project/commit/59b3d1814afca973d1417ed2f1d5dac4af3de636
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/include/llvm/IR/RuntimeLibcalls.td

 Log Message:
 -----------
 RuntimeLibcalls: Add more function entries from TargetLibraryInfo (#167082)

Script scraped dump of most functions in TargetLibraryInfo.def,
with existing entries and a few special cases removed. This only
adds the definitions, and doesn't add them to any system yet.

Adding them in the correct places is the hard part, since it's
all written as opt-out with manually written exemptions in
TargetLibraryInfo.


 Commit: 9e1d3cac8562fab0a62c1ab19228da5ff6fb26c5
 https://github.com/llvm/llvm-project/commit/9e1d3cac8562fab0a62c1ab19228da5ff6fb26c5
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/include/llvm/IR/RuntimeLibcalls.h
 M llvm/include/llvm/IR/RuntimeLibcalls.td
 A llvm/test/Transforms/Util/DeclareRuntimeLibcalls/darwin.ll

 Log Message:
 -----------
 RuntimeLibcalls: Add memset_pattern* calls to darwin systems (#167083)

This is one of the easier cases to comprehend in TargetLibraryInfo's
setup.


 Commit: e8b9d4217046727845d107c6d4e4ff275e6ee1b4
 https://github.com/llvm/llvm-project/commit/e8b9d4217046727845d107c6d4e4ff275e6ee1b4
 Author: anoopkg6 <anoop.kumar6 at ibm.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/lib/Driver/ToolChains/Linux.cpp
 M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
 M compiler-rt/lib/tysan/tysan_platform.h

 Log Message:
 -----------
 [tysan] Type Sanitizer support for SystemZ (#162396)

Type Sanitizer support for SystemZ.

Co-authored-by: anoopkg6 <anoopkg6 at github.com>


 Commit: 44c9d3a6f5d155ce7d934244dd673b7a8cd5296b
 https://github.com/llvm/llvm-project/commit/44c9d3a6f5d155ce7d934244dd673b7a8cd5296b
 Author: anoopkg6 <anoop.kumar6 at ibm.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/lib/Driver/ToolChains/Linux.cpp
 M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake

 Log Message:
 -----------
 [scudo] Add scudo_standalone support for SystemZ (#166187)

Add Support for scudo_standalone for SystemZ without enabling gwp_asan.

Co-authored-by: anoopkg6 <anoopkg6 at github.com>


 Commit: c333f7dab9f89734777f7d19bc7b68c86f393216
 https://github.com/llvm/llvm-project/commit/c333f7dab9f89734777f7d19bc7b68c86f393216
 Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
 M mlir/test/Dialect/XeGPU/subgroup-distribute-unit.mlir

 Log Message:
 -----------
 [mlir][xegpu] Add layout based SIMT distribution support for `vector.extract/insert_strided_slice` (#168626)

This PR adds general SIMT distribution support for
`vector.extract/insert_strided_slice`. Currently vector distribution
already have support for these operations but have restrictions to avoid
requiring layouts during distribution logic. For example,
`extract_stride_slice` require that distributed dimension is fully
extracted. However, more complex cases may require extracting partially
from distributed dimension (eg. 8x16xf16 extraction from 8x32xf16).
These types of cases need the layouts to reason about how the data is
spread across SIMT lanes.

Currently, we don't have layout access in vector distribution so these
new patterns are place in XeGPU side. They have higher pattern benefit
so that they will be tried first before trying regular vector
distribution based patterns.


 Commit: 96cbbebc20dc62e6a780952e3745f67aaefcdf13
 https://github.com/llvm/llvm-project/commit/96cbbebc20dc62e6a780952e3745f67aaefcdf13
 Author: Shaoce SUN <sunshaoce at outlook.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td

 Log Message:
 -----------
 [MC][RISCV] Add missing Predicates for NDS_FMV_BF16_X (#169662)

run 
```shell
build/bin/llvm-exegesis -mode=latency -mtriple=riscv64-unknown-linux-gnu --mcpu=generic --benchmark-phase=assemble-measured-code -opcode-index=-1
```

error:
```
---
mode: latency
key:
 instructions:
 - 'NDS_FMV_BF16_X F2_H X11'
 - 'NDS_FMV_X_BF16 X26 F2_H'
 config: ''
 register_initial_values:
 - 'X11=0x0'
cpu_name: generic
llvm_triple: riscv64-unknown-linux-gnu
min_instructions: 10000
measurements: []
error: actual measurements skipped.
info: Repeating two instructions
assembled_snippet: 41116AE48145538105F0530D01E0538105F0530D01E0538105F0530D01E0538105F0530D01E0226D41018280
...
LLVM ERROR: Attempting to emit FMV_H_X instruction but the Feature_HasHalfFPLoadStoreMove predicate(s) are not met
```


 Commit: 071d1fb8beda4c0ec9ede0acab12a382f34758fe
 https://github.com/llvm/llvm-project/commit/071d1fb8beda4c0ec9ede0acab12a382f34758fe
 Author: Sam Tebbs <samuel.tebbs at arm.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
 M llvm/lib/Transforms/Vectorize/VPlan.h
 M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
 M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
 M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
 M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
 M llvm/lib/Transforms/Vectorize/VPlanValue.h
 M llvm/test/Transforms/LoopVectorize/AArch64/vplan-printing.ll
 M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp

 Log Message:
 -----------
 [LV] Use VPReductionRecipe for partial reductions (#147513)

Partial reductions can easily be represented by the VPReductionRecipe
class by setting their scale factor to something greater than 1. This PR
merges the two together and gives VPReductionRecipe a VFScaleFactor so
that it can choose to generate the partial reduction intrinsic at
execute time.

Stacked PRs:
1. https://github.com/llvm/llvm-project/pull/147026
2. https://github.com/llvm/llvm-project/pull/147255
3. https://github.com/llvm/llvm-project/pull/156976
4. https://github.com/llvm/llvm-project/pull/160154
5. https://github.com/llvm/llvm-project/pull/147302
6. https://github.com/llvm/llvm-project/pull/162503
7. -> https://github.com/llvm/llvm-project/pull/147513

Replaces https://github.com/llvm/llvm-project/pull/146073 .


 Commit: 7c3c8dabd6ddcbf153ff2c7024ba1164524e5423
 https://github.com/llvm/llvm-project/commit/7c3c8dabd6ddcbf153ff2c7024ba1164524e5423
 Author: daniilavdeev <daniilavdeev237 at gmail.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/include/clang/Basic/DiagnosticDriverKinds.td
 M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
 M clang/test/Driver/riscv-features.c

 Log Message:
 -----------
 Revert [Driver] Error for -gsplit-dwarf with RISC-V linker relaxation (#169653)

This patch reverts 80a4e6fd31a06143b83947785ea3bd5c04344ea6

After the relevant patches clang now supports dwarf fission with RISC-V
linker relaxations, so we can remove the related driver error.


 Commit: 9bd30e2f272536e82730b115720fa807d7be9be9
 https://github.com/llvm/llvm-project/commit/9bd30e2f272536e82730b115720fa807d7be9be9
 Author: Sam Tebbs <samuel.tebbs at arm.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AArch64/AArch64Features.td
 M llvm/lib/Target/AArch64/AArch64Processors.td
 M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
 M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/fully-unrolled-cost.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-scalable.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-zext-costs.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/wider-VF-for-callinst.ll

 Log Message:
 -----------
 [AArch64] Enable maximising scalable vector bandwidth (#166748)

This PR enables maximising scalable vector bandwidth for all AArch64
cores other than the V1 and N2. Those two have shown small regressions
that we'll investigate, fix and then enable.


 Commit: e99029ef0f0f0bacd8b734058e9cf2be971f16de
 https://github.com/llvm/llvm-project/commit/e99029ef0f0f0bacd8b734058e9cf2be971f16de
 Author: Kaitlin Peng <kaitlinpeng at microsoft.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
 M clang/test/CodeGenHLSL/builtins/faceforward.hlsl

 Log Message:
 -----------
 [HLSL] Remove `faceforward` SPIRV fast path (#169547)


 Commit: cca66a21c20537171712b3adf35b4b82de5f2ad5
 https://github.com/llvm/llvm-project/commit/cca66a21c20537171712b3adf35b4b82de5f2ad5
 Author: Gergely Bálint <gergely.balint at arm.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M bolt/include/bolt/Core/MCPlusBuilder.h
 M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
 M bolt/unittests/Core/MCPlusBuilder.cpp

 Log Message:
 -----------
 [BOLT][BTI] Add MCPlusBuilder::updateBTIVariant (#167308)

Checks if an instruction is BTI, and updates the immediate value to the
newly requested variant. 
 
This can be used in situations when the compiler already inserted a BTI
landing pad to a location, but BOLT needs to update it to a different
variant.
Example: br x0 to a location with a BTI c.


 Commit: b78b5ba225c121fb4463791bcbdd78be19e49213
 https://github.com/llvm/llvm-project/commit/b78b5ba225c121fb4463791bcbdd78be19e49213
 Author: Lei Huang <lei at ca.ibm.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 R llvm/test/MC/PowerPC/ppc64-encoding-ISA31-errors.s
 M llvm/test/MC/PowerPC/ppc64-errors.s

 Log Message:
 -----------
 [NFC][PowerPC] Merge ppc64 encoding error tests (#169669)

Based on the RUN lines, there is actually no need for different versions
of these error files since no cpu specific
option needed. Combine to reduce confusion and maintenance as these are
not huge files.


 Commit: 356479191ca001df47136c89cc9a761c64a6323c
 https://github.com/llvm/llvm-project/commit/356479191ca001df47136c89cc9a761c64a6323c
 Author: Lucie Choi <clucie at google.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
 A llvm/test/Transforms/IndVarSimplify/skip-predication-convergence.ll
 A llvm/test/Transforms/IndVarSimplify/skip-predication-nested-convergence.ll

 Log Message:
 -----------
 [IndVarSimplify] Fix `IndVarSimplify` to skip unfolding predicates when the loop contains control convergence operations. (#165643)

Skip constant folding the loop predicates if the loop contains control
convergence tokens referenced outside the loop.

Fixes https://github.com/llvm/llvm-project/issues/164496.

Verified
[loop_peeling.test](https://github.com/llvm/offload-test-suite/pull/473)
passes with the fix.

Similar control convergence issues are found on other passes.
https://github.com/llvm/llvm-project/issues/165642

HLSL used for tests:
```hlsl
RWStructuredBuffer<uint> Out : register(u0);

[numthreads(8,1,1)]
void main(uint3 TID : SV_GroupThreadID) {
 for (uint i = 0; i < 8; i++) {
 if (i == TID.x) {
 Out[TID.x] = WaveActiveMax(TID.x);
 break;
 }
 }
}
```
With nested loop:
```hlsl
RWStructuredBuffer<uint> Out : register(u0);

[numthreads(8,8,1)]
void main(uint3 TID : SV_GroupThreadID) {
 for (uint i = 0; i < 8; i++) {
 for (uint j = 0; j < 8; j++) {
 if (i == TID.x && j == TID.y) {
 uint index = TID.x * 8 + TID.y;
 Out[index] = WaveActiveMax(index);
 break;
 }
 }
 }
}
```


 Commit: 84d511df8dcdd6da00be41b250312d84b5de41a7
 https://github.com/llvm/llvm-project/commit/84d511df8dcdd6da00be41b250312d84b5de41a7
 Author: Jason-VanBeusekom <jason.van-beusekom at hpe.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M offload/include/omptarget.h
 M offload/libomptarget/PluginManager.cpp
 M offload/libomptarget/device.cpp
 A offload/test/api/omp_indirect_call_table_manual.c

 Log Message:
 -----------
 [OpenMP][clang] Register vtables on device for indirect calls runtime (#167011)

This is a branch off of
https://github.com/llvm/llvm-project/pull/159856, in which consists of
the runtime portion of the changes required to support indirect function
and virtual function calls on an `omp target device` when the virtual
class / indirect function is mapped to the device from the host.

Key Changes

- Introduced a new flag OMP_DECLARE_TARGET_INDIRECT_VTABLE to mark
VTable registrations
- Modified setupIndirectCallTable to support both VTable entries and
indirect function pointers

Details:
The setupIndirectCallTable implementation was modified to support this
registration type by retrieving the first address of the VTable and
inferring the remaining data needed to build the indirect call table.
Since the Vtables / Classes registered as indirect can be larger than 8
bytes, and the vtables may not be at the first address we either need to
pass the size to __llvm_omp_indirect_call_lookup and have a check at
each step of the binary search, or add multiple entries to the indirect
table for each address registered. The latter was chosen.

Commit: a00def3f20e166d4fb9328e6f0bc0742cd0afa31 is not a part of this
PR and is handled / reviewed in:
https://github.com/llvm/llvm-project/pull/159856,

This is PR (2/3) 
Register Vtable PR (1/3):
https://github.com/llvm/llvm-project/pull/159856,
Codegen / _llvm_omp_indirect_call_lookup PR (3/3):
https://github.com/llvm/llvm-project/pull/159857


 Commit: 954fa0f9bae73a2214d1d5079d6c3c028dca42ce
 https://github.com/llvm/llvm-project/commit/954fa0f9bae73a2214d1d5079d6c3c028dca42ce
 Author: Moritz Zielke <moritz.zielke at gmail.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/include/clang/Basic/BuiltinsX86.td
 M clang/lib/AST/ByteCode/InterpBuiltin.cpp
 M clang/lib/AST/ExprConstant.cpp
 M clang/test/CodeGen/X86/avx512f-builtins.c
 M clang/test/CodeGen/X86/avx512vl-builtins.c

 Log Message:
 -----------
 [Clang] Allow AVX/AVX512 subvector shuffles in constexpr (#168700)

Resolves #160514

Enables usage of the following x86 intrinsics in `constexpr`:

```
_mm256_shuffle_i64x2 _mm256_mask_shuffle_i64x2 _mm256_maskz_shuffle_i64x2 
_mm256_shuffle_f64x2 _mm256_mask_shuffle_f64x2 _mm256_maskz_shuffle_f64x2 
_mm512_shuffle_i64x2 _mm512_mask_shuffle_i64x2 _mm512_maskz_shuffle_i64x2 
_mm512_shuffle_f64x2 _mm512_mask_shuffle_f64x2 _mm512_maskz_shuffle_f64x2 

_mm256_shuffle_i32x4 _mm256_mask_shuffle_i32x4 _mm256_maskz_shuffle_i32x4 
_mm256_shuffle_f32x4 _mm256_mask_shuffle_f32x4 _mm256_maskz_shuffle_f32x4 
_mm512_shuffle_i32x4 _mm512_mask_shuffle_i32x4 _mm512_maskz_shuffle_i32x4 
_mm512_shuffle_f32x4 _mm512_mask_shuffle_f32x4 _mm512_maskz_shuffle_f32x4 
```


 Commit: 411a53e16fbc9bfe23fd887c918c3ec5d74fa2bc
 https://github.com/llvm/llvm-project/commit/411a53e16fbc9bfe23fd887c918c3ec5d74fa2bc
 Author: Letu Ren <fantasquex at gmail.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/include/clang/CIR/Dialect/IR/CIROps.td
 M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
 M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
 M clang/test/CIR/CodeGen/builtins-floating-point.c

 Log Message:
 -----------
 [CIR] Upstream Builtin Exp2Op (#169152)

Add the cir::exp2 operation and handling for the related builtins.


 Commit: 0940f686dc332557f0368290ebc3d9aff1f36714
 https://github.com/llvm/llvm-project/commit/0940f686dc332557f0368290ebc3d9aff1f36714
 Author: Justin Bogner <mail at justinbogner.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/unittests/Support/JobserverTest.cpp

 Log Message:
 -----------
 Move static test variable into the #if that uses it (#169695)

Fixes -Wunused-variable when compiling without LLVM_ENABLE_THREADS


 Commit: c98e867822d8e741159ff0be09ccc2a5c7841a28
 https://github.com/llvm/llvm-project/commit/c98e867822d8e741159ff0be09ccc2a5c7841a28
 Author: Corentin Jabot <corentinjabot at gmail.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/docs/ReleaseNotes.rst
 M clang/lib/Sema/SemaStmt.cpp
 M clang/lib/Sema/SemaType.cpp
 M clang/test/SemaCXX/return.cpp

 Log Message:
 -----------
 [Clang] Fix false positive -Wignored-qualifiers (#169664)

A deduced return type can be an object type, in which case `const` can
have an effect.
Delay the diagnostic to the point at which the type is deduced. 
Add tests for lambdas.

Fixes #43054

Note that there is a discussion in #43054 about adding a separate
warning for "const return types are weird" for the class type cases, but
it would have to be a separate warning - warning which currently exists
in clang-tidy as `readability-const-return-type`.


 Commit: 18805b6ce9a4887ea6a19ce7e4f8fc943a716ec5
 https://github.com/llvm/llvm-project/commit/18805b6ce9a4887ea6a19ce7e4f8fc943a716ec5
 Author: Amr Hesham <amr96 at programmer.net>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
 M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
 M clang/lib/CIR/CodeGen/CIRGenFunction.h
 A clang/test/CIR/CodeGen/count-of.c

 Log Message:
 -----------
 [CIR] CountOf VLA with Array element type (#169404)

Implement CountOf on VariableArrayType with IntegerConstant SizeExpr


 Commit: 587e279a880add8017bdc9484c3bf9030fdcec8f
 https://github.com/llvm/llvm-project/commit/587e279a880add8017bdc9484c3bf9030fdcec8f
 Author: Andy Kaylor <akaylor at nvidia.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp

 Log Message:
 -----------
 [CIR][NFC] Cleanup builtin helper function interfaces (#169586)

A couple of builtin helper functions were taking a clang::Expr argument
but only using it to build an MLIR location. This change updates these
functions to take a location directly.


 Commit: 5ab3375b2cf461ab02704d129a1f4d5ba1a1e275
 https://github.com/llvm/llvm-project/commit/5ab3375b2cf461ab02704d129a1f4d5ba1a1e275
 Author: Janet Yang <qxy11 at meta.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M lldb/include/lldb/API/SBTarget.h
 M lldb/include/lldb/Target/Target.h
 M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
 M lldb/source/API/SBTarget.cpp
 M lldb/source/Target/Target.cpp
 M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
 M lldb/test/API/tools/lldb-dap/startDebugging/TestDAP_startDebugging.py
 M lldb/tools/lldb-dap/CMakeLists.txt
 M lldb/tools/lldb-dap/DAP.cpp
 M lldb/tools/lldb-dap/DAP.h
 M lldb/tools/lldb-dap/DAPForward.h
 A lldb/tools/lldb-dap/DAPSessionManager.cpp
 A lldb/tools/lldb-dap/DAPSessionManager.h
 M lldb/tools/lldb-dap/EventHelper.cpp
 M lldb/tools/lldb-dap/EventHelper.h
 M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
 M lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
 M lldb/tools/lldb-dap/Handler/LaunchRequestHandler.cpp
 M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
 M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
 M lldb/tools/lldb-dap/package.json
 M lldb/tools/lldb-dap/tool/lldb-dap.cpp
 M lldb/unittests/DAP/CMakeLists.txt
 A lldb/unittests/DAP/DAPSessionManagerTest.cpp
 M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn

 Log Message:
 -----------
 [lldb-dap] Add multi-session support with shared debugger instances (#163653)

## Summary:
This change introduces a `DAPSessionManager` to enable multiple DAP
sessions to share debugger instances when needed, for things like child
process debugging and some scripting hooks that create dynamically new
targets.

Changes include:
- Add `DAPSessionManager` singleton to track and coordinate all active DAP
sessions
- Support attaching to an existing target via its globally unique target
ID (targetId parameter)
- Share debugger instances across sessions when new targets are created
dynamically
- Refactor event thread management to allow sharing event threads
between sessions and move event thread and event thread handlers to `EventHelpers`
- Add `eBroadcastBitNewTargetCreated` event to notify when new targets are
created
- Extract session names from target creation events
- Defer debugger initialization from 'initialize' request to
'launch'/'attach' requests. The only time the debugger is used currently
in between its creation in `InitializeRequestHandler` and the `Launch`
or `Attach` requests is during the `TelemetryDispatcher` destruction
call at the end of the `DAP::HandleObject` call, so this is safe.

This enables scenarios when new targets are created dynamically so that
the debug adapter can automatically start a new debug session for the
spawned target while sharing the debugger instance.

## Tests:
The refactoring maintains backward compatibility. All existing DAP test
cases pass.

Also added a few basic unit tests for DAPSessionManager
```
>> ninja DAPTests
>> ./tools/lldb/unittests/DAP/DAPTests
>>./bin/llvm-lit -v ../llvm-project/lldb/test/API/tools/lldb-dap/
```


 Commit: bf43b95025124017b37aa8fd0ee7dc94ac4d670e
 https://github.com/llvm/llvm-project/commit/bf43b95025124017b37aa8fd0ee7dc94ac4d670e
 Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M flang/lib/Lower/OpenMP/ClauseProcessor.h

 Log Message:
 -----------
 [flang][OpenMP] Remove unused #include "dump-parse-tree.h", NFC (#169708)


 Commit: a059afafde068773693c1fab4d89c208b1437f76
 https://github.com/llvm/llvm-project/commit/a059afafde068773693c1fab4d89c208b1437f76
 Author: Igor Kudrin <ikudrin at accesssoftek.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M lldb/source/Target/Process.cpp
 M lldb/source/Target/Target.cpp
 M lldb/unittests/Target/MemoryTest.cpp

 Log Message:
 -----------
 [lldb] Fix reading 32-bit signed integers (#169150)

Both `Target::ReadSignedIntegerFromMemory()` and
`Process::ReadSignedIntegerFromMemory()` internally created an unsigned
scalar, so extending the value later did not duplicate the sign bit.


 Commit: 66e18b86b8b1e98eeb71d7ab57cb09a26dff6b96
 https://github.com/llvm/llvm-project/commit/66e18b86b8b1e98eeb71d7ab57cb09a26dff6b96
 Author: Alexey Bataev <a.bataev at outlook.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 A llvm/test/Transforms/SLPVectorizer/X86/user-with-multi-copyable-ops.ll

 Log Message:
 -----------
 [SLP][NFC]Add a test with single op inst, used in many nodes, NFC.


 Commit: d09644a294c8393eb7a2cc586762a8d3f60b5aeb
 https://github.com/llvm/llvm-project/commit/d09644a294c8393eb7a2cc586762a8d3f60b5aeb
 Author: Ravil Dorozhinskii <ravil.aviva.com at gmail.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
 M mlir/test/Dialect/LLVMIR/rocdl.mlir
 M mlir/test/Target/LLVMIR/rocdl.mlir

 Log Message:
 -----------
 [ROCDL] Added missing `cluster.load.async.to.lds` op (gfx1250) (#169042)

* Added missing cluster.load ops with different sizes. Extended all
rocdl tests


 Commit: 72e51d389f66d9cc6b55fd74b56fbbd087672a43
 https://github.com/llvm/llvm-project/commit/72e51d389f66d9cc6b55fd74b56fbbd087672a43
 Author: Florian Hahn <flo at fhahn.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
 M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
 M llvm/lib/Transforms/Vectorize/VPlan.h
 M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
 M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
 M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
 M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
 M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
 M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
 M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
 M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
 M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
 M llvm/test/Transforms/LoopVectorize/first-order-recurrence-tail-folding.ll
 M llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll
 M llvm/test/Transforms/LoopVectorize/optsize.ll
 M llvm/test/Transforms/LoopVectorize/pr43166-fold-tail-by-masking.ll
 M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
 M llvm/test/Transforms/LoopVectorize/use-scalar-epilogue-if-tp-fails.ll

 Log Message:
 -----------
 Reapply "[LV] Use ExtractLane(LastActiveLane, V) live outs when tail-folding. (#149042)"

This reverts commit a6edeedbfa308876d6f2b1648729d52970bb07e6.

The following fixes have landed, addressing issues causing the original
revert:
* https://github.com/llvm/llvm-project/pull/169298
* https://github.com/llvm/llvm-project/pull/167897
* https://github.com/llvm/llvm-project/pull/168949

Original message:
Building on top of https://github.com/llvm/llvm-project/pull/148817,
introduce a new abstract LastActiveLane opcode that gets lowered to
Not(Mask) → FirstActiveLane(NotMask) → Sub(result, 1).

When folding the tail, update all extracts for uses outside the loop the
extract the value of the last actice lane.

See also https://github.com/llvm/llvm-project/issues/148603

PR: https://github.com/llvm/llvm-project/pull/149042


 Commit: 684f64c0baca15c84e222c0f7c7455e8c505e575
 https://github.com/llvm/llvm-project/commit/684f64c0baca15c84e222c0f7c7455e8c505e575
 Author: n2h9 <13541181+n2h9 at users.noreply.github.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M lldb/packages/Python/lldbsuite/test/builders/darwin.py

 Log Message:
 -----------
 [lldb] [test-suite] fix typo in variable in darwin builder (#169254)

While taking a look at the code of lldb test-suite packages, I have
noticed that in `get_triple_str` in `darwin.py` env is added inside a
`components` list, which is probably supposed to be `component` (defined
on the line 61).

Signed-off-by: Nikita B <n2h9z4 at gmail.com>


 Commit: a4d42775b9af0d961f71934e38342a9384534022
 https://github.com/llvm/llvm-project/commit/a4d42775b9af0d961f71934e38342a9384534022
 Author: n2h9 <13541181+n2h9 at users.noreply.github.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M lldb/bindings/interface/SBTargetExtensions.i
 M lldb/examples/python/templates/scripted_process.py
 M lldb/include/lldb/API/SBTarget.h
 M lldb/source/API/SBTarget.cpp
 M lldb/test/API/python_api/target/TestTargetAPI.py

 Log Message:
 -----------
 [lldb] [scripting bridge] 167388 chore: add api to return arch name for target (#168273)

This pr fixes #167388 .

## Description

This pr adds new method `GetArchName` to `SBTarget` so that no need to
parse triple to get arch name in client code.

## Testing

### All from `TestTargetAPI.py`

run test with

```
./build/bin/lldb-dotest -v -p TestTargetAPI.py
```
<details>
<summary>existing tests (without newly added)</summary>
<img width="1425" height="804" alt="image"
src="https://github.com/user-attachments/assets/617e4c69-5c6b-44c4-9aeb-b751a47e253c"
/>
</details>

<details>
<summary>existing tests (with newly added)</summary>
<img width="1422" height="778" alt="image"
src="https://github.com/user-attachments/assets/746990a1-df88-4348-a090-224963d3c640"
/>

</details>

### Only `test_get_arch_name`

run test with 
```
./build/bin/lldb-dotest -v -p TestTargetAPI.py -f test_get_arch_name_dwarf -f test_get_arch_name_dwo -f test_get_arch_name_dsym lldb/test/API/python_api/target

```
<details>
<summary>only newly added</summary>
<img width="1422" height="778" alt="image"
src="https://github.com/user-attachments/assets/fcaafa5d-2622-4171-acee-e104ecee0652"
/>
</details>

---------

Signed-off-by: Nikita B <n2h9z4 at gmail.com>
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>


 Commit: d58ebe339c920e1a90f4fd87b0873a119e5f9d05
 https://github.com/llvm/llvm-project/commit/d58ebe339c920e1a90f4fd87b0873a119e5f9d05
 Author: Florian Hahn <flo at fhahn.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
 M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
 M llvm/lib/Transforms/Vectorize/VPlan.h
 M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
 M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
 M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
 M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
 M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
 M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
 M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
 M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
 M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
 M llvm/test/Transforms/LoopVectorize/first-order-recurrence-tail-folding.ll
 M llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll
 M llvm/test/Transforms/LoopVectorize/optsize.ll
 M llvm/test/Transforms/LoopVectorize/pr43166-fold-tail-by-masking.ll
 M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
 M llvm/test/Transforms/LoopVectorize/use-scalar-epilogue-if-tp-fails.ll

 Log Message:
 -----------
 Revert "Reapply "[LV] Use ExtractLane(LastActiveLane, V) live outs when tail-folding. (#149042)""

This reverts commit 72e51d389f66d9cc6b55fd74b56fbbd087672a43.

Missed some test updates.


 Commit: 9af00e62ecc33960ada5366bffc369a647699fe9
 https://github.com/llvm/llvm-project/commit/9af00e62ecc33960ada5366bffc369a647699fe9
 Author: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
 M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h
 M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
 M mlir/test/Dialect/AMDGPU/ops.mlir

 Log Message:
 -----------
 [mlir][amdgpu] Add make_dma_base operation (#169086)


 Commit: cabcb5ae55f117d15f41aed8f064dc528ddc9e8f
 https://github.com/llvm/llvm-project/commit/cabcb5ae55f117d15f41aed8f064dc528ddc9e8f
 Author: Andy Kaylor <akaylor at nvidia.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/lib/CIR/CodeGen/CIRGenFunction.cpp

 Log Message:
 -----------
 [CIR][NFC] Fix build problem inside an assert (#169715)

A recent change introduced a failure in debug builds due to an incorrect
level of indirection inside an assert. This fixes that.


 Commit: f8eca64a2820553ffc22c58ac39c2e5c14888e61
 https://github.com/llvm/llvm-project/commit/f8eca64a2820553ffc22c58ac39c2e5c14888e61
 Author: Florian Hahn <flo at fhahn.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
 M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
 M llvm/lib/Transforms/Vectorize/VPlan.h
 M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
 M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
 M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
 M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
 M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
 M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
 M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
 M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
 M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
 M llvm/test/Transforms/LoopVectorize/first-order-recurrence-tail-folding.ll
 M llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll
 M llvm/test/Transforms/LoopVectorize/optsize.ll
 M llvm/test/Transforms/LoopVectorize/pr43166-fold-tail-by-masking.ll
 M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
 M llvm/test/Transforms/LoopVectorize/use-scalar-epilogue-if-tp-fails.ll

 Log Message:
 -----------
 Reapply "[LV] Use ExtractLane(LastActiveLane, V) live outs when tail-folding. (#149042)"

This reverts commit a6edeedbfa308876d6f2b1648729d52970bb07e6.

The following fixes have landed, addressing issues causing the original
revert:
* https://github.com/llvm/llvm-project/pull/169298
* https://github.com/llvm/llvm-project/pull/167897
* https://github.com/llvm/llvm-project/pull/168949

Original message:
Building on top of https://github.com/llvm/llvm-project/pull/148817,
introduce a new abstract LastActiveLane opcode that gets lowered to
Not(Mask) → FirstActiveLane(NotMask) → Sub(result, 1).

When folding the tail, update all extracts for uses outside the loop the
extract the value of the last actice lane.

See also https://github.com/llvm/llvm-project/issues/148603

PR: https://github.com/llvm/llvm-project/pull/149042


 Commit: cec837e3e09f7751e668c89aed894d547d542ae6
 https://github.com/llvm/llvm-project/commit/cec837e3e09f7751e668c89aed894d547d542ae6
 Author: Simon Pilgrim <llvm-dev at redking.me.uk>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/test/CodeGen/X86/addcarry.ll

 Log Message:
 -----------
 [X86] addcarry.ll - add test coverage for #169691 (#169716)


 Commit: bbb8f7aaf8c2cc7f68b59ed0d5abed068c581682
 https://github.com/llvm/llvm-project/commit/bbb8f7aaf8c2cc7f68b59ed0d5abed068c581682
 Author: Hristo Hristov <hghristov.rmm at gmail.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M libcxx/include/__flat_map/flat_map.h
 M libcxx/include/__flat_map/utils.h
 M libcxx/test/libcxx/diagnostics/flat_map.nodiscard.verify.cpp
 M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.access/index_transparent.pass.cpp

 Log Message:
 -----------
 [libc++][flat_map] Applied `[[nodiscard]]` (#169453)

`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.

- https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant


 Commit: 8706d82bd420fdfb95e207df6d56f73274ec7d20
 https://github.com/llvm/llvm-project/commit/8706d82bd420fdfb95e207df6d56f73274ec7d20
 Author: Hristo Hristov <hghristov.rmm at gmail.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M libcxx/include/__compare/is_eq.h
 M libcxx/include/__coroutine/coroutine_handle.h
 M libcxx/include/__coroutine/noop_coroutine_handle.h
 M libcxx/include/__utility/cmp.h
 M libcxx/include/initializer_list
 M libcxx/test/libcxx/diagnostics/utility.nodiscard.verify.cpp
 A libcxx/test/libcxx/language.support/nodiscard.verify.cpp

 Log Message:
 -----------
 [libc++] Applied `[[nodiscard]]` to Language Support (partially) (#169611)

https://wg21.link/#support

`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.

- https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant

The following was implemented in this patch:

- [x] `<compare>`
- [x] `<corotine>`
- [x] `<initializer_list>`
- [x] Integer comparisons

---------

Co-authored-by: Hristo Hristov <zingam at outlook.com>
Co-authored-by: A. Jiang <de34 at live.cn>


 Commit: 3a25a4a68705d7861c5b0312667f3bc43359da41
 https://github.com/llvm/llvm-project/commit/3a25a4a68705d7861c5b0312667f3bc43359da41
 Author: Björn Schäpers <bjoern at hazardy.de>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/docs/ClangFormatStyleOptions.rst
 M clang/docs/ReleaseNotes.rst
 M clang/include/clang/Format/Format.h
 M clang/lib/Format/Format.cpp
 M clang/lib/Format/IntegerLiteralSeparatorFixer.cpp
 M clang/unittests/Format/ConfigParseTest.cpp
 M clang/unittests/Format/IntegerLiteralSeparatorTest.cpp

 Log Message:
 -----------
 [clang-format] Add xxxMaxDigitsNoSeparator (#164286)

This basically adds a Leave option for a specific range of literals.


 Commit: c378bb135455787a5d8b1f4da5d3522a3e6a60b9
 https://github.com/llvm/llvm-project/commit/c378bb135455787a5d8b1f4da5d3522a3e6a60b9
 Author: Peter Collingbourne <pcc at google.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
 A llvm/test/CodeGen/AArch64/ptrauth-irelative.ll
 M llvm/test/CodeGen/AArch64/ptrauth-type-info-vptr-discr.ll

 Log Message:
 -----------
 CodeGen: Optionally emit PAuth relocations as IRELATIVE relocations.

This supports the following use cases:
- ConstantPtrAuth expressions that are unrepresentable using standard PAuth
 relocations such as expressions involving an integer operand or
 deactivation symbols.
- libc implementations that do not support PAuth relocations.

For more information see the RFC:
https://discourse.llvm.org/t/rfc-structure-protection-a-family-of-uaf-mitigation-techniques/85555

Reviewers: MaskRay, fmayer, smithp35, kovdan01

Reviewed By: fmayer

Pull Request: https://github.com/llvm/llvm-project/pull/133533


 Commit: 6227eb90da2a417125477b27799ae2e8f43b9e49
 https://github.com/llvm/llvm-project/commit/6227eb90da2a417125477b27799ae2e8f43b9e49
 Author: Peter Collingbourne <pcc at google.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/docs/LangRef.rst
 M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
 M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
 M llvm/include/llvm/CodeGen/ISDOpcodes.h
 M llvm/include/llvm/CodeGen/MachineFunction.h
 M llvm/include/llvm/CodeGen/MachineInstr.h
 M llvm/include/llvm/CodeGen/MachineInstrBuilder.h
 M llvm/include/llvm/CodeGen/SelectionDAG.h
 M llvm/include/llvm/CodeGen/SelectionDAGISel.h
 M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
 M llvm/include/llvm/CodeGen/TargetLowering.h
 M llvm/include/llvm/IR/LLVMContext.h
 M llvm/include/llvm/Target/Target.td
 M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
 M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
 M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
 M llvm/lib/CodeGen/MIRParser/MILexer.cpp
 M llvm/lib/CodeGen/MIRParser/MILexer.h
 M llvm/lib/CodeGen/MIRParser/MIParser.cpp
 M llvm/lib/CodeGen/MIRPrinter.cpp
 M llvm/lib/CodeGen/MachineFunction.cpp
 M llvm/lib/CodeGen/MachineInstr.cpp
 M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
 M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
 M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
 M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
 M llvm/lib/IR/Instructions.cpp
 M llvm/lib/IR/LLVMContext.cpp
 M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
 M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
 M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
 M llvm/lib/Target/AArch64/AArch64InstrFormats.td
 M llvm/lib/Target/AArch64/AArch64InstrInfo.td
 M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
 M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
 M llvm/test/Bitcode/operand-bundles-bc-analyzer.ll
 A llvm/test/CodeGen/AArch64/deactivation-symbols.ll
 A llvm/test/CodeGen/MIR/AArch64/deactivation-symbols.mir
 M llvm/test/Transforms/InstCombine/ptrauth-intrinsics.ll
 M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp

 Log Message:
 -----------
 Add IR and codegen support for deactivation symbols.

Deactivation symbols are a mechanism for allowing object files to disable
specific instructions in other object files at link time. The initial use
case is for pointer field protection.

For more information, see the RFC:
https://discourse.llvm.org/t/rfc-deactivation-symbols/85556

Reviewers: ojhunt, nikic, fmayer, arsenm, ahmedbougacha

Reviewed By: fmayer

Pull Request: https://github.com/llvm/llvm-project/pull/133536


 Commit: d2379effe9db15765e4fd1f7a0589af5f9269f96
 https://github.com/llvm/llvm-project/commit/d2379effe9db15765e4fd1f7a0589af5f9269f96
 Author: Peter Collingbourne <pcc at google.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/lib/CodeGen/CGPointerAuth.cpp
 M llvm/docs/LangRef.rst
 M llvm/include/llvm/Bitcode/LLVMBitCodes.h
 M llvm/include/llvm/IR/Constants.h
 M llvm/include/llvm/SandboxIR/Constant.h
 M llvm/lib/AsmParser/LLParser.cpp
 M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
 M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
 M llvm/lib/IR/AsmWriter.cpp
 M llvm/lib/IR/Constants.cpp
 M llvm/lib/IR/ConstantsContext.h
 M llvm/lib/IR/Core.cpp
 M llvm/lib/IR/Verifier.cpp
 M llvm/lib/SandboxIR/Constant.cpp
 M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
 M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
 M llvm/lib/Transforms/Utils/ValueMapper.cpp
 A llvm/test/Assembler/invalid-ptrauth-const6.ll
 M llvm/test/Bitcode/compatibility.ll
 M llvm/test/CodeGen/AArch64/ptrauth-irelative.ll
 M llvm/test/Transforms/InstCombine/ptrauth-intrinsics.ll
 A llvm/test/Verifier/ptrauth-constant.ll
 M llvm/unittests/SandboxIR/SandboxIRTest.cpp
 M llvm/unittests/Transforms/Utils/ValueMapperTest.cpp

 Log Message:
 -----------
 Add deactivation symbol operand to ConstantPtrAuth.

Deactivation symbol operands are supported in the code generator by
building on the previously added support for IRELATIVE relocations.

Reviewers: ojhunt, fmayer, ahmedbougacha, nikic, efriedma-quic

Reviewed By: fmayer

Pull Request: https://github.com/llvm/llvm-project/pull/133537


 Commit: a33fd4437216fff3d092e5056a78c4f430b2f9da
 https://github.com/llvm/llvm-project/commit/a33fd4437216fff3d092e5056a78c4f430b2f9da
 Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/lib/Driver/ToolChains/Linux.cpp
 M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
 M compiler-rt/lib/tysan/tysan_platform.h

 Log Message:
 -----------
 Revert "[tysan] Type Sanitizer support for SystemZ" (#169726)

Reverts llvm/llvm-project#162396


 Commit: 75ca83563de13ebbf381a0e9e9d97dfbf98ea0f5
 https://github.com/llvm/llvm-project/commit/75ca83563de13ebbf381a0e9e9d97dfbf98ea0f5
 Author: Aiden Grossman <aidengrossman at google.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

 Log Message:
 -----------
 [bazel] Fix build after #169086 (#169725)

Just required wiring up some additional AMDGPU table generated files.


 Commit: 8e4208f83a9bb7a4cd550e90e70f3b77499c623e
 https://github.com/llvm/llvm-project/commit/8e4208f83a9bb7a4cd550e90e70f3b77499c623e
 Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M flang-rt/lib/cuda/allocator.cpp
 M flang-rt/unittests/Runtime/CUDA/Allocatable.cpp
 M flang/include/flang/Runtime/CUDA/allocator.h

 Log Message:
 -----------
 [flang][cuda][rt] Add entry point to get the allocation stream (#169608)


 Commit: 47efff777d907fcabda59d925dfed3040c7308be
 https://github.com/llvm/llvm-project/commit/47efff777d907fcabda59d925dfed3040c7308be
 Author: Kai Nacke <kai.peter.nacke at ibm.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
 A llvm/test/CodeGen/SystemZ/zos-ppa1-argarea.ll

 Log Message:
 -----------
 [SystemZ] Emit optional argument area length field (#169679)

The Language Environment (LE) reserves 128 byte for the argument area
when the optional field is not present. If the argument area is larger,
then the field must be present to guarantee that the space is reserved
on stack extension. Creating this field when alloca() is used may reduce
the needed stack space in case alloca() causes a stack extension.


 Commit: 48454241cde713c450e2369983b8c98b7ab16f19
 https://github.com/llvm/llvm-project/commit/48454241cde713c450e2369983b8c98b7ab16f19
 Author: Kazu Hirata <kazu at google.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp

 Log Message:
 -----------
 [SPIRV] Fix a warning

This patch fixes:

 llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp:245:25: error: unused
 variable 'TII' [-Werror,-Wunused-variable]


 Commit: 9871d7089890f357308804987ceae1e98c5c42a3
 https://github.com/llvm/llvm-project/commit/9871d7089890f357308804987ceae1e98c5c42a3
 Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
 M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
 A mlir/lib/Dialect/OpenACC/Transforms/ACCImplicitDeclare.cpp
 M mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
 A mlir/test/Dialect/OpenACC/acc-implicit-declare.mlir

 Log Message:
 -----------
 [mlir][acc] Introduce ACCImplicitDeclare pass for globals handling (#169720)

This commit introduces the ACCImplicitDeclare pass to the OpenACC
dialect, complementing ACCImplicitData by handling global variables
referenced in OpenACC compute regions and routines.

Overview:
---------
The pass applies implicit `acc declare` actions to global variables
referenced in OpenACC regions. While the OpenACC spec focuses on
implicit data mapping (handled by ACCImplicitData), implicit declare is
advantageous and required for specific cases:

1. Globals referenced in implicit `acc routine` - Since data mapping
only applies to compute regions, globals in routines must use `acc
declare`.

2. Compiler-generated globals - Type descriptors, runtime names, and
error reporting strings introduced during compilation that wouldn't be
visible for user-provided `acc declare` directives.

3. Constant globals - Constants like filename strings or initialization
values benefit from being marked with `acc declare` rather than being
mapped repeatedly (e.g., 1000 kernel launches shouldn't map the same
constant 1000 times).

Implementation:
---------------
The pass performs this in two phases:

1. Hoisting: Non-constant globals in compute regions have their
address-of operations hoisted out of the region when possible, allowing
implicit data mapping instead of declare marking.

2. Declaration: Remaining that must be device available (constants,
globals in routines, globals in recipe operations) are marked with the
acc.declare attribute.

The pass processes:
- OpenACC compute constructs (parallel, kernels, serial)
- Functions marked with acc routine
- Private, firstprivate, and reduction recipes (when used)
- Initialization regions of existing declared globals

Requirements:
-------------
The pass requires operations to implement:
- acc::AddressOfGlobalOpInterface (for address-of ops)
- acc::GlobalVariableOpInterface (for global definitions)
- acc::IndirectGlobalAccessOpInterface (for indirect access)


 Commit: 3d596ad09234c92067012b33a81be8dc48aa2e47
 https://github.com/llvm/llvm-project/commit/3d596ad09234c92067012b33a81be8dc48aa2e47
 Author: Aiden Grossman <aidengrossman at google.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/test/Driver/hip-spirv-backend-opt.c

 Log Message:
 -----------
 [clang][Driver] Use -no-canonical-prefixes in hip-spirv-backend-opt test (#169717)

Otherwise the test can fail in weirder setups (like ours downstream
where the actual binary path only contains the hash of the object). This
makes the test more resilient, more consistent with other driver tests,
and allows us to assert that the binary is named clang rather than
clang-<some suffix>.


 Commit: d5778a7ff55688de0d6c87204fdd8d32ac1bdc99
 https://github.com/llvm/llvm-project/commit/d5778a7ff55688de0d6c87204fdd8d32ac1bdc99
 Author: Hristo Hristov <hghristov.rmm at gmail.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M libcxx/include/__condition_variable/condition_variable.h
 M libcxx/include/__mutex/mutex.h
 M libcxx/include/__thread/thread.h
 M libcxx/include/barrier
 M libcxx/include/latch
 M libcxx/include/mutex
 M libcxx/include/semaphore
 A libcxx/test/libcxx/thread/nodiscard.verify.cpp
 R libcxx/test/std/thread/thread.jthread/nodiscard.verify.cpp

 Log Message:
 -----------
 [libc++] Applied `[[nodiscard]]` to concurrency (partially) (#169463)

`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.

- https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant

The following utilities have been annotated in this patch:

- [x] `<barrier>`
- [x] `<condition_variable>`
- [x] `<latch>`
- [x] `<mutex>`
- [x] `<semaphore>`
- [x] `<thread>`

N.B. Some classes don't provide all specified methods, which were not
annotated.


 Commit: 216b9fa2275eb11fdb0133870ac81c8da7ff8fcf
 https://github.com/llvm/llvm-project/commit/216b9fa2275eb11fdb0133870ac81c8da7ff8fcf
 Author: Alexey Bataev <a.bataev at outlook.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 A llvm/test/Transforms/SLPVectorizer/X86/multi-node-user-with-copyable-ops.ll

 Log Message:
 -----------
 [SLP][NFC]Add another test with the user with multiple copyable operands, NFC


 Commit: 20d95c807092755114fdc8cc3dba49e3f6820eb2
 https://github.com/llvm/llvm-project/commit/20d95c807092755114fdc8cc3dba49e3f6820eb2
 Author: Andy Kaylor <akaylor at nvidia.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
 M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
 M clang/test/CIR/CodeGen/lambda.cpp

 Log Message:
 -----------
 [CIR] Add undef handling to enable global lambdas (#169721)

This change adds undef handling that was needed to enable global
lambdas. There was no lambda-specific code needed, but the global lambda
handling needed to initialize a global with an undef value.

[CIR] Handle undef init of struct

This adds handling for a case where Clang initializes a struct to undef
with a constant copy. This required adding support for undef constants
and lowering undef attributes to LLVM IR.


 Commit: dab44135df10d9e29a38f25e112a847020ee2831
 https://github.com/llvm/llvm-project/commit/dab44135df10d9e29a38f25e112a847020ee2831
 Author: Peter Collingbourne <pcc at google.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp

 Log Message:
 -----------
 Fix sanitizer failure introduced by #133537


 Commit: 2bef14c1a9dc939598ef12999f05527a662e42fa
 https://github.com/llvm/llvm-project/commit/2bef14c1a9dc939598ef12999f05527a662e42fa
 Author: Andy Kaylor <akaylor at nvidia.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 R clang/test/CIR/CodeGen/X86/avx-builtins.c
 R clang/test/CIR/CodeGen/X86/avx10_2_512bf16-builtins.c
 R clang/test/CIR/CodeGen/X86/avx10_2bf16-builtins.c
 R clang/test/CIR/CodeGen/X86/avx512bw-builtins.c
 R clang/test/CIR/CodeGen/X86/avx512f-builtins.c
 R clang/test/CIR/CodeGen/X86/avx512fp16-builtins.c
 R clang/test/CIR/CodeGen/X86/bmi-builtins.c
 R clang/test/CIR/CodeGen/X86/lzcnt-builtins.c
 R clang/test/CIR/CodeGen/X86/sse-builtins.c
 R clang/test/CIR/CodeGen/X86/sse2-builtins.c
 R clang/test/CIR/CodeGen/builtin-fcmp-sse.c
 R clang/test/CIR/CodeGen/builtin-isfpclass.c
 R clang/test/CIR/CodeGen/builtin_bit.cpp
 R clang/test/CIR/CodeGen/builtin_call.cpp
 R clang/test/CIR/CodeGen/builtin_inline.c
 R clang/test/CIR/CodeGen/builtin_new_delete.cpp
 R clang/test/CIR/CodeGen/builtin_prefetch.c
 R clang/test/CIR/CodeGen/builtin_printf.cpp
 R clang/test/CIR/CodeGen/builtins-elementwise.c
 R clang/test/CIR/CodeGen/builtins-floating-point.c
 R clang/test/CIR/CodeGen/builtins-overflow.cpp
 R clang/test/CIR/CodeGen/builtins.cpp
 A clang/test/CIR/CodeGenBuiltins/X86/avx-builtins.c
 A clang/test/CIR/CodeGenBuiltins/X86/avx10_2_512bf16-builtins.c
 A clang/test/CIR/CodeGenBuiltins/X86/avx10_2bf16-builtins.c
 A clang/test/CIR/CodeGenBuiltins/X86/avx512bw-builtins.c
 A clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c
 A clang/test/CIR/CodeGenBuiltins/X86/avx512fp16-builtins.c
 A clang/test/CIR/CodeGenBuiltins/X86/bmi-builtins.c
 A clang/test/CIR/CodeGenBuiltins/X86/lzcnt-builtins.c
 A clang/test/CIR/CodeGenBuiltins/X86/sse-builtins.c
 A clang/test/CIR/CodeGenBuiltins/X86/sse2-builtins.c
 A clang/test/CIR/CodeGenBuiltins/builtin-fcmp-sse.c
 A clang/test/CIR/CodeGenBuiltins/builtin-isfpclass.c
 A clang/test/CIR/CodeGenBuiltins/builtin_bit.cpp
 A clang/test/CIR/CodeGenBuiltins/builtin_call.cpp
 A clang/test/CIR/CodeGenBuiltins/builtin_inline.c
 A clang/test/CIR/CodeGenBuiltins/builtin_new_delete.cpp
 A clang/test/CIR/CodeGenBuiltins/builtin_prefetch.c
 A clang/test/CIR/CodeGenBuiltins/builtin_printf.cpp
 A clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c
 A clang/test/CIR/CodeGenBuiltins/builtins-floating-point.c
 A clang/test/CIR/CodeGenBuiltins/builtins-overflow.cpp
 A clang/test/CIR/CodeGenBuiltins/builtins.cpp

 Log Message:
 -----------
 [CIR][NFC] Move builtin tests to their own directory (#169737)

This moves all builtin-related CodeGen tests to a new directory,
separate from the main clang/test/CIR/CodeGen directory. This will make
it easier to run the basic CodeGen tests without running the builtin
tests. This is specifically intended to move those tests which include
`immintrin.h` or any of its variants, which take a very long time to
compile with a debug build.


 Commit: 36bed4d0cd3e0e3871ad2360a7524da245e289d0
 https://github.com/llvm/llvm-project/commit/36bed4d0cd3e0e3871ad2360a7524da245e289d0
 Author: John Holdsworth <github at johnholdsworth.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M lld/MachO/Driver.cpp
 M lld/MachO/InputFiles.cpp
 M lld/test/MachO/read-workers.s
 M llvm/lib/Object/Archive.cpp

 Log Message:
 -----------
 [lld][MachO] Follow-up to use madvise() for threaded file page-in. (#157917)

Further to
https://github.com/llvm/llvm-project/pull/147134#discussion_r2337246489,
switch to use the madvise() api to page in mmap'd files and

1) All new code compiled in #if LLVM_ENABLE_THREADS is set so it can be
seen where the changes were from this PR.
2) The new PR moves to use madvise() instead of the ad-hoc page
referencing code I wrote which should avoid SIGSEGVs if the buffer is
deallocated.
3) A new property SerialBackgroundQueue().stopAllWork to be used to stop
background workers when there is no further call for them. Usually the
background "page-in" threads have completed first but it seems with this
troublesome test this is not always the case and buffers stored in the
static input file cache are being deallocated while being referenced.

---------

Co-authored-by: James Henderson <James.Henderson at sony.com>


 Commit: 2f71e606c96c6b1a534b829fc10ff2d3ef497688
 https://github.com/llvm/llvm-project/commit/2f71e606c96c6b1a534b829fc10ff2d3ef497688
 Author: Ryan Mast <3969255+nightlark at users.noreply.github.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 A llvm/utils/git/requirements_upload_release.txt
 A llvm/utils/git/requirements_upload_release.txt.in
 M llvm/utils/release/github-upload-release.py

 Log Message:
 -----------
 github-upload-release.py: add requirements and lock files for installing dependencies (#169461)

Adds requirements.txt and lock files for installing dependencies for
github-upload-release.py script.

Signed-off-by: Ryan Mast <mast.ryan at gmail.com>


 Commit: 49516ba0e3a64bafc523c5f03594f607a0cf24ca
 https://github.com/llvm/llvm-project/commit/49516ba0e3a64bafc523c5f03594f607a0cf24ca
 Author: gulfemsavrun <gulfem at google.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/tools/llvm-objdump/SourcePrinter.cpp
 M llvm/tools/llvm-objdump/SourcePrinter.h
 M llvm/tools/llvm-objdump/llvm-objdump.cpp

 Log Message:
 -----------
 [llvm-objdump] Optimize live element tracking (#158763)

This patch significantly optimizes the LiveElementPrinter
by replacing a slow linear search with efficient hash map
lookups. It refactors the code to use a map-based system
for tracking live element addresses and managing column
assignments, leading to a major performance improvement
for large binaries.


 Commit: 8cc02597f119674b7592e4db5dabf476c97ac8fa
 https://github.com/llvm/llvm-project/commit/8cc02597f119674b7592e4db5dabf476c97ac8fa
 Author: Lang Hames <lhames at gmail.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/include/llvm/ExecutionEngine/Orc/WaitingOnGraph.h
 M llvm/unittests/ExecutionEngine/Orc/WaitingOnGraphTest.cpp

 Log Message:
 -----------
 [ORC] Clear stale ElemToPendingSN entries in WaitingOnGraph. (#169747)

WaitingOnGraph::processReadyOrFailed was not clearing stale entries from
the ElemToPendingSN map. If symbols were removed from the
ExecutionSession and then re-added this could lead to dependencies on
the stale entries, triggering a use-after-free bug.

https://github.com/llvm/llvm-project/issues/169135


 Commit: b7eb9883dc9014a392f6435ba9b4058c8f8efd3f
 https://github.com/llvm/llvm-project/commit/b7eb9883dc9014a392f6435ba9b4058c8f8efd3f
 Author: Matej Košík <m4tej.kosik at gmail.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M lldb/source/Utility/RegisterValue.cpp

 Log Message:
 -----------
 [lldb] Use InlHostByteOrder in RegisterValue::SetValueFromData (#169624)

An existing code can be further simplified.

---------

Co-authored-by: Matej Košík <matej.kosik at codasip.com>


 Commit: e2a29eca56bf92c8f3c5b5c88259211579b66182
 https://github.com/llvm/llvm-project/commit/e2a29eca56bf92c8f3c5b5c88259211579b66182
 Author: Florian Mayer <fmayer at google.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M clang/lib/CodeGen/BackendUtil.cpp
 M clang/lib/CodeGen/CGExpr.cpp
 M clang/lib/Driver/SanitizerArgs.cpp
 M clang/test/CodeGen/cfi-icall-trap-recover-runtime.c
 M clang/test/CodeGenCXX/cfi-vcall-trap-recover-runtime.cpp
 M clang/test/Driver/fsanitize.c
 M compiler-rt/test/ubsan_minimal/TestCases/override-callback.c
 M llvm/include/llvm/Transforms/Instrumentation/BoundsChecking.h
 M llvm/lib/Passes/PassBuilder.cpp
 M llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
 M llvm/test/Instrumentation/BoundsChecking/runtimes.ll

 Log Message:
 -----------
 [UBSan] Use -fsanitize-handler-preserve-all-regs in codegen



Pull Request: https://github.com/llvm/llvm-project/pull/168645


 Commit: 48a9b07264e0b7d515806295272771af69186801
 https://github.com/llvm/llvm-project/commit/48a9b07264e0b7d515806295272771af69186801
 Author: Jim Lin <jim at andestech.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp

 Log Message:
 -----------
 [AMDGPU] Remove unused functions isSigned. NFC (#169750)

These have been unused since
https://github.com/llvm/llvm-project/pull/145483.


 Commit: 1ff5c89176f9171bd50b1f005cbf019a5d72e0b6
 https://github.com/llvm/llvm-project/commit/1ff5c89176f9171bd50b1f005cbf019a5d72e0b6
 Author: lonely eagle <2020382038 at qq.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M mlir/test/Analysis/DataFlow/test-liveness-analysis.mlir
 M mlir/test/lib/Analysis/DataFlow/TestLivenessAnalysis.cpp

 Log Message:
 -----------
 [mlir][dataflow] Add arguemnt print for test-liveness-analysis (#169625)

Add arguemnt print for test-liveness-analysis to better debug
remove-dead-values pass.

---------

Co-authored-by: Mehdi Amini <joker.eph at gmail.com>


 Commit: ceba82f862b61396c2321613f544f925aefce015
 https://github.com/llvm/llvm-project/commit/ceba82f862b61396c2321613f544f925aefce015
 Author: Gang Chen <gangc at amd.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
 M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/vectorize-redund-loads.ll

 Log Message:
 -----------
 [LoadStoreVectorizer] Fix one-element vector handling (#169671)

This is the followup of https://github.com/llvm/llvm-project/pull/168135


 Commit: b028dacc60929995997ba1795f460d6ff0f2c302
 https://github.com/llvm/llvm-project/commit/b028dacc60929995997ba1795f460d6ff0f2c302
 Author: Hristo Hristov <hghristov.rmm at gmail.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M libcxx/include/queue
 M libcxx/test/libcxx/diagnostics/queue.nodiscard.verify.cpp

 Log Message:
 -----------
 [libc++][queue] Applied `[[nodiscard]]` (#169469)

`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.

-
https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant


 Commit: bd643bc1410eefced91384f816177b8189ffb981
 https://github.com/llvm/llvm-project/commit/bd643bc1410eefced91384f816177b8189ffb981
 Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M flang/include/flang/Optimizer/Transforms/Passes.h
 M flang/include/flang/Optimizer/Transforms/Passes.td
 M flang/lib/Optimizer/Transforms/FIRToSCF.cpp

 Log Message:
 -----------
 [flang] Use default constructor for FIRToSCF pass (#169741)


 Commit: 504b50789602813b88a482c39072822cbaa16b37
 https://github.com/llvm/llvm-project/commit/504b50789602813b88a482c39072822cbaa16b37
 Author: Matthias Springer <me at m-sp.org>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M mlir/include/mlir/IR/PatternMatch.h
 M mlir/include/mlir/Transforms/DialectConversion.h
 M mlir/lib/Transforms/Utils/DialectConversion.cpp
 A mlir/test/Transforms/test-legalizer-no-rollback.mlir
 M mlir/test/lib/Dialect/Test/TestPatterns.cpp

 Log Message:
 -----------
 [mlir][Transforms] Dialect conversion: Add support for `replaceUsesWithIf` (#169606)

This commit adds support for `replaceUsesWithIf` (and variants such as
`replaceAllUsesExcept`) to the `ConversionPatternRewriter`. This API is
supported only in no-rollback mode. An assertion is triggered in
rollback mode. (This missing assertion has been confusing for users
because it seemed that the API supported, while it was actually not
working properly.)

This commit brings us a bit closer towards removing
[this](https://github.com/llvm/llvm-project/blob/76ec25f729fcc7ae576caf21293cc393e68e7cf7/mlir/lib/Transforms/Utils/DialectConversion.cpp#L1214)
workaround.

Additional changes are needed to support this API in rollback mode. In
particular, no entries should be added to the `ConversionValueMapping`
for conditional replacements. It's unclear at this point if this API can
be supported in rollback mode, so this is deferred to later.

This commit turns `replaceUsesWithIf` into a virtual function, so that
the `ConversionPatternRewriter` can override it. All other API functions
for conditional value replacements call that function.

Note for LLVM integration: If you are seeing failed assertions due to
this change, you are using unsupported API in your dialect conversion.
You have 3 options: (1) Migrate to the no-rollback driver. (2) Rewrite
your patterns without the unsupported API. (3) Last resort: bypass the
rewriter and call `replaceUsesWithIf` etc. directly on the `Value`
object.


 Commit: bacca2337156edd28fc5bb0237371dc01bdc19e0
 https://github.com/llvm/llvm-project/commit/bacca2337156edd28fc5bb0237371dc01bdc19e0
 Author: Hristo Hristov <hghristov.rmm at gmail.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M libcxx/include/__mdspan/extents.h
 M libcxx/include/__mdspan/mdspan.h
 M libcxx/test/libcxx/containers/views/mdspan/extents/assert.obs.pass.cpp
 A libcxx/test/libcxx/containers/views/mdspan/nodiscard.verify.cpp

 Log Message:
 -----------
 [libc++][mdspan] Applied `[[nodiscard]]` (#169326)

`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.
-
https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant


 Commit: fb18f75343738570b9f34b89973ef2ae4ada7a85
 https://github.com/llvm/llvm-project/commit/fb18f75343738570b9f34b89973ef2ae4ada7a85
 Author: Janet Yang <qxy11 at meta.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M cross-project-tests/debuginfo-tests/dexter/dex/debugger/DAP.py

 Log Message:
 -----------
 [lldb-dap] Add breakpoints after debugger initialization in DExTer (#169744)

# Summary
This is a forward fix for test errors from
https://github.com/llvm/llvm-project/pull/163653.

The PR moved debugger initialization outside of
InitializeRequestHandler, and into Launch/AttachRequestHandlers to
support DAP sessions sharing debugger instances for dynamically created
targets. However, DExTer's DAP class seemed to set breakpoints before
the debugger was initialized, which caused the tests to hang waiting for
a breakpoint to hit due to none of the breakpoints getting resolved.

# Tests
```
bin/llvm-lit -v /home/qxy11/llvm/llvm-project/cross-project-tests/debuginfo-tests/dexter-tests/
```


 Commit: b3428bb966f1de8aa48375ffee0eba04ede133b7
 https://github.com/llvm/llvm-project/commit/b3428bb966f1de8aa48375ffee0eba04ede133b7
 Author: Peter Collingbourne <pcc at google.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/IR/LLVMContextImpl.cpp

 Log Message:
 -----------
 Add missing freeConstants() call for ConstantPtrAuths.

Fixes memory leak uncovered by #133533.


 Commit: e7dec231fe4da28c76ecb212360b155beec40cc9
 https://github.com/llvm/llvm-project/commit/e7dec231fe4da28c76ecb212360b155beec40cc9
 Author: Shilei Tian 
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M llvm/lib/IR/ReplaceConstant.cpp
 M llvm/test/CodeGen/AMDGPU/lower-kernel-lds-constexpr.ll
 M llvm/test/CodeGen/AMDGPU/lower-module-lds-constantexpr.ll
 A llvm/test/CodeGen/AMDGPU/same-lds-variable-multiple-use-in-one-phi-node.ll

 Log Message:
 -----------
 [ReplaceConstant] Don't create instructions for the same constant multiple times in the same basic block (#169141)

Fixes #167500.


 Commit: 601f79622af6f042379483573fc913c8686fabb6
 https://github.com/llvm/llvm-project/commit/601f79622af6f042379483573fc913c8686fabb6
 Author: Srinivasa Ravi <srinivasar at nvidia.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
 M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
 M mlir/test/Dialect/LLVMIR/nvvm/invalid-convert-stochastic-rounding.mlir
 A mlir/test/Target/LLVMIR/nvvm/convert_fp16x2.mlir
 M mlir/test/Target/LLVMIR/nvvm/convert_stochastic_rounding.mlir
 A mlir/test/Target/LLVMIR/nvvm/invalid_convert_fp16x2.mlir

 Log Message:
 -----------
 [MLIR][NVVM] Add missing rounding modes in fp16x2 conversions (#169005)

This change adds the `RN` and `RZ` rounding modes to the
`convert.f32x2.to.f16x2` and `convert.f32x2.to.bf16x2` Ops.

Tests are added in `convert_fp16x2.mlir` and
`invalid_convert_fp16x2.mlir`.
Tests with these Ops in `convert_stochastic_rounding.mlir` and
`invalid-convert-stochastic-rounding.mlir` have been removed or
modified.

PTX spec reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cvt


 Commit: 1748e2330e230cfea3c8c09547af257f2f82b002
 https://github.com/llvm/llvm-project/commit/1748e2330e230cfea3c8c09547af257f2f82b002
 Author: Rajat Bajpai <rbajpai at nvidia.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
 M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
 M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp

 Log Message:
 -----------
 [MLIR][Intrinsics] Add new MLIR API to automatically resolve overload types (#168188)

Add createIntrinsicCall overload that accepts return type and arguments,
automatically resolve overload types rather than requiring manual
computation. Simplifies NVVM_PrefetchOp by removing conditional overload
logic.


 Commit: 40991215f4aba37fd43b65d96ad0a445dcd041b2
 https://github.com/llvm/llvm-project/commit/40991215f4aba37fd43b65d96ad0a445dcd041b2
 Author: Eric Li <li.zhe.hua at gmail.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M clang/lib/Tooling/Transformer/SourceCode.cpp
 M clang/unittests/Tooling/SourceCodeTest.cpp

 Log Message:
 -----------
 [clang][Tooling] Fix `getFileRange` returning a range spanning across macro arguments (#169757)

When the start and end token are both spelled in macro arguments, we
still want to reject the range if they come from two separate macro
arguments, as the original specified range is not precisely spelled in a
single sequence of characters in source.


 Commit: fede9471c48d91cae6ee94f247797ba3d30bfa80
 https://github.com/llvm/llvm-project/commit/fede9471c48d91cae6ee94f247797ba3d30bfa80
 Author: Men-cotton <mencotton0410 at gmail.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
 A mlir/test/Dialect/LLVMIR/invalid-cg-profile.mlir

 Log Message:
 -----------
 [mlir][LLVMIR] Handle missing functions in CGProfile module flags (#169517)

This commit extends the CGProfile module flags export with support for missing function references. Previously, this caused a crash and now it's properly exported to `null` values in the metadata node.
Fixes: https://github.com/llvm/llvm-project/issues/160717


 Commit: 6696e0c8f8605e8ebef4a786e244baf3d6a09816
 https://github.com/llvm/llvm-project/commit/6696e0c8f8605e8ebef4a786e244baf3d6a09816
 Author: Timm Baeder <tbaeder at redhat.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M clang/lib/AST/ByteCode/Interp.cpp
 M clang/lib/AST/ByteCode/Interp.h

 Log Message:
 -----------
 [clang][bytecode] Remove double diagnostic emission (#169658)

We emit this diagnostic from CheckPointerToIntegralCast() already, so
remove the emission from CastPointerIntegral().


 Commit: f6712b6ea3d59b019e26f8716020d4ca654c043c
 https://github.com/llvm/llvm-project/commit/f6712b6ea3d59b019e26f8716020d4ca654c043c
 Author: William Tran-Viet <wtranviet at proton.me>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/U.pass.cpp
 M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/const_T.pass.cpp
 M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/const_optional_U.pass.cpp
 M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/copy.pass.cpp
 M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/ctor.verify.cpp
 M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/deduct.pass.cpp
 M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/deduct.verify.cpp
 M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/default.pass.cpp
 M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/empty_in_place_t_does_not_clobber.pass.cpp
 M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/explicit_const_optional_U.pass.cpp
 M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/explicit_optional_U.pass.cpp
 M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/in_place_t.pass.cpp
 M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/initializer_list.pass.cpp
 M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/move.pass.cpp
 M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/nullopt_t.pass.cpp
 M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/optional_U.pass.cpp
 M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/rvalue_T.pass.cpp

 Log Message:
 -----------
 [libc++] Reformat `optional` constructor tests (#169231)

- Mass-reformat tests in
`std/utilities/optional/optional.object/optional.object.ctor` and
rearrange header `#include`s
- No functional changes
- Prelude for #169203


 Commit: a9cc7fe3caf6e14ae755689df8ccde2edc4c8a43
 https://github.com/llvm/llvm-project/commit/a9cc7fe3caf6e14ae755689df8ccde2edc4c8a43
 Author: Abhishek Kaushik <abhishek.kaushik at intel.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/include/llvm/ProfileData/SampleProf.h

 Log Message:
 -----------
 [NFC][SampleFDO] Use const& to avoid copies (#164584)

Use const& in range-based for loop to avoid unnecessary copies


 Commit: 326a1a4badcd13ad8e722ac542cff19eed7bb03a
 https://github.com/llvm/llvm-project/commit/326a1a4badcd13ad8e722ac542cff19eed7bb03a
 Author: Jianhui Li <jian.hui.li at intel.com>
 Date: 2025-11-26 (Wed, 26 Nov 2025)

 Changed paths:
 M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
 M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
 M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
 M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
 M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
 M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
 M mlir/test/Dialect/XeGPU/propagate-layout.mlir

 Log Message:
 -----------
 [MLIR][XeGPU] Add anchor_layout and update propagation to honor user-specified layouts (#169267)

Introduce anchor layout for XeGPU anchor ops: load_nd, store_nd,
prefetch_nd, dpas, load, store, prefetch, load_matrix, store_matrix, and
atomic_rmw. Anchor layout is permanent, and is guaranteed to be honored
by XeGPU distribution and lowerinngs once specified.
1. Add anchor_layout for XeGPU anchor OPs: load_nd, store_nd,
prefetch_nd, dpas, load, store, prefetch, load_matrix, store_matrix, and
atomic_rmw.
2. rename layout attributes to anchor_layout for these ops: load, store,
load_matrix, store_matrix
3. update layout propagation pass: Only when user doesn't specify anchor
layout, the pass computes a default layout and set to anchor op's
permant layout and use that for propagation. if user specified anchor
layout, the pass takes user-specified anchor layout. permant layout and
use that for propagation. if user specified anchor layout, the pass
takes user-specified anchor layout.


 Commit: f1ddb2f4120645b56802859e26e2006e6db72597
 https://github.com/llvm/llvm-project/commit/f1ddb2f4120645b56802859e26e2006e6db72597
 Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 A llvm/test/CodeGen/LoongArch/lasx/rotl-rotr.ll
 A llvm/test/CodeGen/LoongArch/lsx/rotl-rotr.ll

 Log Message:
 -----------
 [LoongArch][NFC] Pre-commit tests for vector rotl/rotr (#161115)


 Commit: bb9449d5bbd72441d8f95052ddfd29e2d29297d7
 https://github.com/llvm/llvm-project/commit/bb9449d5bbd72441d8f95052ddfd29e2d29297d7
 Author: Luke Lau <luke at igalia.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
 A llvm/test/Transforms/InstCombine/get_vector_length.ll

 Log Message:
 -----------
 [InstCombine] Fold @llvm.experimental.get.vector.length when cnt <= max_lanes (#169293)

On RISC-V, some loops that the loop vectorizer vectorizes pre-LTO may
turn out to have the exact trip count exposed after LTO, see #164762.

If the trip count is small enough we can fold away the
@llvm.experimental.get.vector.length intrinsic based on this corollary
from the LangRef:

> If %cnt is less than or equal to %max_lanes, the return value is equal
to %cnt.

This on its own doesn't remove the @llvm.experimental.get.vector.length
in #164762 since we also need to teach computeKnownBits about
@llvm.experimental.get.vector.length and the sub recurrence, but this PR
is a starting point.

I've added this in InstCombine rather than InstSimplify since we may
need to insert a truncation (@llvm.experimental.get.vector.length can
take an i64 %cnt argument, the result is always i32).

Note that there was something similar done in VPlan in #167647 for when
the loop vectorizer knows the trip count.


 Commit: 6abbbca32472537389a4fd9961f680251a57e82b
 https://github.com/llvm/llvm-project/commit/6abbbca32472537389a4fd9961f680251a57e82b
 Author: David Green <david.green at arm.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
 A llvm/test/Transforms/AggressiveInstCombine/umulh_carry.ll
 A llvm/test/Transforms/AggressiveInstCombine/umulh_carry4.ll
 A llvm/test/Transforms/AggressiveInstCombine/umulh_ladder.ll
 A llvm/test/Transforms/AggressiveInstCombine/umulh_ladder4.ll

 Log Message:
 -----------
 [AggressiveInstCombine] Match long high-half multiply (#168396)

This patch adds recognition of high-half multiply by parts into a single
larger multiply.

Considering a multiply made up of high and low parts, we can split the
multiply into:
 x * y == (xh*T + xl) * (yh*T + yl)
where `xh == x>>32` and `xl == x & 0xffffffff`. `T = 2^32`.
This expands to
 xh*yh*T*T + xh*yl*T + xl*yh*T + xl*yl
which I find it helpful to be drawn as
 [ xh*yh ]
 [ xh*yl ]
 [ xl*yh ]
 [ xl*yl ]

We are looking for the "high" half, which is xh*yh + xh*yl>>32 + xl*yh>>32 +
carrys. The carry makes this difficult and there are multiple ways of
representing it. The ones we attempt to support here are:
 Carry: xh*yh + carry + lowsum
 carry = lowsum < xh*yl ? 0x1000000 : 0
 lowsum = xh*yl + xl*yh + (xl*yl>>32)
 Ladder: xh*yh + c2>>32 + c3>>32
 c2 = xh*yl + (xl*yl >> 32); c3 = c2&0xffffffff + xl*yh
 Carry4: xh*yh + carry + crosssum>>32 + (xl*yl + crosssum&0xffffffff) >> 32
 crosssum = xh*yl + xl*yh
 carry = crosssum < xh*yl ? 0x1000000 : 0
 Ladder4: xh*yh + (xl*yh)>>32 + (xh*yl)>>32 + low>>32;
 low = (xl*yl)>>32 + (xl*yh)&0xffffffff + (xh*yl)&0xfffffff

They all start by matching `xh*yh` + 2 or 3 other operands. The bottom of the
tree is `xh*yh`, `xh*yl`, `xl*yh` and `xl*yl`.

Based on #156879 by @c-rhodes


 Commit: 1c7ec06b16dc59b5b52cff95bde7d5330ffa0293
 https://github.com/llvm/llvm-project/commit/1c7ec06b16dc59b5b52cff95bde7d5330ffa0293
 Author: Luke Lau <luke at igalia.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
 M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll

 Log Message:
 -----------
 [VPlan] Optimize LastActiveLane to EVL - 1 (#169766)

With EVL tail folding, the LastActiveLane can be computed with EVL - 1.
This removes the need for a header mask and vfirst.m for loops with live
outs on RISC-V:

 # %bb.5: # %for.cond.cleanup7
 - vsetvli zero, zero, e32, m2, ta, ma
 - vmv.v.x v8, s1
 - vmsleu.vv v10, v8, v22
 - vfirst.m a0, v10
 - srli a1, a0, 63
 - czero.nez a0, a0, a1
 - czero.eqz a1, s8, a1
 - or a0, a0, a1
 - addi a0, a0, -1
 - vsetvli zero, zero, e64, m4, ta, ma
 - vslidedown.vx v8, v12, a0
 + addi s1, s1, -1
 + vslidedown.vx v8, v12, s1


 Commit: 9cb9b16fd63365fe452947ffdfbccd3ac7e6a08c
 https://github.com/llvm/llvm-project/commit/9cb9b16fd63365fe452947ffdfbccd3ac7e6a08c
 Author: Vadim Curcă <80581374+VadimCurca at users.noreply.github.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMIRToLLVMTranslation.cpp
 M mlir/test/Target/LLVMIR/Import/metadata-profiling.ll

 Log Message:
 -----------
 [mlir][llvm] Fix import of branch weights with "expected" field (#169776)

This commit fixes the import of `branch_weights` metadata from LLVM IR
to the LLVM dialect. Previously, `branch_weights` metadata containing
the `!"expected"` field were rejected because the importer expected
integer weights at operand 1, but found a string.


 Commit: dc8311f207f4facf88a8c939b4132afdaab08470
 https://github.com/llvm/llvm-project/commit/dc8311f207f4facf88a8c939b4132afdaab08470
 Author: David Green <david.green at arm.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/test/CodeGen/Thumb2/mve-vpt-2-blocks-2-preds.mir
 M llvm/test/CodeGen/Thumb2/mve-vpt-2-blocks-ctrl-flow.mir
 M llvm/test/CodeGen/Thumb2/mve-vpt-2-blocks-non-consecutive-ins.mir
 M llvm/test/CodeGen/Thumb2/mve-vpt-2-blocks.mir
 M llvm/test/CodeGen/Thumb2/mve-vpt-3-blocks-kill-vpr.mir
 M llvm/test/CodeGen/Thumb2/mve-vpt-block-1-ins.mir
 M llvm/test/CodeGen/Thumb2/mve-vpt-block-2-ins.mir
 M llvm/test/CodeGen/Thumb2/mve-vpt-block-4-ins.mir
 M llvm/test/CodeGen/Thumb2/mve-vpt-block-elses.mir
 M llvm/test/CodeGen/Thumb2/mve-vpt-block-optnone.mir

 Log Message:
 -----------
 [ARM] Remove IR from mve vpt mir tests. NFC

As far as I can tell the llvm.arm.mve.vminnm.m intrinsic used in these tests
was the pre-upstream name of llvm.arm.mve.min.predicated. The tests should not
need IR sections, so remove them just relying on the MIR portions.


 Commit: c28c99f51101d5130eeb9df061dcd10a1750d97b
 https://github.com/llvm/llvm-project/commit/c28c99f51101d5130eeb9df061dcd10a1750d97b
 Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M clang/test/SemaHIP/amdgpu-gfx950-load-to-lds.hip

 Log Message:
 -----------
 [NFC][HIP] Add __builtin_*_load_lds type check test cases (#165388)

This tests show how type-checking is performed for
`__builtin_amdgcn_load_to_lds`,
but not for `__builtin_amdgcn_raw_ptr_buffer_load_lds`,
`__builtin_amdgcn_struct_ptr_buffer_load_lds` and
`__builtin_amdgcn_global_load_lds` since they are declared with the 't'
attribute.


Stacked on top of: https://github.com/llvm/llvm-project/pull/165387


 Commit: 650eeb867fa95435b7c123e6630eb98934ac5bf3
 https://github.com/llvm/llvm-project/commit/650eeb867fa95435b7c123e6630eb98934ac5bf3
 Author: Nathan Corbyn <n_corbyn at apple.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/include/llvm/CodeGen/MachineBasicBlock.h
 M llvm/lib/CodeGen/ShrinkWrap.cpp
 M llvm/test/CodeGen/AArch64/arm64-shrink-wrapping.ll

 Log Message:
 -----------
 [ShrinkWrap] Modify shrink wrapping to accommodate functions terminated by no-return blocks (#167548)

At present, the shrink wrapping pass misses opportunities to shrink wrap
in the presence of machine basic blocks which exit the function without
returning. Such cases arise from C++ functions like the following:
```cxx
int foo(int err, void* ptr) {
 if (err == -1) {
 if (ptr == nullptr) {
 throw MyException("Received `nullptr`!", __FILE__, __LINE__);
 }
 
 handle(ptr);
 }
 
 return STATUS_OK;
}
```
In particular, assuming `MyException`'s constructor is not marked
`noexcept`, the above code will generate a trivial EH landing pad
calling `__cxa_free_exception()` and rethrowing the unhandled internal
exception, exiting the function without returning. As such, the shrink
wrapping pass refuses to touch the above function, spilling to the stack
on every call, even though no CSRs are clobbered on the hot path. This
patch tweaks the shrink wrapping logic to enable the pass to fire in
this and similar cases.


 Commit: c3c3d16773f8db2188145378500070658afeb30f
 https://github.com/llvm/llvm-project/commit/c3c3d16773f8db2188145378500070658afeb30f
 Author: NagaChaitanya Vellanki <pnagato at protonmail.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M clang/include/clang/Basic/BuiltinsX86.td
 M clang/lib/AST/ByteCode/InterpBuiltin.cpp
 M clang/lib/AST/ExprConstant.cpp
 M clang/lib/Headers/avx512vbmiintrin.h
 M clang/lib/Headers/avx512vbmivlintrin.h
 M clang/test/CodeGen/X86/avx512vbmi-builtins.c
 M clang/test/CodeGen/X86/avx512vbmivl-builtin.c

 Log Message:
 -----------
 [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - Allow AVX512 VPMULTISHIFTQB intrinsics to be used in constexpr (#168995)

Resolves #167477


 Commit: 0b1651260a36b38a65bb4f14ad8c9c5551ab5a34
 https://github.com/llvm/llvm-project/commit/0b1651260a36b38a65bb4f14ad8c9c5551ab5a34
 Author: David Spickett <david.spickett at linaro.org>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/utils/TableGen/README.md

 Log Message:
 -----------
 [llvm][Tablegen] Link to tutorial before programmer's reference

The natural assumption is that there's some sort of order here
and having people read the reference manual before the basic
tutorial does not make sense to me.


 Commit: 8401a8d0be7671fb5089f850a34dc92ad4a2eb12
 https://github.com/llvm/llvm-project/commit/8401a8d0be7671fb5089f850a34dc92ad4a2eb12
 Author: Paul Walker <paul.walker at arm.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 A llvm/test/Bitcode/aarch64-sve-rev-upgrade.ll
 A llvm/test/Bitcode/aarch64-sve-rev-upgrade.ll.bc

 Log Message:
 -----------
 [NFC][LLVM] Add bitcode tests for llvm.aarch64.sve.rev


 Commit: 0dbedd195c94e89b43660e67aa56dd139a81fa40
 https://github.com/llvm/llvm-project/commit/0dbedd195c94e89b43660e67aa56dd139a81fa40
 Author: Nikolas Klauser <nikolasklauser at berlin.de>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M clang/include/clang/Basic/BuiltinsX86.td
 M clang/lib/CodeGen/TargetBuiltins/X86.cpp
 M clang/lib/Headers/avx10_2_512bf16intrin.h
 M clang/lib/Headers/avx10_2bf16intrin.h
 M clang/lib/Headers/avx512vlfp16intrin.h
 M clang/lib/Headers/avxintrin.h
 M clang/lib/Headers/emmintrin.h
 M clang/lib/Headers/xmmintrin.h
 M clang/test/CodeGen/X86/sse-builtins-constrained.c
 M clang/test/CodeGen/X86/sse-builtins.c
 M clang/test/CodeGen/X86/sse2-builtins-constrained.c
 M clang/test/CodeGen/X86/sse2-builtins.c
 M clang/test/CodeGen/builtins-x86.c

 Log Message:
 -----------
 [Clang] Replace some x86 sqrt builtins with the generic __builtin_elementwise_sqrt versions (#165682)


 Commit: bec726f6a6d37bdfb90d1330d4b5e947ce017046
 https://github.com/llvm/llvm-project/commit/bec726f6a6d37bdfb90d1330d4b5e947ce017046
 Author: Folkert de Vries <folkert at folkertdev.nl>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/lib/Target/X86/X86ISelLowering.cpp
 M llvm/lib/Target/X86/X86ISelLowering.h
 M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
 M llvm/lib/Target/X86/X86InstrSSE.td
 M llvm/lib/Target/X86/X86IntrinsicsInfo.h
 A llvm/test/CodeGen/X86/haddsubsat.ll

 Log Message:
 -----------
 [X86] optimize ssse3 horizontal saturating add/sub (#169591)

Currently LLVM fails to recognize a manual implementation of `phadd`

https://godbolt.org/z/zozrssaWb

```llvm
declare <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16>, <8 x i16>)

declare <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16>, <8 x i16>)

define <8 x i16> @phaddsw_v8i16_intrinsic(<8 x i16> %a, <8 x i16> %b) {
entry:
 %res = call <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16> %a, <8 x i16> %b)
 ret <8 x i16> %res
}

define <8 x i16> @phaddsw_v8i16_generic(<8 x i16> %a, <8 x i16> %b) {
entry:
 %even = shufflevector <8 x i16> %a, <8 x i16> %b,
 <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
 %odd = shufflevector <8 x i16> %a, <8 x i16> %b,
 <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
 %sum = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> %even, <8 x i16> %odd)
 ret <8 x i16> %sum
}
```

```asm
phaddsw_v8i16_intrinsic: # @phaddsw_v8i16_intrinsic
 phaddsw xmm0, xmm1
 ret

phaddsw_v8i16_generic: # @phaddsw_v8i16_generic
 movdqa xmm2, xmmword ptr [rip + .LCPI1_0] # xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
 movdqa xmm3, xmm1
 pshufb xmm3, xmm2
 movdqa xmm4, xmm0
 pshufb xmm4, xmm2
 punpcklqdq xmm4, xmm3 # xmm4 = xmm4[0],xmm3[0]
 psrad xmm1, 16
 psrad xmm0, 16
 packssdw xmm0, xmm1
 paddsw xmm0, xmm4
 ret
```

This PR does recognize the pattern.


 Commit: d6be9fc115459ce154f8aa062b05645adb150469
 https://github.com/llvm/llvm-project/commit/d6be9fc115459ce154f8aa062b05645adb150469
 Author: Hristo Hristov <hghristov.rmm at gmail.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M libcxx/include/deque
 M libcxx/test/libcxx/diagnostics/deque.nodiscard.verify.cpp

 Log Message:
 -----------
 [libc++][deque] Applied `[[nodiscard]]` (#169745)

`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.

-
https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant


 Commit: bd95a74a2c548867c004ec991defe276f9cbbf40
 https://github.com/llvm/llvm-project/commit/bd95a74a2c548867c004ec991defe276f9cbbf40
 Author: Timm Baeder <tbaeder at redhat.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M clang/lib/AST/ByteCode/Interp.cpp
 M clang/lib/AST/ByteCode/Pointer.cpp
 M clang/lib/AST/ByteCode/Pointer.h
 M clang/test/AST/ByteCode/invalid.cpp

 Log Message:
 -----------
 [clang][bytecode] Check for invalid record decls in IntPointer::atOffset (#169786)

We can't access the RecordLayout of an invalid decl, so return failure
if that happens.

Fixes https://github.com/llvm/llvm-project/issues/167076


 Commit: 682f292d2caec5b71f8ce6c641114fee446ba49f
 https://github.com/llvm/llvm-project/commit/682f292d2caec5b71f8ce6c641114fee446ba49f
 Author: Florian Hahn <flo at fhahn.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll

 Log Message:
 -----------
 [LV] Test more combinations of scalar stores using last lane of IV.

Extends test coverage to include different start and step values, as
well as interleaving.


 Commit: df8061272ad6d3770ddc17498eff70f700a020ad
 https://github.com/llvm/llvm-project/commit/df8061272ad6d3770ddc17498eff70f700a020ad
 Author: Hristo Hristov <hghristov.rmm at gmail.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M libcxx/include/__flat_set/flat_set.h
 M libcxx/test/libcxx/diagnostics/flat_map.nodiscard.verify.cpp
 M libcxx/test/libcxx/diagnostics/flat_set.nodiscard.verify.cpp

 Log Message:
 -----------
 [libc++][flat_set] Applied `[[nodiscard]]` (#169739)

`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.

-
https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant


 Commit: 7b813c3d8095ba49a8f1e935a9b14c23490e3bb0
 https://github.com/llvm/llvm-project/commit/7b813c3d8095ba49a8f1e935a9b14c23490e3bb0
 Author: Timm Bäder <tbaeder at redhat.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M clang/test/AST/ByteCode/invalid.cpp

 Log Message:
 -----------
 [clang][bytecode][test] Specify triple for Invalid.cpp

This should unbreak that test on 32bit builders, e.g.
https://lab.llvm.org/buildbot/#/builders/154/builds/24509


 Commit: eee09ca98470b880fdd54bd3ff7ea05ae276314a
 https://github.com/llvm/llvm-project/commit/eee09ca98470b880fdd54bd3ff7ea05ae276314a
 Author: Eric Xu <60671484+ericxu233 at users.noreply.github.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M clang/include/clang/Basic/BuiltinsX86.td
 M clang/lib/AST/ByteCode/InterpBuiltin.cpp
 M clang/lib/AST/ExprConstant.cpp
 M clang/test/CodeGen/X86/f16c-builtins.c

 Log Message:
 -----------
 [X86][Clang] Allow constexpr evaluation of F16C CVTPS2PH intrinsics (#162295)

Fixes #160312


 Commit: fca41f4aa105f30af75d88d993539d043ac66460
 https://github.com/llvm/llvm-project/commit/fca41f4aa105f30af75d88d993539d043ac66460
 Author: Simon Pilgrim <llvm-dev at redking.me.uk>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M clang/include/clang/Basic/BuiltinsX86.td
 M clang/lib/CodeGen/TargetBuiltins/X86.cpp
 M clang/lib/Headers/avx512bf16intrin.h
 M clang/lib/Headers/avx512vlbf16intrin.h
 M clang/test/CodeGen/X86/avx512bf16-builtins.c
 M clang/test/CodeGen/X86/avx512vlbf16-builtins.c

 Log Message:
 -----------
 [X86] Replace BF16 to F32 conversions with generic conversions (#169781)

Let standard casting / builtin_convertvector handle the conversions from BF16 to F32

My only query is how to best implement _mm_cvtpbh_ps - I went for the
v8bf16 -> v8f32 conversion followed by subvector extraction in the end,
but could just as easily extract a v4bf16 first - makes no difference to
final optimized codegen.

First part of #154911


 Commit: ea1e62d1a00bf3d40b7a1fd926d2a573c997188d
 https://github.com/llvm/llvm-project/commit/ea1e62d1a00bf3d40b7a1fd926d2a573c997188d
 Author: Jay Foad <jay.foad at amd.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/include/llvm/CodeGen/ValueTypes.td
 M llvm/include/llvm/CodeGenTypes/MachineValueType.h
 M llvm/include/llvm/Target/Target.td
 M llvm/lib/Target/SPIRV/SPIRVRegisterInfo.td
 M llvm/utils/TableGen/Basic/VTEmitter.cpp
 M llvm/utils/TableGen/Common/CodeGenTarget.cpp
 M mlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp

 Log Message:
 -----------
 [CodeGenTypes] Remove explicit VT numbers from ValueTypes.td (#169670)

Remove explicit VT numbers from ValueTypes.td so that patches that add a
new VT do not have to renumber the entire file.

In TableGen VTs are now identified by ValueType.LLVMName instead of
ValueType.Value. This is important for target-defined types (typically
based on PtrValueType) which are not mentioned in ValueTypes.td itself.


 Commit: 66ca3f1367bb59915bd9f832a9cd3dfe56304538
 https://github.com/llvm/llvm-project/commit/66ca3f1367bb59915bd9f832a9cd3dfe56304538
 Author: Kai Nacke <kai.peter.nacke at ibm.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
 M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
 A llvm/test/CodeGen/SystemZ/zos-target-flags.ll

 Log Message:
 -----------
 [SystemZ] Serialize ada entry flags (#169395)

Adding support for serializing the ada entry flags helps with mir based
test cases. Without this change, the flags are simple displayed as being
"unkmown".


 Commit: 1d7d83d0bf8f376b977f25cec75633dceb91b8f1
 https://github.com/llvm/llvm-project/commit/1d7d83d0bf8f376b977f25cec75633dceb91b8f1
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/include/llvm/IR/RuntimeLibcalls.td
 M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/darwin.ll

 Log Message:
 -----------
 RuntimeLibcalls: Add macos unlocked IO functions to systems (#167084)


 Commit: 514dbab474c71326c1080f3129a26f0ffdd71d51
 https://github.com/llvm/llvm-project/commit/514dbab474c71326c1080f3129a26f0ffdd71d51
 Author: Donát Nagy <donat.nagy at ericsson.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M clang/docs/ClangStaticAnalyzer.rst
 M clang/docs/analyzer/user-docs.rst
 M clang/docs/analyzer/user-docs/CommandLineUsage.rst
 M clang/docs/analyzer/user-docs/Installation.rst

 Log Message:
 -----------
 [NFC][analyzer] Clean up obsolete installation instructions (#166193)

The documentation file `Installation.rst` contained very obsolete
instructions for installing the clang static analyzer. This commit
replaces it with sentence which explains that the analyzer is part of
clang and links to the releases page of LLVM (for downloading clang).

This sentence is primarily added to the top-level page of the analyzer
documentation; but it also appears in a stubbed Installation.rst (for
users who followed a direct external link to this installation page).
This stubbed section is removed from the table of contents, but I kept
it as an orphaned page (to avoid breaking links).

Fixes #165571


 Commit: d128d90e71146cf099a31a967fdeb2591d30514d
 https://github.com/llvm/llvm-project/commit/d128d90e71146cf099a31a967fdeb2591d30514d
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/include/llvm/IR/RuntimeLibcalls.td
 A llvm/test/Transforms/Util/DeclareRuntimeLibcalls/emscripten.ll

 Log Message:
 -----------
 RuntimeLibcalls: Add small_printf functions to emscripten (#167087)


 Commit: 97aa4f3abbba2ce4460c0d8e5364bd333aaa8079
 https://github.com/llvm/llvm-project/commit/97aa4f3abbba2ce4460c0d8e5364bd333aaa8079
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/include/llvm/IR/RuntimeLibcalls.td
 A llvm/test/Transforms/Util/DeclareRuntimeLibcalls/xcore.ll

 Log Message:
 -----------
 XCore: Add iprintf to RuntimeLibcalls system library (#167088)


 Commit: 6412184891526690cff804f87f986b1fa039f011
 https://github.com/llvm/llvm-project/commit/6412184891526690cff804f87f986b1fa039f011
 Author: Durgadoss R <durgadossr at nvidia.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M mlir/docs/Dialects/NVVMDialect.md

 Log Message:
 -----------
 [MLIR][NVVM][Docs] Update docs (#169694)

This patch updates the NVVM Dialect docs to:
* include information on the type of pointers for the memory spaces.
* include high-level information on mbarrier objects.

Signed-off-by: Durgadoss R <durgadossr at nvidia.com>


 Commit: 4394aa685c4b01ad3782a137fcfebeadc4941df1
 https://github.com/llvm/llvm-project/commit/4394aa685c4b01ad3782a137fcfebeadc4941df1
 Author: Jason-VanBeusekom <jason.van-beusekom at hpe.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M clang/docs/HIPSupport.rst
 M clang/lib/CodeGen/CodeGenModule.cpp
 A clang/test/CodeGenCUDA/cuda_weak_alias.cu
 A clang/test/CodeGenHIP/hip_weak_alias.cpp
 A clang/test/OpenMP/amdgcn_weak_alias.c
 A clang/test/OpenMP/amdgcn_weak_alias.cpp
 A clang/test/OpenMP/nvptx_weak_alias.c

 Log Message:
 -----------
 [OpenMP][clang][HIP][CUDA] fix weak alias emit on device compilation (#164326)

This PR adds checks for when emitting weak aliases in: `void
CodeGenModule::EmitGlobal(GlobalDecl GD)`, before for device compilation
for OpenMP, HIP and Cuda, clang would look for the aliasee even if it
was never marked for device compilation.

For OpenMP the following case now works:

> Failed before when compiling with device, ie: `clang -fopenmp
-fopenmp-targets=amdgcn-amd-amdhsa`
> ```
> int __Two(void) { return 2; }
> int Two(void) __attribute__ ((weak, alias("__Two")));
> ```

For HIP / Cuda:

> 
> ```
> int __HostFunc(void) { return 42; }
> int HostFunc(void) __attribute__ ((weak, alias("__HostFunc")));
> ```

For HIP:

>Failed before on HIP, Cuda fails due to: `NVPTX aliasee must not be
'.weak'` error
> ``` 
> __device__ int __One(void) { return 2; }
> __device__ int One(void) __attribute__ ((weak, alias("__One")));
> ```

Included are Codegen LIT tests for the above cases, and also cases for
weak alias cases that currently work in clang.

Fixes https://github.com/llvm/llvm-project/issues/117369


 Commit: 0e5633fcd984b54acc071c2c982c1ff4691aa10f
 https://github.com/llvm/llvm-project/commit/0e5633fcd984b54acc071c2c982c1ff4691aa10f
 Author: Tom Eccles <tom.eccles at arm.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M clang/test/OpenMP/cancel_codegen.cpp
 M clang/test/OpenMP/critical_codegen.cpp
 M clang/test/OpenMP/critical_codegen_attr.cpp
 M clang/test/OpenMP/irbuilder_nested_parallel_for.c
 M clang/test/OpenMP/masked_codegen.cpp
 M clang/test/OpenMP/master_codegen.cpp
 M clang/test/OpenMP/nested_loop_codegen.cpp
 M clang/test/OpenMP/ordered_codegen.cpp
 M clang/test/OpenMP/parallel_codegen.cpp
 M flang/test/Integration/OpenMP/parallel-private-reduction-worstcase.f90
 M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
 M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
 M llvm/test/Transforms/OpenMP/parallel_region_merging.ll
 M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
 M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
 M mlir/test/Target/LLVMIR/openmp-barrier-cancel.mlir
 M mlir/test/Target/LLVMIR/openmp-cancel.mlir
 M mlir/test/Target/LLVMIR/openmp-cancellation-point.mlir
 M mlir/test/Target/LLVMIR/openmp-outline-infinite-loop.mlir
 M mlir/test/Target/LLVMIR/openmp-parallel-reduction-multiblock.mlir
 M mlir/test/Target/LLVMIR/openmp-reduction-array-sections.mlir
 M mlir/test/Target/LLVMIR/openmp-reduction-init-arg.mlir
 M mlir/test/Target/LLVMIR/openmp-reduction-sections.mlir

 Log Message:
 -----------
 [OMPIRBuilder] always leave PARALLEL via the same barrier (#164586)

A barrier will pause execution until all threads reach it. If some go to
a different barrier then we deadlock. This manifests in that the
finalization callback must only be run once. Fix by ensuring we always
go through the same finalization block whether the thread in cancelled
or not and no matter which cancellation point causes the cancellation.

The old callback only affected PARALLEL, so it has been moved into the
code generating PARALLEL. For this reason, we don't need similar changes
for other cancellable constructs. We need to create the barrier on the
shared exit from the outlined function instead of only on the cancelled
branch to make sure that threads exiting normally (without cancellation)
meet the same barriers as those which were cancelled. For example,
previously we might have generated code like

```
...
 %ret = call i32 @__kmpc_cancel(...)
 %cond = icmp eq i32 %ret, 0
 br i1 %cond, label %continue, label %cancel

continue:
 // do the rest of the callback, eventually branching to %fini
 br label %fini

cancel:
 // Populated by the callback:
 // unsafe: if any thread makes it to the end without being cancelled
 // it won't reach this barrier and then the program will deadlock
 %unused = call i32 @__kmpc_cancel_barrier(...)
 br label %fini

fini:
 // run destructors etc
 ret
```

In the new version the barrier is moved into fini. I generate it *after*
the destructors because the standard describes the barrier as occurring
after the end of the parallel region.

```
...
 %ret = call i32 @__kmpc_cancel(...)
 %cond = icmp eq i32 %ret, 0
 br i1 %cond, label %continue, label %cancel

continue:
 // do the rest of the callback, eventually branching to %fini
 br label %fini

cancel:
 br label %fini

fini:
 // run destructors etc
 // safe so long as every exit from the function happens via this block:
 %unused = call i32 @__kmpc_cancel_barrier(...)
 ret
```

To achieve this, the barrier is now generated alongside the finalization
code instead of in the callback. This is the reason for the changes to
the unit test.

I'm unsure if I should keep the incorrect barrier generation callback
only on the cancellation branch in clang with the OMPIRBuilder backend
because that would match clang's ordinary codegen. Right now I have
opted to remove it entirely because it is a deadlock waiting to happen.


 Commit: 47ae3eaa29f2195429f2ca19cc171a9ebd83c242
 https://github.com/llvm/llvm-project/commit/47ae3eaa29f2195429f2ca19cc171a9ebd83c242
 Author: Jack Styles <jack.styles at arm.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M flang/docs/OpenMPSupport.md
 M llvm/include/llvm/Frontend/OpenMP/OMP.td
 M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
 M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
 M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
 M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
 M mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
 A mlir/test/Target/LLVMIR/openmp-dist_schedule.mlir
 A mlir/test/Target/LLVMIR/openmp-dist_schedule_with_wsloop.mlir
 M mlir/test/Target/LLVMIR/openmp-todo.mlir

 Log Message:
 -----------
 [MLIR][OpenMP] Add MLIR Lowering Support for dist_schedule (#152736)

`dist_schedule` was previously supported in Flang/Clang but was not
implemented in MLIR, instead a user would get a "not yet implemented"
error. This patch adds support for the `dist_schedule` clause to be
lowered to LLVM IR when used in an `omp.distribute` or `omp.wsloop`
section.

There has needed to be some rework required to ensure that MLIR/LLVM
emits the correct Schedule Type for the clause, as it uses a different
schedule type to other OpenMP directives/clauses in the runtime library.

This patch also ensures that when using dist_schedule or a chunked
schedule clause, the correct llvm loop parallel accesses details are
added.


 Commit: e3044cd552ca0300dbb4c1051dccd038382bd4af
 https://github.com/llvm/llvm-project/commit/e3044cd552ca0300dbb4c1051dccd038382bd4af
 Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M clang/lib/Basic/Targets/X86.cpp
 M compiler-rt/lib/builtins/cpu_model/x86.c
 M llvm/include/llvm/TargetParser/X86TargetParser.def
 M llvm/include/llvm/TargetParser/X86TargetParser.h
 M llvm/lib/TargetParser/X86TargetParser.cpp

 Log Message:
 -----------
 [X86] Sync multiversion features with libgcc and refactor internal feature tables (#168750)

Compiler-rt internal feature table is synced with the one in libgcc
(common/config/i386/i386-cpuinfo.h).

LLVM internal feature table is refactored to include a field ABI_VALUE,
so we won't be relying on ordering to keep the values correct. The table
is also synced to the one in compiler-rt.


 Commit: c0d81bf55f3dc3b38a1d403ee07e547016f46842
 https://github.com/llvm/llvm-project/commit/c0d81bf55f3dc3b38a1d403ee07e547016f46842
 Author: David Green <david.green at arm.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
 M llvm/lib/Target/ARM/ARMAsmPrinter.h
 M llvm/lib/Target/ARM/ARMMCInstLower.cpp
 M llvm/lib/Target/ARM/ARMSubtarget.cpp

 Log Message:
 -----------
 [ARM] Remove Subtarget from ARMAsmPrinter (#168264)

Remove Subtarget uses from ARMAsmPrinter, making use of TargetMachine
where applicable and getting the Subtarget from the MF where not. Some
of the `if() llvm_unreachable` have been replaced by `asserts`.


 Commit: adcc557ef176ee36a1e5df12b60789b6fa2fe73c
 https://github.com/llvm/llvm-project/commit/adcc557ef176ee36a1e5df12b60789b6fa2fe73c
 Author: Simon Pilgrim <llvm-dev at redking.me.uk>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/test/CodeGen/X86/srem-vector-lkk.ll
 M llvm/test/CodeGen/X86/urem-vector-lkk.ll

 Log Message:
 -----------
 [X86] rem-vector-lkk.ll - improve CPU coverage to cover all x86-64 levels (#169805)

SSE2/SSE42/AVX1/AVX2 + x86-64-v4 (AVX512)


 Commit: 920a091da216521cbef4203ad69c63aaa2ea2154
 https://github.com/llvm/llvm-project/commit/920a091da216521cbef4203ad69c63aaa2ea2154
 Author: Nikolas Klauser <nikolasklauser at berlin.de>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M libcxx/test/libcxx-03/algorithms/half_positive.pass.cpp
 M libcxx/test/libcxx-03/algorithms/robust_against_copying_comparators.pass.cpp
 M libcxx/test/libcxx-03/algorithms/robust_against_cpp20_hostile_iterators.compile.pass.cpp
 M libcxx/test/libcxx-03/containers/sequences/vector/asan.pass.cpp
 M libcxx/test/libcxx-03/containers/sequences/vector/asan_throw.pass.cpp
 M libcxx/test/libcxx-03/depr/depr.default.allocator/allocator.members/construct.cxx20.pass.cpp
 M libcxx/test/libcxx-03/input.output/string.streams/stringbuf/const_sso_buffer.pass.cpp
 M libcxx/test/libcxx-03/iterators/bounded_iter/arithmetic.pass.cpp
 M libcxx/test/libcxx-03/iterators/bounded_iter/comparison.pass.cpp
 M libcxx/test/libcxx-03/iterators/bounded_iter/pointer_traits.pass.cpp
 M libcxx/test/libcxx-03/iterators/bounded_iter/types.compile.pass.cpp
 M libcxx/test/libcxx-03/iterators/contiguous_iterators.conv.compile.pass.cpp
 M libcxx/test/libcxx-03/iterators/contiguous_iterators.pass.cpp
 M libcxx/test/libcxx-03/iterators/predef.iterators/insert.iterators/back.insert.iter.ops/get_container.pass.cpp
 M libcxx/test/libcxx-03/iterators/unwrap_iter.pass.cpp
 M libcxx/test/libcxx-03/language.support/support.dynamic/libcpp_deallocate.sh.cpp
 M libcxx/test/libcxx-03/libcpp_alignof.pass.cpp
 M libcxx/test/libcxx-03/memory/allocation_guard.pass.cpp
 M libcxx/test/libcxx-03/memory/swap_allocator.pass.cpp
 M libcxx/test/libcxx-03/numerics/bit.ops.pass.cpp
 M libcxx/test/libcxx-03/strings/basic.string/string.capacity/max_size.pass.cpp
 M libcxx/test/libcxx-03/strings/basic.string/string.cons/copy_shrunk_long.pass.cpp
 M libcxx/test/libcxx-03/strings/c.strings/constexpr_memmove.pass.cpp
 M libcxx/test/libcxx-03/type_traits/is_trivially_relocatable.compile.pass.cpp
 M libcxx/test/libcxx-03/utilities/function.objects/func.require/bullet_1_2_3.pass.cpp
 M libcxx/test/libcxx-03/utilities/function.objects/func.require/bullet_4_5_6.pass.cpp
 M libcxx/test/libcxx-03/utilities/function.objects/func.require/bullet_7.pass.cpp
 M libcxx/test/libcxx-03/utilities/function.objects/func.require/invoke.pass.cpp
 M libcxx/test/libcxx-03/utilities/function.objects/func.require/invoke_helpers.h
 M libcxx/test/libcxx-03/utilities/is_pointer_in_range.pass.cpp
 M libcxx/test/libcxx-03/utilities/is_valid_range.pass.cpp
 M libcxx/test/libcxx-03/utilities/memory/pointer.conversion/to_address.pass.cpp
 M libcxx/test/libcxx-03/utilities/memory/pointer.conversion/to_address_std_iterators.pass.cpp
 M libcxx/test/libcxx-03/utilities/meta/is_referenceable.compile.pass.cpp
 M libcxx/test/libcxx-03/utilities/no_destroy.pass.cpp
 M libcxx/test/libcxx-03/utilities/utility/pairs/pairs.pair/abi.non_trivial_copy_move.pass.cpp
 M libcxx/test/libcxx-03/utilities/utility/pairs/pairs.pair/abi.trivial_copy_move.pass.cpp
 M libcxx/test/libcxx-03/utilities/utility/pairs/pairs.pair/abi.trivially_copyable.compile.pass.cpp

 Log Message:
 -----------
 [libc++][C++03] Remove code in the C++03-specific tests that is guarded on the language version (#169354)

This is dead code, since `test/libcxx-03` is only ever executed with
`-std=c++03`.


 Commit: 634f6e9ff357050ab28de150f35bf293cd31b332
 https://github.com/llvm/llvm-project/commit/634f6e9ff357050ab28de150f35bf293cd31b332
 Author: Nikolas Klauser <nikolasklauser at berlin.de>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M libcxx/include/__algorithm/copy_n.h
 M libcxx/include/__algorithm/iterator_operations.h
 M libcxx/include/__algorithm/ranges_copy_n.h
 M libcxx/include/__vector/vector.h

 Log Message:
 -----------
 [libc++] Merge the implementations of ranges::copy_n and std::copy_n and fix vector::insert to assign (#157444)

This reduces the amount of code we have to maintain a bit.

This also simplifies `vector` by using the internal API instead of
`#if`s to switch based on language dialect.


 Commit: f8e77168c89a142b6e2bdb9ea8322c42c0808fae
 https://github.com/llvm/llvm-project/commit/f8e77168c89a142b6e2bdb9ea8322c42c0808fae
 Author: NagaChaitanya Vellanki <pnagato at protonmail.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M clang/include/clang/Basic/BuiltinsX86.td
 M clang/lib/AST/ByteCode/InterpBuiltin.cpp
 M clang/lib/AST/ExprConstant.cpp
 M clang/lib/Headers/avx2intrin.h
 M clang/lib/Headers/avx512bwintrin.h
 M clang/lib/Headers/avx512fintrin.h
 M clang/lib/Headers/avx512vlintrin.h
 M clang/lib/Headers/emmintrin.h
 M clang/lib/Headers/mmintrin.h
 M clang/test/CodeGen/X86/avx2-builtins.c
 M clang/test/CodeGen/X86/avx512bw-builtins.c
 M clang/test/CodeGen/X86/avx512f-builtins.c
 M clang/test/CodeGen/X86/avx512vl-builtins.c
 M clang/test/CodeGen/X86/mmx-builtins.c
 M clang/test/CodeGen/X86/sse2-builtins.c

 Log Message:
 -----------
 [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - Allow PSLL/PSRA/PSRL var intrinsics to be used in constexpr (#169276)

Resolves #169176


 Commit: b64150963733d04e524f501cdd736963a7a3ba6d
 https://github.com/llvm/llvm-project/commit/b64150963733d04e524f501cdd736963a7a3ba6d
 Author: Julian Nagele <j.nagele at apple.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Utils/LoopUnroll.cpp
 M llvm/test/Transforms/LoopUnroll/partial-unroll-reductions.ll
 M llvm/test/Transforms/LoopUnroll/runtime-unroll-reductions.ll

 Log Message:
 -----------
 [LoopUnroll] Introduce parallel accumulators when unrolling FP reductions. (#166630)

This is building on top of
https://github.com/llvm/llvm-project/pull/149470, also introducing
parallel accumulator PHIs when the reduction is for floating points,
provided we have the reassoc flag. See also
https://github.com/llvm/llvm-project/pull/166353, which aims to
introduce parallel accumulators for reductions with vector instructions.


 Commit: 8871e9e2e2c0941b04b22f719906a588fe523be2
 https://github.com/llvm/llvm-project/commit/8871e9e2e2c0941b04b22f719906a588fe523be2
 Author: Jacob Lambert <jacob.lambert at amd.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M clang/lib/Driver/ToolChains/AMDGPU.cpp

 Log Message:
 -----------
 [clang][Driver] Handle ROCm installation layout of lib/llvm/bin/clang (#138928)

Committing on behalf of @stellaraccident


 Commit: 7f1423e58ac894e7225625f34d90806ce5f052b3
 https://github.com/llvm/llvm-project/commit/7f1423e58ac894e7225625f34d90806ce5f052b3
 Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/include/llvm/Analysis/Delinearization.h
 M llvm/lib/Analysis/Delinearization.cpp
 M llvm/lib/Analysis/DependenceAnalysis.cpp
 M llvm/test/Analysis/Delinearization/a.ll
 M llvm/test/Analysis/Delinearization/constant_functions_multi_dim.ll
 M llvm/test/Analysis/Delinearization/divide_by_one.ll
 M llvm/test/Analysis/Delinearization/fixed_size_array.ll
 M llvm/test/Analysis/Delinearization/himeno_1.ll
 M llvm/test/Analysis/Delinearization/himeno_2.ll
 M llvm/test/Analysis/Delinearization/iv_times_constant_in_subscript.ll
 M llvm/test/Analysis/Delinearization/multidim_ivs_and_integer_offsets_3d.ll
 M llvm/test/Analysis/Delinearization/multidim_ivs_and_integer_offsets_nts_3d.ll
 M llvm/test/Analysis/Delinearization/multidim_ivs_and_parameteric_offsets_3d.ll
 M llvm/test/Analysis/Delinearization/multidim_only_ivs_2d.ll
 M llvm/test/Analysis/Delinearization/multidim_only_ivs_3d.ll
 M llvm/test/Analysis/Delinearization/multidim_only_ivs_3d_cast.ll
 M llvm/test/Analysis/Delinearization/multidim_two_accesses_different_delinearization.ll
 M llvm/test/Analysis/Delinearization/parameter_addrec_product.ll
 M llvm/test/Analysis/Delinearization/terms_with_identity_factor.ll

 Log Message:
 -----------
 [DA][Delinearization] Move validation logic into Delinearization (#169047)

This patch moves the validation logic of delinearization results from DA
to Delinearization. Also call it in `printDelinearization` to test its
behavior. The motivation is as follows:

- Almost the same code exists in `tryDelinearizeFixedSize` and
`tryDelinearizeParametricSize`. Consolidating it in Delinearization
avoids code duplication.
- Currently this validation logic is not well tested. Moving it to
Delinearization allows us to write regression tests easily.

This patch changes the test outputs and debug messages, but otherwise
NFCI.


 Commit: 90e8889a6394e29843ba903eff45ca03f877a6dd
 https://github.com/llvm/llvm-project/commit/90e8889a6394e29843ba903eff45ca03f877a6dd
 Author: Ebuka Ezike <yerimyah1 at gmail.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
 M lldb/unittests/Language/CPlusPlus/CPlusPlusLanguageTest.cpp

 Log Message:
 -----------
 [lldb] Fix CxxMethodName Parser on return type (#169652)

The simplified parser incorrectly assumes if there is a context, there
is no return type.

Fixed the case where functions have both a context and a return type.
For example,

`int foo::bar::func()`
`Type<int> foo::bar::func()` 

Also fixed the case where there is no space between the context and
return.
`std::vector<int>foo::bar()`


 Commit: e0c0075819f4fe30c1522a1972b683641e66507a
 https://github.com/llvm/llvm-project/commit/e0c0075819f4fe30c1522a1972b683641e66507a
 Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
 A llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_float_controls2/disabled-on-amd.ll

 Log Message:
 -----------
 [SPIRV][AMD] Disable SPV_KHR_float_control2 for AMD flavored SPIRV (#169659)

AMD uses the translator to recover LLVM-IR from SPIRV.

Currently, the translator doesn't implement the
`SPV_KHR_float_controls2` extension (I'm working on it).
If this extension is used by the SPIRV module, we cannot translate it
back to LLVM-IR.

I'm working on the extension, but in the meantime, lets just disable it
when the target triple's vendor is `amd`.


 Commit: 48e34d95987aec19585672b2363eda1a99338751
 https://github.com/llvm/llvm-project/commit/48e34d95987aec19585672b2363eda1a99338751
 Author: Ingo Müller <ingomueller at google.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

 Log Message:
 -----------
 [mlir:bazel] Fix build broken by #169670. (#169804)

This PR adds a dependency to the `BUILD` files overlay silently added by
#169670.

Signed-off-by: Ingo Müller <ingomueller at google.com>


 Commit: 25d027b8ab3acd65b58fce278f4173b431326934
 https://github.com/llvm/llvm-project/commit/25d027b8ab3acd65b58fce278f4173b431326934
 Author: Ming Yan <ming.yan at terapines.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M mlir/lib/Dialect/SCF/Transforms/UpliftWhileToFor.cpp
 M mlir/test/Dialect/SCF/uplift-while.mlir

 Log Message:
 -----------
 [MLIR][SCF] Sink scf.if from scf.while before region into after region in scf-uplift-while-to-for (#165216)

When a `scf.if` directly precedes an `scf.condition` in the before
region of an `scf.while` and both share the same condition, move the if
into the after region of the loop. This helps simplify the control flow
to enable uplifting `scf.while` to `scf.for`.


 Commit: 5d6d74359d69d3aada6a46c7cf51d84eb0848b70
 https://github.com/llvm/llvm-project/commit/5d6d74359d69d3aada6a46c7cf51d84eb0848b70
 Author: Gergely Bálint <gergely.balint at arm.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M bolt/lib/Passes/Inliner.cpp
 A bolt/test/AArch64/inline-bti.s

 Log Message:
 -----------
 [BOLT][BTI] Skip inlining BasicBlocks containing indirect tailcalls (#168403)

In the Inliner pass, tailcalls are converted to calls in the inlined
BasicBlock. If the tailcall is indirect, the `BR` is converted to `BLR`.

These instructions require different BTI landing pads at their targets.

As the targets of indirect tailcalls are unknown, inlining such blocks
is unsound for BTI: they should be skipped instead.


 Commit: 39f5ff056bc459c7db4d01c348fe78925da8c558
 https://github.com/llvm/llvm-project/commit/39f5ff056bc459c7db4d01c348fe78925da8c558
 Author: Vitalii Shutov <vitalii.shutov at arm.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M mlir/include/mlir/Dialect/Tosa/Transforms/Passes.td
 M mlir/lib/Dialect/Tosa/Transforms/CMakeLists.txt
 A mlir/lib/Dialect/Tosa/Transforms/TosaArithConstantToConst.cpp
 A mlir/test/Dialect/Tosa/tosa-arith-const-to-tosa-const.mlir

 Log Message:
 -----------
 [mlir][tosa] Introduce arith.constant -> tosa.const normalization pass (#168370)

Add a standalone pass that rewrites tensor-valued `arith.constant` ops
into `tosa.const`, normalize the TOSA backend contract.

Signed-off-by: Vitalii Shutov <vitalii.shutov at arm.com>
Co-authored-by: Shubham <shubham at arm.com>


 Commit: fb94261d88eb679ba227281ccae88165172a68cb
 https://github.com/llvm/llvm-project/commit/fb94261d88eb679ba227281ccae88165172a68cb
 Author: Shreeyash Pandey <shreeyash335 at gmail.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M libc/cmake/modules/LLVMLibCArchitectures.cmake
 M libc/include/sys/syscall.h.def

 Log Message:
 -----------
 [libc][darwin] add syscall numbers from macos sdk (#166354)

This PR adds support to include syscall.h from MacOS sdk by explicitly including the path to the sdk via `xcrun`.


 Commit: 58fa7e4ccd533e5547868a9211d4da16bc80ac20
 https://github.com/llvm/llvm-project/commit/58fa7e4ccd533e5547868a9211d4da16bc80ac20
 Author: Tom Eccles <tom.eccles at arm.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M clang/test/OpenMP/cancel_codegen.cpp
 M clang/test/OpenMP/critical_codegen.cpp
 M clang/test/OpenMP/critical_codegen_attr.cpp
 M clang/test/OpenMP/irbuilder_nested_parallel_for.c
 M clang/test/OpenMP/masked_codegen.cpp
 M clang/test/OpenMP/master_codegen.cpp
 M clang/test/OpenMP/nested_loop_codegen.cpp
 M clang/test/OpenMP/ordered_codegen.cpp
 M clang/test/OpenMP/parallel_codegen.cpp
 M flang/test/Integration/OpenMP/parallel-private-reduction-worstcase.f90
 M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
 M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
 M llvm/test/Transforms/OpenMP/parallel_region_merging.ll
 M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
 M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
 M mlir/test/Target/LLVMIR/openmp-barrier-cancel.mlir
 M mlir/test/Target/LLVMIR/openmp-cancel.mlir
 M mlir/test/Target/LLVMIR/openmp-cancellation-point.mlir
 M mlir/test/Target/LLVMIR/openmp-outline-infinite-loop.mlir
 M mlir/test/Target/LLVMIR/openmp-parallel-reduction-multiblock.mlir
 M mlir/test/Target/LLVMIR/openmp-reduction-array-sections.mlir
 M mlir/test/Target/LLVMIR/openmp-reduction-init-arg.mlir
 M mlir/test/Target/LLVMIR/openmp-reduction-sections.mlir

 Log Message:
 -----------
 Revert "[OMPIRBuilder] always leave PARALLEL via the same barrier" (#169829)

Reverts llvm/llvm-project#164586

Reverting due to buildbot failure:
https://lab.llvm.org/buildbot/#/builders/169/builds/17519


 Commit: 620f1f1efb45bf918db494f6779ed1f46d2da456
 https://github.com/llvm/llvm-project/commit/620f1f1efb45bf918db494f6779ed1f46d2da456
 Author: Jay Foad <jay.foad at amd.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/test/CodeGen/AMDGPU/fneg-combines-gfx1200.ll
 M llvm/test/CodeGen/AMDGPU/global-address.ll
 M llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll

 Log Message:
 -----------
 [AMDGPU] Remove odd syntax in some RUN lines. NFC. (#169831)


 Commit: e3a28c060dc99cc41952d56445e1e4c26ddae685
 https://github.com/llvm/llvm-project/commit/e3a28c060dc99cc41952d56445e1e4c26ddae685
 Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M flang-rt/lib/cuda/allocator.cpp
 M flang-rt/unittests/Runtime/CUDA/Allocatable.cpp
 M flang/include/flang/Runtime/CUDA/allocator.h

 Log Message:
 -----------
 [flang][cuda][NFC] Fix naming of CUFGetAssociatedStream (#169838)


 Commit: a1ca69098d6c02c5d7f5a54f84a54636522b38be
 https://github.com/llvm/llvm-project/commit/a1ca69098d6c02c5d7f5a54f84a54636522b38be
 Author: Philip Ginsbach-Chen <philip.ginsbach at cantab.net>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
 M llvm/lib/Target/AArch64/AArch64PerfectShuffle.h
 M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
 M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
 M llvm/test/CodeGen/AArch64/arm64-zip.ll
 M llvm/test/CodeGen/AArch64/fixed-vector-deinterleave.ll
 M llvm/test/CodeGen/AArch64/insert-extend.ll
 M llvm/test/CodeGen/AArch64/insert-subvector.ll
 M llvm/test/CodeGen/AArch64/neon-widen-shuffle.ll
 M llvm/test/CodeGen/AArch64/reduce-shuffle.ll

 Log Message:
 -----------
 [AArch64] recognise zip1/zip2 with flipped operands (#167235)

Currently, the following two snippets get treated very differently from
each other (https://godbolt.org/z/rYGj9TGz6):
```LLVM
define <8 x i8> @foo(<8 x i8> %x, <8 x i8> %y) local_unnamed_addr #0 {
entry:
 %0 = shufflevector <8 x i8> %x, <8 x i8> %y, <8 x i32>
 <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
 ret <8 x i8> %0
}

define <8 x i8> @bar(<8 x i8> %x, <8 x i8> %y) local_unnamed_addr #0 {
entry:
 %0 = shufflevector <8 x i8> %x, <8 x i8> %y, <8 x i32>
 <i32 8, i32 0, i32 9, i32 1, i32 10, i32 2, i32 11, i32 3>
 ret <8 x i8> %0
}
```
```
foo: // @foo
 zip1 v0.8b, v0.8b, v1.8b
 ret
.LCPI1_0:
 .byte 8 // 0x8
 .byte 0 // 0x0
 .byte 9 // 0x9
 .byte 1 // 0x1
 .byte 10 // 0xa
 .byte 2 // 0x2
 .byte 11 // 0xb
 .byte 3 // 0x3
bar: // @bar
 adrp x8, .LCPI1_0
 mov v0.d[1], v1.d[0]
 ldr d1, [x8, :lo12:.LCPI1_0]
 tbl v0.8b, { v0.16b }, v1.8b
 ret
```
The reason is that `isZIPMask` does not recognise the pattern when the
operands are flipped.

This PR fixes `isZIPMask` so that both `foo` and `bar` get compiled as
expected:
```
foo: // @foo
	zip1	v0.8b, v0.8b, v1.8b
	ret
bar: // @bar
	zip1	v0.8b, v1.8b, v0.8b
	ret
```

I intend to open a similar follow-up PR for `isTRNMask`, which seems to
have the same problem.

I noticed this while working on
https://github.com/llvm/llvm-project/issues/137447, though the change
does not on itself fix that issue.


 Commit: 8397945f6d1406bc659f1ee10575f42a8c1846b6
 https://github.com/llvm/llvm-project/commit/8397945f6d1406bc659f1ee10575f42a8c1846b6
 Author: Michael Liao <michael.hliao at gmail.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp

 Log Message:
 -----------
 [clang][CIR] Fix build after builtins removal. NFC


 Commit: 75e4438b57eb7ac2e1cdd1bcba3368bddd81d0c4
 https://github.com/llvm/llvm-project/commit/75e4438b57eb7ac2e1cdd1bcba3368bddd81d0c4
 Author: Thurston Dang <thurston at google.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M clang/lib/CodeGen/SanitizerHandler.h
 M clang/test/DebugInfo/Generic/ubsan-trap-reason-type-mismatch.c

 Log Message:
 -----------
 [ubsan] Change "Type mismatch in operation" trap reason to "Alignment, null, or object-size error" (#169752)

I originally proposed this rewording when trap reasons were introduced
in
https://github.com/llvm/llvm-project/pull/145967#discussion_r2196212344.
This was not adopted because there was a counter-proposal to split the
enum; however, that work appears to have stalled
(https://github.com/llvm/llvm-project/pull/151243). In the meantime,
there has been an additional datapoint that the current wording is
confusing to users. Thus, let's reword it now to prevent further
confusion.


 Commit: db85babddd9e96e862ba09df6d25dfac1d15fb31
 https://github.com/llvm/llvm-project/commit/db85babddd9e96e862ba09df6d25dfac1d15fb31
 Author: Florian Hahn <flo at fhahn.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
 M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp

 Log Message:
 -----------
 [VPlan] Use m_Intrinsic to match assumes/noalias_scope_decl (NFC).

Use pattern matching to check for intrinsics to slightly simplify code.


 Commit: 03c86242929c1b05f417aa5ddd016b7664e22d4e
 https://github.com/llvm/llvm-project/commit/03c86242929c1b05f417aa5ddd016b7664e22d4e
 Author: Ingo Müller <ingomueller at google.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M clang/lib/AST/ExprConstant.cpp

 Log Message:
 -----------
 [clang:ast] Avoid warning for unused var without assertions. (NFC) (#169822)

This PR avoids a compiler warning, which turns into an error with
`-Werror`, for a variable introduced in #169276 and only used in an
assertion (which is, thus, unused if compiled without assertions).

Signed-off-by: Ingo Müller <ingomueller at google.com>
Co-authored-by: Simon Pilgrim <llvm-dev at redking.me.uk>


 Commit: fd19a20a1ac55775333c2630e53b9fdf7c8dc831
 https://github.com/llvm/llvm-project/commit/fd19a20a1ac55775333c2630e53b9fdf7c8dc831
 Author: Alex Bradbury <asb at igalia.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/include/llvm/CodeGen/MachineBasicBlock.h
 M llvm/lib/CodeGen/ShrinkWrap.cpp
 M llvm/test/CodeGen/AArch64/arm64-shrink-wrapping.ll

 Log Message:
 -----------
 Revert "[ShrinkWrap] Modify shrink wrapping to accommodate functions terminated by no-return blocks" (#169852)

Reverts llvm/llvm-project#167548

As commented at
https://github.com/llvm/llvm-project/pull/167548#issuecomment-3587008602
this is causing miscompiles in two-stage RISC-V Clang/LLVM builds that
result in test failures on the builders.


 Commit: 1b7ae0b673638062fc99a6605df6212b6d35eb06
 https://github.com/llvm/llvm-project/commit/1b7ae0b673638062fc99a6605df6212b6d35eb06
 Author: clf <53817093+clingfei at users.noreply.github.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
 A llvm/test/CodeGen/AArch64/aarch64-isel-umin.ll
 M llvm/test/CodeGen/AArch64/arm64-popcnt.ll

 Log Message:
 -----------
 [AArch64] Use umin for x != 0 when +cssc is enabled (#169159)

Closes https://github.com/llvm/llvm-project/issues/161584


 Commit: ee45ba2ff49db3cc5d31f2600a3e7fad81d70cb1
 https://github.com/llvm/llvm-project/commit/ee45ba2ff49db3cc5d31f2600a3e7fad81d70cb1
 Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
 A llvm/test/CodeGen/AArch64/fixed-length-bf16-arith.ll
 M llvm/test/CodeGen/AArch64/sve-indexed-arithmetic.ll

 Log Message:
 -----------
 [AArch64] Use SVE for fixed-length bf16 operations with +sve-b16b16 (#169329)

This can avoid the promotion bf16 -> f32 -> bf16 round trip (or costly
expansions).


 Commit: 965c3d760de35753d97d41c6b69582cecff8819d
 https://github.com/llvm/llvm-project/commit/965c3d760de35753d97d41c6b69582cecff8819d
 Author: Lukas Döllerer <contact at lukas-doellerer.de>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 A lld/test/wasm/wrap_import.s
 M lld/wasm/Driver.cpp
 M lld/wasm/SyntheticSections.cpp

 Log Message:
 -----------
 [lld][WebAssembly] Fix SEGFAULT when importing wrapped symbol (#169656)

When wrapping a symbol `foo` via `-wrap=foo`, we create the symbol
`__wrap_foo` that replaces all mentions of `foo`. This feature was
implemented for wasm-ld in commit a5ca34e.

So far, no valid signature has been attached to the undefined symbol,
leading to a nullptr dereference in the logic for creating the import
section. This change adds the correct signature to the wrapped symbol,
enabling the generation of an import for it.


 Commit: a1f30c24ea2cf7d3acdd0f6eed19f737ae26b0d2
 https://github.com/llvm/llvm-project/commit/a1f30c24ea2cf7d3acdd0f6eed19f737ae26b0d2
 Author: Deric C. <cheung.deric at gmail.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/test/CodeGen/DirectX/CBufferAccess/gep-ce-two-uses.ll

 Log Message:
 -----------
 [NFC] [DirectX] Update DirectX codegen test `CBufferAccess/gep-ce-two-uses.ll` due to changes to ReplaceConstant (#169848)

Fixes an LLVM DirectX codegen test after it broke due to #169141

The CBuffer loads and GEPs are no longer duplicated when there are two
or more accesses within the same basic block.
This PR removes the duplicate check for CBuffer load and GEP from the
original test function `@f` and adds a new test function `@g` which
places duplicate CBuffer loads into separate basic blocks.


 Commit: d39f5243f8df23392e1c493f7d607cd0074222b9
 https://github.com/llvm/llvm-project/commit/d39f5243f8df23392e1c493f7d607cd0074222b9
 Author: Lei Huang <lei at ca.ibm.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
 M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
 M llvm/lib/Target/PowerPC/MCTargetDesc/PPCFixupKinds.h
 M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
 M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
 M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
 M llvm/lib/Target/PowerPC/PPCInstrFuture.td
 M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
 M llvm/test/MC/Disassembler/PowerPC/ppc-encoding-ISAFuture.txt
 M llvm/test/MC/Disassembler/PowerPC/ppc64le-encoding-ISAFuture.txt
 M llvm/test/MC/PowerPC/ppc-encoding-ISAFuture.s
 M llvm/test/MC/PowerPC/ppc64-errors.s

 Log Message:
 -----------
 [PowerPC] Implement paddis (#161572)


 Commit: ad605bdad7bb36bc74b9fa5f8b3786081dac4ec6
 https://github.com/llvm/llvm-project/commit/ad605bdad7bb36bc74b9fa5f8b3786081dac4ec6
 Author: Alexey Moksyakov <moksyakov.alexey at huawei.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M bolt/include/bolt/Core/MCPlusBuilder.h
 M bolt/lib/Passes/Instrumentation.cpp
 M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
 M bolt/runtime/instr.cpp
 M bolt/runtime/sys_aarch64.h
 M bolt/test/runtime/AArch64/instrumentation-ind-call.c

 Log Message:
 -----------
 [bolt][aarch64] Change indirect call instrumentation snippet

Indirect call instrumentation snippet uses x16 register in exit
handler to go to destination target

 __bolt_instr_ind_call_handler_func:
 msr nzcv, x1
 ldp x0, x1, [sp], llvm#16
 ldr x16, [sp], llvm#16
 ldp x0, x1, [sp], llvm#16
 br x16	<-----

This patch adds the instrumentation snippet by calling instrumentation
runtime library through indirect call instruction and adding the wrapper
to store/load target value and the register for original indirect instruction.

Example:
 mov x16, foo

 infirectCall:
 adrp x8, Label
 add x8, x8, #:lo12:Label
 blr x8

Before:

 Instrumented indirect call:
 stp x0, x1, [sp, #-16]!
 mov x0, x8
 movk x1, #0x0, lsl llvm#48
 movk x1, #0x0, lsl llvm#32
 movk x1, #0x0, lsl llvm#16
 movk x1, #0x0
 stp x0, x1, [sp, #-16]!
 adrp x0, __bolt_instr_ind_call_handler_func
 add x0, x0, #:lo12:__bolt_instr_ind_call_handler_func
 blr x0

 __bolt_instr_ind_call_handler: (exit snippet)
 msr nzcv, x1
 ldp x0, x1, [sp], llvm#16
 ldr x16, [sp], llvm#16
 ldp x0, x1, [sp], llvm#16
 br x16 <- overwrites the original value in X16

 __bolt_instr_ind_call_handler_func: (entry snippet)
 stp x0, x1, [sp, #-16]!
 mrs x1, nzcv
 adrp x0, __bolt_instr_ind_call_handler
 add x0, x0, x0, #:lo12:__bolt_instr_ind_call_handler
 ldr x0, [x0]
 cmp x0, #0x0
 b.eq __bolt_instr_ind_call_handler
 str x30, [sp, #-16]!
 blr x0 <--- runtime lib store/load all regs
 ldr x30, [sp], llvm#16
 b __bolt_instr_ind_call_handler

_________________________________________________________________________

After:

 mov x16, foo
 infirectCall:
 adrp x8, Label
 add x8, x8, #:lo12:Label
 blr x8

 Instrumented indirect call:
 stp x0, x1, [sp, #-16]!
 mov x0, x8
 movk x1, #0x0, lsl llvm#48
 movk x1, #0x0, lsl llvm#32
 movk x1, #0x0, lsl llvm#16
 movk x1, #0x0
 stp x0, x30, [sp, #-16]!
 adrp x8, __bolt_instr_ind_call_handler_func
 add x8, x8, #:lo12:__bolt_instr_ind_call_handler_func
 blr x8 <--- call trampoline instr lib
 ldp x0, x30, [sp], llvm#16
 mov x8, x0 <---- restore original target
 ldp x0, x1, [sp], llvm#16
 blr x8 <--- original indirect call instruction

 // don't touch regs besides x0, x1
 __bolt_instr_ind_call_handler: (exit snippet)
 ret <---- return to original function with indirect call

 __bolt_instr_ind_call_handler_func: (entry snippet)
 adrp x0, __bolt_instr_ind_call_handler
 add x0, x0, #:lo12:__bolt_instr_ind_call_handler
 ldr x0, [x0]
 cmp x0, #0x0
 b.eq __bolt_instr_ind_call_handler
 str x30, [sp, #-16]!
 blr x0 <--- runtime lib store/load all regs
 ldr x30, [sp], llvm#16
 b __bolt_instr_ind_call_handler


 Commit: 2e655c23deec6076f0198fafbe5c2b1deb6d5b98
 https://github.com/llvm/llvm-project/commit/2e655c23deec6076f0198fafbe5c2b1deb6d5b98
 Author: Amr Hesham <amr96 at programmer.net>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
 M clang/include/clang/CIR/Dialect/IR/CIROps.td
 M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
 A clang/test/CIR/IR/try-call.cir

 Log Message:
 -----------
 [CIR] Upstream TryCallOp (#165303)

Upstream TryCall Op as a prerequisite for Try Catch work

Issue https://github.com/llvm/llvm-project/issues/154992


 Commit: 8f36135aea5dfbb5f090ca9ad055094c9913f735
 https://github.com/llvm/llvm-project/commit/8f36135aea5dfbb5f090ca9ad055094c9913f735
 Author: Florian Hahn <flo at fhahn.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
 M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h

 Log Message:
 -----------
 [VPlan] Add m_Intrinsic matcher that takes a variable intrinsic ID (NFC)

Add a variant of m_Intrinsic that matches a variable runtime ID.


 Commit: 07d14cb6d3e0319b4f95bfaca1502c4a8dc02910
 https://github.com/llvm/llvm-project/commit/07d14cb6d3e0319b4f95bfaca1502c4a8dc02910
 Author: owenca <owenpiano at gmail.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M clang/lib/Format/UnwrappedLineParser.cpp
 M clang/lib/Format/UnwrappedLineParser.h

 Log Message:
 -----------
 [clang-format][NFC] Remove the parameter of parseRequires...() (#169773)


 Commit: 8459508227dd30ce32f870fbc9109fe95d51f4db
 https://github.com/llvm/llvm-project/commit/8459508227dd30ce32f870fbc9109fe95d51f4db
 Author: Florian Hahn <flo at fhahn.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
 M llvm/test/Transforms/LoopVectorize/RISCV/pointer-induction.ll

 Log Message:
 -----------
 [VPlan] Handle scalar VPWidenPointerInd in convertToConcreteRecipes. (#169338)

In some case, VPWidenPointerInductions become only used by scalars after
legalizeAndOptimizationInducftions was already run, for example due to
some VPlan optimizations.

Move the code to scalarize VPWidenPointerInductions to a helper and use
it if needed.

This fixes a crash after #148274 in the added test case.

Fixes https://github.com/llvm/llvm-project/issues/169780


 Commit: 06c8ee61ab80305be88380e6aa2f1b2fe32f859d
 https://github.com/llvm/llvm-project/commit/06c8ee61ab80305be88380e6aa2f1b2fe32f859d
 Author: Deric C. <cheung.deric at gmail.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M llvm/test/CodeGen/DirectX/CBufferAccess/gep-ce-two-uses.ll

 Log Message:
 -----------
 [NFC] [DirectX] Make DirectX codegen test `CBufferAccess/gep-ce-two-uses.ll` more strict (#169855)

Continuation of PR #169848 to address PR comments.

This PR makes the test more strict by adding CHECKs to ensure the loads
are indeed using the same or different GEPs.


 Commit: 583fba35247d8ffc87e0df9f9eb49ab02ea3bb8e
 https://github.com/llvm/llvm-project/commit/583fba35247d8ffc87e0df9f9eb49ab02ea3bb8e
 Author: actink <actink at 163.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
 M llvm/test/Transforms/InstCombine/icmp-select.ll

 Log Message:
 -----------
 [InstCombine] fold icmp of select with invertible shl (#147182)

Proof: https://alive2.llvm.org/ce/z/a5fzlJ
Closes https://github.com/llvm/llvm-project/issues/146642

---------

Co-authored-by: Yingwei Zheng <dtcxzyw at qq.com>


 Commit: aa2a7f4eb1b130e9e41d9a87bffcaa47876a97fc
 https://github.com/llvm/llvm-project/commit/aa2a7f4eb1b130e9e41d9a87bffcaa47876a97fc
 Author: Mr. Walls <reactive-firewall at users.noreply.github.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M libcxx/include/__locale_dir/support/linux.h

 Log Message:
 -----------
 [libc++] Fix the locale base API on Linux with musl (#167980)

This pull request addresses an issue encountered when building
**libcxx** with certain configurations (`-D_LIBCPP_HAS_MUSL_LIBC` &
`-D__linux__`) that lack the `_GNU_SOURCE` definition. Specifically,
this issue arises if the system **musl libc** is built with
`_BSD_SOURCE` instead of `_GNU_SOURCE`. The resultant configuration
leads to problems with the "Strtonum functions" in the file
[libcxx/include/__locale_dir/support/linux.h](https://github.com/llvm/llvm-project/tree/master/libcxx/include/__locale_dir/support/linux.h),
affecting the following functions:

- `__strtof`
- `__strtod`
- `__strtold`

**Error messages displayed include**:
```console
error: no member named 'strtof_l' in the global namespace
```
```console
error: no member named 'strtod_l' in the global namespace
```
```console
error: no member named 'strtold_l' in the global namespace
```

For more insight, relevant code can be accessed
[here](https://github.com/llvm/llvm-project/blob/79cd1b7a25cdbf42c7234999ae9bc51db30af1f0/libcxx/include/__locale_dir/support/linux.h#L85-L95).


 Commit: 6f7ea34933649d16845b1635d1e97f9ccb35ffea
 https://github.com/llvm/llvm-project/commit/6f7ea34933649d16845b1635d1e97f9ccb35ffea
 Author: Zaky Hermawan <44158147+ZakyHermawan at users.noreply.github.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/docs/GettingInvolved.rst
 M llvm/docs/QualGroup.rst

 Log Message:
 -----------
 [QualGroup][docs] Update meeting schedule and link for slides (#169458)

Summary
======
This PR update the schedule for online sync-up and update link for past
meeting slides.

Changes
======
* Remove the wednesday schedule, since we did not have the meeting for
Americas-friendly timezones.
* Use a single folder for past meeting slides instead of individual
links.

Related Links
=========
* [Meeting materials for Qualification Working
Group](https://llvm.org/docs/QualGroup.html#meeting-materials)
* [Online
Sync-Ups](https://llvm.org/docs/GettingInvolved.html#online-sync-ups)

---------

Signed-off-by: ZakyHermawan <zaky.hermawan9615 at gmail.com>


 Commit: b14291238a987675b1fb39938efc938afcab8446
 https://github.com/llvm/llvm-project/commit/b14291238a987675b1fb39938efc938afcab8446
 Author: Matthias Springer <me at m-sp.org>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M mlir/include/mlir/Conversion/LLVMCommon/VectorPattern.h
 M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
 M mlir/lib/Conversion/LLVMCommon/VectorPattern.cpp
 M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir

 Log Message:
 -----------
 [mlir][arith] Fix `arith.cmpf` lowering with unsupported FP types (#166684)

The `arith.cmpf` lowering pattern used to generate invalid IR when an
unsupported floating-point type was used.


 Commit: 0c6d7a40187e5e6cbdff1cf5dbdb6fe91054bef4
 https://github.com/llvm/llvm-project/commit/0c6d7a40187e5e6cbdff1cf5dbdb6fe91054bef4
 Author: Owen Anderson <resistor at mac.com>
 Date: 2025-11-27 (Thu, 27 Nov 2025)

 Changed paths:
 M lld/ELF/Arch/RISCV.cpp
 A lld/ELF/Arch/RISCVInternalRelocations.h
 M lld/ELF/Target.cpp
 M lld/test/ELF/riscv-vendor-relocations.s

 Log Message:
 -----------
 [LLD] Add support for statically resolved vendor-specific RISCV relocations. (#169273)

This is achieved by using some of the bits of RelType to tag vendor namespaces. This change also adds a relocation iterator for RISCV that folds vendor namespaces into the RelType of the following relocation.

This patch is extracted from the implementation of RISCV vendor-specific relocations in the CHERIoT LLVM downstream: https://github.com/CHERIoT-Platform/llvm-project/commit/3d6d6f7d9480b590731cbcf4b4817e1fa3049854


 Commit: f40c69471331e18176c01d08161f2e51ab7367cb
 https://github.com/llvm/llvm-project/commit/f40c69471331e18176c01d08161f2e51ab7367cb
 Author: Shih-Po Hung <shihpo.hung at sifive.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/include/llvm/Analysis/TargetTransformInfo.h
 M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
 M llvm/include/llvm/CodeGen/BasicTTIImpl.h
 M llvm/lib/Analysis/TargetTransformInfo.cpp
 M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
 M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h

 Log Message:
 -----------
 [TTI] Use MemIntrinsicCostAttributes for getExpandCompressMemoryOpCost (#168677)

- Following #168029. This is a step toward a unified interface for
masked/gather-scatter/strided/expand-compress cost modeling.
- Replace the ad-hoc parameter list with a single attributes object.

API change:
```
- InstructionCost getExpandCompressMemoryOpCost(Opcode, DataTy,
- VariableMask, Alignment,
- CostKind, Inst);

+ InstructionCost getExpandCompressMemoryOpCost(MemIntrinsicCostAttributes,
+ CostKind);
```

Notes:
- NFCI intended: callers populate MemIntrinsicCostAttributes with same
information as before.


 Commit: b9bdec302124bc1c40c0f0c02d096b541b013518
 https://github.com/llvm/llvm-project/commit/b9bdec302124bc1c40c0f0c02d096b541b013518
 Author: Shih-Po Hung <shihpo.hung at sifive.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/include/llvm/Analysis/TargetTransformInfo.h
 M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
 M llvm/include/llvm/CodeGen/BasicTTIImpl.h
 M llvm/lib/Analysis/TargetTransformInfo.cpp
 M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
 M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
 M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp

 Log Message:
 -----------
 [TTI][Vectorize] Migrate masked/gather-scatter/strided/expand-compress costing (NFCI) (#165532)

In #160470, there is a discussion about the possibility to explored a
general approach for handling memory intrinsics.

API changes:
- Remove getMaskedMemoryOpCost, getGatherScatterOpCost,
getExpandCompressMemoryOpCost, getStridedMemoryOpCost from
Analysis/TargetTransformInfo.
- Add getMemIntrinsicInstrCost.

In BasicTTIImpl, map intrinsic IDs to existing target implementation
until the legacy TTI hooks are retired.
- masked_load/store → getMaskedMemoryOpCost
- masked_/vp_gather/scatter → getGatherScatterOpCost
- masked_expandload/compressstore → getExpandCompressMemoryOpCost
- experimental_vp_strided_{load,store} → getStridedMemoryOpCost
TODO: add support for vp_load_ff.

No functional change intended; costs continue to route to the same
target-specific hooks.


 Commit: f342d793e20f52625d400872f6f299b36d9c6826
 https://github.com/llvm/llvm-project/commit/f342d793e20f52625d400872f6f299b36d9c6826
 Author: Sergei Barannikov <barannikov88 at gmail.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/lib/Target/ARM/ARMInstrCDE.td
 M llvm/lib/Target/ARM/ARMInstrFormats.td
 M llvm/lib/Target/ARM/ARMInstrThumb.td
 M llvm/lib/Target/ARM/ARMInstrThumb2.td
 M llvm/lib/Target/ARM/CMakeLists.txt
 M llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
 M llvm/utils/gn/secondary/llvm/lib/Target/ARM/Disassembler/BUILD.gn
 M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel

 Log Message:
 -----------
 [ARM] Auto-decode pred operands of Thumb instructions (#156540)

Most predicable Thumb instructions do not encode the predicate operand,
but rather take it from an enclosing IT block.
Add `bits<0> p` to the encoding of these instructions to make the
predicate operand decodable by the generated code.

The previous approach was to analyze an instruction after it has been
decoded and add missing predicate operand if necessary. The
post-decoding pass is still required to check predicate applicability
and advance IT block state, but it no longer modifies a decoded
instruction.

Some of the custom decoder methods have become redundant and can be
removed in the future, delegating the decoding task to TableGen-erated
decoder.

Pull Request: https://github.com/llvm/llvm-project/pull/156540


 Commit: 1100917aed67c063c9d011cb16f67be5df25c732
 https://github.com/llvm/llvm-project/commit/1100917aed67c063c9d011cb16f67be5df25c732
 Author: Mahesh-Attarde <mahesh.attarde at intel.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/lib/Target/X86/X86ExpandPseudo.cpp
 M llvm/lib/Target/X86/X86ISelLowering.cpp
 M llvm/lib/Target/X86/X86InstrAMX.td
 M llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_print.txt
 M llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_wo=0.5_print.txt

 Log Message:
 -----------
 [AMX][NFC] Organize tilerow (#168193)

Organizing tilerow for an extension.

---------

Co-authored-by: mattarde <mattarde at intel.com>


 Commit: 1e7efca659cdf37a95e27e35fa002d340ea68b32
 https://github.com/llvm/llvm-project/commit/1e7efca659cdf37a95e27e35fa002d340ea68b32
 Author: Carson Radtke <nosrac925 at gmail.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M clang/docs/ReleaseNotes.rst
 M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
 M clang/test/SemaTemplate/attributes.cpp

 Log Message:
 -----------
 [clang] fix crash when template with constructor attribute is instantiated without a priority (#169282)

fixes: https://github.com/llvm/llvm-project/issues/169072

The current implementation expects the priority argument to be provided
to `[[gnu::constructor(<priority>)]]`, but the argument is really
optional. This was causing a segfault when instantiating the
function-template because we were trying to fold an `Expr*` that was a
nullptr.

This change skips the evaluation of the priority argument when it is
missing; this will instantiate a function declaration with the default
priority (65535).


 Commit: bd0769ef869a1341e8122978e1eafc78c5f3d312
 https://github.com/llvm/llvm-project/commit/bd0769ef869a1341e8122978e1eafc78c5f3d312
 Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
 M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
 M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
 M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
 M llvm/test/CodeGen/LoongArch/lasx/rotl-rotr.ll
 M llvm/test/CodeGen/LoongArch/lsx/rotl-rotr.ll

 Log Message:
 -----------
 [LoongArch] Make rotl/rotr custom for lsx/lasx (#161154)


 Commit: 1cea4a0841dacefa49241538a55fbf4f34462633
 https://github.com/llvm/llvm-project/commit/1cea4a0841dacefa49241538a55fbf4f34462633
 Author: Prasoon Mishra <Prasoon.Mishra at amd.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

 Log Message:
 -----------
 [AMDGPU][NPM] Fix CFG invalidation detection in insertSimulatedTrap (#169290)

When SIMULATED_TRAP is at the end of a block with no successors,
insertSimulatedTrap incorrectly returns the original MBB despite adding
HaltLoopBB to the CFG.

EmitInstrWithCustomInserter detects CFG changes by comparing the
returned MBB with the original. When they match, it assumes no
modification occurred and skips MachineLoopInfo invalidation. This
causes stale loop information in subsequent passes, particularly when
using the NPM which relies on accurate invalidation signals.

Fix: Return HaltLoopBB to properly signal the CFG modification.


 Commit: cc9d3f29eca70394eb9e8f1d8e7fb08bce60f61f
 https://github.com/llvm/llvm-project/commit/cc9d3f29eca70394eb9e8f1d8e7fb08bce60f61f
 Author: Ryan Cowan <ryan.cowan at arm.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AArch64/AArch64InstrGISel.td
 M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
 M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h
 M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
 M llvm/test/CodeGen/AArch64/arm64-fp128.ll
 M llvm/test/CodeGen/AArch64/fp16-v4-instructions.ll
 M llvm/test/CodeGen/AArch64/fp16-v8-instructions.ll
 M llvm/test/CodeGen/AArch64/fptrunc.ll

 Log Message:
 -----------
 [AArch64][GlobalISel] Improve lowering of vector fp16 fptrunc (#163398)

This commit improves the lowering of vectors of fp16 when truncating and
(previously) extending. Truncating has to be handled in a specific way
to avoid double rounding.


 Commit: e5d229dc61bbcff3d647374f7583819026eeb78b
 https://github.com/llvm/llvm-project/commit/e5d229dc61bbcff3d647374f7583819026eeb78b
 Author: Jack Styles <jack.styles at arm.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M flang/docs/OpenMPSupport.md

 Log Message:
 -----------
 [Flang][OpenMP] Update OpenMPSupport docs (#169833)

After the merging of #152736, there are a number of OpenMP Features that
are now fully supported. Missing from the initial patch was changing the
status of this from `P` to `Y` to indicate they are now fully supported.
The notes around not supporting `dist_schedule` were removed in the
initial patch.


 Commit: b27af83120b32a4b8312ddf1e6317271122769e4
 https://github.com/llvm/llvm-project/commit/b27af83120b32a4b8312ddf1e6317271122769e4
 Author: Antonio Frighetto <me at antoniofrighetto.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Scalar/IndVarSimplify.cpp

 Log Message:
 -----------
 [IndVarSimplify] Refactor `handleFloatingPointIV`, modernize pass (NFC)

`handleFloatingPointIV` is now abstracted out into different routines,
particularly:
- `maybeFloatingPointRecurrence` which establishes whether we handle a
 floating-point iv recurrence;
- `tryConvertToIntegerIV` which attempts to convert the fp start, step
 and exit values into integer ones;
- `canonicalizeToIntegerIV` which rewrites the recurrence.

Minor opportunity to modernize the code where possible.


 Commit: 26b82e5b8248335ae7b9db76a7da9dd0587d5baa
 https://github.com/llvm/llvm-project/commit/26b82e5b8248335ae7b9db76a7da9dd0587d5baa
 Author: Nikolas Klauser <nikolasklauser at berlin.de>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M libcxx/include/__locale_dir/support/linux.h

 Log Message:
 -----------
 Revert "[libc++] Fix the locale base API on Linux with musl" (#169884)

The patch has been committed without approval from the libc++ review
group and is implementing the locale base API in a way it wasn't
intended to be implemented. The commit also contains a no-reply github
E-Mail, which is in conflict with the LLVM developer policy.

Reverts llvm/llvm-project#167980


 Commit: 9bffb10e8b77b00033f2e997731193f81676cd60
 https://github.com/llvm/llvm-project/commit/9bffb10e8b77b00033f2e997731193f81676cd60
 Author: Gergely Bálint <gergely.balint at arm.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M bolt/lib/Passes/Inliner.cpp
 R bolt/test/AArch64/inline-bti.s

 Log Message:
 -----------
 Revert "[BOLT][BTI] Skip inlining BasicBlocks containing indirect tailcalls" (#169881)

Reverts llvm/llvm-project#168403

The attached lit test is failing in some build configurations.


 Commit: 3ebe99f4c211322d7e7db5e0547cb0940ed54cd8
 https://github.com/llvm/llvm-project/commit/3ebe99f4c211322d7e7db5e0547cb0940ed54cd8
 Author: lbonn <github at lbonnans.net>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M libcxx/include/__algorithm/find.h
 M libcxx/test/benchmarks/algorithms/nonmodifying/find.bench.cpp

 Log Message:
 -----------
 [libcxx] Unwrap iterators in __find_segment (#161274)

The segmented iterator optimized implementation of find now unwraps
iterators when processing each segments.

As a result, it is able to take better advantage to some find
specializations: calling memchr/wmemchr for vector<vector<{char,int}>>

```
Benchmark Baseline Candidate Difference % Difference
-------------------------------------------------------------- ---------- ----------- ------------ --------------
rng::find(join_view(deque<deque<int>>))_(process_all)/1024 71.13 61.19 -9.94 -13.97
rng::find(join_view(deque<deque<int>>))_(process_all)/32768 2359.19 2237.02 -122.17 -5.18
rng::find(join_view(deque<deque<int>>))_(process_all)/50 16.88 17.59 0.71 4.20
rng::find(join_view(deque<deque<int>>))_(process_all)/8 15.59 16.10 0.51 3.27
rng::find(join_view(deque<deque<int>>))_(process_all)/8192 647.01 532.75 -114.26 -17.66
rng::find(join_view(list<vector<int>>))_(process_all)/1024 689.76 680.74 -9.02 -1.31
rng::find(join_view(list<vector<int>>))_(process_all)/32768 22284.95 21500.26 -784.69 -3.52
rng::find(join_view(list<vector<int>>))_(process_all)/50 32.77 32.12 -0.65 -1.98
rng::find(join_view(list<vector<int>>))_(process_all)/8 6.11 5.92 -0.19 -3.11
rng::find(join_view(list<vector<int>>))_(process_all)/8192 5527.88 5373.43 -154.45 -2.79
rng::find(join_view(vector<list<int>>))_(process_all)/1024 1305.59 1264.04 -41.55 -3.18
rng::find(join_view(vector<list<int>>))_(process_all)/32768 42840.88 43322.64 481.76 1.12
rng::find(join_view(vector<list<int>>))_(process_all)/50 57.52 62.35 4.82 8.38
rng::find(join_view(vector<list<int>>))_(process_all)/8 6.06 5.98 -0.07 -1.18
rng::find(join_view(vector<list<int>>))_(process_all)/8192 20700.53 21431.66 731.12 3.53
rng::find(join_view(vector<vector<char>>))_(process_all)/1024 310.64 18.34 -292.30 -94.09
rng::find(join_view(vector<vector<char>>))_(process_all)/32768 9424.96 531.99 -8892.97 -94.36
rng::find(join_view(vector<vector<char>>))_(process_all)/50 18.58 3.25 -15.32 -82.49
rng::find(join_view(vector<vector<char>>))_(process_all)/8 4.81 2.98 -1.84 -38.13
rng::find(join_view(vector<vector<char>>))_(process_all)/8192 2437.50 126.88 -2310.62 -94.79
rng::find(join_view(vector<vector<int>>))_(process_all)/1024 297.10 41.70 -255.39 -85.96
rng::find(join_view(vector<vector<int>>))_(process_all)/32768 9662.42 1822.05 -7840.36 -81.14
rng::find(join_view(vector<vector<int>>))_(process_all)/50 22.29 5.10 -17.19 -77.11
rng::find(join_view(vector<vector<int>>))_(process_all)/8 3.73 3.13 -0.60 -16.05
rng::find(join_view(vector<vector<int>>))_(process_all)/8192 2399.68 356.10 -2043.58 -85.16
```


 Commit: 8bfca268ba57dcfc977a7f1d4cc6f563bb9be67a
 https://github.com/llvm/llvm-project/commit/8bfca268ba57dcfc977a7f1d4cc6f563bb9be67a
 Author: Miguel Saldivar <saldivarcher at gmail.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M flang-rt/lib/runtime/extensions.cpp
 M flang/docs/Intrinsics.md
 M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
 M flang/include/flang/Optimizer/Builder/Runtime/Intrinsics.h
 M flang/include/flang/Runtime/extensions.h
 M flang/lib/Evaluate/intrinsics.cpp
 M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
 M flang/lib/Optimizer/Builder/Runtime/Intrinsics.cpp
 A flang/test/Lower/Intrinsics/flush.f90

 Log Message:
 -----------
 [flang] Support FLUSH as an intrinsic subroutine (#165942)

Previously `FLUSH` was only recognized in statement form (e.g.
`flush(unit)`); a
subroutine invocation `call flush(unit)` was treated as a generic user
call with
no special semantics. This change teaches lowering/semantics to handle
`CALL FLUSH` equivalently.

Fixes #119418


 Commit: a7c85052ebe7813da50cd461fdccccacb296017a
 https://github.com/llvm/llvm-project/commit/a7c85052ebe7813da50cd461fdccccacb296017a
 Author: Kirill Vedernikov <kvedernikov at nvidia.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
 M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
 A mlir/test/Dialect/LLVMIR/nvvm-mma-sp-kind.mlir
 A mlir/test/Dialect/LLVMIR/nvvm-mma-sp-ordered.mlir
 A mlir/test/Dialect/LLVMIR/nvvm-mma-sp.mlir

 Log Message:
 -----------
 [MLIR] Supported sparse MMA intrinsics in the MLIR->NVVM IR->NVPTX flow (#168686)

This change adds sparse MMA intrinsics to the MLIR -> NVVM IR -> NVPTX
flow. NVVM and NVPTX implementation is based on PTX ISA 9.0.


 Commit: f54c6b4306a3f92c08aeb8a9fa222b88985cb9ef
 https://github.com/llvm/llvm-project/commit/f54c6b4306a3f92c08aeb8a9fa222b88985cb9ef
 Author: Antonio Frighetto <me at antoniofrighetto.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Scalar/IndVarSimplify.cpp

 Log Message:
 -----------
 [IndVarSimplify] Bail out if not a branch in `maybeFloatingPointRecurrence`

clang-riscv-gauntlet buildbot was previously failing. Conservatively
bail out if not handling a branch when looking for floating-point
recurrences, we may wish to support select and branch in the future.

Fixes: https://lab.llvm.org/buildbot/#/builders/210/builds/5908.


 Commit: 135ddf1e8efef7c8ac9b01caa660210e3ca12327
 https://github.com/llvm/llvm-project/commit/135ddf1e8efef7c8ac9b01caa660210e3ca12327
 Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
 M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
 M llvm/lib/Target/AArch64/AArch64ISelLowering.h
 M llvm/lib/Target/AArch64/AArch64InstrInfo.td
 M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
 A llvm/test/CodeGen/AArch64/sve-masked-compressstore-sve2p2.ll
 A llvm/test/CodeGen/AArch64/sve-masked-compressstore.ll

 Log Message:
 -----------
 [AArch64][SVE] Add basic support for `@llvm.masked.compressstore` (#168350)

This patch adds SVE support for the `masked.compressstore` intrinsic via
the existing `VECTOR_COMPRESS` lowering and compressing the store mask
via `VECREDUCE_ADD`.

Currently, only `nxv4[i32|f32]` and `nxv2[i64|f64]` are directly
supported, with other types promoted to these, where possible.

This is done in preparation for LV support of this intrinsic, which is
currently being worked on in #140723.


 Commit: b76089c7f3d6593d2e2c83db7dbf4965b656bd8c
 https://github.com/llvm/llvm-project/commit/b76089c7f3d6593d2e2c83db7dbf4965b656bd8c
 Author: Florian Hahn <flo at fhahn.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
 M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
 M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
 A llvm/test/Transforms/LoopVectorize/AArch64/widen-gep-all-indices-invariant.ll
 M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
 M llvm/test/Transforms/LoopVectorize/X86/cost-conditional-branches.ll
 M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
 M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
 M llvm/test/Transforms/LoopVectorize/cse-casts.ll
 M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
 M llvm/test/Transforms/LoopVectorize/narrow-to-single-scalar.ll
 M llvm/test/Transforms/LoopVectorize/pr43166-fold-tail-by-masking.ll
 M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
 M llvm/test/Transforms/LoopVectorize/predicatedinst-loop-invariant.ll
 M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
 M llvm/test/Transforms/LoopVectorize/trunc-shifts.ll

 Log Message:
 -----------
 [VPlan] Skip uses-scalars restriction if one of ops needs broadcast. (#168246)

Update the logic in narrowToSingleScalar to allow narrowing even if not
all users use scalars, if at least one of the operands already needs
broadcasting.

In that case, there won't be any additional broadcasts introduced. This
should allow removing the special handling for stores, which can
introduce additional broadcasts currently.

Fixes https://github.com/llvm/llvm-project/issues/169668.

PR: https://github.com/llvm/llvm-project/pull/168246


 Commit: 310211cce5155af2e41da48c461f80cb4ab9000b
 https://github.com/llvm/llvm-project/commit/310211cce5155af2e41da48c461f80cb4ab9000b
 Author: Matthias Springer <me at m-sp.org>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M mlir/include/mlir/Dialect/UB/IR/UBOps.td
 M mlir/lib/Conversion/UBToLLVM/UBToLLVM.cpp
 M mlir/lib/Conversion/UBToSPIRV/UBToSPIRV.cpp
 M mlir/test/Conversion/UBToLLVM/ub-to-llvm.mlir
 M mlir/test/Conversion/UBToSPIRV/ub-to-spirv.mlir
 M mlir/test/Dialect/UB/ops.mlir

 Log Message:
 -----------
 [mlir][UB] Add `ub.unreachable` operation (#169872)

Add `ub.unreachable` operation and lowerings to LLVM/SPIRV.

---------

Co-authored-by: Mehdi Amini <joker.eph at gmail.com>


 Commit: 6c0d5aad7fa8756221a415fc3bf2bb6c7bf974f6
 https://github.com/llvm/llvm-project/commit/6c0d5aad7fa8756221a415fc3bf2bb6c7bf974f6
 Author: Simon Pilgrim <llvm-dev at redking.me.uk>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M clang/lib/AST/ExprConstant.cpp
 M clang/test/CodeGen/X86/avx512vlbw-builtins.c

 Log Message:
 -----------
 [X86] ExprConstant - correctly detect __builtin_ia32_ucmpw* builtins as unsigned comparisons (#169891)

Fixes typo from #164026


 Commit: e81d9dfba11710f6197301be76336b3e380d9e33
 https://github.com/llvm/llvm-project/commit/e81d9dfba11710f6197301be76336b3e380d9e33
 Author: Carlos Galvez <carlosgalvezp at gmail.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M clang-tools-extra/docs/clang-tidy/checks/bugprone/switch-missing-default-case.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-capturing-lambda-coroutines.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-const-or-ref-data-members.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-do-while.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-non-const-global-variables.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-reference-coroutine-parameters.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/init-variables.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/interfaces-global-init.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/missing-std-forward.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/no-malloc.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/no-suspend-with-lock.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/owning-memory.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-bounds-array-to-pointer-decay.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-bounds-avoid-unchecked-container-access.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-bounds-constant-array-index.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-bounds-pointer-arithmetic.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-const-cast.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-cstyle-cast.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-member-init.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-reinterpret-cast.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-static-cast-downcast.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-union-access.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-vararg.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/special-member-functions.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/use-default-member-init.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/use-enum-class.rst
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/virtual-class-destructor.rst
 M clang-tools-extra/docs/clang-tidy/checks/readability/magic-numbers.rst

 Log Message:
 -----------
 [clang-tidy][doc] Fix broken CppCoreGuidelines links (#169886)

They recently changed all their anchors to start with lowercase:
https://github.com/isocpp/CppCoreGuidelines/pull/2304

So now our links are broken :) This patch fixes them.

Co-authored-by: Carlos Gálvez <carlos.galvez at zenseact.com>


 Commit: 4fd472c5c06ad4f708b288cd205c9b534438dc74
 https://github.com/llvm/llvm-project/commit/4fd472c5c06ad4f708b288cd205c9b534438dc74
 Author: mitchell <mitchell.xu2 at gmail.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M clang-tools-extra/docs/clang-tidy/checks/bugprone/signal-handler.rst
 M clang-tools-extra/docs/clang-tidy/checks/misc/use-internal-linkage.rst

 Log Message:
 -----------
 [clang-tidy][NFC] Fix option highlighting and list style in documentation (#169874)

The related discussion can be found at:
https://github.com/llvm/llvm-project/pull/168324#discussion_r2569455701


 Commit: 1ab64e4d5f4a09846c8ab31528a3719a953650f4
 https://github.com/llvm/llvm-project/commit/1ab64e4d5f4a09846c8ab31528a3719a953650f4
 Author: Nikolas Klauser <nikolasklauser at berlin.de>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M libcxx/test/benchmarks/containers/string.bench.cpp

 Log Message:
 -----------
 [libc++][NFC] Simplify string.bench.cpp a bit (#169791)

This removes some dead code and simplifies an expression.


 Commit: 7415a7fc11fd7d4865e2f0e08b378c561aae7a4f
 https://github.com/llvm/llvm-project/commit/7415a7fc11fd7d4865e2f0e08b378c561aae7a4f
 Author: A. Jiang <de34 at live.cn>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M libcxx/include/__functional/weak_result_type.h

 Log Message:
 -----------
 [libc++][NFC] Simplify SFINAE detections in `weak_result_type.h` (#169870)

For `__has_result_type`, it can be replaced with a variable template
`__has_result_type_v`. Note that the pre-existing extraneous `*` used in
detection is buggy, but it's a functional change to fix it.

`false_type` and `true_type` are no longer directly used, so direct
inclusion of `<__type_traits/integral_constant.h>` is removed.

For `__derives_from_{unary,binary}_function`, it's unnecessary to invent
a `__two` type for each specialization. So `void` is used instead. Also,
`nullptr` is now used instead of `0`.


 Commit: 2f56977aea4b76a4d533ba7e4827e13878c4f936
 https://github.com/llvm/llvm-project/commit/2f56977aea4b76a4d533ba7e4827e13878c4f936
 Author: Antonio Frighetto <me at antoniofrighetto.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/test/Transforms/IndVarSimplify/floating-point-iv.ll

 Log Message:
 -----------
 [IndVarSimplify] Add regression test for recently-added refactor (NFC)

Add a test case for commit f54c6b4306a3f92c08aeb8a9fa222b88985cb9ef, which was previously failing after
refactor in b27af83120b32a4b8312ddf1e6317271122769e4.


 Commit: 53ece548f82bbdb72d7ae2a7069a61e9983f1fc0
 https://github.com/llvm/llvm-project/commit/53ece548f82bbdb72d7ae2a7069a61e9983f1fc0
 Author: Sebastian Pop <spop at nvidia.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/include/llvm/Analysis/DependenceAnalysis.h
 M llvm/lib/Analysis/DependenceAnalysis.cpp
 M llvm/test/Analysis/DependenceAnalysis/DifferentOffsets.ll
 M llvm/test/Analysis/DependenceAnalysis/MIVCheckConst.ll

 Log Message:
 -----------
 [DA] Simplify runtime predicate collection (#157523)

Removes DependenceInfo::getRuntimeAssumptions(), DependenceInfo::Assumptions,
and the print of "Runtime Assumptions:". The runtime assumptions are still
properly attached to each Dependence result and printed as part of the
per-dependence output.


 Commit: 0085ecaa5e16edbc6426b91f97a85de8e32f962c
 https://github.com/llvm/llvm-project/commit/0085ecaa5e16edbc6426b91f97a85de8e32f962c
 Author: David Green <david.green at arm.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
 M llvm/test/Analysis/CostModel/AArch64/fshl.ll
 M llvm/test/Analysis/CostModel/AArch64/fshr.ll

 Log Message:
 -----------
 [AArch64] Add costs for ROTR and ROTL. (#169335)

A funnel shift with the first two operands is a rotate. AArch64 has
scalar instructions for ror so can handle a ROTR by a constant or
variant amount cheaply. A ROTL is a ROTR by the opposite amount, which
for constants is cheap and for variable shifts requires an extra neg.


 Commit: fb3bf5b5900867f0738162d737e138ebd0228f8c
 https://github.com/llvm/llvm-project/commit/fb3bf5b5900867f0738162d737e138ebd0228f8c
 Author: Charles Zablit <c_zablit at apple.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M lldb/source/Interpreter/ScriptInterpreter.cpp
 M lldb/source/Target/Process.cpp
 M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationClientTest.cpp

 Log Message:
 -----------
 [NFC][lldb][windows] fully qualify references to MemoryRegionInfo (#169845)


 Commit: ae58ae1ca7eda3ae1c2db0f7239d3881b390e99d
 https://github.com/llvm/llvm-project/commit/ae58ae1ca7eda3ae1c2db0f7239d3881b390e99d
 Author: Mehdi Amini <joker.eph at gmail.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M mlir/lib/ExecutionEngine/CudaRuntimeWrappers.cpp

 Log Message:
 -----------
 [MLIR] Apply clang-tidy fixes for misc-use-internal-linkage in CudaRuntimeWrappers.cpp (NFC)


 Commit: a6643f27ecdaaff2945a1acd213a745c1526c525
 https://github.com/llvm/llvm-project/commit/a6643f27ecdaaff2945a1acd213a745c1526c525
 Author: Volodymyr Turanskyy <vturanskyy at gmail.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M libcxx/CMakeLists.txt
 M libcxx/include/__config_site.in
 M libcxx/include/__configuration/platform.h
 M libcxx/include/__cxx03/__fwd/ios.h
 M libcxx/include/__cxx03/__locale
 M libcxx/include/__cxx03/__locale_dir/locale_base_api.h
 M libcxx/include/__cxx03/fstream
 M libcxx/include/__cxx03/locale
 M libcxx/include/__cxx03/regex
 M libcxx/include/__fwd/ios.h
 M libcxx/include/__locale
 M libcxx/include/__locale_dir/messages.h
 M libcxx/include/fstream
 M libcxx/include/regex
 M libcxx/src/include/config_elast.h
 M libcxx/src/locale.cpp
 M libcxx/test/libcxx/system_reserved_names.gen.py
 M libcxx/test/std/diagnostics/syserr/syserr.errcat/syserr.errcat.objects/generic_category.pass.cpp
 M libcxx/test/std/diagnostics/syserr/syserr.errcat/syserr.errcat.objects/system_category.pass.cpp
 M libcxx/test/support/platform_support.h
 M libcxx/utils/ci/run-buildbot
 M runtimes/cmake/Modules/HandleLibC.cmake

 Log Message:
 -----------
 [libc++] Add support for picolibc and newlib in RUNTIMES_USE_LIBC (#147956)

This replaces detection of picolibc in libc++ (by checking for and
including picolibc.h) with using RUNTIMES_USE_LIBC build time option
intriduced in https://github.com/llvm/llvm-project/pull/134893
RUNTIMES_USE_LIBC is extended to accept picolibc and newlib.

Detection of picolibc via the header is kept as a deprecated feature to
avoid breaking builds.

libc++ is updated to use dedicated LIBCXX_LIBC_NEWLIB macro to check for
newlib specific conditions instead of less informative _NEWLIB_VERSION

---------

Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>


 Commit: b5a3b8b704cf7f54531f18966cdcc25f5c4e5044
 https://github.com/llvm/llvm-project/commit/b5a3b8b704cf7f54531f18966cdcc25f5c4e5044
 Author: Paul Walker <paul.walker at arm.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M clang/include/clang/Basic/arm_sve.td
 M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rev.c
 M llvm/include/llvm/IR/IntrinsicsAArch64.td
 M llvm/lib/IR/AutoUpgrade.cpp
 M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
 M llvm/test/Bitcode/aarch64-sve-rev-upgrade.ll

 Log Message:
 -----------
 [LLVM][SVE] Remove aarch64.sve.rev intrinsic, using vector.reverse instead. (#169654)


 Commit: e16cc8ed4636c36fc6e4e95289faf94048ec79b2
 https://github.com/llvm/llvm-project/commit/e16cc8ed4636c36fc6e4e95289faf94048ec79b2
 Author: David Green <david.green at arm.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
 M llvm/test/CodeGen/AArch64/neon-extadd-extract.ll

 Log Message:
 -----------
 [AArch64] Guard for 128bit vectors in mull combine. (#169839)

The test case generates a extract_subvector(index) leading into a mul.
Make sure we don't try and treat the scalable vector extract as a 128bit
vector in the mull combine.

Fixes #168912


 Commit: 14fb59a2c25d2b010ce7b88eb3d201de65e5afed
 https://github.com/llvm/llvm-project/commit/14fb59a2c25d2b010ce7b88eb3d201de65e5afed
 Author: Ebuka Ezike <yerimyah1 at gmail.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 A lldb/test/API/commands/frame/var-dil/expr/PointerArithmetic/TestFrameVarDILExprPointerArithmetic.py
 R lldb/test/API/commands/frame/var-dil/expr/PointerArithmetic/TestFrameVarDILPointerArithmetic.py

 Log Message:
 -----------
 [lldb] Fix duplicate test class name causing lldb-dotest conflict (#169861)

Duplicate test class name `TestFrameVarDILPointerArithmetic` prevents
lldb-dotest from running any tests.
The conflict exists between:
- lldb/test/API/commands/frame/vardil/expr/PointerArithmetic/
- lldb/test/API/commands/frame/vardil/basics/PointerArithmetic/

Rename the expr variant to `TestFrameVarDILExprPointerArithmetic`.


 Commit: e0c600779a742333c74c8603f311e4166d5b9afe
 https://github.com/llvm/llvm-project/commit/e0c600779a742333c74c8603f311e4166d5b9afe
 Author: Asher Dobrescu <asher.dobrescu at gmail.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AArch64/AArch64SchedNeoverseN3.td
 M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-neon-instructions.s

 Log Message:
 -----------
 [AArch64] Fix metrics of ASIMD instructions in Neoverse N3 (#169790)

Some ASIMD instructions in the Neoverse N3 scheduler model seem to have
been missed and have default definitions, which give them incorrect
latency and throughput. This patch fixes such instructions to match the
current N3 SWOG.


 Commit: 9e25a423d07bdcc2686defedcd509fb405d250db
 https://github.com/llvm/llvm-project/commit/9e25a423d07bdcc2686defedcd509fb405d250db
 Author: Matthew Nagy <matthew.nagy at sony.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M clang/lib/Driver/SanitizerArgs.cpp
 M compiler-rt/lib/tysan/CMakeLists.txt
 M compiler-rt/test/ubsan/CMakeLists.txt
 M compiler-rt/test/ubsan/TestCases/Misc/Posix/sigaction.cpp
 M compiler-rt/test/ubsan/TestCases/Misc/coverage-levels.cpp
 M compiler-rt/test/ubsan/lit.common.cfg.py
 M llvm/docs/ReleaseNotes.md

 Log Message:
 -----------
 [TySan] Make TySan compatible with UBSan (#169036)


 Commit: 63163b4ceb2c642dfbcafa066dbef4db0c1a80ab
 https://github.com/llvm/llvm-project/commit/63163b4ceb2c642dfbcafa066dbef4db0c1a80ab
 Author: Dharuni R Acharya <125176188+DharuniRAcharya at users.noreply.github.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
 M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
 A mlir/test/Target/LLVMIR/nvvm/permute_invalid.mlir
 A mlir/test/Target/LLVMIR/nvvm/permute_valid.mlir

 Log Message:
 -----------
 [MLIR][NVVM] Add Permute Op (#169793)

This patch adds the `permute` op.
Lit tests are added to verify the lowering to the intrinsics. 
Negative tests are also added to check the error-handling of invalid
combinations.

PTX spec reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-prmt

Signed-off-by: Dharuni R Acharya <dharunira at nvidia.com>


 Commit: 346f48ecbcd5a2ba63b3947f3593acce2867692b
 https://github.com/llvm/llvm-project/commit/346f48ecbcd5a2ba63b3947f3593acce2867692b
 Author: Simon Pilgrim <llvm-dev at redking.me.uk>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M clang/lib/Headers/avx512bf16intrin.h
 M clang/lib/Headers/avx512vlbf16intrin.h
 M clang/test/CodeGen/X86/avx512bf16-builtins.c
 M clang/test/CodeGen/X86/avx512vlbf16-builtins.c

 Log Message:
 -----------
 [Headers][X86] Convert bf16 to f32 conversions to constexpr implementations (#169841)

Fixes #154911


 Commit: 4e30dccd21716b901f91d425c52dc8422a26c6af
 https://github.com/llvm/llvm-project/commit/4e30dccd21716b901f91d425c52dc8422a26c6af
 Author: Mehdi Amini <joker.eph at gmail.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M mlir/lib/Target/LLVMIR/Dialect/GPU/SelectObjectAttr.cpp

 Log Message:
 -----------
 [MLIR] Apply clang-tidy fixes for llvm-else-after-return in SelectObjectAttr.cpp (NFC)


 Commit: 4237ec343a7f0c0d3717972b14ae22ec10ff74cd
 https://github.com/llvm/llvm-project/commit/4237ec343a7f0c0d3717972b14ae22ec10ff74cd
 Author: Mehdi Amini <joker.eph at gmail.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M mlir/lib/Conversion/MPIToLLVM/MPIToLLVM.cpp

 Log Message:
 -----------
 [MLIR] Apply clang-tidy fixes for readability-avoid-const-params-in-decls in MPIToLLVM.cpp (NFC)


 Commit: cc72171322a982b3d39a2688c45372ee7b5f8b67
 https://github.com/llvm/llvm-project/commit/cc72171322a982b3d39a2688c45372ee7b5f8b67
 Author: nerix <nerixdev at outlook.de>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
 M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
 A lldb/test/Shell/SymbolFile/PDB/add-symbols.cpp

 Log Message:
 -----------
 [LLDB][PDB] Access object file through module (#169728)

When a PDB is loaded through `target symbols add <pdb-path>`, its
`m_objectfile_sp` is an `ObjectFilePDB` instead of `ObjectFilePECOFF`
(the debugged module). In both the native and DIA plugin, some paths
assumed that `m_objectfile_sp` is the debugged module. With this PR,
they go through `m_objfile_sp->GetModule()->GetObjectFile()`.

For the DIA plugin, this lead to an assertion failure
(https://github.com/llvm/llvm-project/issues/169628#issuecomment-3582555277)
and for both plugins, it meant that the symbol table wasn't loaded.


 Commit: d989ff93e2a073cb921cfcfeb9728a0b51892f1a
 https://github.com/llvm/llvm-project/commit/d989ff93e2a073cb921cfcfeb9728a0b51892f1a
 Author: Jan Leyonberg <jan_sjodin at yahoo.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M flang/lib/Lower/OpenMP/OpenMP.cpp
 A flang/test/Lower/OpenMP/omp-declare-reduction-combsub.f90

 Log Message:
 -----------
 [flang][OpenMP] Add lowering of subroutine calls in custom reduction combiners (#169808)

This patch adds support for lowering subroutine calls in custom
reduction combiners to MLIR.


 Commit: 4769122b2253c069e38107e80120caa2f1674aad
 https://github.com/llvm/llvm-project/commit/4769122b2253c069e38107e80120caa2f1674aad
 Author: Shreeyash Pandey <shreeyash335 at gmail.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M libc/test/UnitTest/ExecuteFunctionUnix.cpp
 M libc/test/src/stdlib/CMakeLists.txt
 M libc/test/src/stdlib/_Exit_test.cpp
 A libc/test/src/stdlib/exit_test.cpp

 Log Message:
 -----------
 [libc][test] split exit tests into two separate tests (#169820)

_Exit(3) is a fairly simple syscall wrapper whereas exit(3) calls
atexit-registered functions + whole lot of stuff that require support
for sync primitives.

Splitting the tests allows testing the former easily (especially for new
port projects)

---------

Signed-off-by: Shreeyash Pandey <shreeyash335 at gmail.com>


 Commit: eb323d86561db72d6d71ce2c403da70f16ff7f17
 https://github.com/llvm/llvm-project/commit/eb323d86561db72d6d71ce2c403da70f16ff7f17
 Author: Shreeyash Pandey <shreeyash335 at gmail.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M libc/config/darwin/aarch64/entrypoints.txt
 M libc/src/__support/OSUtil/darwin/CMakeLists.txt
 M libc/src/__support/OSUtil/darwin/aarch64/CMakeLists.txt
 A libc/src/__support/OSUtil/darwin/exit.cpp

 Log Message:
 -----------
 [libc][darwin] add internal::exit (#166357)

Add internal::exit for MacOS/Darwin


 Commit: 9999c316968ffdb77a69f883f8ddbdfe0b57a44b
 https://github.com/llvm/llvm-project/commit/9999c316968ffdb77a69f883f8ddbdfe0b57a44b
 Author: Charles Zablit <c_zablit at apple.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M lldb/include/lldb/Target/Process.h

 Log Message:
 -----------
 [NFC][lldb] document Process::SetSTDIOFileDescriptor (#169849)


 Commit: 7c36e1d424a782077ea22363e906367691676025
 https://github.com/llvm/llvm-project/commit/7c36e1d424a782077ea22363e906367691676025
 Author: Marco Elver <elver at google.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/include/llvm/IR/Argument.h

 Log Message:
 -----------
 [NFC] Remove deprecated Argument::getParamAlignment() declaration (#169911)

The implementation of Argument::getParamAlignment() was removed in
commit b55f83d013eff244f7cf6bfcd06f06f7c894ff28, but the declaration in
Argument.h was left behind. Remove it.

NFC.


 Commit: a3d772490885d60a371ad6a5db7573d664616cca
 https://github.com/llvm/llvm-project/commit/a3d772490885d60a371ad6a5db7573d664616cca
 Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M flang/include/flang/Common/enum-set.h
 M flang/include/flang/Parser/dump-parse-tree.h
 M flang/include/flang/Parser/parse-tree-visitor.h
 M flang/include/flang/Parser/parse-tree.h
 M flang/lib/Parser/openmp-parsers.cpp
 M flang/lib/Parser/unparse.cpp
 M flang/lib/Semantics/check-omp-structure.cpp
 M flang/test/Parser/OpenMP/allocate-align-tree.f90
 M flang/test/Parser/OpenMP/allocate-tree-spec-part.f90
 M flang/test/Parser/OpenMP/allocate-tree.f90
 M flang/test/Parser/OpenMP/allocators-unparse.f90
 M flang/test/Parser/OpenMP/assumption.f90
 M flang/test/Parser/OpenMP/atomic-compare.f90
 M flang/test/Parser/OpenMP/atomic-end.f90
 M flang/test/Parser/OpenMP/atomic-label-do.f90
 M flang/test/Parser/OpenMP/bind-clause.f90
 M flang/test/Parser/OpenMP/construct-prefix-conflict.f90
 M flang/test/Parser/OpenMP/cross-label-do.f90
 M flang/test/Parser/OpenMP/declare-reduction-multi.f90
 M flang/test/Parser/OpenMP/declare-reduction-operator.f90
 M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
 M flang/test/Parser/OpenMP/declare-target-indirect-tree.f90
 M flang/test/Parser/OpenMP/declare-target-to-clause.f90
 M flang/test/Parser/OpenMP/declare-variant.f90
 M flang/test/Parser/OpenMP/declare_target-device_type.f90
 M flang/test/Parser/OpenMP/dispatch.f90
 M flang/test/Parser/OpenMP/dyn-groupprivate-clause.f90
 M flang/test/Parser/OpenMP/enter-automap-modifier.f90
 M flang/test/Parser/OpenMP/fuse02.f90
 M flang/test/Parser/OpenMP/groupprivate.f90
 M flang/test/Parser/OpenMP/in-reduction-clause.f90
 M flang/test/Parser/OpenMP/interop-construct.f90
 M flang/test/Parser/OpenMP/linear-clause.f90
 M flang/test/Parser/OpenMP/loop-transformation-construct01.f90
 M flang/test/Parser/OpenMP/loop-transformation-construct02.f90
 M flang/test/Parser/OpenMP/loop-transformation-construct03.f90
 M flang/test/Parser/OpenMP/loop-transformation-construct04.f90
 M flang/test/Parser/OpenMP/loop-transformation-construct05.f90
 M flang/test/Parser/OpenMP/map-modifiers-v61.f90
 M flang/test/Parser/OpenMP/metadirective-dirspec.f90
 M flang/test/Parser/OpenMP/metadirective-flush.f90
 M flang/test/Parser/OpenMP/openmp6-directive-spellings.f90
 M flang/test/Parser/OpenMP/order-clause01.f90
 M flang/test/Parser/OpenMP/ordered-block-vs-standalone.f90
 M flang/test/Parser/OpenMP/replayable-clause.f90
 M flang/test/Parser/OpenMP/requires.f90
 M flang/test/Parser/OpenMP/sections.f90
 M flang/test/Parser/OpenMP/taskgraph.f90
 M flang/test/Parser/OpenMP/threadprivate.f90
 M flang/test/Parser/OpenMP/tile.f90
 M flang/test/Parser/OpenMP/transparent-clause.f90
 M flang/test/Parser/OpenMP/unroll-heuristic.f90

 Log Message:
 -----------
 [flang][OpenMP] Make OmpDirectiveSpecification::Flags an EnumSet (#169713)

The idea is that there can be multiple flags on a given directive. When
"Flags" was a simple enum, only one flag could have been set at a time.


 Commit: 80e4a3f7a6c3cad5ca5c1ed259c6d6813834c13f
 https://github.com/llvm/llvm-project/commit/80e4a3f7a6c3cad5ca5c1ed259c6d6813834c13f
 Author: Shreeyash Pandey <shreeyash335 at gmail.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 A libc/include/llvm-libc-macros/darwin/CMakeLists.txt
 A libc/include/llvm-libc-macros/darwin/time-macros.h
 M libc/include/llvm-libc-macros/time-macros.h
 M libc/include/llvm-libc-types/clockid_t.h
 M libc/include/llvm-libc-types/struct_timespec.h
 M libc/include/llvm-libc-types/struct_timeval.h
 M libc/include/llvm-libc-types/suseconds_t.h
 M libc/include/llvm-libc-types/time_t_32.h
 M libc/include/llvm-libc-types/time_t_64.h
 M libc/src/__support/OSUtil/darwin/exit.cpp
 A libc/src/__support/time/darwin/CMakeLists.txt
 A libc/src/__support/time/darwin/clock_gettime.cpp
 A libc/src/time/darwin/CMakeLists.txt
 A libc/src/time/darwin/clock_gettime.cpp
 A libc/test/src/__support/time/darwin/CMakeLists.txt
 A libc/test/src/__support/time/darwin/clock_gettime.cpp

 Log Message:
 -----------
 [libc] Add clock_gettime for Darwin (#167160)

This patch adds support for clock_gettime for Darwin. Darwin syscall
'gettimeofday' is used to query the time from the system.

Many headers in llvm-libc-types, namely clockid_t, struct_timespec,
struct_timeval, suseconds_t, time_t_32, time_t_64, are modified to
include
header guards as Darwin has its own implementation of primitive types.


 Commit: 3a766dcbc462946ad34c1306be70cbbdc1dc868b
 https://github.com/llvm/llvm-project/commit/3a766dcbc462946ad34c1306be70cbbdc1dc868b
 Author: Asher Dobrescu <asher.dobrescu at gmail.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AArch64/AArch64SchedNeoverseN3.td
 M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-sve-instructions.s

 Log Message:
 -----------
 [AArch64] Fix throughout of 64-bit SVE gather loads (#168572)

In the Neoverse N3 Software Optimisation Guide, SVE non termporal gather
load, vector+scalar 64-bit element size and gather load, vector + imm,
64-bit element size both show throughput of 4/5. However, it currently
shows as 2/3. This patch adds a new resource group in order to show the
correct throughput.


 Commit: 207627f20f06771edfbb1e779f94dfdc2ff7df26
 https://github.com/llvm/llvm-project/commit/207627f20f06771edfbb1e779f94dfdc2ff7df26
 Author: Sergei Druzhkov <serzhdruzhok at gmail.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
 M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
 M lldb/test/API/tools/lldb-dap/databreakpoint/TestDAP_setDataBreakpoints.py
 M lldb/tools/lldb-dap/Handler/DataBreakpointInfoRequestHandler.cpp
 M lldb/tools/lldb-dap/Handler/RequestHandler.h
 M lldb/tools/lldb-dap/JSONUtils.cpp
 M lldb/tools/lldb-dap/Watchpoint.cpp

 Log Message:
 -----------
 [lldb-dap] Add data breakpoints for bytes (#167237)

This patch adds support for `dataBreakpointInfoBytes` capability from
DAP. You can test this feature in VSCode (`Add data breakpoint at
address` button in breakpoints tab).


 Commit: c2eb332331c4b1e065ff50e08fb038dc63eb754c
 https://github.com/llvm/llvm-project/commit/c2eb332331c4b1e065ff50e08fb038dc63eb754c
 Author: Charles Zablit <c_zablit at apple.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M lldb/packages/Python/lldbsuite/test/dotest.py

 Log Message:
 -----------
 [lldb][dotest] use unused variable (#169903)


 Commit: 318236da1feb7e6a5030252e02853e6ed54b39ac
 https://github.com/llvm/llvm-project/commit/318236da1feb7e6a5030252e02853e6ed54b39ac
 Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M clang/include/clang/Basic/BuiltinsAMDGPU.def
 M clang/test/SemaHIP/amdgpu-gfx950-load-to-lds.hip

 Log Message:
 -----------
 [HIP][AMDGPU] Remove 't' from all __builtin_*_load_lds builtins (#165389)

Allows for type checking depending on the builtin signature.

Stacked on top of: https://github.com/llvm/llvm-project/pull/165387 and
https://github.com/llvm/llvm-project/pull/165388


 Commit: 8c31b1214dd194f71a17a2457784699bb320f802
 https://github.com/llvm/llvm-project/commit/8c31b1214dd194f71a17a2457784699bb320f802
 Author: Matthew Nagy <matthew.nagy at sony.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M compiler-rt/test/ubsan/TestCases/Misc/Posix/print_stack_trace.cpp

 Log Message:
 -----------
 [TySan](test-only) Mark ubsan-tysan test as unsupported for now (#169934)


 Commit: 73d1602d0694671ac7f334635c8a5d1df0de1f0e
 https://github.com/llvm/llvm-project/commit/73d1602d0694671ac7f334635c8a5d1df0de1f0e
 Author: Eric Li <li.zhe.hua at gmail.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M clang/lib/Tooling/Transformer/SourceCode.cpp
 M clang/unittests/Tooling/SourceCodeTest.cpp

 Log Message:
 -----------
 [clang][Tooling] Fix `getFileRange` returning a range spanning macro invocation (#169842)

A followup to 40991215f4aba37fd43b65d96ad0a445dcd041b2.

When the start or end token is inside a macro argument and the other is
outside of the macro, we want to reject the range for a similar reason.
The range will include half of the macro call, either the closing paren
or the macro name and open paren.


 Commit: a5dba76de49220246c2d787d29444ed226fbb472
 https://github.com/llvm/llvm-project/commit/a5dba76de49220246c2d787d29444ed226fbb472
 Author: Mikhail R. Gadelha <mikhail at igalia.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 A llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vle-vse-vlm.s
 A llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlse-vsse.s
 A llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlseg-vsseg.s
 A llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlxe-vsxe.s

 Log Message:
 -----------
 Pre-commit tests for x60 vector ld/st latency PR

Signed-off-by: Mikhail R. Gadelha <mikhail at igalia.com>


 Commit: 78defc820eef5185d50e9aa396fb5a4b5ed07f92
 https://github.com/llvm/llvm-project/commit/78defc820eef5185d50e9aa396fb5a4b5ed07f92
 Author: lancesix <lancelot.six at amd.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/lib/Target/AMDGPU/SIDefines.h
 M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
 M llvm/test/MC/AMDGPU/gfx12_asm_sopk.s
 M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopk.txt

 Log Message:
 -----------
 [AMDGPU] Add support for HW_REG_WAVE_SCHED_MODE (#169840)

Expose HW_REG_WAVE_SCHED_MODE to the s_getreg_b32, s_setreg_b32,
s_setreg_imm32_b32 instructions.


 Commit: b38ed00495002f4df8b29527fb1cf47317c39d36
 https://github.com/llvm/llvm-project/commit/b38ed00495002f4df8b29527fb1cf47317c39d36
 Author: nerix <nerixdev at outlook.de>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M lldb/test/Shell/SymbolFile/PDB/add-symbols.cpp

 Log Message:
 -----------
 [LLDB][PDB] Relax check for resolving breakpoint (#169932)

The test was flaky, because it assumed that the breakpoint was always
resolved before `r` was executed
(https://github.com/llvm/llvm-project/pull/169728#issuecomment-3589799783).
This PR removes the check for this order. It still checks that the
breakpoint is resolved before it is hit.


 Commit: 442f853e28135813695cc5139bcbe8de8900d43f
 https://github.com/llvm/llvm-project/commit/442f853e28135813695cc5139bcbe8de8900d43f
 Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M compiler-rt/lib/builtins/cpu_model/x86.c

 Log Message:
 -----------
 [compiler-rt] Add missing cpuid check for clflushopt (#169900)

As in title.


 Commit: a941e150749650e6a75e948f10d46b0bedcc128b
 https://github.com/llvm/llvm-project/commit/a941e150749650e6a75e948f10d46b0bedcc128b
 Author: Alexandru Dura <alexandru.dura at inceptron.io>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
 A mlir/test/Dialect/Transform/include-failure-propagation.mlir

 Log Message:
 -----------
 [MLIR][Transform] Return empty handles when the included sequence fails (#169782)

This fixes a bug in the interpreter for transform.include op, which
crashes when attempting to copy out the handles from the yield op of a
failing sequence.


 Commit: 4dc29b8a5d406aa74467d66150f0d0771b44ac28
 https://github.com/llvm/llvm-project/commit/4dc29b8a5d406aa74467d66150f0d0771b44ac28
 Author: Florian Hahn <flo at fhahn.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll
 A llvm/test/Transforms/LoopVectorize/select-fmax-last-index.ll
 A llvm/test/Transforms/LoopVectorize/select-fmin-last-index.ll
 M llvm/test/Transforms/LoopVectorize/select-index-interleaving.ll
 M llvm/test/Transforms/LoopVectorize/select-smax-last-index.ll
 M llvm/test/Transforms/LoopVectorize/select-smin-last-index.ll
 M llvm/test/Transforms/LoopVectorize/select-umax-last-index.ll
 M llvm/test/Transforms/LoopVectorize/select-umin-first-index.ll
 M llvm/test/Transforms/LoopVectorize/select-umin-last-index.ll

 Log Message:
 -----------
 [LV] Add additional argmin/argmax tests for #141431.

Apply suggestions for tests from
https://github.com/llvm/llvm-project/pull/141431 and add additional
missing coverage.


 Commit: 8a2965dfa929b49ecc3ba7e508d2f6970ac418af
 https://github.com/llvm/llvm-project/commit/8a2965dfa929b49ecc3ba7e508d2f6970ac418af
 Author: Martin Storsjö <martin at martin.st>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp

 Log Message:
 -----------
 [llvm-readobj] Remove a leftover comment from 6ad4fdacaeea4777e98a3ab41512c49d3d1b6151. NFC.

This case did get documented upstream, in
https://github.com/MicrosoftDocs/cpp-docs/pull/4202, and the
way that llvm-readobj prints it, implemented in that commit, is
correct.


 Commit: e99d8adf8d34da521d9243ba225995ac543745df
 https://github.com/llvm/llvm-project/commit/e99d8adf8d34da521d9243ba225995ac543745df
 Author: Martin Storsjö <martin at martin.st>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/lib/MC/MCWin64EH.cpp

 Log Message:
 -----------
 [MC] [Win64EH] Fix the operator ordering for UOP_SaveFPLRX. NFC.

The encoded offset should be (OffsetInBytes/8)-1 due to an
implicit offset of 1. Previously the operator ordering was
inverted. As the offset is a multiple of 8, the incorrect
operator ordering did produce the right result in all cases
anyway.


 Commit: 99addbf73db596403a1702ac5c3f92e58f9e9f55
 https://github.com/llvm/llvm-project/commit/99addbf73db596403a1702ac5c3f92e58f9e9f55
 Author: Florian Hahn <flo at fhahn.com>
 Date: 2025-11-28 (Fri, 28 Nov 2025)

 Changed paths:
 M llvm/include/llvm/Analysis/IVDescriptors.h
 M llvm/lib/Analysis/IVDescriptors.cpp
 M llvm/lib/Transforms/Utils/LoopUnroll.cpp
 M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
 M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
 M llvm/lib/Transforms/Vectorize/VPlan.h
 M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
 M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
 M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
 M llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll
 M llvm/test/Transforms/LoopVectorize/select-index-interleaving.ll
 M llvm/test/Transforms/LoopVectorize/select-smax-last-index.ll
 M llvm/test/Transforms/LoopVectorize/select-smin-last-index.ll
 M llvm/test/Transforms/LoopVectorize/select-umax-last-index.ll
 M llvm/test/Transforms/LoopVectorize/select-umin-last-index.ll

 Log Message:
 -----------
 [LV] Vectorize selecting last IV of min/max element. (#141431)

Add support for vectorizing loops that select the index of the minimum
or maximum element. The patch implements vectorizing those patterns by
combining Min/Max and FindFirstIV reductions.

It extends matching Min/Max reductions to allow in-loop users that are
FindLastIV reductions. It records a flag indicating that the Min/Max
reduction is used by another reduction. The extra user is then check as
part of the new `handleMultiUseReductions` VPlan transformation.

It processes any reduction that has other reduction users. The reduction
using the min/max reduction currently must be a FindLastIV reduction,
which needs adjusting to compute the correct result:
 1. We need to find the last IV for which the condition based on the
 min/max reduction is true,
 2. Compare the partial min/max reduction result to its final value and,
 3. Select the lanes of the partial FindLastIV reductions which
 correspond to the lanes matching the min/max reduction result.

Depends on https://github.com/llvm/llvm-project/pull/140451

PR: https://github.com/llvm/llvm-project/pull/141431


 Commit: 9bae84b01718e53495abf50958abc86ea45f16bb
 https://github.com/llvm/llvm-project/commit/9bae84b01718e53495abf50958abc86ea45f16bb
 Author: Luo Yuanke <lyk_03 at hotmail.com>
 Date: 2025-11-29 (Sat, 29 Nov 2025)

 Changed paths:
 M llvm/lib/CodeGen/RegAllocGreedy.cpp
 M llvm/lib/CodeGen/SplitKit.cpp
 M llvm/lib/CodeGen/SplitKit.h
 M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
 M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
 M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
 M llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
 M llvm/test/CodeGen/AMDGPU/spill-before-exec.mir
 A llvm/test/CodeGen/AMDGPU/spill-before-exec2.mir
 M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
 M llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll

 Log Message:
 -----------
 [RegAlloc] Relax the split constrain on MBB prolog (#168259)

https://reviews.llvm.org/D52052 is to prevent register split on the MBB
which have prolog instructions defining the exec register (or mask register
that activate the threads of a warp in GPU). The constrain seems too
strict, because 1) If the split is allowed, it may fit the free live range
of a physical register, and no spill will happen; 2) The register class of
register that is under splitting may not be the same to the register that
is defined in prolog, so there is no interference with the register being
defined in prolog. 
The current code has another small issue. The MBB->getFirstNonDebugInstr()
just skip debug instructions, but SA->getFirstSplitPoint(Number) would skip
label and phi instructions. This cause some MBB with label instruction
being taken as prolog.
This patch is to relax the split constrain on MMB with prolog by checking
if the register defined in prolog has the common register class with the
register being split. It allow the split if the register defined in prolog
is physical register or there is no common register class.

---------

Co-authored-by: Yuanke Luo <ykluo at birentech.com>


 Commit: 5dd2b06d60d3eb9b07c7513358ad8b04386f79bc
 https://github.com/llvm/llvm-project/commit/5dd2b06d60d3eb9b07c7513358ad8b04386f79bc
 Author: mitchell <mitchell.xu2 at gmail.com>
 Date: 2025-11-29 (Sat, 29 Nov 2025)

 Changed paths:
 M clang-tools-extra/clang-tidy/utils/FormatStringConverter.cpp
 M clang-tools-extra/docs/ReleaseNotes.rst
 M clang-tools-extra/test/clang-tidy/check_clang_tidy.py
 M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-print.cpp

 Log Message:
 -----------
 [clang-tidy] Fix OOB access in `FormatStringConverter` with signed chars (#169215)

`FormatStringConverter::appendFormatText` incorrectly treated non-ASCII
characters (e.g. UTF-8) as negative values when using signed chars. This
caused them to pass the `< 32` check for control characters.

The negative values were passed to `llvm::hexdigit`, resulting in an OOB
access and a crash.

This closes
[#169198](https://github.com/llvm/llvm-project/issues/169198)


 Commit: f5742c4d540a20651a67de51e16242a52e5d4064
 https://github.com/llvm/llvm-project/commit/f5742c4d540a20651a67de51e16242a52e5d4064
 Author: Qihan Cai <caiqihan021 at hotmail.com>
 Date: 2025-11-29 (Sat, 29 Nov 2025)

 Changed paths:
 M llvm/include/llvm/IR/IntrinsicsRISCVXCV.td
 M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
 M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
 A llvm/test/CodeGen/RISCV/xcvelw.ll
 A llvm/test/MC/RISCV/corev/XCVelw-pseudo.s

 Log Message:
 -----------
 [RISCV] Intrinsic Support for XCVelw (#129168)


 Commit: 66d33cec991c5526b4ec3bbfec741a2a9e78b21f
 https://github.com/llvm/llvm-project/commit/66d33cec991c5526b4ec3bbfec741a2a9e78b21f
 Author: Florian Hahn <flo at fhahn.com>
 Date: 2025-11-29 (Sat, 29 Nov 2025)

 Changed paths:
 M llvm/test/Transforms/LoopVectorize/pr58811-scev-expansion.ll

 Log Message:
 -----------
 [LV] Extend test coverage for inductions depending on complex SCEVs.

Re-generate check lines, add test with complex SCEV as induction start
value and add stores to existing loops to make them not trivial.


 Commit: d3762edd5fc11e6ad670950d89d51edabf30f8b5
 https://github.com/llvm/llvm-project/commit/d3762edd5fc11e6ad670950d89d51edabf30f8b5
 Author: Tirthankar Mazumder <63574588+wermos at users.noreply.github.com>
 Date: 2025-11-29 (Sat, 29 Nov 2025)

 Changed paths:
 M llvm/docs/InstCombineContributorGuide.md
 M llvm/docs/KeyInstructionsDebugInfo.md
 M llvm/docs/Telemetry.rst

 Log Message:
 -----------
 [docs] Fix typos and remove redundant whitespace (#169981)

As the title says, I fixed some spelling mistakes I found in the docs.


 Commit: 3a1079fa2514d16c51bfe53b3da8a8b8d78128c1
 https://github.com/llvm/llvm-project/commit/3a1079fa2514d16c51bfe53b3da8a8b8d78128c1
 Author: theRonShark <ron.lieberman at amd.com>
 Date: 2025-11-29 (Sat, 29 Nov 2025)

 Changed paths:
 M llvm/lib/CodeGen/RegAllocGreedy.cpp
 M llvm/lib/CodeGen/SplitKit.cpp
 M llvm/lib/CodeGen/SplitKit.h
 M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
 M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
 M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
 M llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
 M llvm/test/CodeGen/AMDGPU/spill-before-exec.mir
 R llvm/test/CodeGen/AMDGPU/spill-before-exec2.mir
 M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
 M llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll

 Log Message:
 -----------
 Revert "[RegAlloc] Relax the split constrain on MBB prolog" (#169990)

Reverts llvm/llvm-project#168259

breaks hip buildot


 Commit: 3e16aef2a650a8c2da4ebd5c58c6a9e261361828
 https://github.com/llvm/llvm-project/commit/3e16aef2a650a8c2da4ebd5c58c6a9e261361828
 Author: Koakuma <koachan at protonmail.com>
 Date: 2025-11-29 (Sat, 29 Nov 2025)

 Changed paths:
 M clang/lib/Basic/Targets/Sparc.cpp
 M clang/lib/Basic/Targets/Sparc.h
 M clang/lib/CodeGen/Targets/Sparc.cpp
 M clang/test/CodeGen/Sparc/sparcv8-abi.c
 M clang/test/Preprocessor/init.c
 M clang/test/Preprocessor/predefined-arch-macros.c
 M compiler-rt/lib/builtins/CMakeLists.txt
 M compiler-rt/test/builtins/CMakeLists.txt
 M compiler-rt/test/sanitizer_common/TestCases/printf-ldbl.c
 M compiler-rt/test/sanitizer_common/TestCases/scanf-ldbl.c
 M compiler-rt/test/ubsan/TestCases/Float/cast-overflow.cpp
 M compiler-rt/test/ubsan/TestCases/Misc/log-path_test.cpp
 M llvm/lib/Target/Sparc/SparcCallingConv.td
 M llvm/lib/Target/Sparc/SparcISelLowering.cpp
 A llvm/test/CodeGen/SPARC/fp128-abi.ll
 M llvm/test/CodeGen/SPARC/fp16-promote.ll
 M llvm/test/CodeGen/SPARC/llvm.sincos.ll

 Log Message:
 -----------
 [SPARC] Properly handle CC for long double on sparc32 (#162226)

Pass and return `long double`s indirectly, as specified in the psABI.
This continues the patch at https://reviews.llvm.org/D89130.

This should fix the issue at https://github.com/llvm/llvm-project/issues/41838.


 Commit: 7925a9ea1e63b5e7c1f57e467a05e819f6ef7c27
 https://github.com/llvm/llvm-project/commit/7925a9ea1e63b5e7c1f57e467a05e819f6ef7c27
 Author: Simon Pilgrim <llvm-dev at redking.me.uk>
 Date: 2025-11-29 (Sat, 29 Nov 2025)

 Changed paths:
 M llvm/lib/Target/X86/X86ISelLowering.cpp
 M llvm/test/CodeGen/X86/kmov.ll

 Log Message:
 -----------
 [X86] combineConcatVectorOps - add handling for vXi1 concat(logicop(),logicop()) patterns. (#169998)


 Commit: a09c5792ed3b6a0644c990060f890c53f042b267
 https://github.com/llvm/llvm-project/commit/a09c5792ed3b6a0644c990060f890c53f042b267
 Author: Abhishek Varma <avarma094 at gmail.com>
 Date: 2025-11-29 (Sat, 29 Nov 2025)

 Changed paths:
 M mlir/lib/Dialect/Linalg/Utils/Utils.cpp

 Log Message:
 -----------
 [NFC][Linalg] Introduce ConvMatchBuilder + refactor Conv matchers (#169704)

-- This commit is a follow-up and third in the series of adding
matchers for conv/pool ops. Refer:
https://github.com/llvm/llvm-project/pull/163724
-- It introduces ConvMatchBuilder class in order to reduce the
 repetitive code across Conv1D/2D/3D/Depthwise/Pooling variants.
-- Refer to [Conv2D
thread](https://github.com/llvm/llvm-project/pull/168362#issuecomment-3575972133)
for further context.

Signed-off-by: Abhishek Varma <abhvarma at amd.com>


 Commit: 8462cff40daf40e58d705f5d86d4e91ef6e6294c
 https://github.com/llvm/llvm-project/commit/8462cff40daf40e58d705f5d86d4e91ef6e6294c
 Author: David Stone <davidfromonline at gmail.com>
 Date: 2025-11-29 (Sat, 29 Nov 2025)

 Changed paths:
 M clang/include/clang/AST/CXXInheritance.h
 M clang/lib/AST/CXXInheritance.cpp

 Log Message:
 -----------
 [clang][NFC] Declare `CXXBasePaths::isAmbiguous` as `const` (#169944)

To make this change, we have to use `lookup` instead of `operator[]` on
a map. They both return the same thing: a default constructed value. The
difference is that `lookup` default constructs a value and then returns
it, whereas `operator[]` default constructs a value, inserts it into the
map, and then returns a reference to that. Given that we are using a
by-value return, the only way this is different is if a later use of the
map depends on a value being at that key.

The map is a private variable of the class, so the only possible users
are are other member functions. The only other use of the map that cares
about the contents of the map is in `lookupInBases`, and it accesses the
map with `operator[]`. This means that attempting to access the same
element in this function will default construct the value before doing
anything with it, which means it would do the exact thing it needs to do
in the case where we are looking up a non-existent key, therefore no
behavior has changed.

In terms of performance, this would either be a win or neutral. The
benefit is that in some cases, we can avoid a memory allocation just
read the contents of a 32-bit `0`. If a call to `isAmbiguous` is always
followed up with a call to `lookupInBases`, then we allocate the memory
just a little bit later for no difference in performance.


 Commit: 246528cb3ad67ededee5f076fd1ef501af97f294
 https://github.com/llvm/llvm-project/commit/246528cb3ad67ededee5f076fd1ef501af97f294
 Author: Islam Imad <143586474+Islam-Imad at users.noreply.github.com>
 Date: 2025-11-29 (Sat, 29 Nov 2025)

 Changed paths:
 M clang/lib/AST/ByteCode/InterpBuiltin.cpp

 Log Message:
 -----------
 [clang][bytecode] Unify elementwise integer builtins using callback pattern (#169957)

This patch refactors the handling of elementwise integer unary
operations to use a unified callback-based approach, eliminating code
duplication.

Changes:
- Extended interp__builtin_elementwise_int_unaryop to handle vector types
- Replaced BI__builtin_elementwise_popcount with callback invocation
- Replaced BI__builtin_elementwise_bitreverse with callback invocation
- Removed interp__builtin_elementwise_popcount function

The new approach uses a lambda function to specify the operation
(popcount or reverseBits), which is applied uniformly to both scalar and
vector operands. This reduces code duplication and makes it easier to
add similar builtins in the future.

Fixes #169657


 Commit: 435bafd0d534c8888783f0610afb86ed20d34fa7
 https://github.com/llvm/llvm-project/commit/435bafd0d534c8888783f0610afb86ed20d34fa7
 Author: AIT <45133884+GeneraluseAI at users.noreply.github.com>
 Date: 2025-11-29 (Sat, 29 Nov 2025)

 Changed paths:
 M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
 M clang/test/CIR/CodeGenBuiltins/X86/avx512bw-builtins.c
 A clang/test/CIR/CodeGenBuiltins/X86/avx512dq-builtins.c
 M clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c

 Log Message:
 -----------
 [CIR][X86] Implement lowering for AVX512 mask builtins (#169774)

This patch adds CIR codegen support for AVX512 mask operations on X86,
including kadd, kand, kandn, kor, kxor, knot, and kmov in all supported
mask widths. Each builtin now lowers to the expected vector<i1> form and
bitcast representations in CIR, matching the semantics of the
corresponding LLVM intrinsics.


 Commit: f57129312421b05eb2a46cf715f2c1db32f56c83
 https://github.com/llvm/llvm-project/commit/f57129312421b05eb2a46cf715f2c1db32f56c83
 Author: Fangrui Song 
 Date: 2025-11-29 (Sat, 29 Nov 2025)

 Changed paths:
 M llvm/lib/Target/ARC/ARC.td

 Log Message:
 -----------
 ARC: Override pseudos with pointers

This ports #159881 fix for other targets and fixes
```
error: missing target override for pseudoinstruction using PointerLikeRegClass
```


 Commit: cd3192a2c9c422f41d517428afef0a2232b9db8f
 https://github.com/llvm/llvm-project/commit/cd3192a2c9c422f41d517428afef0a2232b9db8f
 Author: Florian Hahn <flo at fhahn.com>
 Date: 2025-11-29 (Sat, 29 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
 M llvm/test/Transforms/LoopVectorize/select-smax-last-index.ll
 M llvm/test/Transforms/LoopVectorize/select-smin-last-index.ll
 M llvm/test/Transforms/LoopVectorize/select-umax-last-index.ll
 M llvm/test/Transforms/LoopVectorize/select-umin-last-index.ll

 Log Message:
 -----------
 [VPlan] Turn IVOp assertion into early exit.

Turn assertion added in 99addbf73 [0] into an early exit.
There are cases where the operand may not be a
VPWidenIntOrFpInductionRecipe, e.g. if the IV increment is selected,
as in the test cases.

[0] https://github.com/llvm/llvm-project/pull/141431


 Commit: 9ffd2e40c1c469e3ccb0798fa15fc38d6df42652
 https://github.com/llvm/llvm-project/commit/9ffd2e40c1c469e3ccb0798fa15fc38d6df42652
 Author: Lucie Choi <clucie at google.com>
 Date: 2025-11-30 (Sun, 30 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
 A llvm/test/Transforms/SimplifyCFG/skip-merging-duplicate-convergence-instrinsics.ll

 Log Message:
 -----------
 [SimplifyCFG] Fix `SimplifyCFG` pass to skip folding when both blocks contain convergence loop/entry intrinsics. (#166452)

Fixes a bug https://github.com/llvm/llvm-project/issues/165642. [Similar
fix](https://github.com/llvm/llvm-project/pull/165643) is being made in
`IndVarSimplify` pass to account for convergence tokens.

[LLVM
Spec](https://llvm.org/docs/ConvergentOperations.html#llvm-experimental-convergence-loop)
states that only a single loop / entry convergence token can be included
in a basic block.

This PR fixes the issue in `SimplifyCFG` pass so that when a basic block
and its predecessor both contain such convergence intrinsics, it skips
merging the two blocks.


 Commit: 24b87b8d4891d90afd8c4033a4997dedecbdd107
 https://github.com/llvm/llvm-project/commit/24b87b8d4891d90afd8c4033a4997dedecbdd107
 Author: Florian Hahn <flo at fhahn.com>
 Date: 2025-11-29 (Sat, 29 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
 M llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll

 Log Message:
 -----------
 [VPlan] Skip cost verification for loops with EVL gather/scatter.

The VPlan-based cost model use vp_gather/vp_scatter for gather/scatter
costs, which is different to the legacy cost model and cannot be matched
there. Don't verify the costs match for plans containing gather/scatters
with EVL.

Fixes https://github.com/llvm/llvm-project/issues/169948.


 Commit: a8cffb82991f76c3a004820d94dd4e0853bce1db
 https://github.com/llvm/llvm-project/commit/a8cffb82991f76c3a004820d94dd4e0853bce1db
 Author: Fangrui Song 
 Date: 2025-11-29 (Sat, 29 Nov 2025)

 Changed paths:
 M llvm/include/llvm/MC/MCObjectFileInfo.h
 M llvm/lib/MC/MCObjectFileInfo.cpp

 Log Message:
 -----------
 Remove unused MCObjectFileInfo::SupportsWeakOmittedEHFrame

The code is related to pre-AsmPrinter legacy code (see
9cb0e94dc79657144d639c722619e1e4fc19040e in 2008). The only caller has
been removed by bb237c72a69e6294258874a40aaaf14ad2747710 in 2011.


 Commit: 3de11e9251bba9f974b99947662eea69329075b2
 https://github.com/llvm/llvm-project/commit/3de11e9251bba9f974b99947662eea69329075b2
 Author: Matthias Springer <me at m-sp.org>
 Date: 2025-11-30 (Sun, 30 Nov 2025)

 Changed paths:
 M mlir/lib/Dialect/ControlFlow/IR/CMakeLists.txt
 M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
 M mlir/test/Dialect/ControlFlow/canonicalize.mlir

 Log Message:
 -----------
 [mlir][CF] Add `ub.unreachable` canonicalization (#169873)

Basic blocks with only a `ub.unreachable` terminator are unreachable.
This commit adds a canonicalization pattern that folds to `cf.cond_br`
to `cf.br` if one of the destination branches is unreachable.


 Commit: 70970d0a5bc07f5614cfdb3c224b1ee8bbd58546
 https://github.com/llvm/llvm-project/commit/70970d0a5bc07f5614cfdb3c224b1ee8bbd58546
 Author: sathvikreddy853 <157317970+sathvikreddy853 at users.noreply.github.com>
 Date: 2025-11-29 (Sat, 29 Nov 2025)

 Changed paths:
 M flang/lib/Lower/Runtime.cpp
 M flang/test/Lower/pause-statement.f90

 Log Message:
 -----------
 [flang] Implement lowering for the PAUSE statement (Fixes #166821) (#167115)

Implements lowering for the Fortran `PAUSE` statement.

- Handles PAUSE with no operand.
- Handles PAUSE with integer argument.
- Handles PAUSE with character literal argument.
- Adds a new lowering test: flang/test/Lower/pause-statement.f90.

Unlike STOP, PAUSE does not unconditionally terminate control flow.
The lowering preserves labels and GOTOs, consistent with legacy Fortran
behavior.

Fixes: #166821

---------

Co-authored-by: aditya nath <adityanath5002 at gmail.com>
Co-authored-by: Eugene Epshteyn <eepshteyn at nvidia.com>


 Commit: dda1fcf7b14cdcaeb39fc7aed377d8d4483ebcac
 https://github.com/llvm/llvm-project/commit/dda1fcf7b14cdcaeb39fc7aed377d8d4483ebcac
 Author: Tomer Shafir <tomer.shafir8 at gmail.com>
 Date: 2025-11-30 (Sun, 30 Nov 2025)

 Changed paths:
 M llvm/tools/llc/llc.cpp

 Log Message:
 -----------
 [llc][NFC] Remove unreachable return statement (#169915)

`reportError()` is a `[[noreturn]]` that calls `exit(1)`.


 Commit: 22257e8d6ed5600d9c689fecbd17ea68e9d08a6f
 https://github.com/llvm/llvm-project/commit/22257e8d6ed5600d9c689fecbd17ea68e9d08a6f
 Author: Aiden Grossman <aidengrossman at google.com>
 Date: 2025-11-30 (Sun, 30 Nov 2025)

 Changed paths:
 M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

 Log Message:
 -----------
 [bazel] Port #169873 (#170027)

A new dependency was added.


 Commit: ce2c0813f0615084f387b31715ca0e1d8377134e
 https://github.com/llvm/llvm-project/commit/ce2c0813f0615084f387b31715ca0e1d8377134e
 Author: Jonas Hahnfeld <jonas.hahnfeld at cern.ch>
 Date: 2025-11-30 (Sun, 30 Nov 2025)

 Changed paths:
 M clang/lib/AST/RecordLayoutBuilder.cpp

 Log Message:
 -----------
 [clang] Move and update comment in getASTRecordLayout, NFC.

isDefinition was already renamed to isCompleteDefinition by commit
f937c023bf in 2011, later the day the comment was originally written.


 Commit: b22825631293c19f70ca9969bd9de6094c688430
 https://github.com/llvm/llvm-project/commit/b22825631293c19f70ca9969bd9de6094c688430
 Author: David Green <david.green at arm.com>
 Date: 2025-11-30 (Sun, 30 Nov 2025)

 Changed paths:
 M clang/include/clang/Basic/arm_mve.td
 M clang/include/clang/Basic/arm_mve_defs.td
 M clang/test/CodeGen/arm-mve-intrinsics/ternary.c
 M clang/utils/TableGen/MveEmitter.cpp
 M llvm/include/llvm/IR/IntrinsicsARM.td
 M llvm/lib/Target/ARM/ARMInstrMVE.td
 M llvm/test/CodeGen/Thumb2/mve-intrinsics/strict-intrinsics.ll

 Log Message:
 -----------
 [ARM] Introduce intrinsics for MVE fma under strict-fp. (#169771)

Similar to #169156, this adds an @arm.mve.fma intrinsic for strict-fp. A
Builder class is added to act as the common subclass of IRBuilder and
IRInt.


 Commit: 0bd2f12753604cd072ae0935820ba9a23bb17ccc
 https://github.com/llvm/llvm-project/commit/0bd2f12753604cd072ae0935820ba9a23bb17ccc
 Author: Jakub Kuderski <jakub at nod-labs.com>
 Date: 2025-11-30 (Sun, 30 Nov 2025)

 Changed paths:
 M mlir/docs/Dialects/Linalg/OpDSL.md
 M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
 M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
 M mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
 M mlir/test/Dialect/Affine/value-bounds-reification.mlir
 M mlir/test/Dialect/Linalg/fusion-elementwise-ops.mlir
 M mlir/test/Dialect/Linalg/generalize-named-polymorphic-ops.mlir
 M mlir/test/Dialect/Linalg/invalid.mlir
 M mlir/test/Integration/Dialect/Linalg/CPU/test-matmul-masked-vec.mlir
 M mlir/test/Integration/Dialect/Transform/match_matmul.mlir
 M mlir/test/python/integration/dialects/linalg/opsrun.py

 Log Message:
 -----------
 [mlir][linalg] Restrict fill initial value type to output element type (#169567)

Disallow implicit casting, which is surprising, and, IME, usually
indicative of copy-paste errors.

Because the initial value must be a scalar, I don't expect this to
affect any data movement.


 Commit: 76d5dd5f9e9154a34dd6cfee232f322fc8112d63
 https://github.com/llvm/llvm-project/commit/76d5dd5f9e9154a34dd6cfee232f322fc8112d63
 Author: Shih-Po Hung <shihpo.hung at sifive.com>
 Date: 2025-11-30 (Sun, 30 Nov 2025)

 Changed paths:
 M llvm/include/llvm/Analysis/TargetTransformInfo.h
 M llvm/include/llvm/CodeGen/BasicTTIImpl.h
 M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
 M llvm/lib/Target/RISCV/RISCVISelLowering.h
 M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
 M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
 M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll

 Log Message:
 -----------
 [TTI][RISCV] Add cost modelling for intrinsic vp.load.ff (#169890)

This patch is a rework of #160470 (which was reverted).
With getMemIntrinsicCost() now available, we can re‑land the change and
reduce vp_load_ff boilerplate.


 Commit: 38678a91f3eb984a76db40b71d573e336194029a
 https://github.com/llvm/llvm-project/commit/38678a91f3eb984a76db40b71d573e336194029a
 Author: Simon Pilgrim <llvm-dev at redking.me.uk>
 Date: 2025-11-30 (Sun, 30 Nov 2025)

 Changed paths:
 M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
 M llvm/test/CodeGen/X86/addcarry.ll

 Log Message:
 -----------
 [DAG] getCarry - always succeed if we encounter a i1 type during trunc/ext peeling (#169777)

If we are force reconstructing a carry from a raw MVT::i1 type, make
sure we don't miss any cases while peeling through trunc/ext chains -
check for i1 types at the start of the while loop

Fixes #169691


 Commit: f42e58f61680e325555f382cab5115c54df6f6df
 https://github.com/llvm/llvm-project/commit/f42e58f61680e325555f382cab5115c54df6f6df
 Author: Nico Weber <thakis at chromium.org>
 Date: 2025-11-30 (Sun, 30 Nov 2025)

 Changed paths:
 M llvm/utils/gn/secondary/libcxx/include/BUILD.gn

 Log Message:
 -----------
 [gn] port a6643f27ecda (libc++ picolib/newlib)


 Commit: 113e0c95a89ab3ce9f1ac4e2ba6351d957a64da9
 https://github.com/llvm/llvm-project/commit/113e0c95a89ab3ce9f1ac4e2ba6351d957a64da9
 Author: Florian Hahn <flo at fhahn.com>
 Date: 2025-11-30 (Sun, 30 Nov 2025)

 Changed paths:
 M llvm/test/Transforms/LoopVectorize/select-umin-first-index.ll

 Log Message:
 -----------
 [LV] Add additional tests for argmin with find-first wrapping IV ranges.

Add test cases for upcoming argmin vectorization changes that have
wrapping IV ranges.


 Commit: c465a56e9d1f244a32ea00a426d449bc7f38a9b1
 https://github.com/llvm/llvm-project/commit/c465a56e9d1f244a32ea00a426d449bc7f38a9b1
 Author: Florian Hahn <flo at fhahn.com>
 Date: 2025-11-30 (Sun, 30 Nov 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp

 Log Message:
 -----------
 [VPlan] Handle canonical IVs in ::isSingleScalar. (NFCI)

The canonical IV is always a single scalar. They are already treated as
uniform-across-UF-and-VF.

This should currently be NFC.


 Commit: ef3785887c7c306d1ea933430befb78fb17e1650
 https://github.com/llvm/llvm-project/commit/ef3785887c7c306d1ea933430befb78fb17e1650
 Author: Fangrui Song 
 Date: 2025-11-30 (Sun, 30 Nov 2025)

 Changed paths:
 M lld/ELF/SyntheticSections.cpp
 M lld/ELF/SyntheticSections.h

 Log Message:
 -----------
 ELF: Move .eh_frame_hdr code closer to .eh_frame . NFC

... as they are closely related. Also improve the comments.


 Commit: 75aa01b89553bf4213a3b0e83829b6d0689941b9
 https://github.com/llvm/llvm-project/commit/75aa01b89553bf4213a3b0e83829b6d0689941b9
 Author: Phoebe Wang <phoebe.wang at intel.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/docs/LangRef.rst
 M llvm/include/llvm/CodeGen/ISDOpcodes.h

 Log Message:
 -----------
 Revert "LangRef: Clarify llvm.minnum and llvm.maxnum about sNaN and signed zero (#112852)" (#168838)

This reverts commit 363b05944f9212511ee6811d0eb1af841c177226.

This is a follow up of #166912. Sorry for not noticing the change at the
beginning, but I disagree with both sNaN and signed zero semantics
change.

I have 3 justifications:

- llvm.minnum and llvm.maxnum are common intrinsics, we cannot change
the definition just because "some architectures" support the changed
semantic. For example, X86 min/max instructions neither distinguish sNaN
nor signed zero. We have to add couples of extra instructions to match
with the new definition, which makes the intrinsics less efficient. But
efficient is not the reason for the objection. I object because such
cost is unnecessary;
- As the example ``minnum(fadd(sNaN, -0.0), 1.0)`` shows, minnum/maxnum
themself cannot guarantee consistent result if multiple FP arithmetic
operations involved. It makes the sacrifice of performance totally
unnecessary. `Behavior of Floating-Point NaN values` notes all NaNs can
be treated as quiet NaNs unless using Constrained Floating-Point
Intrinsics. So the cost is only worth for constrained minnum/maxnum ones
if we want to define them;
- Signed zero handling is unnecessary either, because even the C
functions don't require it. If any other front ends require, they can
use the existing fminnum_ieee/fmaxnum_ieee or define new intrinsics;

Fixes: https://github.com/llvm/llvm-project/issues/138303 and
https://github.com/llvm/llvm-project/issues/169122


 Commit: e110abc3c65bb33f738738a9fa6e0f5b602ed97f
 https://github.com/llvm/llvm-project/commit/e110abc3c65bb33f738738a9fa6e0f5b602ed97f
 Author: lonely eagle <2020382038 at qq.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
 M mlir/test/Dialect/Affine/loop-coalescing.mlir

 Log Message:
 -----------
 [mlir][affine] Use iter argument replace init when delete loop in the coalesceLoops function (#169514)

Fix https://github.com/llvm/llvm-project/issues/169483 by using iter
argument replace init when delete loop in the coalesceLoops function.


 Commit: 2e21bb815d527ebbe4d53f0396d1e40aae9e2146
 https://github.com/llvm/llvm-project/commit/2e21bb815d527ebbe4d53f0396d1e40aae9e2146
 Author: fennecJ <hwahwa649 at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
 A llvm/test/CodeGen/RISCV/zicond-fp-select-zfinx.ll

 Log Message:
 -----------
 [RISCV][ISelLowering] Use Zicond for FP selects on Zfinx/Zdinx (#169299)

### Summary

This patch let RISCVTargetLowering::lowerSELECT to lower some
floating-point select operations through an integer zicond select when:
* Zicond is available, and 
* FP values live in GPRs (Zfinx/Zdinx), and
* Select condition is an integer type.

In that scenario there is no extra cost for GPR <-> "FP GPR" moves, so
we can implement FP selects with a CZERO-based sequence instead of a
branch.

For example, for 
```c
float foo(int cond, float x) {
 return (cond != 0) ? x : 0.0f;
}
```
the current lowering produces:
```asm
foo:
 mv a2, a0
 li a0, 0
 beqz a2, .LBB0_2
.LBB0_1:
 mv a0, a1
.LBB0_2:
 ret
```

With this patch, when targeting rv64ima_zicond_zfinx we instead get: 

```asm
foo:
 czero.nez a2, zero, a0
 czero.eqz a0, a1, a0
 or a0, a2, a0
 ret
```


The existing branch-based lowering is preserved for:
* targets without Zicond
* targets where FP registers are separate (+f, +d without zfinx/zdinx)

### Testing

Adds llvm/test/CodeGen/RISCV/zicond-fp-select-zfinx.ll to cover:
* RV64 Zfinx/Zicond vs Zfinx without Zicond
* RV64 Zdinx/Zicond vs Zdinx without Zicond
* RV32 Zfinx/Zicond vs Zfinx without Zicond

Also adds baseline RV32F/RV64F/RV64D cases to ensure we still use
branches when FP registers are separate.

The tests check that:
* With Zicond + Zfinx/Zdinx, FP select lowers to a CZERO+OR sequence
with no conditional branches.
* Without Zicond (or without Zfinx/Zdinx), we still get branch-based
code and no czero.* instructions.


 Commit: 7494f3df14e5d401b73f2f8ccbd811f3556c5be5
 https://github.com/llvm/llvm-project/commit/7494f3df14e5d401b73f2f8ccbd811f3556c5be5
 Author: Aadesh Premkumar <aadesh.premkumar at multicorewareinc.com>
 Date: 2025-11-30 (Sun, 30 Nov 2025)

 Changed paths:
 M llvm/docs/SPIRVUsage.rst
 M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
 M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
 M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
 M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
 M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
 M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
 M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
 M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
 M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
 A llvm/test/CodeGen/SPIRV/extensions/SPV_ALTERA_arbitrary_precision_fixed_point/capability-arbitrary-precision-fixed-point-numbers.ll
 M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_arbitrary_precision_integers.ll
 M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_int4/negative.ll
 M llvm/test/CodeGen/SPIRV/extensions/both-allowed-disallowed-extension-error.ll
 M llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions-but-one.ll
 M llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions.ll
 M llvm/test/CodeGen/SPIRV/extensions/unused-but-allowed-SPV_INTEL_arbitrary_precision_integers.ll
 M llvm/test/CodeGen/SPIRV/llvm-intrinsics/bitreverse_small_type.ll
 M llvm/test/CodeGen/SPIRV/trunc-nonstd-bitwidth.ll
 M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td

 Log Message:
 -----------
 [SPIRV] Added support for extension SPV_ALTERA_arbitrary_precision_fixed_point and name change of SPV_INTEL_arbitrary_precision_integers to SPV_ALTERA_arbitrary_precision_integers (#136085)

--Added support for extension SPV_ALTERA_arbitrary_precision_fixed_point
--Added test files for extension
SPV_ALTERA_arbitrary_precision_fixed_point


 Commit: 6369279a0c4ca1a008241f171657c1db83cfe026
 https://github.com/llvm/llvm-project/commit/6369279a0c4ca1a008241f171657c1db83cfe026
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/docs/LangRef.rst
 M llvm/include/llvm/CodeGen/ISDOpcodes.h

 Log Message:
 -----------
 Revert "Revert "LangRef: Clarify llvm.minnum and llvm.maxnum about sNaN and signed zero (#112852)"" (#170067)

Reverts llvm/llvm-project#168838

Justification is confused and this did not receive adequate discussion,
particularly during a holiday week


 Commit: e2181400d70857bc5a212a4053d5d7940c84acaf
 https://github.com/llvm/llvm-project/commit/e2181400d70857bc5a212a4053d5d7940c84acaf
 Author: Brandon Wu <brandon.wu at sifive.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
 M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
 M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll

 Log Message:
 -----------
 [RISCV][llvm] Correct shamt in P extension EXTRACT_VECTOR_ELT lowering (#169823)

During operation legalization, element type should have been turn into
XLenVT which makes the SHL a no-op. We need to use exact vector element
type instead.


 Commit: 81c5d468cf00d6e41112fba6c89d6c40013bcbda
 https://github.com/llvm/llvm-project/commit/81c5d468cf00d6e41112fba6c89d6c40013bcbda
 Author: Men-cotton <mencotton0410 at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
 A mlir/test/Dialect/LLVMIR/nvvm-target-invalid.mlir

 Log Message:
 -----------
 [MLIR][NVVM] Propagate verification failure for unsupported SM targets (#170001)

Fixes: https://github.com/llvm/llvm-project/issues/169113

Correctly propagate verification failure when
`NVVM::RequiresSMInterface` check fails during `gpu.module`
verification.
Previously, the walk was interrupted but the function returned
`success()`, causing a mismatch between the emitted diagnostic and the
return status. This led to assertion failures in Python bindings which
expect `failure()` when diagnostics are emitted.

CC: @grypp


 Commit: 036279addf48cc5a5d7596f4abd06d33242f4f19
 https://github.com/llvm/llvm-project/commit/036279addf48cc5a5d7596f4abd06d33242f4f19
 Author: Jason Molenda <jmolenda at apple.com>
 Date: 2025-11-30 (Sun, 30 Nov 2025)

 Changed paths:
 M lldb/tools/debugserver/source/DNB.cpp
 M lldb/tools/debugserver/source/MacOSX/MachProcess.h
 M lldb/tools/debugserver/source/MacOSX/MachProcess.mm

 Log Message:
 -----------
 [lldb][debugserver] Return shared cache filepath in jGetSharedCacheInfo (#168474)

Add a "shared_cache_path" key-value to the jGetSharedCacheInfo response,
if we can fetch the shared cache path.

If debugserver and the inferior process are running with the same shared
cache UUID, there is a simple SPI to get debugserver's own shared cache
filepath and we will return that.

On newer OSes, there are SPI we can use to get the inferior process'
shared cache filepath, use that if necessary and the SPI are available.

The response for the jGetSharedCacheInfo packet will now look like


{"shared_cache_base_address":6609256448,"shared_cache_uuid":"B69FF43C-DBFD-3FB1-B4FE-A8FE32EA1062","no_shared_cache":false,"shared_cache_private_cache":false,"shared_cache_path":"/System/Volumes/Preboot/Cryptexes/OS/System/Library/dyld/dyld_shared_cache_arm64e"}

when we have the full information about the shared cache in the
inferior. There are three possible types of responses:

1. inferior has not yet mapped in a shared cache (read: when stopped at
dyld_start and dyld hasn't started executing yet). In this case, no
"shared_cache_path" is listed. ("shared_cache_base_address" will be 0,
"shared_cache_uuid" will be all-zeroes uuid)

2. inferior has a shared cache, but it is different than debugserver's
and we do not have the new SPI to query the shared cache filepath. No
"shared_cache_path" is listed.

3. We were able to find the shared cache filepath, and it is included in
the response, as above.

I'm not using this information in lldb yet, but changes that build on
this will be forthcoming.

rdar://148939795


 Commit: 9416b19e4f3b471216dcc3fcabac98f2a430faea
 https://github.com/llvm/llvm-project/commit/9416b19e4f3b471216dcc3fcabac98f2a430faea
 Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
 M llvm/test/Transforms/InstCombine/saturating-add-sub.ll

 Log Message:
 -----------
 [InstCombine] Add missing constant check (#170068)

`cast<Constant>` is not guarded by a type check during canonicalization
of predicates. This patch adds a type check in the outer if to avoid the
crash. `dyn_cast` may introduce another nested if, so I just use
`isa<Constant>` instead.

Address the crash reported in
https://github.com/llvm/llvm-project/pull/153053#issuecomment-3593914124.


 Commit: dc5ce79cc143e2e33e9cabbaa41349199b919cda
 https://github.com/llvm/llvm-project/commit/dc5ce79cc143e2e33e9cabbaa41349199b919cda
 Author: Luke Lau <luke at igalia.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/test/Transforms/LoopVectorize/struct-return.ll

 Log Message:
 -----------
 [LV] Regenerate some check lines. NFC

The scalar loop doesn't exist anymore after 8907b6d39371d439461cdd3475d5590f87821377


 Commit: bbb0dbadfaf292766922f5914f1c8946e2ef8519
 https://github.com/llvm/llvm-project/commit/bbb0dbadfaf292766922f5914f1c8946e2ef8519
 Author: Timm Baeder <tbaeder at redhat.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang/include/clang/AST/Decl.h
 M clang/lib/AST/ComparisonCategories.cpp
 M clang/lib/AST/ExprConstant.cpp
 M clang/lib/CodeGen/CGHLSLRuntime.cpp
 M clang/lib/Sema/CodeCompleteConsumer.cpp

 Log Message:
 -----------
 [clang][AST] Add `RecordDecl::getNumFields()` (#170022)

Not sure why that didn't exist yet, but we have quite a few places using
the same `std::distance` pattern.


 Commit: a751ed97acf1ea760d6724bc6ea72b1b9b59a448
 https://github.com/llvm/llvm-project/commit/a751ed97acf1ea760d6724bc6ea72b1b9b59a448
 Author: Vasily Leonenko <vleonen at users.noreply.github.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M bolt/docs/CommandLineArgumentReference.md
 M bolt/include/bolt/Core/BinaryContext.h
 M bolt/include/bolt/Rewrite/RewriteInstance.h
 M bolt/lib/Rewrite/RewriteInstance.cpp
 M bolt/test/AArch64/hook-fini.s
 A bolt/test/AArch64/hook-init.s
 A bolt/test/X86/hook-init.s
 M bolt/test/X86/internal-call-instrument-so.s
 M bolt/test/runtime/X86/instrument-wrong-target.s

 Log Message:
 -----------
 [BOLT] Support runtime library hook via DT_INIT_ARRAY (#167467)

Major part of this PR is commit implementing support for DT_INIT_ARRAY
for BOLT runtime libraries initialization. Also, it adds related
hook-init test & fixes couple of X86 instrumentation tests.

This commit follows implementation of instrumentation hook via
DT_FINI_ARRAY (https://github.com/llvm/llvm-project/pull/67348) and
extends it for BOLT runtime libraries (including instrumentation
library) initialization hooking.

Initialization has has differences compared to finalization:
- Executables always use ELF entry point address. Update code checks it
and updates init_array entry if ELF is shared library (have no interp
entry) and have no DT_INIT entry. Also this commit introduces
"runtime-lib-init-hook" option to select primary initialization hook
(entry_point, init, init_array) with fall back to next available hook in
input binary. e.g. in case of libc we can explicitly set it to
init_array.
- Shared library init_array entries relocations usually has
R_AARCH64_ABS64 type on AArch64 binaries. We check relocation type and
adjust methods for reading init_array relocations in discovery and
update methods.

---------

Co-authored-by: Vasily Leonenko <vasily.leonenko at huawei.com>


 Commit: 4d7abe535512e1076ff7e5fea14afde29615a8ed
 https://github.com/llvm/llvm-project/commit/4d7abe535512e1076ff7e5fea14afde29615a8ed
 Author: Matthias Springer <me at m-sp.org>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
 M mlir/lib/ExecutionEngine/APFloatWrappers.cpp
 M mlir/test/Conversion/ArithToApfloat/arith-to-apfloat.mlir
 M mlir/test/Integration/Dialect/Arith/CPU/test-apfloat-emulation.mlir

 Log Message:
 -----------
 [mlir][arith] Add support for `cmpf` to `ArithToAPFloat` (#169753)

Add support for `arith.cmpf`.


 Commit: 17677ad7eb2b2391d61c976887bbd2616e7d6c3e
 https://github.com/llvm/llvm-project/commit/17677ad7eb2b2391d61c976887bbd2616e7d6c3e
 Author: David Sherwood <david.sherwood at arm.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
 M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll

 Log Message:
 -----------
 [LV] Don't create WidePtrAdd recipes for scalar VFs (#169344)

While attempting to remove the use of undef from more loop vectoriser
tests I discovered a bug where this assert was firing:

```
llvm::Constant* llvm::Constant::getSplatValue(bool) const: Assertion `this->getType()->isVectorTy() && "Only valid for vectors!"' failed.
...
 #8 0x0000aaaab9e2fba4 llvm::Constant::getSplatValue
 #9 0x0000aaaab9dfb844 llvm::ConstantFoldBinaryInstruction
```

This seems to be happening because we are incorrectly generating
WidePtrAdd recipes for scalar VFs. The PR fixes this by checking whether
a plan has a scalar VF only in legalizeAndOptimizeInductions.

This PR also removes the use of undef from the test `both` in
Transforms/LoopVectorize/iv_outside_user.ll, which is what started
triggering the assert.

Fixes #169334


 Commit: 7ce71414ec3c7eebe77c1c248c119a7df5067369
 https://github.com/llvm/llvm-project/commit/7ce71414ec3c7eebe77c1c248c119a7df5067369
 Author: Abhishek Varma <avarma094 at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M mlir/lib/Dialect/Linalg/Utils/Utils.cpp

 Log Message:
 -----------
 [NFC][Linalg] Follow-up on ConvMatchBuilder (#170080)

-- This commit addresses [follow-up review comments on
169704](https://github.com/llvm/llvm-project/pull/169704#pullrequestreview-3521785548).
-- Contains NFC nit/minor changes.

Signed-off-by: Abhishek Varma <abhvarma at amd.com>


 Commit: f67b01847031aadd4d9d9b90e82c99d0490c4287
 https://github.com/llvm/llvm-project/commit/f67b01847031aadd4d9d9b90e82c99d0490c4287
 Author: Matthias Springer <me at m-sp.org>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M mlir/test/Conversion/UBToSPIRV/ub-to-spirv.mlir

 Log Message:
 -----------
 [mlir][SPIRV] Improve ub.unreachable lowering test case (#170083)

Addresses a comment on the PR that introduces the ub.reachable ->
spriv.Unreachable lowering
(https://github.com/llvm/llvm-project/pull/169872#discussion_r2573670611).


 Commit: 05b19895510af314a78ed42c6a969c4478a8f496
 https://github.com/llvm/llvm-project/commit/05b19895510af314a78ed42c6a969c4478a8f496
 Author: Matthias Springer <me at m-sp.org>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
 M mlir/lib/ExecutionEngine/APFloatWrappers.cpp
 M mlir/test/Conversion/ArithToApfloat/arith-to-apfloat.mlir
 M mlir/test/Integration/Dialect/Arith/CPU/test-apfloat-emulation.mlir

 Log Message:
 -----------
 [mlir][arith] Add support for `negf` to `ArithToAPFloat` (#169759)

Add support for `arith.negf`.


 Commit: 9afb651613a9383923b0f52885fb2221a5ec134f
 https://github.com/llvm/llvm-project/commit/9afb651613a9383923b0f52885fb2221a5ec134f
 Author: ShashwathiNavada <shashwathinavada at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang/docs/OpenMPSupport.rst
 M clang/include/clang/AST/OpenMPClause.h
 M clang/include/clang/Basic/OpenMPKinds.def
 M clang/include/clang/Sema/SemaOpenMP.h
 M clang/lib/AST/OpenMPClause.cpp
 M clang/lib/CodeGen/CGOpenMPRuntime.cpp
 M clang/lib/Parse/ParseOpenMP.cpp
 M clang/lib/Sema/SemaOpenMP.cpp
 M clang/lib/Sema/TreeTransform.h
 M clang/lib/Serialization/ASTReader.cpp
 M clang/lib/Serialization/ASTWriter.cpp
 M clang/test/OpenMP/target_update_codegen.cpp
 A clang/test/OpenMP/target_update_iterator_ast_print.cpp
 A clang/test/OpenMP/target_update_iterator_serialization.cpp

 Log Message:
 -----------
 Adding support for iterator in motion clauses. (#159112)

As described in section 2.14.6 of openmp spec, the patch implements
support for iterator in motion clauses.

---------

Co-authored-by: Shashwathi N <nshashwa at pe31.hpc.amslabs.hpecorp.net>


 Commit: 147c466bcd0efcd3efe7b403db441ec8d4912d6a
 https://github.com/llvm/llvm-project/commit/147c466bcd0efcd3efe7b403db441ec8d4912d6a
 Author: Matthias Springer <me at m-sp.org>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
 M mlir/lib/ExecutionEngine/APFloatWrappers.cpp
 M mlir/test/Conversion/ArithToApfloat/arith-to-apfloat.mlir
 M mlir/test/Integration/Dialect/Arith/CPU/test-apfloat-emulation.mlir

 Log Message:
 -----------
 [mlir][arith] Add support for min/max to `ArithToAPFloat` (#169760)

Add support for `arith.minnumf`, `arith.maxnumf`, `arith.minimumf`,
`arith.maximumf`.


 Commit: eb711d8e142683e06ae14b652218b881896f5046
 https://github.com/llvm/llvm-project/commit/eb711d8e142683e06ae14b652218b881896f5046
 Author: Carlos Galvez <carlosgalvezp at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-bounds-avoid-unchecked-container-access.rst

 Log Message:
 -----------
 [clang-tidy][doc] Fix incorrect link syntax in cppcoreguidelines-pro-… (#170088)

…bounds-avoid-unchecked-container-access

Missing a trailing underscore to render it as a link.

Co-authored-by: Carlos Gálvez <carlos.galvez at zenseact.com>


 Commit: 8079d033c97f3ad8d289fa014b0f1c85cf3bbbad
 https://github.com/llvm/llvm-project/commit/8079d033c97f3ad8d289fa014b0f1c85cf3bbbad
 Author: Steven Wu <stevenwu at apple.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/unittests/CAS/CASTestConfig.h

 Log Message:
 -----------
 [CAS] Temporarily skip tests on old windows version (#170063)


 Commit: 8e6fb0ee84dcfba7e712f3ee4cc9d9819bc2a757
 https://github.com/llvm/llvm-project/commit/8e6fb0ee84dcfba7e712f3ee4cc9d9819bc2a757
 Author: Gergely Bálint <gergely.balint at arm.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M bolt/lib/Passes/Inliner.cpp
 A bolt/test/AArch64/inline-bti-dbg.s
 A bolt/test/AArch64/inline-bti.s

 Log Message:
 -----------
 Reapply "[BOLT][BTI] Skip inlining BasicBlocks containing indirect tailcalls" (#169881) (#169929)

This reapplies commit 5d6d74359d69d3aada6a46c7cf51d84eb0848b70.

Fix: added assertions to the requirements of the test

--------

Original commit message:

In the Inliner pass, tailcalls are converted to calls in the inlined
BasicBlock. If the tailcall is indirect, the `BR` is converted to `BLR`.

These instructions require different BTI landing pads at their targets.

As the targets of indirect tailcalls are unknown, inlining such blocks
is unsound for BTI: they should be skipped instead.


 Commit: dda15ad0aadf0bf485498e3d5f22e5caf94925e5
 https://github.com/llvm/llvm-project/commit/dda15ad0aadf0bf485498e3d5f22e5caf94925e5
 Author: Igor Wodiany <igor.wodiany at imgtec.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
 M mlir/lib/Target/SPIRV/Deserialization/Deserializer.h

 Log Message:
 -----------
 [mlir][spirv] Use MapVector for BlockMergeInfoMap (#169636)

This should ensure that the structurizer while loop is deterministic
across runs. Use of `MapVector` addresses the source of the
nondeterminism which is use of a `Block*` as a map key.

fixes #128547


 Commit: 1317083530b95fcf052f3017394a7719a67546fa
 https://github.com/llvm/llvm-project/commit/1317083530b95fcf052f3017394a7719a67546fa
 Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
 M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
 M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
 M llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
 M llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
 M llvm/test/CodeGen/AArch64/sme-za-exceptions.ll
 M llvm/test/CodeGen/AArch64/sme-zt0-state.ll

 Log Message:
 -----------
 [AArch64][SME] Support saving/restoring ZT0 in the MachineSMEABIPass (#166362)

This patch extends the MachineSMEABIPass to support ZT0. This is done
with the addition of two new states:

- `ACTIVE_ZT0_SAVED`
 * This is used when calling a function that shares ZA, but does not 
 share ZT0 (i.e., no ZT0 attributes)
 * This state indicates ZT0 must be saved to the save slot, but ZA must 
 remain on, with no lazy save setup
- `LOCAL_COMMITTED`
 * This is used for saving ZT0 in functions without ZA state
 * This state indicates ZA is off and ZT0 has been saved
 * This state is general enough to support ZA, but the required 
 transitions have not been implemented†

To aid with readability, the state transitions have been reworked to a
switch of `transitionFrom(<FromState>).to(<ToState>)`, rather than 
nested ifs, which helps manage more transitions.

† This could be implemented to handle some cases of undefined behavior
better.


 Commit: 34c44f21ae9bf5532e467fa2e942fe61715d1394
 https://github.com/llvm/llvm-project/commit/34c44f21ae9bf5532e467fa2e942fe61715d1394
 Author: Tom Eccles <tom.eccles at arm.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M flang/include/flang/Optimizer/Analysis/TBAAForest.h
 M flang/lib/Optimizer/Analysis/TBAAForest.cpp
 M flang/lib/Optimizer/Transforms/AddAliasTags.cpp
 M flang/test/Driver/tco-test-gen.fir
 M flang/test/Fir/tbaa-codegen2.fir
 M flang/test/Transforms/tbaa-for-common-vars.fir
 M flang/test/Transforms/tbaa-for-global-equiv-vars.fir
 M flang/test/Transforms/tbaa-for-local-vars.fir
 M flang/test/Transforms/tbaa-with-dummy-scope.fir
 M flang/test/Transforms/tbaa-with-dummy-scope2.fir
 M flang/test/Transforms/tbaa2.fir
 M flang/test/Transforms/tbaa3.fir
 M flang/test/Transforms/tbaa4.fir

 Log Message:
 -----------
 [flang][TBAA] refine TARGET/POINTER encoding (#169544)

Previously we were less specific for POINTER/TARGET: encoding that they
could alias with (almost) anything.

In the new system, the "target data" tree is now a sibling of the other
trees (e.g. "global data"). POITNTER variables go at the root of the
"target data" tree, whereas TARGET variables get their own nodes under
that tree. For example,

```
integer, pointer :: ip
real, pointer :: rp
integer, target :: it
integer, target :: it2(:)
real, target :: rt
integer :: i
real :: r
```
- `ip` and `rp` may alias with any variable except `i` and `r`.
- `it`, `it2`, and `rt` may alias only with `ip` or `rp`.
- `i` and `r` cannot alias with any other variable.

Fortran 2023 15.5.2.14 gives restrictions on entities associated with
dummy arguments. These do not allow non-target globals to be modified
through dummy arguments and therefore I don't think we need to make all
globals alias with dummy arguments.

I haven't implemented it in this patch, but I wonder whether it is ever
possible for `ip` to alias with `rt` or even `it2`.

While I was updating the tests I fixed up some tests that still assumed
that local alloc tbaa wasn't the default.

I found no functional regressions in the gfortran test suite, fujitsu
test suite, spec2017, or a selection of HPC apps we test internally.


 Commit: 8ec2112ec8b43a0fdf8f5e000f0c6376b6105987
 https://github.com/llvm/llvm-project/commit/8ec2112ec8b43a0fdf8f5e000f0c6376b6105987
 Author: Tom Eccles <tom.eccles at arm.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang/test/OpenMP/cancel_codegen.cpp
 M clang/test/OpenMP/critical_codegen.cpp
 M clang/test/OpenMP/critical_codegen_attr.cpp
 M clang/test/OpenMP/irbuilder_nested_parallel_for.c
 M clang/test/OpenMP/masked_codegen.cpp
 M clang/test/OpenMP/master_codegen.cpp
 M clang/test/OpenMP/nested_loop_codegen.cpp
 M clang/test/OpenMP/ordered_codegen.cpp
 M clang/test/OpenMP/parallel_codegen.cpp
 M flang/test/Integration/OpenMP/parallel-private-reduction-worstcase.f90
 M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
 M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
 M llvm/test/Transforms/OpenMP/parallel_region_merging.ll
 M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
 M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
 M mlir/test/Target/LLVMIR/openmp-barrier-cancel.mlir
 M mlir/test/Target/LLVMIR/openmp-cancel.mlir
 M mlir/test/Target/LLVMIR/openmp-cancellation-point.mlir
 M mlir/test/Target/LLVMIR/openmp-outline-infinite-loop.mlir
 M mlir/test/Target/LLVMIR/openmp-parallel-reduction-multiblock.mlir
 M mlir/test/Target/LLVMIR/openmp-reduction-array-sections.mlir
 M mlir/test/Target/LLVMIR/openmp-reduction-init-arg.mlir
 M mlir/test/Target/LLVMIR/openmp-reduction-sections.mlir

 Log Message:
 -----------
 [OMPIRBuilder] re-land cancel barriers patch #164586 (#169931)

A barrier will pause execution until all threads reach it. If some go to
a different barrier then we deadlock. This manifests in that the
finalization callback must only be run once. Fix by ensuring we always
go through the same finalization block whether the thread in cancelled
or not and no matter which cancellation point causes the cancellation.

The old callback only affected PARALLEL, so it has been moved into the
code generating PARALLEL. For this reason, we don't need similar changes
for other cancellable constructs. We need to create the barrier on the
shared exit from the outlined function instead of only on the cancelled
branch to make sure that threads exiting normally (without cancellation)
meet the same barriers as those which were cancelled. For example,
previously we might have generated code like

```
...
 %ret = call i32 @__kmpc_cancel(...)
 %cond = icmp eq i32 %ret, 0
 br i1 %cond, label %continue, label %cancel

continue:
 // do the rest of the callback, eventually branching to %fini
 br label %fini

cancel:
 // Populated by the callback:
 // unsafe: if any thread makes it to the end without being cancelled
 // it won't reach this barrier and then the program will deadlock
 %unused = call i32 @__kmpc_cancel_barrier(...)
 br label %fini

fini:
 // run destructors etc
 ret
```

In the new version the barrier is moved into fini. I generate it *after*
the destructors because the standard describes the barrier as occurring
after the end of the parallel region.

```
...
 %ret = call i32 @__kmpc_cancel(...)
 %cond = icmp eq i32 %ret, 0
 br i1 %cond, label %continue, label %cancel

continue:
 // do the rest of the callback, eventually branching to %fini
 br label %fini

cancel:
 br label %fini

fini:
 // run destructors etc
 // safe so long as every exit from the function happens via this block:
 %unused = call i32 @__kmpc_cancel_barrier(...)
 ret
```

To achieve this, the barrier is now generated alongside the finalization
code instead of in the callback. This is the reason for the changes to
the unit test.

I'm unsure if I should keep the incorrect barrier generation callback
only on the cancellation branch in clang with the OMPIRBuilder backend
because that would match clang's ordinary codegen. Right now I have
opted to remove it entirely because it is a deadlock waiting to happen.

---

This re-lands #164586 with a small fix for a failing buildbot running
address sanitizer on clang lit tests.

In the previous version of the patch I added an insertion point guard
"just to be safe" and never removed it. There isn't insertion point
guarding on the other route out of this function and we do not
preserve the insertion point around getFiniBB either so it is not
needed here.

The problem flagged by the sanitizers was because the saved insertion
point pointed to an instruction which was then removed inside the FiniCB
for some clang codegen functions. The instruction was freed when it was
removed. Then accessing it to restore the insertion point was a use
after free bug.


 Commit: 2c9e9ffa77e37fa0ff5d15325dab5471636b8a44
 https://github.com/llvm/llvm-project/commit/2c9e9ffa77e37fa0ff5d15325dab5471636b8a44
 Author: Luke Lau <luke at igalia.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Transforms/Utils/SCCPSolver.cpp
 A llvm/test/Transforms/SCCP/get_vector_length-intrinsic.ll

 Log Message:
 -----------
 [SCCP] Handle llvm.experimental.get.vector.length calls (#169527)

As noted in the reproducer provided in
https://github.com/llvm/llvm-project/issues/164762#issuecomment-3554719231,
on RISC-V after LTO we sometimes have trip counts exposed to vectorized
loops. The loop vectorizer will have generated calls to
@llvm.experimental.get.vector.length, but there are [some
properties](https://llvm.org/docs/LangRef.html#id2399) about the
intrinsic we can use to simplify it:

- The result is always less than both Count and MaxLanes
- If Count <= MaxLanes, then the result is Count

This teaches SCCP to handle these cases with the intrinsic, which allows
some single-iteration-after-LTO loops to be unfolded.

#169293 is related and also simplifies the intrinsic in InstCombine via
computeKnownBits, but it can't fully remove the loop since
computeKnownBits only does limited reasoning on recurrences.


 Commit: b1620996f49611767d1950927835fa20284355d5
 https://github.com/llvm/llvm-project/commit/b1620996f49611767d1950927835fa20284355d5
 Author: Timm Baeder <tbaeder at redhat.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang/lib/AST/ByteCode/Compiler.cpp
 M clang/test/AST/ByteCode/c.c

 Log Message:
 -----------
 [clang][bytecode] Fix discarding ImplitiValueInitExprs (#170089)

They don't have side-effects, so this should be fine.

Fixes https://github.com/llvm/llvm-project/issues/170064


 Commit: d1500d12be60f21f9a80fdbfb3cfa24b8f20a0c9
 https://github.com/llvm/llvm-project/commit/d1500d12be60f21f9a80fdbfb3cfa24b8f20a0c9
 Author: Luke Lau <luke at igalia.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/include/llvm/CodeGen/SelectionDAG.h
 M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
 M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
 M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
 M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
 M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
 M llvm/lib/Target/RISCV/RISCVISelLowering.cpp

 Log Message:
 -----------
 [SelectionDAG] Add SelectionDAG::getTypeSize. NFC (#169764)

Similar to how getElementCount avoids the need to reason about fixed and
scalable ElementCounts separately, this patch adds getTypeSize to do the
same for TypeSize.

It also goes through and replaces some of the manual uses of getVScale
with getTypeSize/getElementCount where possible.


 Commit: b7721c55fc09616d186bbe1f9e3e4b9df8fb4009
 https://github.com/llvm/llvm-project/commit/b7721c55fc09616d186bbe1f9e3e4b9df8fb4009
 Author: Jim Lin <jim at andestech.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/test/CodeGen/RISCV/zicond-fp-select-zfinx.ll

 Log Message:
 -----------
 [RISCV] Remove the duplicate for RV32/RV64 in zicond-fp-select-zfinx.ll. NFC.


 Commit: 8ceeba83812d551423a9e50f600cc77ea4718ca2
 https://github.com/llvm/llvm-project/commit/8ceeba83812d551423a9e50f600cc77ea4718ca2
 Author: Ming Yan <ming.yan at terapines.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M mlir/lib/Dialect/SCF/IR/SCF.cpp
 M mlir/test/Dialect/SCF/canonicalize.mlir

 Log Message:
 -----------
 [MLIR][SCF] Canonicalize redundant scf.if from scf.while before region into after region (#169892)

When a `scf.if` directly precedes a `scf.condition` in the before region
of a `scf.while` and both share the same condition, move the if into the
after region of the loop. This helps simplify the control flow to enable
uplifting `scf.while` to `scf.for`.


 Commit: 29fef3a51e6dcc5e6b5683c281ce7c19b19f0bbf
 https://github.com/llvm/llvm-project/commit/29fef3a51e6dcc5e6b5683c281ce7c19b19f0bbf
 Author: Gergely Bálint <gergely.balint at arm.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M bolt/docs/PacRetDesign.md
 M bolt/include/bolt/Passes/InsertNegateRAStatePass.h
 M bolt/lib/Passes/InsertNegateRAStatePass.cpp
 M bolt/unittests/CMakeLists.txt
 A bolt/unittests/Passes/CMakeLists.txt
 A bolt/unittests/Passes/InsertNegateRAState.cpp

 Log Message:
 -----------
 [BOLT] Improve DWARF CFI generation for pac-ret binaries (#163381)

During InsertNegateRAState pass we check the annotations on
instructions,
to decide where to generate the OpNegateRAState CFIs in the output
binary.

As only instructions in the input binary were annotated, we have to make
a judgement on instructions generated by other BOLT passes.
Incorrect placement may cause issues when an (async) unwind request
is received during the new "unknown" instructions.

This patch adds more logic to make a more informed decision on by taking
into account:
- unknown instructions in a BasicBlock with other instruction have the
same RAState. Previously, if the BasicBlock started with an unknown
instruction,
the RAState was copied from the preceding block. Now, the RAState is
copied from
 the succeeding instructions in the same block.
- Some BasicBlocks may only contain instructions with unknown RAState,
As explained in issue #160989, these blocks already have incorrect
unwind info. Because of this, the last known RAState based on the layout order
is copied.

Updated bolt/docs/PacRetDesign.md to reflect changes.


 Commit: 2c217909839b345760de964cf87bf1045c9ff784
 https://github.com/llvm/llvm-project/commit/2c217909839b345760de964cf87bf1045c9ff784
 Author: Ming Yan <ming.yan at terapines.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M mlir/lib/Dialect/SCF/Transforms/UpliftWhileToFor.cpp
 M mlir/test/Dialect/SCF/uplift-while.mlir

 Log Message:
 -----------
 Revert "[MLIR][SCF] Sink scf.if from scf.while before region into after region in scf-uplift-while-to-for" (#169888)

Reverts llvm/llvm-project#165216
It is implemented in #169892 .


 Commit: b60a84a46fa558dd14497f53fc8ad6f7ff505aaa
 https://github.com/llvm/llvm-project/commit/b60a84a46fa558dd14497f53fc8ad6f7ff505aaa
 Author: Tom Eccles <tom.eccles at arm.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M flang/include/flang/Optimizer/Analysis/TBAAForest.h
 M flang/lib/Optimizer/Analysis/TBAAForest.cpp
 M flang/lib/Optimizer/Transforms/AddAliasTags.cpp
 M flang/test/Driver/tco-test-gen.fir
 M flang/test/Fir/tbaa-codegen2.fir
 M flang/test/Transforms/tbaa-for-common-vars.fir
 M flang/test/Transforms/tbaa-for-global-equiv-vars.fir
 M flang/test/Transforms/tbaa-for-local-vars.fir
 M flang/test/Transforms/tbaa-with-dummy-scope.fir
 M flang/test/Transforms/tbaa-with-dummy-scope2.fir
 M flang/test/Transforms/tbaa2.fir
 M flang/test/Transforms/tbaa3.fir
 M flang/test/Transforms/tbaa4.fir

 Log Message:
 -----------
 Revert "[flang][TBAA] refine TARGET/POINTER encoding" (#170105)

Reverts llvm/llvm-project#169544

[Regressed](https://lab.llvm.org/buildbot/#/builders/143/builds/12956)
gfortran test suite


 Commit: bf22687c4842fe4f78cee34ec4e5e2d3e6e1fb59
 https://github.com/llvm/llvm-project/commit/bf22687c4842fe4f78cee34ec4e5e2d3e6e1fb59
 Author: Tom Eccles <tom.eccles at arm.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang/test/OpenMP/cancel_codegen.cpp
 M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
 M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
 M mlir/test/Target/LLVMIR/openmp-cancel.mlir

 Log Message:
 -----------
 [OMPIRBuilder] CANCEL IF(FALSE) is still a cancellation point (#170095)

>From OpenMP 4.0:

> When an if clause is present on a cancel construct and the if
expression
> evaluates to false, the cancel construct does not activate
cancellation.
> The cancellation point associated with the cancel construct is always
> encountered regardless of the value of the if expression.

This wording is retained unmodified in OpenMP 6.0.

This re-opens the already approved PR #164587, which was closed by
accident. The only changes are a rebase.


 Commit: 6c0a02f2adb4dd92c965bd5a70f19d59d4c597a5
 https://github.com/llvm/llvm-project/commit/6c0a02f2adb4dd92c965bd5a70f19d59d4c597a5
 Author: Simon Pilgrim <llvm-dev at redking.me.uk>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 A llvm/test/CodeGen/X86/combine-fsqrt.ll

 Log Message:
 -----------
 [X86] Add tests showing failure to concat sqrt intrinsics together. (#170096)

Similar to fdiv, we should be trying to concat these high latency instructions together


 Commit: 0e721b75aaa39181c71e798d5a95102eb349bf1c
 https://github.com/llvm/llvm-project/commit/0e721b75aaa39181c71e798d5a95102eb349bf1c
 Author: Simon Pilgrim <llvm-dev at redking.me.uk>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 A llvm/test/CodeGen/X86/combine-rcp.ll
 A llvm/test/CodeGen/X86/combine-rsqrt.ll

 Log Message:
 -----------
 [X86] Add tests showing failure to concat RCPPS + RSQRTPS intrinsics together. (#170098)

Can only do this for 128->256 cases as we can't safely convert to the RCP14/RSQRT14 variants


 Commit: edd1856686a44db896d64a3083619dfcc473a65f
 https://github.com/llvm/llvm-project/commit/edd1856686a44db896d64a3083619dfcc473a65f
 Author: Jasmine Tang <jjasmine at igalia.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
 M llvm/lib/Target/WebAssembly/WebAssemblyInstrInteger.td
 M llvm/test/CodeGen/WebAssembly/masked-shifts.ll

 Log Message:
 -----------
 [WebAssembly] Optimize away mask of 63 for shl ( zext (and i32 63))) (#152397)

Fixes https://github.com/llvm/llvm-project/issues/71844


 Commit: 130746addfed03e9a53b62dfc0da47e2c18ee959
 https://github.com/llvm/llvm-project/commit/130746addfed03e9a53b62dfc0da47e2c18ee959
 Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M mlir/lib/Dialect/SCF/IR/CMakeLists.txt

 Log Message:
 -----------
 [MLIR] Fix build after #169982 (#170107)


 Commit: 577cd6fb02959270dcdc48864ea0fba1d540cef4
 https://github.com/llvm/llvm-project/commit/577cd6fb02959270dcdc48864ea0fba1d540cef4
 Author: Mehdi Amini <joker.eph at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/utils/lit/lit/run.py
 M llvm/utils/lit/lit/util.py
 A llvm/utils/lit/tests/windows-pools.py

 Log Message:
 -----------
 [LIT] Workaround the 60 processed limit on Windows (#157759)

Python multiprocessing is limited to 60 workers at most:

https://github.com/python/cpython/blob/6bc65c30ff1fd0b581a2c93416496fc720bc442c/Lib/concurrent/futures/process.py#L669-L672

The limit being per thread pool, we can work around it by using multiple
pools on windows when we want to actually use more workers.


 Commit: 48931e5e5942304afd1c0a493be91b662ffd221b
 https://github.com/llvm/llvm-project/commit/48931e5e5942304afd1c0a493be91b662ffd221b
 Author: Timm Baeder <tbaeder at redhat.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang/lib/AST/ByteCode/InterpBuiltin.cpp
 M clang/test/AST/ByteCode/builtin-functions.cpp

 Log Message:
 -----------
 [clang][bytecode] Check memcmp builtin for one-past-the-end pointers (#170097)

We can't read from those and will run into an assertion sooner or later.

Fixes https://github.com/llvm/llvm-project/issues/170031


 Commit: d0df51bc93fb5a254dd8a05752b782a13dc1f64d
 https://github.com/llvm/llvm-project/commit/d0df51bc93fb5a254dd8a05752b782a13dc1f64d
 Author: Luke Lau <luke at igalia.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/IR/ConstantRange.cpp
 M llvm/lib/Transforms/Utils/SCCPSolver.cpp
 M llvm/unittests/IR/ConstantRangeTest.cpp

 Log Message:
 -----------
 [ConstantRange] Allow casting to the same bitwidth. NFC (#170102)

>From the review in
https://github.com/llvm/llvm-project/pull/169527#discussion_r2567122387,
there are some users where we want to extend or truncate a ConstantRange
only if it's not already the destination bitwidth. Previously this
asserted, so this PR relaxes it to just be a no-op, similar to
IRBuilder::createZExt and friends.


 Commit: 58770200a7045dd46dfb8c85299eee504d95026c
 https://github.com/llvm/llvm-project/commit/58770200a7045dd46dfb8c85299eee504d95026c
 Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/include/llvm/Analysis/DependenceAnalysis.h

 Log Message:
 -----------
 [DA] Clean up unnecessary member function declarations (#170106)

Follow-up for #169047. The previous PR moved some functions from DA to
Delinearization, but the member function declarations were not updated
accordingly. This patch removes them.


 Commit: 6157d4625941870392a0f5377b8ab08c4c204ce4
 https://github.com/llvm/llvm-project/commit/6157d4625941870392a0f5377b8ab08c4c204ce4
 Author: Sohaib Iftikhar <sohaibiftikhar at google.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

 Log Message:
 -----------
 [MLIR|BUILD]: Fix for 8ceeba838 (#170110)


 Commit: 989ac4c9db3aaa660dcfd0d1d5683b4c07dffaec
 https://github.com/llvm/llvm-project/commit/989ac4c9db3aaa660dcfd0d1d5683b4c07dffaec
 Author: Simon Pilgrim <llvm-dev at redking.me.uk>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 A llvm/test/CodeGen/X86/combine-fceil.ll
 A llvm/test/CodeGen/X86/combine-fnearbyint.ll
 A llvm/test/CodeGen/X86/combine-frint.ll
 A llvm/test/CodeGen/X86/combine-froundeven.ll
 A llvm/test/CodeGen/X86/combine-ftrunc.ll
 A llvm/test/CodeGen/X86/combine-rndscale.ll

 Log Message:
 -----------
 [X86] Add tests showing failure to concat fp rounding intrinsics together. (#170108)


 Commit: 8478de3d00a7a16b532b3902d5d9794405ae2379
 https://github.com/llvm/llvm-project/commit/8478de3d00a7a16b532b3902d5d9794405ae2379
 Author: Paul Walker <paul.walker at arm.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/include/llvm/CodeGen/SelectionDAG.h
 M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
 M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
 M llvm/test/CodeGen/AArch64/sve-extract-scalable-vector.ll
 M llvm/test/CodeGen/AArch64/sve-insert-vector.ll

 Log Message:
 -----------
 [LLVM][CodeGen] Remove failure cases when widening EXTRACT/INSERT_SUBVECTOR. (#162308)

This PR implements catch all handling for widening the scalable
subvector operand (INSERT_SUBVECTOR) or result (EXTRACT_SUBVECTOR). It
does this via the stack using masked memory operations. With general
handling available we can add optimiations for specific cases.


 Commit: d3edc94d113d2d30a7a26fa4d72496ac0b9256b8
 https://github.com/llvm/llvm-project/commit/d3edc94d113d2d30a7a26fa4d72496ac0b9256b8
 Author: Giacomo Castiglioni <giacastiglioni at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M mlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h
 M mlir/include/mlir/Dialect/GPU/IR/GPUBase.td
 M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
 M mlir/lib/Conversion/GPUToNVVM/WmmaOpsToNvvm.cpp
 M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
 M mlir/test/Conversion/GPUToNVVM/wmma-ops-to-nvvm.mlir
 M mlir/test/Dialect/GPU/invalid.mlir
 A mlir/test/Integration/GPU/CUDA/TensorCore/sm80/wmma-matmul-f64.mlir

 Log Message:
 -----------
 [MLIR][GPU] subgroup_mma fp64 extension - take 2 (#169061)

This PR re-lands #165873.

This PR extends the gpu.subgroup_mma_* ops to support fp64 type.
The extension requires special handling during the lowering to nvvm due
to the return type for load ops for fragment a and b (they return a
scalar instead of a struct).

The original PR did not guard the new test based on the required
architecture (sm80) which lead to a failure on the cuda runners with T4
GPUs.


 Commit: 05ad84095a04adba2a0d8699629fc3db705b23f6
 https://github.com/llvm/llvm-project/commit/05ad84095a04adba2a0d8699629fc3db705b23f6
 Author: Simon Pilgrim <llvm-dev at redking.me.uk>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Target/X86/X86ISelLowering.cpp
 M llvm/test/CodeGen/X86/combine-fsqrt.ll

 Log Message:
 -----------
 [X86] combineConcatVectorOps - add handling to concat sqrt intrinsics together (#170113)

Similar to fdiv, we should be trying to concat these high latency instructions together


 Commit: 4a6451af7b945bb8283ee71bf9628b385bd69ec0
 https://github.com/llvm/llvm-project/commit/4a6451af7b945bb8283ee71bf9628b385bd69ec0
 Author: Jasmine Tang <jjasmine at igalia.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang/include/clang/Basic/Attr.td

 Log Message:
 -----------
 Fix typo in attr.td: Avaiable -> Available (#170116)

Follow up to #163618


 Commit: 8808beeb1a35c8f2ffe228b9e91af5067388f909
 https://github.com/llvm/llvm-project/commit/8808beeb1a35c8f2ffe228b9e91af5067388f909
 Author: Robert Imschweiler <robert.imschweiler at amd.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M offload/include/OpenMP/omp.h
 M offload/include/omptarget.h
 M offload/libomptarget/OpenMP/API.cpp
 M offload/libomptarget/exports
 A offload/test/api/omp_device_uid.c
 M openmp/device/include/DeviceTypes.h
 M openmp/device/include/Interface.h
 M openmp/device/src/State.cpp
 M openmp/runtime/src/dllexports
 M openmp/runtime/src/include/omp.h.var
 M openmp/runtime/src/kmp_ftn_cdecl.cpp
 A openmp/runtime/test/api/omp_device_uid.c

 Log Message:
 -----------
 Reland: [OpenMP] Implement omp_get_uid_from_device() / omp_get_device_from_uid() (#168554)

Reland https://github.com/llvm/llvm-project/pull/164392 with Fortran support moved to follow-up PR


 Commit: d431f38860ff6759bb9648e5620d587c6581b951
 https://github.com/llvm/llvm-project/commit/d431f38860ff6759bb9648e5620d587c6581b951
 Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/test/Analysis/DependenceAnalysis/gcd-miv-overflow.ll

 Log Message:
 -----------
 [DA] Add tests for GCD MIV misses dependency due to overflow (NFC) (#169926)

Add two test cases where dependencies are missed due to overflows. These
will be fixed by #169927 and #169928, respectively.


 Commit: c25ad27174c47f01c7bd542fac55e8a7cdec5b73
 https://github.com/llvm/llvm-project/commit/c25ad27174c47f01c7bd542fac55e8a7cdec5b73
 Author: David Green <david.green at arm.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

 Log Message:
 -----------
 [AArch64] Remove unused references to MVT::f80. (#169545)

These f80 fp types are only supported on X86 and can be removed from
AArch64. It looks like they were copied from another backend by mistake.


 Commit: b27301ff5d9ab39ab4dfc5d0041273cdd80546a4
 https://github.com/llvm/llvm-project/commit/b27301ff5d9ab39ab4dfc5d0041273cdd80546a4
 Author: Ryan Holt <ryanholt at mathworks.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M mlir/test/Integration/Dialect/Linalg/CPU/runtime-verification.mlir

 Log Message:
 -----------
 [mlir][linalg] Re-enable linalg runtime verification test (#170129)

Test seems to pass after re-enabling without any additional changes.


 Commit: b4c30b0e1ece2bc97ef91e4bbed422c2e620be05
 https://github.com/llvm/llvm-project/commit/b4c30b0e1ece2bc97ef91e4bbed422c2e620be05
 Author: Mehdi Amini <joker.eph at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/utils/lit/tests/windows-pools.py

 Log Message:
 -----------
 Fix LLVM test to use %python instead of python

This uses lit substitution, which fixes running this test on
some environment where 'python' isn't in the path.


 Commit: 461433fea23d18d6a9da73bf09698bd4b3c68ef6
 https://github.com/llvm/llvm-project/commit/461433fea23d18d6a9da73bf09698bd4b3c68ef6
 Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Analysis/DependenceAnalysis.cpp
 M llvm/test/Analysis/DependenceAnalysis/gcd-miv-overflow.ll

 Log Message:
 -----------
 [DA] Add overflow check when calculating Delta in GCD MIV (#169928)

Add overflow check when computing `Delta` in `gcdMIVtest`.

Fix one of the tests added by #169926.


 Commit: aaa59e34894d3d0648631776afe2b297e2ad0895
 https://github.com/llvm/llvm-project/commit/aaa59e34894d3d0648631776afe2b297e2ad0895
 Author: Nico Weber <thakis at chromium.org>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/utils/gn/secondary/bolt/unittests/BUILD.gn
 A llvm/utils/gn/secondary/bolt/unittests/Passes/BUILD.gn
 M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn

 Log Message:
 -----------
 [gn] port 29fef3a51e6d (bolt PassTests)


 Commit: 4978cd3cdf64fb1cd87f1ddf73fc44bb8ca223c2
 https://github.com/llvm/llvm-project/commit/4978cd3cdf64fb1cd87f1ddf73fc44bb8ca223c2
 Author: Aiden Grossman <aidengrossman at google.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/utils/lit/tests/windows-pools.py

 Log Message:
 -----------
 Revert "Fix LLVM test to use %python instead of python"

This reverts commit b4c30b0e1ece2bc97ef91e4bbed422c2e620be05.

This substitution is not available from within these tests.


 Commit: 2538f6382a10af359c05a07738a0021f9eae221a
 https://github.com/llvm/llvm-project/commit/2538f6382a10af359c05a07738a0021f9eae221a
 Author: Igor Wodiany <igor.wodiany at imgtec.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
 M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
 M mlir/test/Target/SPIRV/selection.mlir

 Log Message:
 -----------
 [mlir][spirv] Support (de)serialization of block operands in `spirv.Switch` (#168899)


 Commit: ad656d3a1954dd6157ba689b3003b6fbb97a0833
 https://github.com/llvm/llvm-project/commit/ad656d3a1954dd6157ba689b3003b6fbb97a0833
 Author: Jakub Kuderski <jakub at nod-labs.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul-transpose-a.mlir
 M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul.mlir
 M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul.mlir

 Log Message:
 -----------
 [mlir][linalg][arm] Fix use of fill in arm integration tests (#170143)

Follow up to
https://github.com/llvm/llvm-project/pull/169567#issuecomment-3596220014


 Commit: 1ced99aa4a989b54bda8a68f0f39ecd9004afd81
 https://github.com/llvm/llvm-project/commit/1ced99aa4a989b54bda8a68f0f39ecd9004afd81
 Author: Mend Renovate <bot at renovateapp.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M .github/workflows/premerge.yaml

 Log Message:
 -----------
 [Github] Update actions/upload-artifact action to v5 (#170058)

This PR contains the following updates:

| Package | Type | Update | Change |
|---|---|---|---|
|
[actions/upload-artifact](https://redirect.github.com/actions/upload-artifact)
| action | major | `v4.6.2` -> `v5.0.0` |


 Commit: aa04b654b4113d3e2c1a36baf769d601ab378096
 https://github.com/llvm/llvm-project/commit/aa04b654b4113d3e2c1a36baf769d601ab378096
 Author: Mend Renovate <bot at renovateapp.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M .github/workflows/check-ci.yml
 M .github/workflows/ci-post-commit-analyzer.yml
 M .github/workflows/docs.yml
 M .github/workflows/gha-codeql.yml
 M .github/workflows/libc-fullbuild-tests.yml
 M .github/workflows/libc-overlay-tests.yml
 M .github/workflows/libclang-python-tests.yml
 M .github/workflows/libcxx-run-benchmarks.yml
 M .github/workflows/mlir-spirv-tests.yml
 M .github/workflows/premerge.yaml
 M .github/workflows/release-binaries.yml
 M .github/workflows/release-documentation.yml
 M .github/workflows/release-doxygen.yml
 M .github/workflows/scorecard.yml
 M .github/workflows/spirv-tests.yml

 Log Message:
 -----------
 [Github] Update GHA Dependencies (#170057)

This PR contains the following updates:

| Package | Type | Update | Change | Pending |
|---|---|---|---|---|
|
[actions/setup-python](https://redirect.github.com/actions/setup-python)
| action | minor | `v6.0.0` -> `v6.1.0` | |
|
[github/codeql-action](https://redirect.github.com/github/codeql-action)
| action | patch | `v4.31.4` -> `v4.31.5` | `v4.31.6` |
|
[hendrikmuhs/ccache-action](https://redirect.github.com/hendrikmuhs/ccache-action)
| action | patch | `v1.2.19` -> `v1.2.20` | |


 Commit: 235d44d8b6f40b8804537d950d5655fcfe80d9c7
 https://github.com/llvm/llvm-project/commit/235d44d8b6f40b8804537d950d5655fcfe80d9c7
 Author: Mehdi Amini <joker.eph at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/utils/lit/tests/lit.cfg
 M llvm/utils/lit/tests/windows-pools.py

 Log Message:
 -----------
 Fix LLVM test to use %python instead of python

This uses lit substitution, which fixes running this test on
some environment where 'python' isn't in the path.


 Commit: fa6d611f0a352967eefb8a8175f1556241cacc17
 https://github.com/llvm/llvm-project/commit/fa6d611f0a352967eefb8a8175f1556241cacc17
 Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Analysis/DependenceAnalysis.cpp
 M llvm/test/Analysis/DependenceAnalysis/gcd-miv-overflow.ll

 Log Message:
 -----------
 [DA] Remove special handling for SCEVAddExpr in GCD MIV (#169927)

In `gcdMIVtest`, there is logic that assumes the addition(s) of
`SCEVAddExpr` don't overflow without any checks. Adding overflow checks
would be fine, but this part appeart to be less useful. So this patch
removes it.

Fix one of the tests added in #169926.


 Commit: 3b9e203364dcd8234b12eb447ddbcf97a877558c
 https://github.com/llvm/llvm-project/commit/3b9e203364dcd8234b12eb447ddbcf97a877558c
 Author: Nikolas Klauser <nikolasklauser at berlin.de>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang/docs/LanguageExtensions.rst
 M clang/include/clang/Basic/BuiltinTemplates.td
 M clang/include/clang/Sema/Sema.h
 M clang/lib/Sema/SemaTemplate.cpp
 M clang/lib/Sema/SemaType.cpp
 M clang/lib/Sema/SemaTypeTraits.cpp
 A clang/test/SemaCXX/type-trait-common-reference.cpp
 M libcxx/include/__type_traits/common_reference.h
 M libcxx/include/module.modulemap.in

 Log Message:
 -----------
 [Clang] Add __builtin_common_reference (#121199)


 Commit: 97e0573f9e16fb6b7970130ff24e5c9eba98e164
 https://github.com/llvm/llvm-project/commit/97e0573f9e16fb6b7970130ff24e5c9eba98e164
 Author: Erich Keane <ekeane at nvidia.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
 M clang/test/CIR/IR/func.cir
 A clang/test/CIR/IR/invalid-func-attr.cir

 Log Message:
 -----------
 [CIR] Start printing/parsing func 'attributes' (#169674)

This patch adds a print and parse ability for the func to have
MLIR-standard 'attributes' printed along side the standard function.

This patch also seeds the initial "disallowed" list so that we don't
print things that we have custom printing for, AND will disallow them
from being parsed. I believe this list to be complete, and it passes all
tests.

This printing of attributes is necessary for testing some OpenACC things
that putting into the normal func-printing seems unnecessary.


 Commit: c7c6c0a45c1d840d05b414d73f7bab5136dcb8c2
 https://github.com/llvm/llvm-project/commit/c7c6c0a45c1d840d05b414d73f7bab5136dcb8c2
 Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
 M llvm/test/Transforms/AggressiveInstCombine/X86/or-load.ll

 Log Message:
 -----------
 [AggressiveInstCombine] Fix memory location for alias analysis (#169953)

When LOps.RootInsert comes after LI2, since we use LI2 as the new insert
point, we should make sure the memory region accessed by LOps isn't
modified. However, the original implementation passes the bit width
`LOps.LoadSize` as the number of bytes to be accessed, causing BasicAA
to return NoAlias:

https://github.com/llvm/llvm-project/blob/a941e150749650e6a75e948f10d46b0bedcc128b/llvm/lib/Analysis/BasicAliasAnalysis.cpp#L1658-L1667
With `-aa-trace`, we get:
```
End ptr getelementptr inbounds nuw (i8, ptr @g, i64 4) @ LocationSize::precise(1), %gep1 = getelementptr i8, ptr %p, i64 4 @ LocationSize::precise(32) = NoAlias
```
This patch uses `getTypeStoreSize` to compute the correct access size
for LOps. Instead of modifying the MemoryLocation for End (i.e.,
`LOps.RootInsert`), it also uses the computed base and AATag for
correctness.

Closes https://github.com/llvm/llvm-project/issues/169921.


 Commit: 7b6bf8b060f74669d7027d33f488a35cfb448b29
 https://github.com/llvm/llvm-project/commit/7b6bf8b060f74669d7027d33f488a35cfb448b29
 Author: Arseniy Zaostrovnykh <necto.ne at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp

 Log Message:
 -----------
 [NFC][analyzer] const ptr param in AnalysisConsumer::getModeForDecl (#170145)

This is a tiny change that would make the function contract more clear
and our work downstream easier.


 Commit: 10ceca8a9661fb700dc1288ba0cc21188663b2b9
 https://github.com/llvm/llvm-project/commit/10ceca8a9661fb700dc1288ba0cc21188663b2b9
 Author: Aaron <aaron at tinyblob.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M lldb/tools/lldb-dap/Handler/CompileUnitsRequestHandler.cpp
 M lldb/tools/lldb-dap/JSONUtils.cpp

 Log Message:
 -----------
 [lldb-dap] Fix segfault in JSONUtils.cpp when GetUUIDString() returns nullptr (#169844)

When creating a stack frame in JSONUtils.cpp CreateStackFrame() the code
constructs a std::string from module.GetUUIDString(), which can return
nullptr in some cases (as documented in the implementation of
SBModule::GetUUIDString()). This causes a segmentation fault when passed
to the std::string constructor.

This fix adds a null check before constructing the UUID string, falling
back to an empty string if nullptr is returned. The existing empty check
ensures the moduleId field is omitted from the JSON when no UUID exists.

rdar://163811812

---------

Co-authored-by: Ebuka Ezike <yerimyah1 at gmail.com>


 Commit: 73889c35713ecc659935445ef066fa74ae62f3fa
 https://github.com/llvm/llvm-project/commit/73889c35713ecc659935445ef066fa74ae62f3fa
 Author: Aiden Grossman <aidengrossman at google.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 A llvm/test/tools/llvm-exegesis/X86/snippet-generator-seed.test
 M llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp

 Log Message:
 -----------
 [llvm-exegesis] Add CLI Option to set Fixed RNG seed

The primary motivation for this is to set a fixed RNG seed for flaky
tests. This also has the bonus of adding debug logging for what seed
gets used which can make it much easier to reproduce issues that only
happen occasionally and are seed-dependent.

Reviewers: sjoerdmeijer, davemgreen, mshockwave

Reviewed By: davemgreen

Pull Request: https://github.com/llvm/llvm-project/pull/170013


 Commit: 37858b087a00e4cd7dd6e9983d4f45b015e9e3a1
 https://github.com/llvm/llvm-project/commit/37858b087a00e4cd7dd6e9983d4f45b015e9e3a1
 Author: Yu Hao <yuhaoyu at google.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang/docs/LibASTMatchersReference.html
 M clang/docs/ReleaseNotes.rst
 M clang/include/clang/ASTMatchers/ASTMatchers.h
 M clang/lib/ASTMatchers/ASTMatchersInternal.cpp
 M clang/lib/ASTMatchers/Dynamic/Registry.cpp
 M clang/unittests/ASTMatchers/ASTMatchersNodeTest.cpp

 Log Message:
 -----------
 [clang][ASTMatchers] Add `arrayTypeLoc` ast matcher for ArrayTypeLoc (#168990)

There's `arrayType` matcher for matching `ArrayType`, but no matcher for
`ArrayTypeLoc`. This change complements it.

Note that there's already `hasElementTypeLoc` matcher, which was
declared together with the `hasElementType` matcher.


 Commit: b76cada909cff3c63a454a97fd247388a3650b4c
 https://github.com/llvm/llvm-project/commit/b76cada909cff3c63a454a97fd247388a3650b4c
 Author: Simon Pilgrim <llvm-dev at redking.me.uk>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Target/X86/X86ISelLowering.cpp
 M llvm/test/CodeGen/X86/combine-rcp.ll
 M llvm/test/CodeGen/X86/combine-rsqrt.ll

 Log Message:
 -----------
 [X86] combineConcatVectorOps - add handling to concat RCPPS/RSQRTPS intrinsics together (#170148)

Limited to 128->256 cases as we can't safely convert to the RCP14/RSQRT14 variants


 Commit: 979a987d3ad51d421f091730a5a1cf9326b47bbc
 https://github.com/llvm/llvm-project/commit/979a987d3ad51d421f091730a5a1cf9326b47bbc
 Author: Aiden Grossman <aidengrossman at google.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
 A llvm/test/Transforms/WholeProgramDevirt/calls-to-devirt.ll
 M llvm/test/Transforms/WholeProgramDevirt/import.ll

 Log Message:
 -----------
 [WPD] Change Devirt Cutoff to use DebugCounter (#170009)

This removes the presence of global state from within the pass which is
blocking some efforts around test daemonization and is not good design
practice in general for LLVM. See

https://discourse.llvm.org/t/rfc-reducing-process-creation-overhead-in-llvm-regression-tests/88612/11
for more discussion.

This patch replaces the usage of global state with a DebugCounter, which
helps fix the global state problem and also increases the flexibility of
the option as now an explicit range can be passed.

Co-authored-by: Mingming Liu <mingmingl at google.com>


 Commit: 46c34bec134be0cb606fba1affbc70920b4fc266
 https://github.com/llvm/llvm-project/commit/46c34bec134be0cb606fba1affbc70920b4fc266
 Author: Jordan Rupprecht <rupprecht at google.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M third-party/benchmark/bindings/python/build_defs.bzl

 Log Message:
 -----------
 [benchmark][NFC] Update cc_binary load (#169710)

cc_binary now needs to be loaded from the rules_cc repo

I don't think this file is actually used, but updating it to be more
syntactically correct anyway.


 Commit: 9f54c2a6743ed4770c2453bb3a8b4d7ee8e2b152
 https://github.com/llvm/llvm-project/commit/9f54c2a6743ed4770c2453bb3a8b4d7ee8e2b152
 Author: Simon Pilgrim <llvm-dev at redking.me.uk>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/test/CodeGen/X86/combine-fsqrt.ll

 Log Message:
 -----------
 [X86] Add test coverage for the concatenation of vXf64 sqrt intrinsics (#170158)


 Commit: 318d932ca028830625290227004180c6d9c776f9
 https://github.com/llvm/llvm-project/commit/318d932ca028830625290227004180c6d9c776f9
 Author: Simon Pilgrim <llvm-dev at redking.me.uk>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Target/X86/X86ISelLowering.cpp
 M llvm/test/CodeGen/X86/combine-fceil.ll
 M llvm/test/CodeGen/X86/combine-fnearbyint.ll
 M llvm/test/CodeGen/X86/combine-frint.ll
 M llvm/test/CodeGen/X86/combine-froundeven.ll
 M llvm/test/CodeGen/X86/combine-ftrunc.ll
 M llvm/test/CodeGen/X86/combine-rndscale.ll

 Log Message:
 -----------
 [X86] combineConcatVectorOps - add handling to concat fp rounding intrinsics together (#170160)


 Commit: 9438b741d4491b400cb04b4ec47aae0936e2e954
 https://github.com/llvm/llvm-project/commit/9438b741d4491b400cb04b4ec47aae0936e2e954
 Author: Jonas Devlieghere <jonas at devlieghere.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M lldb/include/lldb/Utility/DataExtractor.h
 M lldb/include/lldb/Utility/RangeMap.h
 A lldb/include/lldb/Utility/VirtualDataExtractor.h
 M lldb/source/Utility/CMakeLists.txt
 A lldb/source/Utility/VirtualDataExtractor.cpp
 M lldb/unittests/Utility/CMakeLists.txt
 A lldb/unittests/Utility/VirtualDataExtractorTest.cpp

 Log Message:
 -----------
 [lldb] Add VirtualDataExtractor for virtual address translation (#168802)

Introduce VirtualDataExtractor, a DataExtractor subclass that enables
reading data at virtual addresses by translating them to physical buffer
offsets using a lookup table. The lookup table maps virtual address
ranges to physical offsets and enforces boundaries to prevent reads from
crossing entry limits.

The new class inherits from DataExtractor, overriding GetData and
PeekData to provide transparent virtual address translation for most of
the DataExtractor methods. The exception are the unchecked methods, that
bypass those methods and are overloaded as well.


 Commit: bb06f909433dc053166c0f02d4f5164b83b5b39f
 https://github.com/llvm/llvm-project/commit/bb06f909433dc053166c0f02d4f5164b83b5b39f
 Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/utils/gn/secondary/lldb/source/Utility/BUILD.gn

 Log Message:
 -----------
 [gn build] Port 9438b741d449


 Commit: f3cce97ba79ee507adfe4069ba907dcc842def31
 https://github.com/llvm/llvm-project/commit/f3cce97ba79ee507adfe4069ba907dcc842def31
 Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M flang/include/flang/Parser/openmp-utils.h

 Log Message:
 -----------
 [flang][OpenMP] Remove directive-specific code from GetOmpDirectiveNa… (#170157)

…me, NFC

It is unnecessary, existing overloads handle these cases already.


 Commit: fddf7b0510e5df7a08c512a177ea9c1ec4307718
 https://github.com/llvm/llvm-project/commit/fddf7b0510e5df7a08c512a177ea9c1ec4307718
 Author: Durgadoss R <durgadossr at nvidia.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
 M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
 M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
 M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
 A mlir/test/Target/LLVMIR/nvvm/mbar_arr_drop_expect_tx.mlir
 A mlir/test/Target/LLVMIR/nvvm/mbar_arr_expect_tx.mlir
 M mlir/test/Target/LLVMIR/nvvm/mbar_invalid.mlir

 Log Message:
 -----------
 [MLIR][NVVM] Update mbarrier.arrive.expect_tx Op (#169922)

This patch updates the mbarrier.arrive.expect_tx Op.
It also adds an Op for its arrive_drop version.

* No change in the existing inline-asm lowering.
 This functionality continues to work as is.
* An optional return value is added for shared_cta space.
* The scope and semantics are added as attributes.
* Inline-PTX lowering is available when `predicate` is provided.
 Otherwise, the Op lowers to intrinsics.
* lit tests are added to verify the lowering to intrinsics.
* Specific negative tests are added to check the invalid cases for
inline-ptx lowering.

Signed-off-by: Durgadoss R <durgadossr at nvidia.com>


 Commit: 40aa91f12a498b42be4eabbdacfb4c5e25a77be1
 https://github.com/llvm/llvm-project/commit/40aa91f12a498b42be4eabbdacfb4c5e25a77be1
 Author: anoopkg6 <anoop.kumar6 at ibm.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang/lib/Driver/ToolChains/Linux.cpp
 M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
 M compiler-rt/lib/tysan/tysan_platform.h

 Log Message:
 -----------
 [TySan] TySan support for SystemZ - Re-submission of original pr#162396 (#169850)

This is a re-submission of original reverted patch [(#162396)
](https://github.com/llvm/llvm-project/pull/162396url)for adding TySan
support for systemzZ along with build failure patch
[#169746](https://github.com/llvm/llvm-project/pull/169746).

See conversations in #169746.

Co-authored-by: anoopkg6 <anoopkg6 at github.com>


 Commit: 5c2601563789a232a9d0575c95edacdc2c25a97d
 https://github.com/llvm/llvm-project/commit/5c2601563789a232a9d0575c95edacdc2c25a97d
 Author: David Green <david.green at arm.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/test/CodeGen/AArch64/lrint-conv-fp16-win.ll
 M llvm/test/CodeGen/AArch64/lrint-conv-win.ll
 M llvm/test/CodeGen/AArch64/lround-conv-fp16-win.ll
 M llvm/test/CodeGen/AArch64/lround-conv-win.ll

 Log Message:
 -----------
 [AArch64][GlobalISel] Add GISel coverage for i32 lround and lrint. NFC


 Commit: 65666b2586383c34a4cdc3f324836192258dddc3
 https://github.com/llvm/llvm-project/commit/65666b2586383c34a4cdc3f324836192258dddc3
 Author: Igor Wodiany <igor.wodiany at imgtec.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 R mlir/test/Target/SPIRV/consecutive-selection.spv
 A mlir/test/Target/SPIRV/consecutive-selection.spvasm
 R mlir/test/Target/SPIRV/selection.spv
 A mlir/test/Target/SPIRV/selection.spvasm
 M mlir/test/lit.cfg.py

 Log Message:
 -----------
 [mlir][spirv] Rename `*.spv` tests to `*.spvasm`. (#170161)

This patch renames two of the SPIR-V tests to `*.spvasm` since both
files are assembly files, rather than SPIR-V binaries. The `lit.cfg.py`
is adjusted and we no longer need to run `*.spv` tests since none are
present.


 Commit: a15a6c870b9cf34340c3332b586beff6bdf15424
 https://github.com/llvm/llvm-project/commit/a15a6c870b9cf34340c3332b586beff6bdf15424
 Author: Sam Elliott <aelliott at qti.qualcomm.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Target/RISCV/RISCVFeatures.td
 M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
 M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
 M llvm/lib/Target/RISCV/RISCVInstrInfoSFB.td
 M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
 M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
 M llvm/lib/Target/RISCV/RISCVProcessors.td
 M llvm/lib/Target/RISCV/RISCVSubtarget.h
 M llvm/test/Analysis/CostModel/RISCV/cmp-select.ll
 M llvm/test/CodeGen/RISCV/cmov-branch-opt.ll
 M llvm/test/CodeGen/RISCV/features-info.ll
 M llvm/test/CodeGen/RISCV/min-max.ll
 M llvm/test/CodeGen/RISCV/select-bare.ll
 M llvm/test/CodeGen/RISCV/select-cc.ll
 M llvm/test/CodeGen/RISCV/select-cond.ll
 M llvm/test/CodeGen/RISCV/select-const.ll
 M llvm/test/CodeGen/RISCV/select.ll
 M llvm/test/CodeGen/RISCV/short-forward-branch-load-imm.ll
 M llvm/test/CodeGen/RISCV/short-forward-branch-opt-min-max.ll
 M llvm/test/CodeGen/RISCV/short-forward-branch-opt-mul.ll
 M llvm/test/CodeGen/RISCV/xqcicli.ll
 M llvm/test/CodeGen/RISCV/xqcicm.ll
 M llvm/test/CodeGen/RISCV/xqcics.ll

 Log Message:
 -----------
 [RISCV] Rename SFB Base Feature (#169607)

New SFB subsets are being added with the scheduler class name as a
suffix, so now is the time to go back to the base extension and add IALU
to its name.

This also:
- Drops a hyphen from the other SFB features for mul and minmax, to more
closely match their scheduling classes.
- Updates the predicates on specific SFB pseudos so we get verifier
errors if we introduce the pseudos when we don't have the right
subtarget feature.
- Updates the SFB Documentation comment to make it no longer
SiFive-specific.


 Commit: 8ccdb3540b6d9085bf2112aa7cbed4a292837c01
 https://github.com/llvm/llvm-project/commit/8ccdb3540b6d9085bf2112aa7cbed4a292837c01
 Author: Simon Pilgrim <llvm-dev at redking.me.uk>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 A llvm/test/CodeGen/X86/combine-ffloor.ll

 Log Message:
 -----------
 [X86] Add test coverage for the concatenation of ISD::FFLOOR intrinsics (#170168)

These were missed in #170160


 Commit: 4e316d7e81a3e481dc55804a662e6204ec6a62a6
 https://github.com/llvm/llvm-project/commit/4e316d7e81a3e481dc55804a662e6204ec6a62a6
 Author: Simon Pilgrim <llvm-dev at redking.me.uk>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 A llvm/test/CodeGen/X86/combine-fround.ll

 Log Message:
 -----------
 [X86] Add test coverage for the concatenation of ISD::FROUND intrinsics (#170166)

These were missed in #170160


 Commit: dae9139d8fecf09d975f59b012646bc04f694c35
 https://github.com/llvm/llvm-project/commit/dae9139d8fecf09d975f59b012646bc04f694c35
 Author: Muhammad Abdul <alilo.ghazali at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang/include/clang/Basic/BuiltinsX86.td
 M clang/lib/AST/ByteCode/InterpBuiltin.cpp
 M clang/lib/AST/ExprConstant.cpp
 M clang/lib/Headers/avx512bwintrin.h
 M clang/lib/Headers/avx512dqintrin.h
 M clang/lib/Headers/avx512fintrin.h
 M clang/test/CodeGen/X86/avx512bw-builtins.c
 M clang/test/CodeGen/X86/avx512dq-builtins.c
 M clang/test/CodeGen/X86/avx512f-builtins.c

 Log Message:
 -----------
 [X86][Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - allow AVX512 kmov intrinsics to be used in constexp (#169895)

Resolves #166975


 Commit: 8a3891ceadad3a156b8fbcdccd82f0aa7dece982
 https://github.com/llvm/llvm-project/commit/8a3891ceadad3a156b8fbcdccd82f0aa7dece982
 Author: Prasoon Mishra <Prasoon.Mishra at amd.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp

 Log Message:
 -----------
 [AMDGPU][NPM] Preserve analyses in AMDGPURewriteAGPRCopyMFMA for NPM (#170130)

The pass preserved LiveStacksAnalysis but failed to preserve
LiveIntervalsAnalysis, LiveRegMatrixAnalysis, VirtRegMapAnalysis, and
SlotIndexesAnalysis under NPM. This caused these analyses to be
invalidated and recomputed, leading to incorrect behavior in subsequent
passes like VirtRegRewriter.

Fix by explicitly preserving all required analyses in the NPM version,
matching the legacy pass manager behavior.

---------

Co-authored-by: vikhegde <vikram.hegde at amd.com>


 Commit: 3d862cfcea9bba5fe04d22beaa6c46f850a76a73
 https://github.com/llvm/llvm-project/commit/3d862cfcea9bba5fe04d22beaa6c46f850a76a73
 Author: Steven Perron <stevenperron at google.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
 M llvm/lib/CodeGen/GlobalISel/LegalityPredicates.cpp
 M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
 M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
 M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.h
 A llvm/test/CodeGen/SPIRV/legalization/vector-legalization-kernel.ll
 A llvm/test/CodeGen/SPIRV/legalization/vector-legalization-shader.ll

 Log Message:
 -----------
 [SPIRV] Add legalization for long vectors (#169665)

This patch introduces the necessary infrastructure to legalize vector
operations on vectors that are longer than what the SPIR-V target
supports. For instance, shaders only support vectors up to 4 elements.

The legalization is done by splitting the long vectors into smaller
vectors of a legal size.

Specifically, this patch does the following:
- Introduces `vectorElementCountIsGreaterThan` and
 `vectorElementCountIsLessThanOrEqualTo` legality predicates.
- Adds legalization rules for `G_SHUFFLE_VECTOR`,
`G_EXTRACT_VECTOR_ELT`,
 `G_BUILD_VECTOR`, `G_CONCAT_VECTORS`, `G_SPLAT_VECTOR`, and
 `G_UNMERGE_VALUES`.
- Handles `G_BITCAST` of long vectors by converting them to
 `@llvm.spv.bitcast` intrinsics which are then legalized.
- Updates `selectUnmergeValues` to handle extraction of both scalars
 and vectors from a larger vector, using `OpCompositeExtract` and
 `OpVectorShuffle` respectively.

Fixes https://github.com/llvm/llvm-project/pull/165444


 Commit: 25ab47bd407d6d92e587e2d545081ab25c909d86
 https://github.com/llvm/llvm-project/commit/25ab47bd407d6d92e587e2d545081ab25c909d86
 Author: Florian Hahn <flo at fhahn.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
 M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
 M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll

 Log Message:
 -----------
 [VPlan] Use wide IV if scalar lanes > 0 are used with scalable vectors. (#169796)

For scalable vectors, VPScsalarIVStepsRecipe cannot create all scalar
step values. At the moment, it creates a vector, in addition to to the
first lane. The only supported case for this is when only the last lane
is used. A recipe should not set both scalar and vector values.

Instead, we can simply use a vector induction. It would also be possible
to preserve the current vector code-gen, by creating VPInstructions
based on the first lane of VPScalarIVStepsRecipe, but using a vector
induction seems simpler.

PR: https://github.com/llvm/llvm-project/pull/169796


 Commit: a7c1f467339abd1942c89f2ef8b79083e89e7dad
 https://github.com/llvm/llvm-project/commit/a7c1f467339abd1942c89f2ef8b79083e89e7dad
 Author: Igor Wodiany <igor.wodiany at imgtec.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
 M mlir/lib/Target/SPIRV/Deserialization/Deserializer.h
 A mlir/test/Target/SPIRV/selection_switch.spvasm

 Log Message:
 -----------
 [mlir][spirv] Enable block splitting for `spirv.Switch` (#170147)

This is not strictly necessary as now selection regions can yield
values, however splitting the block simplifies the code as it avoids
unnecessary values being sunk just to be later yielded.


 Commit: 61881c307c059a43ec04b2f9a9923c57d9a38f23
 https://github.com/llvm/llvm-project/commit/61881c307c059a43ec04b2f9a9923c57d9a38f23
 Author: darkbuck <michael.hliao at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang/include/clang/AST/ASTContext.h
 M clang/include/clang/Basic/DiagnosticSemaKinds.td
 M clang/include/clang/Sema/SemaCUDA.h
 M clang/include/clang/Serialization/ASTReader.h
 M clang/lib/CodeGen/CGCUDARuntime.cpp
 M clang/lib/CodeGen/CGCUDARuntime.h
 M clang/lib/CodeGen/CGExprCXX.cpp
 M clang/lib/Sema/SemaCUDA.cpp
 M clang/lib/Sema/SemaDecl.cpp
 M clang/lib/Serialization/ASTReader.cpp
 M clang/lib/Serialization/ASTWriter.cpp
 M clang/test/CodeGenCUDA/Inputs/cuda.h
 A clang/test/CodeGenCUDA/device-kernel-call.cu
 M clang/test/Driver/nvlink-wrapper.c
 M clang/test/SemaCUDA/Inputs/cuda.h
 M clang/test/SemaCUDA/call-kernel-from-kernel.cu
 A clang/test/SemaCUDA/device-kernel-call.cu
 M clang/test/SemaCUDA/function-overload.cu
 M clang/test/SemaCUDA/function-target.cu
 M clang/test/SemaCUDA/reference-to-kernel-fn.cu
 M clang/tools/clang-nvlink-wrapper/ClangNVLinkWrapper.cpp
 M clang/tools/clang-nvlink-wrapper/NVLinkOpts.td

 Log Message:
 -----------
 [CUDA] Add device-side kernel launch support (#165519)

- CUDA's dynamic parallelism extension allows device-side kernel
launches, which share the identical syntax to host-side launches, e.g.,

 kernel<<<Dg, Db, Ns, S>>>(arguments);

but differ from the code generation. That device-side kernel launches is
eventually translated into the following sequence

 config = cudaGetParameterBuffer(alignment, size);
 // setup arguments by copying them into `config`.
 cudaLaunchDevice(func, config, Dg, Db, Ns, S);

- To support the device-side kernel launch, 'CUDAKernelCallExpr' is
reused but its config expr is set to a call to 'cudaLaunchDevice'.
During the code generation, 'CUDAKernelCallExpr' is expanded into the
sequence aforementioned.

- As the device-side kernel launch requires the source to be compiled as
relocatable device code and linked with '-lcudadevrt'. Linkers are
changed to pass relevant link options to 'nvlink'.


 Commit: dec77e4f878cd4a530aa0be6106859fc69726928
 https://github.com/llvm/llvm-project/commit/dec77e4f878cd4a530aa0be6106859fc69726928
 Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp

 Log Message:
 -----------
 [VPlan] Improve code in VPInstruction::generate (NFC) (#169470)

Make miscellaneous improvements including inlining some expressions and
re-using the existing State.Builder reference.


 Commit: d1899acd08d3eb876de0e5394f6c3a2441e04756
 https://github.com/llvm/llvm-project/commit/d1899acd08d3eb876de0e5394f6c3a2441e04756
 Author: Simon Pilgrim <llvm-dev at redking.me.uk>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Target/X86/X86ISelLowering.cpp
 M llvm/test/CodeGen/X86/combine-ffloor.ll
 M llvm/test/CodeGen/X86/combine-fround.ll

 Log Message:
 -----------
 [X86] combineConcatVectorOps - add handling to concat ISD::FROUND/FFLOOR intrinsics together (#170176)

These were missed in #170160


 Commit: 21e64d1f5a3dbf539eaf9c7ac160469e60222ba2
 https://github.com/llvm/llvm-project/commit/21e64d1f5a3dbf539eaf9c7ac160469e60222ba2
 Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 A flang/include/flang/Optimizer/Transforms/CUDA/CUFAllocationConversion.h
 M flang/include/flang/Optimizer/Transforms/Passes.td
 M flang/lib/Optimizer/Transforms/CMakeLists.txt
 A flang/lib/Optimizer/Transforms/CUDA/CUFAllocationConversion.cpp
 M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp

 Log Message:
 -----------
 [flang][cuda][NFC] Split allocation related operation conversion from other cuf operations (#169740)

Split AllocOp, FreeOp, AllocateOp and DeallocateOp from other
conversion. Patterns are currently added to the base CUFOpConversion
when the option is enabled.
This split is a pre-requisite to be more flexible where we do the
allocation related operations conversion in the pipeline.


 Commit: c9d9dddc1c5e9f203f5db890f383b956c5b2d295
 https://github.com/llvm/llvm-project/commit/c9d9dddc1c5e9f203f5db890f383b956c5b2d295
 Author: nerix <nerixdev at outlook.de>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
 A lldb/test/Shell/SymbolFile/NativePDB/find-pdb-next-to-exe.test

 Log Message:
 -----------
 [LLDB][NativePDB] Look for PDBs in `target.debug-file-search-paths` (#169719)

Similar to DWARF's DWO, we should look for PDBs in
`target.debug-file-search-paths` if the PDB isn't at the original
location or next to the executable.

With this PR, the search order is as follows:

1. PDB path specified in the PE/COFF file
2. Next to the executable
3. In `target.debug-file-search-paths`

This roughly matches [the order Visual Studio
uses](https://learn.microsoft.com/en-us/visualstudio/debugger/specify-symbol-dot-pdb-and-source-files-in-the-visual-studio-debugger?view=vs-2022#where-the-debugger-looks-for-symbols),
except that we don't have a project folder and don't support symbol
servers.

Closes #125355 (though I think this is already fixed in the native
plugin).


 Commit: c103d61758e61a9fe4c1963b29d602ffe2c22427
 https://github.com/llvm/llvm-project/commit/c103d61758e61a9fe4c1963b29d602ffe2c22427
 Author: Jonas Devlieghere <jonas at devlieghere.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M lldb/source/Core/Statusline.cpp
 M lldb/test/API/functionalities/statusline/TestStatusline.py

 Log Message:
 -----------
 [lldb] Fix a bug when disabling the statusline. (#169127)

Currently, disabling the statusline with `settings set show-statusline
false` leaves LLDB in a broken state. The same is true when trying to
toggle the setting again.

The issue was that setting the scroll window to 0 is apparently not
identical to setting it to the correct number of rows, even though some
documentation online incorrectly claims so.

Fixes #166608


 Commit: 56d061ccc5afb07e8d9a4d2c501bbcb56031ccc9
 https://github.com/llvm/llvm-project/commit/56d061ccc5afb07e8d9a4d2c501bbcb56031ccc9
 Author: William Tran-Viet <wtranviet at proton.me>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M libcxx/include/optional

 Log Message:
 -----------
 [libc++][NFC] Add optional<T&> synopsis (#170043)


 Commit: 4a48740831d0f0779780e0bea64ec4a16d9f6d97
 https://github.com/llvm/llvm-project/commit/4a48740831d0f0779780e0bea64ec4a16d9f6d97
 Author: Helena Kotas <hekotas at microsoft.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang/lib/CodeGen/CGExpr.cpp
 M clang/test/CodeGenHLSL/BoolVector.hlsl
 A clang/test/CodeGenHLSL/builtins/VectorElementStore.hlsl
 M clang/test/CodeGenHLSL/builtins/lit.hlsl

 Log Message:
 -----------
 [HLSL] Update indexed vector elements individually (#169144)

When an individual element of a vector is updated via indexing into the vector, it needs to be handled as a store operation on that one vector element.

Clang treats vectors as one unit, so a vector element needs to be updated, the whole vector is loaded, the element is modified, and then the whole vector is stored. In HLSL vector elements are handled individually. We need to avoid this load/modify/store sequence to prevent overwriting other vector elements that might be getting updated in parallel.

Fixes #167729

Contributes to #160208.


 Commit: f65c19982d2af7f791115e0b51c095a52ad5da4a
 https://github.com/llvm/llvm-project/commit/f65c19982d2af7f791115e0b51c095a52ad5da4a
 Author: Aiden Grossman <aidengrossman at google.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang-tools-extra/clangd/test/CMakeLists.txt
 M clang-tools-extra/clangd/test/include-cleaner-batch-fix.test
 M clang-tools-extra/clangd/test/index-tools.test
 M clang-tools-extra/clangd/test/lit.cfg.py
 M clang-tools-extra/clangd/test/lit.site.cfg.py.in
 M clang-tools-extra/clangd/test/system-include-extractor.test

 Log Message:
 -----------
 Reapply "[clangd] Make lit tests work with the internal shell" (#169972)

This reverts commit bd04ef6df50e8e6e5212762fc798ea9fbdcfc897.
 
This reapply fixes the broken case where we would fail at CMake
configuration time if LLVM_INCLUDE_BENCHMARKS was explicitly turned off.


 Commit: b73385dda5caa21570ddc6d7277c22aca8f2de1e
 https://github.com/llvm/llvm-project/commit/b73385dda5caa21570ddc6d7277c22aca8f2de1e
 Author: Nico Weber <thakis at chromium.org>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M compiler-rt/cmake/config-ix.cmake

 Log Message:
 -----------
 [TySan] Attempt to unbreak build after #169036

If tysan was not in COMPILER_RT_SANITIZERS_TO_BUILD, we used to
get an error after #169036, see comments there for details.


 Commit: 9edbf83667821e3154446d5e2429e41bf261e26f
 https://github.com/llvm/llvm-project/commit/9edbf83667821e3154446d5e2429e41bf261e26f
 Author: Charles Zablit <c_zablit at apple.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M lldb/source/Host/windows/ProcessLauncherWindows.cpp

 Log Message:
 -----------
 [lldb][windows] fix environment handling in CreateProcessW setup (#168733)

This patch refactors and documents the setup of the `CreateProcessW`
invocation in `ProcessLauncherWindows`. It's a dependency of
https://github.com/llvm/llvm-project/pull/168729.

`CreateEnvironmentBufferW` now sorts the environment variable keys
before concatenating them into a string. From [the `CreateProcess`
documentation](https://learn.microsoft.com/en-us/windows/win32/api/processthreadsapi/nf-processthreadsapi-createprocessw):
> An application must manually pass the current directory information to
the new process. To do so, the application must explicitly create these
environment variable strings, sort them alphabetically (because the
system uses a sorted environment), and put them into the environment
block. Typically, they will go at the front of the environment block,
due to the environment block sort order.

`GetFlattenedWindowsCommandStringW` now returns an error which will be
surfaced, instead of failing silently.

Types were converted to their wide equivalent (i.e appending `W` to
them, see `STARTUPINFOEX`) since we are calling the `W` variant of
`CreateProcess`.


 Commit: 0ff0f52460531c0bfa213d0dcfa0cfb4ba61e934
 https://github.com/llvm/llvm-project/commit/0ff0f52460531c0bfa213d0dcfa0cfb4ba61e934
 Author: Greg Clayton <gclayton at fb.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/include/llvm/DebugInfo/DWARF/DWARFAcceleratorTable.h
 M llvm/lib/DebugInfo/DWARF/DWARFAcceleratorTable.cpp

 Log Message:
 -----------
 Fix __apple_XXX iterator that iterates over all entries. (#157538)

The previous iterator for __apple_XXX sections was assuming that all
entries in the table would be contiguous and it wasn't using the offsets
table to access each chain of entries for a given name. This patch fixes
it so the iterator does the right thing.

This issue became apparent after a modification to strip template names
from DW_AT_name entries to allow adding both the template class base
name as an entry and also include the name with template names. The
commit hash is 2e7ee4dc21430b0fe4c9ee306dc1d8c7986a6646. The problem is
if the name starts with a "<" it will try and split the name. So if the
name is `"<get-size>"` it will return an empty string as the function
name, and this empty string gets added to the __apple_names table and
causes large delays when using the iterators.


 Commit: e6ae2462bd6dcf583ccd13c6627fe3ffe8a17f2c
 https://github.com/llvm/llvm-project/commit/e6ae2462bd6dcf583ccd13c6627fe3ffe8a17f2c
 Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
 M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h

 Log Message:
 -----------
 [AMDGPU] Refactor hazard recognizer for VALU-pipeline hazards. NFCI. (#168801)

This is in preparation of handling these in scheduler. I do not expect
any changes to the produced code here, it is just an infrastructure.
Our current problem with the VALU pipeline hazards is that we only
insert V_NOP instructions in the hazard recognizer mode, but ignore
it during scheduling. This patch is meant to create a mechanism to
actually account for that during scheduling.


 Commit: 6397e2f59ee06814693016bea181fce9480622d2
 https://github.com/llvm/llvm-project/commit/6397e2f59ee06814693016bea181fce9480622d2
 Author: Lucas Ste <38472950+LucasSte at users.noreply.github.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Target/BPF/BPF.td
 M llvm/lib/Target/BPF/BPFISelLowering.cpp
 M llvm/lib/Target/BPF/BPFISelLowering.h
 M llvm/lib/Target/BPF/BPFSubtarget.cpp
 M llvm/lib/Target/BPF/BPFSubtarget.h
 M llvm/test/CodeGen/BPF/atomic-oversize.ll
 R llvm/test/CodeGen/BPF/builtin_calls.ll
 M llvm/test/CodeGen/BPF/struct_ret1.ll
 M llvm/test/CodeGen/BPF/struct_ret2.ll

 Log Message:
 -----------
 Revert "[BPF] Allow libcalls behind a feature gate (#168442)" (#169733)

**Problem**

As mentioned in
https://github.com/llvm/llvm-project/pull/168442#pullrequestreview-3501502448
#168442, is not the right solution for the problem.

I'll follow @arsenm suggestions starting with
https://github.com/llvm/llvm-project/pull/169537 to properly allow safe
math operations and i128 support in BPF.

**Solution**

Revert #168442.


 Commit: fd8bf3c69a10cfe60f89799710c60c4f5dd4e22d
 https://github.com/llvm/llvm-project/commit/fd8bf3c69a10cfe60f89799710c60c4f5dd4e22d
 Author: Med Ismail Bennani <ismail at bennani.ma>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h

 Log Message:
 -----------
 [lldb/ScriptInterpreter] Fix typo in AbstractMethodCheckerPayload (NFC) (#170187)

This fixes a typo in ScriptedPythonInterface and changes
`AbstrackMethodCheckerPayload` to `AbstractMethodCheckerPayload`.

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>


 Commit: 281f4ea58e4684e0817e15a7284c42fb29e37704
 https://github.com/llvm/llvm-project/commit/281f4ea58e4684e0817e15a7284c42fb29e37704
 Author: Nico Weber <thakis at chromium.org>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/utils/gn/secondary/clang-tools-extra/clangd/test/BUILD.gn

 Log Message:
 -----------
 [gn] port f65c19982d2a


 Commit: 00276b67d36a665119a6a7b39dbba69f45c44e58
 https://github.com/llvm/llvm-project/commit/00276b67d36a665119a6a7b39dbba69f45c44e58
 Author: Aiden Grossman <aidengrossman at google.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/test/Transforms/WholeProgramDevirt/calls-to-devirt.ll
 M llvm/test/Transforms/WholeProgramDevirt/import-indir.ll
 M llvm/test/Transforms/WholeProgramDevirt/import.ll
 M llvm/test/Transforms/WholeProgramDevirt/uniform-retval-invoke.ll

 Log Message:
 -----------
 [WPD] Remove undef from tests (#170179)


 Commit: fffe9bcbc7d5d93872ad00a7f212483d749ae71d
 https://github.com/llvm/llvm-project/commit/fffe9bcbc7d5d93872ad00a7f212483d749ae71d
 Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
 A llvm/test/CodeGen/AMDGPU/misched-into-wmma-hazard-shadow.mir

 Log Message:
 -----------
 [AMDGPU] Allow hazard checks for WMMA co-exec (#168805)

Now we are just inserting V_NOP instrtuctions, try to schedule
something into the shadow.

It is still somewhat imprecise, for example AdvanceCycle() will
use TII.getNumWaitStates() anyway, but in a scheduling mode
we are not required to be precise. We must be finally precise
in the hazard recognizer mode. Then EmittedInstrs buffer is also
limited to MaxLookAhead even though VALU only hazards may actually
never expire and require an endless buffer. But that's OK, we can
at least mitigate what the buffer can hold. The buffer is also
currently much bigger than any of VALU hazards may need.

That said the rest of the 'fix*' functions here can be changed
the same way, these which are using V_NOPs. This one is just the
worst because it may require up to 9 nops.


 Commit: 28ac6b36c14376f5a80b974d6b1c49a89201b594
 https://github.com/llvm/llvm-project/commit/28ac6b36c14376f5a80b974d6b1c49a89201b594
 Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp

 Log Message:
 -----------
 [flang][cuda] Use the option to populate conversion patterns (#170190)

#169740 split the conversion patterns but the option was not use when
populating them.


 Commit: df3e1b59d85b153a369d344f9ef335f5315d84a5
 https://github.com/llvm/llvm-project/commit/df3e1b59d85b153a369d344f9ef335f5315d84a5
 Author: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
 M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
 M mlir/test/Dialect/AMDGPU/invalid.mlir
 M mlir/test/Dialect/AMDGPU/ops.mlir

 Log Message:
 -----------
 [mlir][amdgpu] Add amdgpu.make_dma_descriptor (#169407)

Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>


 Commit: 33bcde0678707ffffb7f01188d530da05bed47b8
 https://github.com/llvm/llvm-project/commit/33bcde0678707ffffb7f01188d530da05bed47b8
 Author: Gleb Popov <6yearold at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M libunwind/test/aarch64_vg_unwind.pass.cpp
 M libunwind/test/aarch64_za_unwind.pass.cpp
 M libunwind/test/bad_unwind_info.pass.cpp
 M libunwind/test/eh_frame_fde_pc_range.pass.cpp
 M libunwind/test/floatregister.pass.cpp
 M libunwind/test/forceunwind.pass.cpp
 M libunwind/test/remember_state_leak.pass.sh.s
 M libunwind/test/signal_unwind.pass.cpp
 M libunwind/test/unwind_leaffunction.pass.cpp
 M libunwind/test/unwind_scalable_vectors.pass.cpp

 Log Message:
 -----------
 libunwind: Remove OS requirements from tests to make them run on more OSes (#167642)

There might be a cleaner way to enable these tests running on FreeBSD,
I'm open to suggestions.

Co-authored-by: Alexander Richardson <mail at alexrichardson.me>


 Commit: c8031c3dd7434635dd64ad8a4abe9a96f86a384b
 https://github.com/llvm/llvm-project/commit/c8031c3dd7434635dd64ad8a4abe9a96f86a384b
 Author: Tomohiro Kashiwada <kikairoya at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M libcxx/test/selftest/dsl/lit.local.cfg
 M llvm/utils/lit/lit/TestRunner.py
 M llvm/utils/lit/lit/builtin_commands/diff.py
 M llvm/utils/lit/lit/formats/googletest.py
 M llvm/utils/lit/lit/llvm/config.py
 M llvm/utils/lit/lit/reports.py
 M llvm/utils/lit/lit/util.py

 Log Message:
 -----------
 [LIT] remove `to_unicode`, `to_string`, and `to_bytes` helpers (#165950)

These helpers, which handle the difference between Python 2.x and Python
3.x, are no longer required.

Co-authored-by: Alexander Richardson <mail at alexrichardson.me>


 Commit: 860146c4b6856e5c2a57218fd9e70f131280b00f
 https://github.com/llvm/llvm-project/commit/860146c4b6856e5c2a57218fd9e70f131280b00f
 Author: Louis Dionne <ldionne.2 at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M libcxx/src/include/from_chars_floating_point.h

 Log Message:
 -----------
 [libc++] Make sure the LLVM libc shared utilities use libc++'s assertion mechanism (#170149)

Otherwise, they would use their own mechanism based on C assert. It's
better to use the same assertion mechanism consistently everywhere since
this code is considered an implementation detail of libc++.


 Commit: 1d3384e5d4c6bd1b297110b2de8a79d8a4b274e2
 https://github.com/llvm/llvm-project/commit/1d3384e5d4c6bd1b297110b2de8a79d8a4b274e2
 Author: Louis Dionne <ldionne.2 at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M libcxx/docs/Contributing.rst
 M libcxx/utils/ci/run-buildbot-container

 Log Message:
 -----------
 [libc++] Update the Docker image hash in run-buildbot-container (#170165)

The current Docker image used by our CI is d6b22a347f813cf4a983, but we
forgot to synchronize the value in run-buildbot-container.


 Commit: b9b9a239df4785b42b050b128eff18694871bc14
 https://github.com/llvm/llvm-project/commit/b9b9a239df4785b42b050b128eff18694871bc14
 Author: Max <628527+mxms0 at users.noreply.github.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/include/llvm/ProfileData/SampleProf.h
 M llvm/lib/ProfileData/SampleProf.cpp

 Log Message:
 -----------
 [ProfData] Improve efficiency of reader (#169730)

Pre-reserve space in the map before inserting. In release builds, 9.4%
of all CPU time is spent in llvm::sampleprof::ProfileSymbolList::add. Of
that 9.4%, roughly half is in llvm::DenseMapBase::grow.

---------

Co-authored-by: mxms <mxms at google.com>
Co-authored-by: Vitaly Buka <vitalybuka at gmail.com>


 Commit: da76a48943f090bc6d5aa8b462d07d361f401d37
 https://github.com/llvm/llvm-project/commit/da76a48943f090bc6d5aa8b462d07d361f401d37
 Author: Yu Hao <yuhaoyu at google.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang/include/clang/Tooling/Transformer/RangeSelector.h
 M clang/lib/Tooling/Transformer/Parsing.cpp
 M clang/lib/Tooling/Transformer/RangeSelector.cpp
 M clang/unittests/Tooling/RangeSelectorTest.cpp

 Log Message:
 -----------
 [clang][transformer] Add `merge` range-selector for selecting the merge of two ranges. (#169560)

This new range-selector `merge` takes in two ranges and selects from
min(begin locs of input ranges) to max(end locs of input ranges). This
is useful for when the user needs to select a range that is a merge of
two arbitrary ranges (potentially overlapped and out of order).

The existing `enclose` range-selector does something similar but it
requires the first range's begin loc appears before the second range's
end loc. The `merge` range-selector complements `enclose`.

---------

Co-authored-by: Yitzhak Mandelbaum <ymand at users.noreply.github.com>


 Commit: 258cb467e9af70cca5bcd13aef0a9443860960d9
 https://github.com/llvm/llvm-project/commit/258cb467e9af70cca5bcd13aef0a9443860960d9
 Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
 A mlir/lib/Dialect/OpenACC/Transforms/ACCLegalizeSerial.cpp
 M mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
 A mlir/test/Dialect/OpenACC/legalize-serial.mlir

 Log Message:
 -----------
 [mlir][acc] Add acc serial to acc parallel conversion (#170189)

This patch introduces a new transformation pass that converts
`acc.serial` constructs into `acc.parallel` constructs with
num_gangs(1), num_workers(1), and vector_length(1).

The transformation is semantically equivalent since an OpenACC serial
region executes sequentially, which is identical to a parallel region
with a single gang, worker, and vector. This unification simplifies
processing of acc regions by enabling code reuse in later compilation
stages.

Co-authored-by: Vijay Kandiah <vkandiah at nvidia.com>


 Commit: d7b5469b39d0c8b5d5db2f87bbd2446365f2dc35
 https://github.com/llvm/llvm-project/commit/d7b5469b39d0c8b5d5db2f87bbd2446365f2dc35
 Author: macurtis-amd <macurtis at amd.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang/lib/Analysis/Consumed.cpp
 A clang/test/SemaCXX/no-warn-consumed-analysis.cpp

 Log Message:
 -----------
 [clang] Handle null dtor decl during consumed analysis (#170180)

See similar PR #169593.

This is another case where null was not handled when returned from
`getDestructorDecl`.


 Commit: 7b2ee464d278c05a0539482ecf3562649e9ea27d
 https://github.com/llvm/llvm-project/commit/7b2ee464d278c05a0539482ecf3562649e9ea27d
 Author: Amr Hesham <amr96 at programmer.net>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td

 Log Message:
 -----------
 [CIR] Add boolean to the Complex type constraints msg (#170192)

Update the type constraints error message to also mention the boolean
type


 Commit: af2e2468217d1fe6e87b3d0f37f9524cc95c9298
 https://github.com/llvm/llvm-project/commit/af2e2468217d1fe6e87b3d0f37f9524cc95c9298
 Author: Max191 <44243577+Max191 at users.noreply.github.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
 M mlir/test/Dialect/Linalg/fuse-with-reshape-by-collapsing.mlir
 M mlir/test/Dialect/Linalg/reshape_fusion.mlir

 Log Message:
 -----------
 [mlir] Add missing pad reshape propagation patterns (#168888)

The existing `FoldPadWithProducerReshapeOpByExpansion` and
`FoldPadWithProducerReshapeOpByCollapsing` patterns did not cover all
reshape propagation cases, because they only consider cases where the
pad op is the consumer operation. This PR adds 2 new patterns to cover
the cases where the pad op is the producer operation, which completes
the propagation pattern set for pad op with expand_shape and
collapse_shape.

Note for integration: This PR also removes the single user restriction
for the `FoldPadWithProducerReshapeOpByExpansion` and
`FoldPadWithProducerReshapeOpByCollapsing` patterns, which leaves more
control to the users of the pattern. If this constraint is needed, then
it should be added to the control function for these patterns.

---------

Signed-off-by: Max Dawkins <max.dawkins at gmail.com>


 Commit: 5d4c4411f13755d5f12a83a0d6705e8501f33d5f
 https://github.com/llvm/llvm-project/commit/5d4c4411f13755d5f12a83a0d6705e8501f33d5f
 Author: davidtrevelyan <davidtrevelyan at users.noreply.github.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Transforms/Instrumentation/RealtimeSanitizer.cpp
 A llvm/test/Instrumentation/RealtimeSanitizer/rtsan_attrib_declare.ll

 Log Message:
 -----------
 [rtsan] Handle attributed IR function declarations (#169577)

Addresses https://github.com/llvm/llvm-project/issues/169377.

Previously, the RealtimeSanitizer pass only handled attributed function
_definitions_ in IR, and we have recently found that attributed function
_declarations_ caused it to crash. To fix the issue, we must check
whether the IR function is empty before attempting to do any
manipulation of its instructions.

This PR:

- Adds checks for whether IR `Function`s are `empty()` ~~in each
relevant~~ at the top-level RTSan pass routine
- ~~Removes the utility function `rtsanPreservedCFGAnalyses` from the
pass, whose result was unused and which would otherwise have complicated
the fix~~


 Commit: da9e8d5c57c845c852cc676c104c499eff06ae09
 https://github.com/llvm/llvm-project/commit/da9e8d5c57c845c852cc676c104c499eff06ae09
 Author: David Peixotto <peix at meta.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M lldb/source/Expression/DWARFExpression.cpp
 M lldb/unittests/Expression/DWARFExpressionTest.cpp

 Log Message:
 -----------
 [lldb] Unify DW_OP_deref and DW_OP_deref_size implementations (#169587)

This commit unifies the code in the dwarf expression evaluator that
handles these two deref operations. Previously we had similar, but not
identical code for handling them.

The implementation was taken from the DW_OP_deref_size code path since
that handles the general case. We put that code into an
Evaluate_DW_OP_deref_size function and call it with the address size
when evaluating DW_OP_deref.

There were initially two test failures when I made the change. The
`DW_op_deref_no_ptr_fixing` unittest failed because we were not
correctly setting the address size when we created the DataExtractor.
The `DW_OP_deref test` failed because previously the expression
`DW_OP_lit4, DW_OP_deref` would evaluate to a LoadAddress, but the code
for deref_size was evaluating it to a scalar.

The difference was in how it handled a deref of a scalar value type. In
the deref code path we convert a scalar to a load address, but this was
not done in the deref_size code path.

```
 case Value::ValueType::Scalar:
 stack.back().SetValueType(Value::ValueType::LoadAddress);
```

I decided to modify the deref_size code to also convert the value to a
load address to keep the test passing.

There is no functional change intended here. The motivation is to reduce
the number of code paths that implement the deref operation.


 Commit: 637a230ee3a2c07679b4e7207467a5a740ba3a3e
 https://github.com/llvm/llvm-project/commit/637a230ee3a2c07679b4e7207467a5a740ba3a3e
 Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/include/llvm/ADT/MapVector.h
 M llvm/unittests/ADT/MapVectorTest.cpp

 Log Message:
 -----------
 [MapVector] Introduce {keys,values} iterators (#169675)

Similar to DenseMap::{keys,values}, introduce MapVector::{keys,values}.


 Commit: 3ca85e74a1af2771ea46519107e6d366316a03ee
 https://github.com/llvm/llvm-project/commit/3ca85e74a1af2771ea46519107e6d366316a03ee
 Author: Med Ismail Bennani <ismail at bennani.ma>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
 M lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp

 Log Message:
 -----------
 [lldb] Handle staticmethod/classmethod descriptors in ScriptedPythonInterface (#170188)

Extract `__func__` attribute from staticmethod/classmethod descriptors
before treating them as callables. Python's `@staticmethod` and
`@classmethod` decorators wrap methods in descriptor objects that are
not directly usable as PythonCallable, when calling PyCallable_Check.

The actual callable function is stored in the `__func__` attribute of
these descriptors, so we need to unwrap them to properly validate and
invoke the decorated methods in scripted interfaces.

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>


 Commit: 41aade49d2600a464a338f1086328a58b30b7f95
 https://github.com/llvm/llvm-project/commit/41aade49d2600a464a338f1086328a58b30b7f95
 Author: Jordan Rupprecht <rupprecht at google.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

 Log Message:
 -----------
 [bazel][mlir][acc] Port #170189: acc deps (#170203)


 Commit: eb1533d3f9c8755369a13b0a941fc58ef959d00b
 https://github.com/llvm/llvm-project/commit/eb1533d3f9c8755369a13b0a941fc58ef959d00b
 Author: Jordan Rupprecht <rupprecht at google.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
 A utils/bazel/llvm-project-overlay/clang/tools/clang-fuzzer/BUILD.bazel

 Log Message:
 -----------
 [bazel] Move clang-fuzzer to separate package (#170167)

This avoids needing to pull in protobuf deps for clang-fuzzer when that
is not needed.

Recently requested: #168928

Previously requested: #123126 / #123833


 Commit: b545e54f7a87291198d3e615e523a2b37a967482
 https://github.com/llvm/llvm-project/commit/b545e54f7a87291198d3e615e523a2b37a967482
 Author: Alexey Samsonov <vonosmas at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M libc/src/__support/CMakeLists.txt
 M libc/src/__support/wctype_utils.h
 M libc/src/wchar/CMakeLists.txt
 M libc/src/wchar/btowc.cpp
 M libc/src/wchar/wctob.cpp
 M utils/bazel/llvm-project-overlay/libc/BUILD.bazel

 Log Message:
 -----------
 [libc] Remove btowc / wctob from wctype_utils internal header. (#170200)

They are not used anywhere except for the btowc/wctob entrypoints, so
just move the implementation there. Internal code should probably be
using a safer mbrtowc variants anyway, if applicable.

This allows us to remove the use of wint_t, which is problematic for
some uses through `libc/shared/` when a host system doesn't have
wide-character support (see PR #165884 comments). There's no such
problems with `wchar_t`, since it's a fundamental type in C++.


 Commit: 93e18db3e48dc28818d4880e813b9027bfbf3c16
 https://github.com/llvm/llvm-project/commit/93e18db3e48dc28818d4880e813b9027bfbf3c16
 Author: Tom Honermann <tom.honermann at intel.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M libsycl/README.md

 Log Message:
 -----------
 [libsycl] fix license link in README.md.


 Commit: aa727db23ed9c6c2399e5728d5d689c110bd7f80
 https://github.com/llvm/llvm-project/commit/aa727db23ed9c6c2399e5728d5d689c110bd7f80
 Author: lntue <lntue at google.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M libc/docs/talks.rst

 Log Message:
 -----------
 [libc][docs] Add links to 2025 talks. (#170206)


 Commit: e7748e92cd5d71af2e1699328b7c575e9b9bf479
 https://github.com/llvm/llvm-project/commit/e7748e92cd5d71af2e1699328b7c575e9b9bf479
 Author: Valery Dmitriev <valeryd at nvidia.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M flang-rt/include/flang-rt/runtime/descriptor.h
 M flang-rt/lib/runtime/descriptor.cpp
 M flang-rt/lib/runtime/extensions.cpp
 M flang-rt/unittests/Runtime/Descriptor.cpp
 M flang/docs/Intrinsics.md
 M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
 M flang/include/flang/Optimizer/Builder/Runtime/Intrinsics.h
 M flang/include/flang/Runtime/extensions.h
 M flang/lib/Evaluate/intrinsics.cpp
 M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
 M flang/lib/Optimizer/Builder/Runtime/Intrinsics.cpp
 M flang/module/__fortran_builtins.f90
 A flang/module/flang_debug.f90
 A flang/test/Lower/Intrinsics/show_descriptor.f90
 M flang/tools/f18/CMakeLists.txt

 Log Message:
 -----------
 [flang] implement show_descriptor intrinsic, a non-standard extension (#169137)

show_descriptor intrinsic prints details of a descriptor (extended
Fortran pointer).
It accepts a descriptor for any type and rank, including scalars.
Requires use of flang_debug module.

Example:
program test
 use flang_debug
 implicit none
 integer :: a(4) = (/ 1,3,5,7 /)
 call show_descriptor(a(1:3))
end program test

and its output:
Descriptor @ 0x7ffe01ec6a98:
 base_addr 0x563b7035103c
 elem_len 4
 version 20240719
 rank 1
 type 9 "INTEGER(kind=4)"
 attribute 0
 extra 0
 addendum 0
 alloc_idx 0
 dim[0] lower_bound 1
 extent 3
 sm 4


 Commit: d08b0f7240aaba42d344fef942f812e6a38e5331
 https://github.com/llvm/llvm-project/commit/d08b0f7240aaba42d344fef942f812e6a38e5331
 Author: Erik Enikeev <evonatarius at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Target/ARM/ARMISelLowering.cpp
 M llvm/lib/Target/ARM/ARMInstrVFP.td
 A llvm/test/CodeGen/ARM/fp-intrinsics-vector.ll
 M llvm/test/CodeGen/ARM/fp16-fullfp16.ll

 Log Message:
 -----------
 [ARM] Disable strict node mutation and use correct lowering for several strict ops (#170136)

Changes in this PR were discussed and reviewed in
https://github.com/llvm/llvm-project/pull/137101.


 Commit: e0e897e5c8976cbbc4b99987eb6fbc7faa6d03cf
 https://github.com/llvm/llvm-project/commit/e0e897e5c8976cbbc4b99987eb6fbc7faa6d03cf
 Author: google-yfyang <yfyang at google.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang/lib/CodeGen/CGCUDARuntime.cpp

 Log Message:
 -----------
 [CUDA][NFC] Fix an unused variable error when compiled with optimization (#170205)

#165519 causes some builds to fail.
[clang/lib/CodeGen/CGCUDARuntime.cpp:65]:15: error: unused variable
'Ctx' [-Werror,-Wunused-variable]
 65 | ASTContext &Ctx = CGM.getContext();


 Commit: 4ed97c153b6a289256a320238f98b74eaf4844d6
 https://github.com/llvm/llvm-project/commit/4ed97c153b6a289256a320238f98b74eaf4844d6
 Author: Daniel Sanders <daniel_l_sanders at apple.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M lldb/packages/Python/lldbsuite/test/gdbclientutils.py

 Log Message:
 -----------
 [lldb] Add type hints for gdbclientutils.py when base class returns Literal[T] (#170182)

Pyright automatically deduces these functions to return `Literal["foo"]`
since the implementation returns "foo". This causes any overload that
returns a different literal or a string to report that they're
overloaded in an incompatible way. By correctly annotating them as
returning str, the overloads can return different strings without this
error

I was encountering these a lot while writing tests for my downstream
target


 Commit: 60513b8d6ebacde46e8fbe4faf1319ac87e990e3
 https://github.com/llvm/llvm-project/commit/60513b8d6ebacde46e8fbe4faf1319ac87e990e3
 Author: Aiden Grossman <aidengrossman at google.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M .github/workflows/test-unprivileged-download-artifact.yml

 Log Message:
 -----------
 [Github] Fix typo in unprivileged-download-artifact test workflow

s/Chekcout/Checkout


 Commit: 28d2208f7d067c58eb81495fbb9606e508678f6f
 https://github.com/llvm/llvm-project/commit/28d2208f7d067c58eb81495fbb9606e508678f6f
 Author: Aiden Grossman <aidengrossman at google.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M .ci/generate_test_report_lib.py
 M .ci/generate_test_report_lib_test.py

 Log Message:
 -----------
 [CI] Add checkmark emojis for passing builds (#170183)

This better matches the code formatter and I personally find the visual
indication valuable when I am scrolling/glancing at a comment.


 Commit: ae68377c69db15d1d567368b2321455d31f41b69
 https://github.com/llvm/llvm-project/commit/ae68377c69db15d1d567368b2321455d31f41b69
 Author: Jason Molenda <jmolenda at apple.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M lldb/include/lldb/Symbol/ObjectFile.h
 M lldb/include/lldb/lldb-forward.h
 M lldb/source/Expression/ObjectFileJIT.cpp
 M lldb/source/Plugins/ObjectFile/Breakpad/ObjectFileBreakpad.cpp
 M lldb/source/Plugins/ObjectFile/COFF/ObjectFileCOFF.cpp
 M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
 M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
 M lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
 M lldb/source/Plugins/ObjectFile/XCOFF/ObjectFileXCOFF.cpp
 M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
 M lldb/source/Symbol/ObjectFile.cpp

 Log Message:
 -----------
 [lldb][NFC] Change ObjectFile's DataExtractor to a shared ptr (#170066)

ObjectFile has an m_data DataExtractor ivar which may be default
constructed initially, or initialized with a DataBuffer passed in to its
ctor. If the DataExtractor does not get a DataBuffer source passed in,
the subclass will initialize it with access to the object file's data.
When a DataBuffer is passed in to the base class ctor, the DataExtractor
only has its buffer initialized; ObjectFile doesn't yet know the address
size and endianness to fully initialize the DataExtractor.

This patch changes ObjectFile to instead have a DataExtractorSP ivar
which is always initialized with at least a default-constructed
DataExtractor object in the base class ctor. The next patch I will be
writing is to change the ObjectFile ctor to take an optional
DataExtractorSP, so the caller can pass a DataExtractor subclass -- the
VirtualizeDataExtractor being added via
https://github.com/llvm/llvm-project/pull/168802
instead of a DataBuffer which is trivially saved into the DataExtractor.

The change is otherwise mechanical; all `m_data.` changed to
`m_data_sp->` and all the places where `m_data` was passed in for a
by-ref call were changed to `*m_data_sp.get()`. The shared pointer is
always initialized to contain an object.

I built & ran the testsuite on macOS and on aarch64-Ubuntu (thanks for
getting the Linux testsuite to run on SME-only systems David). All of
the ObjectFile subclasses I modifed compile cleanly, but I haven't
tested them beyond any unit tests they may have (prob breakpad).

rdar://148939795


 Commit: 2864afbe4d5922511d0f65b3f5231ef6f7ae7c10
 https://github.com/llvm/llvm-project/commit/2864afbe4d5922511d0f65b3f5231ef6f7ae7c10
 Author: Florian Hahn <flo at fhahn.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 A llvm/test/Transforms/LoopVectorize/select-smin-first-index.ll
 M llvm/test/Transforms/LoopVectorize/select-umin-first-index.ll

 Log Message:
 -----------
 [LV] Add more tests for argmin finding the first index.

Add more test coverage for supporting argmin/argmax with strict
predicates, in preparation for follow up to 99addbf73db596403a17.


 Commit: b76300acc5207b77ffce5677f31491ee58f06c06
 https://github.com/llvm/llvm-project/commit/b76300acc5207b77ffce5677f31491ee58f06c06
 Author: Daniel Thornburgh <mysterymath at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M libc/fuzzing/__support/freelist_heap_fuzz.cpp
 M libc/src/__support/block.h
 M libc/src/__support/freelist_heap.h
 M libc/src/__support/freestore.h
 M libc/test/src/__support/block_test.cpp
 M libc/test/src/__support/freelist_heap_test.cpp
 M libc/test/src/__support/freestore_test.cpp

 Log Message:
 -----------
 [libc][malloc] Ensure a minimum block alignment of 4 (#169447)

Most platforms inherently have a size_t alignment of 4, but this isn't
true on every platform LLVM has some degree of backend support for.
Accordingly, it's simple enough to just set the min alignment of Block
to 4 and lose the static_assert.


 Commit: 76c5b6abc96c8fd2e977e9d5ed50e038a0b4477a
 https://github.com/llvm/llvm-project/commit/76c5b6abc96c8fd2e977e9d5ed50e038a0b4477a
 Author: Peter Klausler <pklausler at nvidia.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M flang/lib/Evaluate/fold-real.cpp
 M flang/test/Evaluate/folding03.f90

 Log Message:
 -----------
 [flang] Warn on invalid argument to SQRT() (#168607)

When folding SQRT(), notice invalid argument exceptions and optionally
warn about them.


 Commit: 229dca66df6d0f9253273565d82972fd1787bd4a
 https://github.com/llvm/llvm-project/commit/229dca66df6d0f9253273565d82972fd1787bd4a
 Author: Peter Klausler <pklausler at nvidia.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M flang/lib/Evaluate/tools.cpp
 A flang/test/Evaluate/bug168978.f90

 Log Message:
 -----------
 [flang] Handle assumed-type dummy arguments in ExtractDataRef (#169080)

Assumed-type dummy argument symbols s are never packaged in DataRefs
since the only way they can be used in Fortran is by forwarded as actual
arguments to other calls. When an ActualArgument comprising a forwarded
assumed-type dummy argument is presented to ExtractDataRef, it fails,
because ExtractDataRef for ActualArgument only handles actual argument
expressions (including variable references). Add support for actual
arguments that are assumed-type dummy arguments.

Fixes https://github.com/llvm/llvm-project/issues/168978.


 Commit: b7c358c44af3cda2b731f6bb94f6d765350017a4
 https://github.com/llvm/llvm-project/commit/b7c358c44af3cda2b731f6bb94f6d765350017a4
 Author: Med Ismail Bennani <ismail at bennani.ma>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M lldb/include/lldb/Interpreter/Interfaces/ScriptedInterface.h
 M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h

 Log Message:
 -----------
 [lldb/ScriptInterpreter] Add a way to retrieve script module file path (#170202)

This adds a new virtual method `GetScriptedModulePath()` to
`ScriptedInterface` that allows retrieving the file path of the Python
module containing the scripted object implementation.

The Python implementation acquires the GIL and walks through the
object's `__class__.__module__` to find the module's `__file__`
attribute. This will be used by ScriptedFrame to populate the module and
compile unit for frames pointing to Python source files.

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>


 Commit: 9324dae70f009ceb5c0e93b99e73c51fcaf67911
 https://github.com/llvm/llvm-project/commit/9324dae70f009ceb5c0e93b99e73c51fcaf67911
 Author: Simon Pilgrim <llvm-dev at redking.me.uk>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 A llvm/test/CodeGen/X86/combine-icmp.ll

 Log Message:
 -----------
 [X86] Add tests showing failure to concat icmp instructions together. (#170210)


 Commit: 6883d4a23605dbd67d24a44801e9c1888ffdf586
 https://github.com/llvm/llvm-project/commit/6883d4a23605dbd67d24a44801e9c1888ffdf586
 Author: Matt Arsenault <Matthew.Arsenault at amd.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
 M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
 M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
 M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant-32bit.mir
 M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-constant-32bit.mir
 M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-constant-32bit.mir
 M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant32bit.ll
 M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null.ll

 Log Message:
 -----------
 AMDGPU: Try to use zext to implement constant-32-bit addrspacecast (#168977)

If the high bits are assumed 0 for the cast, use zext. Previously
we would emit a build_vector and a bitcast with the high element
as 0. The zext is more easily optimized. I'm less convinced this is
good for globalisel, since you still need to have the inttoptr back
to the original pointer type.

The default value is 0, though I'm not sure if this is meaningful
in the real world. The real uses might always override the high
bit value with the attribute.


 Commit: ace65a0a8d7b9ad48c1f321cc70c711ecdab29bf
 https://github.com/llvm/llvm-project/commit/ace65a0a8d7b9ad48c1f321cc70c711ecdab29bf
 Author: Alex Langford <alangford at apple.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M lldb/test/Shell/helper/toolchain.py

 Log Message:
 -----------
 [LLDB] Update Shell lit config to handle c8031c3dd743 (#170225)


 Commit: 64a762804893ebf2c0942ad7970118188f27b16a
 https://github.com/llvm/llvm-project/commit/64a762804893ebf2c0942ad7970118188f27b16a
 Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang/include/clang/CIR/MissingFeatures.h
 M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
 M clang/test/CIR/CodeGen/coro-task.cpp

 Log Message:
 -----------
 [CIR] Upstream Emit the resume branch for cir.await op (#169864)

This PR upstreams the emission of the `cir.await` resume branch.
Handling the case where the return value of `co_await` is not ignored is
deferred to a future PR, which will be added once `co_return` is
upstreamed. Additionally, the `forLValue` variable is always `false` in
the current implementation. When support for emitting `coro_yield` is
added, this variable will be set to `true`, so that work is also
deferred to a future PR.


 Commit: be5db3386dbab435a5b44118b653c7785ad34168
 https://github.com/llvm/llvm-project/commit/be5db3386dbab435a5b44118b653c7785ad34168
 Author: Victor Mustya <victor.mustya at intel.com>
 Date: 2025-12-02 (Tue, 02 Dec 2025)

 Changed paths:
 M libclc/opencl/lib/generic/integer/bitfield_insert.cl

 Log Message:
 -----------
 [libclc] Fix bitfield_insert implementation (#170208)

The `bitfield_insert` function in the OpenCL C library had an incorrect
`__CLC_BODY` definition, that included the `.inc` file for the
`__clc_bitfield_insert` declaration instead of the correct
implementation. So, the function was not defined at all, leading to
linker errors when trying to use it.


 Commit: 677e1d078eacdeff10c7a69e4b83f88cceffead4
 https://github.com/llvm/llvm-project/commit/677e1d078eacdeff10c7a69e4b83f88cceffead4
 Author: Jasmine Tang <jjasmine at igalia.com>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
 M clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c
 A clang/test/CIR/CodeGenBuiltins/X86/avx512vl-builtins.c

 Log Message:
 -----------
 [CIR] Upstream gather instrinsics (#169157)


 Commit: e27dec5eed902e6c2e34afa1b593aa46699ce0a2
 https://github.com/llvm/llvm-project/commit/e27dec5eed902e6c2e34afa1b593aa46699ce0a2
 Author: Dan Liew <dan at su-root.co.uk>
 Date: 2025-12-01 (Mon, 01 Dec 2025)

 Changed paths:
 M lldb/include/lldb/lldb-enumerations.h
 A lldb/source/Plugins/InstrumentationRuntime/BoundsSafety/CMakeLists.txt
 A lldb/source/Plugins/InstrumentationRuntime/BoundsSafety/InstrumentationRuntimeBoundsSafety.cpp
 A lldb/source/Plugins/InstrumentationRuntime/BoundsSafety/InstrumentationRuntimeBoundsSafety.h
 M lldb/source/Plugins/InstrumentationRuntime/CMakeLists.txt
 A lldb/test/API/lang/BoundsSafety/soft_trap/Makefile
 A lldb/test/API/lang/BoundsSafety/soft_trap/TestBoundsSafetyInstrumentationPlugin.py
 A lldb/test/API/lang/BoundsSafety/soft_trap/main.c
 A lldb/test/API/lang/BoundsSafety/soft_trap/mockSoftTrapRuntime.c
 A lldb/test/Shell/BoundsSafety/Inputs/boundsSafetyMockCallSoftTrapRuntime.c
 A lldb/test/Shell/BoundsSafety/Inputs/boundsSafetyMockSoftTrapRuntime.c
 A lldb/test/Shell/BoundsSafety/Inputs/boundsSafetySoftTraps.c
 A lldb/test/Shell/BoundsSafety/Inputs/boundsSafetySoftTrapsMissingReason.c
 A lldb/test/Shell/BoundsSafety/boundssafety_soft_trap_call_minimal.test
 A lldb/test/Shell/BoundsSafety/boundssafety_soft_trap_call_minimal_missing_reason.test
 A lldb/test/Shell/BoundsSafety/boundssafety_soft_trap_call_minimal_no_dbg_info.test
 A lldb/test/Shell/BoundsSafety/boundssafety_soft_trap_call_minimal_no_plugin.test
 A lldb/test/Shell/BoundsSafety/boundssafety_soft_trap_call_str.test
 A lldb/test/Shell/BoundsSafety/boundssafety_soft_trap_call_with_str_missing_reason.test
 A lldb/test/Shell/BoundsSafety/boundssafety_soft_trap_call_with_str_no_dbg_info.test
 A lldb/test/Shell/BoundsSafety/boundssafety_soft_trap_call_with_str_no_dbg_info_null_str.test
 A lldb/test/Shell/BoundsSafety/boundssafety_soft_trap_call_with_str_no_plugin.test

 Log Message:
 -----------
 [BoundsSafety][LLDB] Implement instrumentation plugin for -fbounds-safety soft traps (#169117)

This patch tries to upstream code landed downstream in
https://github.com/swiftlang/llvm-project/pull/11835.

This patch implements an instrumentation plugin for the
`-fbounds-safety` soft trap mode first implemented in
https://github.com/swiftlang/llvm-project/pull/11645 (rdar://158088757).
That functionality isn't supported in upstream Clang yet, however the
instrumented plugin can be compiled without issue so this patch tries to
upstream it. The included tests are all disabled when the clang used for
testing doesn't support `-fbounds-safety`. This means the tests will be
skipped. However, it's fairly easy to point LLDB at a clang that does
support `-fbounds-safety. I've done this and confirmed the tests pass.
To use a custom clang the following can be done:

* For API tests set the `LLDB_TEST_COMPILER` CMake cache variable to
 point to appropriate compiler.
* For shell tests applying a patch like this can be used to set the
 appropriate compiler:

```

--- a/lldb/test/Shell/helper/toolchain.py
+++ b/lldb/test/Shell/helper/toolchain.py
@@ -271,6 +271,7 @@ def use_support_substitutions(config):
     if config.lldb_lit_tools_dir:
         additional_tool_dirs.append(config.lldb_lit_tools_dir)

+    config.environment['CLANG'] = '/path/to/clang'
     llvm_config.use_clang(
```

The current implementation of -fbounds-safety traps works by emitting
calls to runtime functions intended to log the occurrence of a soft
trap.
While the user could just set a breakpoint of these functions the
instrumentation plugin sets it automatically and provides several
additional features:

When debug info is available:

* It adjusts the stop reason to be the reason for trapping. This is
  extracted from the artificial frame in the debug info (similar to
  -fbounds-safety hard traps).
* It adjusts the selected frame to be the frame where the soft trap
  occurred.

When debug info is not available:

* For the `call-with-str` soft trap mode the soft trap reason is
  read from the first argument register.
* For the `call-minimal` soft trap mode the stop reason is adjusted
  to note its a bounds check failure but does not give further
  information because none is available.
* In this situation the selected frame is not adjusted because in
  this mode the user will be looking at assembly and adjusting the
  frame makes things confusing.

This patch includes shell and api tests. The shell tests seemed like the
best way to test behavior when debug info is missing because those tests
make it easy to disable building with debug info completely.

rdar://163230807


  Commit: c6f501d479e82185a5906096b758480e43f2edcc
      https://github.com/llvm/llvm-project/commit/c6f501d479e82185a5906096b758480e43f2edcc
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-12-01 (Mon, 01 Dec 2025)

  Changed paths:
    M compiler-rt/test/CMakeLists.txt
    M compiler-rt/test/xray/lit.site.cfg.py.in

  Log Message:
  -----------
  [XRay] Run tests inside bootstrapping build (#168378)

COMPILER_RT_STANDALONE_BUILD is set when doing a bootstrapping build
through LLVM_ENABLE_RUNTIMES with the CMake source directory being in
llvm/. This patch changes the XRay tests to also detect that we have
LLVM sources and the llvm-xray tool if we are in a bootstrapping build
through the use of the LLVM_TREE_AVAILABLE variable which is set in
runtimes/CMakeLists.txt.


  Commit: 91e8780424c0e7c2f11f1adfc47915f975691d87
      https://github.com/llvm/llvm-project/commit/91e8780424c0e7c2f11f1adfc47915f975691d87
  Author: Letu Ren <fantasquex at gmail.com>
  Date:   2025-12-01 (Mon, 01 Dec 2025)

  Changed paths:
    M clang/include/clang/CIR/Dialect/IR/CIROps.td
    M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
    M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
    M clang/test/CIR/CodeGenBuiltins/builtins-floating-point.c

  Log Message:
  -----------
  [CIR] Upstream Builtin FloorOp (#169954)


  Commit: 326ee7af410a5bba12ea20c80c0ad16bb915e47f
      https://github.com/llvm/llvm-project/commit/326ee7af410a5bba12ea20c80c0ad16bb915e47f
  Author: mitchell <mitchell.xu2 at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang-tools-extra/docs/ReleaseNotes.rst
    M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-pointer-as-pointers.cpp
    M clang/lib/Analysis/ExprMutationAnalyzer.cpp
    M clang/unittests/Analysis/ExprMutationAnalyzerTest.cpp

  Log Message:
  -----------
  [clang-tidy] Fix false positive in `misc-const-correctness` (#170065)

Closes https://github.com/llvm/llvm-project/issues/131599 and
https://github.com/llvm/llvm-project/issues/170033


  Commit: 755733e219a11a265e47cc1e4f63ad2dbb15f41e
      https://github.com/llvm/llvm-project/commit/755733e219a11a265e47cc1e4f63ad2dbb15f41e
  Author: Med Ismail Bennani <ismail at bennani.ma>
  Date:   2025-12-01 (Mon, 01 Dec 2025)

  Changed paths:
    M lldb/include/lldb/Target/ExecutionContext.h
    M lldb/include/lldb/Target/StackFrame.h
    M lldb/include/lldb/Target/StackFrameList.h
    M lldb/include/lldb/lldb-forward.h
    M lldb/source/Target/ExecutionContext.cpp
    M lldb/source/Target/StackFrameList.cpp

  Log Message:
  -----------
  [lldb/Target] Track containing StackFrameList to avoid circular dependencies (#170226)

This change adds tracking of the StackFrameList that produced each frame
by storing a weak pointer (m_frame_list_wp) in both `StackFrame` and
`ExecutionContextRef`.

When resolving frames through `ExecutionContextRef::GetFrameSP`, the
code now first attempts to use the remembered frame list instead of
immediately calling `Thread::GetStackFrameList`. This breaks circular
dependencies that can occur during frame provider initialization, where
creating a frame provider might trigger `ExecutionContext` resolution,
which would then call back into `Thread::GetStackFrameList()`, creating
an infinite loop.

The `StackFrameList` now sets m_frame_list_wp on every frame it creates,
and a new virtual method `GetOriginatingStackFrameList` allows frames to
expose their originating list.

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>


  Commit: 1f794e62b4467ac89ef093a7d8f061b0c4fc07ba
      https://github.com/llvm/llvm-project/commit/1f794e62b4467ac89ef093a7d8f061b0c4fc07ba
  Author: Brandon Wu <brandon.wu at sifive.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/test/CodeGen/RISCV/rvv/fminimumnum-sdnode.ll

  Log Message:
  -----------
  [NFC][RISCV] Correct fminimumnum test case (#170169)

The test case mismatch was introduced in #135727


  Commit: 744480a2a6b83f819b782ca0df11a25b23d9b245
      https://github.com/llvm/llvm-project/commit/744480a2a6b83f819b782ca0df11a25b23d9b245
  Author: David Zbarsky <dzbarsky at gmail.com>
  Date:   2025-12-01 (Mon, 01 Dec 2025)

  Changed paths:
    M utils/bazel/configure.bzl
    R utils/bazel/overlay_directories.py

  Log Message:
  -----------
  [bazel] Rewrite overlay handling to starlark (#170000)

Starlark is perfectly capable of doing what we need and this avoids the
dependency on a host Python


  Commit: da1a8876086fde210bace059bb5e9ea9886362f1
      https://github.com/llvm/llvm-project/commit/da1a8876086fde210bace059bb5e9ea9886362f1
  Author: Kelvin Li <kli at ca.ibm.com>
  Date:   2025-12-01 (Mon, 01 Dec 2025)

  Changed paths:
    M flang/test/Lower/module-debug-file-loc-linux.f90
    M flang/test/Transforms/debug-dwarf-version.fir
    M flang/test/Transforms/debug-line-table-existing.fir
    M flang/test/Transforms/debug-line-table-inc-file.fir
    M flang/test/Transforms/debug-line-table-inc-same-file.fir

  Log Message:
  -----------
  [flang] Enable debug test on AIX (NFC) (#169945)


  Commit: 28e200495e5b39b7599846c511e61723cde2f478
      https://github.com/llvm/llvm-project/commit/28e200495e5b39b7599846c511e61723cde2f478
  Author: Michael Liao <michael.hliao at gmail.com>
  Date:   2025-12-01 (Mon, 01 Dec 2025)

  Changed paths:
    M clang/test/SemaCUDA/device-kernel-call.cu

  Log Message:
  -----------
  [clang][CUDA] Clean up tests from device-side kernel call support. NFC

- Remove unused 'CHECK' from the CUDASema test


  Commit: 8dc6abbab383fe86508e8a1b4d429ed8150da06d
      https://github.com/llvm/llvm-project/commit/8dc6abbab383fe86508e8a1b4d429ed8150da06d
  Author: lonely eagle <2020382038 at qq.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M mlir/lib/Analysis/Presburger/Matrix.cpp

  Log Message:
  -----------
  [mlir][presburger] Implement moveColumns using std::rotate (#168243)


  Commit: 91531f320830e6cb5e9d48d011b5f9ac7e578fc7
      https://github.com/llvm/llvm-project/commit/91531f320830e6cb5e9d48d011b5f9ac7e578fc7
  Author: Mingjie Xu <xumingjie.enna1 at bytedance.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/AsmParser/LLParser.cpp
    M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
    M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
    M llvm/test/Assembler/thinlto-summary.ll

  Log Message:
  -----------
  [ThinLTO] Fix parsing null aliasee in alias summary (#169490)

In
https://github.com/llvm/llvm-project/commit/f8182f1aef5b6ec74cbe2c1618e759f0113921ba,
we add support for printing "null" aliasee in AsmWriter, but missing
support in LLParser.


  Commit: 0a03b7e6569ae89d55c9703faedf8e2503bcc728
      https://github.com/llvm/llvm-project/commit/0a03b7e6569ae89d55c9703faedf8e2503bcc728
  Author: Jianjian Guan <jacquesguan at me.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
    A clang/test/CIR/CodeGenBuiltins/X86/vec-set-builtins.c

  Log Message:
  -----------
  [CIR] Upstream CIR codegen for vec_set x86 builtin (#169265)

Support CIR codegen for x86 builtin vec_set.


  Commit: 039f883f7c350d2c8bd5cf07a05d757890ddcfdf
      https://github.com/llvm/llvm-project/commit/039f883f7c350d2c8bd5cf07a05d757890ddcfdf
  Author: Longsheng Mou <longshengmou at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
    M mlir/test/Dialect/Tensor/bufferize.mlir

  Log Message:
  -----------
  [mlir][tensor] Fix bug in `ConcatOpInterface` (#168676)

This PR fixes an issue in `ConcatOpInterface` where `tensor.concat`
fails when the concat dimension is dynamic while the result type is
static. The fix unifies the computation by using `OpFoldResult`,
avoiding the need to separately handle dynamic and static dimension
values. Fixes #162776.


  Commit: fbdf8ab59005bc35f23b3167e0783013c7ee5fa4
      https://github.com/llvm/llvm-project/commit/fbdf8ab59005bc35f23b3167e0783013c7ee5fa4
  Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
  Date:   2025-12-01 (Mon, 01 Dec 2025)

  Changed paths:
    M llvm/include/llvm/Transforms/Utils/Local.h
    M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
    M llvm/lib/Transforms/Scalar/SROA.cpp
    M llvm/lib/Transforms/Utils/Local.cpp
    M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/amdgpu-irtranslator.ll
    M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
    M llvm/test/CodeGen/AMDGPU/build_vector.ll
    M llvm/test/CodeGen/AMDGPU/fabs.bf16.ll
    M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
    M llvm/test/CodeGen/AMDGPU/fabs.ll
    M llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
    M llvm/test/CodeGen/AMDGPU/fdiv.ll
    M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
    M llvm/test/CodeGen/AMDGPU/fneg-fabs.bf16.ll
    M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
    M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
    M llvm/test/CodeGen/AMDGPU/fneg.ll
    M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
    M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
    M llvm/test/CodeGen/AMDGPU/fshl.ll
    M llvm/test/CodeGen/AMDGPU/fshr.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics.ll
    M llvm/test/CodeGen/AMDGPU/half.ll
    M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
    M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
    M llvm/test/CodeGen/AMDGPU/kernel-args.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
    M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
    M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
    M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
    M llvm/test/CodeGen/AMDGPU/llvm.log.ll
    M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
    M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
    M llvm/test/CodeGen/AMDGPU/max.ll
    M llvm/test/CodeGen/AMDGPU/min.ll
    M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
    M llvm/test/CodeGen/AMDGPU/rotl.ll
    M llvm/test/CodeGen/AMDGPU/rotr.ll
    M llvm/test/CodeGen/AMDGPU/s_addk_i32.ll
    M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/store-to-constant.ll
    M llvm/test/CodeGen/AMDGPU/udivrem.ll
    M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
    A llvm/test/Transforms/InstCombine/copy-access-metadata.ll
    A llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/copy-metadata-load-store.ll
    M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-vectors-complex.ll
    M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-vectors.ll

  Log Message:
  -----------
  [LSV] Merge contiguous chains across scalar types (#154069)

This change enables the LoadStoreVectorizer to merge and vectorize
contiguous chains even when their scalar element types differ, as long
as the total bitwidth matches. To do so, we rebase offsets between
chains, normalize value types to a common integer type, and insert the
necessary casts around loads and stores. This uncovers more
vectorization opportunities and explains the expected codegen updates
across AMDGPU tests.

Key changes:
- Chain merging
  - Build contiguous subchains and then merge adjacent ones when:
- They refer to the same underlying pointer object and address space.
    - They are either all loads or all stores.
    - A constant leader-to-leader delta exists.
- Rebasing one chain into the other's coordinate space does not overlap.
    - All elements have equal total bit width.
- Rebase the second chain by the computed delta and append it to the
first.

- Type normalization and casting
- Normalize merged chains to a common integer type sized to the total
bits.
- For loads: create a new load of the normalized type, copy metadata,
and cast back to the original type for uses if needed.
  - For stores: bitcast the value to the normalized type and store that.
- Insert zext/trunc for integer size changes; use bit-or-pointer casts
when sizes match.

- Cleanups
  - Erase replaced instructions and DCE pointer operands when safe.
- New helpers: computeLeaderDelta, chainsOverlapAfterRebase,
rebaseChain, normalizeChainToType, and allElemsMatchTotalBits.

Impact:
- Increases vectorization opportunities across mixed-typed but
size-compatible access chains.
- Large set of expected AMDGPU codegen diffs due to more/changed
vectorization.

This PR resolves #97715.


  Commit: 728cada359199d2952bdae43d0726fc5a208df6e
      https://github.com/llvm/llvm-project/commit/728cada359199d2952bdae43d0726fc5a208df6e
  Author: cmtice <cmtice at google.com>
  Date:   2025-12-01 (Mon, 01 Dec 2025)

  Changed paths:
    M lldb/docs/dil-expr-lang.ebnf
    M lldb/include/lldb/ValueObject/DILAST.h
    M lldb/include/lldb/ValueObject/DILEval.h
    M lldb/include/lldb/ValueObject/DILParser.h
    M lldb/source/ValueObject/DILAST.cpp
    M lldb/source/ValueObject/DILEval.cpp
    M lldb/source/ValueObject/DILParser.cpp

  Log Message:
  -----------
  [LLDB] Add type casting to DIL, part 1 of 3. (#165199)

This is an alternative to
https://github.com/llvm/llvm-project/pull/159500, breaking that PR down
into three separate PRs, to make it easier to review.

This first PR of the three adds the basic framework for doing type
casing to the DIL code, but it does not actually do any casting: In this
PR the DIL parser only recognizes builtin type names, and the DIL
interpreter does not do anything except return the original operand (no
casting). The second and third PRs will add most of the type parsing,
and do the actual type casting, respectively.


  Commit: 867d353cff54d4257afcd254196a75f9d057743e
      https://github.com/llvm/llvm-project/commit/867d353cff54d4257afcd254196a75f9d057743e
  Author: Kareem Ergawy <kareem.ergawy at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
    M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
    M mlir/test/Target/LLVMIR/allocatable_gpu_reduction.mlir
    A mlir/test/Target/LLVMIR/allocatable_gpu_reduction_teams.mlir

  Log Message:
  -----------
  [OpenMP][flang] Support GPU team-reductions on allocatables (#169651)

Extends the work started in #165714 by supporting team reductions.
Similar to what was done in #165714, this PR introduces proper
allocations, loads, and stores for by-ref reductions in teams-related
callbacks:
* `_omp_reduction_list_to_global_copy_func`,
* `_omp_reduction_list_to_global_reduce_func`,
* `_omp_reduction_global_to_list_copy_func`, and
* `_omp_reduction_global_to_list_reduce_func`.


  Commit: ff3d550d7ec4ec36750b730afb993cdf061b01f7
      https://github.com/llvm/llvm-project/commit/ff3d550d7ec4ec36750b730afb993cdf061b01f7
  Author: Timm Baeder <tbaeder at redhat.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/lib/AST/ByteCode/InterpBuiltin.cpp

  Log Message:
  -----------
  [clang][bytecode][NFC] Add popToUInt64() to builtin evaluation (#170164)

We often don't need the APSInt at all, so add a version that pops the
integral from the stack and just static_casts to uint64_t.


  Commit: f3501d70d8e4ae8640ad01663fc27d64af31d4aa
      https://github.com/llvm/llvm-project/commit/f3501d70d8e4ae8640ad01663fc27d64af31d4aa
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M compiler-rt/test/xray/TestCases/Posix/default-options.cpp

  Log Message:
  -----------
  [XRay] Mark default-options.cpp unsupported on ppc

This test fails now that it actually runs:

ld.lld: error: undefined symbol: std::__throw_system_error(int)


  Commit: cb6e1967c4f5239170b7c088ba6f86910ae66a63
      https://github.com/llvm/llvm-project/commit/cb6e1967c4f5239170b7c088ba6f86910ae66a63
  Author: Jason Rice <ricejasonf at gmail.com>
  Date:   2025-12-01 (Mon, 01 Dec 2025)

  Changed paths:
    M mlir/test/mlir-tblgen/op-decl-and-defs.td
    M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp

  Log Message:
  -----------
  [MLIR] Forward generated OpTy::create arguments (#170012)

The recent changes in the MLIR TableGen interface for generated
OpTy::build functions involves a new OpTy::create function that is
generated passing arguments without forwarding. This is problematic with
arguments that are move only such as `std::unique_ptr`. My particular
use case involves `std::unique_ptr<mlir::Region>` which is desirable as
the `mlir::OperationState` object accepts calls to
`addRegion(std::unique_ptr<mlir::Region>`.

In Discord, the use of `extraClassDeclarations` was suggested which I
may go with regardless since I still have to define the builder function
anyways, but perhaps you would consider this trivial change as it
supports a broader class of argument types for this approach.

Consider the declaration in TableGen:
```
  let builders = [ 
    OpBuilder<(ins "::mlir::Value":$cdr,
                   "::mlir::ValueRange":$packs,
                   "std::unique_ptr<::mlir::Region>":$body)>
  ];
  ```
  
  Which currently generates:
  ```cpp
 ExpandPacksOp ExpandPacksOp::create(::mlir::OpBuilder &builder, ::mlir::Location location, ::mlir::Value cdr, ::mlir::ValueRange packs, std::unique_ptr<::mlir::Region> body) {
  ::mlir::OperationState __state__(location, getOperationName());
  build(builder, __state__, std::forward<decltype(cdr)>(cdr), std::forward<decltype(packs)>(packs), std::forward<decltype(body)>(body));
  auto __res__ = ::llvm::dyn_cast<ExpandPacksOp>(builder.create(__state__));
  assert(__res__ && "builder didn't return the right type");
  return __res__;
}


```
With this change it will generate:
```cpp
ExpandPacksOp ExpandPacksOp::create(::mlir::OpBuilder &builder, ::mlir::Location location, ::mlir::Value cdr, ::mlir::ValueRange packs, std::unique_ptr<::mlir::Region>&&body) {
  ::mlir::OperationState __state__(location, getOperationName());
  build(builder, __state__, static_cast<decltype(cdr)>(cdr), std::forward<decltype(packs)>(packs), std::forward<decltype(body)>(body));
  auto __res__ = ::llvm::dyn_cast<ExpandPacksOp>(builder.create(__state__));
  assert(__res__ && "builder didn't return the right type");
  return __res__;
}
```

Another option could be to make this function a template but then it
would not be hidden in the generated translation unit. I don't know if
that was the original intent. Thank you for your consideration.


  Commit: 4522448cd16489b84c80ec39ae06960b01fd3b59
      https://github.com/llvm/llvm-project/commit/4522448cd16489b84c80ec39ae06960b01fd3b59
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
    A llvm/test/MC/PowerPC/fixup-out-of-range.s

  Log Message:
  -----------
  [PowerPC][MC] Diagnose out of range branch fixups (#165859)

Currently, out-of-range branch fixups will be silently miscompiled. GNU
as will instead print an "operand out of range" error instead.

Check that the branch target fixups fit into the proper range and have
low zero bits. The implementation is inspired by SystemZ:
https://github.com/llvm/llvm-project/blob/0ed8e66f88b689c152245d6b968a06fa8e67b51f/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp#L31

(My actual interest here is not actually assembly usage, but LLVM
failing to use the correct branch kind for reasons I've not tracked down
yet. Currently this just silently truncates the branch target instead of
producing an error.)


  Commit: 8c7c940585c1eb5e9cc1a00c42691051f183863d
      https://github.com/llvm/llvm-project/commit/8c7c940585c1eb5e9cc1a00c42691051f183863d
  Author: Durgadoss R <durgadossr at nvidia.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
    M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
    M mlir/test/Dialect/LLVMIR/nvvm.mlir
    M mlir/test/Target/LLVMIR/nvvm/mbar_init.mlir
    M mlir/test/Target/LLVMIR/nvvm/mbar_invalid.mlir
    A mlir/test/Target/LLVMIR/nvvm/mbar_test_wait.mlir

  Log Message:
  -----------
  [MLIR][NVVM] Update mbarrier.test.wait Op (#169698)

This patch extends mbarrier.test_wait to support scope,
semantics, and phase-parity, completing the updates for
this Op up to Blackwell. Corresponding lit tests are added
to verify the lowering.

Signed-off-by: Durgadoss R <durgadossr at nvidia.com>


  Commit: c4def4631c2c826046c2f496b51143a43109124f
      https://github.com/llvm/llvm-project/commit/c4def4631c2c826046c2f496b51143a43109124f
  Author: Vasily Leonenko <vleonen at users.noreply.github.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M bolt/lib/Rewrite/RewriteInstance.cpp
    A bolt/test/AArch64/instrument-no-fini.s
    A bolt/test/X86/instrument-no-fini.s

  Log Message:
  -----------
  [BOLT] Allow missing DT_FINI{,_ARRAY} if instrumentation-sleep-time is used (#170086)

This PR allows instrument binaries without the .fini and .fini_array
entries if the user passes the `instrumentation-sleep-time` option.
The `.fini` or `.fini_array` entries are used to hook into the process
finalization process and write a profile during finalization. However,
with the `instrumentation-sleep-time` option, the profile should be
written periodically, without the need for it to be written at
finalization.

Co-authored-by: Vasily Leonenko <vasily.leonenko at huawei.com>


  Commit: b5f7058e9114bffccadba520eca9d83891782cde
      https://github.com/llvm/llvm-project/commit/b5f7058e9114bffccadba520eca9d83891782cde
  Author: Nathan Corbyn <n_corbyn at apple.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/test/CodeGen/AArch64/shift.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Don't crash when legalising vector G_SHL (#168848)


  Commit: 87d37956b33d4b582e6ff7a0ed4707e70bef361d
      https://github.com/llvm/llvm-project/commit/87d37956b33d4b582e6ff7a0ed4707e70bef361d
  Author: Fangrui Song <i at maskray.me>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M lld/MachO/UnwindInfoSection.cpp

  Log Message:
  -----------
  [lld-macho] Remove cuIndices indirection in UnwindInfoSection. NFC (#170252)

cuEntries was sorted indirectly through a separate `cuIndices`.
Eliminate cuIndices for simplicity.

Linking chromium_framework from `#48001` with `-no_uuid` gives identical
executable using this patch.


  Commit: 2024d6732b9ab0ad3077a5ddc80b647cd5aa138e
      https://github.com/llvm/llvm-project/commit/2024d6732b9ab0ad3077a5ddc80b647cd5aa138e
  Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/lds-dma-waits.ll

  Log Message:
  -----------
  [NFC][AMDGPU] modify lit test to use update_llc_test_checks


  Commit: 34c699246d9d2ad0e09306d4faed6e8d7ec87aa5
      https://github.com/llvm/llvm-project/commit/34c699246d9d2ad0e09306d4faed6e8d7ec87aa5
  Author: Vladi Krapp <vladi.krapp at arm.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp

  Log Message:
  -----------
  [Arm] Control forced unrolling of small loops (#170127)

* Add flag to control cost threshold for forced unrolling of loops.
  Existing value preserved as default.


  Commit: 30219f0f4300b767ece5ea07609a707bf62c7300
      https://github.com/llvm/llvm-project/commit/30219f0f4300b767ece5ea07609a707bf62c7300
  Author: Diana Picus <Diana-Magda.Picus at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    M llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn-cs-chain-intrinsic-dyn-vgpr-w32.ll
    M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
    M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
    M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-intrinsic-dyn-vgpr-w32.ll
    M llvm/test/CodeGen/AMDGPU/remove-register-flags.mir

  Log Message:
  -----------
  [AMDGPU] Allow any SGPRs for chain callees (#168345)

Chain calls never return and don't need to preserve any SGPRs.
Therefore, we don't need to limit the registers used for callees to the
CCR_SGPR_64 register class - it's fine to use any available SGPRs.

Also introduce a new pseudo, SI_TCRETURN_CHAIN, which also has a plain
SGPR_64 operand. This is necessary because we won't be able to lower
SI_CS_CHAIN_TC to SI_TCRETURN anymore, since its operand accepts a wider
range of registers than the latter.


  Commit: b76815218ad9e3754f00d656f59aea9badc037e7
      https://github.com/llvm/llvm-project/commit/b76815218ad9e3754f00d656f59aea9badc037e7
  Author: Cullen Rhodes <cullen.rhodes at arm.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
    M llvm/test/Transforms/Attributor/dereferenceable-1.ll
    M llvm/test/Transforms/Attributor/nonnull.ll
    M llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll
    M llvm/test/Transforms/Attributor/willreturn.ll
    M llvm/test/Transforms/FunctionAttrs/nonnull.ll

  Log Message:
  -----------
  Revert "[Attributor] Support nested conditional branches" (#170257)

Reverts llvm/llvm-project#168532

Causing a crash in the flang-rt that needs to be investigated, see
#170211.


  Commit: 04dd71cb0b5f1a59e68d6aa843e0a50e0d725af7
      https://github.com/llvm/llvm-project/commit/04dd71cb0b5f1a59e68d6aa843e0a50e0d725af7
  Author: Henrich Lauko <xlauko at mail.muni.cz>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
    M clang/include/clang/CIR/Dialect/IR/CIROps.td
    M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
    M clang/lib/CIR/CodeGen/CIRGenModule.cpp
    M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
    M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
    M clang/test/CIR/CodeGen/aapcs-volatile-bitfields.c
    M clang/test/CIR/CodeGen/address-space-conversion.cpp
    M clang/test/CIR/CodeGen/address-space.c
    M clang/test/CIR/CodeGen/array-ctor.cpp
    M clang/test/CIR/CodeGen/asm-label-inline-builtins.c
    M clang/test/CIR/CodeGen/assign-operator.cpp
    M clang/test/CIR/CodeGen/bitfield-union.c
    M clang/test/CIR/CodeGen/bitfields.c
    M clang/test/CIR/CodeGen/bitfields.cpp
    M clang/test/CIR/CodeGen/bitfields_be.c
    M clang/test/CIR/CodeGen/constant-inits.cpp
    M clang/test/CIR/CodeGen/copy-constructor.cpp
    M clang/test/CIR/CodeGen/coro-task.cpp
    M clang/test/CIR/CodeGen/cxx-conversion-operators.cpp
    M clang/test/CIR/CodeGen/delete.cpp
    M clang/test/CIR/CodeGen/destructors.cpp
    M clang/test/CIR/CodeGen/dtors.cpp
    M clang/test/CIR/CodeGen/dynamic-cast.cpp
    M clang/test/CIR/CodeGen/global-ctor-dtor.cpp
    M clang/test/CIR/CodeGen/goto.cpp
    M clang/test/CIR/CodeGen/inline-attributes.cpp
    M clang/test/CIR/CodeGen/label-values.c
    M clang/test/CIR/CodeGen/label.c
    M clang/test/CIR/CodeGen/lambda-static-invoker.cpp
    M clang/test/CIR/CodeGen/lambda.cpp
    M clang/test/CIR/CodeGen/linkage-spec.cpp
    M clang/test/CIR/CodeGen/no-prototype.c
    M clang/test/CIR/CodeGen/placement-new.cpp
    M clang/test/CIR/CodeGen/ptrdiff.cpp
    M clang/test/CIR/CodeGen/statement-exprs.c
    M clang/test/CIR/CodeGen/stmt-expr.cpp
    M clang/test/CIR/CodeGen/var_arg.c
    M clang/test/CIR/CodeGen/variable-decomposition.cpp
    M clang/test/CIR/CodeGen/vbase.cpp
    M clang/test/CIR/CodeGen/volatile.cpp
    M clang/test/CIR/CodeGen/vtable-emission.cpp
    M clang/test/CIR/CodeGenBuiltins/builtin-fcmp-sse.c
    M clang/test/CIR/CodeGenBuiltins/builtin_inline.c
    M clang/test/CIR/CodeGenBuiltins/builtin_prefetch.c
    M clang/test/CIR/CodeGenBuiltins/builtins-overflow.cpp
    M clang/test/CIR/IR/inline-attrs.cir
    M clang/test/CIR/func-linkage.cpp

  Log Message:
  -----------
  [CIR] Align inline-kind FuncOp attribute with incubator (#170050)

Switches to more efficient explicit enum property instead of a wrapped
storage, simplifying the string representation. The attribute is now
placed before the symbol name for consistency with other FuncOp
attributes. FileCheck patterns are also simplified to match only the
attributes under test.


  Commit: 96056669493dfd3db653790579b0dbeba0cdaa5f
      https://github.com/llvm/llvm-project/commit/96056669493dfd3db653790579b0dbeba0cdaa5f
  Author: Robert Imschweiler <robert.imschweiler at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M openmp/runtime/src/exports_so.txt
    M openmp/runtime/src/exports_test_so.txt
    M openmp/runtime/src/kmp_ftn_cdecl.cpp
    M openmp/runtime/src/kmp_ftn_entry.h
    M openmp/runtime/src/kmp_ftn_os.h

  Log Message:
  -----------
  Fix Windows OpenMP build (#170142)

fixes Windows build issue in
https://github.com/llvm/llvm-project/pull/168554


  Commit: a09571ed5be3054b546b714c62c078b595d2f1cd
      https://github.com/llvm/llvm-project/commit/a09571ed5be3054b546b714c62c078b595d2f1cd
  Author: jeanPerier <jperier at nvidia.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M flang/include/flang/Optimizer/Dialect/FIROps.td
    M flang/lib/Lower/Bridge.cpp
    M flang/lib/Optimizer/Dialect/FIROps.cpp
    M flang/test/Fir/fir-ops.fir
    A flang/test/Lower/dispatch-table-abstract.f90

  Log Message:
  -----------
  [flang] represent ABSTRACT in fir.type_info (#170109)

This patch keeps information about ABSTRACT derived types and DEFERRED
type bound procedures inside fir.type_info dispatch tables.

This is part of the effort to delay generation of runtime type info
global by keeping the type information in a more condense fashion inside
fir.type_info (which is also easier to use for any potential
optimizations).


  Commit: 9107d097227e8b10ad3aebdd109539ea13ddb170
      https://github.com/llvm/llvm-project/commit/9107d097227e8b10ad3aebdd109539ea13ddb170
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
    M llvm/test/CodeGen/AArch64/machine-sme-abi-find-insert-pt.mir
    M llvm/test/CodeGen/AArch64/sme-agnostic-za.ll
    M llvm/test/CodeGen/AArch64/sme-dynamic-tls.ll
    M llvm/test/CodeGen/AArch64/sme-lazy-save-call.ll
    M llvm/test/CodeGen/AArch64/sve-stack-frame-layout.ll

  Log Message:
  -----------
  [AArch64][SME] Avoid clobbering X0 in the MachineSMEABIPass (#170131)

This tweaks `findStateChangeInsertionPoint` to also avoid clobbering X0,
which should be possible in most cases (since X0's live ranges are
likely to be very short before register allocation).

This improves codegen in a few cases, as not all redundant copies
to/from X0 are eliminated.


  Commit: fa2ddf24e1d538836438c51fcbaa1eabff31bfa2
      https://github.com/llvm/llvm-project/commit/fa2ddf24e1d538836438c51fcbaa1eabff31bfa2
  Author: Diana Picus <Diana-Magda.Picus at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/amdgcn-cs-chain-intrinsic-dyn-vgpr-w32.ll

  Log Message:
  -----------
  [AMDGPU] Fixup 30219f0f4300 (#170266)


  Commit: b17e644eedf31e498350b61855a3ac19b9c11d2c
      https://github.com/llvm/llvm-project/commit/b17e644eedf31e498350b61855a3ac19b9c11d2c
  Author: Jean-Didier PAILLEUX <jean-didier.pailleux at sipearl.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M flang-rt/lib/runtime/extensions.cpp
    M flang/docs/Intrinsics.md
    M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
    M flang/include/flang/Optimizer/Builder/Runtime/Intrinsics.h
    M flang/include/flang/Runtime/extensions.h
    M flang/lib/Evaluate/intrinsics.cpp
    M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
    M flang/lib/Optimizer/Builder/Runtime/Intrinsics.cpp
    A flang/test/Lower/Intrinsics/rand.f90

  Log Message:
  -----------
  [flang/flang-rt] Adding support of RAND, IRAND and SRAND intrinsics (#166780)

This PR adds support of
[RAND](https://gcc.gnu.org/onlinedocs/gcc-9.2.0/gfortran/RAND.html),
[IRAND](https://gcc.gnu.org/onlinedocs/gcc-9.2.0/gfortran/IRAND.html)
and
[SRAND](https://gcc.gnu.org/onlinedocs/gcc-9.2.0/gfortran/SRAND.html)
intrinsics in Flang, which are part of the GNU extension.
These intrinsics are used in the following benchmark:
[floatingspeed](https://github.com/ahbarnett/floatingspeed/)


  Commit: 0dec52b2c3f8d9b94c7ca8aadc0da7a1ed5055d7
      https://github.com/llvm/llvm-project/commit/0dec52b2c3f8d9b94c7ca8aadc0da7a1ed5055d7
  Author: Sven van Haastregt <sven.vanhaastregt at arm.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/include/clang/Basic/TokenKinds.h

  Log Message:
  -----------
  Fix NDEBUG Wundef warning; NFC (#170153)

The `NDEBUG` macro is tested for defined-ness everywhere else. The
instance here triggers a warning when compiling with `-Wundef`.


  Commit: 96c69b7393be845dce997ead88a4cfd3ea0f8944
      https://github.com/llvm/llvm-project/commit/96c69b7393be845dce997ead88a4cfd3ea0f8944
  Author: Marco Elver <elver at google.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/lib/CodeGen/BackendUtil.cpp
    M clang/test/CodeGen/lto-newpm-pipeline.c
    M llvm/include/llvm/Transforms/Instrumentation/AllocToken.h
    M llvm/lib/Passes/PassBuilderPipelines.cpp
    M llvm/lib/Transforms/Instrumentation/AllocToken.cpp
    M llvm/test/CodeGen/AArch64/print-pipeline-passes.ll
    A llvm/test/Instrumentation/AllocToken/hot-cold-new.ll
    A llvm/test/Instrumentation/AllocToken/module-flags.ll
    A llvm/test/LTO/X86/alloc-token-hot-cold-new.ll
    A llvm/test/LTO/X86/alloc-token.ll
    M llvm/test/Other/new-pm-O0-defaults.ll
    M llvm/test/Other/new-pm-defaults.ll
    M llvm/test/Other/new-pm-lto-defaults.ll
    M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
    M llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
    M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll

  Log Message:
  -----------
  [LTO][AllocToken] Support AllocToken instrumentation in backend (#169358)

Unconditionally add AllocTokenPass to the optimization pipelines, and
ensure that it runs last in LTO backend pipelines. The latter ensures
that AllocToken instrumentation can be moved later in the LTO pipeline
to avoid interference with other optimizations (e.g. PGHO) and enable
late heap-allocation optimizations.

In preparation of removing AllocTokenPass being added by Clang, add
support for AllocTokenPass to read configuration options from LLVM
module flags.

To optimize given the pass is now runs unconditionally, only retrieve
TargetLibraryInfo and OptimizationRemarkEmitter when necessary.


  Commit: 885509b1a2c08071c6b14eba84a2d80741cc9520
      https://github.com/llvm/llvm-project/commit/885509b1a2c08071c6b14eba84a2d80741cc9520
  Author: Martin Storsjö <martin at martin.st>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/test/tools/llvm-readobj/COFF/arm64-packed-unwind.s
    M llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp

  Log Message:
  -----------
  [llvm-readobj] [ARMWinEH] Fix the interpretation of packed unwind CR=01 RegI=1 (#169676)

Even though the table for how to expand packed unwind info at [1]
doesn't explicitly say this, this case is mentioned at [2] under the
case "Only x19 saved":

    sub    sp,sp,#16                // reg save area allocation*
    stp    x19,lr,[sp]              // save x19, lr
    sub    sp,sp,#(framesz-16)      // allocate the remaining local area

This was discussed and clarified at [3].

[1]
https://learn.microsoft.com/en-us/cpp/build/arm64-exception-handling?view=msvc-170#packed-unwind-data
[2]
https://learn.microsoft.com/en-us/cpp/build/arm64-exception-handling?view=msvc-170#arm64-stack-frame-layout
[3]
https://github.com/llvm/llvm-project/issues/169588#issuecomment-3581688753


  Commit: 535f604dabfb6563dab2a2478fb665699523fd0a
      https://github.com/llvm/llvm-project/commit/535f604dabfb6563dab2a2478fb665699523fd0a
  Author: Martin Storsjö <martin at martin.st>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/MC/MCWin64EH.cpp

  Log Message:
  -----------
  [MC] [Win64EH] Clarify the comment about a skipped case of packed unwind info (#169784)

Clarify the comment from 924defada9bc0e3c89b0c0e288d7cb4dd654e7d4. There
is no longer any ambiguity about this case; newer versions of Windows
correctly match the documentation, making it clear that the older
versions were incorrect. Mention specific versions that have and don't
have the inconsistency.

Even if we wouldn't care about the older versions of Windows, we can't
enable this case of unwind info packing, unless the implementation also
is changed to match for asymmetrical prologs/epilogs.


  Commit: bbbc681463316425e3e511a030a2f932e5999bef
      https://github.com/llvm/llvm-project/commit/bbbc681463316425e3e511a030a2f932e5999bef
  Author: Dan Blackwell <dan_blackwell at apple.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
    A llvm/test/CodeGen/AArch64/memtag-compact-unwind.ll

  Log Message:
  -----------
  [AArch64] Force dwarf unwind for MTE-tagged stack frames (#168530)

Currently, on Darwin running with -fsanitize=memtag-stack generates
compact-unwind exception unwinding that does not untag MTE-tagged memory
on the way back up.

This patch forces dwarf unwinding on MTE-tagged frames.

rdar://162195539


  Commit: 437fa02c074221ddc635caf6261e056ce44f5178
      https://github.com/llvm/llvm-project/commit/437fa02c074221ddc635caf6261e056ce44f5178
  Author: David Green <david.green at arm.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/test/CodeGen/Thumb2/mve-vmulh.ll

  Log Message:
  -----------
  [ARM] Add tests for over-sized mulh. NFC

The double-sized v8i32 do OK, but the larger v16i32 do not current get
converted to umulh.


  Commit: f01e8ac0041da783608029825cb8931f0b9f5b9f
      https://github.com/llvm/llvm-project/commit/f01e8ac0041da783608029825cb8931f0b9f5b9f
  Author: Corentin Jabot <corentinjabot at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/lib/Sema/SemaType.cpp
    M clang/test/SemaCXX/zero-length-arrays.cpp

  Log Message:
  -----------
  [Clang] Fix handling of zero-length arrays in sfinae context. (#170144)

We were producing a diagnostic for zero-length arrays in Sfinae context,
without invalidating the overload.

This causes the diagnostic to be emitted
if and when that undiagnosed overload is selected.

Fixes #170040


  Commit: d20d84fec5945fcc16aa6f63879e1458d4af9ea6
      https://github.com/llvm/llvm-project/commit/d20d84fec5945fcc16aa6f63879e1458d4af9ea6
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M lldb/source/API/SBDebugger.cpp
    M lldb/unittests/DAP/TestBase.cpp

  Log Message:
  -----------
  [lldb] Make sure SBError is valid when SBDebugger::InitializeWithErrorHandling succeeds (#170156)

Fixes #169788

When this function fails to initialise the debugger, it sets the SBError
using the returned error from the initialise function. This results in
Success being false and isVaid being true. This is expected behaviour.

When it does not fail to initialise, it was returning the default
constructed SBError which has Success() == true but IsValid == false.
IsValid should be true, to show that the success can be trusted.

To fix this, construct the SBError using a default constructed Status,
which results in Success and IsValid being true.


  Commit: 2f86bc207af7a5bd766d4d224c30851d5ced5999
      https://github.com/llvm/llvm-project/commit/2f86bc207af7a5bd766d4d224c30851d5ced5999
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/tools/CMakeLists.txt

  Log Message:
  -----------
  [clang] Only build c-index-test and apinotes-test when clang tests are included (#151157)

Those programs are only used for testing, and it's used in tests that
are already guarded by CLANG_INCLUDE_TESTS in clang/CMakeLists.txt.

This change enables us to do builds with
LLVM_INSTALL_TOOLCHAIN_ONLY=OFF, and CLANG_INCLUDE_TESTS=OFF, which
contain the required files to build other bits of llvm-project
standalone, but do not include those unnecessary testing programs.


  Commit: 1c32b6f51ccaaf9c65be11d7dca9e5a476cddb5a
      https://github.com/llvm/llvm-project/commit/1c32b6f51ccaaf9c65be11d7dca9e5a476cddb5a
  Author: valadaptive <79560998+valadaptive at users.noreply.github.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    A llvm/include/llvm/Transforms/Utils/ARMCommonInstCombineIntrinsic.h
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
    A llvm/lib/Transforms/Utils/ARMCommonInstCombineIntrinsic.cpp
    M llvm/lib/Transforms/Utils/CMakeLists.txt
    M llvm/test/Transforms/InstCombine/AArch64/aes-intrinsics.ll
    M llvm/test/Transforms/InstCombine/ARM/2012-04-23-Neon-Intrinsics.ll
    M llvm/test/Transforms/InstCombine/ARM/aes-intrinsics.ll
    M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn

  Log Message:
  -----------
  [AArch64][ARM] Move ARM-specific InstCombine transforms into `Transforms/Utils` (#169589)

Back when `TargetTransformInfo::instCombineIntrinsic` was added in
https://reviews.llvm.org/D81728, several transforms common to both ARM
and AArch64 were kept in the non-target-specific `InstCombineCalls.cpp`
so they could be shared between the two targets.

I want to extend the transform of the `tbl` intrinsics into static
`shufflevector`s in a similar manner to
https://github.com/llvm/llvm-project/pull/169110 (right now it only
works with a 64-bit `tbl1`, but `shufflevector` should allow it to work
with up to 2 operands, and it can definitely work with 128-bit vectors).
I think separating out the transform into a TTI hook is a prerequisite.

~~I'm not happy about creating an entirely new module for this and
having to wire it up through CMake and everything, but I'm not sure
about the alternatives. If any maintainers can think of a cleaner way of
doing this, I'm very open to it.~~

I've moved the transforms into
`Transforms/Utils/ARMCommonInstCombineIntrinsic.cpp`, which is a lot
simpler.


  Commit: 4a0b5bc2b5ddacc12260761a0ea18fdf2442e412
      https://github.com/llvm/llvm-project/commit/4a0b5bc2b5ddacc12260761a0ea18fdf2442e412
  Author: Martin Storsjö <martin at martin.st>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/MC/MCWin64EH.cpp
    M llvm/test/MC/AArch64/seh-packed-unwind.s

  Log Message:
  -----------
  [MC] [Win64EH] Produce packed unwind for the special case of X19+LR (#169697)


  Commit: c12dd598e2f76864b2ea4bcc8616334872d1c112
      https://github.com/llvm/llvm-project/commit/c12dd598e2f76864b2ea4bcc8616334872d1c112
  Author: Arseniy Zaostrovnykh <necto.ne at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp

  Log Message:
  -----------
  [NFC][analyzer] Constify AnalysisConsumer::getModeForDecl (#170275)

In my previous commit I forgot that `this` argument of
AnalysisConsumer::getModeForDecl() is also never modified.
Here is the missing trailing const.


  Commit: aaa37afbc283aef885afc779dcb1539a3b3775e6
      https://github.com/llvm/llvm-project/commit/aaa37afbc283aef885afc779dcb1539a3b3775e6
  Author: Paul Walker <paul.walker at arm.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/test/CodeGen/AArch64/sve-sext-zext.ll

  Log Message:
  -----------
  [LLVM][CodeGen][SVE] Add lowering for ISD::[ANY,SIGN,ZERO]_EXTEND_VECTOR_INREG. (#169847)


  Commit: 3e5b86cec112f5f5639c71bd54e7ca7862cf58bb
      https://github.com/llvm/llvm-project/commit/3e5b86cec112f5f5639c71bd54e7ca7862cf58bb
  Author: Martin Storsjö <martin at martin.st>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/test/MC/AArch64/seh.s

  Log Message:
  -----------
  [AArch64] [test] Write the seh.s test output object to a file

This is what is done in other tests; this makes it easier to
inspect the output of this test manually.


  Commit: e50ac8a9b1bca90b5d3fea7a20b9985870a08df4
      https://github.com/llvm/llvm-project/commit/e50ac8a9b1bca90b5d3fea7a20b9985870a08df4
  Author: Martin Storsjö <martin at martin.st>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/test/MC/AArch64/seh.s

  Log Message:
  -----------
  [AArch64] [test] Move tests for custom unwind opcodes to a separate function

These custom opcodes disable the checker for having the prologue
length actually match the opcodes (see checkARM64Instructions in
MCWin64EH.cpp) - which led to the prologue mismatching the opcodes
by one instruction, since 312d6b488ef9d7c0e4d649827820db7285e36406.

Move the special opcodes to a separate test function.

Remove the mismatched nop instruction at the end of the main
function, as this prologue now is assembled with the strict length
checking enabled.


  Commit: 9e27fefc180da46bed8731cb19f542f1bd6f2ff4
      https://github.com/llvm/llvm-project/commit/9e27fefc180da46bed8731cb19f542f1bd6f2ff4
  Author: Martin Storsjö <martin at martin.st>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/test/MC/AArch64/seh.s

  Log Message:
  -----------
  [AArch64] [test] Fix stack allocation instructions in the seh.s test

The actual unwind opcodes only stores stack increments in units
of 16 (which is what it is listed as in the unwind opcode
dumping by llvm-readobj); actually write what we intend to encode.


  Commit: 4a619a7d082473ca2373824ac9c7f2ea61011a73
      https://github.com/llvm/llvm-project/commit/4a619a7d082473ca2373824ac9c7f2ea61011a73
  Author: Martin Storsjö <martin at martin.st>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/test/MC/AArch64/seh.s

  Log Message:
  -----------
  [AArch64] [test] Spell out the matching instructions for SVE unwind opcodes

The MS dumpbin.exe tool can dump the unwind opcodes with the
"-unwindinfo" option; this mode also checks that the instructions
actually match the expected ones here. (This mode doesn't seem
to fully work for all instructions here, but spell out all the
intended instructions here.)


  Commit: 458035027c80e984bf5862140aed20d5e50dd22a
      https://github.com/llvm/llvm-project/commit/458035027c80e984bf5862140aed20d5e50dd22a
  Author: Martin Storsjö <martin at martin.st>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/test/MC/AArch64/seh-large-func-multi-epilog.s
    M llvm/test/MC/AArch64/seh-packed-epilog.s
    M llvm/test/MC/AArch64/seh-packed-unwind.s

  Log Message:
  -----------
  [AArch64] [test] Make unwind info tests actually use the right instructions

This makes them match the expected decoding of the unwind info
opcodes, avoiding mismatch indications from "dumpbin -unwindinfo".


  Commit: 753f47d6a5043b32f6eebf467cca26f5e1a0611a
      https://github.com/llvm/llvm-project/commit/753f47d6a5043b32f6eebf467cca26f5e1a0611a
  Author: ArnavM3434 <84486711+ArnavM3434 at users.noreply.github.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp

  Log Message:
  -----------
  [X86] Make VBMI2 funnel shifts use VSHLD/VSHRD for const splats (#169401)

Make ISD::FSHL/FSHR legal on VBMI2 vector targets and convert to VSHLD/VSHRD in a combine

closes #166949


  Commit: 4b6ad1187633c55087e00ab90567260ae6aafd0d
      https://github.com/llvm/llvm-project/commit/4b6ad1187633c55087e00ab90567260ae6aafd0d
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
    M llvm/test/Transforms/LoopVectorize/hoist-predicated-loads-with-predicated-stores.ll

  Log Message:
  -----------
  [VPlan] Sink predicated stores with complementary masks. (#168771)

Extend the logic to hoist predicated loads
(https://github.com/llvm/llvm-project/pull/168373) to sink predicated
stores with complementary masks in a similar fashion.

The patch refactors some of the existing logic for legality checks to be
shared between hosting and sinking, and adds a new sinking transform on
top.

With respect to the legality checks, for sinking stores the code also
checks if there are any aliasing stores that may alias, not only loads.

PR: https://github.com/llvm/llvm-project/pull/168771


  Commit: e8bf01108589be73f4057fe285cd7e04b4143f4a
      https://github.com/llvm/llvm-project/commit/e8bf01108589be73f4057fe285cd7e04b4143f4a
  Author: Tibor Győri <tibor.gyori at chem.u-szeged.hu>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
    M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
    A llvm/test/Transforms/LoopVectorize/diag-disabled-vectorization-msgs.ll

  Log Message:
  -----------
  [LV] Emit better debug and opt-report messages when vectorization is disallowed in the LoopVectorizer (#158513)

While looking into fixing #158499, I found some other cases where the
messages emitted could be improved. This PR improves both the messages
printed to the debug output and the missed-optimization messages in
cases where:

- loop vectorization is explicitly disabled
- loop vectorization is implicitly disabled by disabling all loop
transformations
- loop vectorization is set to happen only where explicitly enabled

A branch that should currently be unreachable is also added. If the
related logic ever breaks (eg. due to changes to getForce() or the
ForceKind enum) this should alert devs and users. New test cases are
also added to verify that the correct messages (and only them) are
outputted.

---------

Co-authored-by: GYT <tiborgyri at gmail.com>
Co-authored-by: Florian Hahn <flo at fhahn.com>


  Commit: f7418517316f1b3d66733c5a607c785d15099fab
      https://github.com/llvm/llvm-project/commit/f7418517316f1b3d66733c5a607c785d15099fab
  Author: David Green <david.green at arm.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    R llvm/include/llvm/Transforms/Utils/ARMCommonInstCombineIntrinsic.h
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
    R llvm/lib/Transforms/Utils/ARMCommonInstCombineIntrinsic.cpp
    M llvm/lib/Transforms/Utils/CMakeLists.txt
    M llvm/test/Transforms/InstCombine/AArch64/aes-intrinsics.ll
    M llvm/test/Transforms/InstCombine/ARM/2012-04-23-Neon-Intrinsics.ll
    M llvm/test/Transforms/InstCombine/ARM/aes-intrinsics.ll
    M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn

  Log Message:
  -----------
  Revert "[AArch64][ARM] Move ARM-specific InstCombine transforms into `Transforms/Utils` (#169589)"

This reverts commit 1c32b6f51ccaaf9c65be11d7dca9e5a476cddb5a due to failures on
BUILD_SHARED_LIBS builds.


  Commit: 3098bfe7d98bca214c78303ac7869083c4da517d
      https://github.com/llvm/llvm-project/commit/3098bfe7d98bca214c78303ac7869083c4da517d
  Author: daniilavdeev <daniilavdeev237 at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M llvm/docs/ReleaseNotes.md

  Log Message:
  -----------
  [llvm][Docs] Add release notes about dwarf fission with relaxations (#169871)


  Commit: 9ba5fa2e7199a558154dd4f8955dbee52c63da17
      https://github.com/llvm/llvm-project/commit/9ba5fa2e7199a558154dd4f8955dbee52c63da17
  Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    A llvm/test/Analysis/Delinearization/validation_large_size.ll

  Log Message:
  -----------
  [Delinearization] Add test for inferred array size exceeds integer range (NFC) (#169048)

Add test cases where the delinearized arrays may not satisfy the
following "common" property:

`&A[I_1][I_2]...[I_n] == &A[J_1][J_2]...[J_n]` iff
`(I_1, I_2, ..., I_n) == (J_1, J_2, ..., J_n)`

The root cause of this issue is that the inferred array size is too
large and the offset calculation overflows.
Such results should be discarded during validation. This will be fixed
by #169902 .


  Commit: 7bced745766930e795e4e588366d84fe456311b3
      https://github.com/llvm/llvm-project/commit/7bced745766930e795e4e588366d84fe456311b3
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/test/CodeGen/X86/combine-icmp.ll

  Log Message:
  -----------
  [X86] combine-icmp.ll - fix copy+paste typo in concat_icmp_v64i8_v16i8 test (#170281)

I changed the condcode for variety but failed to update the constant to prevent constant folding


  Commit: 153c7e47d6d160b1e158018b7d016aa3b227b9ed
      https://github.com/llvm/llvm-project/commit/153c7e47d6d160b1e158018b7d016aa3b227b9ed
  Author: Valery Mironov <valera.mironow at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M runtimes/cmake/Modules/WarningFlags.cmake

  Log Message:
  -----------
  [libc++] Use private CMake flags to enable the pragma system_header macro when building (#138826)

That property doesn't need to be propagated beyond the translation units
of the libc++ built library itself.


  Commit: 0e6d6127d43d6589408d5eed9b73c40238b6e741
      https://github.com/llvm/llvm-project/commit/0e6d6127d43d6589408d5eed9b73c40238b6e741
  Author: Graham Hunter <graham.hunter at arm.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/expand-select.ll
    A llvm/test/CodeGen/AArch64/neon-anyof-splat.ll

  Log Message:
  -----------
  [AArch64] Improve select dagcombine (#169925)

An AnyOf reduction (aka vector.reduce.or) with a fixed-width vector is
canonicalized to a bitcast of the mask vector to an integer of the same
overall size, which is then compared against zero.

If the scalar result of the bitcast is smaller than the element size of
vectors being selected, we often end up with suboptimal codegen. This
fixes the main cases, removing scalarized code.


  Commit: f5dd2dc7129ad070832db4c2f1b1d5ec6ad87f04
      https://github.com/llvm/llvm-project/commit/f5dd2dc7129ad070832db4c2f1b1d5ec6ad87f04
  Author: Anton Sidorenko <anton.sidorenko at mail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/cmake/modules/CrossCompile.cmake

  Log Message:
  -----------
  [cmake] Fix semicolon expansion when passing LLVM_TABLEGEN_FLAGS (#169518)

This patch uses common workaround for cmake semicolon expansion to
spaces


  Commit: ea3fdc5972db7f2d459e543307af05c357f2be26
      https://github.com/llvm/llvm-project/commit/ea3fdc5972db7f2d459e543307af05c357f2be26
  Author: Lewis Crawford <lcrawford at nvidia.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Analysis/ConstantFolding.cpp
    M llvm/lib/Analysis/InstructionSimplify.cpp
    M llvm/lib/CodeGen/GlobalISel/Utils.cpp
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll
    M llvm/test/CodeGen/ARM/fminmax-folds.ll
    M llvm/test/CodeGen/X86/fmaxnum.ll
    M llvm/test/CodeGen/X86/fminnum.ll
    M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
    M llvm/test/Transforms/InstSimplify/ConstProp/min-max.ll
    M llvm/test/Transforms/InstSimplify/fminmax-folds.ll

  Log Message:
  -----------
  Avoid maxnum(sNaN, x) optimizations / folds (#170181)

The behaviour of constant-folding `maxnum(sNaN, x)` and `minnum(sNaN,
x)` has become controversial, and there are ongoing discussions about
which behaviour we want to specify in the LLVM IR LangRef.

See:
  - https://github.com/llvm/llvm-project/issues/170082
  - https://github.com/llvm/llvm-project/pull/168838
  - https://github.com/llvm/llvm-project/pull/138451
  - https://github.com/llvm/llvm-project/pull/170067
-
https://discourse.llvm.org/t/rfc-a-consistent-set-of-semantics-for-the-floating-point-minimum-and-maximum-operations/89006

This patch removes optimizations and constant-folding support for
`maxnum(sNaN, x)` but keeps it folded/optimized for `qNaN`. This should
allow for some more flexibility so the implementation can conform to
either the old or new version of the semantics specified without any
changes.

As far as I am aware, optimizations involving constant `sNaN` should
generally be edge-cases that rarely occur, so here should hopefully be
very little real-world performance impact from disabling these
optimizations.


  Commit: 42898499310b7b105db90701b579dc1cb8c23e8b
      https://github.com/llvm/llvm-project/commit/42898499310b7b105db90701b579dc1cb8c23e8b
  Author: Akshiitaa06 <akshitasaxena206 at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M bolt/docs/BAT.md

  Log Message:
  -----------
  Improve formatting in BAT.md (#170254)

Make "Header" a subheading to improve readability in the Functions table
section.


  Commit: 7e2411cd2b39625443bcf59be20e6636ba31ae8d
      https://github.com/llvm/llvm-project/commit/7e2411cd2b39625443bcf59be20e6636ba31ae8d
  Author: Miko <110693261+mikomikotaishi at users.noreply.github.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/docs/StandardCPlusPlusModules.rst

  Log Message:
  -----------
  [clang][docs] Add link to C++ modules Wikipedia page to docs (#169200)

This PR adds a link to the "[Modules
(C++)](https://en.wikipedia.org/wiki/Modules_(C++))" page on Wikipedia
and similar on cpp reference, as per recommendation by another
contributor.


  Commit: ac23264c0327a055bd439fd12264461f5b7d16b9
      https://github.com/llvm/llvm-project/commit/ac23264c0327a055bd439fd12264461f5b7d16b9
  Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M lldb/test/Shell/helper/toolchain.py

  Log Message:
  -----------
  Revert "[LLDB] Update Shell lit config to handle c8031c3dd743" (#170288)

Reverts llvm/llvm-project#170225

See failures in
https://ci.swift.org/view/all/job/llvm.org/job/as-lldb-cmake/36912/

```
[2025-12-02T01:20:37.083Z] # .---command stderr------------
[2025-12-02T01:20:37.083Z] # | clang: warning: no such sysroot directory: 'b/Library/Developer/CommandLineTools/SDKs/MacOSX.sdk' [-Wmissing-sysroot]
[2025-12-02T01:20:37.083Z] # | clang: warning: argument unused during compilation: '-fmodules-cache-path=/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/lldb-test-build.noindex/module-cache-clang/lldb-shell' [-Wunused-command-line-argument]
[2025-12-02T01:20:37.083Z] # | /Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/tools/lldb/test/Shell/Settings/Output/TestFrameFormatFunctionPrefix.test.tmp/main.m:2:13: warning: non-void function does not return a value [-Wreturn-type]
[2025-12-02T01:20:37.083Z] # |     2 | int func() {}
[2025-12-02T01:20:37.083Z] # |       |             ^
[2025-12-02T01:20:37.083Z] # | /Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/tools/lldb/test/Shell/Settings/Output/TestFrameFormatFunctionPrefix.test.tmp/main.m:3:21: warning: non-void function does not return a value [-Wreturn-type]
[2025-12-02T01:20:37.083Z] # |     3 | int bar() { func(); }
[2025-12-02T01:20:37.083Z] # |       |                     ^
[2025-12-02T01:20:37.083Z] # | 2 warnings generated.
[2025-12-02T01:20:37.083Z] # | ld: library 'System' not found
[2025-12-02T01:20:37.083Z] # | clang: error: linker command failed with exit code 1 (use -v to see invocation)
[2025-12-02T01:20:37.083Z] # `-----------------------------
[2025-12-02T01:20:37.083Z] # error: command failed with exit status: 1
```


  Commit: c26fa8bfb9f1293a9ab3b7400a193676738aa486
      https://github.com/llvm/llvm-project/commit/c26fa8bfb9f1293a9ab3b7400a193676738aa486
  Author: Aaron Ballman <aaron at aaronballman.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/docs/StandardCPlusPlusModules.rst

  Log Message:
  -----------
  Fix docs build

This amends 7e2411cd2b39625443bcf59be20e6636ba31ae8d


  Commit: e74b425ddcac22ccc4d0bd5d65f95ffc2682b62f
      https://github.com/llvm/llvm-project/commit/e74b425ddcac22ccc4d0bd5d65f95ffc2682b62f
  Author: Nathan Gauër <brioche at google.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/include/clang/Sema/SemaHLSL.h
    M clang/lib/CodeGen/CGHLSLRuntime.cpp
    M clang/lib/Sema/SemaHLSL.cpp
    A clang/test/CodeGenHLSL/semantics/SV_Target.ps.hlsl
    M clang/test/SemaHLSL/Semantics/position.ps.hlsl
    A clang/test/SemaHLSL/Semantics/target.ps.input.hlsl
    A clang/test/SemaHLSL/Semantics/target.vs.input.hlsl
    A clang/test/SemaHLSL/Semantics/target.vs.output.hlsl
    A llvm/test/CodeGen/SPIRV/semantics/target.ps.ll

  Log Message:
  -----------
  [HLSL][SPIR-V] Add support for SV_Target semantic (#168743)

This PR adds the support for the SV_Target semantic and improved the
diagnostics when the stage is correct, but the direction is disallowed.

This PR will require #168735 to be merged first.


  Commit: b341885126ec0c63e45dfae96df78bb4902c6f35
      https://github.com/llvm/llvm-project/commit/b341885126ec0c63e45dfae96df78bb4902c6f35
  Author: Igor Wodiany <igor.wodiany at imgtec.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
    M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
    M mlir/test/Target/SPIRV/decorations.mlir

  Log Message:
  -----------
  [mlir][spirv] (De)serialize Coherent decoration (#170280)


  Commit: e88a83acde69b2fc395474c905b9a17c22f61c05
      https://github.com/llvm/llvm-project/commit/e88a83acde69b2fc395474c905b9a17c22f61c05
  Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/IPO/GlobalOpt.cpp
    M llvm/test/Transforms/GlobalOpt/resolve-fmv-ifunc.ll

  Log Message:
  -----------
  [GlobalOpt][FMV] Perform expensive checks when NumVersions < Threshold (#168054)

Extends the static resolution algorith to handle cases where we can
infer additional information on why a prior caller version of higher
priority was skipped, based on the features of the current caller
version.

For example let's say the current caller is aes+sve2 and a previous
caller was mops+sve2. Knowing that sve2 is available we could deduce
that mops is unavailable. This would allow us to skip callee versions
which depend on mops.

This comes at the expense of performing more checks. However we can
control the threshold (number of versions) which decides whether the
expensive checks will be performed or not.


  Commit: 63f48fd829ff8e1d400d9896ba6ab9730fd2773b
      https://github.com/llvm/llvm-project/commit/63f48fd829ff8e1d400d9896ba6ab9730fd2773b
  Author: Bertik23 <39457484+Bertik23 at users.noreply.github.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/include/llvm/Analysis/CFGPrinter.h
    M llvm/lib/Analysis/CFGPrinter.cpp

  Log Message:
  -----------
  [CFGPrinter] Add node id formater (#164623)

This PR is part of the LLVM IR LSP server project
([RFC](https://discourse.llvm.org/t/rfc-ir-visualization-with-vs-code-extension-using-an-lsp-server/87773))

Sometimes it is nice to be able to specify IDs of nodes in the printed
CFG. For better manipulation of the outputed CFG.
In our case we will use it for navigation between IR and CFG views.

This adds an argument to DOTFuncInfo - a function that takes a
BasicBlock and returns a node ID, to be printed in the result dot.


  Commit: cd5ed7ca87fbf287c4453c728cb92f77a4ecf78c
      https://github.com/llvm/llvm-project/commit/cd5ed7ca87fbf287c4453c728cb92f77a4ecf78c
  Author: Louis Dionne <ldionne.2 at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M .github/workflows/libcxx-build-and-test.yaml
    M .github/workflows/libcxx-check-generated-files.yml
    M libcxx/docs/AddingNewCIJobs.rst
    M libcxx/utils/ci/buildkite-pipeline.yml
    M libcxx/utils/ci/run-buildbot

  Log Message:
  -----------
  [libc++] Make CC and CXX environment variables mandatory in run-buildbot (#166875)

Previously, the bootstrapping-build job defined in run-buildbot required
the CC and CXX environment variables to be defined even though
run-buildbot documents these environment variables as being optional. It
also relied on ccache being available.

Refactor run-buildbot to make CC and CXX mandatory, and refactor various
places in the CI where we called run-buildbot without setting CC and
CXX. After this patch, all places that use run-buildbot are setting CC
and CXX before calling the script, which makes it easier to track what
compiler is used where. This also allows simplifying run-buildbot
itself.

Finally, this patch makes ccache optional for running the bootstrapping
build.


  Commit: c2a0350d8663b37ff96d3e7ca088ffb7d995ef29
      https://github.com/llvm/llvm-project/commit/c2a0350d8663b37ff96d3e7ca088ffb7d995ef29
  Author: Nikolas Klauser <nikolasklauser at berlin.de>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M libcxx/include/__functional/bind.h
    M libcxx/include/__mutex/once_flag.h
    M libcxx/include/__utility/integer_sequence.h
    M libcxx/include/__utility/pair.h
    M libcxx/include/future
    M libcxx/include/scoped_allocator
    M libcxx/include/tuple

  Log Message:
  -----------
  [libc++] Simplify a few places where we use __index_sequence (#167213)

This is done in two ways:
1) `index_sequence_for` is back-ported as `__index_sequence_for`
2) Extra functions just to expand the parameter pack are replaced with
lambdas


  Commit: 8a40d08b836ff5f363783f99efd901a44d8575de
      https://github.com/llvm/llvm-project/commit/8a40d08b836ff5f363783f99efd901a44d8575de
  Author: Nathan Gauër <brioche at google.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/include/clang/Basic/Attr.td
    M clang/include/clang/Basic/AttrDocs.td
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/include/clang/Sema/SemaHLSL.h
    M clang/lib/CodeGen/CGHLSLRuntime.cpp
    M clang/lib/CodeGen/CGHLSLRuntime.h
    M clang/lib/Sema/SemaDeclAttr.cpp
    M clang/lib/Sema/SemaHLSL.cpp
    A clang/test/CodeGenHLSL/semantics/semantic.explicit-location-output-struct.hlsl
    A clang/test/CodeGenHLSL/semantics/semantic.explicit-location.hlsl
    A clang/test/CodeGenHLSL/semantics/semantic.explicit-mix-builtin.hlsl
    A clang/test/CodeGenHLSL/semantics/semantic.explicit-mix-builtin.vs.hlsl
    A clang/test/CodeGenHLSL/semantics/semantic.explicit-mix.lib.hlsl
    M clang/test/Misc/pragma-attribute-supported-attributes-list.test
    A clang/test/SemaHLSL/Semantics/semantic.explicit-mix-builtin-vs.hlsl
    A clang/test/SemaHLSL/Semantics/semantic.explicit-mix-location-2.hlsl
    A clang/test/SemaHLSL/Semantics/semantic.explicit-mix-location.hlsl

  Log Message:
  -----------
  [HLSL][SPIR-V] Implement vk::location for inputs (#169479)

This commit adds the support for vk::location attribute which can be
applied to input and output variables.

As in/inout parameters are not supported yet, vk::location on such
parameters is not tested.

As implemented in DXC, vk::location has the following rules:
- input and outputs are handled independently.
- input/output lowered to a SPIR-V builtins are not using the assigned
vk::location and thus ignored.
- input/output lowered to a Location decoration must either all have
explicit locations, or none. Mixing is not allowed (except with
builtins).


  Commit: 5d876093b72182ede3d8beb551397b7fe90faa84
      https://github.com/llvm/llvm-project/commit/5d876093b72182ede3d8beb551397b7fe90faa84
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Analysis/ScalarEvolution.cpp
    M llvm/test/Analysis/ScalarEvolution/addrec-may-wrap-udiv-canonicalize.ll
    M llvm/test/Transforms/LoopVectorize/X86/uniformshift.ll

  Log Message:
  -----------
  [SCEV] Allow udiv canonicalization of potentially-wrapping AddRecs (#169576)

Extend the {X,+,N}/C => {(X - X%N),+,N}/C canonicalization to handle
AddRecs that may wrap, when X < N <= C and both N,C are powers of 2. The
alignment and power-of-2 properties ensure division results remain
equivalent for all offsets [(X - X%N), X).

Alive2 Proof: https://alive2.llvm.org/ce/z/iu2tav

Fixes https://github.com/llvm/llvm-project/issues/168709

PR: https://github.com/llvm/llvm-project/pull/169576


  Commit: 7e29448b4e517631b228b11e855b8ecd1d357dff
      https://github.com/llvm/llvm-project/commit/7e29448b4e517631b228b11e855b8ecd1d357dff
  Author: Hendrik Hübner <117831077+HendrikHuebner at users.noreply.github.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/include/clang/CIR/Dialect/IR/CIROps.td
    M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
    M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
    M clang/test/CIR/CodeGen/var_arg.c

  Log Message:
  -----------
  [CIR] Upstream var arg copy builtin (#169415)

This PR upstreams `__builtin_va_copy`, and extends the existing tests.


  Commit: d6f92050c0c2f60e78f3c8bcf557c5e69b025d7a
      https://github.com/llvm/llvm-project/commit/d6f92050c0c2f60e78f3c8bcf557c5e69b025d7a
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M compiler-rt/test/xray/TestCases/Posix/always-never-instrument.cpp

  Log Message:
  -----------
  [XRay] Mark test unsupported on armhf

Tbis addresses a buildbot failure now that these tests actually run more
broadly.

error: ALWAYSINSTR: expected string not found in input
// ALWAYSINSTR: {{.*function-name:.*main.*}}
                ^
<stdin>:1:1: note: scanning from here


  Commit: 84e46aa62d66fab59c0b3beee7b4b154d62eeb0f
      https://github.com/llvm/llvm-project/commit/84e46aa62d66fab59c0b3beee7b4b154d62eeb0f
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/avx512-skx-insert-subvec.ll
    M llvm/test/CodeGen/X86/combine-icmp.ll
    M llvm/test/CodeGen/X86/prefer-avx256-mask-extend.ll
    M llvm/test/CodeGen/X86/prefer-avx256-mask-shuffle.ll

  Log Message:
  -----------
  [X86] combineConcatVectorOps - add handling to concat setcc instructions together (#170295)

So far this only handles AVX512 predicate masks, which is by far the
easiest to support - AVX1/AVX2 support can mostly be dealt with via CMPP
+ CMPEQ/GT nodes (but these still fail for some icmp expansions where
nodes have multiple uses).


  Commit: 5a32fd3ea501ab78f5a5fc820f61fe81a98edc40
      https://github.com/llvm/llvm-project/commit/5a32fd3ea501ab78f5a5fc820f61fe81a98edc40
  Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp

  Log Message:
  -----------
  [lldb][NFCI] Rewrite UnwindAssemblyInstEmulation in terms of a CFG visit (#169630)

Currently, UnwindAssemblyInstEmulation visits instructions in the order
in which they appear in a function. This commit makes an NFCI change to
UnwindAssemblyInstEmulation so that it follows the function's CFG:

1. The first instruction is enqueued.
2. While the queue is not empty:
2.1 Visit the instruction in the *back* queue to compute the new unwind
    state.
2.2 Push(+) the next instruction to the *back* of the queue.
2.3 If the instruction is a forward branch with a known branch target,
    push(+) the destination instruction to the *front* of the queue.

(+) Only push if this instruction hasn't been enqueued before.
(+) When pushing an instruction, the current unwind state is attached to
it.

Note that:
* the "next instruction" is pushed to the *back* of the queue,
* a branch target is pushed to the *front* of the queue, and
* we always dequeue from the *back* of the queue.

This means that consecutive instructions are visited one after the
other; this is important to support "conditional blocks" [1] of
instructions (see the line with "if last_condition != new_condition").
This is arguably a very Thumb specific thing, so maybe it shouldn't be
in the generic algorithm; that said, it is already in the code, so we
have to support it.

The main reason this patch is NFCI and not NFC is that, now, the
destination of a forward branch is visited in a slightly different
moment than before. This should not cause any changes in output, as if a
branch destination is reachable through two different paths, any well
behaved compiler will generate the same unwind state in both paths.

The motivation for this patch is to change step 2.2 so that it _only_
pushes the next instruction if the current instruction is not an
unconditional branch / return, and to change step 2.3 so that backwards
branches are also allowed, fixing the bug described by [2].

[1]:
https://developer.arm.com/documentation/dui0473/m/arm-and-thumb-instructions/it
[2]: https://github.com/llvm/llvm-project/pull/168398

Part of a sequence of PRs:
[lldb][NFCI] Rewrite UnwindAssemblyInstEmulation in terms of a CFG visit
#169630
[lldb][NFC] Rename forward_branch_offset to branch_offset in
UnwindAssemblyInstEmulation #169631
[lldb] Add DisassemblerLLVMC::IsBarrier API #169632
[lldb] Handle backwards branches in UnwindAssemblyInstEmulation #169633

commit-id:dce6b515


  Commit: 854df547a023715bb6229d410d0699be2d3c3d04
      https://github.com/llvm/llvm-project/commit/854df547a023715bb6229d410d0699be2d3c3d04
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/include/llvm/Support/DebugCounter.h
    M llvm/lib/Support/DebugCounter.cpp

  Log Message:
  -----------
  [Support] Optimize DebugCounter hot path (NFC) (#170260)

When enabling ShouldPrintCounter, also set Enabled, so that we only have
to check one of them. This cuts down the cost of (disabled) debug
counters by half.


  Commit: ca7edf2d141379827a9e107656a11bfe3735d11e
      https://github.com/llvm/llvm-project/commit/ca7edf2d141379827a9e107656a11bfe3735d11e
  Author: Chinmay Deshpande <chdeshpa at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
    M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
    M llvm/test/CodeGen/AMDGPU/strict_fadd.f32.ll
    M llvm/test/CodeGen/AMDGPU/strict_fadd.f64.ll
    M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
    M llvm/test/CodeGen/AMDGPU/strict_fmul.f32.ll
    M llvm/test/CodeGen/AMDGPU/strict_fmul.f64.ll

  Log Message:
  -----------
  [AMDGPU][GISel] Add RegBankLegalize support for G_STRICT_{FADD|FMUL} (#169406)


  Commit: 3c6864ab8879f7274e6c24c3b7c8e8139cd135dd
      https://github.com/llvm/llvm-project/commit/3c6864ab8879f7274e6c24c3b7c8e8139cd135dd
  Author: Marco Elver <elver at google.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/lib/CodeGen/BackendUtil.cpp
    M clang/lib/CodeGen/CodeGenModule.cpp
    M clang/test/CodeGen/alloc-token-lower.c
    A clang/test/CodeGen/alloc-token-module-flags.c
    A clang/test/CodeGen/distributed-thin-lto/memprof-pgho.cpp
    M clang/test/CodeGen/lto-newpm-pipeline.c

  Log Message:
  -----------
  [Clang][CodeGen] Remove explicit insertion of AllocToken pass (#169360)

Remove explicit insertion of the AllocTokenPass, which is now handled by
the PassBuilder. Emit AllocToken configuration as LLVM module flags to
persist into the backend.

Specifically, this also means it will now be handled by LTO backend
phases; this avoids interference with other optimizations (e.g. PGHO)
and enable late heap-allocation optimizations with LTO enabled.


  Commit: 87f4e809425da31b19a5a86833c3f1af4981cc99
      https://github.com/llvm/llvm-project/commit/87f4e809425da31b19a5a86833c3f1af4981cc99
  Author: Nick Sarnie <nick.sarnie at intel.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
    A llvm/test/CodeGen/SPIRV/GlobalISel/fn-ptr-addrspacecast.ll
    A llvm/test/CodeGen/SPIRV/GlobalISel/fn-ptr-load.ll
    A llvm/test/CodeGen/SPIRV/GlobalISel/fn-ptr-memcpy.ll
    A llvm/test/CodeGen/SPIRV/GlobalISel/fn-ptr-memset.ll
    A llvm/test/CodeGen/SPIRV/GlobalISel/fn-ptr-store.ll
    A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp_cmp.ll

  Log Message:
  -----------
  [SPIRV] Add support for CodeSectionINTEL storage class in legalizer (#167961)

The
[SPV_INTEL_function_pointers](https://github.com/intel/llvm/blob/sycl/sycl/doc/design/spirv-extensions/SPV_INTEL_function_pointers.asciidoc)
extension defines a new storage class `CodeSectionINTEL` that is
represented in LLVM IR as `addrspace(9)`.

Per the spec, it is basically not allowed to be casted to or interact
with pointers with other storage classes.

Add `addrspace(9)` as a known pointer type to the legalizer, and then
add some error cases for IR that is impossible to legalize.

Right now, if you try to run the backend on input with SPIR-V, basically
everything errors saying that it is unable to legalize because `ptr
addrspace(9)` is not considered a pointer type.

Ideally the FE should not generate the illegal IR or error out earlier,
but we should catch it before generating invalid SPIR-V.

---------

Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>


  Commit: 00f3410719d090fe8aa77cc5ecc1a280c01fbf0d
      https://github.com/llvm/llvm-project/commit/00f3410719d090fe8aa77cc5ecc1a280c01fbf0d
  Author: Arjun P <arjunpitchanathan at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M mlir/include/mlir/Analysis/Presburger/IntegerRelation.h

  Log Message:
  -----------
  [MLIR][Presburger] add atConstraint to index into combined constraint matrix


  Commit: e719e93d4157edfad17e9bf40670decc158470c4
      https://github.com/llvm/llvm-project/commit/e719e93d4157edfad17e9bf40670decc158470c4
  Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/docs/HIPSupport.rst
    M clang/docs/ReleaseNotes.rst
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/lib/Sema/SemaCUDA.cpp
    M clang/lib/Sema/SemaDeclAttr.cpp
    M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
    A clang/test/SemaCUDA/deduction-guide-attrs.cu
    A clang/test/SemaCUDA/deduction-guide-overload.cu
    A clang/test/SemaCUDA/deduction-guide.cu

  Log Message:
  -----------
  [CUDA][HIP] Fix CTAD for host/device constructors (#168711)

Clang currently does not allow using CTAD in CUDA/HIP device functions
since deduction guides are treated as host-only. This patch fixes that
by treating deduction guides as host+device. The rationale is that
deduction guides do not actually generate code in IR, and there is an
existing check for device/host correctness for constructors.

The patch also suppresses duplicate implicit deduction guides from
host/device constructors with identical signatures and constraints
to prevent ambiguity.

For CUDA/HIP, deduction guides are now always implicitly enabled for
both host and device, which matches nvcc's effective behavior. Unlike
nvcc, which silently ignores explicit CUDA/HIP target attributes on
deduction guides, Clang diagnoses such attributes as errors to keep
the syntax clean and avoid confusion.

This ensures CTAD works correctly in CUDA/HIP for constructors with
different target attributes and provides clearer diagnostics when users
attempt to annotate deduction guides with CUDA/HIP target attributes.

Example:

```
  #include <tuple>

  __host__ __device__ void func()
  {
    std::tuple<int, int> t = std::tuple(1, 1);
  }
```

This compiles with nvcc but fails with clang for CUDA/HIP without this
fix.

Reference: https://godbolt.org/z/WhT1GrhWE

Fixes: https://github.com/ROCm/ROCm/issues/5646

Fixes: https://github.com/llvm/llvm-project/issues/146646


  Commit: bfc45712f836b3a48eb5c4e1779b6368ae7ac80d
      https://github.com/llvm/llvm-project/commit/bfc45712f836b3a48eb5c4e1779b6368ae7ac80d
  Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M lldb/test/Shell/helper/toolchain.py

  Log Message:
  -----------
  Revert "Revert "[LLDB] Update Shell lit config to handle c8031c3dd743"" (#170312)

Reverts llvm/llvm-project#170288

Turns out this was not the cause of the failure


  Commit: b4149a013d8ea93c3a34fe88a1eb0a80a8c8b6b9
      https://github.com/llvm/llvm-project/commit/b4149a013d8ea93c3a34fe88a1eb0a80a8c8b6b9
  Author: Yue Huang <30948580+AdUhTkJm at users.noreply.github.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M mlir/lib/Analysis/Presburger/Barvinok.cpp
    M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
    M mlir/unittests/Analysis/Presburger/BarvinokTest.cpp
    M mlir/unittests/Analysis/Presburger/IntegerRelationTest.cpp

  Log Message:
  -----------
  [MLIR][Presburger] Fix Gaussian elimination (#164437)

In the Presburger library, there are two minor bugs of Gaussian
elimination.

In Barvinok.cpp, the `if (equations(i, i) != 0) continue;` is intended
to skip only the row-swapping, but it in fact skipped the whole loop
body altogether, including the elimination parts.

In IntegerRelation.cpp, the Gaussian elimination forgets to advance
`firstVar` (the number of finished columns) when it finishes a column.
Moreover, when it checks the pivot row of each column, it didn't ignore
the rows considered.

As an example, suppose the constraints are
```
1 0 0 1 2 = 0
0 1 0 0 3 = 0
0 0 0 1 4 = 0
...
```
For the 4th column, it will think the pivot is the first row `1 0 0 1 2
= 0`, rather than the correct 3rd row `0 0 0 1 4 = 0`.

(This bug is left undiscovered, because if we don't advance `firstVar`
then this Gaussian elimination process will simply do nothing. Moreover,
it is called only in `simplify()`, and the existing test cases doesn't
care whether a set has been simplified.)


  Commit: 734a912d0f025559fcf76bde9aaaeb0383c1625a
      https://github.com/llvm/llvm-project/commit/734a912d0f025559fcf76bde9aaaeb0383c1625a
  Author: Nathan Gauër <brioche at google.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/test/SemaHLSL/Semantics/semantic.explicit-mix-location-2.hlsl
    M clang/test/SemaHLSL/Semantics/semantic.explicit-mix-location.hlsl

  Log Message:
  -----------
  [Clang][HLSL] Fix invalid flag passed by the driver (#170300)

The test were using the DXC driver in Clang, which adds the
`--spirv-ext=` option. Turns out some buildbots are built without this
flag support, meaning any test using this driver would fail with an
'unknown command line argument' error.


  Commit: 23e6dbf864f4ff730dc2949dcc74d75633641624
      https://github.com/llvm/llvm-project/commit/23e6dbf864f4ff730dc2949dcc74d75633641624
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-split-scalar-load-metadata.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-widen-scalar-loads.mir

  Log Message:
  -----------
  AMDGPU: Use ConstantPool as source value for DAG lowered kernarg loads (#168917)

This isn't quite a constant pool, but probably close enough for this
purpose. We just need some known invariant value address. The aliasing
queries against the real kernarg base pointer will falsely report
no aliasing, but for invariant memory it probably doesn't matter.


  Commit: 47d66bf34bc96fd7d667e8c3efd44bdf8d7a056a
      https://github.com/llvm/llvm-project/commit/47d66bf34bc96fd7d667e8c3efd44bdf8d7a056a
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    A llvm/test/CodeGen/X86/combine-fcmp.ll

  Log Message:
  -----------
  [X86] Add tests showing failure to concat fcmp instructions together (#170313)

Some of the AVX512 cases are already handled by #170295


  Commit: 25b6a15dfd228a4bf10c77240cecb26864e0e527
      https://github.com/llvm/llvm-project/commit/25b6a15dfd228a4bf10c77240cecb26864e0e527
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
    M llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
    M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
    M llvm/lib/CodeGen/GlobalISel/Legalizer.cpp
    M llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
    M llvm/lib/CodeGen/GlobalISel/Utils.cpp
    M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
    M llvm/unittests/CodeGen/GlobalISel/InstructionSelectTest.cpp

  Log Message:
  -----------
  GlobalISel: Stop using TPC to check if GlobalISelAbort is enabled (#169917)

New pass manager does not use TargetPassConfig.
GlobalISel requires TargetPassConfig to reportGISelFailure,
and it only actual use is to check if GlobalISelAbort is enabled.
TargetPassConfig uses TargetMachine to check if GlobalISelAbort is
enabled, but TargetMachine is also available from MachineFunction.


  Commit: cdc41478a0142529e57d2669a3025601f5d136c0
      https://github.com/llvm/llvm-project/commit/cdc41478a0142529e57d2669a3025601f5d136c0
  Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M lldb/test/Shell/helper/toolchain.py

  Log Message:
  -----------
  [lldb][shell tests] Properly fix fallout from c8031c3dd743


  Commit: 0d853aefecf6232121ac2d33664e90aa6759632b
      https://github.com/llvm/llvm-project/commit/0d853aefecf6232121ac2d33664e90aa6759632b
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll

  Log Message:
  -----------
  AMDGPU: Fix treating unknown mem operands as uniform (#170309)

The test changes are mostly GlobalISel specific regressions.
GlobalISel is still relying on isUniformMMO, but it doesn't really
have an excuse for doing so. These should be avoidable with new
regbankselect.

There is an additional regression for addrspacecast for cov4. We
probably ought to be using a separate PseudoSourceValue for the
access of the queue pointer.


  Commit: e07e60e5dc911f689ba02c0bcbad472b436eef87
      https://github.com/llvm/llvm-project/commit/e07e60e5dc911f689ba02c0bcbad472b436eef87
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M libclc/opencl/lib/generic/atomic/atomic_def.inc

  Log Message:
  -----------
  libclc: Fix build in atomic_def.inc (#170306)


  Commit: c21fd448a3daaa81fb59b076f9e7eae490fc28d5
      https://github.com/llvm/llvm-project/commit/c21fd448a3daaa81fb59b076f9e7eae490fc28d5
  Author: David Stone <davidfromonline at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/tools/clang-scan-deps/ClangScanDeps.cpp

  Log Message:
  -----------
  [clang][deps][NFC] Replace a vector with an array (#169555)

`ResourceDirectoryCache::findResourceDir` uses a `std::vector` when a
`std::array` would do.


  Commit: 6984f942bc5bd7a64095597d41d0b23d4734f070
      https://github.com/llvm/llvm-project/commit/6984f942bc5bd7a64095597d41d0b23d4734f070
  Author: Marco Elver <elver at google.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/test/CodeGen/distributed-thin-lto/memprof-pgho.cpp

  Log Message:
  -----------
  [MemProf] Require x86 for memprof-pgho.cpp test (#170321)

This requires an x86 build, otherwise the test will fail with:

```
Error running ThinLTO backend: No available targets are compatible with triple "x86_64-unknown-linux-gnu"
```


  Commit: c6910201cc70014d1360f6038b5eb61fdc3c8788
      https://github.com/llvm/llvm-project/commit/c6910201cc70014d1360f6038b5eb61fdc3c8788
  Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang-tools-extra/clang-tidy/ExpandModularHeadersPPCallbacks.h
    M clang-tools-extra/clang-tidy/bugprone/FloatLoopCounterCheck.cpp
    M clang-tools-extra/clang-tidy/cppcoreguidelines/ProBoundsAvoidUncheckedContainerAccessCheck.cpp

  Log Message:
  -----------
  [NFC] [clang-tidy] Fix potential SA issues. (#170289)

This patch addresses issues identified by the static analyzers, which
appear to be legitimate problems.

`FloatLoopCounterCheck.cpp`: "Dereferencing a pointer that might be
`nullptr` FS when calling `getInc`".
`ProBoundsAvoidUncheckedContainerAccessCheck.cpp`: "Dereferencing a
pointer that might be `nullptr Callee` when calling `getBeginLoc`".
`ExpandModularHeadersPPCallbacks.cpp`: Non-static class member
`CurrentToken.Flags` is not initialized in this constructor nor in any
functions that it calls. (line #101).


  Commit: 4ff3d1cd9d6e3a2bbe2869c5027c2531ff12e3ce
      https://github.com/llvm/llvm-project/commit/4ff3d1cd9d6e3a2bbe2869c5027c2531ff12e3ce
  Author: Mircea Trofin <mtrofin at google.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/utils/profcheck-xfail.txt

  Log Message:
  -----------
  [profcheck] update exclude list (#170316)


  Commit: 669683a036bf256e9cfba21bd2b70bafbf03be45
      https://github.com/llvm/llvm-project/commit/669683a036bf256e9cfba21bd2b70bafbf03be45
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/lib/Basic/Targets/AMDGPU.h
    M clang/test/Misc/amdgcn.languageOptsOpenCL.cl

  Log Message:
  -----------
  clang/AMDGPU: Add missing __opencl_c_read_write_images feature macro (#170307)

This is a partial fix for the rocm device-libs build. This
was most likely broken by 423bdb2bf257e19271d62e60b6339d84b8ce05aa


  Commit: 5681c71a803e8bb4f574f8199406085272e4a7c3
      https://github.com/llvm/llvm-project/commit/5681c71a803e8bb4f574f8199406085272e4a7c3
  Author: Michael Kruse <llvm-project at meinersbur.de>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M flang-rt/include/flang-rt/runtime/descriptor.h
    M flang-rt/lib/runtime/descriptor.cpp
    M flang-rt/lib/runtime/extensions.cpp
    M flang-rt/unittests/Runtime/Descriptor.cpp
    M flang/docs/Intrinsics.md
    M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
    M flang/include/flang/Optimizer/Builder/Runtime/Intrinsics.h
    M flang/include/flang/Runtime/extensions.h
    M flang/lib/Evaluate/intrinsics.cpp
    M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
    M flang/lib/Optimizer/Builder/Runtime/Intrinsics.cpp
    M flang/module/__fortran_builtins.f90
    R flang/module/flang_debug.f90
    R flang/test/Lower/Intrinsics/show_descriptor.f90
    M flang/tools/f18/CMakeLists.txt

  Log Message:
  -----------
  Revert "[flang] implement show_descriptor intrinsic, a non-standard extension (#169137)"

This reverts commit e7748e92cd5d71af2e1699328b7c575e9b9bf479.

It broke the Windows build

https://github.com/llvm/llvm-project/actions/runs/19842117405/job/56852610863
https://lab.llvm.org/buildbot/#/builders/166/builds/4535

After #170142 fixed another issue, this was also the remaining reason
for this buildbot to fail:

https://lab.llvm.org/buildbot/#/builders/207/builds/10423


  Commit: 2209d335206c6901d28efc8624a242e66b982022
      https://github.com/llvm/llvm-project/commit/2209d335206c6901d28efc8624a242e66b982022
  Author: Ahmed Nour <ahmednour.mohamed2012 at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
    M clang/test/CIR/CodeGenBuiltins/X86/avx512bw-builtins.c
    M clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c

  Log Message:
  -----------
  [CIR][X86] Add support for kunpck builtins (#168757)

Part of https://github.com/llvm/llvm-project/issues/167765


  Commit: 5c552c5cff656f8f3b292fcfb527a8f1c0e52798
      https://github.com/llvm/llvm-project/commit/5c552c5cff656f8f3b292fcfb527a8f1c0e52798
  Author: Ebuka Ezike <yerimyah1 at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M lldb/include/lldb/ValueObject/ValueObjectSynthetic.h
    M lldb/source/ValueObject/ValueObjectSynthetic.cpp
    A lldb/test/API/python_api/exprpath_register/Makefile
    A lldb/test/API/python_api/exprpath_register/TestExprPathRegisters.py
    A lldb/test/API/python_api/exprpath_register/main.c

  Log Message:
  -----------
  [lldb] Fix GetExpressionPath for vector registers (#169210)

Vector registers have synthetic values for display purposes. This causes
SBValue::GetExpressionPath to dispatch
to ValueObjectSynthetic instead of ValueObjectRegister, producing
incorrect results.

Fixes #147144


  Commit: 90634160d0687a58a5dec8d199013eb31203de5e
      https://github.com/llvm/llvm-project/commit/90634160d0687a58a5dec8d199013eb31203de5e
  Author: Jason-VanBeusekom <jason.van-beusekom at hpe.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/test/OpenMP/amdgcn_weak_alias.c

  Log Message:
  -----------
  [OpenMP][clang] Remove metadata checks in amdgcn_weak_alias.c (#170326)

4394aa685c4b01ad3782a137fcfebeadc4941df1 introduced the test
amdgcn_weak_alias, which is failing on the reverse iteration build, due
to the the order of the aliasees being different. This failure is a test
issue, not a bug, so the metadata checks are removed.


  Commit: 2ad71745cd2b6a266b4bd08e6a82a14e393ee915
      https://github.com/llvm/llvm-project/commit/2ad71745cd2b6a266b4bd08e6a82a14e393ee915
  Author: John Brawn <john.brawn at arm.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
    M llvm/test/CodeGen/Thumb2/mve-blockplacement.ll
    M llvm/test/Transforms/LoopStrengthReduce/AArch64/prefer-all.ll

  Log Message:
  -----------
  [LSR] Insert the transformed IV increment in the user block (#169515)

Currently we try to hoist the transformed IV increment instruction to
the header block to help with generation of postincrement instructions,
but this only works if the user instruction is also in the header. We
should instead be trying to insert it in the same block as the user.


  Commit: c0371289ed6289549da73f79d29e827867d9ef2f
      https://github.com/llvm/llvm-project/commit/c0371289ed6289549da73f79d29e827867d9ef2f
  Author: David Green <david.green at arm.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/include/clang/Basic/arm_mve.td
    M clang/include/clang/Basic/arm_mve_defs.td
    M clang/test/CodeGen/arm-mve-intrinsics/vmaxnmaq.c
    M clang/test/CodeGen/arm-mve-intrinsics/vmaxnmq.c
    M clang/test/CodeGen/arm-mve-intrinsics/vminnmaq.c
    M clang/test/CodeGen/arm-mve-intrinsics/vminnmq.c
    M llvm/include/llvm/IR/IntrinsicsARM.td
    M llvm/lib/Target/ARM/ARMInstrMVE.td
    M llvm/test/CodeGen/Thumb2/mve-intrinsics/strict-intrinsics.ll

  Log Message:
  -----------
  [ARM] Introduce intrinsics for MVE minnm/maxnm under strict-fp. (#169795)

Similar to #169156 again, this is mostly for denormal handling as there
is no rounding step in a minnum/maxnum.


  Commit: 1e6476ddb70daab17533617aa8712cfd6c9f0c76
      https://github.com/llvm/llvm-project/commit/1e6476ddb70daab17533617aa8712cfd6c9f0c76
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/test/Transforms/LoopVectorize/hoist-predicated-loads-with-predicated-stores.ll

  Log Message:
  -----------
  [LV] Add predicated store sinking tests requiring further noalias checks

Add additional tests where extra no-alias checks are needed, as future
extensions of https://github.com/llvm/llvm-project/pull/168771.


  Commit: 5fa103a7fc804ab39c6253b384fdd38b4de388ce
      https://github.com/llvm/llvm-project/commit/5fa103a7fc804ab39c6253b384fdd38b4de388ce
  Author: J. Ryan Stinnett <jryans at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/include/clang/Options/Options.td

  Log Message:
  -----------
  [clang][Docs] Move debug info flags into groups (#169942)

This moves a few existing debug info flags that were floating in the
general pool of unorganised flags over to the existing groups for debug
info flags (so that they are presented together in documentation).

As a tiny further tweak, this also fixes the spelling of "DWARF" in the
flag docs for consistency with other flags.


  Commit: a8ef3c8eb9d4afff8c87b291f04fd826977b7414
      https://github.com/llvm/llvm-project/commit/a8ef3c8eb9d4afff8c87b291f04fd826977b7414
  Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M mlir/test/Dialect/Vector/vector-sink.mlir

  Log Message:
  -----------
  [mlir][vector][test] Fix comment in test (nfc) (#170336)

Fix a comment post #162167


  Commit: ea00593dd10336ea452f34cb38269e911136286c
      https://github.com/llvm/llvm-project/commit/ea00593dd10336ea452f34cb38269e911136286c
  Author: Artem Kroviakov <71938912+akroviakov at users.noreply.github.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
    M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir

  Log Message:
  -----------
  [MLIR][XeGPU][Quickfix] Disable block count in propagation (#170304)

One of the previous PRs
https://github.com/llvm/llvm-project/pull/169267/ has reintroduced block
count to layout propagation that was removed in
https://github.com/llvm/llvm-project/pull/168504/. This PR patches the
issue.


  Commit: e0f330293edb929152f44f1566d986b74ad5c1fc
      https://github.com/llvm/llvm-project/commit/e0f330293edb929152f44f1566d986b74ad5c1fc
  Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Analysis/ValueTracking.cpp
    M llvm/test/Transforms/Attributor/nofpclass.ll

  Log Message:
  -----------
  [ValueTracking] Support scalable vector splats in computeKnownFPClass (#170325)

Address comment
https://github.com/llvm/llvm-project/pull/169904#discussion_r2576299467


  Commit: ac66ae45cd22a7958ace645a035831000bfcbf51
      https://github.com/llvm/llvm-project/commit/ac66ae45cd22a7958ace645a035831000bfcbf51
  Author: Kyungtak Woo <kevinwkt1997 at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel

  Log Message:
  -----------
  [bazel] feat: update bazel lldb for llvm:support dep (#170344)

Adding llvm:Support dep since plugin started using llvm/ADT/...


  Commit: 5e5937c3d2e493a48837b2bdf179a53e8b80a66a
      https://github.com/llvm/llvm-project/commit/5e5937c3d2e493a48837b2bdf179a53e8b80a66a
  Author: Ahmed Nour <ahmednour.mohamed2012 at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    A lldb/test/API/python_api/sbframe_extensions/Makefile
    A lldb/test/API/python_api/sbframe_extensions/TestSBFrameExtensions.py
    A lldb/test/API/python_api/sbframe_extensions/main.c

  Log Message:
  -----------
  [LLDB] Add SBFrameExtensions Tests (#169236)

Fixes part of https://github.com/llvm/llvm-project/issues/168920


  Commit: ef49c9227155a9b9483356c7206a92eda693e90b
      https://github.com/llvm/llvm-project/commit/ef49c9227155a9b9483356c7206a92eda693e90b
  Author: Rahul Joshi <rjoshi at nvidia.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Analysis/ScalarEvolution.cpp
    M llvm/lib/Analysis/ScalarEvolutionDivision.cpp

  Log Message:
  -----------
  [NFC][LLVM] Namespace cleanup in ScalarEvolution (#166620)


  Commit: 2c38632639e588818add82ba9c8bac5ae774840e
      https://github.com/llvm/llvm-project/commit/2c38632639e588818add82ba9c8bac5ae774840e
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/LTO/LTO.cpp

  Log Message:
  -----------
  LTO: Remove unused TargetLibraryInfo include (#170340)


  Commit: 4587fe6be8e7c6269766fa7a26b120bd88e9bf40
      https://github.com/llvm/llvm-project/commit/4587fe6be8e7c6269766fa7a26b120bd88e9bf40
  Author: serge-sans-paille <sguelton at mozilla.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M lld/ELF/Options.td

  Log Message:
  -----------
  [lld] Fix typo in lld manpage, nfc (#170299)


  Commit: 23a22d0497eae08fa1ba7a0ecb2570eb07f5cfc8
      https://github.com/llvm/llvm-project/commit/23a22d0497eae08fa1ba7a0ecb2570eb07f5cfc8
  Author: Shubham Sandeep Rastogi <Shubham.Rastogi at sony.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Scalar/SROA.cpp

  Log Message:
  -----------
  [SROA] Unify the names of new instructions created in SROA. (#167917)

In Debug builds, the names of adjusted pointers have a pointer-specific
name prefix which doesn't exist in non-debug builds.

This causes differences in output when looking at the output of SROA
with a Debug or Release compiler.

For most of our ongoing testing, we use essentially Release+Asserts
build (basically release but without NDEBUG defined), however we ship a
Release compiler. Therefore we want to say with reasonable confidence
that building a large project with Release vs a Release+Asserts build
gives us the same output when the same compiler version is used.

This difference however, makes it difficult to prove that the output is
the same if the only difference is the name when using LTO builds and
looking at bitcode.

Hence this change is being proposed.


  Commit: e0db7f347c0afe2f1cdf3511f2e99cf5fc8541ed
      https://github.com/llvm/llvm-project/commit/e0db7f347c0afe2f1cdf3511f2e99cf5fc8541ed
  Author: Jasmine Tang <jjasmine at igalia.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Target/WebAssembly/WebAssemblyInstrInteger.td
    M llvm/test/CodeGen/WebAssembly/masked-shifts.ll

  Log Message:
  -----------
  [WebAssembly] Optimize away mask of 63 for sra and srl( zext (and i32 63))) (#170128)

Follow up to #71844 after shl implementation


  Commit: 1a3709cc7e88cbd354b6b102e87d02f379bce3b9
      https://github.com/llvm/llvm-project/commit/1a3709cc7e88cbd354b6b102e87d02f379bce3b9
  Author: Nick Sarnie <nick.sarnie at intel.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
    M llvm/test/CodeGen/SPIRV/zero-length-array.ll

  Log Message:
  -----------
  [SPIRV] Error for zero-length arrays if not a shader (#169732)

I had a case where the frontend was generating a zero elem array in
non-shader code so it was just crashing in a release build.
Add a real error and make it not crash.

---------

Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>


  Commit: 41a53c0a23ee3268c930fa67cc0a39f18c49efc4
      https://github.com/llvm/llvm-project/commit/41a53c0a23ee3268c930fa67cc0a39f18c49efc4
  Author: Med Ismail Bennani <ismail at bennani.ma>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M lldb/include/lldb/Core/FormatEntity.h
    A lldb/include/lldb/Target/BorrowedStackFrame.h
    M lldb/include/lldb/Target/StackFrame.h
    M lldb/source/Core/FormatEntity.cpp
    M lldb/source/Plugins/Process/scripted/ScriptedFrame.cpp
    M lldb/source/Plugins/Process/scripted/ScriptedFrame.h
    A lldb/source/Target/BorrowedStackFrame.cpp
    M lldb/source/Target/CMakeLists.txt
    M lldb/source/Target/StackFrame.cpp

  Log Message:
  -----------
  [lldb/Target] Add BorrowedStackFrame and make StackFrame methods virtual (#170191)

This change makes StackFrame methods virtual to enable subclass
overrides and introduces BorrowedStackFrame, a wrapper that presents an
existing StackFrame with a different frame index.

This enables creating synthetic frame views or renumbering frames
without copying the underlying frame data, which is useful for frame
manipulation scenarios.

This also adds a new borrowed-info format entity to show what was the
original frame index of the borrowed frame.

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>


  Commit: 2183846a15a04791cf7d85ca5d61d4c89505d3ab
      https://github.com/llvm/llvm-project/commit/2183846a15a04791cf7d85ca5d61d4c89505d3ab
  Author: hjagasiaAMD <harsha.jagasia at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
    M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-scale-to-agpr.mir

  Log Message:
  -----------
  [AMDGPU] Fix AGPR_32 reg assign for mfma scale ops (#168964)

In MFMA rewrite pass, prevent AGPR_32 reg class assignment for scale
operands, not permitted by instruction format.

---------

Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>


  Commit: 5c3c0020af102f4d1887f277ecb726c3ccf00daf
      https://github.com/llvm/llvm-project/commit/5c3c0020af102f4d1887f277ecb726c3ccf00daf
  Author: Robert Imschweiler <robert.imschweiler at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetLowering.h
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    M llvm/lib/Target/ARM/ARMISelLowering.h
    M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
    M llvm/lib/Target/Hexagon/HexagonISelLowering.h
    M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
    M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/lib/Target/PowerPC/PPCISelLowering.h
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
    M llvm/lib/Target/SPIRV/SPIRVISelLowering.h
    M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86ISelLowering.h

  Log Message:
  -----------
  [NFC] Refactor TargetLowering::getTgtMemIntrinsic to take CallBase parameter (#170334)

cf.
https://github.com/llvm/llvm-project/pull/133907#discussion_r2578576548


  Commit: 697b1be09cefd0a2c166fdbdfd5b744224808d02
      https://github.com/llvm/llvm-project/commit/697b1be09cefd0a2c166fdbdfd5b744224808d02
  Author: Changpeng Fang <changpeng.fang at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPU.td

  Log Message:
  -----------
  [AMDGPU][NFC] Put gfx125x common features into 12_50_Common (#170338)


  Commit: 73979c1df9695f281d78ad8e18a7023bcbbceab9
      https://github.com/llvm/llvm-project/commit/73979c1df9695f281d78ad8e18a7023bcbbceab9
  Author: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
    M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
    M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
    R mlir/test/Conversion/AMDGPUToROCDL/cvt_scale_pk-gfx1250.mlir
    A mlir/test/Conversion/AMDGPUToROCDL/gfx1250.mlir
    M mlir/test/Dialect/AMDGPU/invalid.mlir
    M mlir/test/Dialect/AMDGPU/ops.mlir

  Log Message:
  -----------
  [mlir][amdgpu] Lower amdgpu.make_dma_base (#169817)

* Adds lowering for `amdgpu.make_dma_base`


  Commit: 6e262aa8ba3f06a23e1df6857aa65042ea4f5ef5
      https://github.com/llvm/llvm-project/commit/6e262aa8ba3f06a23e1df6857aa65042ea4f5ef5
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/utils/gn/secondary/lldb/source/Target/BUILD.gn

  Log Message:
  -----------
  [gn build] Port 41a53c0a23ee


  Commit: 879dddf2b4ede2e6474964f9e5b63545d271c733
      https://github.com/llvm/llvm-project/commit/879dddf2b4ede2e6474964f9e5b63545d271c733
  Author: David Green <david.green at arm.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/test/CodeGen/AArch64/sve-int-mulh-pred.ll
    M llvm/test/CodeGen/AArch64/sve2-int-mulh.ll

  Log Message:
  -----------
  [AArch64] Add tests for umulh. NFC


  Commit: c50802cbee3f6f25059422ba0edcc455e395a207
      https://github.com/llvm/llvm-project/commit/c50802cbee3f6f25059422ba0edcc455e395a207
  Author: Med Ismail Bennani <ismail at bennani.ma>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M lldb/bindings/python/python-wrapper.swig
    M lldb/examples/python/templates/scripted_frame_provider.py
    M lldb/examples/python/templates/scripted_process.py
    M lldb/include/lldb/API/SBTarget.h
    M lldb/include/lldb/API/SBThread.h
    M lldb/include/lldb/API/SBThreadCollection.h
    M lldb/include/lldb/Interpreter/Interfaces/ScriptedFrameProviderInterface.h
    M lldb/include/lldb/Interpreter/ScriptInterpreter.h
    M lldb/include/lldb/Target/StackFrame.h
    M lldb/include/lldb/Target/StackFrameList.h
    M lldb/include/lldb/Target/SyntheticFrameProvider.h
    M lldb/include/lldb/Target/Target.h
    M lldb/include/lldb/Target/Thread.h
    M lldb/include/lldb/Target/ThreadSpec.h
    M lldb/include/lldb/Utility/ScriptedMetadata.h
    M lldb/include/lldb/lldb-private-interfaces.h
    M lldb/source/API/SBTarget.cpp
    M lldb/source/Commands/CommandObjectTarget.cpp
    M lldb/source/Interpreter/ScriptInterpreter.cpp
    M lldb/source/Plugins/CMakeLists.txt
    M lldb/source/Plugins/Process/scripted/ScriptedFrame.cpp
    M lldb/source/Plugins/Process/scripted/ScriptedFrame.h
    M lldb/source/Plugins/Process/scripted/ScriptedThread.cpp
    M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.cpp
    M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedFrameProviderPythonInterface.cpp
    M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedFrameProviderPythonInterface.h
    M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.cpp
    M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
    M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
    A lldb/source/Plugins/SyntheticFrameProvider/CMakeLists.txt
    A lldb/source/Plugins/SyntheticFrameProvider/ScriptedFrameProvider/CMakeLists.txt
    A lldb/source/Plugins/SyntheticFrameProvider/ScriptedFrameProvider/ScriptedFrameProvider.cpp
    A lldb/source/Plugins/SyntheticFrameProvider/ScriptedFrameProvider/ScriptedFrameProvider.h
    M lldb/source/Target/StackFrameList.cpp
    M lldb/source/Target/SyntheticFrameProvider.cpp
    M lldb/source/Target/Target.cpp
    M lldb/source/Target/Thread.cpp
    M lldb/source/Target/ThreadSpec.cpp
    A lldb/test/API/functionalities/scripted_frame_provider/Makefile
    A lldb/test/API/functionalities/scripted_frame_provider/TestScriptedFrameProvider.py
    A lldb/test/API/functionalities/scripted_frame_provider/circular_dependency/Makefile
    A lldb/test/API/functionalities/scripted_frame_provider/circular_dependency/TestFrameProviderCircularDependency.py
    A lldb/test/API/functionalities/scripted_frame_provider/circular_dependency/frame_provider.py
    A lldb/test/API/functionalities/scripted_frame_provider/circular_dependency/main.c
    A lldb/test/API/functionalities/scripted_frame_provider/main.cpp
    A lldb/test/API/functionalities/scripted_frame_provider/test_frame_providers.py
    M lldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp

  Log Message:
  -----------
  Reland "[lldb] Introduce ScriptedFrameProvider for real threads (#161870)" (#170236)

This patch re-lands #161870 with fixes to the previous test failures.

rdar://161834688

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>


  Commit: 3f2e3e67c11d3a86123aeb9ef5adfd9c9eb6f3ba
      https://github.com/llvm/llvm-project/commit/3f2e3e67c11d3a86123aeb9ef5adfd9c9eb6f3ba
  Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M mlir/lib/Dialect/AMDGPU/Transforms/MaskedloadToLoad.cpp

  Log Message:
  -----------
  [mlir][AMDGPU][NFC] Fix overlapping masked load refinements (#159805)

The two paterns for handlig vector.maskedload on AMD GPUs had an overlap
- both the "scalar mask becomes an if statement" pattern and the "masked
loads become a normal load + a select on buffers" patterns could handle
a load with a broadcast mask on a fat buffer resource.

This commet add checks to resolve the overlap.


  Commit: fae64adaa6a69eafb1c5dca0db82cbc48694e3f2
      https://github.com/llvm/llvm-project/commit/fae64adaa6a69eafb1c5dca0db82cbc48694e3f2
  Author: David Peixotto <peix at meta.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M lldb/source/Expression/DWARFExpression.cpp
    M lldb/unittests/Expression/DWARFExpressionTest.cpp

  Log Message:
  -----------
  [lldb] Handle deref of register and implicit locations (#169419)

This commit modifies the dwarf expression evaluator in how we handle the
deref operation for register and implicit locations on the stack. For a
typical memory location a deref operation will read the value from
memory. For register and implicit locations the deref operation will
read the value from the register or its implicit location. In lldb we
eagerly read register and implicit values and push them on the stack so
the deref operation for these becomes a "no-op" that leaves the value on
the stack and updates the tracked location kind.

The motivation for this change is to handle `DW_OP_deref*` operations on
location descriptions as described by the heterogenious debugging
[extensions](https://rocm.docs.amd.com/projects/llvm-project/en/latest/LLVM/llvm/html/AMDGPUDwarfExtensionsForHeterogeneousDebugging.html#a-2-5-4-4-4-register-location-description-operations).

Specifically, for register locations it states

> These operations obtain a register location. To fetch the contents of
> a register, it is necessary to use DW_OP_regval_type, use one of the
> DW_OP_breg* register-based addressing operations, or use DW_OP_deref*
on
> a register location description.

My understanding is that this is the intended behavior from dwarf5 as
well and is not a change in behavior.


  Commit: 6dd639ec9e7aeb957ec0b2bc0830ecdf6ce5efaa
      https://github.com/llvm/llvm-project/commit/6dd639ec9e7aeb957ec0b2bc0830ecdf6ce5efaa
  Author: Erich Keane <ekeane at nvidia.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/include/clang/AST/ASTConsumer.h
    M clang/include/clang/CIR/CIRGenerator.h
    M clang/include/clang/Sema/SemaOpenACC.h
    M clang/lib/CIR/CodeGen/CIRGenDeclOpenACC.cpp
    M clang/lib/CIR/CodeGen/CIRGenModule.cpp
    M clang/lib/CIR/CodeGen/CIRGenModule.h
    M clang/lib/CIR/CodeGen/CIRGenerator.cpp
    M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
    M clang/lib/Sema/Sema.cpp
    M clang/lib/Sema/SemaOpenACC.cpp
    R clang/test/CIR/CodeGenOpenACC/openacc-not-implemented-global.cpp
    A clang/test/CIR/CodeGenOpenACC/routine-anon-ns.cpp
    A clang/test/CIR/CodeGenOpenACC/routine-globals.cpp
    A clang/test/CIR/CodeGenOpenACC/routine-globals2.cpp
    A clang/test/CIR/CodeGenOpenACC/routine-locals.cpp
    A clang/test/CIR/CodeGenOpenACC/routine-members.cpp
    A clang/test/CIR/CodeGenOpenACC/routine-ns.cpp
    A clang/test/CIR/CodeGenOpenACC/routine-templ.cpp
    M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
    M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp

  Log Message:
  -----------
  [CIR][OpenACC] Implement 'routine' lowering + seq clause (#170207)

The 'routine' construct just adds a acc.routine element to the global
module, which contains all of the information about the directive. it
contains a reference to the function, which also contains a reference to
the acc.routine, which this generates.

This handles both the implicit-func version (where the routine is
    spelled without parens, and just applies to the next function) and
the explicit-func version (where the routine is spelled with the func
    name in parens).

The AST stores the directive in an OpenACCRoutineDeclAttr in the
implicit case, so we can emit that when we hit the function declaration.
The explicit case is held in an OpenACCRoutineAnnotAttr on the function,
however, when we emit the function we haven't necessarily seen the
construct yet, so we can't depend on that attribute. Instead, we save up
the list in Sema so that we can emit them all at the end.

This results in the tests getting really hard to read (because ordering
is a little awkward based on spelling, with no way to fix it), so we
instead split the tests up based on topic.

One last thing: Flang spends some time determining if the clause lists
of two routines on the same function are identical, and omits the
duplicates. However, it seems to do a poor job on this when the ordering
isn't the same, or references are slightly different. This patch doesn't
bother trying that, and instead emits all, trusting the ACC dialect to
remove duplicates/handle duplicates gracefully.

Note; This doesn't cause emission of functions that would otherwise not
be emitted, but DOES emit routine references based on which function
they are attached to.


  Commit: b50a590984a342a400cf23e6c5e210f9c062eb52
      https://github.com/llvm/llvm-project/commit/b50a590984a342a400cf23e6c5e210f9c062eb52
  Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.h
    M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
    A flang/test/Fir/OpenACC/pointer-like-interface-load.mlir
    A flang/test/Fir/OpenACC/pointer-like-interface-store.mlir
    M mlir/include/mlir/Dialect/OpenACC/OpenACCTypeInterfaces.td
    M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
    A mlir/test/Dialect/OpenACC/pointer-like-interface-load.mlir
    A mlir/test/Dialect/OpenACC/pointer-like-interface-store.mlir
    M mlir/test/lib/Dialect/OpenACC/TestPointerLikeTypeInterface.cpp

  Log Message:
  -----------
  [acc][flang] Add genLoad and genStore to PointerLikeType (#170348)

This patch extends the OpenACC PointerLikeType interface with two new
methods for generating load and store operations, enabling
dialect-agnostic memory access patterns.

New Interface Methods:
- genLoad(builder, loc, srcPtr, valueType): Generates a load operation
from a pointer-like value. Returns the loaded value.

- genStore(builder, loc, valueToStore, destPtr): Generates a store
operation to a pointer-like value.

Implementations provided for FIR pointer-like types, memref type (rank-0
only), and LLVM pointer types.

Extended TestPointerLikeTypeInterface.cpp with 'load' and 'store' test
modes.


  Commit: 49a978712893fcf9e5f40ac488315d029cf15d3d
      https://github.com/llvm/llvm-project/commit/49a978712893fcf9e5f40ac488315d029cf15d3d
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/test/Transforms/IndVarSimplify/AArch64/widen-loop-comp.ll
    M llvm/test/Transforms/IndVarSimplify/ARM/code-size.ll
    M llvm/test/Transforms/IndVarSimplify/X86/iv-widen.ll
    M llvm/test/Transforms/IndVarSimplify/X86/pr59615.ll
    M llvm/test/Transforms/IndVarSimplify/debugloc-rem-subst.ll
    M llvm/test/Transforms/IndVarSimplify/dont-recompute.ll
    M llvm/test/Transforms/IndVarSimplify/eliminate-exit.ll
    M llvm/test/Transforms/IndVarSimplify/eliminate-sat.ll
    M llvm/test/Transforms/IndVarSimplify/monotonic_checks.ll
    M llvm/test/Transforms/LoopUnroll/runtime-loop-multiexit-dom-verify.ll
    M llvm/test/Transforms/LoopUnrollAndJam/unroll-and-jam.ll

  Log Message:
  -----------
  [SCEV] Regenerate a subset of auto updated tests

Reducing spurious diff in an upcoming change.


  Commit: ca3de05eca474aaa7f53a62832a3c4cc80c5f43d
      https://github.com/llvm/llvm-project/commit/ca3de05eca474aaa7f53a62832a3c4cc80c5f43d
  Author: Andy Kaylor <akaylor at nvidia.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/lib/CIR/CodeGen/CIRGenClass.cpp

  Log Message:
  -----------
  [CIR][NFC] Fix a release build warning (#170359)

This moves a call inside an assert to avoid a warning about the result
variable being unused in release builds.


  Commit: 0bb987f4091083d1d8637d1880ecd918ab76793e
      https://github.com/llvm/llvm-project/commit/0bb987f4091083d1d8637d1880ecd918ab76793e
  Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/docs/HIPSupport.rst
    M clang/docs/ReleaseNotes.rst
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/lib/Sema/SemaCUDA.cpp
    M clang/lib/Sema/SemaDeclAttr.cpp
    M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
    R clang/test/SemaCUDA/deduction-guide-attrs.cu
    R clang/test/SemaCUDA/deduction-guide-overload.cu
    R clang/test/SemaCUDA/deduction-guide.cu

  Log Message:
  -----------
  Revert "[CUDA][HIP] Fix CTAD for host/device constructors (#168711)"

This reverts commit e719e93d4157edfad17e9bf40670decc158470c4.

revert this since it caused regression in our internal CI.

Deduction guide with host/device attrs have already been
used in

https://github.com/ROCm/rocm-libraries/blob/develop/projects/rocrand/library/src/rng/utils/cpp_utils.hpp#L249

```
template<class V>
__host__ __device__ vec_wrapper(V) -> vec_wrapper<V>;
```


  Commit: c910d821dc3fb33339504e44a1b9c30e25f7b0df
      https://github.com/llvm/llvm-project/commit/c910d821dc3fb33339504e44a1b9c30e25f7b0df
  Author: Erich Keane <ekeane at nvidia.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/lib/CIR/CodeGen/CIRGenDeclOpenACC.cpp
    A clang/test/CIR/CodeGenOpenACC/routine-clauses.cpp
    M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
    M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp

  Log Message:
  -----------
  [OpenACC][CIR] Add worker/vector clause lowering for Routine (#170358)

These two are both incredibly similar and simple, basically identical to
'seq'. This patch adds them both together.


  Commit: c77fe5845ee75071385755b6b9fc5c905dffad93
      https://github.com/llvm/llvm-project/commit/c77fe5845ee75071385755b6b9fc5c905dffad93
  Author: Kyungtak Woo <kevinwkt1997 at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel

  Log Message:
  -----------
  [bazel] update bazel build for PluginScriptedProcess (#170364)

Adding the following dependencies to PluginScriptedProcess:
-         "//lldb:CoreHeaders",
-         "//lldb:SymbolHeaders",
-         "//llvm:Support",

For c50802cbee3f6f25059422ba0edcc455e395a207


  Commit: 12ae72744c16610f9f63c8311578f4573d56667b
      https://github.com/llvm/llvm-project/commit/12ae72744c16610f9f63c8311578f4573d56667b
  Author: Andy Kaylor <akaylor at nvidia.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/include/clang/CIR/Dialect/IR/CIROps.td
    M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
    M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
    A clang/test/CIR/CodeGenBuiltins/builtin-constant-p.c

  Log Message:
  -----------
  [CIR] Upstream support for builtin_constant_p (#170354)

This upstreams the handler for the BI__builtin_constant_p function.


  Commit: d97746c56b820d6603c409a0f7d53d8e64f3ee93
      https://github.com/llvm/llvm-project/commit/d97746c56b820d6603c409a0f7d53d8e64f3ee93
  Author: asmok-g <102585811+asmok-g at users.noreply.github.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M libcxx/include/ext/hash_map
    M libcxx/include/ext/hash_set
    A libcxx/test/extensions/gnu/hash_map/copy.pass.cpp
    A libcxx/test/extensions/gnu/hash_set/copy.pass.cpp

  Log Message:
  -----------
  [libc++] Fix the rest of __gnu_cxx::hash_XXX copy construction (#160525)

Co-authored-by: Alexander Kornienko <alexfh at google.com>
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>


  Commit: 139ebfa63def4935e4cc935254bbc3be5a2bde9e
      https://github.com/llvm/llvm-project/commit/139ebfa63def4935e4cc935254bbc3be5a2bde9e
  Author: Jason Macnak <jmacnak at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel

  Log Message:
  -----------
  [Bazel] Fix `--warn-backrefs` errors in `Analysis` target (#170357)

Commit b262785 introduced a separate `AnalysisFpExc` target to try to
workaround the lack of a bazel equivalent of single source file
properties. However, this introduces backref errors when
`--warn-backrefs` is enabled.

This change alternatively just adds the `-ftrapping-math` copt to the
entire `Analysis` target.

Fix suggested by @rocallahan.


  Commit: f0e1254bce44b85bdeb14fb5318163dab72ccff6
      https://github.com/llvm/llvm-project/commit/f0e1254bce44b85bdeb14fb5318163dab72ccff6
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll

  Log Message:
  -----------
  [LV] Use forced cost once for whole interleave group in legacy costmodel (#168270)

The VPlan-based cost model assigns the forced cost once for a whole
VPInterleaveRecipe. Update the legacy cost model to match this behavior.
This fixes a cost-model divergence, and assigns the cost in a way that
matches the generated code more accurately.

PR: https://github.com/llvm/llvm-project/pull/168270


  Commit: 4006df9b3276a8c8f03194e09386465d3b611b88
      https://github.com/llvm/llvm-project/commit/4006df9b3276a8c8f03194e09386465d3b611b88
  Author: Erich Keane <ekeane at nvidia.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/lib/CIR/CodeGen/CIRGenDeclOpenACC.cpp
    M clang/test/CIR/CodeGenOpenACC/routine-clauses.cpp

  Log Message:
  -----------
  [OpenACC][CIR] Implement 'nohost' lowering. (#170369)

This clause is pretty small/trivial and is a simple 'set a bool' value
on the IR node, so its implementation is quite simple. We create the
Operation with this as 'false', so the 'nohost' marks it as true always.


  Commit: bd5fa633355638f4e9b176ca82007ff755bb51e9
      https://github.com/llvm/llvm-project/commit/bd5fa633355638f4e9b176ca82007ff755bb51e9
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp

  Log Message:
  -----------
  [VPlan] Remove duplicated computeCost call (NFC).

Remove a redundant duplicated computeCost call. NFC, just skipping an
unneeded call.


  Commit: d3256d935dbd0d9c7c1a525b347783d760e2cb98
      https://github.com/llvm/llvm-project/commit/d3256d935dbd0d9c7c1a525b347783d760e2cb98
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
    M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
    M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
    M flang/test/Lower/CUDA/cuda-device-proc.cuf

  Log Message:
  -----------
  [flang][cuda] Add alignment to shared memory operation (#170372)

Shared memory for TMA operation needs to be align to 16. Add ability to
set an alignment on the cuf.shared_memory operation.


  Commit: 41519b390fa1ae90221af33342d24fd4caa4734f
      https://github.com/llvm/llvm-project/commit/41519b390fa1ae90221af33342d24fd4caa4734f
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/test/Analysis/ScalarEvolution/addrec-may-wrap-udiv-canonicalize.ll

  Log Message:
  -----------
  [SCEV] Add UDiv canonicalization tests with nested AddRecs.

Add more tests for follow-up to
https://github.com/llvm/llvm-project/pull/169576.


  Commit: fff45ddcc05eeed711d19392fcc6786674fa56ca
      https://github.com/llvm/llvm-project/commit/fff45ddcc05eeed711d19392fcc6786674fa56ca
  Author: John Harrison <harjohn at google.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
    M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
    M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
    M lldb/unittests/DAP/ProtocolRequestsTest.cpp

  Log Message:
  -----------
  [lldb-dap] Follow the spec more closely on 'initialize' arguments. (#170350)

Updates `InitializeRequestArguments` to correctly follow the spec, see
https://microsoft.github.io/debug-adapter-protocol/specification#Requests_Initialize.

This should correct which fields are tracked as optional and simplifies
some of the types to make sure they're meaningful (e.g. an
`optional<bool>` isn't anymore helpful than a `bool` since undefined and
false are basically equivalent and it requires us to handle interpreting undefined as the default value in all the places we use the `optional<bool>`).


  Commit: 434127b0c1dbd95a9c776fdf266d51e21da3f770
      https://github.com/llvm/llvm-project/commit/434127b0c1dbd95a9c776fdf266d51e21da3f770
  Author: Helena Kotas <hekotas at microsoft.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/lib/CodeGen/CGExpr.cpp
    M clang/lib/CodeGen/CGHLSLRuntime.cpp
    M clang/lib/CodeGen/CGHLSLRuntime.h
    M clang/lib/CodeGen/CodeGenModule.cpp
    M clang/lib/Sema/SemaHLSL.cpp
    A clang/test/SemaHLSL/static_resources.hlsl

  Log Message:
  -----------
  [HLSL] Static resources (#166880)

This change fixes couple of issues with static resources:
- Enables assignment to static resource or resource array variables (fixes #166458)
- Initializes static resources and resource arrays with default constructor that sets the handle to poison


  Commit: 9885aed474acccccda929f9d784c48ae0041939a
      https://github.com/llvm/llvm-project/commit/9885aed474acccccda929f9d784c48ae0041939a
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
    M flang/test/Lower/CUDA/cuda-device-proc.cuf

  Log Message:
  -----------
  [flang][cuda] Add address cast for src and dst in TMA operations (#170375)

src and dst pointer needs to have an address cast


  Commit: ec6091f4de8a530af198f259db1622e99b2bd954
      https://github.com/llvm/llvm-project/commit/ec6091f4de8a530af198f259db1622e99b2bd954
  Author: Alex Duran <alejandro.duran at intel.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M offload/include/Shared/Debug.h
    M offload/libomptarget/OffloadRTL.cpp
    M offload/libomptarget/device.cpp

  Log Message:
  -----------
  [OFFLOAD][LIBOMPTARGET] Start to update debug messages in libomptarget (#170265)

* Add compatibility support for DP and REPORT macros 
* Define a set of predefined Debug Type for libomptarget
* Start to update libomptarget files (OffloadRTL.cpp, device.cpp)


  Commit: aeea056f604200e3acd78cf279d1ea41eb3f2bfd
      https://github.com/llvm/llvm-project/commit/aeea056f604200e3acd78cf279d1ea41eb3f2bfd
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
    M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
    M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
    M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
    M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h

  Log Message:
  -----------
  AMDGPU/GlobalISel: Report RegBankLegalize errors using reportGISelFailure (#169918)

Use standard GlobalISel error reporting with reportGISelFailure
and pass returning false instead of llvm_unreachable.
Also enables -global-isel-abort=0 or 2 for -global-isel -new-reg-bank-select.
Note: new-reg-bank-select with abort 0 or 2 runs LCSSA,
while "intended use" without abort or with abort 1 does not run LCSSA.


  Commit: 0f235c346c1592345c118565b3e3aaf5e9c72520
      https://github.com/llvm/llvm-project/commit/0f235c346c1592345c118565b3e3aaf5e9c72520
  Author: Björn Pettersson <bjorn.a.pettersson at ericsson.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    A llvm/test/Transforms/LowerConstantIntrinsics/builtin-object-size-idxsize.ll
    M llvm/test/Transforms/LowerConstantIntrinsics/builtin-object-size-phi.ll

  Log Message:
  -----------
  [LowerConstantIntrinsics] Improve tests related to llvm.objectsize. NFC (#132364)

Adding some new test cases (including FIXME:s) to highlight some bugs
related to lowering of llvm.objectsize.

One special case is when there are getelementptr instruction with index
types that are larger than the index type size for the pointer being
analysed. This will add a couple of tests to show what happens both when
using a smaller and larger index type, and when having out-of-bounds
indices (both too large and negative).


  Commit: dbb702fbcb5f43a642db876fac29d1845e320b7a
      https://github.com/llvm/llvm-project/commit/dbb702fbcb5f43a642db876fac29d1845e320b7a
  Author: Shilei Tian <i at tianshilei.me>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPU.td

  Log Message:
  -----------
  [NFC][AMDGPU] Remove trailing white spaces in `AMDGPU.td`


  Commit: e5f1d025aa9981b5ccad29e367c8a79d23c736f2
      https://github.com/llvm/llvm-project/commit/e5f1d025aa9981b5ccad29e367c8a79d23c736f2
  Author: Hendrik Hübner <117831077+HendrikHuebner at users.noreply.github.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
    M clang/test/CIR/CodeGen/cxx-special-member-attr.cpp
    M clang/test/CIR/CodeGen/lambda.cpp
    M clang/test/CIR/CodeGen/struct.cpp
    M clang/test/CIR/CodeGenOpenACC/combined-firstprivate-clause.cpp
    M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause-templates.cpp
    M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.cpp
    M clang/test/CIR/CodeGenOpenACC/firstprivate-clause-recipes.cpp

  Log Message:
  -----------
  [CIR] Lower calls to trivial copy constructor to cir::CopyOp (#168281)

This PR is a follow up to #167975 and replaces calls to trivial copy
constructors with `cir::CopyOp`.

---------

Co-authored-by: Andy Kaylor <akaylor at nvidia.com>
Co-authored-by: Henrich Lauko <henrich.lau at gmail.com>


  Commit: 9c78bc5de4fc2450d8fd5e5d52e8168ef653958e
      https://github.com/llvm/llvm-project/commit/9c78bc5de4fc2450d8fd5e5d52e8168ef653958e
  Author: Drew Kersnar <dkersnar at nvidia.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/include/llvm/Transforms/Utils/Local.h
    M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
    M llvm/lib/Transforms/Scalar/SROA.cpp
    M llvm/lib/Transforms/Utils/Local.cpp
    M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/amdgpu-irtranslator.ll
    M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
    M llvm/test/CodeGen/AMDGPU/build_vector.ll
    M llvm/test/CodeGen/AMDGPU/fabs.bf16.ll
    M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
    M llvm/test/CodeGen/AMDGPU/fabs.ll
    M llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
    M llvm/test/CodeGen/AMDGPU/fdiv.ll
    M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
    M llvm/test/CodeGen/AMDGPU/fneg-fabs.bf16.ll
    M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
    M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
    M llvm/test/CodeGen/AMDGPU/fneg.ll
    M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
    M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
    M llvm/test/CodeGen/AMDGPU/fshl.ll
    M llvm/test/CodeGen/AMDGPU/fshr.ll
    M llvm/test/CodeGen/AMDGPU/global_atomics.ll
    M llvm/test/CodeGen/AMDGPU/half.ll
    M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
    M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
    M llvm/test/CodeGen/AMDGPU/kernel-args.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
    M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
    M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
    M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
    M llvm/test/CodeGen/AMDGPU/llvm.log.ll
    M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
    M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
    M llvm/test/CodeGen/AMDGPU/max.ll
    M llvm/test/CodeGen/AMDGPU/min.ll
    M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
    M llvm/test/CodeGen/AMDGPU/rotl.ll
    M llvm/test/CodeGen/AMDGPU/rotr.ll
    M llvm/test/CodeGen/AMDGPU/s_addk_i32.ll
    M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/store-to-constant.ll
    M llvm/test/CodeGen/AMDGPU/udivrem.ll
    M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
    R llvm/test/Transforms/InstCombine/copy-access-metadata.ll
    R llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/copy-metadata-load-store.ll
    M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-vectors-complex.ll
    M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-vectors.ll

  Log Message:
  -----------
  Revert "[LSV] Merge contiguous chains across scalar types" (#170381)

Reverts llvm/llvm-project#154069. I pointed out a number of issues
post-merge, most importantly examples of miscompiles:
https://github.com/llvm/llvm-project/pull/154069#issuecomment-3603854626.

While the motivation of the change is clear, I think the implementation
approach is flawed. It seems like the goal is to allow elements like
`load <2xi16>` and `load i32` to be vectorized together despite the
current algorithm not grouping them into the same equivalence classes. I
personally think that if we want to attempt this it should be a more
wholistic approach, maybe even redefining the concept of an equivalence
class. This current solution seems like it would be really hard to do
bug-free, and even if the bugs were not present, it is only able to
merge chains that happen to be adjacent to each other after
`splitChainByContiguity`, which seems like it is leaving things up to
chance whether this optimization kicks in. But we can discuss more in
the re-land. Maybe the broader approach I'm proposing is too difficult,
and a narrow optimization is worthwhile. Regardless, this should be
reverted, it needs more iteration before it is correct.


  Commit: 6bdb838a05bb7c6f293e53800f46ba182a22f571
      https://github.com/llvm/llvm-project/commit/6bdb838a05bb7c6f293e53800f46ba182a22f571
  Author: Thibault Monnier <97551402+Thibault-Monnier at users.noreply.github.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
    M clang/lib/CIR/CodeGen/CIRGenFunction.h
    M clang/test/CIR/CodeGenBuiltins/X86/avx-builtins.c
    A clang/test/CIR/CodeGenBuiltins/X86/avx2-builtins.c
    M clang/test/CIR/CodeGenBuiltins/X86/avx512bw-builtins.c
    M clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c
    M clang/test/CIR/CodeGenBuiltins/X86/sse-builtins.c
    M clang/test/CIR/CodeGenBuiltins/X86/sse2-builtins.c

  Log Message:
  -----------
  [CIR] Upstream vec shuffle builtins in CIR codegen (#169178)

This PR is part of #167752. It upstreams the codegen and tests for the
shuffle builtins implemented in the incubator, including:
- `vinsert` + `insert`
- `pblend` + `blend`
- `vpermilp`
- `pshuf` + `shufp`
- `palignr`

It does NOT upstream the `perm`, `vperm2`, `vpshuf`, `shuf_i` / `shuf_f`
and `align` builtins, which are not yet implemented in the incubator.

This _is_ a large commit, but most of it is tests.

The `pshufd` / `vpermilp` builtins seem to have no test coverage in the
incubator, what should I do?


  Commit: e9c127428cd2bc38c64ea788007e336d21e5f199
      https://github.com/llvm/llvm-project/commit/e9c127428cd2bc38c64ea788007e336d21e5f199
  Author: Mircea Trofin <mtrofin at google.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
    M llvm/test/Transforms/LowerTypeTests/function.ll

  Log Message:
  -----------
  [LTT] mark the CFI jumptable naked on Windows (#170371)

We were not marking the `.cfi.jumptable` functions as `naked` on windows. The referenced bug (https://llvm.org/bugs/show_bug.cgi?id=28641#c3) appears to be fixed:

```bash
build/bin/opt -S -passes=lowertypetests -mtriple=i686-pc-win32 llvm/test/Transforms/LowerTypeTests/function.ll | build/bin/llc -O0
```

```
L_.cfi.jumptable:                       # @.cfi.jumptable
# %bb.0:                                # %entry
        #APP
        jmp     _f.cfi at PLT
        int3
        int3
        int3

        #NO_APP
        #APP
        jmp     _g.cfi at PLT
        int3
        int3
        int3

        #NO_APP
                                        # -- End function
        .section        .rdata,"dr"
        .p2align        4, 0x0                          # @0

```

Not seeing the spilled registers described in the bug anymore.


  Commit: 6c32535b204006488ed9d800dee549118f0fd719
      https://github.com/llvm/llvm-project/commit/6c32535b204006488ed9d800dee549118f0fd719
  Author: David Stone <davidfromonline at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/lib/Sema/AnalysisBasedWarnings.cpp
    M clang/lib/StaticAnalyzer/Core/BugReporter.cpp

  Log Message:
  -----------
  [clang][NFC] Remove unused CFGStmtMap.h includes (#170383)


  Commit: 45918f50aa956e7c9ecb0d931a85e533c488d741
      https://github.com/llvm/llvm-project/commit/45918f50aa956e7c9ecb0d931a85e533c488d741
  Author: David Stone <davidfromonline at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/include/llvm/ADT/SetVector.h
    M llvm/unittests/ADT/SetVectorTest.cpp

  Log Message:
  -----------
  [llvm][NFC] In `SetVector`, `contains` and `count` now automatically accept `const T *` arguments when the key is `T *` (#170377)

Also use `is_contained` to implement `contains`, since this tries the
`contains` member function of the set type first.


  Commit: dd1b4abfb74809481100ed20c5a099f062ef0625
      https://github.com/llvm/llvm-project/commit/dd1b4abfb74809481100ed20c5a099f062ef0625
  Author: Farzon Lotfi <farzonlotfi at microsoft.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/include/clang/AST/OperationKinds.def
    M clang/include/clang/Basic/DiagnosticGroups.td
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/include/clang/Sema/Overload.h
    M clang/lib/AST/Expr.cpp
    M clang/lib/AST/ExprConstant.cpp
    M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
    M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
    M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
    M clang/lib/CodeGen/CGExpr.cpp
    M clang/lib/CodeGen/CGExprAgg.cpp
    M clang/lib/CodeGen/CGExprComplex.cpp
    M clang/lib/CodeGen/CGExprConstant.cpp
    M clang/lib/CodeGen/CGExprScalar.cpp
    M clang/lib/Edit/RewriteObjCFoundationAPI.cpp
    M clang/lib/Sema/SemaChecking.cpp
    M clang/lib/Sema/SemaExprCXX.cpp
    M clang/lib/Sema/SemaHLSL.cpp
    M clang/lib/Sema/SemaOverload.cpp
    M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
    A clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl
    A clang/test/CodeGenHLSL/BasicFeatures/MatrixExplicitTruncation.hlsl
    A clang/test/CodeGenHLSL/BasicFeatures/MatrixImplicitTruncation.hlsl
    M clang/test/Driver/autocomplete.c
    A clang/test/SemaHLSL/MatrixElementOverloadResolution.hlsl
    A clang/test/SemaHLSL/Types/BuiltinMatrix/MatrixCastErrors.hlsl
    A clang/test/SemaHLSL/Types/BuiltinMatrix/MatrixImplicitTruncCastWarnings.hlsl

  Log Message:
  -----------
  [HLSL][Matrix] Add support for Matrix element and trunc Casts (#168915)

fixes #168737
fixes #168755

This change fixes adds support for Matrix truncations via the
ICK_HLSL_Matrix_Truncation enum. That ends up being most of the files
changed.

It also allows Matrix as an HLSL Elementwise cast as long as the cast
does not perform a shape transformation ie 3x2 to 2x3.

Tests for the new elementwise and truncation behavior were added. As
well as sema tests to make sure we error n the shape transformation
cast.

I am punting right now on the ConstExpr Matrix support. That will need
to be addressed later. Will file a seperate issue for that if reviewers
agree it can wait.


  Commit: 9dd33465896032d402f851ac5a3ef047723ed3d8
      https://github.com/llvm/llvm-project/commit/9dd33465896032d402f851ac5a3ef047723ed3d8
  Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/GCNSubtarget.h
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    A llvm/test/CodeGen/AMDGPU/hazard-gfx1250-flat-scr-hi.mir

  Log Message:
  -----------
  [AMDGPU] Prevent folding of flat_scr_base_hi into a 64-bit SALU (#170373)

Fixes: SWDEV-563886


  Commit: 9fd288e8866788d9defccccfcc75272eb27f54fe
      https://github.com/llvm/llvm-project/commit/9fd288e8866788d9defccccfcc75272eb27f54fe
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/lib/Basic/Targets/AMDGPU.h
    M clang/test/CodeGenOpenCL/address-spaces.cl
    M clang/test/CodeGenOpenCL/builtins-alloca.cl
    M clang/test/Misc/amdgcn.languageOptsOpenCL.cl

  Log Message:
  -----------
  clang/AMDGPU: Enable opencl 2.0 features for unknown target (#170308)

Assume amdhsa triples support flat addressing, which matches
the backend logic for the default target. This fixes the
rocm device-libs build.


  Commit: 94c8940f449ebc3a42c8343ebbdf5b888a436854
      https://github.com/llvm/llvm-project/commit/94c8940f449ebc3a42c8343ebbdf5b888a436854
  Author: Max Desiatov <m_desiatov at apple.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M lldb/docs/resources/lldbgdbremote.md

  Log Message:
  -----------
  lldbgdbremote.md: Update `qWasmLocal` result description (#170393)

The current description mistakenly specified that an address of a local
value in some address space is returned. When testing this with Wasm
runtimes that already implement this command, it can be observed that
the value itself is returned. The value itself may be an address for
languages that use shadow stack in Wasm linear memory, but the value of
an arbitrary local does not always contain that address.


  Commit: 325a08267de9362a9b17a8fc80fdc59568fd30f8
      https://github.com/llvm/llvm-project/commit/325a08267de9362a9b17a8fc80fdc59568fd30f8
  Author: Zachary Fogg <zach.fogg at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M lldb/include/lldb/API/SBTrace.h

  Log Message:
  -----------
  [lldb] Fix Doxygen warning in SBTrace.h (#170394)

Remove errant `\a` command before `<directory>` in `SaveToDisk`
documentation. The `\a` Doxygen command expects a word argument, but
`<directory>` starts with `<` which Doxygen interprets as HTML. This
fixes:

```
llvm-project/lldb/include/lldb/API/SBTrace.h:60:
Warning 564: Error parsing Doxygen command a: No word followed the command. Command ignored.
```


  Commit: c5e9289ba5e643967faa5caad72f15195f764d08
      https://github.com/llvm/llvm-project/commit/c5e9289ba5e643967faa5caad72f15195f764d08
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/test/tools/llvm-exegesis/RISCV/rvv/filter.test

  Log Message:
  -----------
  [llvm-exegesis] Make rvv/filter.test deterministic

This should prevent the flaky failures that have been plaguing the
buildbots since the test was introduced and allow for offline
investigation without disrupting CI.

Reviewers: topperc, mshockwave

Reviewed By: mshockwave

Pull Request: https://github.com/llvm/llvm-project/pull/170014


  Commit: e05fffbbc54d201a60e55e8c051bad81eaebd69a
      https://github.com/llvm/llvm-project/commit/e05fffbbc54d201a60e55e8c051bad81eaebd69a
  Author: Nico Weber <thakis at chromium.org>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/docs/LanguageExtensions.rst
    M clang/include/clang/Basic/BuiltinTemplates.td
    M clang/include/clang/Sema/Sema.h
    M clang/lib/Sema/SemaTemplate.cpp
    M clang/lib/Sema/SemaType.cpp
    M clang/lib/Sema/SemaTypeTraits.cpp
    R clang/test/SemaCXX/type-trait-common-reference.cpp
    M libcxx/include/__type_traits/common_reference.h
    M libcxx/include/module.modulemap.in

  Log Message:
  -----------
  Revert "[Clang] Add __builtin_common_reference (#121199)"

This reverts commit 3b9e203364dcd8234b12eb447ddbcf97a877558c.
Causes not-yet-understood semantic differences, see commits
on #121199.


  Commit: b30a48c389cee20479419a672d841cb32eaf107a
      https://github.com/llvm/llvm-project/commit/b30a48c389cee20479419a672d841cb32eaf107a
  Author: Med Ismail Bennani <ismail at bennani.ma>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M lldb/test/API/functionalities/scripted_frame_provider/TestScriptedFrameProvider.py

  Log Message:
  -----------
  [lldb/test] Fix scripted frame provider tests on ARM32

On ARM32, FixCodeAddress unconditionally clears bit 0 (the Thumb bit)
from all code addresses, including synthetic frame PCs. This causes
test failures where synthetic PCs like 0xFFFF and 0xDEADBEEF become
0xFFFE and 0xDEADBEEE respectively.

This adjusts the tests to expect the modified PC values on ARM32.

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>


  Commit: dea86c6fb0b5eabacc1e9237489bac3ba53119b8
      https://github.com/llvm/llvm-project/commit/dea86c6fb0b5eabacc1e9237489bac3ba53119b8
  Author: Changpeng Fang <changpeng.fang at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/occupancy-levels.ll

  Log Message:
  -----------
  [AMDGPU][NFC] Add occupancy checks for gfx950 and gfx1250 (#170392)


  Commit: ac19d38e6f3f97ae920f71dc2618800f54668332
      https://github.com/llvm/llvm-project/commit/ac19d38e6f3f97ae920f71dc2618800f54668332
  Author: Michael Buch <michaelbuch12 at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
    M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
    M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
    M lldb/unittests/Symbol/TestClangASTImporter.cpp
    M lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp

  Log Message:
  -----------
  [lldb][DWARFASTParserClang] Complete and make use of LLVM's RTTI support (#170249)

We almost had RTTI support for `DWARFASTParserClang`, but because
`classof` was protected, using `llvm::cast`/etc. on it would fail to
compile with:
```
llvm/include/llvm/Support/Casting.h:64:57: error: 'classof' is a protected member of 'DWARFASTParserClang'
   64 |   static inline bool doit(const From &Val) { return To::classof(&Val); }
      |                                                         ^
llvm/include/llvm/Support/Casting.h:110:32: note: in instantiation of member function 'llvm::isa_impl<DWARFASTParserClang, lldb_private::plugin::dwarf::DWARFASTParser>::doit' requested here
  110 |     return isa_impl<To, From>::doit(*Val);
```

This patch makes `classof` public and turns `static_cast`s of
`DWARFASTParserClang` into `llvm::cast`s.


  Commit: 7685e1f82383e8a7c21de338ba376e7b317e0fa3
      https://github.com/llvm/llvm-project/commit/7685e1f82383e8a7c21de338ba376e7b317e0fa3
  Author: Michael Buch <michaelbuch12 at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp

  Log Message:
  -----------
  [lldb][test] DWARFASTParserClangTests: extract test setup into helper structure (#170132)

Depends on:
* https://github.com/llvm/llvm-project/pull/170249

We keep repeating the boilerplate of creating a
`DWARFASTParserClangStub` and `TypeSystemClangHolder` in all the
unit-test cases. Lets extract this into a helper to make the tests
easier to grok.

We actually only need the `DWARFASTParserClangStub` and a
`TypeSystemClangHolder` in one of the test cases. For the rest, we can
just re-use the typesystem/parser that the `YAMLModuleTester` created.
Re-using them makes it more straightforward to write test-cases because
we don't need to worry about which TypeSystem which DWARFParser created
types into.


  Commit: 271e99daf0ff860d0ab50c688ba5e0480de78847
      https://github.com/llvm/llvm-project/commit/271e99daf0ff860d0ab50c688ba5e0480de78847
  Author: Omar Hossam <moar.ahmed at gmail.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
    M clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c
    A clang/test/CIR/CodeGenBuiltins/X86/xop-builtins.c

  Log Message:
  -----------
  [CIR] Support x86 builtin rotate (#169566)

This PR implements CodeGen for rotate builtins in CIR upstream.
Issue https://github.com/llvm/llvm-project/issues/167765


  Commit: 83ab875b8337aad5970fb8f519fec91a43dce906
      https://github.com/llvm/llvm-project/commit/83ab875b8337aad5970fb8f519fec91a43dce906
  Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/test/CodeGen/AMDGPU/hazard-gfx1250-flat-scr-hi.mir

  Log Message:
  -----------
  [AMDGPU] Handle phys regs in flat_scratch_base_hi operand check (#170395)


  Commit: 2cf276880d58effab669f89dcda4d27bb9c15d73
      https://github.com/llvm/llvm-project/commit/2cf276880d58effab669f89dcda4d27bb9c15d73
  Author: Med Ismail Bennani <ismail at bennani.ma>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M lldb/test/API/functionalities/scripted_frame_provider/circular_dependency/TestFrameProviderCircularDependency.py

  Log Message:
  -----------
  [lldb/test] XFAIL TestFrameProviderCircularDependency.py on Windows

This patch disables TestFrameProviderCircularDependency.py on Windows
since the scripted frame provider uses SBTarget.FindFunctions which
doesn't seem to be working (according to TestTargetAPI.test_find_functions).

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>


  Commit: 82c6ad655ddbfd86d22d8d1aa3de1fb5d6ec2f6b
      https://github.com/llvm/llvm-project/commit/82c6ad655ddbfd86d22d8d1aa3de1fb5d6ec2f6b
  Author: Med Ismail Bennani <ismail at bennani.ma>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M lldb/test/API/functionalities/scripted_frame_provider/circular_dependency/TestFrameProviderCircularDependency.py

  Log Message:
  -----------
  [lldb/test] Add missing import for decorator (NFC)

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>


  Commit: 93ebe63f2e7a252038bde01a4399c14e0123cdac
      https://github.com/llvm/llvm-project/commit/93ebe63f2e7a252038bde01a4399c14e0123cdac
  Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/lib/Sema/SemaLookup.cpp
    A clang/test/Modules/pr170235.cppm

  Log Message:
  -----------
  [C++20] [Modules] Fix ADL for friend in modules

Close https://github.com/llvm/llvm-project/issues/170235

The cause of the issue is it didn't check friendness for decls
in ordinary namespace if it isn't visible.

It is fine for code before modules, since everything is visible.
But it is not true after modules came in. This patch adjusts this.

Note that this doesn't change the control flow for non-modules codes,
as the decls in ordinary namespace is always visible then it won't never
fall in following friendness check.


  Commit: 6f5a69b54cf186d984971ad0f098b4bab51ba742
      https://github.com/llvm/llvm-project/commit/6f5a69b54cf186d984971ad0f098b4bab51ba742
  Author: Med Ismail Bennani <ismail at bennani.ma>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M lldb/test/API/functionalities/scripted_frame_provider/TestScriptedFrameProvider.py
    M lldb/test/API/functionalities/scripted_frame_provider/circular_dependency/TestFrameProviderCircularDependency.py

  Log Message:
  -----------
  [lldb/test] Skip ScriptedFrameProviders tests on arm32 (NFC)

It looks like the providers don't get loaded on arm32 bots:

https://github.com/llvm/llvm-project/issues/170412

Skipping for now since I don't have access to a machine to investigate
it.

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>


  Commit: 242077ad1c0df4ecfd12769a38cf6fcb1b0b1d72
      https://github.com/llvm/llvm-project/commit/242077ad1c0df4ecfd12769a38cf6fcb1b0b1d72
  Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/test/CXX/drs/cwg30xx.cpp

  Log Message:
  -----------
  [clang][NFC] Promote CWG3005 test to "ready"

Not updating cxx_dr_status.html yet, because CWG2917 test might need major adjustments before make_cxx_dr_status can be ran.


  Commit: 76cb98442b280bf9b5862f0bec3a56c2cc37d70f
      https://github.com/llvm/llvm-project/commit/76cb98442b280bf9b5862f0bec3a56c2cc37d70f
  Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
    M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
    M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/rvv/select.mir
    M llvm/test/CodeGen/RISCV/rvv/combine-reduce-add-to-vcpop.ll
    M llvm/test/CodeGen/RISCV/rvv/copyprop.mir
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
    M llvm/test/CodeGen/RISCV/rvv/fmaximum-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/fminimum-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir
    M llvm/test/CodeGen/RISCV/rvv/pr88576.ll
    M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-to-vmv.mir
    M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
    M llvm/test/CodeGen/RISCV/rvv/vector-splice.ll
    M llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir
    M llvm/test/CodeGen/RISCV/rvv/vl-optimizer-subreg-assert.mir
    M llvm/test/CodeGen/RISCV/rvv/vmerge-peephole.mir
    M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.mir

  Log Message:
  -----------
  [RISCV] Sources of vmerge shouldn't overlap V0 (#170070)

According to the spec:

> A vector register cannot be used to provide source operands with more
> than one EEW for a single instruction. A mask register source is
> considered to have EEW=1 for this constraint.

There must be a mask `V0` in `vmerge` variants so the sources should
use register classes without `V0`.

This fixes #169905.

Co-authored-by: Luke Lau <luke at igalia.com>


  Commit: 542a8f25c0d93a01e90f270fc73107d9ce2280c6
      https://github.com/llvm/llvm-project/commit/542a8f25c0d93a01e90f270fc73107d9ce2280c6
  Author: Med Ismail Bennani <ismail at bennani.ma>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M lldb/test/API/functionalities/scripted_frame_provider/TestScriptedFrameProvider.py
    M lldb/test/API/functionalities/scripted_frame_provider/circular_dependency/TestFrameProviderCircularDependency.py

  Log Message:
  -----------
  [lldb/test] Add missing import for decorator (NFC)

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>


  Commit: 2978b20af43f9dbba8c775c9b2b5a20f60ec9fe7
      https://github.com/llvm/llvm-project/commit/2978b20af43f9dbba8c775c9b2b5a20f60ec9fe7
  Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Analysis/Delinearization.cpp
    M llvm/test/Analysis/Delinearization/constant_functions_multi_dim.ll
    M llvm/test/Analysis/Delinearization/multidim_only_ivs_2d.ll
    M llvm/test/Analysis/Delinearization/multidim_only_ivs_3d.ll
    M llvm/test/Analysis/Delinearization/multidim_two_accesses_different_delinearization.ll
    M llvm/test/Analysis/Delinearization/validation_large_size.ll
    M llvm/test/Analysis/DependenceAnalysis/DADelin.ll
    M llvm/test/Analysis/DependenceAnalysis/DifferentOffsets.ll
    M llvm/test/Analysis/DependenceAnalysis/StrongSIV.ll
    M llvm/test/Transforms/LICM/lnicm.ll

  Log Message:
  -----------
  [Delinearization] Add validation for large size arrays (#169902)

This patch adds a check in validation for delinearization to ensure that
the offset calculation does not overflow. If it overflows, different
array accesses (e.g., `A[0][0]` and `A[1][0]`) could map to the same
linear index, leading to incorrect behavior.
For fixed-size arrays, the check is relatively straightforward. However,
for dynamic-size arrays (i.e., arrays where the size is not known at
compile time), it's difficult to prove this statically, and it going to
fail for almost all cases. Maybe we need to add some runtime checks or
reasoning based on `inbounds` like LAA does.

Fixes the test cases added in #169048.


  Commit: 1c86f4a8f1a254a6286342a5bffb13c99168267b
      https://github.com/llvm/llvm-project/commit/1c86f4a8f1a254a6286342a5bffb13c99168267b
  Author: Shih-Po Hung <shihpo.hung at sifive.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
    M llvm/include/llvm/CodeGen/BasicTTIImpl.h
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
    M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
    M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
    M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
    M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
    M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    M llvm/lib/Target/X86/X86TargetTransformInfo.h

  Log Message:
  -----------
  [TTI] Use MemIntrinsicCostAttributes for getGatherScatterOpCost (#168650)

- Following #168029. This is a step toward a unified interface for
masked/gather-scatter/strided/expand-compress cost modeling.
- Replace the ad-hoc parameter list with a single attributes object.

API change:
```
- InstructionCost getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask,
-                                        Alignment, CostKind, Inst);

+ InstructionCost getGatherScatterOpCost(MemIntrinsicCostAttributes,
+                                       CostKind);
```

Notes:
- NFCI intended: callers populate MemIntrinsicCostAttributes with same
information as before.


  Commit: 1f35b52a00ebd7d595deaffd5e72f72088f450b1
      https://github.com/llvm/llvm-project/commit/1f35b52a00ebd7d595deaffd5e72f72088f450b1
  Author: Michael Buch <michaelbuch12 at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
    M lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp

  Log Message:
  -----------
  [lldb][DWARFASTParserClang] Treat DW_TAG_template_alias like we do DW_TAG_typedef (#170135)

Depends on:
* https://github.com/llvm/llvm-project/pull/170132

Clang gained the `-gtemplate-alias` not too long ago, which emits C++
alias templates as `DW_TAG_template_alias` (instead of
`DW_TAG_typedef`). The main difference is that `DW_TAG_template_alias`
has `DW_TAG_template_XXX` children. The flag was not enabled by default
because consumers (mainly LLDB) didn't know how to handle it. This patch
adds rudimentary support for debugging with `DW_TAG_template_alias`.

This patch simply creates the same kind of `TypedefDecl` as we do for
`DW_TAG_typedef`. The more complete solution would be to create a
`TypeAliasTemplateDecl` and associated `TypeAliasDecl`. But that would
require DWARF to carry generic template information, but currently each
`DW_TAG_template_alias` represents a concrete instantiation. We could
probably hack up some working AST representation that includes the
template parameters, but I currently don't see a compelling reason to.
All we need is the `DW_AT_name` and the `DW_AT_type` that the typedef
refers to.

rdar://137499401


  Commit: 822fc449985553c609e44915374f935672c0db50
      https://github.com/llvm/llvm-project/commit/822fc449985553c609e44915374f935672c0db50
  Author: Rajat Bajpai <rbajpai at nvidia.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/include/llvm/IR/Intrinsics.h
    M llvm/lib/IR/IRBuilder.cpp
    M llvm/lib/IR/Intrinsics.cpp
    M llvm/unittests/IR/IntrinsicsTest.cpp

  Log Message:
  -----------
  [LLVM][Intrinsics] Adds an API to automatically resolve overload types (#169007)

Currently, the getOrInsertDeclaration API requires callers to explicitly
provide overload types for overloaded intrinsics, placing a significant
burden on callers who must determine whether overload types are needed.
This typically results in conditional logic at each call site to check
if the intrinsic is overloaded and manually match the intrinsic
signature.

This patch introduces a new getOrInsertDeclaration overload that
automatically deduces overload types from the provided return type and
argument types, then uses this API to simplify
IRBuilder::CreateIntrinsic. The new API uses
Intrinsic::matchIntrinsicSignature internally to resolve overloaded
types, eliminating the need for callers to do manual overload detection.


  Commit: d05370e6863e28fcf988b8491dc583fcf5e4e1be
      https://github.com/llvm/llvm-project/commit/d05370e6863e28fcf988b8491dc583fcf5e4e1be
  Author: Baranov Victor <bar.victor.2002 at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang-tools-extra/clang-tidy/.clang-tidy
    M clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
    M clang-tools-extra/clang-tidy/bugprone/BranchCloneCheck.cpp
    M clang-tools-extra/clang-tidy/bugprone/CapturingThisInMemberVariableCheck.cpp
    M clang-tools-extra/clang-tidy/bugprone/EasilySwappableParametersCheck.cpp
    M clang-tools-extra/clang-tidy/bugprone/InfiniteLoopCheck.cpp
    M clang-tools-extra/clang-tidy/bugprone/SuspiciousReallocUsageCheck.cpp
    M clang-tools-extra/clang-tidy/cppcoreguidelines/ProBoundsArrayToPointerDecayCheck.cpp
    M clang-tools-extra/clang-tidy/fuchsia/VirtualInheritanceCheck.cpp
    M clang-tools-extra/clang-tidy/misc/NewDeleteOverloadsCheck.cpp
    M clang-tools-extra/clang-tidy/misc/UnusedParametersCheck.cpp
    M clang-tools-extra/clang-tidy/modernize/LoopConvertCheck.cpp
    M clang-tools-extra/clang-tidy/modernize/LoopConvertUtils.cpp
    M clang-tools-extra/clang-tidy/modernize/PassByValueCheck.cpp
    M clang-tools-extra/clang-tidy/modernize/UseEmplaceCheck.cpp
    M clang-tools-extra/clang-tidy/modernize/UseTrailingReturnTypeCheck.cpp
    M clang-tools-extra/clang-tidy/objc/MissingHashCheck.cpp
    M clang-tools-extra/clang-tidy/performance/TriviallyDestructibleCheck.cpp
    M clang-tools-extra/clang-tidy/readability/AmbiguousSmartptrResetCallCheck.cpp
    M clang-tools-extra/clang-tidy/readability/OperatorsRepresentationCheck.cpp
    M clang-tools-extra/clang-tidy/readability/SuspiciousCallArgumentCheck.cpp
    M clang-tools-extra/clang-tidy/utils/Aliasing.cpp
    M clang-tools-extra/clang-tidy/utils/DeclRefExprUtils.cpp
    M clang-tools-extra/clang-tidy/utils/ExprSequence.cpp
    M clang-tools-extra/clang-tidy/utils/TypeTraits.cpp

  Log Message:
  -----------
  [clang-tidy][NFC] Enable readability-any-all-of check (#167134)

Closes https://github.com/llvm/llvm-project/issues/156161.
Assisted-by: Claude Sonnet 4.5 via Claude Code


  Commit: 73036cf9113b4748d4fbb28037e8714ff2486238
      https://github.com/llvm/llvm-project/commit/73036cf9113b4748d4fbb28037e8714ff2486238
  Author: Baranov Victor <bar.victor.2002 at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang-tools-extra/clang-tidy/bugprone/ExceptionEscapeCheck.cpp
    M clang-tools-extra/clang-tidy/modernize/UseStdPrintCheck.h
    M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp

  Log Message:
  -----------
  [clang-tidy][NFC] Fix miscellaneous clang-tidy warnings (#170424)


  Commit: 689b3cc7c700b1687cf4aaaf4ef2c81a4e988917
      https://github.com/llvm/llvm-project/commit/689b3cc7c700b1687cf4aaaf4ef2c81a4e988917
  Author: Jinjie Huang <huangjinjie at bytedance.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/include/clang/Basic/DiagnosticGroups.td
    M clang/include/clang/Basic/DiagnosticLexKinds.td
    M clang/include/clang/Lex/HeaderSearch.h
    M clang/lib/Lex/HeaderSearch.cpp
    A clang/test/Preprocessor/header-shadowing.c

  Log Message:
  -----------
  [clang] Support header shadowing diagnostics in Clang header search (#162491)

When including a header file, multiple files with the same name may
exist across different search paths, like:
   |-- main.cpp
  |-- **header.h**
  |-- include
  |  └── **header.h**
The compiler usually picks the first match it finds (typically following
MSVC rules for current/include-chain paths first, then regular -I
paths), which may not be the user’s intended header.
This silent behavior can lead to subtle runtime API mismatches or
increase the cost of resolving errors such as “error: use of undeclared
identifier”, especially in large projects.

Therefore, this patch tries to provide a diagnostic message without
changing the current header selection. It does this by performing an
additional search for duplicate filenames across all search paths (both
MSVC rules and standard paths). This informs the user about a potential
"header shadowing" issue and clarifies which header path was actually
used.

Since header searching is much cheaper than file loading, the added
overhead should be within an acceptable range -- assuming the diagnostic
message is valuable.


  Commit: 9f634c6777701794a6ed5577857ffb8f202513b8
      https://github.com/llvm/llvm-project/commit/9f634c6777701794a6ed5577857ffb8f202513b8
  Author: Jianjian Guan <jacquesguan at me.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-extract-subvector.mir

  Log Message:
  -----------
  [RISCV][GISel] Fix legalize G_EXTRACT_SUBVECTOR (#169877)

Fix wrong mask type that used by G_VSLIDEDOWN_VL.


  Commit: 042a38f0bfe5c9f49df5d4cb5e23092e512c9fbe
      https://github.com/llvm/llvm-project/commit/042a38f0bfe5c9f49df5d4cb5e23092e512c9fbe
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/include/llvm/Support/DebugCounter.h
    M llvm/lib/Support/DebugCounter.cpp
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

  Log Message:
  -----------
  [Support] Optimize DebugCounter (#170305)

Currently, DebugCounters work by creating a unique counter ID during
registration, and then using that ID to look up the counter information
in the global registry.

However, this means that anything working with counters has to always go
through the global instance. This includes the fast path that checks
whether any counters are enabled.

Instead, we can drop the counter IDs, and make the counter variables use
CounterInfo themselves. We can then directly check whether the specific
counter is active without going through the global registry. This is
both faster for the fast-path where all counters are disabled, and also
faster for the case where only one counter is active (as the fast-path
can now still be used for all the disabled counters).

After this change, disabled counters become essentially free at runtime,
and we should be able to enable them in non-assert builds as well.


  Commit: 30f479fa2b08d6e480939a57384996f7a276eb91
      https://github.com/llvm/llvm-project/commit/30f479fa2b08d6e480939a57384996f7a276eb91
  Author: Henrich Lauko <xlauko at mail.muni.cz>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
    M clang/lib/CIR/Dialect/IR/CIRAttrs.cpp

  Log Message:
  -----------
  [CIR] Use default attribute printer/parser (NFC) (#170366)


  Commit: e6110cb3395b22a941cba4726c9e36308e5b5613
      https://github.com/llvm/llvm-project/commit/e6110cb3395b22a941cba4726c9e36308e5b5613
  Author: Matthias Springer <me at m-sp.org>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M mlir/include/mlir/Transforms/Passes.td
    M mlir/lib/Transforms/CMakeLists.txt
    M mlir/lib/Transforms/RemoveDeadValues.cpp
    M mlir/test/Transforms/remove-dead-values.mlir

  Log Message:
  -----------
  [mlir][Transforms] Fix crash in `-remove-dead-values` on private functions (#169269)

This commit fixes two crashes in the `-remove-dead-values` pass related
to private functions.

Private functions are considered entirely "dead" by the liveness
analysis, which drives the `-remove-dead-values` pass.

The `-remove-dead-values` pass removes dead block arguments from private
functions. Private functions are entirely dead, so all of their block
arguments are removed. However, the pass did not correctly update all
users of these dropped block arguments.

1. A side-effecting operation must be removed if one of its operands is
dead. Otherwise, the operation would end up with a NULL operand. Note:
The liveness analysis would not have marked an SSA value as "dead" if it
had a reachable side-effecting users. (Therefore, it is safe to erase
such side-effecting operations.)
2. A branch operation must be removed if one of its non-forwarded
operands is dead. (E.g., the condition value of a `cf.cond_br`.)
Whenever a terminator is removed, a `ub.unrechable` operation is
inserted. This fixes #158760.


  Commit: 98182f4d209ded292cb6030f45bcae132096acae
      https://github.com/llvm/llvm-project/commit/98182f4d209ded292cb6030f45bcae132096acae
  Author: Sven van Haastregt <sven.vanhaastregt at arm.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/lib/CodeGen/CodeGenFunction.cpp
    M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp

  Log Message:
  -----------
  Move CodeGenFunction::EmitScalarOrConstFoldImmArg; NFC (#170286)

This function is called from various .cpp files under `TargetBuiltins/`,
and was moved unintentionally into `AMDGPU.cpp` in PR #132252. Move it
to a common place.


  Commit: 5ee6cff90ba5d8e08066eeeef0c27aa0b6f24d2c
      https://github.com/llvm/llvm-project/commit/5ee6cff90ba5d8e08066eeeef0c27aa0b6f24d2c
  Author: Jonas Hahnfeld <jonas.hahnfeld at cern.ch>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/lib/Serialization/ASTReaderDecl.cpp
    A clang/test/Modules/GH170084.cpp

  Log Message:
  -----------
  [clang] Propagate definition data to all redecls (#170090)

Fix the propagation added in commit 0d490ae55f to include all redecls,
not only previous ones. This fixes another instance of the assertion
"Cannot get layout of forward declarations" in getASTRecordLayout().

Kudos to Alexander Kornienko for providing an initial version of the
reproducer that I further simplified.

Fixes #170084


  Commit: befa4e85e4fab6a109203903a2fbeb979164cd2e
      https://github.com/llvm/llvm-project/commit/befa4e85e4fab6a109203903a2fbeb979164cd2e
  Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/hazard-gfx1250-flat-scr-hi.mir

  Log Message:
  -----------
  [AMDGPU] Avoid undefs in hazard-gfx1250-flat-scr-hi.mir. NFC (#170396)


  Commit: ae4289f0e6e1bf61f45f88870aec220c9164800b
      https://github.com/llvm/llvm-project/commit/ae4289f0e6e1bf61f45f88870aec220c9164800b
  Author: Shih-Po Hung <shihpo.hung at sifive.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
    M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h

  Log Message:
  -----------
  [Hexagon][NFC] Drop no-op getMaskedMemoryOpCost/getGatherScatterOpCost stubs (#170426)

These stubs (from 4bdf1aa416b02) don’t actually override anything.
Removing them eliminates the need for a local getMemIntrinsicCost()
forwarder in #169885.


  Commit: cd86b2ab32bb2c444fb48e41a40f43c80a7eaeae
      https://github.com/llvm/llvm-project/commit/cd86b2ab32bb2c444fb48e41a40f43c80a7eaeae
  Author: Vikash Gupta <Vikash.Gupta at amd.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/docs/MIRLangRef.rst
    M llvm/include/llvm/CodeGen/MIR2Vec.h
    M llvm/include/llvm/CodeGen/MachineInstr.h
    M llvm/include/llvm/CodeGen/MachineInstrBuilder.h
    M llvm/include/llvm/CodeGen/MachineOperand.h
    M llvm/include/llvm/Support/TargetOpcodes.def
    M llvm/include/llvm/Target/Target.td
    M llvm/lib/CodeGen/MIRParser/MILexer.cpp
    M llvm/lib/CodeGen/MIRParser/MILexer.h
    M llvm/lib/CodeGen/MIRParser/MIParser.cpp
    M llvm/lib/CodeGen/MIRPrinter.cpp
    M llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
    M llvm/lib/CodeGen/MachineOperand.cpp
    M llvm/lib/CodeGen/MachineStableHash.cpp
    M llvm/lib/CodeGen/MachineVerifier.cpp
    M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
    A llvm/test/CodeGen/MIR/AMDGPU/parse-lanemask-operand-empty-lanemask.mir
    A llvm/test/CodeGen/MIR/AMDGPU/parse-lanemask-operand-invalid-lanemask.mir
    A llvm/test/CodeGen/MIR/AMDGPU/parse-lanemask-operand-missing-lparen.mir
    A llvm/test/CodeGen/MIR/AMDGPU/parse-lanemask-operand-missing-rparen.mir
    A llvm/test/CodeGen/MIR/AMDGPU/parse-lanemask-operand.mir
    M llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_print.txt
    M llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_wo=0.5_print.txt
    A llvm/test/MachineVerifier/AMDGPU/verifier-copyLanemask-invalid-lanemask.mir
    A llvm/test/MachineVerifier/AMDGPU/verifier-copyLanemask-missing-lanemask.mir
    M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-cxx.td
    M llvm/unittests/CodeGen/MachineOperandTest.cpp

  Log Message:
  -----------
  [CodeGen] Add MO_LaneMask type and a new COPY_LANEMASK instruction (#151944)

Introduce MO_LaneMask as new machine operand type. This can be used to
hold liveness infomation at sub-register granularity for register-type
operands. We also introduce a new COPY_LANEMASK instruction that uses
MO_lanemask operand to perform partial copy from source register
opernad.

One such use case of MO_LaneMask can be seen in #151123, where it can be
used to store live regUnits information corresponding to the source
register of the COPY instructions, later can be used during CopyPhysReg
expansion.


  Commit: c5ecdec9fb84e6865fe44f69e380afa1291c2adf
      https://github.com/llvm/llvm-project/commit/c5ecdec9fb84e6865fe44f69e380afa1291c2adf
  Author: Ebuka Ezike <yerimyah1 at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
    M lldb/tools/lldb-dap/DAP.cpp
    M lldb/tools/lldb-dap/Protocol/ProtocolBase.h

  Log Message:
  -----------
  [lldb-dap] start all sent protocol message from number one. (#170378)

This aligns with the DAP
[specification](https://microsoft.github.io/debug-adapter-protocol//specification.html#Base_Protocol_ProtocolMessage)

Force it to be an error in test cases.


  Commit: 6638d59c972512d45da474c214abc67ec3cfe333
      https://github.com/llvm/llvm-project/commit/6638d59c972512d45da474c214abc67ec3cfe333
  Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
    M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.h

  Log Message:
  -----------
  [lldb][NFC] Rename forward_branch_offset to branch_offset in UnwindAssemblyInstEmulation (#169631)

This will reduce the diff in subsequent patches

Part of a sequence of PRs:
[lldb][NFCI] Rewrite UnwindAssemblyInstEmulation in terms of a CFG visit
#169630
[lldb][NFC] Rename forward_branch_offset to branch_offset in
UnwindAssemblyInstEmulation #169631
[lldb] Add DisassemblerLLVMC::IsBarrier API #169632
[lldb] Handle backwards branches in UnwindAssemblyInstEmulation #169633
commit-id:5e758a22


  Commit: 4b0a9759395f3e9cbefa9c194ca331f4d88003bf
      https://github.com/llvm/llvm-project/commit/4b0a9759395f3e9cbefa9c194ca331f4d88003bf
  Author: Hongyu Chen <xxs_chy at outlook.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/lib/CodeGen/Targets/AMDGPU.cpp
    M clang/lib/CodeGen/Targets/NVPTX.cpp
    M clang/lib/CodeGen/Targets/SPIR.cpp
    M clang/lib/Sema/SemaType.cpp
    M clang/test/CodeGenOpenCL/ptx-calls.cl
    M clang/test/CodeGenOpenCL/reflect.cl

  Log Message:
  -----------
  [OpenCL][NVPTX] Don't set calling convention for OpenCL kernel (#170170)

Fixes #154772
We previously set `ptx_kernel` for all kernels. But it's incorrect to
add `ptx_kernel` to the stub version of kernel introduced in #115821.
This patch copies the workaround of AMDGPU.


  Commit: 8b7a07a5f7e7b2a96417665f807cbf79a3161a76
      https://github.com/llvm/llvm-project/commit/8b7a07a5f7e7b2a96417665f807cbf79a3161a76
  Author: Ebuka Ezike <yerimyah1 at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusNameParser.cpp
    M lldb/unittests/Language/CPlusPlus/CPlusPlusLanguageTest.cpp

  Log Message:
  -----------
  [lldb]  Fix abi_tag parsing for operator<< and operator-named tags (#170224)

The parser now correctly handles:
- abi_tags attached to operator<<: `operator<<[abi:SOMETAG]`
- abi_tags with "operator" as the tag name: `func[abi:operator]`


  Commit: 7cdb27a4b3757879446596d6f042f87b5119c638
      https://github.com/llvm/llvm-project/commit/7cdb27a4b3757879446596d6f042f87b5119c638
  Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll

  Log Message:
  -----------
  [NFC][AMDGPU] Refactor wave reduce test files (#170440)

Separate out float wave-reduce intrinsic tests from the overloaded call.
Moved float add/sub/min/max ops from:
`llvm.amdgcn.reduce.add/sub/min/max` to
`llvm.amdgcn.reduce.fadd/fsub/fmin/fmax`.


  Commit: 2b725ab8bf08b0bde29910ec4fa1c610eaaffa63
      https://github.com/llvm/llvm-project/commit/2b725ab8bf08b0bde29910ec4fa1c610eaaffa63
  Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M lldb/include/lldb/Core/Disassembler.h
    M lldb/source/Core/Disassembler.cpp
    M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp

  Log Message:
  -----------
  [lldb] Add DisassemblerLLVMC::IsBarrier API (#169632)

This will allow the instruction emulation unwinder to reason about
instructions that prevent the subsequent instruction from executing.

Part of a sequence of PRs:
[lldb][NFCI] Rewrite UnwindAssemblyInstEmulation in terms of a CFG visit
#169630
[lldb][NFC] Rename forward_branch_offset to branch_offset in
UnwindAssemblyInstEmulation #169631
[lldb] Add DisassemblerLLVMC::IsBarrier API #169632
[lldb] Handle backwards branches in UnwindAssemblyInstEmulation #169633

commit-id:bb5df4aa


  Commit: 9296223b28029095c1e734ba9373b9bcfc853d7b
      https://github.com/llvm/llvm-project/commit/9296223b28029095c1e734ba9373b9bcfc853d7b
  Author: mitchell <mitchell.xu2 at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang-tools-extra/clang-tidy/cppcoreguidelines/ProTypeMemberInitCheck.cpp
    M clang-tools-extra/docs/ReleaseNotes.rst
    M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/pro-type-member-init.ignorearrays.cpp

  Log Message:
  -----------
  [clang-tidy] Fix `cppcoreguidelines-pro-type-member-init` check (#169832)

Closes [#169677](https://github.com/llvm/llvm-project/issues/169677)

---------

Co-authored-by: EugeneZelenko <eugene.zelenko at gmail.com>


  Commit: 114ca6522e4ea425115adb778c39fd89745a6853
      https://github.com/llvm/llvm-project/commit/114ca6522e4ea425115adb778c39fd89745a6853
  Author: Shih-Po Hung <shihpo.hung at sifive.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
    M llvm/include/llvm/CodeGen/BasicTTIImpl.h
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h

  Log Message:
  -----------
  [TTI] Use MemIntrinsicCostAttributes for getStridedOpCost (#170436)

- Following #168029. This is a step toward a unified interface for
masked/gather-scatter/strided/expand-compress cost modeling.
- Replace the ad-hoc parameter list with a single attributes object.

API change:
```
- InstructionCost getStridedMemoryOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr,
                                                                       bool VariableMask, Align Alignment,
                                                                       TTI::TargetCostKind CostKind,
                                                                       const Instruction *I = nullptr);
+ InstructionCost getStridedMemoryOpCost(MemIntrinsicCostAttributes,
+                                                                      CostKind);
```

Notes:
- NFCI intended: callers populate MemIntrinsicCostAttributes with same
information as before.


  Commit: 5ccf8c90d1e4020d5f9bc255fe521aa0763f2b2b
      https://github.com/llvm/llvm-project/commit/5ccf8c90d1e4020d5f9bc255fe521aa0763f2b2b
  Author: Tom Eccles <tom.eccles at arm.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M flang/docs/Directives.md
    M flang/include/flang/Parser/dump-parse-tree.h
    M flang/include/flang/Parser/parse-tree.h
    M flang/lib/Lower/Bridge.cpp
    M flang/lib/Parser/Fortran-parsers.cpp
    M flang/lib/Parser/unparse.cpp
    M flang/lib/Semantics/canonicalize-directives.cpp
    M flang/lib/Semantics/resolve-names.cpp
    A flang/test/Lower/vectorlength.f90
    M flang/test/Parser/compiler-directives.f90

  Log Message:
  -----------
  [flang] implement VECTOR VECTORLENGTH directive (#170114)

This should match exactly the llvm attributes generated by classic
flang.


  Commit: 8feb6762ba9fb83f8e13ef9486c3b743e1b5cfa7
      https://github.com/llvm/llvm-project/commit/8feb6762ba9fb83f8e13ef9486c3b743e1b5cfa7
  Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.h
    M llvm/test/CodeGen/AMDGPU/release-vgprs.mir

  Log Message:
  -----------
  [AMDGPU] Take BUF instructions into account in mayAccessScratchThroughFlat (#170274)

BUF instructions can access the scratch address space, so
SIInsertWaitCnt needs to be able
to track the SCRATCH_WRITE_ACCESS event for such BUF instructions.

The release-vgprs.mir test had to be updated because BUF instructions
w/o a MMO are now
tracked as a SCRATCH_WRITE_ACCESS. I added a MMO that touches global to
keep the test result unchanged. I also added a couple of testcases with no MMO to test the corrected behavior.


  Commit: 2697c8cb459c1705f6c3a60c908462ca099e657f
      https://github.com/llvm/llvm-project/commit/2697c8cb459c1705f6c3a60c908462ca099e657f
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
    M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
    M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll
    M llvm/test/CodeGen/AMDGPU/lower-mem-intrinsics.ll
    M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
    M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
    M llvm/test/CodeGen/AMDGPU/memmove-var-size.ll
    M llvm/test/CodeGen/NVPTX/lower-aggr-copies.ll
    M llvm/unittests/Transforms/Utils/MemTransferLowering.cpp

  Log Message:
  -----------
  [LowerMemIntrinsics] Factor control flow generation out of the memcpy lowering (#169039)

So far, memcpy with known size, memcpy with unknown size, memmove with known
size, and memmove with unknown size have individual optimized loop lowering
implementations, while memset and memset.pattern use an unoptimized loop
lowering. This patch extracts the parts of the memcpy lowerings (for known and
unknown sizes) that generate the control flow for the loop expansion into an
`insertLoopExpansion` function. The `createMemCpyLoop(Unk|K)nownSize` functions
then only collect the necessary arguments for `insertLoopExpansion`, call it,
and fill the generated loop basic blocks.

The immediate benefit of this is that logic from the two memcpy lowerings is
deduplicated. Moreover, it enables follow-up patches that will use
`insertLoopExpansion` to optimize the memset and memset.pattern implementations
similarly to memcpy, since they can use the exact same control flow patterns.

The test changes are due to more consistent and useful basic block names in the
loop expansion and an improvement in basic block ordering: previously, the
basic block that determines if the residual loop is executed would be put at
the end of the function, now it is put before the residual loop body.
Otherwise, the generated code should be equivalent.

This patch doesn't affect memmove; deduplicating its logic would also be nice,
but to extract all CF generation from the memmove lowering,
`insertLoopExpansion` would need to be able to also create code that iterates
backwards over the argument buffers. That would make `insertLoopExpansion` a
lot more complex for a code path that's only used for memmove, so it's probably
not worth refactoring.

For SWDEV-543208.


  Commit: f17abc280c708c16f622be2de2ab7d0710cc8bc1
      https://github.com/llvm/llvm-project/commit/f17abc280c708c16f622be2de2ab7d0710cc8bc1
  Author: Gil Rapaport <gil.rapaport at mobileye.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
    M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitC.cpp
    M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
    M mlir/lib/Target/Cpp/TranslateToCpp.cpp
    M mlir/test/Conversion/MemRefToEmitC/memref-to-emitc-alloc-copy.mlir
    M mlir/test/Conversion/MemRefToEmitC/memref-to-emitc-copy.mlir
    M mlir/test/Conversion/MemRefToEmitC/memref-to-emitc.mlir
    M mlir/test/Dialect/EmitC/invalid_ops.mlir
    M mlir/test/Dialect/EmitC/ops.mlir
    M mlir/test/Target/Cpp/common-cpp.mlir
    M mlir/test/Target/Cpp/expressions.mlir

  Log Message:
  -----------
  [mlir][emitc] Add address-of and dereference ops (#72569)

EmitC currently models C's `&` and `*` operators via its `apply` op,
which has several drawbacks:

- Its pre-lvalue semantics combines dereferencing with memory access.

- Representing multiple opcodes (selected by an attribute) in a single
op complicates the code by adding a second, attribute-based selection
layer on top of MLIR's standard `isa<>` mechanism.

This patch adds two distinct, lvalue-based ops to model these C operators.
EmitC passes were converted to use the new ops instead of `apply`, which
is now deprecated.


  Commit: 49774448d69b55f5c46aef2147b45537fd61276a
      https://github.com/llvm/llvm-project/commit/49774448d69b55f5c46aef2147b45537fd61276a
  Author: mitchell <mitchell.xu2 at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang-tools-extra/clang-tidy/readability/RedundantTypenameCheck.cpp
    M clang-tools-extra/test/clang-tidy/checkers/readability/redundant-typename.cpp

  Log Message:
  -----------
  [clang-tidy] Fix false positive in `readability-redundant-typename` (#170034)

Closes #169166

---------

Co-authored-by: Victor Chernyakin <chernyakin.victor.j at outlook.com>


  Commit: 4e4763a8a4659dc252429a003c613f762d5a1083
      https://github.com/llvm/llvm-project/commit/4e4763a8a4659dc252429a003c613f762d5a1083
  Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
    M lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.h
    M lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp

  Log Message:
  -----------
  [lldb] Handle backwards branches in UnwindAssemblyInstEmulation (#169633)

This allows the unwinder to handle code with mid-function epilogues
where the subsequent code is reachable through a backwards branch.

Two changes are required to accomplish this:

1. Do not enqueue the subsequent instruction if the current instruction
   is a barrier(*).
2. When processing an instruction, stop ignoring branches with negative
   offsets.

(*) As per the definition in LLVM's MC layer, a barrier is any
instruction that "stops control flow from executing the instruction
immediately following it". See `MCInstrDesc::isBarrier` in MCInstrDesc.h

Part of a sequence of PRs:
[lldb][NFCI] Rewrite UnwindAssemblyInstEmulation in terms of a CFG visit
#169630
[lldb][NFC] Rename forward_branch_offset to branch_offset in
UnwindAssemblyInstEmulation #169631
[lldb] Add DisassemblerLLVMC::IsBarrier API #169632
[lldb] Handle backwards branches in UnwindAssemblyInstEmulation #169633

commit-id:fd266c13


  Commit: bfde296d081098605bdad0e4487c4bad9ca19c95
      https://github.com/llvm/llvm-project/commit/bfde296d081098605bdad0e4487c4bad9ca19c95
  Author: Med Ismail Bennani <ismail at bennani.ma>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M lldb/docs/CMakeLists.txt

  Log Message:
  -----------
  [lldb/docs] Add ScriptingFrameProvider documentation to the website

This patch adds the documentation for ScriptedFrameProviders to the
lldb website.

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>


  Commit: c0f0936f5a47270d47486f6d5860b5f8e30e0e32
      https://github.com/llvm/llvm-project/commit/c0f0936f5a47270d47486f6d5860b5f8e30e0e32
  Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M lldb/include/lldb/Breakpoint/BreakpointSite.h
    M lldb/source/Breakpoint/BreakpointSite.cpp
    M lldb/source/Target/ThreadPlanStepOut.cpp

  Log Message:
  -----------
  [lldb] Fix ThreadPlanStepOut::DoPlanExplainsStop inspection of BreakpointSite (#169799)

Suppose two threads are performing the exact same step out plan. They
will both have an internal breakpoint set at their parent frame. Now
supposed both of those breakpoints are in the same address (i.e. the
same BreakpointSite).

At the end of `ThreadPlanStepOut::DoPlanExplainsStop`, we see this:

```
// If there was only one owner, then we're done.  But if we also hit
// some user breakpoint on our way out, we should mark ourselves as
// done, but also not claim to explain the stop, since it is more
// important to report the user breakpoint than the step out
// completion.

if (site_sp->GetNumberOfConstituents() == 1)
  return true;
```

In other words, the plan looks at the name number of constituents of the
site to decide whether it explains the stop, the logic being that a
_user_ might have put a breakpoint there. However, the implementation is
not correct; in particular, it will fail in the situation described
above. We should only care about non-internal breakpoints that would
stop for the current thread.

It is tricky to test this, as it depends on the timing of threads, but I
was able to consistently reproduce the issue with a swift program using
concurrency.

rdar://165481473


  Commit: aeb36a92523427b63466555d92b35bd3aa26ee40
      https://github.com/llvm/llvm-project/commit/aeb36a92523427b63466555d92b35bd3aa26ee40
  Author: Lang Hames <lhames at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    A llvm/include/llvm/ExecutionEngine/Orc/CallableTraitsHelper.h
    M llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
    A llvm/unittests/ExecutionEngine/Orc/CallableTraitsHelperTest.cpp

  Log Message:
  -----------
  [ORC] Port CallableTraitsHelper from the new ORC runtime. (#170441)

The code for this commit was taken with minimal modification to fit LLVM
style from llvm-project/orc-rt/include/CallableTraitsHelper.h and
llvm-project/orc-rt/unittests/CallableTraitsHelperTest.cpp (originally
commited in 40fce325011)

CallableTraitsHelper identifies the return type and argument types of a
callable type and passes those to an implementation class template to
operate on. E.g. the CallableArgInfoImpl class exposes these types as
typedefs.

Porting CallableTraitsHelper from the new ORC runtime will allow us to
simplify existing and upcoming "callable-traits" classes in ORC.


  Commit: 6822e3c91b5df96ea980c94655a5d547c5f510b8
      https://github.com/llvm/llvm-project/commit/6822e3c91b5df96ea980c94655a5d547c5f510b8
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    A llvm/test/Transforms/VectorCombine/X86/shuffle-of-fma-const.ll

  Log Message:
  -----------
  [VectorCombine][X86] Add tests showing failure to push a shuffle through a fma with multiple constants (#170458)

Despite 2 of the 3 arguments of the fma intrinsics calls being constant
(free shuffle), foldShuffleOfIntrinsics fails to fold the shuffle
through


  Commit: 1ca763b76423a17a2101a4579b5d74bade4f0ce4
      https://github.com/llvm/llvm-project/commit/1ca763b76423a17a2101a4579b5d74bade4f0ce4
  Author: Martin Storsjö <martin at martin.st>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/test/tools/llvm-readobj/COFF/arm64-packed-unwind.s
    M llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp

  Log Message:
  -----------
  [llvm-readobj] [ARMWinEH] Fix printing of packed unwind with H=1, RegI=RegF=0, CR!=1 (#170294)

In these cases, there are no other GPRs or float registers that would
have been backed up before the register homing area, that would have
allocated space on the stack for the saved registers.

Normally, the register homing part of the prologue consists of 4 nop
unwind codes. However, if we haven't allocated stack space for those
arguments yet, there's no space to store them in. The previous printout,
printing "stp x0, x1, [sp, #-N]!" wouldn't work when interpreted as a
nop unwind code.

Based on "dumpbin -unwindinfo", and from empirical inspection with
RtlVirtualUnwind, it turns out that the homing of argument registers is
done outside of the prologue. In these cases, "dumpbin -unwindinfo"
prints an annotation "(argument registers homed post-prolog)".

Adjust the printout accordingly. In these cases, the later stack
allocation (either "stp x29, x30, [sp, #-LocSZ]! or "sub sp, sp,
#LocSZ") is adjusted to include the space the homed registers (i.e. be
the full size from FrameSize).


  Commit: 4286a474b476e300079efa127d084593e833b1d6
      https://github.com/llvm/llvm-project/commit/4286a474b476e300079efa127d084593e833b1d6
  Author: Med Ismail Bennani <ismail at bennani.ma>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M lldb/docs/CMakeLists.txt

  Log Message:
  -----------
  Revert "[lldb/docs] Add ScriptingFrameProvider documentation to the website"

This reverts commit bfde296d081098605bdad0e4487c4bad9ca19c95.


  Commit: 0dcbc870ed9baa54dc7c46e483d40a26dff28f96
      https://github.com/llvm/llvm-project/commit/0dcbc870ed9baa54dc7c46e483d40a26dff28f96
  Author: Med Ismail Bennani <ismail at bennani.ma>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M lldb/docs/CMakeLists.txt
    M lldb/docs/python_extensions.rst

  Log Message:
  -----------
  [lldb/docs] Add ScriptingFrameProvider documentation to the website

This patch adds the documentation for ScriptedFrameProviders to the
lldb website.

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>


  Commit: dd9a516e0eb3b3a55890adbdc2221e70a3bf7719
      https://github.com/llvm/llvm-project/commit/dd9a516e0eb3b3a55890adbdc2221e70a3bf7719
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/BUILD.gn

  Log Message:
  -----------
  [gn build] Port aeb36a925234


  Commit: 4497c53298a6121dae51da490b3c228beb053e89
      https://github.com/llvm/llvm-project/commit/4497c53298a6121dae51da490b3c228beb053e89
  Author: Timm Baeder <tbaeder at redhat.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/lib/AST/ByteCode/Disasm.cpp
    M clang/lib/AST/ByteCode/Function.h
    M clang/lib/AST/ByteCode/Source.h

  Log Message:
  -----------
  [clang][bytecode] Accept current PC argument in Function::dump() (#170449)

This is useful since we can highlight the opcode that OpPC points to.


  Commit: d68f5432532bb2bb641258b9f9236f0eba53c4fd
      https://github.com/llvm/llvm-project/commit/d68f5432532bb2bb641258b9f9236f0eba53c4fd
  Author: Baranov Victor <bar.victor.2002 at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang-tools-extra/clang-tidy/tool/ClangTidyMain.cpp
    M clang-tools-extra/docs/ReleaseNotes.rst

  Log Message:
  -----------
  [clang-tidy] Remove 'clang-analyzer-*' checks from default checks. (#157306)

Closes https://github.com/llvm/llvm-project/issues/146482.


  Commit: 22d354a2f25e3817ab2e9816eff43fc7ad4de472
      https://github.com/llvm/llvm-project/commit/22d354a2f25e3817ab2e9816eff43fc7ad4de472
  Author: Hamza Hassanain <53662962+HamzaHassanain at users.noreply.github.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsX86.td
    M clang/lib/AST/ByteCode/InterpBuiltin.cpp
    M clang/lib/AST/ExprConstant.cpp
    M clang/lib/Headers/avx512fintrin.h
    M clang/lib/Headers/avx512vlintrin.h
    M clang/lib/Headers/avxintrin.h
    M clang/lib/Headers/emmintrin.h
    M clang/test/CodeGen/X86/avx-builtins.c
    M clang/test/CodeGen/X86/avx512f-builtins.c
    M clang/test/CodeGen/X86/avx512vl-builtins.c
    M clang/test/CodeGen/X86/sse2-builtins.c
    A clang/test/SemaCXX/constexpr-x86-avx-builtins.cpp
    A clang/test/SemaCXX/constexpr-x86-avx512f-builtins.cpp
    A clang/test/SemaCXX/constexpr-x86-avx512vl-builtins.cpp
    A clang/test/SemaCXX/constexpr-x86-sse2-builtins.cpp

  Log Message:
  -----------
  [X86][Clang] Support constexpr evaluation of cvtpd2ps intrinsics (#169980)

This patch implements constant evaluation support for the following X86
intrinsics:
- _mm_cvtpd_ps, _mm256_cvtpd_ps (Packed Double to Float)
- _mm_cvtsd_ss (Scalar Double to Float merge)
- Masked variants of the above

It implements the strict "Exact and Finite" rule: conversions that are
inexact, infinite, or NaN are rejected in constexpr contexts.

Fixes #169370


  Commit: e947139f082f16c654e6536a90221e15bc0fc96c
      https://github.com/llvm/llvm-project/commit/e947139f082f16c654e6536a90221e15bc0fc96c
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    A llvm/test/CodeGen/AArch64/sve-fixed-vector-extract-256-bits.ll

  Log Message:
  -----------
  [SDAG] Disable illegal extract_subvector splitting for scalable vectors (#170315)

The "half spanning" legalization of extract_subvector is only valid for
fixed-length vectors. This patch disables it for scalable vectors and
makes more careful use of ElementCount in the lowering.

Fixes regression from https://github.com/llvm/llvm-project/pull/154101,
which was encountered here:
https://github.com/llvm/llvm-project/pull/166748#issuecomment-3600498185

Note: We could optimize this case given the known vscale, but this patch
only attempts to fix the miscompile.


  Commit: e9bda498e6a061354b3a3e97c29b93e775d721d3
      https://github.com/llvm/llvm-project/commit/e9bda498e6a061354b3a3e97c29b93e775d721d3
  Author: Ebuka Ezike <yerimyah1 at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M lldb/source/Plugins/Language/CPlusPlus/CMakeLists.txt
    M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
    M lldb/source/Plugins/Language/CPlusPlus/LibStdcpp.h
    A lldb/source/Plugins/Language/CPlusPlus/LibStdcppSpan.cpp
    M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/span/TestDataFormatterStdSpan.py

  Log Message:
  -----------
  [lldb] add libstdcpp span formatter (#168705)


  Commit: 09efb48991dd86ed6a2db89a3eb126aff7337090
      https://github.com/llvm/llvm-project/commit/09efb48991dd86ed6a2db89a3eb126aff7337090
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/utils/gn/secondary/lldb/source/Plugins/Language/CPlusPlus/BUILD.gn

  Log Message:
  -----------
  [gn build] Port e9bda498e6a0


  Commit: 2e87463603171a61713c9b9c3c07fc90b31a555e
      https://github.com/llvm/llvm-project/commit/2e87463603171a61713c9b9c3c07fc90b31a555e
  Author: Nathan Corbyn <n_corbyn at apple.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/include/clang/Lex/PPCallbacks.h
    M clang/lib/Lex/PPDirectives.cpp
    M clang/unittests/Lex/PPCallbacksTest.cpp

  Log Message:
  -----------
  [Clang] Fix `PPChainedCallbacks::EmbedFileNotFound()` (#170293)

We've had internal test failures since #166188 landed. The root cause is
that `PPChainedCallbacks::EmbedFileNotFound()` incorrectly calls
`PPCallbacks::FileNotFound()` not `PPCallbacks::EmbedFileNotFound()`.


  Commit: 6af1c3f3a927497081d114f202501667cbbf80c2
      https://github.com/llvm/llvm-project/commit/6af1c3f3a927497081d114f202501667cbbf80c2
  Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Analysis/ValueTracking.cpp
    M llvm/test/Transforms/InstCombine/known-bits.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll

  Log Message:
  -----------
  [ValueTracking] Support scalable vector splats in computeKnownBits (#170345)

Similar to https://github.com/llvm/llvm-project/pull/170325, this patch
adds support for scalable vector splats in computeKnownBits.


  Commit: 2fc12754009b835f00dd8b604096b68bad96e3c1
      https://github.com/llvm/llvm-project/commit/2fc12754009b835f00dd8b604096b68bad96e3c1
  Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
    M llvm/test/CodeGen/RISCV/rvv/vmerge-peephole.mir

  Log Message:
  -----------
  [RISCV] Fix corner cases after #170070 (#170438)

There are two fixes:

1. Clear kill flags for `FalseReg` in foldVMergeToMask or we can't
pass the MachineVerifier because of using a killed virtual register.
2. Restrict `lookThruCopies` to only look through COPYs with
one non-debug use.

This was found when backporting #170070 to 21.x branch.


  Commit: 8b94997a475192d0e519d03cf009f5c51d6a389e
      https://github.com/llvm/llvm-project/commit/8b94997a475192d0e519d03cf009f5c51d6a389e
  Author: Charles Zablit <c_zablit at apple.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
    M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp

  Log Message:
  -----------
  [lldb][windows] fix invalid corefile error message (#170471)


  Commit: 00c8e615e30a6f38698b7bb7e426f83abb8b5798
      https://github.com/llvm/llvm-project/commit/00c8e615e30a6f38698b7bb7e426f83abb8b5798
  Author: Lukacma <Marian.Lukac at arm.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    A llvm/test/CodeGen/AArch64/arm64-int-neon.ll
    M llvm/test/CodeGen/AArch64/arm64-vmul.ll
    M llvm/test/CodeGen/AArch64/arm64-vshift.ll

  Log Message:
  -----------
  [AArch64] Add bitcasts for lowering saturating add/sub and shift intrinsics.  (#161840)

This is followup patch to #157680 . In this patch, we are adding
explicit bitcasts to floating-point type when lowering saturating
add/sub and shift NEON scalar intrinsics using SelectionDAG, so they can
be picked up by patterns added in first part of this series. To do that,
we have to create new nodes for these intrinsics, which operate on
floating-point types and wrap them in bitcast nodes.


  Commit: 21d006c4828a2f547e861c23549796834a377d2b
      https://github.com/llvm/llvm-project/commit/21d006c4828a2f547e861c23549796834a377d2b
  Author: Eugene Epshteyn <eepshteyn at nvidia.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M flang/lib/Semantics/resolve-names.cpp
    A flang/test/Semantics/equiv-kind.f90

  Log Message:
  -----------
  [flang] Support kind/index lookup inside of EQUIVALENCE (#170056)

Turn off "in EQUIVALENCE" check for processing of array subscripts,
since subscripts themselves are not part of the EQUIVALENCE.

Fixes #169590


  Commit: cb5362a43329c0e9747e1d63202b00d461db4831
      https://github.com/llvm/llvm-project/commit/cb5362a43329c0e9747e1d63202b00d461db4831
  Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M flang/include/flang/Lower/OpenMP/Clauses.h
    M flang/include/flang/Parser/dump-parse-tree.h
    M flang/include/flang/Parser/parse-tree.h
    M flang/lib/Lower/OpenMP/Clauses.cpp
    M flang/lib/Parser/openmp-parsers.cpp
    M flang/lib/Parser/unparse.cpp
    M flang/test/Parser/OpenMP/fuse-looprange.f90
    M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
    M llvm/include/llvm/Frontend/OpenMP/OMP.td

  Log Message:
  -----------
  [flang][OpenMP] Rename OmpLoopRangeClause to OmpLooprangeClause, NFC (#170370)

The convention is to change spelling from snake_case to UpperCamel, and
use the result as a stem in derived names, e.g.
- spelling is "some_clause" -> stem is SomeClause
- spelling is "someclause" -> stem is Someclause

Member of the OmpClause variant is <stem> itself, e.g. Looprange as in
parser::OmpClause::Looprange.

Specific clause class name is Omp<stem>Clause, e.g. OmpLooprangeClause.


  Commit: f83f6f565f408c8d24ff024146a002f6a1ea77c7
      https://github.com/llvm/llvm-project/commit/f83f6f565f408c8d24ff024146a002f6a1ea77c7
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/utils/lit/tests/lit.cfg
    M llvm/utils/lit/tests/windows-pools.py

  Log Message:
  -----------
  Fix lit testing to support standalone testing (#170365)

To be able to test lit without having a configuration of LLVM, we need
to support invocations that are not going through the lit.site.cfg and
thus don't have a llvm_config set-up.


  Commit: 75c85bafb830e5a7bd7fda13d2648180538ff513
      https://github.com/llvm/llvm-project/commit/75c85bafb830e5a7bd7fda13d2648180538ff513
  Author: sstwcw <su3e8a96kzlver at posteo.net>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/lib/Format/ContinuationIndenter.cpp
    M clang/lib/Format/ContinuationIndenter.h
    M clang/lib/Format/UnwrappedLineFormatter.cpp
    M clang/lib/Format/WhitespaceManager.cpp
    M clang/lib/Format/WhitespaceManager.h
    M clang/unittests/Format/FormatTest.cpp
    M clang/unittests/Format/FormatTestObjC.cpp

  Log Message:
  -----------
  [clang-format] Continue aligned lines without parentheses (#167979)

before, with the options `AlignConsecutiveDeclarations` and
`AlignConsecutiveAssignments` enabled

```C++
veryverylongvariablename = somethingelse;
shortervariablename      = anotherverylonglonglongvariablename + //
                      somevariablethatwastoolongtofitonthesamerow;

double i234 = 0;
auto   v    = false ? type{}
                    : type{
                     1,
                 };
```

after

```C++
veryverylongvariablename = somethingelse;
shortervariablename      = anotherverylonglonglongvariablename + //
                           somevariablethatwastoolongtofitonthesamerow;

double i234 = 0;
auto   v    = false ? type{}
                    : type{
                          1,
                      };
```

Fixes #126873.

Fixes #57612.

Previously, the part for determining whether aligning a line should move
the next line relied on having a pair of tokens such as parentheses
surrounding both lines. There are often no such tokens. For example in
the first block above. This patch removes the requirement for those
tokens.

Now the program keeps track of how the position is calculated. The
alignment step moves the next line if its position is based on a column
to the right of the token that gets aligned.

The column that the position of the line is based on is more detailed
than the `IsAligned` property that the program used before this patch.
It enables the program to handle cases where parts that should not
usually move with the previous line and parts that should are nested
like in the second block above. That is why the patch uses it instead of
fake parentheses.


  Commit: be3204a59d53f1e44080b99813fb69db0672b5d1
      https://github.com/llvm/llvm-project/commit/be3204a59d53f1e44080b99813fb69db0672b5d1
  Author: sstwcw <su3e8a96kzlver at posteo.net>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/lib/Format/FormatTokenLexer.cpp
    M clang/unittests/Format/FormatTestVerilog.cpp
    M clang/unittests/Format/TokenAnnotatorTest.cpp

  Log Message:
  -----------
  [clang-format] Ignore C++ keywords when formatting Verilog (#167984)

In the sample below, the `private` identifier is the name of the type,
and the `try` identifier is the name of the variable.

new

```SystemVerilog
begin
  private try;
end
```

old

```SystemVerilog
begin
private
  try
    ;
end
```


  Commit: b1d06058a39579cfc6ea48c496a1f63f023c5cb5
      https://github.com/llvm/llvm-project/commit/b1d06058a39579cfc6ea48c496a1f63f023c5cb5
  Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/include/clang/AST/Decl.h
    M clang/lib/Parse/Parser.cpp
    M clang/lib/Sema/SemaDecl.cpp
    A clang/test/FixIt/fixit-cxx0x-attributes.cpp

  Log Message:
  -----------
  [Clang] adjust caret placement for the suggested attribute location for enum class (#168092)

Fixes #163224

---

This patch addresses the issue by correcting the caret insertion
location for attributes incorrectly positioned before an enum. The
location is now derived from the associated `EnumDecl`: for named enums,
the attribute is placed before the identifier, while for anonymous enum
definitions, it is placed before the opening brace, with a fallback to
the semicolon when no brace is present.

For example:

```cpp
  [[nodiscard]] enum class E1 {};
```

is now suggested as:

```cpp
  enum class [[nodiscard]] E1 {};
```


  Commit: 045331e4a035fa5dd4e91db03c5c7d6335443c03
      https://github.com/llvm/llvm-project/commit/045331e4a035fa5dd4e91db03c5c7d6335443c03
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M mlir/unittests/IR/SymbolTableTest.cpp

  Log Message:
  -----------
  [MLIR] Apply clang-tidy fixes for performance-unnecessary-value-param in SymbolTableTest.cpp (NFC)


  Commit: 45b697e610fd24b4114d78f9d7819fa5e9461371
      https://github.com/llvm/llvm-project/commit/45b697e610fd24b4114d78f9d7819fa5e9461371
  Author: Björn Pettersson <bjorn.a.pettersson at ericsson.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Analysis/MemoryBuiltins.cpp
    M llvm/test/Transforms/LowerConstantIntrinsics/builtin-object-size-idxsize.ll

  Log Message:
  -----------
  [MemoryBuiltins] Consider index type size when aggregating gep offsets (#132365)

[MemoryBuiltins] Consider index type size when aggregating gep offsets
Main goal here is to fix some bugs seen with LowerConstantIntrinsics
pass and the lowering of llvm.objectsize.

In ObjectSizeOffsetVisitor::computeImpl we are using an external
analysis together with stripAndAccumulateConstantOffsets. The idea
is to compute the Min/Max value of individual offsets within a GEP.
The bug solved here is that when doing the Min/Max comparisons the
external analysis wasn't considering the index type size (given by
the data layout), it was simply using the type from the IR. Since a
GEP is defined as sext/truncating indices we need to consider the
index type size in the external analysis.

This solves a regression (false ubsan warnings) seen after commit

https://github.com/llvm/llvm-project/commit/02b8ee281947f6cb39c7eb3c4bbba59322e9015b
(https://github.com/llvm/llvm-project/pull/117849).


  Commit: 4c09e45f1d54730bd1e50efdca8df5c768558376
      https://github.com/llvm/llvm-project/commit/4c09e45f1d54730bd1e50efdca8df5c768558376
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp

  Log Message:
  -----------
  [MLIR] Apply clang-tidy fixes for llvm-qualified-auto in OpenMPToLLVMIRTranslation.cpp (NFC)


  Commit: 5ab8c3a590681b557b117827f8cfcded6dd72015
      https://github.com/llvm/llvm-project/commit/5ab8c3a590681b557b117827f8cfcded6dd72015
  Author: Sohaib Iftikhar <sohaib1692 at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel

  Log Message:
  -----------
  [LLDB|BUILD] Fix for c50802cb (#170484)

Fix after #170236


  Commit: d0f5a49fb6f3604dbb7d6692ad0f81ed1cdf3a86
      https://github.com/llvm/llvm-project/commit/d0f5a49fb6f3604dbb7d6692ad0f81ed1cdf3a86
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/include/llvm/Support/DebugCounter.h
    M llvm/lib/Support/DebugCounter.cpp
    M llvm/test/Analysis/ValueTracking/assume-queries-counter.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/counter-fallback.ll
    M llvm/test/CodeGen/AMDGPU/waitcnt-debug.mir
    M llvm/test/CodeGen/NVPTX/param-add.ll
    M llvm/test/CodeGen/PowerPC/peephole-counter-XToI.mir
    M llvm/test/CodeGen/X86/dag-combine-counter.ll
    M llvm/test/CodeGen/X86/pr114360.ll
    M llvm/test/Other/X86/debugcounter-divrempairs.ll
    M llvm/test/Other/X86/debugcounter-partiallyinlinelibcalls.ll
    M llvm/test/Other/debugcounter-dce.ll
    M llvm/test/Other/debugcounter-earlycse.ll
    M llvm/test/Other/debugcounter-newgvn.ll
    M llvm/test/Other/debugcounter-predicateinfo.ll
    M llvm/test/Other/debugcounter-slsr.ll
    M llvm/test/Other/print-debug-counter.ll
    M llvm/test/Transforms/DeadStoreElimination/debug-counter.ll
    M llvm/test/Transforms/SLPVectorizer/X86/debug-counter.ll
    M llvm/test/Transforms/Util/assume-builder-counter.ll
    M llvm/test/Transforms/WholeProgramDevirt/calls-to-devirt.ll

  Log Message:
  -----------
  [Support] Support debug counters in non-assertion builds (#170468)

This enables the use of debug counters in (non-assertion) release
builds. This is useful to enable debugging without having to switch to
an assertion-enabled build, which may not always be easy.

After some recent improvements, always supporting debug counters no
longer has measurable overhead.


  Commit: c128fd9bebf7d281ac7cf12d8258573e8928672b
      https://github.com/llvm/llvm-project/commit/c128fd9bebf7d281ac7cf12d8258573e8928672b
  Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/include/clang/Lex/Token.h
    M clang/lib/Parse/ParseTentative.cpp
    A clang/test/Parser/cxx-nested-name-spec.cpp

  Log Message:
  -----------
  [Clang] prevent crash on invalid nested name specifiers with a single colon (#169246)

Fixes #167905

--- 

This patch addresses an issue where invalid nested name specifier
sequences containing a single colon (`a:c::`) could be treated during
recovery as valid scope specifiers, which in turn led to a crash


https://github.com/llvm/llvm-project/blob/c543615744d61e0967b956c402e310946d741570/clang/lib/Parse/ParseExprCXX.cpp#L404-L418


For malformed inputs like `a:c::`, the single colon recovery incorrectly
triggers and produces an `annot_cxxscope`. When tentative parsing later
runs


https://github.com/llvm/llvm-project/blob/996213c6ea0dc2e47624c6b06c0833a882c1c1f7/clang/lib/Parse/ParseTentative.cpp#L1739-L1740

the classifier returns `Ambiguous`, which doesn't stop parsing. The
parser then enters the


https://github.com/llvm/llvm-project/blob/996213c6ea0dc2e47624c6b06c0833a882c1c1f7/clang/lib/Parse/ParseTentative.cpp#L1750-L1752

and consumes the invalid scope annotation, eventually reaching `EOF` and
crashing.


  Commit: ccd4e7b1ed3858c64b4667787929b939513bc929
      https://github.com/llvm/llvm-project/commit/ccd4e7b1ed3858c64b4667787929b939513bc929
  Author: John Brawn <john.brawn at arm.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
    M llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions-predicated-scalable.ll
    A llvm/test/Transforms/LoopStrengthReduce/AArch64/non-cmp-cond.ll

  Log Message:
  -----------
  [LSR] Make OptimizeLoopTermCond able to handle some non-cmp conditions (#165590)

Currently OptimizeLoopTermCond can only convert a cmp instruction to
using a postincrement induction variable, which means it can't handle
predicated loops where the termination condition comes from
get_active_lane_mask. Relax this restriction so that we can handle any
kind of instruction, though only if it's the instruction immediately
before the branch (except for possibly an extractelement).


  Commit: 267865a7b54dd84dc22f147623ec281d34bf7a3f
      https://github.com/llvm/llvm-project/commit/267865a7b54dd84dc22f147623ec281d34bf7a3f
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/include/llvm/Analysis/ScalarEvolution.h
    M llvm/lib/Analysis/ScalarEvolution.cpp

  Log Message:
  -----------
  [SCEV] Factor out utility for proving same sign of two SCEVs [nfc] (#170376)

This is a slightly different API than ConstantRange's
areInsensitiveToSignednessOfICmpPredicate. The only actual difference
(beyond naming) is the handling of empty ranges (i.e. unreachable code).
I wanted to keep the existing SCEV behavior for the unreachable code as
we should be folding that to poison, not reasoning about samesign. I
tried the other variant locally, and saw no test changes.


  Commit: eb7db0b9ecceed9719f841cc789ecaa6d5c9aaef
      https://github.com/llvm/llvm-project/commit/eb7db0b9ecceed9719f841cc789ecaa6d5c9aaef
  Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
    M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
    M mlir/test/Dialect/XeGPU/subgroup-distribute.mlir
    M mlir/test/Dialect/XeGPU/xegpu-attr-interface.mlir
    M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
    M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
    M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
    M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir

  Log Message:
  -----------
  [mlir][xegpu] Change `index` arithmetic ops to `arith` ops. (#170390)

Index ops cause some issues during SIMT distribution because they don't
have the `Elementwise` mappable trait. This PR replaces all index
arithmetic ops with matching `arith` dialect ops.


  Commit: 58d74febfa3958f7d870c9dca35eb20264c211e8
      https://github.com/llvm/llvm-project/commit/58d74febfa3958f7d870c9dca35eb20264c211e8
  Author: Bertik23 <39457484+Bertik23 at users.noreply.github.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/include/llvm/Support/LSP/Protocol.h
    M llvm/lib/Support/LSP/Protocol.cpp

  Log Message:
  -----------
  [SupportLSP] Add ShowMessageParams (#164626)

Adds ShowMessageParams to LSP support according to the [LSP
specification](https://microsoft.github.io/language-server-protocol/specifications/lsp/3.17/specification/#showMessageRequestParams).


  Commit: bd21095d8ba0bff04f5718096601638ecf9270db
      https://github.com/llvm/llvm-project/commit/bd21095d8ba0bff04f5718096601638ecf9270db
  Author: Hongyu Chen <xxs_chy at outlook.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/CodeGen/MachineBasicBlock.cpp
    A llvm/test/CodeGen/NVPTX/switch-loop-header.mir
    A llvm/test/CodeGen/NVPTX/switch.ll

  Log Message:
  -----------
  [MachineBasicBlock] Don't split loop header successor if the terminator is unanalyzable (#170146)

Fixes https://github.com/llvm/llvm-project/issues/170051
The previous implementation allows splitting the successor if it's the
loop header, regardless of whether the terminator of `this` is
analyzable.


  Commit: ec6a15f84db135186f5075e15146c7f2ec532d3a
      https://github.com/llvm/llvm-project/commit/ec6a15f84db135186f5075e15146c7f2ec532d3a
  Author: Folkert de Vries <folkert at folkertdev.nl>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/masked_store_trunc_ssat.ll
    M llvm/test/CodeGen/X86/masked_store_trunc_usat.ll

  Log Message:
  -----------
  [X86] optimize masked truncated saturating stores (#169827)

Combine the saturating operation into the masked truncating store.

https://godbolt.org/z/n1YfavKP6

```asm
_mm256_mask_cvtusepi16_storeu_epi8_manual: # @_mm256_mask_cvtusepi16_storeu_epi8_manual
        kmovd   k1, esi
        vmovdqa ymm0, ymmword ptr [rdx]
        vpminuw ymm0, ymm0, ymmword ptr [rip + .LCPI0_0]
        vpmovwb xmmword ptr [rdi] {k1}, ymm0
        vzeroupper
        ret
_mm256_mask_cvtusepi16_storeu_epi8_intrinsic: # @_mm256_mask_cvtusepi16_storeu_epi8_intrinsic
        kmovd   k1, esi
        vmovdqa ymm0, ymmword ptr [rdx]
        vpmovuswb       xmmword ptr [rdi] {k1}, ymm0
        vzeroupper
        ret
```


  Commit: c752bb9203954ebb2c6032d462e020fbbad4757e
      https://github.com/llvm/llvm-project/commit/c752bb9203954ebb2c6032d462e020fbbad4757e
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
    M llvm/test/Analysis/ScalarEvolution/pr44605.ll
    M llvm/test/Transforms/IndVarSimplify/AArch64/widen-loop-comp.ll
    M llvm/test/Transforms/IndVarSimplify/ARM/code-size.ll
    M llvm/test/Transforms/IndVarSimplify/ARM/indvar-unroll-imm-cost.ll
    M llvm/test/Transforms/IndVarSimplify/X86/eliminate-trunc.ll
    M llvm/test/Transforms/IndVarSimplify/X86/pr59615.ll
    M llvm/test/Transforms/IndVarSimplify/backedge-on-min-max.ll
    M llvm/test/Transforms/IndVarSimplify/canonicalize-cmp.ll
    M llvm/test/Transforms/IndVarSimplify/constant_result.ll
    M llvm/test/Transforms/IndVarSimplify/cycled_phis.ll
    M llvm/test/Transforms/IndVarSimplify/eliminate-exit.ll
    M llvm/test/Transforms/IndVarSimplify/exit_value_tests.ll
    M llvm/test/Transforms/IndVarSimplify/floating-point-small-iv.ll
    M llvm/test/Transforms/IndVarSimplify/invalidate-modified-lcssa-phi.ll
    M llvm/test/Transforms/IndVarSimplify/loop-predication.ll
    M llvm/test/Transforms/IndVarSimplify/negative_ranges.ll
    M llvm/test/Transforms/IndVarSimplify/post-inc-range.ll
    M llvm/test/Transforms/IndVarSimplify/pr38674.ll
    M llvm/test/Transforms/IndVarSimplify/pr39673.ll
    M llvm/test/Transforms/IndVarSimplify/pr56242.ll
    M llvm/test/Transforms/IndVarSimplify/pr57247.ll
    M llvm/test/Transforms/IndVarSimplify/pr62992.ll
    M llvm/test/Transforms/IndVarSimplify/sharpen-range.ll
    M llvm/test/Transforms/IndVarSimplify/shift-range-checks.ll
    M llvm/test/Transforms/IndVarSimplify/simplify-pointer-arithmetic.ll
    M llvm/test/Transforms/IndVarSimplify/skip-predication-convergence.ll
    M llvm/test/Transforms/IndVarSimplify/skip-predication-nested-convergence.ll
    M llvm/test/Transforms/IndVarSimplify/turn-to-invariant.ll
    M llvm/test/Transforms/IndVarSimplify/widen-nonnegative-countdown.ll
    M llvm/test/Transforms/LoopDistribute/laa-invalidation.ll
    M llvm/test/Transforms/LoopUnroll/peel-multiple-unreachable-exits.ll
    M llvm/test/Transforms/LoopUnroll/peel-to-turn-invariant-accesses-dereferenceable.ll
    M llvm/test/Transforms/LoopUnroll/runtime-loop-multiexit-dom-verify.ll
    M llvm/test/Transforms/LoopUnroll/runtime-loop-multiple-exits.ll
    M llvm/test/Transforms/LoopUnroll/unroll-header-exiting-with-phis.ll

  Log Message:
  -----------
  [IndVars] Strengthen inference of samesign flags (#170363)

When reviewing another change, I noticed that we were failing to infer
samsign for two cases: 1) an unsigned comparison, and 2) when both
arguments were known negative.

Using CVP and InstCombine as a reference, we need to be careful to not
allow eq/ne comparisons. I'm a bit unclear on the why of that, and for
now am going with the low risk change. I may return to investigate that
in a follow up.

Compile time results look like noise to me, see:
https://llvm-compile-time-tracker.com/compare.php?from=49a978712893fcf9e5f40ac488315d029cf15d3d&to=2ddb263604fd7d538e09dc1f805ebc30eb3ffab0&stat=instructions:u


  Commit: 9f9e15f71553a2cfad040b87cb8e9a3ab5bee808
      https://github.com/llvm/llvm-project/commit/9f9e15f71553a2cfad040b87cb8e9a3ab5bee808
  Author: Amr Hesham <amr96 at programmer.net>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
    A clang/test/CIR/CodeGen/size-of-vla.cpp

  Log Message:
  -----------
  [CIR] Upstream SizeOf for VariableArrayType (#169993)

Upstream SizeOf support for VariableArrayType


  Commit: 836935197b8ff38459bb86c5aa592ef018311250
      https://github.com/llvm/llvm-project/commit/836935197b8ff38459bb86c5aa592ef018311250
  Author: Tarun Prabhu <tarun at lanl.gov>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M flang/docs/ReleaseNotes.md
    M flang/docs/ReleaseNotesTemplate.txt
    M flang/docs/conf.py

  Log Message:
  -----------
  [flang][docs] Fix title and text in the release notes page

The title of the release notes page always showed "|version|
(In-Progress)". This has been fixed so the release version is shown as
expected. '(In-Progress)' is now only shown on non-release branches.
Unlike clang, flang does not use ${LLVM_VERSION_SUFFIX}, so even on
non-release branches the 'git' suffix will not be shown.


  Commit: 838ad0efbf57dfcd6c42c2c5497b30f26492e925
      https://github.com/llvm/llvm-project/commit/838ad0efbf57dfcd6c42c2c5497b30f26492e925
  Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/vector-alloca-atomic.ll
    M llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll

  Log Message:
  -----------
  AMDGPU: Generalize and normalize some tests to avoid future churn (#170508)


  Commit: 0ffabf4d084ffb40345c4660c2182b7067475df5
      https://github.com/llvm/llvm-project/commit/0ffabf4d084ffb40345c4660c2182b7067475df5
  Author: Jan Svoboda <jan_svoboda at apple.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/include/clang/Tooling/DependencyScanning/DependencyScanningWorker.h
    M clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.cpp
    M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp

  Log Message:
  -----------
  [clang][deps] Use the caching VFS even in the 'preprocess' mode (#168970)

The dependency scanner worker's VFS originally unconditionally did two
things: file system access caching and dependency directives extraction.
That's why `clang-scan-deps -mode preprocess` avoided using the VFS
entirely. Since then, the dependency directives extraction was made
lazy/on-demand/optional, meaning it should be possible to use only the
caching parts of the VFS. This PR does exactly that, speeding up
`clang-scan-deps -mode preprocess` on my config of Clang/LLVM from ~80s
to ~38s. (For comparison, `clang-scan-deps -mode
preprocess-dependency-directives` runs in ~13s.)

(The real motivation was to simplify the VFS handling in the scanner,
this is just a nice side-effect.)


  Commit: d18d53fda8755a6f29be00b9bf0a6672a85dd444
      https://github.com/llvm/llvm-project/commit/d18d53fda8755a6f29be00b9bf0a6672a85dd444
  Author: Sebastian Pop <spop at nvidia.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    A llvm/test/Analysis/DependenceAnalysis/PR148435.ll
    A llvm/test/Analysis/DependenceAnalysis/bounds-check.ll
    A llvm/test/Analysis/DependenceAnalysis/wrapping-addrec-1.ll
    A llvm/test/Analysis/DependenceAnalysis/wrapping-addrec.ll

  Log Message:
  -----------
  [DA] add testcases for bug #148435 (#154980)

Add regression tests from issue #148435 .


  Commit: 93832466cc40c142eb39d96876f98b49927c255b
      https://github.com/llvm/llvm-project/commit/93832466cc40c142eb39d96876f98b49927c255b
  Author: Sebastian Pop <spop at nvidia.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/include/llvm/Analysis/DependenceAnalysis.h
    M llvm/include/llvm/Analysis/ScalarEvolution.h
    M llvm/lib/Analysis/DependenceAnalysis.cpp
    M llvm/test/Analysis/DependenceAnalysis/DADelin.ll
    M llvm/test/Analysis/DependenceAnalysis/DifferentOffsets.ll
    M llvm/test/Analysis/DependenceAnalysis/MIVCheckConst.ll
    M llvm/test/Analysis/DependenceAnalysis/StrongSIV.ll
    M llvm/test/Analysis/DependenceAnalysis/SymbolicSIV.ll
    M llvm/test/Analysis/DependenceAnalysis/WeakCrossingSIV.ll
    M llvm/test/Analysis/DependenceAnalysis/WeakZeroDstSIV.ll
    M llvm/test/Analysis/DependenceAnalysis/WeakZeroSrcSIV.ll
    M llvm/test/Analysis/DependenceAnalysis/becount-couldnotcompute.ll
    M llvm/test/Analysis/DependenceAnalysis/compute-absolute-value.ll
    M llvm/test/Analysis/DependenceAnalysis/gcd-miv-overflow.ll
    M llvm/test/Analysis/DependenceAnalysis/monotonicity-cast.ll
    A llvm/test/Analysis/DependenceAnalysis/zero-coefficient.ll

  Log Message:
  -----------
  [DA] Fix zero coeff bug in Strong SIV test with runtime assumptions (#149991) (#155037)

Fix GitHub issue #149991 where Strong SIV test incorrectly concludes
'none!' for symbolic coefficients that could be zero, leading to 0/0
undef behavior.

The Strong SIV test was incorrectly concluding "no dependence" when the
coefficient is symbolic and the delta (difference between source and
destination) is zero.

When delta=0, the Strong SIV test divides delta/coeff to get the
distance.
The bug occurs when coeff is an unknown symbolic value: if coeff=0 at
runtime,
then 0/0 is undefined and all iterations access the same memory
location,
creating a true dependence that was being missed.


  Commit: 70dd63b7804255daba4154c7cc5061c1072923f7
      https://github.com/llvm/llvm-project/commit/70dd63b7804255daba4154c7cc5061c1072923f7
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVFeatures.td

  Log Message:
  -----------
  [RISCV] Move tuning features below non-tuning features. Put CPU family in their own section. NFC (#170352)

We had 4 features after all the tuning features, but there didn't seem
to be particular reason for it.

Put the CPU family tuning features in their own section after the tuning
features instead of in the middle.


  Commit: c379f7cc0151fdf39cca8bfaf65e701308c77de0
      https://github.com/llvm/llvm-project/commit/c379f7cc0151fdf39cca8bfaf65e701308c77de0
  Author: Sang Ik Lee <sang.ik.lee at intel.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    A mlir/test/Integration/Dialect/XeGPU/LANE/load_store_subview.mlir

  Log Message:
  -----------
  [MLIR][XeGPU] Add integration with XeGPU load / store ops to / from memref subview. (#170385)

Add XeGPU integration test for missing usage case: base memory from
memref subview.


  Commit: bd4c21b3c8a897e5ca467134d26ec6d831c8087a
      https://github.com/llvm/llvm-project/commit/bd4c21b3c8a897e5ca467134d26ec6d831c8087a
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp

  Log Message:
  -----------
  [MLIR] Apply clang-tidy fixes for performance-move-const-arg in NVGPUTransformOps.cpp (NFC)


  Commit: 817ab49ece9b0ccafd9a01ad7bd910c102f161c2
      https://github.com/llvm/llvm-project/commit/817ab49ece9b0ccafd9a01ad7bd910c102f161c2
  Author: Andy Kaylor <akaylor at nvidia.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/include/clang/CIR/MissingFeatures.h
    M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
    A clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
    M clang/lib/CIR/CodeGen/CIRGenFunction.h
    M clang/lib/CIR/CodeGen/CMakeLists.txt

  Log Message:
  -----------
  [CIR][NFC] Add infrastructure for AArch64 builtins (#170386)

This change adds the basic code structure for handling AArch64 builtins.
The structure of this code is brought over from classic codegen to make
implementing missing builtins easier. In some cases, the handling
involved too much logic for a simple NFC change, so those parts were
replaced with a MissingFeature assert.

The actual handling for all builtins is left for later changes.


  Commit: 14ed98271bb55cfb72ba1045fb1dec6c285a7456
      https://github.com/llvm/llvm-project/commit/14ed98271bb55cfb72ba1045fb1dec6c285a7456
  Author: Charles Zablit <c_zablit at apple.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M lldb/include/lldb/Host/windows/ProcessLauncherWindows.h
    M lldb/source/Host/windows/ProcessLauncherWindows.cpp

  Log Message:
  -----------
  [NFC][lldb][windows] refactor the creation of inherited handles (#170301)

Co-authored-by: Saleem Abdulrasool <compnerd at compnerd.org>


  Commit: 8d6c5cddf245d652bb2badc065848d280ef8aa9f
      https://github.com/llvm/llvm-project/commit/8d6c5cddf245d652bb2badc065848d280ef8aa9f
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

  Log Message:
  -----------
  DAG: Use LibcallImpl in various getLibFunc helpers (#170400)

Avoid using getLibcallName in favor of querying the
libcall impl, and getting the ABI details from that.


  Commit: cdb501064f35dbe5a1d49721daf59eca261057e9
      https://github.com/llvm/llvm-project/commit/cdb501064f35dbe5a1d49721daf59eca261057e9
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

  Log Message:
  -----------
  DAG: Avoid more uses of getLibcallName (#170402)


  Commit: 540fd18568deb299a35b009d34ce32f96e3944bd
      https://github.com/llvm/llvm-project/commit/540fd18568deb299a35b009d34ce32f96e3944bd
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

  Log Message:
  -----------
  DAG: Avoid using getLibcallName when looking for a divrem call (#170413)

Also introduce an error if it's not available, which is not yet
testable.


  Commit: 94232f9f560f84d2ae7f50b2d1df5bc26b2ce69e
      https://github.com/llvm/llvm-project/commit/94232f9f560f84d2ae7f50b2d1df5bc26b2ce69e
  Author: Jan André Reuter <j.reuter at fz-juelich.de>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M openmp/runtime/src/kmp_csupport.cpp

  Log Message:
  -----------
  [OpenMP][OMPT] Use global thread id for `codeptr_ra` in `end_critical` (#169826)

When a critical construct has finished, it will trigger a
critical-released event. If a tool is attached, and the `mutex_released`
callback was registered, the tool with receive an event containing the
`codeptr_ra`, the return address of the callback invocation.

All the way back in 82e94a593433f36734e2d34898d353a2ecb65b8b, this
`codeptr_ra` was implemented by calling `__ompt_load_return_address`
with a fixed global thread id of `0`. However, this approach results in
a race-condition, and can yield incorrect results to the tool.

`__ompt_load_return_address(0)` points to the current return address of
the thread 0 in `__kmp_threads`. This thread may already execute some
other construct. A tool might therefore receive the return address of
e.g. some `libomp` internals, or other parts of the user code.
Additionally, a call to `__ompt_load_return_address` resets the
`th.ompt_thread_info.return_address` to `NULL`, therefore also affecting
the return address of thread 0. Another dispatched event, e.g.
parallel-begin might therefore not transfer any `codeptr_ra`.

To fix this, replace the fixed thread id by the `global_tid`, which is
stored just before dispatching the `mutex_released` callback.

Signed-off-by: Jan André Reuter <j.reuter at fz-juelich.de>


  Commit: 0006cd694f8640cb3820d16c9d49d1155b06cda6
      https://github.com/llvm/llvm-project/commit/0006cd694f8640cb3820d16c9d49d1155b06cda6
  Author: Jasmine Tang <jjasmine at igalia.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
    M clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c

  Log Message:
  -----------
  [CIR] Upstream builtin scatter from ClangIR incubator (#170353)

Part of [#167752](https://github.com/llvm/llvm-project/issues/167752)


  Commit: 63ea3537d55f75be0d6fb92aef16465b291fa9ed
      https://github.com/llvm/llvm-project/commit/63ea3537d55f75be0d6fb92aef16465b291fa9ed
  Author: Nathan Corbyn <n_corbyn at apple.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M libunwind/test/bad_unwind_info.pass.cpp
    M libunwind/test/eh_frame_fde_pc_range.pass.cpp
    M libunwind/test/remember_state_leak.pass.sh.s
    M libunwind/test/signal_unwind.pass.cpp
    M libunwind/test/unwind_leaffunction.pass.cpp

  Log Message:
  -----------
  [libunwind](TestOnly) Mark failing tests as unsupported on Apple targets (#170488)

#167642 introduced a number of test failures on one of our stage 2
builds:
https://ci.swift.org/job/llvm.org/job/clang-stage2-Rthinlto/1403/. This
PR marks these tests as unsupported on `.*-apple.*` targets.


  Commit: 2221f4a06ec2409f7396ce4408442f115aca1ae0
      https://github.com/llvm/llvm-project/commit/2221f4a06ec2409f7396ce4408442f115aca1ae0
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/vopd-combine-gfx1250.mir

  Log Message:
  -----------
  [AMDGPU] Add a RUN line to check VGPR MSBs for VOPD pairs (#170494)

Some tests were added in #157168. This patch makes failures more obvious
because they will hit an "Invalid VOPD pair was created" assertion
during VGPR lowering.


  Commit: a8ccd42ab23af6848929a638cd6b099953c7e491
      https://github.com/llvm/llvm-project/commit/a8ccd42ab23af6848929a638cd6b099953c7e491
  Author: Tom Stellard <tstellar at redhat.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M .github/workflows/release-sources.yml
    A .github/workflows/upload-release-artifact/action.yml

  Log Message:
  -----------
  workflows: Factor out artifact attestation and upload into a composite action (#169621)

Also, switch the release-sources workflow over to use this new action.
As a result of this change, the attestation file for the sources will be
renamed from attestation.jsonl to $TAG-sources-attestation.jsonl.


  Commit: 106edbdabef8bcd914ec1720f7fa6adb07aa4e6b
      https://github.com/llvm/llvm-project/commit/106edbdabef8bcd914ec1720f7fa6adb07aa4e6b
  Author: Jacob Lalonde <jalalonde at fb.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M lldb/include/lldb/Target/TargetList.h
    M lldb/source/Target/TargetList.cpp

  Log Message:
  -----------
  [LLDB] Fix deadlock in module callback when running in parallel (#168425)

When the target is being created, the target list acquires the mutex for
the duration of the target creation process. However if a module
callback is enabled and is being called in parallel there exists an
opportunity to deadlock if the callback calls into targetlist. I've
created a minimum repro
[here](https://gist.github.com/Jlalond/2557e06fa09825f338eca08b1d21884f).

```
command script import dead-lock-example (from above gist)
...
target create a.out
[hangs]
```

This looks like a straight forward fix, where `CreateTargetInternal`
doesn't access any state directly, and instead calls methods which they
themselves are thread-safe. So I've moved the lock to when we update the
list with the created target. I'm not sure if this is a comprehensive
fix, but it does fix my above example and in my (albeit limited)
testing, doesn't cause any strange change in behavior.


  Commit: 7c33b8247d7ed0f8ff0e5ac8cc899ca3d6f8d183
      https://github.com/llvm/llvm-project/commit/7c33b8247d7ed0f8ff0e5ac8cc899ca3d6f8d183
  Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M flang/lib/Semantics/check-omp-loop.cpp
    M flang/lib/Semantics/check-omp-structure.cpp

  Log Message:
  -----------
  [flang][OpenMP] Move two functions to check-omp-loop.cpp, NFC (#170526)

These are checks for clauses that apply to loop constructs.


  Commit: 907c94b3c2cc271a06afe9fe149d954578188c31
      https://github.com/llvm/llvm-project/commit/907c94b3c2cc271a06afe9fe149d954578188c31
  Author: Medha Tiwari <75640645+medhatiwari at users.noreply.github.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsX86.td
    M clang/lib/AST/ByteCode/InterpBuiltin.cpp
    M clang/lib/AST/ExprConstant.cpp
    M clang/test/CodeGen/X86/avx512bw-builtins.c
    M clang/test/CodeGen/X86/avx512dq-builtins.c
    M clang/test/CodeGen/X86/avx512f-builtins.c

  Log Message:
  -----------
  [X86][Clang] Add constexpr support for AVX512 kshift intrinsics (#170480)

Add AVX512 kshiftli/kshiftri mask intrinsics to be used in constexpr.

Enables constexpr evaluation for:
- `_kshiftli_mask8/16/32/64`
- `_kshiftri_mask8/16/32/64`

Fixes #162056


  Commit: c2472be3fb359e640587f84ea668c98a2d86888b
      https://github.com/llvm/llvm-project/commit/c2472be3fb359e640587f84ea668c98a2d86888b
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
    M llvm/test/Transforms/VectorCombine/X86/shuffle-of-fma-const.ll

  Log Message:
  -----------
  [VectorCombine][X86] foldShuffleOfIntrinsics - provide the arguments to a getShuffleCost call (#170465)

Ensure the arguments are passed to the getShuffleCost calls to improve
cost analysis, in particular if these are constant the costs will be
recognised as free

Noticed while reviewing #170052


  Commit: 4ca61f56619c6ed2e4a1113682503bdb3da79b35
      https://github.com/llvm/llvm-project/commit/4ca61f56619c6ed2e4a1113682503bdb3da79b35
  Author: Yonah Goldberg <ygoldberg at nvidia.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Scalar/SROA.cpp

  Log Message:
  -----------
  [NFC][SROA] Clean up rewritePartition type selection process (#169106)

This change reverts
https://github.com/llvm/llvm-project/commit/257251247a267c3fa30fdeef17ffa4987d8a52e5,
which landed on Aug 8, 2022. This change addressed the problem that if
you have IR that looks something like:

```
%alloca = alloca <4 x float>
store <4 x float> %data, ptr %alloca
%load = load half, ptr %alloca
```

`getCommonType` would return `<4 x float>` because the `load half` isn't
to the entire partition, so we skip the first `getTypePartition` check.
https://github.com/llvm/llvm-project/commit/257251247a267c3fa30fdeef17ffa4987d8a52e5
added a later check that sees that `<4 x float>` is not vector
promotable because of the `load half`, and then calls
`getTypePartition`, which changes the `sliceTy` to `< 8 x half>`, which
is vector promotable because the store can be changed to `store <8 x
half>`. So we set the `sliceTy` to `<8 x half>`, we can promote the
alloca, and everyone is happy.

This code became unnecessary after
https://github.com/llvm/llvm-project/commit/529eafd9beff233ba8debfc73e0b5c04cac36835,
which landed ~3 months later, which fixes the issue in a different way.
`isVectorPromotionViable` was already smart enough to try `<8 x half>`
as a type candidate because it sees the `load half`. However, this
candidate didn't work because it conflicts with `store <4 x float>`.
This commit added logic to try integer-ifying candidates if there is no
common type. So the `<8 x half>` candidate gets converted to `<8 x
i16>`, which works because we can convert the alloca to `alloca <8 x
i16>` and the load to `load i16`, allowing promotion.

After
https://github.com/llvm/llvm-project/commit/529eafd9beff233ba8debfc73e0b5c04cac36835,
the original commit is pointless. It tries to refine the `SliceTy`, but
if `isVectorPromotionViable` succeeds, it returns a new type to use and
we will ignore the `SliceTy`.

This change is my first patch to try to simplify the type selection
process in rewritePartition. I had some other ideas that I tried in
https://github.com/llvm/llvm-project/pull/167771 and
https://github.com/llvm/llvm-project/pull/168796, but they need
refinement.


  Commit: 33a80a7d8e34b4448f7a3af64ba1ec3a56c1e553
      https://github.com/llvm/llvm-project/commit/33a80a7d8e34b4448f7a3af64ba1ec3a56c1e553
  Author: Charles Zablit <c_zablit at apple.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M lldb/source/Host/windows/ProcessLauncherWindows.cpp

  Log Message:
  -----------
  [lldb][windows] fix a use before allocation crash (#170530)


  Commit: d7cc82b9c53fa03dd25f7ae9b8f07871a89e7b56
      https://github.com/llvm/llvm-project/commit/d7cc82b9c53fa03dd25f7ae9b8f07871a89e7b56
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Utils/SimplifyIndVar.cpp

  Log Message:
  -----------
  [IndVars] Split NumElimCmp statistic into three pieces (#170514)

Only one of the three update paths actual eliminates the comparison.

While here, use early return to clarify the code structure.


  Commit: bdf90227abd55b24821b126a50ab89e49a39a2b5
      https://github.com/llvm/llvm-project/commit/bdf90227abd55b24821b126a50ab89e49a39a2b5
  Author: Jason Rice <ricejasonf at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M mlir/test/lib/Dialect/Test/TestOpDefs.cpp
    M mlir/test/lib/Dialect/Test/TestOps.td

  Log Message:
  -----------
  [MLIR] Test generated build functions with move-only parameter types (#170391)

This adds a test of the MLIR TableGen `OpBuilder` syntax with move-only
parameters types. Additionally, an overload is added to test defining a
builder outside of the TableGen interface.


  Commit: d041d5d4e07ba0eddd5120efd66520b3984a2b9b
      https://github.com/llvm/llvm-project/commit/d041d5d4e07ba0eddd5120efd66520b3984a2b9b
  Author: Daniel Thornburgh <dthorn at google.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/include/clang/Basic/Attr.td
    M clang/include/clang/Basic/AttrDocs.td
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/include/clang/Sema/Sema.h
    M clang/lib/CodeGen/CGCall.cpp
    M clang/lib/Sema/SemaDecl.cpp
    M clang/lib/Sema/SemaDeclAttr.cpp
    A clang/test/CodeGen/attr-modular-format.c
    M clang/test/Misc/pragma-attribute-supported-attributes-list.test
    A clang/test/Sema/attr-modular-format.c

  Log Message:
  -----------
  [clang] "modular_format" attribute for functions using format strings (#147431)

This provides a C language `modular_format` attribute. This combines
with information from the existing `format` to set the new IR
`modular-format` attribute.

The purpose of these attributes is to enable "modular printf". A
statically linked libc can provide a modular variant of printf that only
weakly references implementation routines. The link-time symbol `printf`
would strongly reference aspect symbols (e.g. for float, fixed point,
etc.) that are provided by those routines, restoring the status quo.
However, the compiler could transform calls with constant format strings
to calls to the modular printf instead, and at the same time, it would
emit strong references to the aspect symbols that are needed to
implement the format string. Then, the printf implementation would
contain only the union of the aspects requested.

See issue #146159 for context.


  Commit: c5fa1f8c4bcc097ec8336bda8ef0b0a223abc2e6
      https://github.com/llvm/llvm-project/commit/c5fa1f8c4bcc097ec8336bda8ef0b0a223abc2e6
  Author: Valeriy Savchenko <vsavchenko at apple.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/test/CodeGen/AArch64/rem-by-const.ll
    A llvm/test/CodeGen/AArch64/udiv-by-const-promoted-ops.ll

  Log Message:
  -----------
  [DAGCombiner] Handle type-promoted constants in UDIV lowering (#169491)


  Commit: 50916a4adc106e140fc389097aa21eb93ea2f798
      https://github.com/llvm/llvm-project/commit/50916a4adc106e140fc389097aa21eb93ea2f798
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
    M llvm/test/Transforms/LoopVectorize/AArch64/select-costs.ll

  Log Message:
  -----------
  [VPlan] Use predicate in VPInstruction::computeCost for selects. (#170278)

In some cases, the lowering a select depends on the predicate. If the
condition of a select is a compare instruction, thread the predicate
through to the TTI hook.

PR: https://github.com/llvm/llvm-project/pull/170278


  Commit: 4715e525648dde9abc50dfc93fa2cd3a67708cc7
      https://github.com/llvm/llvm-project/commit/4715e525648dde9abc50dfc93fa2cd3a67708cc7
  Author: Fateme Hosseini <quic_fhossein at quicinc.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
    A llvm/test/CodeGen/Hexagon/autohvx/fp-to-int_2.ll

  Log Message:
  -----------
  [Hexagon] Add an option to use fast FP to int convert for some HVX cases (#169562)

Lowering several flavors of fptosi for HVX can be done faster, but
violates c/c++ convention on some arch tags. Nevertheless customers are
using direct intrinsics with "incorrect" rounding mode and want compiler
to do the same.

Default behavior is not changed.

Patch By: Fateme Hosseini

Co-authored-by: Sergei Larin <slarin at codeaurora.org>
Co-authored-by: Sergei Larin <slarin at qti.qualcomm.com>


  Commit: 671a8ce6bed475830ee9eb67cd3afb950e5a17e1
      https://github.com/llvm/llvm-project/commit/671a8ce6bed475830ee9eb67cd3afb950e5a17e1
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang-tools-extra/clangd/test/lit.cfg.py
    M clang-tools-extra/clangd/test/system-include-extractor.test

  Log Message:
  -----------
  Reapply "[clangd] Enable lit internal shell by default" (#170186)

This reverts commit 4cfbc44ebe26692c209655c37aeb0b6cbf1d479b.

This was failing due to a missing chmod binary on one of the bots
(clangd-ubuntu-tsan). This patch fixes that by explicitly checking for
the presence of a chmod binary. This should not be necessary (I have
added a TODO for myself to update once I have looked at the bot setup
which I am currently waiting on access to) as check-llvm works with
requiring chmod unconditionally.


  Commit: fc1e91112b8388ec684b8f59c5b03337331db8c2
      https://github.com/llvm/llvm-project/commit/fc1e91112b8388ec684b8f59c5b03337331db8c2
  Author: Charles Zablit <c_zablit at apple.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
    M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp

  Log Message:
  -----------
  [lldb] ensure comment conforms to LLVM guidelines (#170533)

This patch is a follow up to
https://github.com/llvm/llvm-project/pull/170471.


  Commit: c656bf30e6fd84bbc2aa8d7b8bacf32ee7d13d09
      https://github.com/llvm/llvm-project/commit/c656bf30e6fd84bbc2aa8d7b8bacf32ee7d13d09
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M .github/workflows/issue-write.yml

  Log Message:
  -----------
  [Github] Add user of issue-write for #170209

So that we can actually test the workflow before comitting into tree.


  Commit: 43b69166e7df5f82c15b7536e61f251428df07af
      https://github.com/llvm/llvm-project/commit/43b69166e7df5f82c15b7536e61f251428df07af
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang-tools-extra/clangd/test/lit.cfg.py
    M clang-tools-extra/clangd/test/system-include-extractor.test

  Log Message:
  -----------
  Revert "[clangd] Enable lit internal shell by default (#170186)"

This reverts commit 671a8ce6bed475830ee9eb67cd3afb950e5a17e1.

This stil broke the clangd-ubuntu-tsan bot. It seems like somehow the
PATH variable is not getting propagated in the
system-include-extractor.test test.


  Commit: c5e6f4e99d6a1d74614cdfd866cf0f81ecc43984
      https://github.com/llvm/llvm-project/commit/c5e6f4e99d6a1d74614cdfd866cf0f81ecc43984
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/test/Transforms/LoopUnroll/AArch64/apple-unrolling.ll

  Log Message:
  -----------
  [AArch64] Add unrolling test with -mcpu=apple-a17.

Currently Apple unrolling preferences are not applied to apple-a17.


  Commit: 6164b0785efcf6d9565cdcf42eada2187897e434
      https://github.com/llvm/llvm-project/commit/6164b0785efcf6d9565cdcf42eada2187897e434
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    A .github/workflows/issue-write-test.yaml

  Log Message:
  -----------
  [Github] Add workflow to test the issue write workflow

This does not test most of the functionality (i.e., that writing to an
existing comment still works), but does ensure that the plumbing works
and things are not completely broken.

Reviewers: tstellar, cmtice

Reviewed By: cmtice

Pull Request: https://github.com/llvm/llvm-project/pull/170209


  Commit: 8f6e95ef45d20709f338b0753a362c172a51eff7
      https://github.com/llvm/llvm-project/commit/8f6e95ef45d20709f338b0753a362c172a51eff7
  Author: Ahmed Nour <ahmednour.mohamed2012 at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsX86.td
    M clang/lib/AST/ByteCode/InterpBuiltin.cpp
    M clang/lib/AST/ExprConstant.cpp
    M clang/test/CodeGen/X86/avx2-builtins.c

  Log Message:
  -----------
  [Clang][X86] Add constexpr support for permute4x64_pd and permute4x64_epi64 (#170442)

This PR adds constexpr support for the AVX2 cross-lane permute
intrinsics _mm256_permute4x64_pd and _mm256_permute4x64_epi64

Resolves https://github.com/llvm/llvm-project/issues/169304


  Commit: 562d911857d9e050b002b9904d64d0f08bf4a762
      https://github.com/llvm/llvm-project/commit/562d911857d9e050b002b9904d64d0f08bf4a762
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M .github/workflows/test-unprivileged-download-artifact.yml
    M .github/workflows/unprivileged-download-artifact/action.yml

  Log Message:
  -----------
  [Github] Make unprivileged-download-artifact download multiple artifacts

This is designed to allow a workflow (e.g., premerge) upload comments
across multiple jobs. Subsequent PRs will wire this up within the
issue-write workflow to support reading comments from multiple files.

Reviewers: tstellar, cmtice

Reviewed By: cmtice

Pull Request: https://github.com/llvm/llvm-project/pull/170216


  Commit: 7b3ec5191a701dcebbf3c05a53b938ddd5f3c2d1
      https://github.com/llvm/llvm-project/commit/7b3ec5191a701dcebbf3c05a53b938ddd5f3c2d1
  Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp

  Log Message:
  -----------
  [VPlan] Consolidate logic for narrowToSingleScalars (NFCI) (#167360)

The logic for narrowing to single scalar recipes is in two different
places: narrowToSingleScalarRecipes and legalizeAndOptimizeInductions.
Consolidate them.


  Commit: 58dd3a4fef51b11d4ea5f6c4f7c349589fb12255
      https://github.com/llvm/llvm-project/commit/58dd3a4fef51b11d4ea5f6c4f7c349589fb12255
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M .github/workflows/issue-write-test.yaml

  Log Message:
  -----------
  [Github] Also run test issue write when touching issue-write.yml

We should actually run the test workflow when touching the workflow we
are attempting to test.


  Commit: 3d598c33350a6691807441666f9c5014c18aff39
      https://github.com/llvm/llvm-project/commit/3d598c33350a6691807441666f9c5014c18aff39
  Author: Koakuma <koachan at protonmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Target/Sparc/SparcCallingConv.td
    M llvm/test/CodeGen/SPARC/fp128-abi.ll

  Log Message:
  -----------
  [SPARC] Remove CCIfConsecutiveRegs for f128 returns (#170133)

It appears that using it will result in callers mistakenly thinking that
complex f128 returns is done the sret-way, when it should be returned in
registers.


  Commit: 5cbd294ca2390069181d984644dac6ca34b5e95c
      https://github.com/llvm/llvm-project/commit/5cbd294ca2390069181d984644dac6ca34b5e95c
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M .github/workflows/issue-write.yml

  Log Message:
  -----------
  [Github] Fix issue-write workflow after #170216

This changed the name of one of the outputs that issue-write used to
control whether or not it ran. This patch should fix that.


  Commit: 04c81a99735c04b2018eeb687e74f9860e1d0e1b
      https://github.com/llvm/llvm-project/commit/04c81a99735c04b2018eeb687e74f9860e1d0e1b
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/lib/CodeGen/BackendUtil.cpp
    M llvm/include/llvm/Analysis/RuntimeLibcallInfo.h
    M llvm/include/llvm/CodeGen/LibcallLoweringInfo.h
    M llvm/include/llvm/InitializePasses.h
    M llvm/lib/Analysis/RuntimeLibcallInfo.cpp
    M llvm/lib/CodeGen/CodeGen.cpp
    M llvm/lib/CodeGen/ExpandFp.cpp
    M llvm/lib/CodeGen/LibcallLoweringInfo.cpp
    M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
    M llvm/lib/LTO/LTOBackend.cpp
    M llvm/lib/Passes/PassRegistry.def
    M llvm/test/CodeGen/AArch64/O0-pipeline.ll
    M llvm/test/CodeGen/AArch64/O3-pipeline.ll
    M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
    M llvm/test/CodeGen/LoongArch/O0-pipeline.ll
    M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
    M llvm/test/CodeGen/PowerPC/O0-pipeline.ll
    M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
    M llvm/test/CodeGen/RISCV/O0-pipeline.ll
    M llvm/test/CodeGen/RISCV/O3-pipeline.ll
    M llvm/test/CodeGen/SPIRV/llc-pipeline.ll
    M llvm/test/CodeGen/X86/O0-pipeline.ll
    M llvm/test/CodeGen/X86/opt-pipeline.ll
    M llvm/test/Transforms/ExpandFp/AMDGPU/frem-inf.ll
    M llvm/test/Transforms/ExpandFp/AMDGPU/frem.ll
    A llvm/test/Transforms/ExpandFp/AMDGPU/missing-analysis.ll
    M llvm/test/Transforms/ExpandFp/AMDGPU/pass-parameters.ll
    M llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-fptosi129.ll
    M llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-fptoui129.ll
    M llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-si129tofp.ll
    M llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-ui129tofp.ll
    M llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-optnone.ll
    M llvm/tools/llc/NewPMDriver.cpp
    M llvm/tools/llc/llc.cpp
    M llvm/tools/opt/NewPMDriver.cpp
    M llvm/tools/opt/NewPMDriver.h
    M llvm/tools/opt/optdriver.cpp

  Log Message:
  -----------
  CodeGen: Add LibcallLoweringInfo analysis pass (#168622)

The libcall lowering decisions should be program dependent,
depending on the current module's RuntimeLibcallInfo. We need
another related analysis derived from that plus the current
function's subtarget to provide concrete lowering decisions.

This takes on a somewhat unusual form. It's a Module analysis,
with a lookup keyed on the subtarget. This is a separate module
analysis from RuntimeLibraryAnalysis to avoid that depending on
codegen. It's not a function pass to avoid depending on any
particular function, to avoid repeated subtarget map lookups in
most of the use passes, and to avoid any recomputation in the
common case of one subtarget (and keeps it reusable across
repeated compilations).

This also switches ExpandFp and PreISelIntrinsicLowering as
a sample function and module pass. Note this is not yet wired
up to SelectionDAG, which is still using the LibcallLoweringInfo
constructed inside of TargetLowering.


  Commit: b13b41a891dbd4bb7b49f3bfec4ebe4f42983f58
      https://github.com/llvm/llvm-project/commit/b13b41a891dbd4bb7b49f3bfec4ebe4f42983f58
  Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    R lldb/test/API/python_api/sbframe_extensions/Makefile
    R lldb/test/API/python_api/sbframe_extensions/TestSBFrameExtensions.py
    R lldb/test/API/python_api/sbframe_extensions/main.c

  Log Message:
  -----------
  Revert "[LLDB] Add SBFrameExtensions Tests (#169236)" (#170555)

This reverts commit 5e5937c3d2e493a48837b2bdf179a53e8b80a66a, since the
added test fails on the `lldb-x86_64-win` buildbot.

https://lab.llvm.org/buildbot/#/builders/211/builds/4246


  Commit: d2accd386f3e9727309c97ecea1e22f11b617237
      https://github.com/llvm/llvm-project/commit/d2accd386f3e9727309c97ecea1e22f11b617237
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M .github/workflows/issue-write-test.yaml
    M .github/workflows/issue-write.yml

  Log Message:
  -----------
  [Github] Make issue-write workflow support reading from multiple files

This is so that we can read from multiple files emitted by the premerge
workflow.

Reviewers: tstellar, cmtice

Reviewed By: cmtice

Pull Request: https://github.com/llvm/llvm-project/pull/170411


  Commit: 2fb2d7eb412f25fbe48f47a31b017a87d2398f8a
      https://github.com/llvm/llvm-project/commit/2fb2d7eb412f25fbe48f47a31b017a87d2398f8a
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M flang/include/flang/Optimizer/Builder/CUFCommon.h
    M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
    M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
    M flang/lib/Optimizer/Transforms/CUFComputeSharedMemoryOffsetsAndSize.cpp
    M flang/lib/Optimizer/Transforms/CUFGPUToLLVMConversion.cpp
    M flang/test/Fir/CUDA/cuda-code-gen.mlir
    M flang/test/Fir/CUDA/cuda-shared-offset.mlir
    M flang/test/Fir/CUDA/cuda-shared-to-llvm.mlir

  Log Message:
  -----------
  [flang][cuda] Change how to handle static shared memory variables (#170388)

Generate one global per static shared variable so the alignment can be
set separately. Dynamic shared memory is unchanged.


  Commit: 095f8e07933636bba726e3a903f215ce9fc7e2dd
      https://github.com/llvm/llvm-project/commit/095f8e07933636bba726e3a903f215ce9fc7e2dd
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/test/Transforms/LoopVectorize/select-smin-first-index.ll
    M llvm/test/Transforms/LoopVectorize/select-umin-first-index.ll

  Log Message:
  -----------
  [LV] Add more tests for finding the first-iv of argmin.

Adds more test coverage for
https://github.com/llvm/llvm-project/pull/170223.


  Commit: 1054a6e9dee0198da0a3d234fd3254aa9e143319
      https://github.com/llvm/llvm-project/commit/1054a6e9dee0198da0a3d234fd3254aa9e143319
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Analysis/ScalarEvolution.cpp
    M llvm/test/Analysis/ScalarEvolution/addrec-may-wrap-udiv-canonicalize.ll
    M llvm/test/Transforms/LoopVectorize/X86/uniformshift.ll

  Log Message:
  -----------
  [SCEV] Handle non-constant start values in AddRec UDiv canonicalization. (#170474)

Follow-up to https://github.com/llvm/llvm-project/pull/169576 to enable
UDiv canonicalization if the start of the AddRec is not constant.

The fold is not restricted to constant start values, as long as we are
able to compute a constant remainder. The fold is only applied if the
subtraction of the remainder can be folded into to start expression, but
that is just to avoid creating more complex AddRecs.

For reference, the proof from #169576 is
https://alive2.llvm.org/ce/z/iu2tav

PR: https://github.com/llvm/llvm-project/pull/170474


  Commit: 7931e2fd52800295ac768acbf1a20560dd7d5fe0
      https://github.com/llvm/llvm-project/commit/7931e2fd52800295ac768acbf1a20560dd7d5fe0
  Author: Nishant Patel <nishant.b.patel at intel.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
    M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
    M mlir/test/Dialect/Vector/vector-unroll-options.mlir
    M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp

  Log Message:
  -----------
  [MLIR][Vector] Add unroll pattern for vector.create_mask (#169119)

This PR adds unrolling for vector.create_mask op based on the
targetShape. Each unrolled vector computes its local mask size in each
dimension (d) as:
min(max(originalMaskSize[d] - offset[d], 0), unrolledMaskSize[d]).


  Commit: 90606ae295361fc3dea1ee0b9bb954c478ecd785
      https://github.com/llvm/llvm-project/commit/90606ae295361fc3dea1ee0b9bb954c478ecd785
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

  Log Message:
  -----------
  DAG: Use poison for filler values on legalize error paths (#170556)


  Commit: 1f6d0d8a65ce492bfc362c04eec84361898382c4
      https://github.com/llvm/llvm-project/commit/1f6d0d8a65ce492bfc362c04eec84361898382c4
  Author: Steven Wu <stevenwu at apple.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/unittests/CAS/CASTestConfig.h

  Log Message:
  -----------
  [CAS] Disable CASTests on Windows versions before windows 11 (#170420)

Disable test due to CASTests failing nondeterministically on some
windows CI.


  Commit: e5675a4452ba1fd148c26e2bb9a440359b1d6276
      https://github.com/llvm/llvm-project/commit/e5675a4452ba1fd148c26e2bb9a440359b1d6276
  Author: Tarun Prabhu <tarun at lanl.gov>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M flang/test/Lower/OpenMP/Todo/reduction-task.f90
    M flang/test/Lower/OpenMP/allocatable-array-bounds.f90
    M flang/test/Lower/OpenMP/allocatable-map.f90
    M flang/test/Lower/OpenMP/atomic-capture.f90
    M flang/test/Lower/OpenMP/atomic-read-complex.f90
    M flang/test/Lower/OpenMP/atomic-update.f90
    M flang/test/Lower/OpenMP/atomic-write-complex.f90
    M flang/test/Lower/OpenMP/copyin.f90
    M flang/test/Lower/OpenMP/declare-target-func-and-subr.f90
    M flang/test/Lower/OpenMP/default-clause-byref.f90
    M flang/test/Lower/OpenMP/default-clause.f90
    M flang/test/Lower/OpenMP/delayed-privatization-private-firstprivate.f90
    M flang/test/Lower/OpenMP/derived-type-map.f90
    M flang/test/Lower/OpenMP/distribute.f90
    M flang/test/Lower/OpenMP/generic-loop-rewriting.f90
    M flang/test/Lower/OpenMP/host-eval.f90
    M flang/test/Lower/OpenMP/lastprivate-iv.f90
    M flang/test/Lower/OpenMP/loop-directive.f90
    M flang/test/Lower/OpenMP/map-no-modifier-v60.f90
    M flang/test/Lower/OpenMP/masked_taskloop.f90
    M flang/test/Lower/OpenMP/master_taskloop_simd.f90
    M flang/test/Lower/OpenMP/multiple-entry-points.f90
    M flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90
    M flang/test/Lower/OpenMP/parallel-masked-taskloop.f90
    M flang/test/Lower/OpenMP/parallel-master-taskloop-simd.f90
    M flang/test/Lower/OpenMP/parallel-reduction-mixed.f90
    M flang/test/Lower/OpenMP/parallel-wsloop-firstpriv.f90
    M flang/test/Lower/OpenMP/private-commonblock.f90
    M flang/test/Lower/OpenMP/privatize_predetermined_only_when_defined_by_eval.f90
    M flang/test/Lower/OpenMP/sections.f90
    M flang/test/Lower/OpenMP/shared-loop.f90
    M flang/test/Lower/OpenMP/simd.f90
    M flang/test/Lower/OpenMP/single.f90
    M flang/test/Lower/OpenMP/target-enter-data-default-openmp52.f90
    M flang/test/Lower/OpenMP/task.f90
    M flang/test/Lower/OpenMP/taskgroup-task-array-reduction.f90
    M flang/test/Lower/OpenMP/taskgroup-task_reduction01.f90
    M flang/test/Lower/OpenMP/taskloop-cancel.f90
    M flang/test/Lower/OpenMP/taskloop-grainsize.f90
    M flang/test/Lower/OpenMP/taskloop-numtasks.f90
    M flang/test/Lower/OpenMP/taskloop.f90
    M flang/test/Lower/OpenMP/workdistribute-saxpy-two-2d.f90
    M flang/test/Lower/OpenMP/workdistribute-scalar-assign.f90
    M flang/test/Lower/OpenMP/wsloop-chunks.f90

  Log Message:
  -----------
  [flang][NFC] Strip trailing whitespace from tests (9 of N)

Only some fortran source files in flang/test/Lower/OpenMP have been
modified. More cleanups will be performed in subsequent commits.


  Commit: 75af66eb8ca9fa62ca0949af57513ff2b99a4583
      https://github.com/llvm/llvm-project/commit/75af66eb8ca9fa62ca0949af57513ff2b99a4583
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M .ci/premerge_advisor_explain.py
    M .github/workflows/premerge.yaml

  Log Message:
  -----------
  [Github][CI] Make premerge upload results on Linux and Windows (#170414)

Now that the issue-write workflow can support writing comments from
multiple files, make the premerge workflow write out comments from both
x86_64 Linux and Windows. AArch64 Linux right now is left out as the
premerge advisor does not currently support it.


  Commit: 4da31b6f579925e17314ad2de2826dc171cd95f4
      https://github.com/llvm/llvm-project/commit/4da31b6f579925e17314ad2de2826dc171cd95f4
  Author: Fateme Hosseini <quic_fhossein at quicinc.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsHexagon.td
    M llvm/include/llvm/IR/IntrinsicsHexagonDep.td
    M llvm/lib/Target/Hexagon/CMakeLists.txt
    M llvm/lib/Target/Hexagon/Hexagon.h
    M llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp
    A llvm/lib/Target/Hexagon/HexagonGenWideningVecFloatInstr.cpp
    A llvm/lib/Target/Hexagon/HexagonGenWideningVecInstr.cpp
    M llvm/lib/Target/Hexagon/HexagonISelLowering.h
    M llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
    M llvm/lib/Target/Hexagon/HexagonIntrinsics.td
    M llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp
    A llvm/lib/Target/Hexagon/HexagonOptShuffleVector.cpp
    M llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
    M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
    M llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
    M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCELFStreamer.cpp
    M llvm/test/CodeGen/Hexagon/autohvx/isel-vpackew.ll
    M llvm/test/CodeGen/Hexagon/autohvx/widen-setcc.ll
    A llvm/test/CodeGen/Hexagon/bug54537-vavg.ll
    A llvm/test/CodeGen/Hexagon/extend-multiply-for-output-fpext.ll
    A llvm/test/CodeGen/Hexagon/no_widening_of_bf16_vecmul.ll
    A llvm/test/CodeGen/Hexagon/shortvec-vasrsat.ll
    A llvm/test/CodeGen/Hexagon/shortvec-vavg.ll
    A llvm/test/CodeGen/Hexagon/shortvec-vmpy.ll
    A llvm/test/CodeGen/Hexagon/vadd-const.ll
    A llvm/test/CodeGen/Hexagon/vasr-sat.ll
    A llvm/test/CodeGen/Hexagon/vavg.ll
    A llvm/test/CodeGen/Hexagon/vec-shuff-invalid-operand.ll
    A llvm/test/CodeGen/Hexagon/vec-shuff-multi-uses.ll
    A llvm/test/CodeGen/Hexagon/vec-shuff2.ll
    A llvm/test/CodeGen/Hexagon/vmpa.ll
    A llvm/test/CodeGen/Hexagon/vmpy-const.ll
    A llvm/test/CodeGen/Hexagon/vmpy-qfp-const.ll
    A llvm/test/CodeGen/Hexagon/vsub-const.ll
    A llvm/test/CodeGen/Hexagon/widening-float-vec.ll
    A llvm/test/CodeGen/Hexagon/widening-vec.ll
    A llvm/test/CodeGen/Hexagon/widening-vec2.ll

  Log Message:
  -----------
  [Hexagon] Passes for widening vector operations and shuffle opt (#169559)

Introduce Hexagon-specific passes to generate widening vector
instructions for integer and floating-point operations using generic
LLVM intrinsics. This enables widening operations for short vectors and
improves type legalization by allowing operands to be widened to
appropriate types. The patch also includes a shuffle optimization pass
to relocate and validate shufflevector instructions during widening
legalization.

Co-authored-by: Jyotsna Verma <jverma at qti.qualcomm.com>
Co-authored-by: Yashas Andaluri <yandalur at qti.qualcomm.com>
Co-authored-by: Fateme Hosseini <fhossein at qti.qualcomm.com>
Co-authored-by: Muntasir Mallick <mallick at qti.qualcomm.com>
Co-authored-by: Tatiana Larina <larina at qti.qualcomm.com>
Co-authored-by: Kaushik Kulkarni <kauskulk at qti.qualcomm.com>

Co-authored-by: Jyotsna Verma <jverma at qti.qualcomm.com>
Co-authored-by: Yashas Andaluri <yandalur at qti.qualcomm.com>
Co-authored-by: Muntasir Mallick <mallick at qti.qualcomm.com>
Co-authored-by: Tatiana Larina <larina at qti.qualcomm.com>
Co-authored-by: Kaushik Kulkarni <kauskulk at qti.qualcomm.com>


  Commit: 9f23877ccc4e837470fc264a177c41f4d2b42cdf
      https://github.com/llvm/llvm-project/commit/9f23877ccc4e837470fc264a177c41f4d2b42cdf
  Author: Jan Svoboda <jan_svoboda at apple.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.cpp
    M clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.h
    M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp

  Log Message:
  -----------
  [clang][deps] Simplify consuming of the build command (#169064)

This is an NFC patch that aims to simplify how the scanner calls
`Consumer.handleBuildCommand()` by doing it directly in
`DependencyScanningAction` instead of going through the
`setLastCC1Arguments()` and `takeLastCC1Arguments()` dance with the
client.


  Commit: 848d8657aec798b2630b8dfb57c009e7060d6d49
      https://github.com/llvm/llvm-project/commit/848d8657aec798b2630b8dfb57c009e7060d6d49
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
    M flang/test/Lower/CUDA/cuda-device-proc.cuf

  Log Message:
  -----------
  [flang][cuda] Set alignment for tma bulk store (#170558)

Shared memory needs to be aligned like in the bulk load operation.


  Commit: 278d28f0960382cac18b20fdaa6e15cae1b90ba2
      https://github.com/llvm/llvm-project/commit/278d28f0960382cac18b20fdaa6e15cae1b90ba2
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/BUILD.gn

  Log Message:
  -----------
  [gn build] Port 4da31b6f5799


  Commit: 240a0d1bfb2e5ea014a8cd62a171e1722db53600
      https://github.com/llvm/llvm-project/commit/240a0d1bfb2e5ea014a8cd62a171e1722db53600
  Author: HighW4y2H3ll <zhenghaohuu at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/include/llvm/MC/MCPseudoProbe.h
    M llvm/include/llvm/ProfileData/SampleProf.h
    A llvm/test/tools/llvm-profgen/Inputs/missing-dwarf.exe
    A llvm/test/tools/llvm-profgen/missing-dwarf.test
    M llvm/tools/llvm-profgen/Options.h
    M llvm/tools/llvm-profgen/PerfReader.cpp
    M llvm/tools/llvm-profgen/ProfileGenerator.cpp
    M llvm/tools/llvm-profgen/ProfiledBinary.cpp
    M llvm/tools/llvm-profgen/ProfiledBinary.h

  Log Message:
  -----------
  [llvm-profgen] Loading binary functions from .symtab when DWARF info is incomplete (#163654)

Indexing in .debug_str section could lead to integer overflow when in
DWARF32 format.

https://github.com/llvm/llvm-project/blob/e61e6251b692ffe71910bad22b82e41313f003cf/llvm/lib/DWP/DWP.cpp#L35C30-L35C47

This can lead to missing symbols from the DWARF info, and hurts profile
quality. As a workaround, we may use information from the symbol table
(.symtab), and recover the missing symbols with addresses and ranges.

Output:
```
# Before
...
warning: 6.64%(338916009/5106344252) of samples are from ranges that do not belong to any functions.

# After
...
warning: 0.07%(3501587/4906133148) of samples are from ranges that do not belong to any functions.
warning: 5.71%(280266919/4906133148) of samples are from ranges that belong to functions recovered from symbol table.
```

We see 0.4% - 1.35% performance improvements on our internal services
where profiles are generated with binaries that have .debug_str section
over 4GB.


  Commit: e52aece16b98a2fba9b84f411bd4c5f35dfe60c1
      https://github.com/llvm/llvm-project/commit/e52aece16b98a2fba9b84f411bd4c5f35dfe60c1
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
    M flang/test/Lower/CUDA/cuda-device-proc.cuf

  Log Message:
  -----------
  [flang][cuda] Do not use address cast for src and dst in TMA bulk load (#170564)


  Commit: f6503306652f1dbfc7f8ec1569342a82999e5674
      https://github.com/llvm/llvm-project/commit/f6503306652f1dbfc7f8ec1569342a82999e5674
  Author: Maryam Moghadas <maryammo at ca.ibm.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsPPC.def
    M clang/lib/Headers/CMakeLists.txt
    A clang/lib/Headers/amo.h
    M clang/lib/Sema/SemaPPC.cpp
    A clang/test/CodeGen/PowerPC/builtins-amo-err.c
    A clang/test/CodeGen/PowerPC/builtins-ppc-amo.c
    A clang/test/CodeGen/PowerPC/ppc-amo-header.c
    M llvm/include/llvm/IR/IntrinsicsPowerPC.td
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
    M llvm/lib/Target/PowerPC/PPCInstrInfo.td
    M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
    A llvm/test/CodeGen/PowerPC/amo-enable.ll

  Log Message:
  -----------
  [PowerPC] Add initial support for AMO load builtins (#168746)

This commit adds two Clang builtins for PowerPC AMO load operations:

__builtin_amo_lwat for 32-bit unsigned operations
__builtin_amo_ldat for 64-bit unsigned operations

Also adds an amo.h header that maps GCC's AMO functions to these Clang
builtins for compatibility.


  Commit: 254b33f3f8c6f71242f1c4b0d1b0f7038a07045d
      https://github.com/llvm/llvm-project/commit/254b33f3f8c6f71242f1c4b0d1b0f7038a07045d
  Author: Susan Tan (ス-ザン　タン) <zujunt at nvidia.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M flang/lib/Lower/OpenACC.cpp
    M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
    M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
    M mlir/test/Dialect/OpenACC/ops.mlir

  Log Message:
  -----------
  [acc] Add firstprivate/private/reduction to `acc.kernels` (#170387)

Similar to https://github.com/llvm/llvm-project/pull/161881, we will
need private/firstprivate/reduction representation for acc kernels for
automatic privatization


  Commit: 3b9a0db2615871fe6a2ae0047e97eb99fd53987a
      https://github.com/llvm/llvm-project/commit/3b9a0db2615871fe6a2ae0047e97eb99fd53987a
  Author: Mikhail R. Gadelha <mikhail at igalia.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
    M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-permutation.s
    M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vle-vse-vlm.s
    M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlse-vsse.s
    M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlseg-vsseg.s
    M llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlxe-vsxe.s

  Log Message:
  -----------
  [RISCV] Update SpacemiT-X60 vector load/stores (#169936)

This PR adds hardware-measured latencies/Occupancy for all RVV
load/stores to the SpacemiT-X60 scheduling model.


  Commit: 4bf7c598f2d448c55c75e57b092282e26af5d77f
      https://github.com/llvm/llvm-project/commit/4bf7c598f2d448c55c75e57b092282e26af5d77f
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn

  Log Message:
  -----------
  [gn build] Port f6503306652f


  Commit: 6e479668ba746ee3778b7ab59b7c415976719c93
      https://github.com/llvm/llvm-project/commit/6e479668ba746ee3778b7ab59b7c415976719c93
  Author: Kees Cook <kees at kernel.org>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/include/clang/Basic/CodeGenOptions.h
    M clang/include/clang/Options/Options.td
    M clang/lib/CodeGen/CodeGenModule.cpp
    M clang/test/CodeGen/cfi-salt.c
    A clang/test/CodeGen/kcfi-hash.c
    M clang/test/CodeGen/kcfi.c
    A llvm/include/llvm/Support/Hash.h
    M llvm/lib/Support/CMakeLists.txt
    A llvm/lib/Support/Hash.cpp
    M llvm/lib/Transforms/Instrumentation/KCFI.cpp
    M llvm/lib/Transforms/Utils/ModuleUtils.cpp

  Log Message:
  -----------
  [CodeGen][KCFI] Allow setting type hash from xxHash64 to FNV-1a (#167254)

When emitting the assembly .set directive, KCFI needs to use
getZExtValue(). However, this means that FileCheck pattern matching can't
match between the .set directive and the IR when the high bit of a 32-bit
value is set. We had gotten lucky with the existing tests happening to
just not have had the high bit set. The coming hash change will expose
this, though.

LLVM IR's default printing behavior uses APInt::operator<<, which calls
APInt::print(OS, /*isSigned=*/true). This means KCFI operand bundles in
call instructions print as signed (e.g. [ "kcfi"(i32 -1208803271) ]),
and KCFI type metadata prints as signed (e.g. !3 = !{i32 -1208803271}).
Changing the IR to print unsigned i32 values would impact hundreds of
existing tests, so it is best to just leave it be.

Update the KCFI .set direct to use getSExtValue() in a comment so that
we can both build correctly and use FileCheck with pattern matching in
tests.

KCFI generates hashes in two places. Instead of exposing the hash
implementation in both places, introduce a helper that wraps the
specific hash implementation in a single place, llvm::getKCFITypeID.

In order to transition between KCFI hash, we need to be able to specify
them. Add the Clang option -fsanitize-kcfi-hash= and a IR module option
"kcfi-hash" that can choose between xxHash64 and FNV-1a. Default to
xxHash64 to stay backward compatible, as we'll need to also update rustc
to take a new option to change the hash to FNV-1a for interop with the
coming GCC KCFI.


  Commit: 31ec45a3d9bbc765c9620e0d59272a7d47539bc2
      https://github.com/llvm/llvm-project/commit/31ec45a3d9bbc765c9620e0d59272a7d47539bc2
  Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/test/CodeGen/AMDGPU/vgpr-lowering-gfx1250.mir
    M llvm/test/CodeGen/AMDGPU/vopd-combine-gfx1250.mir

  Log Message:
  -----------
  [AMDGPU] Fix VGPR lowering for V_DUAL_FMAMK_F32 (#170567)

Fixes: https://github.com/llvm/llvm-project/issues/170552


  Commit: d33d7ce4cd7bfb6f67119b0718ca54bc2a89e6b8
      https://github.com/llvm/llvm-project/commit/d33d7ce4cd7bfb6f67119b0718ca54bc2a89e6b8
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn

  Log Message:
  -----------
  [gn build] Port 6e479668ba74


  Commit: 21f98f978c65d5f98cc1453adbdb86c36fda1fd5
      https://github.com/llvm/llvm-project/commit/21f98f978c65d5f98cc1453adbdb86c36fda1fd5
  Author: Nicolas Miller <nicolas.pierre.miller at gmail.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp

  Log Message:
  -----------
  [lldb-dap] Fix format string on Mac OS (#169933)

On Mac `unsigned long long` corresponds to `uint64_t` so `%llu` is
needed.

Simply always using `%llu` and upcasting to `unsigned long long` should
make it work fine.


  Commit: b70be3dc14c1f54eaae33418ced28a3473ab7d70
      https://github.com/llvm/llvm-project/commit/b70be3dc14c1f54eaae33418ced28a3473ab7d70
  Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M clang-tools-extra/clangd/ScanningProjectModules.cpp
    A clang/include/clang/DependencyScanning/DependencyScannerImpl.h
    A clang/include/clang/DependencyScanning/DependencyScanningFilesystem.h
    A clang/include/clang/DependencyScanning/DependencyScanningService.h
    A clang/include/clang/DependencyScanning/DependencyScanningUtils.h
    A clang/include/clang/DependencyScanning/DependencyScanningWorker.h
    A clang/include/clang/DependencyScanning/InProcessModuleCache.h
    A clang/include/clang/DependencyScanning/ModuleDepCollector.h
    R clang/include/clang/Tooling/DependencyScanning/DependencyScanningFilesystem.h
    R clang/include/clang/Tooling/DependencyScanning/DependencyScanningService.h
    R clang/include/clang/Tooling/DependencyScanning/DependencyScanningTool.h
    R clang/include/clang/Tooling/DependencyScanning/DependencyScanningWorker.h
    R clang/include/clang/Tooling/DependencyScanning/InProcessModuleCache.h
    R clang/include/clang/Tooling/DependencyScanning/ModuleDepCollector.h
    A clang/include/clang/Tooling/DependencyScanningTool.h
    M clang/lib/CMakeLists.txt
    A clang/lib/DependencyScanning/CMakeLists.txt
    A clang/lib/DependencyScanning/DependencyScannerImpl.cpp
    A clang/lib/DependencyScanning/DependencyScanningFilesystem.cpp
    A clang/lib/DependencyScanning/DependencyScanningService.cpp
    A clang/lib/DependencyScanning/DependencyScanningUtils.cpp
    A clang/lib/DependencyScanning/DependencyScanningWorker.cpp
    A clang/lib/DependencyScanning/InProcessModuleCache.cpp
    A clang/lib/DependencyScanning/ModuleDepCollector.cpp
    M clang/lib/Tooling/CMakeLists.txt
    R clang/lib/Tooling/DependencyScanning/CMakeLists.txt
    R clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.cpp
    R clang/lib/Tooling/DependencyScanning/DependencyScannerImpl.h
    R clang/lib/Tooling/DependencyScanning/DependencyScanningFilesystem.cpp
    R clang/lib/Tooling/DependencyScanning/DependencyScanningService.cpp
    R clang/lib/Tooling/DependencyScanning/DependencyScanningTool.cpp
    R clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
    R clang/lib/Tooling/DependencyScanning/InProcessModuleCache.cpp
    R clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
    A clang/lib/Tooling/DependencyScanningTool.cpp
    M clang/tools/clang-scan-deps/ClangScanDeps.cpp
    M clang/unittests/CMakeLists.txt
    A clang/unittests/DependencyScanning/CMakeLists.txt
    A clang/unittests/DependencyScanning/DependencyScanningFilesystemTest.cpp
    A clang/unittests/DependencyScanning/DependencyScanningWorkerTest.cpp
    M clang/unittests/Tooling/CMakeLists.txt
    A clang/unittests/Tooling/DependencyScannerTest.cpp
    R clang/unittests/Tooling/DependencyScanning/DependencyScannerTest.cpp
    R clang/unittests/Tooling/DependencyScanning/DependencyScanningFilesystemTest.cpp

  Log Message:
  -----------
  [clang][DependencyScanning] Separate clangDependencyScanning and DependencyScanningTool (NFC) (#169962)

This patch is the first of two in refactoring Clang's dependency
scanning tooling to remove its dependency on clangDriver.

It separates Tooling/DependencyScanningTool.cpp from the rest of
clangDependencyScanning and moves clangDependencyScanning out of
clangTooling into its own library. No functional changes are
introduced.

The follow-up patch (#169964) will restrict clangDependencyScanning to
handling only -cc1 command line inputs and will move all functionality
related to handling driver commands into clangTooling.
(Tooling/DependencyScanningTool.cpp).

This is part of a broader effort to support driver-managed builds for
compilations using C++ named modules and/or Clang modules. It is
required for linking the dependency scanning tooling against the driver
without introducing cyclic dependencies, which would otherwise cause
build failures when dynamic linking is enabled.

The RFC for this change can be found here:

https://discourse.llvm.org/t/rfc-new-clangoptions-library-remove-dependency-on-clangdriver-from-clangfrontend-and-flangfrontend/88773?u=naveen-seth


  Commit: c8d3b0c8e33076107fb633fdc2a7e4c734dc3f26
      https://github.com/llvm/llvm-project/commit/c8d3b0c8e33076107fb633fdc2a7e4c734dc3f26
  Author: Nishant Patel <nishant.b.patel at intel.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
    M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
    M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir

  Log Message:
  -----------
  [MLIR][XeGPU] Add distribution for vector.create_mask from Wg to Sg (#169571)


  Commit: e71717c2f9e8e4cc580e2b21aeddf1fe10aea67e
      https://github.com/llvm/llvm-project/commit/e71717c2f9e8e4cc580e2b21aeddf1fe10aea67e
  Author: AIT <45133884+GeneraluseAI at users.noreply.github.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
    M clang/test/CIR/CodeGenBuiltins/X86/avx2-builtins.c
    M clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c
    M clang/test/CIR/CodeGenBuiltins/X86/sse2-builtins.c
    A clang/test/CIR/CodeGenBuiltins/X86/sse41-builtins.c

  Log Message:
  -----------
  [CIR][X86] Implement lowering for pmuldq / pmuludq builtins (#169853)

part of [#167765](https://github.com/llvm/llvm-project/issues/167765)

This patch adds CIR codegen support for X86 pmuldq and pmuludq
operations, covering the signed and unsigned variants across all
supported vector widths. The builtins now lower to the expected CIR
representation matching the semantics of the corresponding LLVM
intrinsics.


  Commit: d7fb086668dff682fd2693a3df87a90b2b15a3c6
      https://github.com/llvm/llvm-project/commit/d7fb086668dff682fd2693a3df87a90b2b15a3c6
  Author: Augusto Noronha <anoronha at apple.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M lldb/include/lldb/Core/Module.h
    M lldb/include/lldb/Symbol/SymbolContext.h
    M lldb/include/lldb/Symbol/SymbolFile.h
    M lldb/source/Breakpoint/BreakpointResolverName.cpp
    M lldb/source/Core/Module.cpp
    M lldb/source/Core/ModuleList.cpp
    M lldb/source/Plugins/SymbolFile/Breakpad/SymbolFileBreakpad.cpp
    M lldb/source/Plugins/SymbolFile/DWARF/DWARFIndex.cpp
    M lldb/source/Plugins/SymbolFile/DWARF/DWARFIndex.h
    M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
    M lldb/source/Symbol/SymbolContext.cpp
    M lldb/source/Symbol/SymbolFile.cpp
    M lldb/test/API/functionalities/breakpoint/serialize/TestBreakpointSerialization.py
    M lldb/tools/lldb-test/lldb-test.cpp
    M lldb/unittests/Core/CMakeLists.txt
    A lldb/unittests/Core/ModuleTest.cpp

  Log Message:
  -----------
  [lldb] Refactor LookupInfo object to be per-language (#168797)

Some months ago, the LookupInfo constructor logic was refactored to not
depend on language specific logic, and use languages plugins instead. In
this refactor, when the language type is unknown, a single LookupInfo
object will handle multiple languages. This doesn't work well, as
multiple languages might want to configure the LookupInfo object in
different ways. For example, different languages might want to set the
m_lookup_name differently from each other, but the previous
implementation would pick the first name a language provided, and
effectively ignored every other language. Other fields of the LookupInfo
object are also configured in incompatible ways.

This approach doesn't seem to be a problem upstream, since only the
C++/Objective-C language plugins are available, but it broke downstream
on the Swift fork, as adding Swift to the list of default languages when
the language type is unknown breaks C++ tests.

This patch makes it so instead of building a single LookupInfo object
for multiple languages, one LookupInfo object is built per language
instead.

rdar://159531216


  Commit: 1a09ac584cee84eb79c0bc4f3b25c1c6e206078f
      https://github.com/llvm/llvm-project/commit/1a09ac584cee84eb79c0bc4f3b25c1c6e206078f
  Author: Lang Hames <lhames at gmail.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    A llvm/include/llvm/ExecutionEngine/Orc/CallSPSViaEPC.h
    A llvm/include/llvm/ExecutionEngine/Orc/CallViaEPC.h
    M llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
    A llvm/unittests/ExecutionEngine/Orc/CallSPSViaEPCTest.cpp

  Log Message:
  -----------
  [ORC] Add CallViaEPC and CallSPSViaEPC utilities. (#170464)

These utilities simplify making typed async calls via
ExecutorProcessControl::callWrapperAsync.

CallViaEPC.h provides utilities for making typed async calls using a
given Serializer to serialize arguments and deserialize results.

callViaEPC takes a result handler function object (accepting
Expected<T>), an EPC reference, a Serializer, a target function address,
and arguments. The return type T is inferred from the handler's argument
type using CallableTraitsHelper.

EPCCaller wraps an ExecutorProcessControl& and Serializer, simplifying
repeated calls with the same serialization.

EPCCall wraps an EPCCaller and target function address, simplifying
repeated calls to a specific wrapper function.

CallSPSViaEPC.h provides utilities for using CallViaEPC with SPS
serialization.

SPSCallSerializer is a CallViaEPC-compatible serializer using SPS.

SPSEPCCaller takes an SPS function signature as its template argument
and applies SPS serialization to arguments and return values.

SPSEPCCall wraps an SPSCaller and a target function address, simplifying
repeated calls to a specific SPS wrapper function.


  Commit: efbbca62d15271b07c54b22a0014339f350c857f
      https://github.com/llvm/llvm-project/commit/efbbca62d15271b07c54b22a0014339f350c857f
  Author: Tom Tromey <tromey at adacore.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/include/llvm/IR/DebugInfoMetadata.h
    M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
    M llvm/lib/IR/DebugInfoMetadata.cpp
    M llvm/lib/IR/Verifier.cpp
    A llvm/test/DebugInfo/X86/derived-in-subrange.ll

  Log Message:
  -----------
  [llvm][DebugInfo] Allow DIDerivedType as a bound in DISubrangeType (#165880)

Consider this Ada type:

```
   type Array_Type is array (Natural range <>) of Integer;
   type Record_Type (L1, L2 : Natural) is record
      I1 : Integer;
      A1 : Array_Type (1 .. L1);
      I2 : Integer;
      A2 : Array_Type (1 .. L2);
      I3 : Integer;
   end record;
```

Here, the array fields have lengths that depend on the discriminants of
the record type. However, in this case the array lengths cannot be
expressed as DWARF location expressions, with the issue being that "A2"
has a non-constant offset, but an expression involving
DW_OP_push_object_address will push the address of the field -- with no
way to find the location of "L2".

In a case like this, I believe the correct DWARF is to emit the array
ranges using a direct reference to the discriminant, like:

```
 <3><1156>: Abbrev Number: 1 (DW_TAG_member)
    <1157>   DW_AT_name        : l1
...
 <3><1177>: Abbrev Number: 6 (DW_TAG_array_type)
    <1178>   DW_AT_name        : (indirect string, offset: 0x1a0b): vla__record_type__T4b
    <117c>   DW_AT_type        : <0x1287>
    <1180>   DW_AT_sibling     : <0x118e>
 <4><1184>: Abbrev Number: 7 (DW_TAG_subrange_type)
    <1185>   DW_AT_type        : <0x1280>
    <1189>   DW_AT_upper_bound : <0x1156>
```

(FWIW this is what GCC has done for years.)

This patch makes this possible in LLVM, by letting a DISubrangeType
refer to a DIDerivedType. gnat-llvm can then arrange for the DIE
reference to be correct by setting the array type's scope to be the
record.


  Commit: 8d431974c65e35464ce1bf5245172553560edc8c
      https://github.com/llvm/llvm-project/commit/8d431974c65e35464ce1bf5245172553560edc8c
  Author: Nishant Patel <nishant.b.patel at intel.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir

  Log Message:
  -----------
  [MLIR][XeGPU] Change index arithmetic ops to arith op (#170581)

This PR fixes the failure caused in the post-merge of PR #169571


  Commit: e60a69ab8a9e75e730c3c93335f6366b747488d5
      https://github.com/llvm/llvm-project/commit/e60a69ab8a9e75e730c3c93335f6366b747488d5
  Author: Jim Lin <jim at andestech.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M clang/include/clang/Frontend/CompilerInvocation.h
    M clang/lib/Driver/ToolChains/CommonArgs.cpp
    M clang/lib/Frontend/CompilerInvocation.cpp

  Log Message:
  -----------
  [Clang] Reuse the function getOptimizationLevel in tools::addLTOOptions. (#169762)


  Commit: b8a5888d8d32246fd36d2f65bd917f03aa296e48
      https://github.com/llvm/llvm-project/commit/b8a5888d8d32246fd36d2f65bd917f03aa296e48
  Author: Victor Mustya <victor.mustya at intel.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M libclc/opencl/include/clc/opencl/synchronization/utils.h

  Log Message:
  -----------
  [libclc] Fix memory fence scope mapping for OpenCL (#170542)

The function `__opencl_get_memory_scope` incorrectly assumed that the
Clang built-in `__MEMORY_SCOPE_*` macros defined as bitmasks, while they
are actually defined as distinct integer values. This led to incorrect
mapping of OpenCL memory fence flags to LLVM memory scopes, causing
issues in generated code.

The fix involves updating the `__opencl_get_memory_scope` function to
return the correct `__MEMORY_SCOPE_*` values based on the provided
`cl_mem_fence_flags`. Additionally, the `__opencl_get_memory_semantics`
and the `__opencl_get_memory_scope` functions are marked as `static`
to avoid potential multiple definition issues during linking.


  Commit: c2409b4bcaca6662f86f7c9956f27413a7aecf0e
      https://github.com/llvm/llvm-project/commit/c2409b4bcaca6662f86f7c9956f27413a7aecf0e
  Author: Shih-Po Hung <shihpo.hung at sifive.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
    M llvm/include/llvm/CodeGen/BasicTTIImpl.h
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
    M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
    M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
    M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    M llvm/lib/Target/X86/X86TargetTransformInfo.h

  Log Message:
  -----------
  [TTI] Remove masked/gather-scatter/strided/expand-compress costing from TTIImpl (#169885)

Following #165532, this patch moves scalarization‑cost computation into
BaseT::getMemIntrinsicCost and lets backends override it via their
getMemIntrinsicCost.
It also removes the masked/gather‑scatter/strided/expand‑compress
costing interfaces from TTIImpl.
Targets may keep them locally if needed.

Stacked on #170426 and #170436.


  Commit: 4afc2562fb79eecb218777fe85cbc420b903a70e
      https://github.com/llvm/llvm-project/commit/4afc2562fb79eecb218777fe85cbc420b903a70e
  Author: Peter Collingbourne <pcc at google.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/docs/LangRef.rst
    M llvm/include/llvm/IR/Intrinsics.td
    M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
    A llvm/test/Transforms/PreISelIntrinsicLowering/protected-field-pointer-addrspace1.ll
    A llvm/test/Transforms/PreISelIntrinsicLowering/protected-field-pointer.ll

  Log Message:
  -----------
  Add llvm.protected.field.ptr intrinsic and pre-ISel lowering.

This intrinsic is used to implement pointer field protection.
For more information, see the included LangRef update and the RFC:
https://discourse.llvm.org/t/rfc-structure-protection-a-family-of-uaf-mitigation-techniques/85555

Reviewers: nikic, fmayer, ahmedbougacha

Reviewed By: nikic, fmayer

Pull Request: https://github.com/llvm/llvm-project/pull/151647


  Commit: e60d62b90f83210f43816fb528e6557ab1770683
      https://github.com/llvm/llvm-project/commit/e60d62b90f83210f43816fb528e6557ab1770683
  Author: Peter Collingbourne <pcc at google.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
    M llvm/lib/Transforms/Utils/Local.cpp
    A llvm/test/Transforms/PhaseOrdering/phi-protected-field-ptr.ll

  Log Message:
  -----------
  Utils: Inhibit load/store folding through phis for llvm.protected.field.ptr.

Protected pointer field loads/stores should be paired with the intrinsic
to avoid unnecessary address escapes.

Reviewers: nikic

Reviewed By: nikic

Pull Request: https://github.com/llvm/llvm-project/pull/151649


  Commit: dc0fa08d336a505dffa8445c5e19e508806c38d3
      https://github.com/llvm/llvm-project/commit/dc0fa08d336a505dffa8445c5e19e508806c38d3
  Author: donald chen <chenxunyu1993 at gmail.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M mlir/include/mlir/Analysis/Presburger/IntegerRelation.h
    M mlir/lib/Analysis/Presburger/IntegerRelation.cpp

  Log Message:
  -----------
  [MLIR][Presburger] optimize bound computation by pruning orthogonal constraints (#164199)

IntegerRelation uses Fourier-Motzkin elimination and Gaussian
elimination to simplify constraints. These methods may repeatedly
perform calculations and elimination on irrelevant variables.
Preemptively eliminating irrelevant variables and their associated
constraints can speed up up the calculation process.


  Commit: a29b29c4c650ec0b3113ae3008670746446f2239
      https://github.com/llvm/llvm-project/commit/a29b29c4c650ec0b3113ae3008670746446f2239
  Author: Jinjie Huang <huangjinjie at bytedance.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/lib/DWP/DWP.cpp
    A llvm/test/tools/llvm-dwp/X86/soft_stop.test

  Log Message:
  -----------
  [llvm-dwp] Fix FoundCUUnit problem on soft-stop with DWARF5 (#169783)

Currently, when a 'soft-stop' is triggered due to debug_info overflow,
there is an additional check for Dwarf5 to verify if the dwo contains a
split_compile unit (CU). However, since split_type units (TUs) are
typically placed before CUs in debug_info for Dwarf5, if an overflow is
detected within a TU causing an early break, the logic incorrectly
assumes this DWO lacks a CU and triggers an error.

Since the overflowing DWO will be discarded anyway, this validation is
redundant. This patch tries to fix this by removing the CU check during
a soft-stop.

Before this patch：
```
llvm-dwp main.dwo -continue-on-cu-index-overflow=soft-stop -o main.dwp
warning: debug_info Section Contribution Offset overflow 4G. Previous Offset 4294967271, After overflow offset 38.
error: no compile unit found in file: main.dwo
```
After：
```bash
llvm-dwp main.dwo -continue-on-cu-index-overflow=soft-stop -o main.dwp
warning: debug_info Section Contribution Offset overflow 4G. Previous Offset 4294967271, After overflow offset 38.
```


  Commit: e5c3a538a725f29f5e66b6a76cd09846b46aef7a
      https://github.com/llvm/llvm-project/commit/e5c3a538a725f29f5e66b6a76cd09846b46aef7a
  Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/test/CodeGen/AArch64/fp-maximumnum-minimumnum.ll
    M llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
    M llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
    M llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll
    M llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll
    M llvm/test/CodeGen/Mips/fp-maximumnum-minimumnum.ll
    M llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll

  Log Message:
  -----------
  expandFMINIMUMNUM_FMAXIMUMNUM: Improve compare between zeros (#140193)

1. On GPR32 platform, expandIS_FPCLASS may fail due to ISD::BITCAST
double to int64 may fail. Let's FP_ROUND double to float first.
Since we use it if MinMax is zero only, so the flushing won't
break anything.
    
2. Only one IS_FPCLASS is needed. MinMax will always be RHS if equal.
So we can select between LHS and MinMax.
It will even safe if FP_ROUND flush a small LHS, as if LHS is not zero
then, MinMax won't be Zero, so we will always use MinMax.

---------

Co-authored-by: Nikita Popov <github at npopov.com>
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>


  Commit: 5b30750893ce3e005c5b1f7da963ab0adcf4cb61
      https://github.com/llvm/llvm-project/commit/5b30750893ce3e005c5b1f7da963ab0adcf4cb61
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/waitcnt-debug.mir

  Log Message:
  -----------
  [AMDGPU] Readd assertions requirement to test after #170468

This was removed in #170468 now that debug counters are enabled by
default rather than requiring asserts. This AMDGPU test exercises
functionality in SIInsertWaitcnts.cpp that is fully wrapped in NDEBUG
though, so this test still needs an assertions requirement to pass.


  Commit: a82b97c524e851b0807b95c34a2154a2cbce9bdf
      https://github.com/llvm/llvm-project/commit/a82b97c524e851b0807b95c34a2154a2cbce9bdf
  Author: Fabian Parzefall <parzefall at meta.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/lib/CodeGen/BasicBlockSections.cpp
    M llvm/test/CodeGen/Generic/machine-function-splitter.ll

  Log Message:
  -----------
  [CodeGen] Fix lpad padding at section start after empty block (#112595)

If a landing pad is at the very start of a split section, it has to be
padded by a nop instruction. Otherwise its offset is marked as zero in
the LSDA, which means no landing pad (leading it to be skipped).

LLVM already handles this. If a landing pad is the first machine block
in a section, a nop is inserted to ensure a non-zero offset. However, if
the landing pad is preceeded by an empty block, the nop would be
omitted.

To fix this, this patch adds a field to machine blocks indicating
whether this block contains the first instruction in its section. This
variable is then used to determine whether to emit the padding.

Co-authored-by: Jinjie Huang <huangjinjie at bytedance.com>


  Commit: 2222cfe7e11ff3e0434bc696856629199ef0da7c
      https://github.com/llvm/llvm-project/commit/2222cfe7e11ff3e0434bc696856629199ef0da7c
  Author: Thomas Munro <thomas.munro at gmail.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/include/llvm-c/OrcEE.h
    M llvm/lib/ExecutionEngine/Orc/OrcV2CBindings.cpp

  Log Message:
  -----------
  [C-API] LLVMOrcCreateObjectLinkingLayerWithInProcessMemoryManager (#169862)

Allow C programs to use JITLink with trivial new C-API wrapper. Modeled
on `LLVMOrcCreateRTDyldObjectLinkingLayerWithSectionMemoryManager`
except that it has to deal with failure of
`jitlink::InProcessMemoryManager::Create()`. Function name suggested by
@lhames in https://github.com/llvm/llvm-project/issues/106203.

I suppose failure of underlying platform-specific things like
`sysconf(_SC_PAGESIZE)` shouldn't really happen. An alternative error
reporting style might be to follow
`LLVMOrcCreateDynamicLibrarySearchGeneratorForProcess` and return
`LLVMErrorRef` with an output parameter for the `LLVMOrcObjectLayerRef`,
but then it wouldn't be a drop-in replacement for
`LLVMOrcCreateRTDyldObjectLinkingLayerWithSectionMemoryManager`.
Thoughts?

This is wanted by PostgreSQL (branch using this API:
https://github.com/macdice/postgres/tree/llvm-22-proposed-c-api). (We're
also using `LLVMCreatePerfJITEventListener`,
`LLVMCreatePerfJITEventListener`,
`LLVMOrcRTDyldObjectLinkingLayerRegisterJITEventListener`, so it looks
like we'll need to research `PerfSupportPlugin`,
`DebuggerSupportPlugin`, `ObjectLinkingLayer::addPlugin()`...)


  Commit: e891ff3058c889944eaa077f99d21a371b091ab2
      https://github.com/llvm/llvm-project/commit/e891ff3058c889944eaa077f99d21a371b091ab2
  Author: Jordan Rupprecht <rupprecht at google.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Utils/ModuleUtils.cpp

  Log Message:
  -----------
  [KCFI][NFC] Remove unused header (#170599)

In addition to being unused, this forms a layering violation between
Transforms/Utils and Transforms/Instrumentation


  Commit: c44b9ec5255cc8f645efc3a5b4d74566613d09b5
      https://github.com/llvm/llvm-project/commit/c44b9ec5255cc8f645efc3a5b4d74566613d09b5
  Author: Jordan Rupprecht <rupprecht at google.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
    M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel

  Log Message:
  -----------
  [bazel][clang][DependencyScanning] Port #169962: clang dependency scanner deps (#170600)


  Commit: c08f49b685052092362e5afbcd7bdbf659195a7a
      https://github.com/llvm/llvm-project/commit/c08f49b685052092362e5afbcd7bdbf659195a7a
  Author: Sebastian Pop <spop at nvidia.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/include/llvm/Analysis/Delinearization.h
    M llvm/lib/Analysis/Delinearization.cpp
    M llvm/lib/Analysis/DependenceAnalysis.cpp
    M polly/lib/Analysis/ScopBuilder.cpp

  Log Message:
  -----------
  [delinearize] use SCEV exprs in getIndexExpressionsFromGEP (#162888)

clean up interface of getIndexExpressionsFromGEP to get SCEV expressions
instead of int for Sizes of the arrays.
This intends to simplify the code in #156342 by avoiding conversions
from SCEV to int and back to SCEV.


  Commit: d5b1afb141819c21fb06228303abc77b344feefd
      https://github.com/llvm/llvm-project/commit/d5b1afb141819c21fb06228303abc77b344feefd
  Author: Jordan Rupprecht <rupprecht at google.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    R utils/bazel/third_party_build/BUILD
    A utils/bazel/third_party_build/BUILD.bazel

  Log Message:
  -----------
  [bazel][NFC] Rename third_party_build/BUILD -> BUILD.bazel (#169709)

All other build files are named BUILD.bazel, not sure why this one is
different.


  Commit: 896288d0b42f3e984dc3587c15091cbbf7d7b723
      https://github.com/llvm/llvm-project/commit/896288d0b42f3e984dc3587c15091cbbf7d7b723
  Author: Shaoce SUN <sunshaoce at outlook.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/test/tools/llvm-exegesis/RISCV/latency-by-extension-C.s
    M llvm/tools/llvm-exegesis/lib/RISCV/Target.cpp
    M llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp

  Log Message:
  -----------
  [Exegesis][RISCV] Support C_LDSP for llvm-exegesis (#169660)

Fix error:
```
*** Bad machine code: Illegal physical register for instruction ***
- function:    foo
- basic block: %bb.0  (0x5e2262bd3f20)
- instruction: $x10 = C_LDSP $x10, 0
- operand 1:   $x10
$x10 is not a SP register.
llvm-exegesis error: The machine function failed verification.
```


  Commit: cb5ccabbad0b2627dc9355e707233be136236d45
      https://github.com/llvm/llvm-project/commit/cb5ccabbad0b2627dc9355e707233be136236d45
  Author: Piotr Fusik <p.fusik at samsung.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVGISel.td
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td

  Log Message:
  -----------
  [RISCV][NFC] Simplify Imm range checks (#170497)


  Commit: 46ef57a78bec4c8f8c6837e665becf785f0c0290
      https://github.com/llvm/llvm-project/commit/46ef57a78bec4c8f8c6837e665becf785f0c0290
  Author: Durgadoss R <durgadossr at nvidia.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
    M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
    M mlir/test/Target/LLVMIR/nvvm/mbar_invalid.mlir
    A mlir/test/Target/LLVMIR/nvvm/mbar_try_wait.mlir

  Log Message:
  -----------
  [MLIR][NVVM] Add mbarrier.try_wait Op (#170285)

This patch adds an Op for mbarrier.try_wait operation which lowers
to the corresponding intrinsics. This Op has support for an optional
time-limit, state-or-phase as well as relaxed memory semantics,
completing the features on this Op up to Blackwell.

Unlike the existing `nvvm.mbarrier.try_wait.parity` Op, this Op
does not provide a _blocking_ implementation. We intend to
add looping around this at NVGPU in a subsequent PR
(and deprecate the inline-asm based Op here).

lit tests are added to verify the lowering to the intrinsics.

Signed-off-by: Durgadoss R <durgadossr at nvidia.com>


  Commit: 9a71eff97713a88cbb5ed3e724d24a8651a04d1a
      https://github.com/llvm/llvm-project/commit/9a71eff97713a88cbb5ed3e724d24a8651a04d1a
  Author: Jim Lin <jim at andestech.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte16.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte32.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte64.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte8.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettk.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettm.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettnt.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste16.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste32.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste64.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste8.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtdiscard.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtzero_t.ll

  Log Message:
  -----------
  [RISCV] Remove zvfh and experimental-zvfbfmin from the tests for xsfmm. (#170589)

Those testcases don't need zvfh and experimental-zvfbfmin.


  Commit: 44d419768cd2ed97609fe1040205eea1c3498f3e
      https://github.com/llvm/llvm-project/commit/44d419768cd2ed97609fe1040205eea1c3498f3e
  Author: Jesse Huang <jesse.huang at sifive.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVIndirectBranchTracking.cpp
    M llvm/test/CodeGen/RISCV/lpad.ll

  Log Message:
  -----------
  [RISCV] Emit lpad for function with returns-twice attribute (#170520)

Insert the landing pad after the functions with attribute "returns-twice"
as such function could return from a indirect branch (e.g. `setcontext`,
`swapcontext`, `setjmp`), so that they could use a normal indirect branch
which is safer than a software-guarded branch.


  Commit: 41a6a0a1d249507e59e10d3585aad435ee57289a
      https://github.com/llvm/llvm-project/commit/41a6a0a1d249507e59e10d3585aad435ee57289a
  Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/docs/AMDGPUUsage.rst

  Log Message:
  -----------
  [AMDGPU] Add some more product names for GPUs (#170469)


  Commit: a78418764a9cd0041fc1a03ef5be8a48080ad6b1
      https://github.com/llvm/llvm-project/commit/a78418764a9cd0041fc1a03ef5be8a48080ad6b1
  Author: Sebastian Pop <spop at nvidia.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/lib/Analysis/Delinearization.cpp

  Log Message:
  -----------
  [delinearize] clear Subscripts and Sizes vectors (NFC) (#156495)


  Commit: 3c5fd492d464844e979cf1140a91c7b57ebd2a90
      https://github.com/llvm/llvm-project/commit/3c5fd492d464844e979cf1140a91c7b57ebd2a90
  Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp

  Log Message:
  -----------
  AMDGPU/PromoteAlloca: Extract getVectorTypeForAlloca helper (#170509)


  Commit: 6c73f5e7170bc4b3111f935285ced4033a098644
      https://github.com/llvm/llvm-project/commit/6c73f5e7170bc4b3111f935285ced4033a098644
  Author: Zhen Wang <37195552+wangzpgi at users.noreply.github.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M flang/lib/Lower/OpenACC.cpp
    A flang/test/Lower/OpenACC/Todo/acc-cache.f90
    M flang/test/Lower/OpenACC/acc-loop.f90

  Log Message:
  -----------
  [flang][acc] Add TODO for cache directive lowering (#170608)

The OpenACC cache directive is not yet fully implemented. Add a TODO to
emit a clear "not yet implemented" error during lowering.


  Commit: 4fcb6e11c1de0469e3c3b08de9a9e488ec63e193
      https://github.com/llvm/llvm-project/commit/4fcb6e11c1de0469e3c3b08de9a9e488ec63e193
  Author: Luke Lau <luke at igalia.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
    M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.ll
    M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.mir

  Log Message:
  -----------
  [RISCV] Commute Src in foldVMV_V_V (#170536)

In #156499 we taught the vmerge peephole to commute operands so that the
passthru operands lined up. We can do the same for the vmv.v.v peephole,
which allows us fold more vmv.v.vs away.

This is needed to prevent a regression in an upcoming patch that adds a
combine for vmerge.vvm to vmv.v.v.


  Commit: c8a7a3a70d607eee2cf134e43fc717d317a605e8
      https://github.com/llvm/llvm-project/commit/c8a7a3a70d607eee2cf134e43fc717d317a605e8
  Author: Jean-Didier PAILLEUX <jean-didier.pailleux at sipearl.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M flang/include/flang/Evaluate/intrinsics.h
    M flang/lib/Evaluate/intrinsics.cpp
    M flang/test/Semantics/doconcurrent01.f90

  Log Message:
  -----------
  [flang][Evaluate] Add IntrinsicCall::impureFunction to RAND and IRAND (#170492)

This PR adds the` impureFunction` intrinsicClass for intrinsics wich are
function such as RAND and IRAND, which are not PURE functions in the GNU
extension and therefore cannot be called in a DO CONCURRENT (see
`test-suite::gfortran-regression-compile-regression__pr119836_2_f90.test`
). The `Pure` attribute will not be added for these intrinsics.


  Commit: 0fa066b62954b0d8d4d88140d4c53f79f66f5c7c
      https://github.com/llvm/llvm-project/commit/0fa066b62954b0d8d4d88140d4c53f79f66f5c7c
  Author: Brandon Wu <brandon.wu at sifive.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte16.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte32.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte64.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte8.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettk.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettm.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettnt.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste16.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste32.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste64.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste8.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtdiscard.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtmv_t_v.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtmv_v_t.ll
    M llvm/test/CodeGen/RISCV/rvv/sifive_sf_vtzero_t.ll

  Log Message:
  -----------
  [NFC][RISCV] Cleanup unused attributes in xsfmm tests (#170601)

This is followup patch of #170589


  Commit: e66e8aac6e4c0cc3874cabad736233440b0ffb1e
      https://github.com/llvm/llvm-project/commit/e66e8aac6e4c0cc3874cabad736233440b0ffb1e
  Author: Jianjian Guan <jacquesguan at me.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    A llvm/test/CodeGen/RISCV/GlobalISel/rvv/extract-subvector.ll

  Log Message:
  -----------
  [RISCV][GISel] Support select G_EXTRACT_SUBVECTOR (#169789)


  Commit: 186c9a71be62dc9928e1189b10a7b6de832e41f6
      https://github.com/llvm/llvm-project/commit/186c9a71be62dc9928e1189b10a7b6de832e41f6
  Author: ZhaoQi <zhaoqi01 at loongson.cn>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    A llvm/test/CodeGen/LoongArch/lasx/shuffle-as-bswap.ll
    A llvm/test/CodeGen/LoongArch/lsx/shuffle-as-bswap.ll

  Log Message:
  -----------
  [LoongArch][NFC] Pre-commit tests for shufflevector reversing within subvectors (#170621)


  Commit: 1efb5378cd393fdbac7030485c08a47cacde0b45
      https://github.com/llvm/llvm-project/commit/1efb5378cd393fdbac7030485c08a47cacde0b45
  Author: YongKang Zhu <yongzhu at fb.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M bolt/lib/Passes/IdenticalCodeFolding.cpp
    A bolt/test/AArch64/safe-icf.s

  Log Message:
  -----------
  [BOLT][AArch64] Enable safe ICF (#170172)

All the pieces required seem to have already been in place so just
need to enable the option. Also added one more string prefix for
vtable recognition.


  Commit: 38994f47b6d88db7191d3f7b6cf6f63bb204f3a4
      https://github.com/llvm/llvm-project/commit/38994f47b6d88db7191d3f7b6cf6f63bb204f3a4
  Author: Cullen Rhodes <cullen.rhodes at arm.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    A llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/basic-instructions.s
    A llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/mte-instructions.s
    A llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/rcpc-immo-instructions.s
    M llvm/test/tools/llvm-mca/AArch64/Neoverse/N1-basic-instructions.s
    M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-basic-instructions.s
    M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-mte-instructions.s
    A llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-rcpc-immo-instructions.s
    M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-basic-instructions.s
    M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-mte-instructions.s
    A llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-rcpc-immo-instructions.s
    M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-basic-instructions.s
    A llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-rcpc-immo-instructions.s
    M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-basic-instructions.s
    A llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-mte-instructions.s
    A llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-rcpc-immo-instructions.s
    M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-basic-instructions.s
    A llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-mte-instructions.s
    A llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-rcpc-immo-instructions.s
    M llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-basic-instructions.s
    A llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-rcpc-immo-instructions.s

  Log Message:
  -----------
  [llvm-mca][AArch64] Refactor Neoverse tests to split out common inputs (NFC) (#170324)

For many of these tests the inputs are very similiar with slight
divergences, ideally we'd have common sources where we can to avoid
subtle differences.

Changes:

- For basic tests there's a relatively large diff between V1 and all
other cores because of 24f0901 (#128892) which makes it more complete.
I've been thru the entire diff and 99% of the time V1 makes more sense,
except for a couple of small changes (might post a separate patch for).
Therefore I decided it's best to take V1-basic-instructions.s as the
common source.
- Split out FEAT_RCPC_IMMO tests from basic since N1 doesnt have this
feature.
- Split out FEAT_MTE tests. V2/V3 also have this feature but were
missing tests, so I've added them.
- Take 16-bit load/store register offset from V2/V3 (better coverage).

The NEON and SVE tests are also quite substantial and could be made
common, but there's also subtle differences that take time to go thru.


  Commit: 8993c932e19778605362b28dedbf124c2077b133
      https://github.com/llvm/llvm-project/commit/8993c932e19778605362b28dedbf124c2077b133
  Author: Cullen Rhodes <cullen.rhodes at arm.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SchedNeoverseN1.td
    M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td

  Log Message:
  -----------
  [AArch64] Compare and branch set twice in Neoverse V1/N1 sched (NFC) (#170498)

The regex instruction match is unnecessary, these are already wired up
to the instructions via WriteBr.


  Commit: e84fdbe1ef09c7c1ed2fab688607cf4b406fb395
      https://github.com/llvm/llvm-project/commit/e84fdbe1ef09c7c1ed2fab688607cf4b406fb395
  Author: Robert Imschweiler <robert.imschweiler at amd.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/docs/LangRef.rst
    M llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
    M llvm/lib/IR/Verifier.cpp
    A llvm/test/Assembler/callbr.ll
    A llvm/test/CodeGen/AMDGPU/callbr-intrinsics.ll
    A llvm/test/Verifier/callbr-intrinsic.ll

  Log Message:
  -----------
  [IR] Add CallBr intrinsics support (#133907)

This commit adds support for using intrinsics with callbr. The uses of
this will most of the time look like this example:
```llvm
  callbr void @llvm.amdgcn.kill(i1 %c) to label %cont [label %kill]
kill:
  unreachable
cont:
  ...
```


  Commit: fda85a14234d834edbda85361f0f4064f04703a2
      https://github.com/llvm/llvm-project/commit/fda85a14234d834edbda85361f0f4064f04703a2
  Author: Stephen Tozer <stephen.tozer at sony.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp

  Log Message:
  -----------
  [DebugInfo][LoopVectorizer][NFC] Use unknown annotations for more instructions (#170522)

Some recent patches have added more non-annotated empty locations to the
loop vectorizer, resulting in errors reported on the DebugLoc coverage
tracking buildbot:
https://lab.llvm.org/staging/#/builders/222/builds/1938

This patch adds "unknown" annotations in place of the empty locations,
allowing the buildbot to ignore them for now.


  Commit: 29afd5a9ffd33f52c5061ae2070f4b6f23f2971f
      https://github.com/llvm/llvm-project/commit/29afd5a9ffd33f52c5061ae2070f4b6f23f2971f
  Author: mitchell <mitchell.xu2 at gmail.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M clang-tools-extra/clang-tidy/readability/InconsistentDeclarationParameterNameCheck.cpp
    M clang-tools-extra/docs/ReleaseNotes.rst
    M clang-tools-extra/test/clang-tidy/checkers/readability/inconsistent-declaration-parameter-name.cpp

  Log Message:
  -----------
  [clang-tidy] Fix false-positive in inconsistent-declaration-parameter-name (#170593)

Closes #169195


  Commit: 52113cf14f8f8163d921e2ed7be9378be2b1a857
      https://github.com/llvm/llvm-project/commit/52113cf14f8f8163d921e2ed7be9378be2b1a857
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll

  Log Message:
  -----------
  AMDGPU: Fix broken exp10 lowering for f16 (#170582)

This was calling the exp handling, so multiplying by the wrong
constant.

GlobalISel is still broken, but missing the fast exp10 path.
This is tracked in https://github.com/llvm/llvm-project/issues/170576


  Commit: ff89558e4e51a148e5c198068eea85d265a5da9f
      https://github.com/llvm/llvm-project/commit/ff89558e4e51a148e5c198068eea85d265a5da9f
  Author: Shih-Po Hung <shihpo.hung at sifive.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp

  Log Message:
  -----------
  [VPlan] Fix opcode in LoadStore EVL recipe (#170594)

After #169885 lands, vp_load/vp_store are handled by
getMemIntrinsicInstrCost, so we can use the correct opcode here.


  Commit: e5603da73dc2299c635e1040506039c14e77e4aa
      https://github.com/llvm/llvm-project/commit/e5603da73dc2299c635e1040506039c14e77e4aa
  Author: Jack Styles <jack.styles at arm.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp

  Log Message:
  -----------
  [mlir][OpenMP] Fix assert in processing of dist_schedule (#170269)

When #152736 was initially merged, the assert that checks for the
chunksize when applying a static-chunked schedule was incorrect. While
it would not have changed the behaviour of the assert, the string
attached to it would have been emitted in cases where it was simplified.

This was raised here:
https://github.com/llvm/llvm-project/pull/152736#discussion_r2578314276

Testing for this was explored, but this assert is a last chance failure
point that should never be reached as applyWorkshareLoop decides the
`EffectiveScheduleType` based on the existence of `ChunkSize` or
`DistScheduleChunkSize`, so this will only trigger if there are issues
with that conversion, and UnitTesting already exists for
`applyWorkshareLoop`


  Commit: a25e3674ae653ddc1443ea4a46f513f1704c5531
      https://github.com/llvm/llvm-project/commit/a25e3674ae653ddc1443ea4a46f513f1704c5531
  Author: Gergely Bálint <gergely.balint at arm.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    R bolt/docs/PacRetDesign.md
    A bolt/docs/PointerAuthDesign.md
    R bolt/include/bolt/Passes/InsertNegateRAStatePass.h
    R bolt/include/bolt/Passes/MarkRAStates.h
    A bolt/include/bolt/Passes/PointerAuthCFIAnalyzer.h
    A bolt/include/bolt/Passes/PointerAuthCFIFixup.h
    M bolt/lib/Core/Exceptions.cpp
    M bolt/lib/Passes/CMakeLists.txt
    R bolt/lib/Passes/InsertNegateRAStatePass.cpp
    R bolt/lib/Passes/MarkRAStates.cpp
    A bolt/lib/Passes/PointerAuthCFIAnalyzer.cpp
    A bolt/lib/Passes/PointerAuthCFIFixup.cpp
    M bolt/lib/Rewrite/BinaryPassManager.cpp
    R bolt/test/AArch64/negate-ra-state-disallow.s
    R bolt/test/AArch64/negate-ra-state-incorrect.s
    R bolt/test/AArch64/negate-ra-state-reorder.s
    R bolt/test/AArch64/negate-ra-state.s
    A bolt/test/AArch64/pacret-cfi-disallow.s
    A bolt/test/AArch64/pacret-cfi-incorrect.s
    A bolt/test/AArch64/pacret-cfi-reorder.s
    A bolt/test/AArch64/pacret-cfi.s
    M bolt/test/AArch64/pacret-split-funcs.s
    R bolt/test/runtime/AArch64/negate-ra-state.cpp
    A bolt/test/runtime/AArch64/pacret-eh-function-split.cpp
    A bolt/test/runtime/AArch64/pacret-eh.cpp
    R bolt/test/runtime/AArch64/pacret-function-split.cpp
    M bolt/unittests/Passes/CMakeLists.txt
    R bolt/unittests/Passes/InsertNegateRAState.cpp
    A bolt/unittests/Passes/PointerAuthCFIFixup.cpp
    M llvm/utils/gn/secondary/bolt/lib/Passes/BUILD.gn

  Log Message:
  -----------
  [BOLT] Rename Pointer Auth DWARF rewriter passes (#164622)

Rename passes to names that better reflect their intent, 
and describe their relationship to each other.

InsertNegateRAStatePass renamed to PointerAuthCFIFixup,
MarkRAStates renamed to PointerAuthCFIAnalyzer.

Added the --print-<passname> flags for these passes.


  Commit: 0ba73fb0f0d2bc7d89b96d92a19f6a50ebd89c74
      https://github.com/llvm/llvm-project/commit/0ba73fb0f0d2bc7d89b96d92a19f6a50ebd89c74
  Author: peter mckinna <peter.mckinna at gmail.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/docs/ReleaseNotes.md
    M llvm/include/llvm-c/Core.h
    M llvm/lib/IR/Core.cpp
    M llvm/unittests/IR/ConstantsTest.cpp

  Log Message:
  -----------
  [llvm-c] Add LLVMConstFPFromBits() API (#164381)

This change adds the ability to create a 128 bit floating point value
from 2 64 bit integer values.
Some language frontends have already parsed a floating point string into
a proper 128 bit quad value
and need to get the llvm value directly.


  Commit: 11b1bd50b391c20d343f02be7b3a03c56a09c307
      https://github.com/llvm/llvm-project/commit/11b1bd50b391c20d343f02be7b3a03c56a09c307
  Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/lib/Analysis/DependenceAnalysis.cpp

  Log Message:
  -----------
  [DA] Fix typo: Constan -> Constant (NFC) (#170636)


  Commit: f6cbd7a6df25eddfd1db58e5f874fd98a6f8148e
      https://github.com/llvm/llvm-project/commit/f6cbd7a6df25eddfd1db58e5f874fd98a6f8148e
  Author: Mikael Holmen <mikael.holmen at ericsson.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/tools/llvm-profgen/ProfiledBinary.cpp

  Log Message:
  -----------
  [llvm-profgen] Fix warnings when building without asserts [NFC]

Building without asserts we got:
 ../tools/llvm-profgen/ProfiledBinary.cpp:627:14: error: unused variable 'Err' [-Werror,-Wunused-variable]
   627 |         bool Err = MIA->evaluateBranch(Inst, Address, Size, Target);
       |              ^~~
 ../tools/llvm-profgen/ProfiledBinary.cpp:1172:14: error: unused variable 'TopProbe' [-Werror,-Wunused-variable]
  1172 |         auto TopProbe = TopLevelProbes.begin();
       |              ^~~~~~~~
 2 errors generated.

Add [[maybe_unused]] to the variables just used in asserts.


  Commit: 5cd1aa0e585fc2f4a0d19ee411715c66fc31f7d3
      https://github.com/llvm/llvm-project/commit/5cd1aa0e585fc2f4a0d19ee411715c66fc31f7d3
  Author: Mikael Holmen <mikael.holmen at ericsson.com>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:

  Log Message:
  -----------
  [𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.5-bogner

[skip ci]


  Commit: 728f9064e97b81b3a50ae5ce118f8634aa67c9e3
      https://github.com/llvm/llvm-project/commit/728f9064e97b81b3a50ae5ce118f8634aa67c9e3
  Author: Alexis Engelke <engelke at in.tum.de>
  Date:   2025-12-06 (Sat, 06 Dec 2025)

  Changed paths:
    M llvm/include/llvm/Passes/PassPlugin.h

  Log Message:
  -----------
  Fix Clang warning

Created using spr 1.3.5-bogner


Compare: https://github.com/llvm/llvm-project/compare/0591c2d37470...728f9064e97b

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