[all-commits] [llvm/llvm-project] 7e897e: [AArch64][GlobalISel] Removed fallback for sqshlu ...

[Joshua Rodriguez via All-commits]

  Branch: refs/heads/users/JoshdRod/shift-fallbacks/02-rshift-fallbacks
  Home:   https://github.com/llvm/llvm-project
  Commit: 7e897eac1eee87148b1f3529a42e4b927b556d44
      https://github.com/llvm/llvm-project/commit/7e897eac1eee87148b1f3529a42e4b927b556d44
  Author: Josh Rodriguez <josh.rodriguez at arm.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrGISel.td
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
    M llvm/test/CodeGen/AArch64/arm64-vshift.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Removed fallback for sqshlu intrinsic

Added G_SQSHLU node, which lowers the llvm ir intrinsic aarch64_neon_sqshlu to the machine intrinsic sqshlu. Generated code is slightly less efficient compare to SDAG.


  Commit: dbbf2b148dc8534e14d4f780e1e1382a3227d9ed
      https://github.com/llvm/llvm-project/commit/dbbf2b148dc8534e14d4f780e1e1382a3227d9ed
  Author: Josh Rodriguez <josh.rodriguez at arm.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
    M llvm/test/CodeGen/AArch64/arm64-vshift.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Removed fallback from sqshrn intrinsic

In legalisation, the IR intrinsic is lowered to two GI instructions: a vector right shift (G_VASHR), and a truncate with saturation (G_TRUNC_SSAT_S). The result of the G_VASHR is the operand of the G_TRUNC_SSAT_S. Vectors that are treated as i64/i32 are dealt with in TableGen, so are not handled here.


  Commit: 670e8b9c84a95f5224d420cac66ccf4c80e174d7
      https://github.com/llvm/llvm-project/commit/670e8b9c84a95f5224d420cac66ccf4c80e174d7
  Author: Josh Rodriguez <josh.rodriguez at arm.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
    M llvm/test/CodeGen/AArch64/arm64-vshift.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Removed fallback from sqshrun intrinsic

In legalisation, the IR intrinsic is lowered to two GI instructions: a vector right shift (G_VASHR), and an unsigned truncate with saturation (G_TRUNC_SSAT_U). The result of the G_VASHR is the operand of the G_TRUNC_SSAT_U.


  Commit: ba37ca1786d8e718e8d06ccaf7526e74bd01d03e
      https://github.com/llvm/llvm-project/commit/ba37ca1786d8e718e8d06ccaf7526e74bd01d03e
  Author: Josh Rodriguez <josh.rodriguez at arm.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrGISel.td
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
    M llvm/test/CodeGen/AArch64/arm64-vshift.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Removed fallback for sqrshrn intrinsic

GISel now legalises sqrshrn into G_TRUNC_SSAT_S(G_SRSHR(vec, shift)).


  Commit: ee2a1f02e8422ccb82008f5e3b6b6ede0fd945f6
      https://github.com/llvm/llvm-project/commit/ee2a1f02e8422ccb82008f5e3b6b6ede0fd945f6
  Author: Josh Rodriguez <josh.rodriguez at arm.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
    M llvm/test/CodeGen/AArch64/arm64-vshift.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Removed fallback for sqrshrun intrinsic

GlobalISel now legalises sqrshrun to G_TRUNC_SSAT_U(G_SRSHR(vec, shift)).


  Commit: ef9c6465f5b30d6114f8ca4fa2e71013262c5713
      https://github.com/llvm/llvm-project/commit/ef9c6465f5b30d6114f8ca4fa2e71013262c5713
  Author: Josh Rodriguez <josh.rodriguez at arm.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrGISel.td
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
    M llvm/test/CodeGen/AArch64/arm64-vshift.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Removed fallback for uqrshrn intrinsic

GlobalISel now lowers uqrshrn to G_TRUNC_USATU(G_URSHR(vec, shift)).


  Commit: 6a89b7b7c9f271a6faf1e19f73075f763ae3ba60
      https://github.com/llvm/llvm-project/commit/6a89b7b7c9f271a6faf1e19f73075f763ae3ba60
  Author: Josh Rodriguez <josh.rodriguez at arm.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
    M llvm/test/CodeGen/AArch64/arm64-vshift.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Removed fallback for uqshrn intrinsic

GlobalISel now lowers uqshrn to G_TRUNC_USATU(VLSHR(vec, shift)).


  Commit: 566d54e3985186d1d2a769d0140e944182d1dd2f
      https://github.com/llvm/llvm-project/commit/566d54e3985186d1d2a769d0140e944182d1dd2f
  Author: Josh Rodriguez <josh.rodriguez at arm.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M llvm/test/CodeGen/AArch64/arm64-int-neon.ll
    M llvm/test/CodeGen/AArch64/arm64-vshift.ll

  Log Message:
  -----------
  [AArch64][GlobalISel] Updated test checks


Compare: https://github.com/llvm/llvm-project/compare/7e897eac1eee%5E...566d54e39851

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