[all-commits] [llvm/llvm-project] e209b8: [mlir][AMDGPU] Rename gfx1250 packed extension ops...

[Krzysztof Drewniak via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e209b8bc2f87d53dc9003f7f09ce14b61894bf6c
      https://github.com/llvm/llvm-project/commit/e209b8bc2f87d53dc9003f7f09ce14b61894bf6c
  Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
  Date:   2025-12-04 (Thu, 04 Dec 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
    M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
    M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
    M mlir/test/Conversion/AMDGPUToROCDL/gfx1250.mlir
    M mlir/test/Dialect/AMDGPU/ops.mlir

  Log Message:
  -----------
  [mlir][AMDGPU] Rename gfx1250 packed extension ops, change firstScaleLane (#170718)

The current name of scaled_ext_packed816 was, in retrospect, bothering
me, since it just has a bunch of numbers on the end and doesn't really
reflect the wave-wide nature of the operation.

On top of that, the fact that firstScaleLane was 0 or 1, which might be
read as the first lane being 1 (and not what it actually was, 16), also
seemed weird.

Therefore, before this op sees any use,

1. Renaem it to scaled_ext_packed_matrix
2. Change the semantics of firstScaleLane to actually point at the lane
where the scales start (valid options currently are 0 or 16, the two
halves of a wave32 wave).

(Disclaimer: the mechanical updates were done via AI.)

---------

Co-authored-by: Erick Ochoa Lopez <eochoalo at amd.com>



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