[all-commits] [llvm/llvm-project] eb7db0: [mlir][xegpu] Change `index` arithmetic ops to `ar...

[Charitha Saumya via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: eb7db0b9ecceed9719f841cc789ecaa6d5c9aaef
      https://github.com/llvm/llvm-project/commit/eb7db0b9ecceed9719f841cc789ecaa6d5c9aaef
  Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
  Date:   2025-12-03 (Wed, 03 Dec 2025)

  Changed paths:
    M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
    M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
    M mlir/test/Dialect/XeGPU/subgroup-distribute.mlir
    M mlir/test/Dialect/XeGPU/xegpu-attr-interface.mlir
    M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
    M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
    M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
    M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir

  Log Message:
  -----------
  [mlir][xegpu] Change `index` arithmetic ops to `arith` ops. (#170390)

Index ops cause some issues during SIMT distribution because they don't
have the `Elementwise` mappable trait. This PR replaces all index
arithmetic ops with matching `arith` dialect ops.



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