[all-commits] [llvm/llvm-project] 5c3c00: [NFC] Refactor TargetLowering::getTgtMemIntrinsic ...

[Robert Imschweiler via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5c3c0020af102f4d1887f277ecb726c3ccf00daf
      https://github.com/llvm/llvm-project/commit/5c3c0020af102f4d1887f277ecb726c3ccf00daf
  Author: Robert Imschweiler <robert.imschweiler at amd.com>
  Date:   2025-12-02 (Tue, 02 Dec 2025)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetLowering.h
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    M llvm/lib/Target/ARM/ARMISelLowering.h
    M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
    M llvm/lib/Target/Hexagon/HexagonISelLowering.h
    M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
    M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/lib/Target/PowerPC/PPCISelLowering.h
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
    M llvm/lib/Target/SPIRV/SPIRVISelLowering.h
    M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86ISelLowering.h

  Log Message:
  -----------
  [NFC] Refactor TargetLowering::getTgtMemIntrinsic to take CallBase parameter (#170334)

cf.
https://github.com/llvm/llvm-project/pull/133907#discussion_r2578576548



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