[all-commits] [llvm/llvm-project] b20d35: [AArch64] Combine vector add(trunc(shift)) (#169523)
Marco Elver via All-commits
all-commits at lists.llvm.org
Mon Dec 1 12:27:22 PST 2025
Branch: refs/heads/users/melver/spr/main.clangcodegen-move-alloctoken-pass-to-backend-lto-phases
Home: https://github.com/llvm/llvm-project
Commit: b20d35c4a2b01090e54b8732a3a9d5b69de3e10c
https://github.com/llvm/llvm-project/commit/b20d35c4a2b01090e54b8732a3a9d5b69de3e10c
Author: David Green <david.green at arm.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/addtruncshift.ll
Log Message:
-----------
[AArch64] Combine vector add(trunc(shift)) (#169523)
This adds a combine for
add(trunc(ashr(A, C)), trunc(lshr(A, BW-1))), with C >= BW
->
X = trunc(ashr(A, C)); add(x, lshr(X, BW-1)
The original converts into ashr+lshr+xtn+xtn+add. The second becomes
ashr+xtn+usra. The first form has less total latency due to more
parallelism,
but more micro-ops and seems to be slower in practice.
Commit: cd1ad5a9e08800043f03f73348b56372a983afa2
https://github.com/llvm/llvm-project/commit/cd1ad5a9e08800043f03f73348b56372a983afa2
Author: Wenju He <wenju.he at intel.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
Log Message:
-----------
[CIR] Add missing switch cases for AO__scoped_atomic_uinc/udec_wrap in emitAtomicOp (#169610)
Fix build error: enumeration values 'AO__scoped_atomic_udec_wrap' and
'AO__scoped_atomic_uinc_wrap' not handled in switch [-Werror,-Wswitch]
The two builtins were added in 5d38cddc3b00.
Commit: de4e12849bae65699f705bbf10110366ab36dfc4
https://github.com/llvm/llvm-project/commit/de4e12849bae65699f705bbf10110366ab36dfc4
Author: Gergely Bálint <gergely.balint at arm.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M bolt/unittests/Core/MCPlusBuilder.cpp
Log Message:
-----------
[BOLT] Fix assertion test (#169635)
The AArch64_BTI MCPlusBuilder unittest was failing in no assertion
builds. Add `#ifndef NDEBUG` to exclude the assertion test from
no assertion builds.
Commit: 75ae0e882d923fd08360380e010935dd3e960a1b
https://github.com/llvm/llvm-project/commit/75ae0e882d923fd08360380e010935dd3e960a1b
Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[OpenMP] Add docs for fb_nullify/fb_preserve (#169558)
Adding documentation following the merge of
https://github.com/llvm/llvm-project/pull/168905.
Commit: ff0c347d003098db82db312d5da8ac925c0002dd
https://github.com/llvm/llvm-project/commit/ff0c347d003098db82db312d5da8ac925c0002dd
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h
M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
A llvm/test/tools/opt/infer-data-layout-target-abi.ll
M llvm/tools/opt/optdriver.cpp
Log Message:
-----------
opt: Try to respect target-abi command line option (#169604)
Mips seems kind of broken with these options. n32 seems to
override the 64-bit arch with 32-bit pointers, and trying
to use any 32-bit mips triple also just errors with any
options.
Commit: 35dfeb7b4d720f16e9ded25527a0631d63736d78
https://github.com/llvm/llvm-project/commit/35dfeb7b4d720f16e9ded25527a0631d63736d78
Author: Steven Perron <stevenperron at google.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/OpVariable_order.ll
M llvm/test/CodeGen/SPIRV/SpecConstants/restore-spec-type.ll
M llvm/test/CodeGen/SPIRV/basic_float_types.ll
M llvm/test/CodeGen/SPIRV/basic_int_types.ll
M llvm/test/CodeGen/SPIRV/basic_int_types_spirvdis.ll
M llvm/test/CodeGen/SPIRV/builtin_intrinsics_32.ll
M llvm/test/CodeGen/SPIRV/builtin_intrinsics_64.ll
M llvm/test/CodeGen/SPIRV/builtin_vars-decorate.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
M llvm/test/CodeGen/SPIRV/event-zero-const.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fun-ptr-addrcast.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bfloat16/bfloat16.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_float_controls2/decoration.ll
M llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions-but-one.ll
M llvm/test/CodeGen/SPIRV/freeze.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/AddUint64.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/abs.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log10.ll
M llvm/test/CodeGen/SPIRV/instructions/insertvalue-undef-ptr.ll
M llvm/test/CodeGen/SPIRV/instructions/select-ptr-load.ll
R llvm/test/CodeGen/SPIRV/keep-tracked-const.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/assume.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/bitreverse_small_type.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/constrained-arithmetic.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/lifetime.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/satur-arith.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/uadd.with.overflow.ll
M llvm/test/CodeGen/SPIRV/logical-access-chain.ll
M llvm/test/CodeGen/SPIRV/logical-struct-access.ll
M llvm/test/CodeGen/SPIRV/phi-insert-point.ll
M llvm/test/CodeGen/SPIRV/phi-ptrcast-dominate.ll
M llvm/test/CodeGen/SPIRV/pointers/bitcast-fix-accesschain.ll
M llvm/test/CodeGen/SPIRV/pointers/bitcast-fix-load.ll
M llvm/test/CodeGen/SPIRV/pointers/gep-types-1.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-addressspace.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-base-type.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-bitcast-load.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-kernel-arg-char.ll
M llvm/test/CodeGen/SPIRV/pointers/global-addrspacecast.ll
M llvm/test/CodeGen/SPIRV/pointers/load-addressspace.ll
M llvm/test/CodeGen/SPIRV/pointers/phi-chain-types.ll
M llvm/test/CodeGen/SPIRV/pointers/pointer-addrspacecast.ll
M llvm/test/CodeGen/SPIRV/pointers/ptr-eq-types.ll
M llvm/test/CodeGen/SPIRV/pointers/resource-vector-load-store.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-call-no-bitcast.ll
A llvm/test/CodeGen/SPIRV/remove-dead-type-intrinsics.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse-subbyte.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpGenericCastToPtr.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpPtrCastToGeneric.ll
M llvm/test/CodeGen/SPIRV/transcoding/fcmp.ll
M llvm/test/CodeGen/SPIRV/transcoding/spirv-event-null.ll
M llvm/test/CodeGen/SPIRV/uitofp-with-bool.ll
Log Message:
-----------
[SPIRV] Enable DCE in instruction selection and update tests (#168428)
The instruction selection pass for SPIR-V now performs dead code
elimination (DCE).
This change removes unused instructions, leading to more optimized
SPIR-V output.
As a consequence of this, several tests were updated to ensure their
continued
correctness and to prevent previously tested code from being optimized
away.
Specifically:
- Many tests now store computed values into global variables to ensure
they are
not eliminated by DCE, allowing their code generation to be verified.
- The test `keep-tracked-const.ll` was removed because it no longer
tested
its original intent. The check statements in this test were for
constants
generated when expanding a G_TRUNC instruction, which is now removed by
DCE
instead of being expanded.
- A new test, `remove-dead-type-intrinsics.ll`, was added to confirm
that dead
struct types are correctly removed by the compiler.
These updates improve the SPIR-V backends optimization capabilities and
maintain the robustness of the test suite.
---------
Co-authored-by: Nathan Gauër <github at keenuts.net>
Commit: 0c2701fe7fa002e1befc5f86c268a7964f96d286
https://github.com/llvm/llvm-project/commit/0c2701fe7fa002e1befc5f86c268a7964f96d286
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AMDGPU/R600.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/ARM/ARM.td
M llvm/lib/Target/AVR/AVR.td
M llvm/lib/Target/BPF/BPF.td
M llvm/lib/Target/CSKY/CSKY.td
M llvm/lib/Target/DirectX/DirectX.td
M llvm/lib/Target/Hexagon/Hexagon.td
M llvm/lib/Target/Lanai/Lanai.td
M llvm/lib/Target/LoongArch/LoongArch.td
M llvm/lib/Target/M68k/M68k.td
M llvm/lib/Target/MSP430/MSP430.td
M llvm/lib/Target/Mips/Mips.td
M llvm/lib/Target/NVPTX/NVPTX.td
M llvm/lib/Target/PowerPC/PPC.td
M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
M llvm/lib/Target/RISCV/RISCV.td
M llvm/lib/Target/SPIRV/SPIRV.td
M llvm/lib/Target/Sparc/Sparc.td
M llvm/lib/Target/SystemZ/SystemZ.td
M llvm/lib/Target/VE/VE.td
M llvm/lib/Target/WebAssembly/WebAssembly.td
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/XCore/XCore.td
M llvm/lib/Target/Xtensa/Xtensa.td
Log Message:
-----------
CodeGen: Make all targets override pseudos with pointers (#159881)
This eliminates the need to have PointerLikeRegClass handling in
codegen.
Commit: 6e983e3876afe5e502d96cef3d4b0fbb7cd068ed
https://github.com/llvm/llvm-project/commit/6e983e3876afe5e502d96cef3d4b0fbb7cd068ed
Author: Steven Perron <stevenperron at google.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVCBufferAccess.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVIRMapping.h
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
A llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer-peeled-array-minimal.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer-peeled-array.ll
Log Message:
-----------
[SPIRV] Support Peeled Array Layouts for HLSL CBuffers (#169078)
This commit adds support for 'peeled arrays' in HLSL constant buffers.
HLSL CBuffers may have padding between array elements but not after the
last element. This is represented in LLVM IR as {[N-1 x {T, pad}], T}.
Changes include:
- Recognition of the peeled array pattern.
- Logic to reconstitute these into SPIR-V compatible arrays.
- Support for spirv.Padding type in GlobalRegistry and Builtins.
- Updates to SPIRVCBufferAccess to correctly calculate member offsets
in these padded structures.
Depends on https://github.com/llvm/llvm-project/pull/169076
Commit: e7bcd80e5bbc9c4c287d835a1df46742ba0fc3e9
https://github.com/llvm/llvm-project/commit/e7bcd80e5bbc9c4c287d835a1df46742ba0fc3e9
Author: Steven Perron <stevenperron at google.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/logical-memcpy.ll
Log Message:
-----------
[SPIRV] Use OpCopyMemory for logical SPIRV memcpy (#169348)
This commit modifies the SPIRV instruction selector to emit
`OpCopyMemory`
instead of `OpCopyMemorySized` when generating SPIRV for logical
addressing.
Previously, `G_MEMCPY` was translated to `OpCopyMemorySized`, which
requires an
explicit size operand. However, for logical SPIRV, the size of the
pointee type
is implicitly known. This change ensures that `OpCopyMemory` is used,
which is
more appropriate for logical SPIRV and aligns with the SPIR-V
specification for
logical addressing.
Commit: 7bf459bce34280273942e4a75ce9eab4d4b4e496
https://github.com/llvm/llvm-project/commit/7bf459bce34280273942e4a75ce9eab4d4b4e496
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/test/TableGen/DuplicateFieldValues.td
M llvm/test/TableGen/RegClassByHwMode.td
M llvm/test/TableGen/def-multiple-operands.td
M llvm/test/TableGen/get-named-operand-idx.td
M llvm/test/TableGen/get-operand-type-no-expand.td
M llvm/test/TableGen/get-operand-type.td
M llvm/test/TableGen/target-specialized-pseudos.td
M llvm/utils/TableGen/InstrInfoEmitter.cpp
Log Message:
-----------
CodeGen: Make target overrides of PointerLikeRegClass mandatory (#159882)
Most targets should now use the convenience multiclass to fixup
the operand definitions of pointer-using pseudoinstructions:
defm : RemapAllTargetPseudoPointerOperands<target_ptr_regclass>;
Commit: 9b88cd9945c5077f0d07f04cd9c9e8e146c48a1b
https://github.com/llvm/llvm-project/commit/9b88cd9945c5077f0d07f04cd9c9e8e146c48a1b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/include/llvm/MC/MCInstrDesc.h
M llvm/include/llvm/Target/Target.td
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/InstructionEncoding.cpp
M llvm/utils/TableGen/DAGISelMatcherGen.cpp
M llvm/utils/TableGen/InstrInfoEmitter.cpp
Log Message:
-----------
CodeGen: Remove PointerLikeRegClass handling from codegen (#159883)
All uses have been migrated to RegClassByHwMode. This is now
an implementation detail of InstrInfoEmitter for pseudoinstructions.
Commit: 43e69b18920ecabcf7c6c5fb898f9b18120200f2
https://github.com/llvm/llvm-project/commit/43e69b18920ecabcf7c6c5fb898f9b18120200f2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/basic.ll
Log Message:
-----------
RuntimeLibcalls: Add malloc and free entries (#167081)
Calloc was already here, but not the others. Also add
manual type information.
Commit: 59b3d1814afca973d1417ed2f1d5dac4af3de636
https://github.com/llvm/llvm-project/commit/59b3d1814afca973d1417ed2f1d5dac4af3de636
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.td
Log Message:
-----------
RuntimeLibcalls: Add more function entries from TargetLibraryInfo (#167082)
Script scraped dump of most functions in TargetLibraryInfo.def,
with existing entries and a few special cases removed. This only
adds the definitions, and doesn't add them to any system yet.
Adding them in the correct places is the hard part, since it's
all written as opt-out with manually written exemptions in
TargetLibraryInfo.
Commit: 9e1d3cac8562fab0a62c1ab19228da5ff6fb26c5
https://github.com/llvm/llvm-project/commit/9e1d3cac8562fab0a62c1ab19228da5ff6fb26c5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
A llvm/test/Transforms/Util/DeclareRuntimeLibcalls/darwin.ll
Log Message:
-----------
RuntimeLibcalls: Add memset_pattern* calls to darwin systems (#167083)
This is one of the easier cases to comprehend in TargetLibraryInfo's
setup.
Commit: e8b9d4217046727845d107c6d4e4ff275e6ee1b4
https://github.com/llvm/llvm-project/commit/e8b9d4217046727845d107c6d4e4ff275e6ee1b4
Author: anoopkg6 <anoop.kumar6 at ibm.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Linux.cpp
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/tysan/tysan_platform.h
Log Message:
-----------
[tysan] Type Sanitizer support for SystemZ (#162396)
Type Sanitizer support for SystemZ.
Co-authored-by: anoopkg6 <anoopkg6 at github.com>
Commit: 44c9d3a6f5d155ce7d934244dd673b7a8cd5296b
https://github.com/llvm/llvm-project/commit/44c9d3a6f5d155ce7d934244dd673b7a8cd5296b
Author: anoopkg6 <anoop.kumar6 at ibm.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Linux.cpp
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
Log Message:
-----------
[scudo] Add scudo_standalone support for SystemZ (#166187)
Add Support for scudo_standalone for SystemZ without enabling gwp_asan.
Co-authored-by: anoopkg6 <anoopkg6 at github.com>
Commit: c333f7dab9f89734777f7d19bc7b68c86f393216
https://github.com/llvm/llvm-project/commit/c333f7dab9f89734777f7d19bc7b68c86f393216
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/test/Dialect/XeGPU/subgroup-distribute-unit.mlir
Log Message:
-----------
[mlir][xegpu] Add layout based SIMT distribution support for `vector.extract/insert_strided_slice` (#168626)
This PR adds general SIMT distribution support for
`vector.extract/insert_strided_slice`. Currently vector distribution
already have support for these operations but have restrictions to avoid
requiring layouts during distribution logic. For example,
`extract_stride_slice` require that distributed dimension is fully
extracted. However, more complex cases may require extracting partially
from distributed dimension (eg. 8x16xf16 extraction from 8x32xf16).
These types of cases need the layouts to reason about how the data is
spread across SIMT lanes.
Currently, we don't have layout access in vector distribution so these
new patterns are place in XeGPU side. They have higher pattern benefit
so that they will be tried first before trying regular vector
distribution based patterns.
Commit: 96cbbebc20dc62e6a780952e3745f67aaefcdf13
https://github.com/llvm/llvm-project/commit/96cbbebc20dc62e6a780952e3745f67aaefcdf13
Author: Shaoce SUN <sunshaoce at outlook.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
Log Message:
-----------
[MC][RISCV] Add missing Predicates for NDS_FMV_BF16_X (#169662)
run
```shell
build/bin/llvm-exegesis -mode=latency -mtriple=riscv64-unknown-linux-gnu --mcpu=generic --benchmark-phase=assemble-measured-code -opcode-index=-1
```
error:
```
---
mode: latency
key:
instructions:
- 'NDS_FMV_BF16_X F2_H X11'
- 'NDS_FMV_X_BF16 X26 F2_H'
config: ''
register_initial_values:
- 'X11=0x0'
cpu_name: generic
llvm_triple: riscv64-unknown-linux-gnu
min_instructions: 10000
measurements: []
error: actual measurements skipped.
info: Repeating two instructions
assembled_snippet: 41116AE48145538105F0530D01E0538105F0530D01E0538105F0530D01E0538105F0530D01E0226D41018280
...
LLVM ERROR: Attempting to emit FMV_H_X instruction but the Feature_HasHalfFPLoadStoreMove predicate(s) are not met
```
Commit: 071d1fb8beda4c0ec9ede0acab12a382f34758fe
https://github.com/llvm/llvm-project/commit/071d1fb8beda4c0ec9ede0acab12a382f34758fe
Author: Sam Tebbs <samuel.tebbs at arm.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/test/Transforms/LoopVectorize/AArch64/vplan-printing.ll
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[LV] Use VPReductionRecipe for partial reductions (#147513)
Partial reductions can easily be represented by the VPReductionRecipe
class by setting their scale factor to something greater than 1. This PR
merges the two together and gives VPReductionRecipe a VFScaleFactor so
that it can choose to generate the partial reduction intrinsic at
execute time.
Stacked PRs:
1. https://github.com/llvm/llvm-project/pull/147026
2. https://github.com/llvm/llvm-project/pull/147255
3. https://github.com/llvm/llvm-project/pull/156976
4. https://github.com/llvm/llvm-project/pull/160154
5. https://github.com/llvm/llvm-project/pull/147302
6. https://github.com/llvm/llvm-project/pull/162503
7. -> https://github.com/llvm/llvm-project/pull/147513
Replaces https://github.com/llvm/llvm-project/pull/146073 .
Commit: 7c3c8dabd6ddcbf153ff2c7024ba1164524e5423
https://github.com/llvm/llvm-project/commit/7c3c8dabd6ddcbf153ff2c7024ba1164524e5423
Author: daniilavdeev <daniilavdeev237 at gmail.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
M clang/test/Driver/riscv-features.c
Log Message:
-----------
Revert [Driver] Error for -gsplit-dwarf with RISC-V linker relaxation (#169653)
This patch reverts 80a4e6fd31a06143b83947785ea3bd5c04344ea6
After the relevant patches clang now supports dwarf fission with RISC-V
linker relaxations, so we can remove the related driver error.
Commit: 9bd30e2f272536e82730b115720fa807d7be9be9
https://github.com/llvm/llvm-project/commit/9bd30e2f272536e82730b115720fa807d7be9be9
Author: Sam Tebbs <samuel.tebbs at arm.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fully-unrolled-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-zext-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/wider-VF-for-callinst.ll
Log Message:
-----------
[AArch64] Enable maximising scalable vector bandwidth (#166748)
This PR enables maximising scalable vector bandwidth for all AArch64
cores other than the V1 and N2. Those two have shown small regressions
that we'll investigate, fix and then enable.
Commit: e99029ef0f0f0bacd8b734058e9cf2be971f16de
https://github.com/llvm/llvm-project/commit/e99029ef0f0f0bacd8b734058e9cf2be971f16de
Author: Kaitlin Peng <kaitlinpeng at microsoft.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
M clang/test/CodeGenHLSL/builtins/faceforward.hlsl
Log Message:
-----------
[HLSL] Remove `faceforward` SPIRV fast path (#169547)
Commit: cca66a21c20537171712b3adf35b4b82de5f2ad5
https://github.com/llvm/llvm-project/commit/cca66a21c20537171712b3adf35b4b82de5f2ad5
Author: Gergely Bálint <gergely.balint at arm.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/unittests/Core/MCPlusBuilder.cpp
Log Message:
-----------
[BOLT][BTI] Add MCPlusBuilder::updateBTIVariant (#167308)
Checks if an instruction is BTI, and updates the immediate value to the
newly requested variant.
This can be used in situations when the compiler already inserted a BTI
landing pad to a location, but BOLT needs to update it to a different
variant.
Example: br x0 to a location with a BTI c.
Commit: b78b5ba225c121fb4463791bcbdd78be19e49213
https://github.com/llvm/llvm-project/commit/b78b5ba225c121fb4463791bcbdd78be19e49213
Author: Lei Huang <lei at ca.ibm.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
R llvm/test/MC/PowerPC/ppc64-encoding-ISA31-errors.s
M llvm/test/MC/PowerPC/ppc64-errors.s
Log Message:
-----------
[NFC][PowerPC] Merge ppc64 encoding error tests (#169669)
Based on the RUN lines, there is actually no need for different versions
of these error files since no cpu specific
option needed. Combine to reduce confusion and maintenance as these are
not huge files.
Commit: 356479191ca001df47136c89cc9a761c64a6323c
https://github.com/llvm/llvm-project/commit/356479191ca001df47136c89cc9a761c64a6323c
Author: Lucie Choi <clucie at google.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
A llvm/test/Transforms/IndVarSimplify/skip-predication-convergence.ll
A llvm/test/Transforms/IndVarSimplify/skip-predication-nested-convergence.ll
Log Message:
-----------
[IndVarSimplify] Fix `IndVarSimplify` to skip unfolding predicates when the loop contains control convergence operations. (#165643)
Skip constant folding the loop predicates if the loop contains control
convergence tokens referenced outside the loop.
Fixes https://github.com/llvm/llvm-project/issues/164496.
Verified
[loop_peeling.test](https://github.com/llvm/offload-test-suite/pull/473)
passes with the fix.
Similar control convergence issues are found on other passes.
https://github.com/llvm/llvm-project/issues/165642
HLSL used for tests:
```hlsl
RWStructuredBuffer<uint> Out : register(u0);
[numthreads(8,1,1)]
void main(uint3 TID : SV_GroupThreadID) {
for (uint i = 0; i < 8; i++) {
if (i == TID.x) {
Out[TID.x] = WaveActiveMax(TID.x);
break;
}
}
}
```
With nested loop:
```hlsl
RWStructuredBuffer<uint> Out : register(u0);
[numthreads(8,8,1)]
void main(uint3 TID : SV_GroupThreadID) {
for (uint i = 0; i < 8; i++) {
for (uint j = 0; j < 8; j++) {
if (i == TID.x && j == TID.y) {
uint index = TID.x * 8 + TID.y;
Out[index] = WaveActiveMax(index);
break;
}
}
}
}
```
Commit: 84d511df8dcdd6da00be41b250312d84b5de41a7
https://github.com/llvm/llvm-project/commit/84d511df8dcdd6da00be41b250312d84b5de41a7
Author: Jason-VanBeusekom <jason.van-beusekom at hpe.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M offload/include/omptarget.h
M offload/libomptarget/PluginManager.cpp
M offload/libomptarget/device.cpp
A offload/test/api/omp_indirect_call_table_manual.c
Log Message:
-----------
[OpenMP][clang] Register vtables on device for indirect calls runtime (#167011)
This is a branch off of
https://github.com/llvm/llvm-project/pull/159856, in which consists of
the runtime portion of the changes required to support indirect function
and virtual function calls on an `omp target device` when the virtual
class / indirect function is mapped to the device from the host.
Key Changes
- Introduced a new flag OMP_DECLARE_TARGET_INDIRECT_VTABLE to mark
VTable registrations
- Modified setupIndirectCallTable to support both VTable entries and
indirect function pointers
Details:
The setupIndirectCallTable implementation was modified to support this
registration type by retrieving the first address of the VTable and
inferring the remaining data needed to build the indirect call table.
Since the Vtables / Classes registered as indirect can be larger than 8
bytes, and the vtables may not be at the first address we either need to
pass the size to __llvm_omp_indirect_call_lookup and have a check at
each step of the binary search, or add multiple entries to the indirect
table for each address registered. The latter was chosen.
Commit: a00def3f20e166d4fb9328e6f0bc0742cd0afa31 is not a part of this
PR and is handled / reviewed in:
https://github.com/llvm/llvm-project/pull/159856,
This is PR (2/3)
Register Vtable PR (1/3):
https://github.com/llvm/llvm-project/pull/159856,
Codegen / _llvm_omp_indirect_call_lookup PR (3/3):
https://github.com/llvm/llvm-project/pull/159857
Commit: 954fa0f9bae73a2214d1d5079d6c3c028dca42ce
https://github.com/llvm/llvm-project/commit/954fa0f9bae73a2214d1d5079d6c3c028dca42ce
Author: Moritz Zielke <moritz.zielke at gmail.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
Log Message:
-----------
[Clang] Allow AVX/AVX512 subvector shuffles in constexpr (#168700)
Resolves #160514
Enables usage of the following x86 intrinsics in `constexpr`:
```
_mm256_shuffle_i64x2 _mm256_mask_shuffle_i64x2 _mm256_maskz_shuffle_i64x2
_mm256_shuffle_f64x2 _mm256_mask_shuffle_f64x2 _mm256_maskz_shuffle_f64x2
_mm512_shuffle_i64x2 _mm512_mask_shuffle_i64x2 _mm512_maskz_shuffle_i64x2
_mm512_shuffle_f64x2 _mm512_mask_shuffle_f64x2 _mm512_maskz_shuffle_f64x2
_mm256_shuffle_i32x4 _mm256_mask_shuffle_i32x4 _mm256_maskz_shuffle_i32x4
_mm256_shuffle_f32x4 _mm256_mask_shuffle_f32x4 _mm256_maskz_shuffle_f32x4
_mm512_shuffle_i32x4 _mm512_mask_shuffle_i32x4 _mm512_maskz_shuffle_i32x4
_mm512_shuffle_f32x4 _mm512_mask_shuffle_f32x4 _mm512_maskz_shuffle_f32x4
```
Commit: 411a53e16fbc9bfe23fd887c918c3ec5d74fa2bc
https://github.com/llvm/llvm-project/commit/411a53e16fbc9bfe23fd887c918c3ec5d74fa2bc
Author: Letu Ren <fantasquex at gmail.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/builtins-floating-point.c
Log Message:
-----------
[CIR] Upstream Builtin Exp2Op (#169152)
Add the cir::exp2 operation and handling for the related builtins.
Commit: 0940f686dc332557f0368290ebc3d9aff1f36714
https://github.com/llvm/llvm-project/commit/0940f686dc332557f0368290ebc3d9aff1f36714
Author: Justin Bogner <mail at justinbogner.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/unittests/Support/JobserverTest.cpp
Log Message:
-----------
Move static test variable into the #if that uses it (#169695)
Fixes -Wunused-variable when compiling without LLVM_ENABLE_THREADS
Commit: c98e867822d8e741159ff0be09ccc2a5c7841a28
https://github.com/llvm/llvm-project/commit/c98e867822d8e741159ff0be09ccc2a5c7841a28
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaType.cpp
M clang/test/SemaCXX/return.cpp
Log Message:
-----------
[Clang] Fix false positive -Wignored-qualifiers (#169664)
A deduced return type can be an object type, in which case `const` can
have an effect.
Delay the diagnostic to the point at which the type is deduced.
Add tests for lambdas.
Fixes #43054
Note that there is a discussion in #43054 about adding a separate
warning for "const return types are weird" for the class type cases, but
it would have to be a separate warning - warning which currently exists
in clang-tidy as `readability-const-return-type`.
Commit: 18805b6ce9a4887ea6a19ce7e4f8fc943a716ec5
https://github.com/llvm/llvm-project/commit/18805b6ce9a4887ea6a19ce7e4f8fc943a716ec5
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
A clang/test/CIR/CodeGen/count-of.c
Log Message:
-----------
[CIR] CountOf VLA with Array element type (#169404)
Implement CountOf on VariableArrayType with IntegerConstant SizeExpr
Commit: 587e279a880add8017bdc9484c3bf9030fdcec8f
https://github.com/llvm/llvm-project/commit/587e279a880add8017bdc9484c3bf9030fdcec8f
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
Log Message:
-----------
[CIR][NFC] Cleanup builtin helper function interfaces (#169586)
A couple of builtin helper functions were taking a clang::Expr argument
but only using it to build an MLIR location. This change updates these
functions to take a location directly.
Commit: 5ab3375b2cf461ab02704d129a1f4d5ba1a1e275
https://github.com/llvm/llvm-project/commit/5ab3375b2cf461ab02704d129a1f4d5ba1a1e275
Author: Janet Yang <qxy11 at meta.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M lldb/include/lldb/API/SBTarget.h
M lldb/include/lldb/Target/Target.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/source/API/SBTarget.cpp
M lldb/source/Target/Target.cpp
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
M lldb/test/API/tools/lldb-dap/startDebugging/TestDAP_startDebugging.py
M lldb/tools/lldb-dap/CMakeLists.txt
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/DAPForward.h
A lldb/tools/lldb-dap/DAPSessionManager.cpp
A lldb/tools/lldb-dap/DAPSessionManager.h
M lldb/tools/lldb-dap/EventHelper.cpp
M lldb/tools/lldb-dap/EventHelper.h
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/LaunchRequestHandler.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/package.json
M lldb/tools/lldb-dap/tool/lldb-dap.cpp
M lldb/unittests/DAP/CMakeLists.txt
A lldb/unittests/DAP/DAPSessionManagerTest.cpp
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
Log Message:
-----------
[lldb-dap] Add multi-session support with shared debugger instances (#163653)
## Summary:
This change introduces a `DAPSessionManager` to enable multiple DAP
sessions to share debugger instances when needed, for things like child
process debugging and some scripting hooks that create dynamically new
targets.
Changes include:
- Add `DAPSessionManager` singleton to track and coordinate all active DAP
sessions
- Support attaching to an existing target via its globally unique target
ID (targetId parameter)
- Share debugger instances across sessions when new targets are created
dynamically
- Refactor event thread management to allow sharing event threads
between sessions and move event thread and event thread handlers to `EventHelpers`
- Add `eBroadcastBitNewTargetCreated` event to notify when new targets are
created
- Extract session names from target creation events
- Defer debugger initialization from 'initialize' request to
'launch'/'attach' requests. The only time the debugger is used currently
in between its creation in `InitializeRequestHandler` and the `Launch`
or `Attach` requests is during the `TelemetryDispatcher` destruction
call at the end of the `DAP::HandleObject` call, so this is safe.
This enables scenarios when new targets are created dynamically so that
the debug adapter can automatically start a new debug session for the
spawned target while sharing the debugger instance.
## Tests:
The refactoring maintains backward compatibility. All existing DAP test
cases pass.
Also added a few basic unit tests for DAPSessionManager
```
>> ninja DAPTests
>> ./tools/lldb/unittests/DAP/DAPTests
>>./bin/llvm-lit -v ../llvm-project/lldb/test/API/tools/lldb-dap/
```
Commit: bf43b95025124017b37aa8fd0ee7dc94ac4d670e
https://github.com/llvm/llvm-project/commit/bf43b95025124017b37aa8fd0ee7dc94ac4d670e
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.h
Log Message:
-----------
[flang][OpenMP] Remove unused #include "dump-parse-tree.h", NFC (#169708)
Commit: a059afafde068773693c1fab4d89c208b1437f76
https://github.com/llvm/llvm-project/commit/a059afafde068773693c1fab4d89c208b1437f76
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M lldb/source/Target/Process.cpp
M lldb/source/Target/Target.cpp
M lldb/unittests/Target/MemoryTest.cpp
Log Message:
-----------
[lldb] Fix reading 32-bit signed integers (#169150)
Both `Target::ReadSignedIntegerFromMemory()` and
`Process::ReadSignedIntegerFromMemory()` internally created an unsigned
scalar, so extending the value later did not duplicate the sign bit.
Commit: 66e18b86b8b1e98eeb71d7ab57cb09a26dff6b96
https://github.com/llvm/llvm-project/commit/66e18b86b8b1e98eeb71d7ab57cb09a26dff6b96
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/user-with-multi-copyable-ops.ll
Log Message:
-----------
[SLP][NFC]Add a test with single op inst, used in many nodes, NFC.
Commit: d09644a294c8393eb7a2cc586762a8d3f60b5aeb
https://github.com/llvm/llvm-project/commit/d09644a294c8393eb7a2cc586762a8d3f60b5aeb
Author: Ravil Dorozhinskii <ravil.aviva.com at gmail.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[ROCDL] Added missing `cluster.load.async.to.lds` op (gfx1250) (#169042)
* Added missing cluster.load ops with different sizes. Extended all
rocdl tests
Commit: 72e51d389f66d9cc6b55fd74b56fbbd087672a43
https://github.com/llvm/llvm-project/commit/72e51d389f66d9cc6b55fd74b56fbbd087672a43
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/pr43166-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
M llvm/test/Transforms/LoopVectorize/use-scalar-epilogue-if-tp-fails.ll
Log Message:
-----------
Reapply "[LV] Use ExtractLane(LastActiveLane, V) live outs when tail-folding. (#149042)"
This reverts commit a6edeedbfa308876d6f2b1648729d52970bb07e6.
The following fixes have landed, addressing issues causing the original
revert:
* https://github.com/llvm/llvm-project/pull/169298
* https://github.com/llvm/llvm-project/pull/167897
* https://github.com/llvm/llvm-project/pull/168949
Original message:
Building on top of https://github.com/llvm/llvm-project/pull/148817,
introduce a new abstract LastActiveLane opcode that gets lowered to
Not(Mask) → FirstActiveLane(NotMask) → Sub(result, 1).
When folding the tail, update all extracts for uses outside the loop the
extract the value of the last actice lane.
See also https://github.com/llvm/llvm-project/issues/148603
PR: https://github.com/llvm/llvm-project/pull/149042
Commit: 684f64c0baca15c84e222c0f7c7455e8c505e575
https://github.com/llvm/llvm-project/commit/684f64c0baca15c84e222c0f7c7455e8c505e575
Author: n2h9 <13541181+n2h9 at users.noreply.github.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/builders/darwin.py
Log Message:
-----------
[lldb] [test-suite] fix typo in variable in darwin builder (#169254)
While taking a look at the code of lldb test-suite packages, I have
noticed that in `get_triple_str` in `darwin.py` env is added inside a
`components` list, which is probably supposed to be `component` (defined
on the line 61).
Signed-off-by: Nikita B <n2h9z4 at gmail.com>
Commit: a4d42775b9af0d961f71934e38342a9384534022
https://github.com/llvm/llvm-project/commit/a4d42775b9af0d961f71934e38342a9384534022
Author: n2h9 <13541181+n2h9 at users.noreply.github.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M lldb/bindings/interface/SBTargetExtensions.i
M lldb/examples/python/templates/scripted_process.py
M lldb/include/lldb/API/SBTarget.h
M lldb/source/API/SBTarget.cpp
M lldb/test/API/python_api/target/TestTargetAPI.py
Log Message:
-----------
[lldb] [scripting bridge] 167388 chore: add api to return arch name for target (#168273)
This pr fixes #167388 .
## Description
This pr adds new method `GetArchName` to `SBTarget` so that no need to
parse triple to get arch name in client code.
## Testing
### All from `TestTargetAPI.py`
run test with
```
./build/bin/lldb-dotest -v -p TestTargetAPI.py
```
<details>
<summary>existing tests (without newly added)</summary>
<img width="1425" height="804" alt="image"
src="https://github.com/user-attachments/assets/617e4c69-5c6b-44c4-9aeb-b751a47e253c"
/>
</details>
<details>
<summary>existing tests (with newly added)</summary>
<img width="1422" height="778" alt="image"
src="https://github.com/user-attachments/assets/746990a1-df88-4348-a090-224963d3c640"
/>
</details>
### Only `test_get_arch_name`
run test with
```
./build/bin/lldb-dotest -v -p TestTargetAPI.py -f test_get_arch_name_dwarf -f test_get_arch_name_dwo -f test_get_arch_name_dsym lldb/test/API/python_api/target
```
<details>
<summary>only newly added</summary>
<img width="1422" height="778" alt="image"
src="https://github.com/user-attachments/assets/fcaafa5d-2622-4171-acee-e104ecee0652"
/>
</details>
---------
Signed-off-by: Nikita B <n2h9z4 at gmail.com>
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: d58ebe339c920e1a90f4fd87b0873a119e5f9d05
https://github.com/llvm/llvm-project/commit/d58ebe339c920e1a90f4fd87b0873a119e5f9d05
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/pr43166-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
M llvm/test/Transforms/LoopVectorize/use-scalar-epilogue-if-tp-fails.ll
Log Message:
-----------
Revert "Reapply "[LV] Use ExtractLane(LastActiveLane, V) live outs when tail-folding. (#149042)""
This reverts commit 72e51d389f66d9cc6b55fd74b56fbbd087672a43.
Missed some test updates.
Commit: 9af00e62ecc33960ada5366bffc369a647699fe9
https://github.com/llvm/llvm-project/commit/9af00e62ecc33960ada5366bffc369a647699fe9
Author: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[mlir][amdgpu] Add make_dma_base operation (#169086)
Commit: cabcb5ae55f117d15f41aed8f064dc528ddc9e8f
https://github.com/llvm/llvm-project/commit/cabcb5ae55f117d15f41aed8f064dc528ddc9e8f
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
Log Message:
-----------
[CIR][NFC] Fix build problem inside an assert (#169715)
A recent change introduced a failure in debug builds due to an incorrect
level of indirection inside an assert. This fixes that.
Commit: f8eca64a2820553ffc22c58ac39c2e5c14888e61
https://github.com/llvm/llvm-project/commit/f8eca64a2820553ffc22c58ac39c2e5c14888e61
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/pr43166-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
M llvm/test/Transforms/LoopVectorize/use-scalar-epilogue-if-tp-fails.ll
Log Message:
-----------
Reapply "[LV] Use ExtractLane(LastActiveLane, V) live outs when tail-folding. (#149042)"
This reverts commit a6edeedbfa308876d6f2b1648729d52970bb07e6.
The following fixes have landed, addressing issues causing the original
revert:
* https://github.com/llvm/llvm-project/pull/169298
* https://github.com/llvm/llvm-project/pull/167897
* https://github.com/llvm/llvm-project/pull/168949
Original message:
Building on top of https://github.com/llvm/llvm-project/pull/148817,
introduce a new abstract LastActiveLane opcode that gets lowered to
Not(Mask) → FirstActiveLane(NotMask) → Sub(result, 1).
When folding the tail, update all extracts for uses outside the loop the
extract the value of the last actice lane.
See also https://github.com/llvm/llvm-project/issues/148603
PR: https://github.com/llvm/llvm-project/pull/149042
Commit: cec837e3e09f7751e668c89aed894d547d542ae6
https://github.com/llvm/llvm-project/commit/cec837e3e09f7751e668c89aed894d547d542ae6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/test/CodeGen/X86/addcarry.ll
Log Message:
-----------
[X86] addcarry.ll - add test coverage for #169691 (#169716)
Commit: bbb8f7aaf8c2cc7f68b59ed0d5abed068c581682
https://github.com/llvm/llvm-project/commit/bbb8f7aaf8c2cc7f68b59ed0d5abed068c581682
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M libcxx/include/__flat_map/flat_map.h
M libcxx/include/__flat_map/utils.h
M libcxx/test/libcxx/diagnostics/flat_map.nodiscard.verify.cpp
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.access/index_transparent.pass.cpp
Log Message:
-----------
[libc++][flat_map] Applied `[[nodiscard]]` (#169453)
`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.
- https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant
Commit: 8706d82bd420fdfb95e207df6d56f73274ec7d20
https://github.com/llvm/llvm-project/commit/8706d82bd420fdfb95e207df6d56f73274ec7d20
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M libcxx/include/__compare/is_eq.h
M libcxx/include/__coroutine/coroutine_handle.h
M libcxx/include/__coroutine/noop_coroutine_handle.h
M libcxx/include/__utility/cmp.h
M libcxx/include/initializer_list
M libcxx/test/libcxx/diagnostics/utility.nodiscard.verify.cpp
A libcxx/test/libcxx/language.support/nodiscard.verify.cpp
Log Message:
-----------
[libc++] Applied `[[nodiscard]]` to Language Support (partially) (#169611)
https://wg21.link/#support
`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.
- https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant
The following was implemented in this patch:
- [x] `<compare>`
- [x] `<corotine>`
- [x] `<initializer_list>`
- [x] Integer comparisons
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Co-authored-by: A. Jiang <de34 at live.cn>
Commit: 3a25a4a68705d7861c5b0312667f3bc43359da41
https://github.com/llvm/llvm-project/commit/3a25a4a68705d7861c5b0312667f3bc43359da41
Author: Björn Schäpers <bjoern at hazardy.de>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Format/Format.h
M clang/lib/Format/Format.cpp
M clang/lib/Format/IntegerLiteralSeparatorFixer.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/IntegerLiteralSeparatorTest.cpp
Log Message:
-----------
[clang-format] Add xxxMaxDigitsNoSeparator (#164286)
This basically adds a Leave option for a specific range of literals.
Commit: c378bb135455787a5d8b1f4da5d3522a3e6a60b9
https://github.com/llvm/llvm-project/commit/c378bb135455787a5d8b1f4da5d3522a3e6a60b9
Author: Peter Collingbourne <pcc at google.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
A llvm/test/CodeGen/AArch64/ptrauth-irelative.ll
M llvm/test/CodeGen/AArch64/ptrauth-type-info-vptr-discr.ll
Log Message:
-----------
CodeGen: Optionally emit PAuth relocations as IRELATIVE relocations.
This supports the following use cases:
- ConstantPtrAuth expressions that are unrepresentable using standard PAuth
relocations such as expressions involving an integer operand or
deactivation symbols.
- libc implementations that do not support PAuth relocations.
For more information see the RFC:
https://discourse.llvm.org/t/rfc-structure-protection-a-family-of-uaf-mitigation-techniques/85555
Reviewers: MaskRay, fmayer, smithp35, kovdan01
Reviewed By: fmayer
Pull Request: https://github.com/llvm/llvm-project/pull/133533
Commit: 6227eb90da2a417125477b27799ae2e8f43b9e49
https://github.com/llvm/llvm-project/commit/6227eb90da2a417125477b27799ae2e8f43b9e49
Author: Peter Collingbourne <pcc at google.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/MachineInstrBuilder.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/LLVMContext.h
M llvm/include/llvm/Target/Target.td
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.h
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/LLVMContext.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Bitcode/operand-bundles-bc-analyzer.ll
A llvm/test/CodeGen/AArch64/deactivation-symbols.ll
A llvm/test/CodeGen/MIR/AArch64/deactivation-symbols.mir
M llvm/test/Transforms/InstCombine/ptrauth-intrinsics.ll
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
Log Message:
-----------
Add IR and codegen support for deactivation symbols.
Deactivation symbols are a mechanism for allowing object files to disable
specific instructions in other object files at link time. The initial use
case is for pointer field protection.
For more information, see the RFC:
https://discourse.llvm.org/t/rfc-deactivation-symbols/85556
Reviewers: ojhunt, nikic, fmayer, arsenm, ahmedbougacha
Reviewed By: fmayer
Pull Request: https://github.com/llvm/llvm-project/pull/133536
Commit: d2379effe9db15765e4fd1f7a0589af5f9269f96
https://github.com/llvm/llvm-project/commit/d2379effe9db15765e4fd1f7a0589af5f9269f96
Author: Peter Collingbourne <pcc at google.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M clang/lib/CodeGen/CGPointerAuth.cpp
M llvm/docs/LangRef.rst
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/include/llvm/IR/Constants.h
M llvm/include/llvm/SandboxIR/Constant.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/ConstantsContext.h
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/SandboxIR/Constant.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
A llvm/test/Assembler/invalid-ptrauth-const6.ll
M llvm/test/Bitcode/compatibility.ll
M llvm/test/CodeGen/AArch64/ptrauth-irelative.ll
M llvm/test/Transforms/InstCombine/ptrauth-intrinsics.ll
A llvm/test/Verifier/ptrauth-constant.ll
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/Transforms/Utils/ValueMapperTest.cpp
Log Message:
-----------
Add deactivation symbol operand to ConstantPtrAuth.
Deactivation symbol operands are supported in the code generator by
building on the previously added support for IRELATIVE relocations.
Reviewers: ojhunt, fmayer, ahmedbougacha, nikic, efriedma-quic
Reviewed By: fmayer
Pull Request: https://github.com/llvm/llvm-project/pull/133537
Commit: a33fd4437216fff3d092e5056a78c4f430b2f9da
https://github.com/llvm/llvm-project/commit/a33fd4437216fff3d092e5056a78c4f430b2f9da
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Linux.cpp
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/tysan/tysan_platform.h
Log Message:
-----------
Revert "[tysan] Type Sanitizer support for SystemZ" (#169726)
Reverts llvm/llvm-project#162396
Commit: 75ca83563de13ebbf381a0e9e9d97dfbf98ea0f5
https://github.com/llvm/llvm-project/commit/75ca83563de13ebbf381a0e9e9d97dfbf98ea0f5
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Fix build after #169086 (#169725)
Just required wiring up some additional AMDGPU table generated files.
Commit: 8e4208f83a9bb7a4cd550e90e70f3b77499c623e
https://github.com/llvm/llvm-project/commit/8e4208f83a9bb7a4cd550e90e70f3b77499c623e
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M flang-rt/lib/cuda/allocator.cpp
M flang-rt/unittests/Runtime/CUDA/Allocatable.cpp
M flang/include/flang/Runtime/CUDA/allocator.h
Log Message:
-----------
[flang][cuda][rt] Add entry point to get the allocation stream (#169608)
Commit: 47efff777d907fcabda59d925dfed3040c7308be
https://github.com/llvm/llvm-project/commit/47efff777d907fcabda59d925dfed3040c7308be
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
A llvm/test/CodeGen/SystemZ/zos-ppa1-argarea.ll
Log Message:
-----------
[SystemZ] Emit optional argument area length field (#169679)
The Language Environment (LE) reserves 128 byte for the argument area
when the optional field is not present. If the argument area is larger,
then the field must be present to guarantee that the space is reserved
on stack extension. Creating this field when alloca() is used may reduce
the needed stack space in case alloca() causes a stack extension.
Commit: 48454241cde713c450e2369983b8c98b7ab16f19
https://github.com/llvm/llvm-project/commit/48454241cde713c450e2369983b8c98b7ab16f19
Author: Kazu Hirata <kazu at google.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
Log Message:
-----------
[SPIRV] Fix a warning
This patch fixes:
llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp:245:25: error: unused
variable 'TII' [-Werror,-Wunused-variable]
Commit: 9871d7089890f357308804987ceae1e98c5c42a3
https://github.com/llvm/llvm-project/commit/9871d7089890f357308804987ceae1e98c5c42a3
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
A mlir/lib/Dialect/OpenACC/Transforms/ACCImplicitDeclare.cpp
M mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
A mlir/test/Dialect/OpenACC/acc-implicit-declare.mlir
Log Message:
-----------
[mlir][acc] Introduce ACCImplicitDeclare pass for globals handling (#169720)
This commit introduces the ACCImplicitDeclare pass to the OpenACC
dialect, complementing ACCImplicitData by handling global variables
referenced in OpenACC compute regions and routines.
Overview:
---------
The pass applies implicit `acc declare` actions to global variables
referenced in OpenACC regions. While the OpenACC spec focuses on
implicit data mapping (handled by ACCImplicitData), implicit declare is
advantageous and required for specific cases:
1. Globals referenced in implicit `acc routine` - Since data mapping
only applies to compute regions, globals in routines must use `acc
declare`.
2. Compiler-generated globals - Type descriptors, runtime names, and
error reporting strings introduced during compilation that wouldn't be
visible for user-provided `acc declare` directives.
3. Constant globals - Constants like filename strings or initialization
values benefit from being marked with `acc declare` rather than being
mapped repeatedly (e.g., 1000 kernel launches shouldn't map the same
constant 1000 times).
Implementation:
---------------
The pass performs this in two phases:
1. Hoisting: Non-constant globals in compute regions have their
address-of operations hoisted out of the region when possible, allowing
implicit data mapping instead of declare marking.
2. Declaration: Remaining that must be device available (constants,
globals in routines, globals in recipe operations) are marked with the
acc.declare attribute.
The pass processes:
- OpenACC compute constructs (parallel, kernels, serial)
- Functions marked with acc routine
- Private, firstprivate, and reduction recipes (when used)
- Initialization regions of existing declared globals
Requirements:
-------------
The pass requires operations to implement:
- acc::AddressOfGlobalOpInterface (for address-of ops)
- acc::GlobalVariableOpInterface (for global definitions)
- acc::IndirectGlobalAccessOpInterface (for indirect access)
Commit: 3d596ad09234c92067012b33a81be8dc48aa2e47
https://github.com/llvm/llvm-project/commit/3d596ad09234c92067012b33a81be8dc48aa2e47
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M clang/test/Driver/hip-spirv-backend-opt.c
Log Message:
-----------
[clang][Driver] Use -no-canonical-prefixes in hip-spirv-backend-opt test (#169717)
Otherwise the test can fail in weirder setups (like ours downstream
where the actual binary path only contains the hash of the object). This
makes the test more resilient, more consistent with other driver tests,
and allows us to assert that the binary is named clang rather than
clang-<some suffix>.
Commit: d5778a7ff55688de0d6c87204fdd8d32ac1bdc99
https://github.com/llvm/llvm-project/commit/d5778a7ff55688de0d6c87204fdd8d32ac1bdc99
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M libcxx/include/__condition_variable/condition_variable.h
M libcxx/include/__mutex/mutex.h
M libcxx/include/__thread/thread.h
M libcxx/include/barrier
M libcxx/include/latch
M libcxx/include/mutex
M libcxx/include/semaphore
A libcxx/test/libcxx/thread/nodiscard.verify.cpp
R libcxx/test/std/thread/thread.jthread/nodiscard.verify.cpp
Log Message:
-----------
[libc++] Applied `[[nodiscard]]` to concurrency (partially) (#169463)
`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.
- https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant
The following utilities have been annotated in this patch:
- [x] `<barrier>`
- [x] `<condition_variable>`
- [x] `<latch>`
- [x] `<mutex>`
- [x] `<semaphore>`
- [x] `<thread>`
N.B. Some classes don't provide all specified methods, which were not
annotated.
Commit: 216b9fa2275eb11fdb0133870ac81c8da7ff8fcf
https://github.com/llvm/llvm-project/commit/216b9fa2275eb11fdb0133870ac81c8da7ff8fcf
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/multi-node-user-with-copyable-ops.ll
Log Message:
-----------
[SLP][NFC]Add another test with the user with multiple copyable operands, NFC
Commit: 20d95c807092755114fdc8cc3dba49e3f6820eb2
https://github.com/llvm/llvm-project/commit/20d95c807092755114fdc8cc3dba49e3f6820eb2
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/lambda.cpp
Log Message:
-----------
[CIR] Add undef handling to enable global lambdas (#169721)
This change adds undef handling that was needed to enable global
lambdas. There was no lambda-specific code needed, but the global lambda
handling needed to initialize a global with an undef value.
[CIR] Handle undef init of struct
This adds handling for a case where Clang initializes a struct to undef
with a constant copy. This required adding support for undef constants
and lowering undef attributes to LLVM IR.
Commit: dab44135df10d9e29a38f25e112a847020ee2831
https://github.com/llvm/llvm-project/commit/dab44135df10d9e29a38f25e112a847020ee2831
Author: Peter Collingbourne <pcc at google.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
Log Message:
-----------
Fix sanitizer failure introduced by #133537
Commit: 2bef14c1a9dc939598ef12999f05527a662e42fa
https://github.com/llvm/llvm-project/commit/2bef14c1a9dc939598ef12999f05527a662e42fa
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
R clang/test/CIR/CodeGen/X86/avx-builtins.c
R clang/test/CIR/CodeGen/X86/avx10_2_512bf16-builtins.c
R clang/test/CIR/CodeGen/X86/avx10_2bf16-builtins.c
R clang/test/CIR/CodeGen/X86/avx512bw-builtins.c
R clang/test/CIR/CodeGen/X86/avx512f-builtins.c
R clang/test/CIR/CodeGen/X86/avx512fp16-builtins.c
R clang/test/CIR/CodeGen/X86/bmi-builtins.c
R clang/test/CIR/CodeGen/X86/lzcnt-builtins.c
R clang/test/CIR/CodeGen/X86/sse-builtins.c
R clang/test/CIR/CodeGen/X86/sse2-builtins.c
R clang/test/CIR/CodeGen/builtin-fcmp-sse.c
R clang/test/CIR/CodeGen/builtin-isfpclass.c
R clang/test/CIR/CodeGen/builtin_bit.cpp
R clang/test/CIR/CodeGen/builtin_call.cpp
R clang/test/CIR/CodeGen/builtin_inline.c
R clang/test/CIR/CodeGen/builtin_new_delete.cpp
R clang/test/CIR/CodeGen/builtin_prefetch.c
R clang/test/CIR/CodeGen/builtin_printf.cpp
R clang/test/CIR/CodeGen/builtins-elementwise.c
R clang/test/CIR/CodeGen/builtins-floating-point.c
R clang/test/CIR/CodeGen/builtins-overflow.cpp
R clang/test/CIR/CodeGen/builtins.cpp
A clang/test/CIR/CodeGenBuiltins/X86/avx-builtins.c
A clang/test/CIR/CodeGenBuiltins/X86/avx10_2_512bf16-builtins.c
A clang/test/CIR/CodeGenBuiltins/X86/avx10_2bf16-builtins.c
A clang/test/CIR/CodeGenBuiltins/X86/avx512bw-builtins.c
A clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c
A clang/test/CIR/CodeGenBuiltins/X86/avx512fp16-builtins.c
A clang/test/CIR/CodeGenBuiltins/X86/bmi-builtins.c
A clang/test/CIR/CodeGenBuiltins/X86/lzcnt-builtins.c
A clang/test/CIR/CodeGenBuiltins/X86/sse-builtins.c
A clang/test/CIR/CodeGenBuiltins/X86/sse2-builtins.c
A clang/test/CIR/CodeGenBuiltins/builtin-fcmp-sse.c
A clang/test/CIR/CodeGenBuiltins/builtin-isfpclass.c
A clang/test/CIR/CodeGenBuiltins/builtin_bit.cpp
A clang/test/CIR/CodeGenBuiltins/builtin_call.cpp
A clang/test/CIR/CodeGenBuiltins/builtin_inline.c
A clang/test/CIR/CodeGenBuiltins/builtin_new_delete.cpp
A clang/test/CIR/CodeGenBuiltins/builtin_prefetch.c
A clang/test/CIR/CodeGenBuiltins/builtin_printf.cpp
A clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c
A clang/test/CIR/CodeGenBuiltins/builtins-floating-point.c
A clang/test/CIR/CodeGenBuiltins/builtins-overflow.cpp
A clang/test/CIR/CodeGenBuiltins/builtins.cpp
Log Message:
-----------
[CIR][NFC] Move builtin tests to their own directory (#169737)
This moves all builtin-related CodeGen tests to a new directory,
separate from the main clang/test/CIR/CodeGen directory. This will make
it easier to run the basic CodeGen tests without running the builtin
tests. This is specifically intended to move those tests which include
`immintrin.h` or any of its variants, which take a very long time to
compile with a debug build.
Commit: 36bed4d0cd3e0e3871ad2360a7524da245e289d0
https://github.com/llvm/llvm-project/commit/36bed4d0cd3e0e3871ad2360a7524da245e289d0
Author: John Holdsworth <github at johnholdsworth.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M lld/MachO/Driver.cpp
M lld/MachO/InputFiles.cpp
M lld/test/MachO/read-workers.s
M llvm/lib/Object/Archive.cpp
Log Message:
-----------
[lld][MachO] Follow-up to use madvise() for threaded file page-in. (#157917)
Further to
https://github.com/llvm/llvm-project/pull/147134#discussion_r2337246489,
switch to use the madvise() api to page in mmap'd files and
1) All new code compiled in #if LLVM_ENABLE_THREADS is set so it can be
seen where the changes were from this PR.
2) The new PR moves to use madvise() instead of the ad-hoc page
referencing code I wrote which should avoid SIGSEGVs if the buffer is
deallocated.
3) A new property SerialBackgroundQueue().stopAllWork to be used to stop
background workers when there is no further call for them. Usually the
background "page-in" threads have completed first but it seems with this
troublesome test this is not always the case and buffers stored in the
static input file cache are being deallocated while being referenced.
---------
Co-authored-by: James Henderson <James.Henderson at sony.com>
Commit: 2f71e606c96c6b1a534b829fc10ff2d3ef497688
https://github.com/llvm/llvm-project/commit/2f71e606c96c6b1a534b829fc10ff2d3ef497688
Author: Ryan Mast <3969255+nightlark at users.noreply.github.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
A llvm/utils/git/requirements_upload_release.txt
A llvm/utils/git/requirements_upload_release.txt.in
M llvm/utils/release/github-upload-release.py
Log Message:
-----------
github-upload-release.py: add requirements and lock files for installing dependencies (#169461)
Adds requirements.txt and lock files for installing dependencies for
github-upload-release.py script.
Signed-off-by: Ryan Mast <mast.ryan at gmail.com>
Commit: 49516ba0e3a64bafc523c5f03594f607a0cf24ca
https://github.com/llvm/llvm-project/commit/49516ba0e3a64bafc523c5f03594f607a0cf24ca
Author: gulfemsavrun <gulfem at google.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/tools/llvm-objdump/SourcePrinter.cpp
M llvm/tools/llvm-objdump/SourcePrinter.h
M llvm/tools/llvm-objdump/llvm-objdump.cpp
Log Message:
-----------
[llvm-objdump] Optimize live element tracking (#158763)
This patch significantly optimizes the LiveElementPrinter
by replacing a slow linear search with efficient hash map
lookups. It refactors the code to use a map-based system
for tracking live element addresses and managing column
assignments, leading to a major performance improvement
for large binaries.
Commit: 8cc02597f119674b7592e4db5dabf476c97ac8fa
https://github.com/llvm/llvm-project/commit/8cc02597f119674b7592e4db5dabf476c97ac8fa
Author: Lang Hames <lhames at gmail.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/WaitingOnGraph.h
M llvm/unittests/ExecutionEngine/Orc/WaitingOnGraphTest.cpp
Log Message:
-----------
[ORC] Clear stale ElemToPendingSN entries in WaitingOnGraph. (#169747)
WaitingOnGraph::processReadyOrFailed was not clearing stale entries from
the ElemToPendingSN map. If symbols were removed from the
ExecutionSession and then re-added this could lead to dependencies on
the stale entries, triggering a use-after-free bug.
https://github.com/llvm/llvm-project/issues/169135
Commit: b7eb9883dc9014a392f6435ba9b4058c8f8efd3f
https://github.com/llvm/llvm-project/commit/b7eb9883dc9014a392f6435ba9b4058c8f8efd3f
Author: Matej Košík <m4tej.kosik at gmail.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M lldb/source/Utility/RegisterValue.cpp
Log Message:
-----------
[lldb] Use InlHostByteOrder in RegisterValue::SetValueFromData (#169624)
An existing code can be further simplified.
---------
Co-authored-by: Matej Košík <matej.kosik at codasip.com>
Commit: e2a29eca56bf92c8f3c5b5c88259211579b66182
https://github.com/llvm/llvm-project/commit/e2a29eca56bf92c8f3c5b5c88259211579b66182
Author: Florian Mayer <fmayer at google.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/test/CodeGen/cfi-icall-trap-recover-runtime.c
M clang/test/CodeGenCXX/cfi-vcall-trap-recover-runtime.cpp
M clang/test/Driver/fsanitize.c
M compiler-rt/test/ubsan_minimal/TestCases/override-callback.c
M llvm/include/llvm/Transforms/Instrumentation/BoundsChecking.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
M llvm/test/Instrumentation/BoundsChecking/runtimes.ll
Log Message:
-----------
[UBSan] Use -fsanitize-handler-preserve-all-regs in codegen
Pull Request: https://github.com/llvm/llvm-project/pull/168645
Commit: 48a9b07264e0b7d515806295272771af69186801
https://github.com/llvm/llvm-project/commit/48a9b07264e0b7d515806295272771af69186801
Author: Jim Lin <jim at andestech.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
Log Message:
-----------
[AMDGPU] Remove unused functions isSigned. NFC (#169750)
These have been unused since
https://github.com/llvm/llvm-project/pull/145483.
Commit: 1ff5c89176f9171bd50b1f005cbf019a5d72e0b6
https://github.com/llvm/llvm-project/commit/1ff5c89176f9171bd50b1f005cbf019a5d72e0b6
Author: lonely eagle <2020382038 at qq.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M mlir/test/Analysis/DataFlow/test-liveness-analysis.mlir
M mlir/test/lib/Analysis/DataFlow/TestLivenessAnalysis.cpp
Log Message:
-----------
[mlir][dataflow] Add arguemnt print for test-liveness-analysis (#169625)
Add arguemnt print for test-liveness-analysis to better debug
remove-dead-values pass.
---------
Co-authored-by: Mehdi Amini <joker.eph at gmail.com>
Commit: ceba82f862b61396c2321613f544f925aefce015
https://github.com/llvm/llvm-project/commit/ceba82f862b61396c2321613f544f925aefce015
Author: Gang Chen <gangc at amd.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/vectorize-redund-loads.ll
Log Message:
-----------
[LoadStoreVectorizer] Fix one-element vector handling (#169671)
This is the followup of https://github.com/llvm/llvm-project/pull/168135
Commit: b028dacc60929995997ba1795f460d6ff0f2c302
https://github.com/llvm/llvm-project/commit/b028dacc60929995997ba1795f460d6ff0f2c302
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M libcxx/include/queue
M libcxx/test/libcxx/diagnostics/queue.nodiscard.verify.cpp
Log Message:
-----------
[libc++][queue] Applied `[[nodiscard]]` (#169469)
`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.
-
https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant
Commit: bd643bc1410eefced91384f816177b8189ffb981
https://github.com/llvm/llvm-project/commit/bd643bc1410eefced91384f816177b8189ffb981
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/FIRToSCF.cpp
Log Message:
-----------
[flang] Use default constructor for FIRToSCF pass (#169741)
Commit: 504b50789602813b88a482c39072822cbaa16b37
https://github.com/llvm/llvm-project/commit/504b50789602813b88a482c39072822cbaa16b37
Author: Matthias Springer <me at m-sp.org>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M mlir/include/mlir/IR/PatternMatch.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Transforms/Utils/DialectConversion.cpp
A mlir/test/Transforms/test-legalizer-no-rollback.mlir
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
[mlir][Transforms] Dialect conversion: Add support for `replaceUsesWithIf` (#169606)
This commit adds support for `replaceUsesWithIf` (and variants such as
`replaceAllUsesExcept`) to the `ConversionPatternRewriter`. This API is
supported only in no-rollback mode. An assertion is triggered in
rollback mode. (This missing assertion has been confusing for users
because it seemed that the API supported, while it was actually not
working properly.)
This commit brings us a bit closer towards removing
[this](https://github.com/llvm/llvm-project/blob/76ec25f729fcc7ae576caf21293cc393e68e7cf7/mlir/lib/Transforms/Utils/DialectConversion.cpp#L1214)
workaround.
Additional changes are needed to support this API in rollback mode. In
particular, no entries should be added to the `ConversionValueMapping`
for conditional replacements. It's unclear at this point if this API can
be supported in rollback mode, so this is deferred to later.
This commit turns `replaceUsesWithIf` into a virtual function, so that
the `ConversionPatternRewriter` can override it. All other API functions
for conditional value replacements call that function.
Note for LLVM integration: If you are seeing failed assertions due to
this change, you are using unsupported API in your dialect conversion.
You have 3 options: (1) Migrate to the no-rollback driver. (2) Rewrite
your patterns without the unsupported API. (3) Last resort: bypass the
rewriter and call `replaceUsesWithIf` etc. directly on the `Value`
object.
Commit: bacca2337156edd28fc5bb0237371dc01bdc19e0
https://github.com/llvm/llvm-project/commit/bacca2337156edd28fc5bb0237371dc01bdc19e0
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M libcxx/include/__mdspan/extents.h
M libcxx/include/__mdspan/mdspan.h
M libcxx/test/libcxx/containers/views/mdspan/extents/assert.obs.pass.cpp
A libcxx/test/libcxx/containers/views/mdspan/nodiscard.verify.cpp
Log Message:
-----------
[libc++][mdspan] Applied `[[nodiscard]]` (#169326)
`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.
-
https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant
Commit: fb18f75343738570b9f34b89973ef2ae4ada7a85
https://github.com/llvm/llvm-project/commit/fb18f75343738570b9f34b89973ef2ae4ada7a85
Author: Janet Yang <qxy11 at meta.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/DAP.py
Log Message:
-----------
[lldb-dap] Add breakpoints after debugger initialization in DExTer (#169744)
# Summary
This is a forward fix for test errors from
https://github.com/llvm/llvm-project/pull/163653.
The PR moved debugger initialization outside of
InitializeRequestHandler, and into Launch/AttachRequestHandlers to
support DAP sessions sharing debugger instances for dynamically created
targets. However, DExTer's DAP class seemed to set breakpoints before
the debugger was initialized, which caused the tests to hang waiting for
a breakpoint to hit due to none of the breakpoints getting resolved.
# Tests
```
bin/llvm-lit -v /home/qxy11/llvm/llvm-project/cross-project-tests/debuginfo-tests/dexter-tests/
```
Commit: b3428bb966f1de8aa48375ffee0eba04ede133b7
https://github.com/llvm/llvm-project/commit/b3428bb966f1de8aa48375ffee0eba04ede133b7
Author: Peter Collingbourne <pcc at google.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/lib/IR/LLVMContextImpl.cpp
Log Message:
-----------
Add missing freeConstants() call for ConstantPtrAuths.
Fixes memory leak uncovered by #133533.
Commit: e7dec231fe4da28c76ecb212360b155beec40cc9
https://github.com/llvm/llvm-project/commit/e7dec231fe4da28c76ecb212360b155beec40cc9
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/lib/IR/ReplaceConstant.cpp
M llvm/test/CodeGen/AMDGPU/lower-kernel-lds-constexpr.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-constantexpr.ll
A llvm/test/CodeGen/AMDGPU/same-lds-variable-multiple-use-in-one-phi-node.ll
Log Message:
-----------
[ReplaceConstant] Don't create instructions for the same constant multiple times in the same basic block (#169141)
Fixes #167500.
Commit: 601f79622af6f042379483573fc913c8686fabb6
https://github.com/llvm/llvm-project/commit/601f79622af6f042379483573fc913c8686fabb6
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Dialect/LLVMIR/nvvm/invalid-convert-stochastic-rounding.mlir
A mlir/test/Target/LLVMIR/nvvm/convert_fp16x2.mlir
M mlir/test/Target/LLVMIR/nvvm/convert_stochastic_rounding.mlir
A mlir/test/Target/LLVMIR/nvvm/invalid_convert_fp16x2.mlir
Log Message:
-----------
[MLIR][NVVM] Add missing rounding modes in fp16x2 conversions (#169005)
This change adds the `RN` and `RZ` rounding modes to the
`convert.f32x2.to.f16x2` and `convert.f32x2.to.bf16x2` Ops.
Tests are added in `convert_fp16x2.mlir` and
`invalid_convert_fp16x2.mlir`.
Tests with these Ops in `convert_stochastic_rounding.mlir` and
`invalid-convert-stochastic-rounding.mlir` have been removed or
modified.
PTX spec reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cvt
Commit: 1748e2330e230cfea3c8c09547af257f2f82b002
https://github.com/llvm/llvm-project/commit/1748e2330e230cfea3c8c09547af257f2f82b002
Author: Rajat Bajpai <rbajpai at nvidia.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
Log Message:
-----------
[MLIR][Intrinsics] Add new MLIR API to automatically resolve overload types (#168188)
Add createIntrinsicCall overload that accepts return type and arguments,
automatically resolve overload types rather than requiring manual
computation. Simplifies NVVM_PrefetchOp by removing conditional overload
logic.
Commit: 40991215f4aba37fd43b65d96ad0a445dcd041b2
https://github.com/llvm/llvm-project/commit/40991215f4aba37fd43b65d96ad0a445dcd041b2
Author: Eric Li <li.zhe.hua at gmail.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M clang/lib/Tooling/Transformer/SourceCode.cpp
M clang/unittests/Tooling/SourceCodeTest.cpp
Log Message:
-----------
[clang][Tooling] Fix `getFileRange` returning a range spanning across macro arguments (#169757)
When the start and end token are both spelled in macro arguments, we
still want to reject the range if they come from two separate macro
arguments, as the original specified range is not precisely spelled in a
single sequence of characters in source.
Commit: fede9471c48d91cae6ee94f247797ba3d30bfa80
https://github.com/llvm/llvm-project/commit/fede9471c48d91cae6ee94f247797ba3d30bfa80
Author: Men-cotton <mencotton0410 at gmail.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
A mlir/test/Dialect/LLVMIR/invalid-cg-profile.mlir
Log Message:
-----------
[mlir][LLVMIR] Handle missing functions in CGProfile module flags (#169517)
This commit extends the CGProfile module flags export with support for missing function references. Previously, this caused a crash and now it's properly exported to `null` values in the metadata node.
Fixes: https://github.com/llvm/llvm-project/issues/160717
Commit: 6696e0c8f8605e8ebef4a786e244baf3d6a09816
https://github.com/llvm/llvm-project/commit/6696e0c8f8605e8ebef4a786e244baf3d6a09816
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
Log Message:
-----------
[clang][bytecode] Remove double diagnostic emission (#169658)
We emit this diagnostic from CheckPointerToIntegralCast() already, so
remove the emission from CastPointerIntegral().
Commit: f6712b6ea3d59b019e26f8716020d4ca654c043c
https://github.com/llvm/llvm-project/commit/f6712b6ea3d59b019e26f8716020d4ca654c043c
Author: William Tran-Viet <wtranviet at proton.me>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/U.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/const_T.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/const_optional_U.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/copy.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/ctor.verify.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/deduct.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/deduct.verify.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/default.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/empty_in_place_t_does_not_clobber.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/explicit_const_optional_U.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/explicit_optional_U.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/in_place_t.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/initializer_list.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/move.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/nullopt_t.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/optional_U.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/rvalue_T.pass.cpp
Log Message:
-----------
[libc++] Reformat `optional` constructor tests (#169231)
- Mass-reformat tests in
`std/utilities/optional/optional.object/optional.object.ctor` and
rearrange header `#include`s
- No functional changes
- Prelude for #169203
Commit: a9cc7fe3caf6e14ae755689df8ccde2edc4c8a43
https://github.com/llvm/llvm-project/commit/a9cc7fe3caf6e14ae755689df8ccde2edc4c8a43
Author: Abhishek Kaushik <abhishek.kaushik at intel.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProf.h
Log Message:
-----------
[NFC][SampleFDO] Use const& to avoid copies (#164584)
Use const& in range-based for loop to avoid unnecessary copies
Commit: 326a1a4badcd13ad8e722ac542cff19eed7bb03a
https://github.com/llvm/llvm-project/commit/326a1a4badcd13ad8e722ac542cff19eed7bb03a
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
Log Message:
-----------
[MLIR][XeGPU] Add anchor_layout and update propagation to honor user-specified layouts (#169267)
Introduce anchor layout for XeGPU anchor ops: load_nd, store_nd,
prefetch_nd, dpas, load, store, prefetch, load_matrix, store_matrix, and
atomic_rmw. Anchor layout is permanent, and is guaranteed to be honored
by XeGPU distribution and lowerinngs once specified.
1. Add anchor_layout for XeGPU anchor OPs: load_nd, store_nd,
prefetch_nd, dpas, load, store, prefetch, load_matrix, store_matrix, and
atomic_rmw.
2. rename layout attributes to anchor_layout for these ops: load, store,
load_matrix, store_matrix
3. update layout propagation pass: Only when user doesn't specify anchor
layout, the pass computes a default layout and set to anchor op's
permant layout and use that for propagation. if user specified anchor
layout, the pass takes user-specified anchor layout. permant layout and
use that for propagation. if user specified anchor layout, the pass
takes user-specified anchor layout.
Commit: f1ddb2f4120645b56802859e26e2006e6db72597
https://github.com/llvm/llvm-project/commit/f1ddb2f4120645b56802859e26e2006e6db72597
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
A llvm/test/CodeGen/LoongArch/lasx/rotl-rotr.ll
A llvm/test/CodeGen/LoongArch/lsx/rotl-rotr.ll
Log Message:
-----------
[LoongArch][NFC] Pre-commit tests for vector rotl/rotr (#161115)
Commit: bb9449d5bbd72441d8f95052ddfd29e2d29297d7
https://github.com/llvm/llvm-project/commit/bb9449d5bbd72441d8f95052ddfd29e2d29297d7
Author: Luke Lau <luke at igalia.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
A llvm/test/Transforms/InstCombine/get_vector_length.ll
Log Message:
-----------
[InstCombine] Fold @llvm.experimental.get.vector.length when cnt <= max_lanes (#169293)
On RISC-V, some loops that the loop vectorizer vectorizes pre-LTO may
turn out to have the exact trip count exposed after LTO, see #164762.
If the trip count is small enough we can fold away the
@llvm.experimental.get.vector.length intrinsic based on this corollary
from the LangRef:
> If %cnt is less than or equal to %max_lanes, the return value is equal
to %cnt.
This on its own doesn't remove the @llvm.experimental.get.vector.length
in #164762 since we also need to teach computeKnownBits about
@llvm.experimental.get.vector.length and the sub recurrence, but this PR
is a starting point.
I've added this in InstCombine rather than InstSimplify since we may
need to insert a truncation (@llvm.experimental.get.vector.length can
take an i64 %cnt argument, the result is always i32).
Note that there was something similar done in VPlan in #167647 for when
the loop vectorizer knows the trip count.
Commit: 6abbbca32472537389a4fd9961f680251a57e82b
https://github.com/llvm/llvm-project/commit/6abbbca32472537389a4fd9961f680251a57e82b
Author: David Green <david.green at arm.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
A llvm/test/Transforms/AggressiveInstCombine/umulh_carry.ll
A llvm/test/Transforms/AggressiveInstCombine/umulh_carry4.ll
A llvm/test/Transforms/AggressiveInstCombine/umulh_ladder.ll
A llvm/test/Transforms/AggressiveInstCombine/umulh_ladder4.ll
Log Message:
-----------
[AggressiveInstCombine] Match long high-half multiply (#168396)
This patch adds recognition of high-half multiply by parts into a single
larger multiply.
Considering a multiply made up of high and low parts, we can split the
multiply into:
x * y == (xh*T + xl) * (yh*T + yl)
where `xh == x>>32` and `xl == x & 0xffffffff`. `T = 2^32`.
This expands to
xh*yh*T*T + xh*yl*T + xl*yh*T + xl*yl
which I find it helpful to be drawn as
[ xh*yh ]
[ xh*yl ]
[ xl*yh ]
[ xl*yl ]
We are looking for the "high" half, which is xh*yh + xh*yl>>32 + xl*yh>>32 +
carrys. The carry makes this difficult and there are multiple ways of
representing it. The ones we attempt to support here are:
Carry: xh*yh + carry + lowsum
carry = lowsum < xh*yl ? 0x1000000 : 0
lowsum = xh*yl + xl*yh + (xl*yl>>32)
Ladder: xh*yh + c2>>32 + c3>>32
c2 = xh*yl + (xl*yl >> 32); c3 = c2&0xffffffff + xl*yh
Carry4: xh*yh + carry + crosssum>>32 + (xl*yl + crosssum&0xffffffff) >> 32
crosssum = xh*yl + xl*yh
carry = crosssum < xh*yl ? 0x1000000 : 0
Ladder4: xh*yh + (xl*yh)>>32 + (xh*yl)>>32 + low>>32;
low = (xl*yl)>>32 + (xl*yh)&0xffffffff + (xh*yl)&0xfffffff
They all start by matching `xh*yh` + 2 or 3 other operands. The bottom of the
tree is `xh*yh`, `xh*yl`, `xl*yh` and `xl*yl`.
Based on #156879 by @c-rhodes
Commit: 1c7ec06b16dc59b5b52cff95bde7d5330ffa0293
https://github.com/llvm/llvm-project/commit/1c7ec06b16dc59b5b52cff95bde7d5330ffa0293
Author: Luke Lau <luke at igalia.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
Log Message:
-----------
[VPlan] Optimize LastActiveLane to EVL - 1 (#169766)
With EVL tail folding, the LastActiveLane can be computed with EVL - 1.
This removes the need for a header mask and vfirst.m for loops with live
outs on RISC-V:
# %bb.5: # %for.cond.cleanup7
- vsetvli zero, zero, e32, m2, ta, ma
- vmv.v.x v8, s1
- vmsleu.vv v10, v8, v22
- vfirst.m a0, v10
- srli a1, a0, 63
- czero.nez a0, a0, a1
- czero.eqz a1, s8, a1
- or a0, a0, a1
- addi a0, a0, -1
- vsetvli zero, zero, e64, m4, ta, ma
- vslidedown.vx v8, v12, a0
+ addi s1, s1, -1
+ vslidedown.vx v8, v12, s1
Commit: 9cb9b16fd63365fe452947ffdfbccd3ac7e6a08c
https://github.com/llvm/llvm-project/commit/9cb9b16fd63365fe452947ffdfbccd3ac7e6a08c
Author: Vadim Curcă <80581374+VadimCurca at users.noreply.github.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMIRToLLVMTranslation.cpp
M mlir/test/Target/LLVMIR/Import/metadata-profiling.ll
Log Message:
-----------
[mlir][llvm] Fix import of branch weights with "expected" field (#169776)
This commit fixes the import of `branch_weights` metadata from LLVM IR
to the LLVM dialect. Previously, `branch_weights` metadata containing
the `!"expected"` field were rejected because the importer expected
integer weights at operand 1, but found a string.
Commit: dc8311f207f4facf88a8c939b4132afdaab08470
https://github.com/llvm/llvm-project/commit/dc8311f207f4facf88a8c939b4132afdaab08470
Author: David Green <david.green at arm.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/test/CodeGen/Thumb2/mve-vpt-2-blocks-2-preds.mir
M llvm/test/CodeGen/Thumb2/mve-vpt-2-blocks-ctrl-flow.mir
M llvm/test/CodeGen/Thumb2/mve-vpt-2-blocks-non-consecutive-ins.mir
M llvm/test/CodeGen/Thumb2/mve-vpt-2-blocks.mir
M llvm/test/CodeGen/Thumb2/mve-vpt-3-blocks-kill-vpr.mir
M llvm/test/CodeGen/Thumb2/mve-vpt-block-1-ins.mir
M llvm/test/CodeGen/Thumb2/mve-vpt-block-2-ins.mir
M llvm/test/CodeGen/Thumb2/mve-vpt-block-4-ins.mir
M llvm/test/CodeGen/Thumb2/mve-vpt-block-elses.mir
M llvm/test/CodeGen/Thumb2/mve-vpt-block-optnone.mir
Log Message:
-----------
[ARM] Remove IR from mve vpt mir tests. NFC
As far as I can tell the llvm.arm.mve.vminnm.m intrinsic used in these tests
was the pre-upstream name of llvm.arm.mve.min.predicated. The tests should not
need IR sections, so remove them just relying on the MIR portions.
Commit: c28c99f51101d5130eeb9df061dcd10a1750d97b
https://github.com/llvm/llvm-project/commit/c28c99f51101d5130eeb9df061dcd10a1750d97b
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M clang/test/SemaHIP/amdgpu-gfx950-load-to-lds.hip
Log Message:
-----------
[NFC][HIP] Add __builtin_*_load_lds type check test cases (#165388)
This tests show how type-checking is performed for
`__builtin_amdgcn_load_to_lds`,
but not for `__builtin_amdgcn_raw_ptr_buffer_load_lds`,
`__builtin_amdgcn_struct_ptr_buffer_load_lds` and
`__builtin_amdgcn_global_load_lds` since they are declared with the 't'
attribute.
Stacked on top of: https://github.com/llvm/llvm-project/pull/165387
Commit: 650eeb867fa95435b7c123e6630eb98934ac5bf3
https://github.com/llvm/llvm-project/commit/650eeb867fa95435b7c123e6630eb98934ac5bf3
Author: Nathan Corbyn <n_corbyn at apple.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/lib/CodeGen/ShrinkWrap.cpp
M llvm/test/CodeGen/AArch64/arm64-shrink-wrapping.ll
Log Message:
-----------
[ShrinkWrap] Modify shrink wrapping to accommodate functions terminated by no-return blocks (#167548)
At present, the shrink wrapping pass misses opportunities to shrink wrap
in the presence of machine basic blocks which exit the function without
returning. Such cases arise from C++ functions like the following:
```cxx
int foo(int err, void* ptr) {
if (err == -1) {
if (ptr == nullptr) {
throw MyException("Received `nullptr`!", __FILE__, __LINE__);
}
handle(ptr);
}
return STATUS_OK;
}
```
In particular, assuming `MyException`'s constructor is not marked
`noexcept`, the above code will generate a trivial EH landing pad
calling `__cxa_free_exception()` and rethrowing the unhandled internal
exception, exiting the function without returning. As such, the shrink
wrapping pass refuses to touch the above function, spilling to the stack
on every call, even though no CSRs are clobbered on the hot path. This
patch tweaks the shrink wrapping logic to enable the pass to fire in
this and similar cases.
Commit: c3c3d16773f8db2188145378500070658afeb30f
https://github.com/llvm/llvm-project/commit/c3c3d16773f8db2188145378500070658afeb30f
Author: NagaChaitanya Vellanki <pnagato at protonmail.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Headers/avx512vbmiintrin.h
M clang/lib/Headers/avx512vbmivlintrin.h
M clang/test/CodeGen/X86/avx512vbmi-builtins.c
M clang/test/CodeGen/X86/avx512vbmivl-builtin.c
Log Message:
-----------
[Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - Allow AVX512 VPMULTISHIFTQB intrinsics to be used in constexpr (#168995)
Resolves #167477
Commit: 0b1651260a36b38a65bb4f14ad8c9c5551ab5a34
https://github.com/llvm/llvm-project/commit/0b1651260a36b38a65bb4f14ad8c9c5551ab5a34
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/utils/TableGen/README.md
Log Message:
-----------
[llvm][Tablegen] Link to tutorial before programmer's reference
The natural assumption is that there's some sort of order here
and having people read the reference manual before the basic
tutorial does not make sense to me.
Commit: 8401a8d0be7671fb5089f850a34dc92ad4a2eb12
https://github.com/llvm/llvm-project/commit/8401a8d0be7671fb5089f850a34dc92ad4a2eb12
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
A llvm/test/Bitcode/aarch64-sve-rev-upgrade.ll
A llvm/test/Bitcode/aarch64-sve-rev-upgrade.ll.bc
Log Message:
-----------
[NFC][LLVM] Add bitcode tests for llvm.aarch64.sve.rev
Commit: 0dbedd195c94e89b43660e67aa56dd139a81fa40
https://github.com/llvm/llvm-project/commit/0dbedd195c94e89b43660e67aa56dd139a81fa40
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
M clang/lib/Headers/avx10_2_512bf16intrin.h
M clang/lib/Headers/avx10_2bf16intrin.h
M clang/lib/Headers/avx512vlfp16intrin.h
M clang/lib/Headers/avxintrin.h
M clang/lib/Headers/emmintrin.h
M clang/lib/Headers/xmmintrin.h
M clang/test/CodeGen/X86/sse-builtins-constrained.c
M clang/test/CodeGen/X86/sse-builtins.c
M clang/test/CodeGen/X86/sse2-builtins-constrained.c
M clang/test/CodeGen/X86/sse2-builtins.c
M clang/test/CodeGen/builtins-x86.c
Log Message:
-----------
[Clang] Replace some x86 sqrt builtins with the generic __builtin_elementwise_sqrt versions (#165682)
Commit: bec726f6a6d37bdfb90d1330d4b5e947ce017046
https://github.com/llvm/llvm-project/commit/bec726f6a6d37bdfb90d1330d4b5e947ce017046
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
A llvm/test/CodeGen/X86/haddsubsat.ll
Log Message:
-----------
[X86] optimize ssse3 horizontal saturating add/sub (#169591)
Currently LLVM fails to recognize a manual implementation of `phadd`
https://godbolt.org/z/zozrssaWb
```llvm
declare <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16>, <8 x i16>)
declare <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16>, <8 x i16>)
define <8 x i16> @phaddsw_v8i16_intrinsic(<8 x i16> %a, <8 x i16> %b) {
entry:
%res = call <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16> %a, <8 x i16> %b)
ret <8 x i16> %res
}
define <8 x i16> @phaddsw_v8i16_generic(<8 x i16> %a, <8 x i16> %b) {
entry:
%even = shufflevector <8 x i16> %a, <8 x i16> %b,
<8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
%odd = shufflevector <8 x i16> %a, <8 x i16> %b,
<8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
%sum = call <8 x i16> @llvm.sadd.sat.v8i16(<8 x i16> %even, <8 x i16> %odd)
ret <8 x i16> %sum
}
```
```asm
phaddsw_v8i16_intrinsic: # @phaddsw_v8i16_intrinsic
phaddsw xmm0, xmm1
ret
phaddsw_v8i16_generic: # @phaddsw_v8i16_generic
movdqa xmm2, xmmword ptr [rip + .LCPI1_0] # xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
movdqa xmm3, xmm1
pshufb xmm3, xmm2
movdqa xmm4, xmm0
pshufb xmm4, xmm2
punpcklqdq xmm4, xmm3 # xmm4 = xmm4[0],xmm3[0]
psrad xmm1, 16
psrad xmm0, 16
packssdw xmm0, xmm1
paddsw xmm0, xmm4
ret
```
This PR does recognize the pattern.
Commit: d6be9fc115459ce154f8aa062b05645adb150469
https://github.com/llvm/llvm-project/commit/d6be9fc115459ce154f8aa062b05645adb150469
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M libcxx/include/deque
M libcxx/test/libcxx/diagnostics/deque.nodiscard.verify.cpp
Log Message:
-----------
[libc++][deque] Applied `[[nodiscard]]` (#169745)
`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.
-
https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant
Commit: bd95a74a2c548867c004ec991defe276f9cbbf40
https://github.com/llvm/llvm-project/commit/bd95a74a2c548867c004ec991defe276f9cbbf40
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/invalid.cpp
Log Message:
-----------
[clang][bytecode] Check for invalid record decls in IntPointer::atOffset (#169786)
We can't access the RecordLayout of an invalid decl, so return failure
if that happens.
Fixes https://github.com/llvm/llvm-project/issues/167076
Commit: 682f292d2caec5b71f8ce6c641114fee446ba49f
https://github.com/llvm/llvm-project/commit/682f292d2caec5b71f8ce6c641114fee446ba49f
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
Log Message:
-----------
[LV] Test more combinations of scalar stores using last lane of IV.
Extends test coverage to include different start and step values, as
well as interleaving.
Commit: df8061272ad6d3770ddc17498eff70f700a020ad
https://github.com/llvm/llvm-project/commit/df8061272ad6d3770ddc17498eff70f700a020ad
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M libcxx/include/__flat_set/flat_set.h
M libcxx/test/libcxx/diagnostics/flat_map.nodiscard.verify.cpp
M libcxx/test/libcxx/diagnostics/flat_set.nodiscard.verify.cpp
Log Message:
-----------
[libc++][flat_set] Applied `[[nodiscard]]` (#169739)
`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.
-
https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant
Commit: 7b813c3d8095ba49a8f1e935a9b14c23490e3bb0
https://github.com/llvm/llvm-project/commit/7b813c3d8095ba49a8f1e935a9b14c23490e3bb0
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M clang/test/AST/ByteCode/invalid.cpp
Log Message:
-----------
[clang][bytecode][test] Specify triple for Invalid.cpp
This should unbreak that test on 32bit builders, e.g.
https://lab.llvm.org/buildbot/#/builders/154/builds/24509
Commit: eee09ca98470b880fdd54bd3ff7ea05ae276314a
https://github.com/llvm/llvm-project/commit/eee09ca98470b880fdd54bd3ff7ea05ae276314a
Author: Eric Xu <60671484+ericxu233 at users.noreply.github.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/CodeGen/X86/f16c-builtins.c
Log Message:
-----------
[X86][Clang] Allow constexpr evaluation of F16C CVTPS2PH intrinsics (#162295)
Fixes #160312
Commit: fca41f4aa105f30af75d88d993539d043ac66460
https://github.com/llvm/llvm-project/commit/fca41f4aa105f30af75d88d993539d043ac66460
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
M clang/lib/Headers/avx512bf16intrin.h
M clang/lib/Headers/avx512vlbf16intrin.h
M clang/test/CodeGen/X86/avx512bf16-builtins.c
M clang/test/CodeGen/X86/avx512vlbf16-builtins.c
Log Message:
-----------
[X86] Replace BF16 to F32 conversions with generic conversions (#169781)
Let standard casting / builtin_convertvector handle the conversions from BF16 to F32
My only query is how to best implement _mm_cvtpbh_ps - I went for the
v8bf16 -> v8f32 conversion followed by subvector extraction in the end,
but could just as easily extract a v4bf16 first - makes no difference to
final optimized codegen.
First part of #154911
Commit: ea1e62d1a00bf3d40b7a1fd926d2a573c997188d
https://github.com/llvm/llvm-project/commit/ea1e62d1a00bf3d40b7a1fd926d2a573c997188d
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/ValueTypes.td
M llvm/include/llvm/CodeGenTypes/MachineValueType.h
M llvm/include/llvm/Target/Target.td
M llvm/lib/Target/SPIRV/SPIRVRegisterInfo.td
M llvm/utils/TableGen/Basic/VTEmitter.cpp
M llvm/utils/TableGen/Common/CodeGenTarget.cpp
M mlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp
Log Message:
-----------
[CodeGenTypes] Remove explicit VT numbers from ValueTypes.td (#169670)
Remove explicit VT numbers from ValueTypes.td so that patches that add a
new VT do not have to renumber the entire file.
In TableGen VTs are now identified by ValueType.LLVMName instead of
ValueType.Value. This is important for target-defined types (typically
based on PtrValueType) which are not mentioned in ValueTypes.td itself.
Commit: 66ca3f1367bb59915bd9f832a9cd3dfe56304538
https://github.com/llvm/llvm-project/commit/66ca3f1367bb59915bd9f832a9cd3dfe56304538
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
A llvm/test/CodeGen/SystemZ/zos-target-flags.ll
Log Message:
-----------
[SystemZ] Serialize ada entry flags (#169395)
Adding support for serializing the ada entry flags helps with mir based
test cases. Without this change, the flags are simple displayed as being
"unkmown".
Commit: 1d7d83d0bf8f376b977f25cec75633dceb91b8f1
https://github.com/llvm/llvm-project/commit/1d7d83d0bf8f376b977f25cec75633dceb91b8f1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/darwin.ll
Log Message:
-----------
RuntimeLibcalls: Add macos unlocked IO functions to systems (#167084)
Commit: 514dbab474c71326c1080f3129a26f0ffdd71d51
https://github.com/llvm/llvm-project/commit/514dbab474c71326c1080f3129a26f0ffdd71d51
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M clang/docs/ClangStaticAnalyzer.rst
M clang/docs/analyzer/user-docs.rst
M clang/docs/analyzer/user-docs/CommandLineUsage.rst
M clang/docs/analyzer/user-docs/Installation.rst
Log Message:
-----------
[NFC][analyzer] Clean up obsolete installation instructions (#166193)
The documentation file `Installation.rst` contained very obsolete
instructions for installing the clang static analyzer. This commit
replaces it with sentence which explains that the analyzer is part of
clang and links to the releases page of LLVM (for downloading clang).
This sentence is primarily added to the top-level page of the analyzer
documentation; but it also appears in a stubbed Installation.rst (for
users who followed a direct external link to this installation page).
This stubbed section is removed from the table of contents, but I kept
it as an orphaned page (to avoid breaking links).
Fixes #165571
Commit: d128d90e71146cf099a31a967fdeb2591d30514d
https://github.com/llvm/llvm-project/commit/d128d90e71146cf099a31a967fdeb2591d30514d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.td
A llvm/test/Transforms/Util/DeclareRuntimeLibcalls/emscripten.ll
Log Message:
-----------
RuntimeLibcalls: Add small_printf functions to emscripten (#167087)
Commit: 97aa4f3abbba2ce4460c0d8e5364bd333aaa8079
https://github.com/llvm/llvm-project/commit/97aa4f3abbba2ce4460c0d8e5364bd333aaa8079
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.td
A llvm/test/Transforms/Util/DeclareRuntimeLibcalls/xcore.ll
Log Message:
-----------
XCore: Add iprintf to RuntimeLibcalls system library (#167088)
Commit: 6412184891526690cff804f87f986b1fa039f011
https://github.com/llvm/llvm-project/commit/6412184891526690cff804f87f986b1fa039f011
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M mlir/docs/Dialects/NVVMDialect.md
Log Message:
-----------
[MLIR][NVVM][Docs] Update docs (#169694)
This patch updates the NVVM Dialect docs to:
* include information on the type of pointers for the memory spaces.
* include high-level information on mbarrier objects.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 4394aa685c4b01ad3782a137fcfebeadc4941df1
https://github.com/llvm/llvm-project/commit/4394aa685c4b01ad3782a137fcfebeadc4941df1
Author: Jason-VanBeusekom <jason.van-beusekom at hpe.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M clang/docs/HIPSupport.rst
M clang/lib/CodeGen/CodeGenModule.cpp
A clang/test/CodeGenCUDA/cuda_weak_alias.cu
A clang/test/CodeGenHIP/hip_weak_alias.cpp
A clang/test/OpenMP/amdgcn_weak_alias.c
A clang/test/OpenMP/amdgcn_weak_alias.cpp
A clang/test/OpenMP/nvptx_weak_alias.c
Log Message:
-----------
[OpenMP][clang][HIP][CUDA] fix weak alias emit on device compilation (#164326)
This PR adds checks for when emitting weak aliases in: `void
CodeGenModule::EmitGlobal(GlobalDecl GD)`, before for device compilation
for OpenMP, HIP and Cuda, clang would look for the aliasee even if it
was never marked for device compilation.
For OpenMP the following case now works:
> Failed before when compiling with device, ie: `clang -fopenmp
-fopenmp-targets=amdgcn-amd-amdhsa`
> ```
> int __Two(void) { return 2; }
> int Two(void) __attribute__ ((weak, alias("__Two")));
> ```
For HIP / Cuda:
>
> ```
> int __HostFunc(void) { return 42; }
> int HostFunc(void) __attribute__ ((weak, alias("__HostFunc")));
> ```
For HIP:
>Failed before on HIP, Cuda fails due to: `NVPTX aliasee must not be
'.weak'` error
> ```
> __device__ int __One(void) { return 2; }
> __device__ int One(void) __attribute__ ((weak, alias("__One")));
> ```
Included are Codegen LIT tests for the above cases, and also cases for
weak alias cases that currently work in clang.
Fixes https://github.com/llvm/llvm-project/issues/117369
Commit: 0e5633fcd984b54acc071c2c982c1ff4691aa10f
https://github.com/llvm/llvm-project/commit/0e5633fcd984b54acc071c2c982c1ff4691aa10f
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M clang/test/OpenMP/cancel_codegen.cpp
M clang/test/OpenMP/critical_codegen.cpp
M clang/test/OpenMP/critical_codegen_attr.cpp
M clang/test/OpenMP/irbuilder_nested_parallel_for.c
M clang/test/OpenMP/masked_codegen.cpp
M clang/test/OpenMP/master_codegen.cpp
M clang/test/OpenMP/nested_loop_codegen.cpp
M clang/test/OpenMP/ordered_codegen.cpp
M clang/test/OpenMP/parallel_codegen.cpp
M flang/test/Integration/OpenMP/parallel-private-reduction-worstcase.f90
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/test/Transforms/OpenMP/parallel_region_merging.ll
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-barrier-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-cancellation-point.mlir
M mlir/test/Target/LLVMIR/openmp-outline-infinite-loop.mlir
M mlir/test/Target/LLVMIR/openmp-parallel-reduction-multiblock.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-array-sections.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-init-arg.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-sections.mlir
Log Message:
-----------
[OMPIRBuilder] always leave PARALLEL via the same barrier (#164586)
A barrier will pause execution until all threads reach it. If some go to
a different barrier then we deadlock. This manifests in that the
finalization callback must only be run once. Fix by ensuring we always
go through the same finalization block whether the thread in cancelled
or not and no matter which cancellation point causes the cancellation.
The old callback only affected PARALLEL, so it has been moved into the
code generating PARALLEL. For this reason, we don't need similar changes
for other cancellable constructs. We need to create the barrier on the
shared exit from the outlined function instead of only on the cancelled
branch to make sure that threads exiting normally (without cancellation)
meet the same barriers as those which were cancelled. For example,
previously we might have generated code like
```
...
%ret = call i32 @__kmpc_cancel(...)
%cond = icmp eq i32 %ret, 0
br i1 %cond, label %continue, label %cancel
continue:
// do the rest of the callback, eventually branching to %fini
br label %fini
cancel:
// Populated by the callback:
// unsafe: if any thread makes it to the end without being cancelled
// it won't reach this barrier and then the program will deadlock
%unused = call i32 @__kmpc_cancel_barrier(...)
br label %fini
fini:
// run destructors etc
ret
```
In the new version the barrier is moved into fini. I generate it *after*
the destructors because the standard describes the barrier as occurring
after the end of the parallel region.
```
...
%ret = call i32 @__kmpc_cancel(...)
%cond = icmp eq i32 %ret, 0
br i1 %cond, label %continue, label %cancel
continue:
// do the rest of the callback, eventually branching to %fini
br label %fini
cancel:
br label %fini
fini:
// run destructors etc
// safe so long as every exit from the function happens via this block:
%unused = call i32 @__kmpc_cancel_barrier(...)
ret
```
To achieve this, the barrier is now generated alongside the finalization
code instead of in the callback. This is the reason for the changes to
the unit test.
I'm unsure if I should keep the incorrect barrier generation callback
only on the cancellation branch in clang with the OMPIRBuilder backend
because that would match clang's ordinary codegen. Right now I have
opted to remove it entirely because it is a deadlock waiting to happen.
Commit: 47ae3eaa29f2195429f2ca19cc171a9ebd83c242
https://github.com/llvm/llvm-project/commit/47ae3eaa29f2195429f2ca19cc171a9ebd83c242
Author: Jack Styles <jack.styles at arm.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M flang/docs/OpenMPSupport.md
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
A mlir/test/Target/LLVMIR/openmp-dist_schedule.mlir
A mlir/test/Target/LLVMIR/openmp-dist_schedule_with_wsloop.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[MLIR][OpenMP] Add MLIR Lowering Support for dist_schedule (#152736)
`dist_schedule` was previously supported in Flang/Clang but was not
implemented in MLIR, instead a user would get a "not yet implemented"
error. This patch adds support for the `dist_schedule` clause to be
lowered to LLVM IR when used in an `omp.distribute` or `omp.wsloop`
section.
There has needed to be some rework required to ensure that MLIR/LLVM
emits the correct Schedule Type for the clause, as it uses a different
schedule type to other OpenMP directives/clauses in the runtime library.
This patch also ensures that when using dist_schedule or a chunked
schedule clause, the correct llvm loop parallel accesses details are
added.
Commit: e3044cd552ca0300dbb4c1051dccd038382bd4af
https://github.com/llvm/llvm-project/commit/e3044cd552ca0300dbb4c1051dccd038382bd4af
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M clang/lib/Basic/Targets/X86.cpp
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/TargetParser/X86TargetParser.h
M llvm/lib/TargetParser/X86TargetParser.cpp
Log Message:
-----------
[X86] Sync multiversion features with libgcc and refactor internal feature tables (#168750)
Compiler-rt internal feature table is synced with the one in libgcc
(common/config/i386/i386-cpuinfo.h).
LLVM internal feature table is refactored to include a field ABI_VALUE,
so we won't be relying on ordering to keep the values correct. The table
is also synced to the one in compiler-rt.
Commit: c0d81bf55f3dc3b38a1d403ee07e547016f46842
https://github.com/llvm/llvm-project/commit/c0d81bf55f3dc3b38a1d403ee07e547016f46842
Author: David Green <david.green at arm.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMAsmPrinter.h
M llvm/lib/Target/ARM/ARMMCInstLower.cpp
M llvm/lib/Target/ARM/ARMSubtarget.cpp
Log Message:
-----------
[ARM] Remove Subtarget from ARMAsmPrinter (#168264)
Remove Subtarget uses from ARMAsmPrinter, making use of TargetMachine
where applicable and getting the Subtarget from the MF where not. Some
of the `if() llvm_unreachable` have been replaced by `asserts`.
Commit: adcc557ef176ee36a1e5df12b60789b6fa2fe73c
https://github.com/llvm/llvm-project/commit/adcc557ef176ee36a1e5df12b60789b6fa2fe73c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/test/CodeGen/X86/srem-vector-lkk.ll
M llvm/test/CodeGen/X86/urem-vector-lkk.ll
Log Message:
-----------
[X86] rem-vector-lkk.ll - improve CPU coverage to cover all x86-64 levels (#169805)
SSE2/SSE42/AVX1/AVX2 + x86-64-v4 (AVX512)
Commit: 920a091da216521cbef4203ad69c63aaa2ea2154
https://github.com/llvm/llvm-project/commit/920a091da216521cbef4203ad69c63aaa2ea2154
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M libcxx/test/libcxx-03/algorithms/half_positive.pass.cpp
M libcxx/test/libcxx-03/algorithms/robust_against_copying_comparators.pass.cpp
M libcxx/test/libcxx-03/algorithms/robust_against_cpp20_hostile_iterators.compile.pass.cpp
M libcxx/test/libcxx-03/containers/sequences/vector/asan.pass.cpp
M libcxx/test/libcxx-03/containers/sequences/vector/asan_throw.pass.cpp
M libcxx/test/libcxx-03/depr/depr.default.allocator/allocator.members/construct.cxx20.pass.cpp
M libcxx/test/libcxx-03/input.output/string.streams/stringbuf/const_sso_buffer.pass.cpp
M libcxx/test/libcxx-03/iterators/bounded_iter/arithmetic.pass.cpp
M libcxx/test/libcxx-03/iterators/bounded_iter/comparison.pass.cpp
M libcxx/test/libcxx-03/iterators/bounded_iter/pointer_traits.pass.cpp
M libcxx/test/libcxx-03/iterators/bounded_iter/types.compile.pass.cpp
M libcxx/test/libcxx-03/iterators/contiguous_iterators.conv.compile.pass.cpp
M libcxx/test/libcxx-03/iterators/contiguous_iterators.pass.cpp
M libcxx/test/libcxx-03/iterators/predef.iterators/insert.iterators/back.insert.iter.ops/get_container.pass.cpp
M libcxx/test/libcxx-03/iterators/unwrap_iter.pass.cpp
M libcxx/test/libcxx-03/language.support/support.dynamic/libcpp_deallocate.sh.cpp
M libcxx/test/libcxx-03/libcpp_alignof.pass.cpp
M libcxx/test/libcxx-03/memory/allocation_guard.pass.cpp
M libcxx/test/libcxx-03/memory/swap_allocator.pass.cpp
M libcxx/test/libcxx-03/numerics/bit.ops.pass.cpp
M libcxx/test/libcxx-03/strings/basic.string/string.capacity/max_size.pass.cpp
M libcxx/test/libcxx-03/strings/basic.string/string.cons/copy_shrunk_long.pass.cpp
M libcxx/test/libcxx-03/strings/c.strings/constexpr_memmove.pass.cpp
M libcxx/test/libcxx-03/type_traits/is_trivially_relocatable.compile.pass.cpp
M libcxx/test/libcxx-03/utilities/function.objects/func.require/bullet_1_2_3.pass.cpp
M libcxx/test/libcxx-03/utilities/function.objects/func.require/bullet_4_5_6.pass.cpp
M libcxx/test/libcxx-03/utilities/function.objects/func.require/bullet_7.pass.cpp
M libcxx/test/libcxx-03/utilities/function.objects/func.require/invoke.pass.cpp
M libcxx/test/libcxx-03/utilities/function.objects/func.require/invoke_helpers.h
M libcxx/test/libcxx-03/utilities/is_pointer_in_range.pass.cpp
M libcxx/test/libcxx-03/utilities/is_valid_range.pass.cpp
M libcxx/test/libcxx-03/utilities/memory/pointer.conversion/to_address.pass.cpp
M libcxx/test/libcxx-03/utilities/memory/pointer.conversion/to_address_std_iterators.pass.cpp
M libcxx/test/libcxx-03/utilities/meta/is_referenceable.compile.pass.cpp
M libcxx/test/libcxx-03/utilities/no_destroy.pass.cpp
M libcxx/test/libcxx-03/utilities/utility/pairs/pairs.pair/abi.non_trivial_copy_move.pass.cpp
M libcxx/test/libcxx-03/utilities/utility/pairs/pairs.pair/abi.trivial_copy_move.pass.cpp
M libcxx/test/libcxx-03/utilities/utility/pairs/pairs.pair/abi.trivially_copyable.compile.pass.cpp
Log Message:
-----------
[libc++][C++03] Remove code in the C++03-specific tests that is guarded on the language version (#169354)
This is dead code, since `test/libcxx-03` is only ever executed with
`-std=c++03`.
Commit: 634f6e9ff357050ab28de150f35bf293cd31b332
https://github.com/llvm/llvm-project/commit/634f6e9ff357050ab28de150f35bf293cd31b332
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M libcxx/include/__algorithm/copy_n.h
M libcxx/include/__algorithm/iterator_operations.h
M libcxx/include/__algorithm/ranges_copy_n.h
M libcxx/include/__vector/vector.h
Log Message:
-----------
[libc++] Merge the implementations of ranges::copy_n and std::copy_n and fix vector::insert to assign (#157444)
This reduces the amount of code we have to maintain a bit.
This also simplifies `vector` by using the internal API instead of
`#if`s to switch based on language dialect.
Commit: f8e77168c89a142b6e2bdb9ea8322c42c0808fae
https://github.com/llvm/llvm-project/commit/f8e77168c89a142b6e2bdb9ea8322c42c0808fae
Author: NagaChaitanya Vellanki <pnagato at protonmail.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Headers/avx2intrin.h
M clang/lib/Headers/avx512bwintrin.h
M clang/lib/Headers/avx512fintrin.h
M clang/lib/Headers/avx512vlintrin.h
M clang/lib/Headers/emmintrin.h
M clang/lib/Headers/mmintrin.h
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/mmx-builtins.c
M clang/test/CodeGen/X86/sse2-builtins.c
Log Message:
-----------
[Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - Allow PSLL/PSRA/PSRL var intrinsics to be used in constexpr (#169276)
Resolves #169176
Commit: b64150963733d04e524f501cdd736963a7a3ba6d
https://github.com/llvm/llvm-project/commit/b64150963733d04e524f501cdd736963a7a3ba6d
Author: Julian Nagele <j.nagele at apple.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/test/Transforms/LoopUnroll/partial-unroll-reductions.ll
M llvm/test/Transforms/LoopUnroll/runtime-unroll-reductions.ll
Log Message:
-----------
[LoopUnroll] Introduce parallel accumulators when unrolling FP reductions. (#166630)
This is building on top of
https://github.com/llvm/llvm-project/pull/149470, also introducing
parallel accumulator PHIs when the reduction is for floating points,
provided we have the reassoc flag. See also
https://github.com/llvm/llvm-project/pull/166353, which aims to
introduce parallel accumulators for reductions with vector instructions.
Commit: 8871e9e2e2c0941b04b22f719906a588fe523be2
https://github.com/llvm/llvm-project/commit/8871e9e2e2c0941b04b22f719906a588fe523be2
Author: Jacob Lambert <jacob.lambert at amd.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPU.cpp
Log Message:
-----------
[clang][Driver] Handle ROCm installation layout of lib/llvm/bin/clang (#138928)
Committing on behalf of @stellaraccident
Commit: 7f1423e58ac894e7225625f34d90806ce5f052b3
https://github.com/llvm/llvm-project/commit/7f1423e58ac894e7225625f34d90806ce5f052b3
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/include/llvm/Analysis/Delinearization.h
M llvm/lib/Analysis/Delinearization.cpp
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/Delinearization/a.ll
M llvm/test/Analysis/Delinearization/constant_functions_multi_dim.ll
M llvm/test/Analysis/Delinearization/divide_by_one.ll
M llvm/test/Analysis/Delinearization/fixed_size_array.ll
M llvm/test/Analysis/Delinearization/himeno_1.ll
M llvm/test/Analysis/Delinearization/himeno_2.ll
M llvm/test/Analysis/Delinearization/iv_times_constant_in_subscript.ll
M llvm/test/Analysis/Delinearization/multidim_ivs_and_integer_offsets_3d.ll
M llvm/test/Analysis/Delinearization/multidim_ivs_and_integer_offsets_nts_3d.ll
M llvm/test/Analysis/Delinearization/multidim_ivs_and_parameteric_offsets_3d.ll
M llvm/test/Analysis/Delinearization/multidim_only_ivs_2d.ll
M llvm/test/Analysis/Delinearization/multidim_only_ivs_3d.ll
M llvm/test/Analysis/Delinearization/multidim_only_ivs_3d_cast.ll
M llvm/test/Analysis/Delinearization/multidim_two_accesses_different_delinearization.ll
M llvm/test/Analysis/Delinearization/parameter_addrec_product.ll
M llvm/test/Analysis/Delinearization/terms_with_identity_factor.ll
Log Message:
-----------
[DA][Delinearization] Move validation logic into Delinearization (#169047)
This patch moves the validation logic of delinearization results from DA
to Delinearization. Also call it in `printDelinearization` to test its
behavior. The motivation is as follows:
- Almost the same code exists in `tryDelinearizeFixedSize` and
`tryDelinearizeParametricSize`. Consolidating it in Delinearization
avoids code duplication.
- Currently this validation logic is not well tested. Moving it to
Delinearization allows us to write regression tests easily.
This patch changes the test outputs and debug messages, but otherwise
NFCI.
Commit: 90e8889a6394e29843ba903eff45ca03f877a6dd
https://github.com/llvm/llvm-project/commit/90e8889a6394e29843ba903eff45ca03f877a6dd
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/unittests/Language/CPlusPlus/CPlusPlusLanguageTest.cpp
Log Message:
-----------
[lldb] Fix CxxMethodName Parser on return type (#169652)
The simplified parser incorrectly assumes if there is a context, there
is no return type.
Fixed the case where functions have both a context and a return type.
For example,
`int foo::bar::func()`
`Type<int> foo::bar::func()`
Also fixed the case where there is no space between the context and
return.
`std::vector<int>foo::bar()`
Commit: e0c0075819f4fe30c1522a1972b683641e66507a
https://github.com/llvm/llvm-project/commit/e0c0075819f4fe30c1522a1972b683641e66507a
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
A llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_float_controls2/disabled-on-amd.ll
Log Message:
-----------
[SPIRV][AMD] Disable SPV_KHR_float_control2 for AMD flavored SPIRV (#169659)
AMD uses the translator to recover LLVM-IR from SPIRV.
Currently, the translator doesn't implement the
`SPV_KHR_float_controls2` extension (I'm working on it).
If this extension is used by the SPIRV module, we cannot translate it
back to LLVM-IR.
I'm working on the extension, but in the meantime, lets just disable it
when the target triple's vendor is `amd`.
Commit: 48e34d95987aec19585672b2363eda1a99338751
https://github.com/llvm/llvm-project/commit/48e34d95987aec19585672b2363eda1a99338751
Author: Ingo Müller <ingomueller at google.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir:bazel] Fix build broken by #169670. (#169804)
This PR adds a dependency to the `BUILD` files overlay silently added by
#169670.
Signed-off-by: Ingo Müller <ingomueller at google.com>
Commit: 25d027b8ab3acd65b58fce278f4173b431326934
https://github.com/llvm/llvm-project/commit/25d027b8ab3acd65b58fce278f4173b431326934
Author: Ming Yan <ming.yan at terapines.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/UpliftWhileToFor.cpp
M mlir/test/Dialect/SCF/uplift-while.mlir
Log Message:
-----------
[MLIR][SCF] Sink scf.if from scf.while before region into after region in scf-uplift-while-to-for (#165216)
When a `scf.if` directly precedes an `scf.condition` in the before
region of an `scf.while` and both share the same condition, move the if
into the after region of the loop. This helps simplify the control flow
to enable uplifting `scf.while` to `scf.for`.
Commit: 5d6d74359d69d3aada6a46c7cf51d84eb0848b70
https://github.com/llvm/llvm-project/commit/5d6d74359d69d3aada6a46c7cf51d84eb0848b70
Author: Gergely Bálint <gergely.balint at arm.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M bolt/lib/Passes/Inliner.cpp
A bolt/test/AArch64/inline-bti.s
Log Message:
-----------
[BOLT][BTI] Skip inlining BasicBlocks containing indirect tailcalls (#168403)
In the Inliner pass, tailcalls are converted to calls in the inlined
BasicBlock. If the tailcall is indirect, the `BR` is converted to `BLR`.
These instructions require different BTI landing pads at their targets.
As the targets of indirect tailcalls are unknown, inlining such blocks
is unsound for BTI: they should be skipped instead.
Commit: 39f5ff056bc459c7db4d01c348fe78925da8c558
https://github.com/llvm/llvm-project/commit/39f5ff056bc459c7db4d01c348fe78925da8c558
Author: Vitalii Shutov <vitalii.shutov at arm.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/Transforms/Passes.td
M mlir/lib/Dialect/Tosa/Transforms/CMakeLists.txt
A mlir/lib/Dialect/Tosa/Transforms/TosaArithConstantToConst.cpp
A mlir/test/Dialect/Tosa/tosa-arith-const-to-tosa-const.mlir
Log Message:
-----------
[mlir][tosa] Introduce arith.constant -> tosa.const normalization pass (#168370)
Add a standalone pass that rewrites tensor-valued `arith.constant` ops
into `tosa.const`, normalize the TOSA backend contract.
Signed-off-by: Vitalii Shutov <vitalii.shutov at arm.com>
Co-authored-by: Shubham <shubham at arm.com>
Commit: fb94261d88eb679ba227281ccae88165172a68cb
https://github.com/llvm/llvm-project/commit/fb94261d88eb679ba227281ccae88165172a68cb
Author: Shreeyash Pandey <shreeyash335 at gmail.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCArchitectures.cmake
M libc/include/sys/syscall.h.def
Log Message:
-----------
[libc][darwin] add syscall numbers from macos sdk (#166354)
This PR adds support to include syscall.h from MacOS sdk by explicitly including the path to the sdk via `xcrun`.
Commit: 58fa7e4ccd533e5547868a9211d4da16bc80ac20
https://github.com/llvm/llvm-project/commit/58fa7e4ccd533e5547868a9211d4da16bc80ac20
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M clang/test/OpenMP/cancel_codegen.cpp
M clang/test/OpenMP/critical_codegen.cpp
M clang/test/OpenMP/critical_codegen_attr.cpp
M clang/test/OpenMP/irbuilder_nested_parallel_for.c
M clang/test/OpenMP/masked_codegen.cpp
M clang/test/OpenMP/master_codegen.cpp
M clang/test/OpenMP/nested_loop_codegen.cpp
M clang/test/OpenMP/ordered_codegen.cpp
M clang/test/OpenMP/parallel_codegen.cpp
M flang/test/Integration/OpenMP/parallel-private-reduction-worstcase.f90
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/test/Transforms/OpenMP/parallel_region_merging.ll
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-barrier-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-cancellation-point.mlir
M mlir/test/Target/LLVMIR/openmp-outline-infinite-loop.mlir
M mlir/test/Target/LLVMIR/openmp-parallel-reduction-multiblock.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-array-sections.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-init-arg.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-sections.mlir
Log Message:
-----------
Revert "[OMPIRBuilder] always leave PARALLEL via the same barrier" (#169829)
Reverts llvm/llvm-project#164586
Reverting due to buildbot failure:
https://lab.llvm.org/buildbot/#/builders/169/builds/17519
Commit: 620f1f1efb45bf918db494f6779ed1f46d2da456
https://github.com/llvm/llvm-project/commit/620f1f1efb45bf918db494f6779ed1f46d2da456
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fneg-combines-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/global-address.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll
Log Message:
-----------
[AMDGPU] Remove odd syntax in some RUN lines. NFC. (#169831)
Commit: e3a28c060dc99cc41952d56445e1e4c26ddae685
https://github.com/llvm/llvm-project/commit/e3a28c060dc99cc41952d56445e1e4c26ddae685
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M flang-rt/lib/cuda/allocator.cpp
M flang-rt/unittests/Runtime/CUDA/Allocatable.cpp
M flang/include/flang/Runtime/CUDA/allocator.h
Log Message:
-----------
[flang][cuda][NFC] Fix naming of CUFGetAssociatedStream (#169838)
Commit: a1ca69098d6c02c5d7f5a54f84a54636522b38be
https://github.com/llvm/llvm-project/commit/a1ca69098d6c02c5d7f5a54f84a54636522b38be
Author: Philip Ginsbach-Chen <philip.ginsbach at cantab.net>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64PerfectShuffle.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/test/CodeGen/AArch64/arm64-zip.ll
M llvm/test/CodeGen/AArch64/fixed-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/insert-extend.ll
M llvm/test/CodeGen/AArch64/insert-subvector.ll
M llvm/test/CodeGen/AArch64/neon-widen-shuffle.ll
M llvm/test/CodeGen/AArch64/reduce-shuffle.ll
Log Message:
-----------
[AArch64] recognise zip1/zip2 with flipped operands (#167235)
Currently, the following two snippets get treated very differently from
each other (https://godbolt.org/z/rYGj9TGz6):
```LLVM
define <8 x i8> @foo(<8 x i8> %x, <8 x i8> %y) local_unnamed_addr #0 {
entry:
%0 = shufflevector <8 x i8> %x, <8 x i8> %y, <8 x i32>
<i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
ret <8 x i8> %0
}
define <8 x i8> @bar(<8 x i8> %x, <8 x i8> %y) local_unnamed_addr #0 {
entry:
%0 = shufflevector <8 x i8> %x, <8 x i8> %y, <8 x i32>
<i32 8, i32 0, i32 9, i32 1, i32 10, i32 2, i32 11, i32 3>
ret <8 x i8> %0
}
```
```
foo: // @foo
zip1 v0.8b, v0.8b, v1.8b
ret
.LCPI1_0:
.byte 8 // 0x8
.byte 0 // 0x0
.byte 9 // 0x9
.byte 1 // 0x1
.byte 10 // 0xa
.byte 2 // 0x2
.byte 11 // 0xb
.byte 3 // 0x3
bar: // @bar
adrp x8, .LCPI1_0
mov v0.d[1], v1.d[0]
ldr d1, [x8, :lo12:.LCPI1_0]
tbl v0.8b, { v0.16b }, v1.8b
ret
```
The reason is that `isZIPMask` does not recognise the pattern when the
operands are flipped.
This PR fixes `isZIPMask` so that both `foo` and `bar` get compiled as
expected:
```
foo: // @foo
zip1 v0.8b, v0.8b, v1.8b
ret
bar: // @bar
zip1 v0.8b, v1.8b, v0.8b
ret
```
I intend to open a similar follow-up PR for `isTRNMask`, which seems to
have the same problem.
I noticed this while working on
https://github.com/llvm/llvm-project/issues/137447, though the change
does not on itself fix that issue.
Commit: 8397945f6d1406bc659f1ee10575f42a8c1846b6
https://github.com/llvm/llvm-project/commit/8397945f6d1406bc659f1ee10575f42a8c1846b6
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
Log Message:
-----------
[clang][CIR] Fix build after builtins removal. NFC
Commit: 75e4438b57eb7ac2e1cdd1bcba3368bddd81d0c4
https://github.com/llvm/llvm-project/commit/75e4438b57eb7ac2e1cdd1bcba3368bddd81d0c4
Author: Thurston Dang <thurston at google.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M clang/lib/CodeGen/SanitizerHandler.h
M clang/test/DebugInfo/Generic/ubsan-trap-reason-type-mismatch.c
Log Message:
-----------
[ubsan] Change "Type mismatch in operation" trap reason to "Alignment, null, or object-size error" (#169752)
I originally proposed this rewording when trap reasons were introduced
in
https://github.com/llvm/llvm-project/pull/145967#discussion_r2196212344.
This was not adopted because there was a counter-proposal to split the
enum; however, that work appears to have stalled
(https://github.com/llvm/llvm-project/pull/151243). In the meantime,
there has been an additional datapoint that the current wording is
confusing to users. Thus, let's reword it now to prevent further
confusion.
Commit: db85babddd9e96e862ba09df6d25dfac1d15fb31
https://github.com/llvm/llvm-project/commit/db85babddd9e96e862ba09df6d25dfac1d15fb31
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
Log Message:
-----------
[VPlan] Use m_Intrinsic to match assumes/noalias_scope_decl (NFC).
Use pattern matching to check for intrinsics to slightly simplify code.
Commit: 03c86242929c1b05f417aa5ddd016b7664e22d4e
https://github.com/llvm/llvm-project/commit/03c86242929c1b05f417aa5ddd016b7664e22d4e
Author: Ingo Müller <ingomueller at google.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
[clang:ast] Avoid warning for unused var without assertions. (NFC) (#169822)
This PR avoids a compiler warning, which turns into an error with
`-Werror`, for a variable introduced in #169276 and only used in an
assertion (which is, thus, unused if compiled without assertions).
Signed-off-by: Ingo Müller <ingomueller at google.com>
Co-authored-by: Simon Pilgrim <llvm-dev at redking.me.uk>
Commit: fd19a20a1ac55775333c2630e53b9fdf7c8dc831
https://github.com/llvm/llvm-project/commit/fd19a20a1ac55775333c2630e53b9fdf7c8dc831
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
M llvm/lib/CodeGen/ShrinkWrap.cpp
M llvm/test/CodeGen/AArch64/arm64-shrink-wrapping.ll
Log Message:
-----------
Revert "[ShrinkWrap] Modify shrink wrapping to accommodate functions terminated by no-return blocks" (#169852)
Reverts llvm/llvm-project#167548
As commented at
https://github.com/llvm/llvm-project/pull/167548#issuecomment-3587008602
this is causing miscompiles in two-stage RISC-V Clang/LLVM builds that
result in test failures on the builders.
Commit: 1b7ae0b673638062fc99a6605df6212b6d35eb06
https://github.com/llvm/llvm-project/commit/1b7ae0b673638062fc99a6605df6212b6d35eb06
Author: clf <53817093+clingfei at users.noreply.github.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/aarch64-isel-umin.ll
M llvm/test/CodeGen/AArch64/arm64-popcnt.ll
Log Message:
-----------
[AArch64] Use umin for x != 0 when +cssc is enabled (#169159)
Closes https://github.com/llvm/llvm-project/issues/161584
Commit: ee45ba2ff49db3cc5d31f2600a3e7fad81d70cb1
https://github.com/llvm/llvm-project/commit/ee45ba2ff49db3cc5d31f2600a3e7fad81d70cb1
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/fixed-length-bf16-arith.ll
M llvm/test/CodeGen/AArch64/sve-indexed-arithmetic.ll
Log Message:
-----------
[AArch64] Use SVE for fixed-length bf16 operations with +sve-b16b16 (#169329)
This can avoid the promotion bf16 -> f32 -> bf16 round trip (or costly
expansions).
Commit: 965c3d760de35753d97d41c6b69582cecff8819d
https://github.com/llvm/llvm-project/commit/965c3d760de35753d97d41c6b69582cecff8819d
Author: Lukas Döllerer <contact at lukas-doellerer.de>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
A lld/test/wasm/wrap_import.s
M lld/wasm/Driver.cpp
M lld/wasm/SyntheticSections.cpp
Log Message:
-----------
[lld][WebAssembly] Fix SEGFAULT when importing wrapped symbol (#169656)
When wrapping a symbol `foo` via `-wrap=foo`, we create the symbol
`__wrap_foo` that replaces all mentions of `foo`. This feature was
implemented for wasm-ld in commit a5ca34e.
So far, no valid signature has been attached to the undefined symbol,
leading to a nullptr dereference in the logic for creating the import
section. This change adds the correct signature to the wrapped symbol,
enabling the generation of an import for it.
Commit: a1f30c24ea2cf7d3acdd0f6eed19f737ae26b0d2
https://github.com/llvm/llvm-project/commit/a1f30c24ea2cf7d3acdd0f6eed19f737ae26b0d2
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/test/CodeGen/DirectX/CBufferAccess/gep-ce-two-uses.ll
Log Message:
-----------
[NFC] [DirectX] Update DirectX codegen test `CBufferAccess/gep-ce-two-uses.ll` due to changes to ReplaceConstant (#169848)
Fixes an LLVM DirectX codegen test after it broke due to #169141
The CBuffer loads and GEPs are no longer duplicated when there are two
or more accesses within the same basic block.
This PR removes the duplicate check for CBuffer load and GEP from the
original test function `@f` and adds a new test function `@g` which
places duplicate CBuffer loads into separate basic blocks.
Commit: d39f5243f8df23392e1c493f7d607cd0074222b9
https://github.com/llvm/llvm-project/commit/d39f5243f8df23392e1c493f7d607cd0074222b9
Author: Lei Huang <lei at ca.ibm.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCFixupKinds.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
M llvm/test/MC/Disassembler/PowerPC/ppc-encoding-ISAFuture.txt
M llvm/test/MC/Disassembler/PowerPC/ppc64le-encoding-ISAFuture.txt
M llvm/test/MC/PowerPC/ppc-encoding-ISAFuture.s
M llvm/test/MC/PowerPC/ppc64-errors.s
Log Message:
-----------
[PowerPC] Implement paddis (#161572)
Commit: ad605bdad7bb36bc74b9fa5f8b3786081dac4ec6
https://github.com/llvm/llvm-project/commit/ad605bdad7bb36bc74b9fa5f8b3786081dac4ec6
Author: Alexey Moksyakov <moksyakov.alexey at huawei.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Passes/Instrumentation.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/runtime/instr.cpp
M bolt/runtime/sys_aarch64.h
M bolt/test/runtime/AArch64/instrumentation-ind-call.c
Log Message:
-----------
[bolt][aarch64] Change indirect call instrumentation snippet
Indirect call instrumentation snippet uses x16 register in exit
handler to go to destination target
__bolt_instr_ind_call_handler_func:
msr nzcv, x1
ldp x0, x1, [sp], llvm#16
ldr x16, [sp], llvm#16
ldp x0, x1, [sp], llvm#16
br x16 <-----
This patch adds the instrumentation snippet by calling instrumentation
runtime library through indirect call instruction and adding the wrapper
to store/load target value and the register for original indirect instruction.
Example:
mov x16, foo
infirectCall:
adrp x8, Label
add x8, x8, #:lo12:Label
blr x8
Before:
Instrumented indirect call:
stp x0, x1, [sp, #-16]!
mov x0, x8
movk x1, #0x0, lsl llvm#48
movk x1, #0x0, lsl llvm#32
movk x1, #0x0, lsl llvm#16
movk x1, #0x0
stp x0, x1, [sp, #-16]!
adrp x0, __bolt_instr_ind_call_handler_func
add x0, x0, #:lo12:__bolt_instr_ind_call_handler_func
blr x0
__bolt_instr_ind_call_handler: (exit snippet)
msr nzcv, x1
ldp x0, x1, [sp], llvm#16
ldr x16, [sp], llvm#16
ldp x0, x1, [sp], llvm#16
br x16 <- overwrites the original value in X16
__bolt_instr_ind_call_handler_func: (entry snippet)
stp x0, x1, [sp, #-16]!
mrs x1, nzcv
adrp x0, __bolt_instr_ind_call_handler
add x0, x0, x0, #:lo12:__bolt_instr_ind_call_handler
ldr x0, [x0]
cmp x0, #0x0
b.eq __bolt_instr_ind_call_handler
str x30, [sp, #-16]!
blr x0 <--- runtime lib store/load all regs
ldr x30, [sp], llvm#16
b __bolt_instr_ind_call_handler
_________________________________________________________________________
After:
mov x16, foo
infirectCall:
adrp x8, Label
add x8, x8, #:lo12:Label
blr x8
Instrumented indirect call:
stp x0, x1, [sp, #-16]!
mov x0, x8
movk x1, #0x0, lsl llvm#48
movk x1, #0x0, lsl llvm#32
movk x1, #0x0, lsl llvm#16
movk x1, #0x0
stp x0, x30, [sp, #-16]!
adrp x8, __bolt_instr_ind_call_handler_func
add x8, x8, #:lo12:__bolt_instr_ind_call_handler_func
blr x8 <--- call trampoline instr lib
ldp x0, x30, [sp], llvm#16
mov x8, x0 <---- restore original target
ldp x0, x1, [sp], llvm#16
blr x8 <--- original indirect call instruction
// don't touch regs besides x0, x1
__bolt_instr_ind_call_handler: (exit snippet)
ret <---- return to original function with indirect call
__bolt_instr_ind_call_handler_func: (entry snippet)
adrp x0, __bolt_instr_ind_call_handler
add x0, x0, #:lo12:__bolt_instr_ind_call_handler
ldr x0, [x0]
cmp x0, #0x0
b.eq __bolt_instr_ind_call_handler
str x30, [sp, #-16]!
blr x0 <--- runtime lib store/load all regs
ldr x30, [sp], llvm#16
b __bolt_instr_ind_call_handler
Commit: 2e655c23deec6076f0198fafbe5c2b1deb6d5b98
https://github.com/llvm/llvm-project/commit/2e655c23deec6076f0198fafbe5c2b1deb6d5b98
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/test/CIR/IR/try-call.cir
Log Message:
-----------
[CIR] Upstream TryCallOp (#165303)
Upstream TryCall Op as a prerequisite for Try Catch work
Issue https://github.com/llvm/llvm-project/issues/154992
Commit: 8f36135aea5dfbb5f090ca9ad055094c9913f735
https://github.com/llvm/llvm-project/commit/8f36135aea5dfbb5f090ca9ad055094c9913f735
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
Log Message:
-----------
[VPlan] Add m_Intrinsic matcher that takes a variable intrinsic ID (NFC)
Add a variant of m_Intrinsic that matches a variable runtime ID.
Commit: 07d14cb6d3e0319b4f95bfaca1502c4a8dc02910
https://github.com/llvm/llvm-project/commit/07d14cb6d3e0319b4f95bfaca1502c4a8dc02910
Author: owenca <owenpiano at gmail.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/UnwrappedLineParser.h
Log Message:
-----------
[clang-format][NFC] Remove the parameter of parseRequires...() (#169773)
Commit: 8459508227dd30ce32f870fbc9109fe95d51f4db
https://github.com/llvm/llvm-project/commit/8459508227dd30ce32f870fbc9109fe95d51f4db
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/pointer-induction.ll
Log Message:
-----------
[VPlan] Handle scalar VPWidenPointerInd in convertToConcreteRecipes. (#169338)
In some case, VPWidenPointerInductions become only used by scalars after
legalizeAndOptimizationInducftions was already run, for example due to
some VPlan optimizations.
Move the code to scalarize VPWidenPointerInductions to a helper and use
it if needed.
This fixes a crash after #148274 in the added test case.
Fixes https://github.com/llvm/llvm-project/issues/169780
Commit: 06c8ee61ab80305be88380e6aa2f1b2fe32f859d
https://github.com/llvm/llvm-project/commit/06c8ee61ab80305be88380e6aa2f1b2fe32f859d
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M llvm/test/CodeGen/DirectX/CBufferAccess/gep-ce-two-uses.ll
Log Message:
-----------
[NFC] [DirectX] Make DirectX codegen test `CBufferAccess/gep-ce-two-uses.ll` more strict (#169855)
Continuation of PR #169848 to address PR comments.
This PR makes the test more strict by adding CHECKs to ensure the loads
are indeed using the same or different GEPs.
Commit: 583fba35247d8ffc87e0df9f9eb49ab02ea3bb8e
https://github.com/llvm/llvm-project/commit/583fba35247d8ffc87e0df9f9eb49ab02ea3bb8e
Author: actink <actink at 163.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-select.ll
Log Message:
-----------
[InstCombine] fold icmp of select with invertible shl (#147182)
Proof: https://alive2.llvm.org/ce/z/a5fzlJ
Closes https://github.com/llvm/llvm-project/issues/146642
---------
Co-authored-by: Yingwei Zheng <dtcxzyw at qq.com>
Commit: aa2a7f4eb1b130e9e41d9a87bffcaa47876a97fc
https://github.com/llvm/llvm-project/commit/aa2a7f4eb1b130e9e41d9a87bffcaa47876a97fc
Author: Mr. Walls <reactive-firewall at users.noreply.github.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M libcxx/include/__locale_dir/support/linux.h
Log Message:
-----------
[libc++] Fix the locale base API on Linux with musl (#167980)
This pull request addresses an issue encountered when building
**libcxx** with certain configurations (`-D_LIBCPP_HAS_MUSL_LIBC` &
`-D__linux__`) that lack the `_GNU_SOURCE` definition. Specifically,
this issue arises if the system **musl libc** is built with
`_BSD_SOURCE` instead of `_GNU_SOURCE`. The resultant configuration
leads to problems with the "Strtonum functions" in the file
[libcxx/include/__locale_dir/support/linux.h](https://github.com/llvm/llvm-project/tree/master/libcxx/include/__locale_dir/support/linux.h),
affecting the following functions:
- `__strtof`
- `__strtod`
- `__strtold`
**Error messages displayed include**:
```console
error: no member named 'strtof_l' in the global namespace
```
```console
error: no member named 'strtod_l' in the global namespace
```
```console
error: no member named 'strtold_l' in the global namespace
```
For more insight, relevant code can be accessed
[here](https://github.com/llvm/llvm-project/blob/79cd1b7a25cdbf42c7234999ae9bc51db30af1f0/libcxx/include/__locale_dir/support/linux.h#L85-L95).
Commit: 6f7ea34933649d16845b1635d1e97f9ccb35ffea
https://github.com/llvm/llvm-project/commit/6f7ea34933649d16845b1635d1e97f9ccb35ffea
Author: Zaky Hermawan <44158147+ZakyHermawan at users.noreply.github.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/docs/GettingInvolved.rst
M llvm/docs/QualGroup.rst
Log Message:
-----------
[QualGroup][docs] Update meeting schedule and link for slides (#169458)
Summary
======
This PR update the schedule for online sync-up and update link for past
meeting slides.
Changes
======
* Remove the wednesday schedule, since we did not have the meeting for
Americas-friendly timezones.
* Use a single folder for past meeting slides instead of individual
links.
Related Links
=========
* [Meeting materials for Qualification Working
Group](https://llvm.org/docs/QualGroup.html#meeting-materials)
* [Online
Sync-Ups](https://llvm.org/docs/GettingInvolved.html#online-sync-ups)
---------
Signed-off-by: ZakyHermawan <zaky.hermawan9615 at gmail.com>
Commit: b14291238a987675b1fb39938efc938afcab8446
https://github.com/llvm/llvm-project/commit/b14291238a987675b1fb39938efc938afcab8446
Author: Matthias Springer <me at m-sp.org>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M mlir/include/mlir/Conversion/LLVMCommon/VectorPattern.h
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Conversion/LLVMCommon/VectorPattern.cpp
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
Log Message:
-----------
[mlir][arith] Fix `arith.cmpf` lowering with unsupported FP types (#166684)
The `arith.cmpf` lowering pattern used to generate invalid IR when an
unsupported floating-point type was used.
Commit: 0c6d7a40187e5e6cbdff1cf5dbdb6fe91054bef4
https://github.com/llvm/llvm-project/commit/0c6d7a40187e5e6cbdff1cf5dbdb6fe91054bef4
Author: Owen Anderson <resistor at mac.com>
Date: 2025-11-27 (Thu, 27 Nov 2025)
Changed paths:
M lld/ELF/Arch/RISCV.cpp
A lld/ELF/Arch/RISCVInternalRelocations.h
M lld/ELF/Target.cpp
M lld/test/ELF/riscv-vendor-relocations.s
Log Message:
-----------
[LLD] Add support for statically resolved vendor-specific RISCV relocations. (#169273)
This is achieved by using some of the bits of RelType to tag vendor namespaces. This change also adds a relocation iterator for RISCV that folds vendor namespaces into the RelType of the following relocation.
This patch is extracted from the implementation of RISCV vendor-specific relocations in the CHERIoT LLVM downstream: https://github.com/CHERIoT-Platform/llvm-project/commit/3d6d6f7d9480b590731cbcf4b4817e1fa3049854
Commit: f40c69471331e18176c01d08161f2e51ab7367cb
https://github.com/llvm/llvm-project/commit/f40c69471331e18176c01d08161f2e51ab7367cb
Author: Shih-Po Hung <shihpo.hung at sifive.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
Log Message:
-----------
[TTI] Use MemIntrinsicCostAttributes for getExpandCompressMemoryOpCost (#168677)
- Following #168029. This is a step toward a unified interface for
masked/gather-scatter/strided/expand-compress cost modeling.
- Replace the ad-hoc parameter list with a single attributes object.
API change:
```
- InstructionCost getExpandCompressMemoryOpCost(Opcode, DataTy,
- VariableMask, Alignment,
- CostKind, Inst);
+ InstructionCost getExpandCompressMemoryOpCost(MemIntrinsicCostAttributes,
+ CostKind);
```
Notes:
- NFCI intended: callers populate MemIntrinsicCostAttributes with same
information as before.
Commit: b9bdec302124bc1c40c0f0c02d096b541b013518
https://github.com/llvm/llvm-project/commit/b9bdec302124bc1c40c0f0c02d096b541b013518
Author: Shih-Po Hung <shihpo.hung at sifive.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[TTI][Vectorize] Migrate masked/gather-scatter/strided/expand-compress costing (NFCI) (#165532)
In #160470, there is a discussion about the possibility to explored a
general approach for handling memory intrinsics.
API changes:
- Remove getMaskedMemoryOpCost, getGatherScatterOpCost,
getExpandCompressMemoryOpCost, getStridedMemoryOpCost from
Analysis/TargetTransformInfo.
- Add getMemIntrinsicInstrCost.
In BasicTTIImpl, map intrinsic IDs to existing target implementation
until the legacy TTI hooks are retired.
- masked_load/store → getMaskedMemoryOpCost
- masked_/vp_gather/scatter → getGatherScatterOpCost
- masked_expandload/compressstore → getExpandCompressMemoryOpCost
- experimental_vp_strided_{load,store} → getStridedMemoryOpCost
TODO: add support for vp_load_ff.
No functional change intended; costs continue to route to the same
target-specific hooks.
Commit: f342d793e20f52625d400872f6f299b36d9c6826
https://github.com/llvm/llvm-project/commit/f342d793e20f52625d400872f6f299b36d9c6826
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrCDE.td
M llvm/lib/Target/ARM/ARMInstrFormats.td
M llvm/lib/Target/ARM/ARMInstrThumb.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/ARM/CMakeLists.txt
M llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
M llvm/utils/gn/secondary/llvm/lib/Target/ARM/Disassembler/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[ARM] Auto-decode pred operands of Thumb instructions (#156540)
Most predicable Thumb instructions do not encode the predicate operand,
but rather take it from an enclosing IT block.
Add `bits<0> p` to the encoding of these instructions to make the
predicate operand decodable by the generated code.
The previous approach was to analyze an instruction after it has been
decoded and add missing predicate operand if necessary. The
post-decoding pass is still required to check predicate applicability
and advance IT block state, but it no longer modifies a decoded
instruction.
Some of the custom decoder methods have become redundant and can be
removed in the future, delegating the decoding task to TableGen-erated
decoder.
Pull Request: https://github.com/llvm/llvm-project/pull/156540
Commit: 1100917aed67c063c9d011cb16f67be5df25c732
https://github.com/llvm/llvm-project/commit/1100917aed67c063c9d011cb16f67be5df25c732
Author: Mahesh-Attarde <mahesh.attarde at intel.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAMX.td
M llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_print.txt
M llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_wo=0.5_print.txt
Log Message:
-----------
[AMX][NFC] Organize tilerow (#168193)
Organizing tilerow for an extension.
---------
Co-authored-by: mattarde <mattarde at intel.com>
Commit: 1e7efca659cdf37a95e27e35fa002d340ea68b32
https://github.com/llvm/llvm-project/commit/1e7efca659cdf37a95e27e35fa002d340ea68b32
Author: Carson Radtke <nosrac925 at gmail.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/SemaTemplate/attributes.cpp
Log Message:
-----------
[clang] fix crash when template with constructor attribute is instantiated without a priority (#169282)
fixes: https://github.com/llvm/llvm-project/issues/169072
The current implementation expects the priority argument to be provided
to `[[gnu::constructor(<priority>)]]`, but the argument is really
optional. This was causing a segfault when instantiating the
function-template because we were trying to fold an `Expr*` that was a
nullptr.
This change skips the evaluation of the priority argument when it is
missing; this will instantiate a function declaration with the default
priority (65535).
Commit: bd0769ef869a1341e8122978e1eafc78c5f3d312
https://github.com/llvm/llvm-project/commit/bd0769ef869a1341e8122978e1eafc78c5f3d312
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/rotl-rotr.ll
M llvm/test/CodeGen/LoongArch/lsx/rotl-rotr.ll
Log Message:
-----------
[LoongArch] Make rotl/rotr custom for lsx/lasx (#161154)
Commit: 1cea4a0841dacefa49241538a55fbf4f34462633
https://github.com/llvm/llvm-project/commit/1cea4a0841dacefa49241538a55fbf4f34462633
Author: Prasoon Mishra <Prasoon.Mishra at amd.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
[AMDGPU][NPM] Fix CFG invalidation detection in insertSimulatedTrap (#169290)
When SIMULATED_TRAP is at the end of a block with no successors,
insertSimulatedTrap incorrectly returns the original MBB despite adding
HaltLoopBB to the CFG.
EmitInstrWithCustomInserter detects CFG changes by comparing the
returned MBB with the original. When they match, it assumes no
modification occurred and skips MachineLoopInfo invalidation. This
causes stale loop information in subsequent passes, particularly when
using the NPM which relies on accurate invalidation signals.
Fix: Return HaltLoopBB to properly signal the CFG modification.
Commit: cc9d3f29eca70394eb9e8f1d8e7fb08bce60f61f
https://github.com/llvm/llvm-project/commit/cc9d3f29eca70394eb9e8f1d8e7fb08bce60f61f
Author: Ryan Cowan <ryan.cowan at arm.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrGISel.td
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/arm64-fp128.ll
M llvm/test/CodeGen/AArch64/fp16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/fp16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/fptrunc.ll
Log Message:
-----------
[AArch64][GlobalISel] Improve lowering of vector fp16 fptrunc (#163398)
This commit improves the lowering of vectors of fp16 when truncating and
(previously) extending. Truncating has to be handled in a specific way
to avoid double rounding.
Commit: e5d229dc61bbcff3d647374f7583819026eeb78b
https://github.com/llvm/llvm-project/commit/e5d229dc61bbcff3d647374f7583819026eeb78b
Author: Jack Styles <jack.styles at arm.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M flang/docs/OpenMPSupport.md
Log Message:
-----------
[Flang][OpenMP] Update OpenMPSupport docs (#169833)
After the merging of #152736, there are a number of OpenMP Features that
are now fully supported. Missing from the initial patch was changing the
status of this from `P` to `Y` to indicate they are now fully supported.
The notes around not supporting `dist_schedule` were removed in the
initial patch.
Commit: b27af83120b32a4b8312ddf1e6317271122769e4
https://github.com/llvm/llvm-project/commit/b27af83120b32a4b8312ddf1e6317271122769e4
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
Log Message:
-----------
[IndVarSimplify] Refactor `handleFloatingPointIV`, modernize pass (NFC)
`handleFloatingPointIV` is now abstracted out into different routines,
particularly:
- `maybeFloatingPointRecurrence` which establishes whether we handle a
floating-point iv recurrence;
- `tryConvertToIntegerIV` which attempts to convert the fp start, step
and exit values into integer ones;
- `canonicalizeToIntegerIV` which rewrites the recurrence.
Minor opportunity to modernize the code where possible.
Commit: 26b82e5b8248335ae7b9db76a7da9dd0587d5baa
https://github.com/llvm/llvm-project/commit/26b82e5b8248335ae7b9db76a7da9dd0587d5baa
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M libcxx/include/__locale_dir/support/linux.h
Log Message:
-----------
Revert "[libc++] Fix the locale base API on Linux with musl" (#169884)
The patch has been committed without approval from the libc++ review
group and is implementing the locale base API in a way it wasn't
intended to be implemented. The commit also contains a no-reply github
E-Mail, which is in conflict with the LLVM developer policy.
Reverts llvm/llvm-project#167980
Commit: 9bffb10e8b77b00033f2e997731193f81676cd60
https://github.com/llvm/llvm-project/commit/9bffb10e8b77b00033f2e997731193f81676cd60
Author: Gergely Bálint <gergely.balint at arm.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M bolt/lib/Passes/Inliner.cpp
R bolt/test/AArch64/inline-bti.s
Log Message:
-----------
Revert "[BOLT][BTI] Skip inlining BasicBlocks containing indirect tailcalls" (#169881)
Reverts llvm/llvm-project#168403
The attached lit test is failing in some build configurations.
Commit: 3ebe99f4c211322d7e7db5e0547cb0940ed54cd8
https://github.com/llvm/llvm-project/commit/3ebe99f4c211322d7e7db5e0547cb0940ed54cd8
Author: lbonn <github at lbonnans.net>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M libcxx/include/__algorithm/find.h
M libcxx/test/benchmarks/algorithms/nonmodifying/find.bench.cpp
Log Message:
-----------
[libcxx] Unwrap iterators in __find_segment (#161274)
The segmented iterator optimized implementation of find now unwraps
iterators when processing each segments.
As a result, it is able to take better advantage to some find
specializations: calling memchr/wmemchr for vector<vector<{char,int}>>
```
Benchmark Baseline Candidate Difference % Difference
-------------------------------------------------------------- ---------- ----------- ------------ --------------
rng::find(join_view(deque<deque<int>>))_(process_all)/1024 71.13 61.19 -9.94 -13.97
rng::find(join_view(deque<deque<int>>))_(process_all)/32768 2359.19 2237.02 -122.17 -5.18
rng::find(join_view(deque<deque<int>>))_(process_all)/50 16.88 17.59 0.71 4.20
rng::find(join_view(deque<deque<int>>))_(process_all)/8 15.59 16.10 0.51 3.27
rng::find(join_view(deque<deque<int>>))_(process_all)/8192 647.01 532.75 -114.26 -17.66
rng::find(join_view(list<vector<int>>))_(process_all)/1024 689.76 680.74 -9.02 -1.31
rng::find(join_view(list<vector<int>>))_(process_all)/32768 22284.95 21500.26 -784.69 -3.52
rng::find(join_view(list<vector<int>>))_(process_all)/50 32.77 32.12 -0.65 -1.98
rng::find(join_view(list<vector<int>>))_(process_all)/8 6.11 5.92 -0.19 -3.11
rng::find(join_view(list<vector<int>>))_(process_all)/8192 5527.88 5373.43 -154.45 -2.79
rng::find(join_view(vector<list<int>>))_(process_all)/1024 1305.59 1264.04 -41.55 -3.18
rng::find(join_view(vector<list<int>>))_(process_all)/32768 42840.88 43322.64 481.76 1.12
rng::find(join_view(vector<list<int>>))_(process_all)/50 57.52 62.35 4.82 8.38
rng::find(join_view(vector<list<int>>))_(process_all)/8 6.06 5.98 -0.07 -1.18
rng::find(join_view(vector<list<int>>))_(process_all)/8192 20700.53 21431.66 731.12 3.53
rng::find(join_view(vector<vector<char>>))_(process_all)/1024 310.64 18.34 -292.30 -94.09
rng::find(join_view(vector<vector<char>>))_(process_all)/32768 9424.96 531.99 -8892.97 -94.36
rng::find(join_view(vector<vector<char>>))_(process_all)/50 18.58 3.25 -15.32 -82.49
rng::find(join_view(vector<vector<char>>))_(process_all)/8 4.81 2.98 -1.84 -38.13
rng::find(join_view(vector<vector<char>>))_(process_all)/8192 2437.50 126.88 -2310.62 -94.79
rng::find(join_view(vector<vector<int>>))_(process_all)/1024 297.10 41.70 -255.39 -85.96
rng::find(join_view(vector<vector<int>>))_(process_all)/32768 9662.42 1822.05 -7840.36 -81.14
rng::find(join_view(vector<vector<int>>))_(process_all)/50 22.29 5.10 -17.19 -77.11
rng::find(join_view(vector<vector<int>>))_(process_all)/8 3.73 3.13 -0.60 -16.05
rng::find(join_view(vector<vector<int>>))_(process_all)/8192 2399.68 356.10 -2043.58 -85.16
```
Commit: 8bfca268ba57dcfc977a7f1d4cc6f563bb9be67a
https://github.com/llvm/llvm-project/commit/8bfca268ba57dcfc977a7f1d4cc6f563bb9be67a
Author: Miguel Saldivar <saldivarcher at gmail.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M flang-rt/lib/runtime/extensions.cpp
M flang/docs/Intrinsics.md
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Intrinsics.h
M flang/include/flang/Runtime/extensions.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Intrinsics.cpp
A flang/test/Lower/Intrinsics/flush.f90
Log Message:
-----------
[flang] Support FLUSH as an intrinsic subroutine (#165942)
Previously `FLUSH` was only recognized in statement form (e.g.
`flush(unit)`); a
subroutine invocation `call flush(unit)` was treated as a generic user
call with
no special semantics. This change teaches lowering/semantics to handle
`CALL FLUSH` equivalently.
Fixes #119418
Commit: a7c85052ebe7813da50cd461fdccccacb296017a
https://github.com/llvm/llvm-project/commit/a7c85052ebe7813da50cd461fdccccacb296017a
Author: Kirill Vedernikov <kvedernikov at nvidia.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
A mlir/test/Dialect/LLVMIR/nvvm-mma-sp-kind.mlir
A mlir/test/Dialect/LLVMIR/nvvm-mma-sp-ordered.mlir
A mlir/test/Dialect/LLVMIR/nvvm-mma-sp.mlir
Log Message:
-----------
[MLIR] Supported sparse MMA intrinsics in the MLIR->NVVM IR->NVPTX flow (#168686)
This change adds sparse MMA intrinsics to the MLIR -> NVVM IR -> NVPTX
flow. NVVM and NVPTX implementation is based on PTX ISA 9.0.
Commit: f54c6b4306a3f92c08aeb8a9fa222b88985cb9ef
https://github.com/llvm/llvm-project/commit/f54c6b4306a3f92c08aeb8a9fa222b88985cb9ef
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
Log Message:
-----------
[IndVarSimplify] Bail out if not a branch in `maybeFloatingPointRecurrence`
clang-riscv-gauntlet buildbot was previously failing. Conservatively
bail out if not handling a branch when looking for floating-point
recurrences, we may wish to support select and branch in the future.
Fixes: https://lab.llvm.org/buildbot/#/builders/210/builds/5908.
Commit: 135ddf1e8efef7c8ac9b01caa660210e3ca12327
https://github.com/llvm/llvm-project/commit/135ddf1e8efef7c8ac9b01caa660210e3ca12327
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
A llvm/test/CodeGen/AArch64/sve-masked-compressstore-sve2p2.ll
A llvm/test/CodeGen/AArch64/sve-masked-compressstore.ll
Log Message:
-----------
[AArch64][SVE] Add basic support for `@llvm.masked.compressstore` (#168350)
This patch adds SVE support for the `masked.compressstore` intrinsic via
the existing `VECTOR_COMPRESS` lowering and compressing the store mask
via `VECREDUCE_ADD`.
Currently, only `nxv4[i32|f32]` and `nxv2[i64|f64]` are directly
supported, with other types promoted to these, where possible.
This is done in preparation for LV support of this intrinsic, which is
currently being worked on in #140723.
Commit: b76089c7f3d6593d2e2c83db7dbf4965b656bd8c
https://github.com/llvm/llvm-project/commit/b76089c7f3d6593d2e2c83db7dbf4965b656bd8c
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
A llvm/test/Transforms/LoopVectorize/AArch64/widen-gep-all-indices-invariant.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-conditional-branches.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/cse-casts.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/narrow-to-single-scalar.ll
M llvm/test/Transforms/LoopVectorize/pr43166-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/predicatedinst-loop-invariant.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/trunc-shifts.ll
Log Message:
-----------
[VPlan] Skip uses-scalars restriction if one of ops needs broadcast. (#168246)
Update the logic in narrowToSingleScalar to allow narrowing even if not
all users use scalars, if at least one of the operands already needs
broadcasting.
In that case, there won't be any additional broadcasts introduced. This
should allow removing the special handling for stores, which can
introduce additional broadcasts currently.
Fixes https://github.com/llvm/llvm-project/issues/169668.
PR: https://github.com/llvm/llvm-project/pull/168246
Commit: 310211cce5155af2e41da48c461f80cb4ab9000b
https://github.com/llvm/llvm-project/commit/310211cce5155af2e41da48c461f80cb4ab9000b
Author: Matthias Springer <me at m-sp.org>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/UB/IR/UBOps.td
M mlir/lib/Conversion/UBToLLVM/UBToLLVM.cpp
M mlir/lib/Conversion/UBToSPIRV/UBToSPIRV.cpp
M mlir/test/Conversion/UBToLLVM/ub-to-llvm.mlir
M mlir/test/Conversion/UBToSPIRV/ub-to-spirv.mlir
M mlir/test/Dialect/UB/ops.mlir
Log Message:
-----------
[mlir][UB] Add `ub.unreachable` operation (#169872)
Add `ub.unreachable` operation and lowerings to LLVM/SPIRV.
---------
Co-authored-by: Mehdi Amini <joker.eph at gmail.com>
Commit: 6c0d5aad7fa8756221a415fc3bf2bb6c7bf974f6
https://github.com/llvm/llvm-project/commit/6c0d5aad7fa8756221a415fc3bf2bb6c7bf974f6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/test/CodeGen/X86/avx512vlbw-builtins.c
Log Message:
-----------
[X86] ExprConstant - correctly detect __builtin_ia32_ucmpw* builtins as unsigned comparisons (#169891)
Fixes typo from #164026
Commit: e81d9dfba11710f6197301be76336b3e380d9e33
https://github.com/llvm/llvm-project/commit/e81d9dfba11710f6197301be76336b3e380d9e33
Author: Carlos Galvez <carlosgalvezp at gmail.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/bugprone/switch-missing-default-case.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-capturing-lambda-coroutines.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-const-or-ref-data-members.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-do-while.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-non-const-global-variables.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-reference-coroutine-parameters.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/init-variables.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/interfaces-global-init.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/missing-std-forward.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/no-malloc.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/no-suspend-with-lock.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/owning-memory.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-bounds-array-to-pointer-decay.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-bounds-avoid-unchecked-container-access.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-bounds-constant-array-index.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-bounds-pointer-arithmetic.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-const-cast.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-cstyle-cast.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-member-init.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-reinterpret-cast.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-static-cast-downcast.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-union-access.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-vararg.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/special-member-functions.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/use-default-member-init.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/use-enum-class.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/virtual-class-destructor.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/magic-numbers.rst
Log Message:
-----------
[clang-tidy][doc] Fix broken CppCoreGuidelines links (#169886)
They recently changed all their anchors to start with lowercase:
https://github.com/isocpp/CppCoreGuidelines/pull/2304
So now our links are broken :) This patch fixes them.
Co-authored-by: Carlos Gálvez <carlos.galvez at zenseact.com>
Commit: 4fd472c5c06ad4f708b288cd205c9b534438dc74
https://github.com/llvm/llvm-project/commit/4fd472c5c06ad4f708b288cd205c9b534438dc74
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/bugprone/signal-handler.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/use-internal-linkage.rst
Log Message:
-----------
[clang-tidy][NFC] Fix option highlighting and list style in documentation (#169874)
The related discussion can be found at:
https://github.com/llvm/llvm-project/pull/168324#discussion_r2569455701
Commit: 1ab64e4d5f4a09846c8ab31528a3719a953650f4
https://github.com/llvm/llvm-project/commit/1ab64e4d5f4a09846c8ab31528a3719a953650f4
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M libcxx/test/benchmarks/containers/string.bench.cpp
Log Message:
-----------
[libc++][NFC] Simplify string.bench.cpp a bit (#169791)
This removes some dead code and simplifies an expression.
Commit: 7415a7fc11fd7d4865e2f0e08b378c561aae7a4f
https://github.com/llvm/llvm-project/commit/7415a7fc11fd7d4865e2f0e08b378c561aae7a4f
Author: A. Jiang <de34 at live.cn>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M libcxx/include/__functional/weak_result_type.h
Log Message:
-----------
[libc++][NFC] Simplify SFINAE detections in `weak_result_type.h` (#169870)
For `__has_result_type`, it can be replaced with a variable template
`__has_result_type_v`. Note that the pre-existing extraneous `*` used in
detection is buggy, but it's a functional change to fix it.
`false_type` and `true_type` are no longer directly used, so direct
inclusion of `<__type_traits/integral_constant.h>` is removed.
For `__derives_from_{unary,binary}_function`, it's unnecessary to invent
a `__two` type for each specialization. So `void` is used instead. Also,
`nullptr` is now used instead of `0`.
Commit: 2f56977aea4b76a4d533ba7e4827e13878c4f936
https://github.com/llvm/llvm-project/commit/2f56977aea4b76a4d533ba7e4827e13878c4f936
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/test/Transforms/IndVarSimplify/floating-point-iv.ll
Log Message:
-----------
[IndVarSimplify] Add regression test for recently-added refactor (NFC)
Add a test case for commit f54c6b4306a3f92c08aeb8a9fa222b88985cb9ef, which was previously failing after
refactor in b27af83120b32a4b8312ddf1e6317271122769e4.
Commit: 53ece548f82bbdb72d7ae2a7069a61e9983f1fc0
https://github.com/llvm/llvm-project/commit/53ece548f82bbdb72d7ae2a7069a61e9983f1fc0
Author: Sebastian Pop <spop at nvidia.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/include/llvm/Analysis/DependenceAnalysis.h
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/DifferentOffsets.ll
M llvm/test/Analysis/DependenceAnalysis/MIVCheckConst.ll
Log Message:
-----------
[DA] Simplify runtime predicate collection (#157523)
Removes DependenceInfo::getRuntimeAssumptions(), DependenceInfo::Assumptions,
and the print of "Runtime Assumptions:". The runtime assumptions are still
properly attached to each Dependence result and printed as part of the
per-dependence output.
Commit: 0085ecaa5e16edbc6426b91f97a85de8e32f962c
https://github.com/llvm/llvm-project/commit/0085ecaa5e16edbc6426b91f97a85de8e32f962c
Author: David Green <david.green at arm.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/fshl.ll
M llvm/test/Analysis/CostModel/AArch64/fshr.ll
Log Message:
-----------
[AArch64] Add costs for ROTR and ROTL. (#169335)
A funnel shift with the first two operands is a rotate. AArch64 has
scalar instructions for ror so can handle a ROTR by a constant or
variant amount cheaply. A ROTL is a ROTR by the opposite amount, which
for constants is cheap and for variable shifts requires an extra neg.
Commit: fb3bf5b5900867f0738162d737e138ebd0228f8c
https://github.com/llvm/llvm-project/commit/fb3bf5b5900867f0738162d737e138ebd0228f8c
Author: Charles Zablit <c_zablit at apple.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Target/Process.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationClientTest.cpp
Log Message:
-----------
[NFC][lldb][windows] fully qualify references to MemoryRegionInfo (#169845)
Commit: ae58ae1ca7eda3ae1c2db0f7239d3881b390e99d
https://github.com/llvm/llvm-project/commit/ae58ae1ca7eda3ae1c2db0f7239d3881b390e99d
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M mlir/lib/ExecutionEngine/CudaRuntimeWrappers.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for misc-use-internal-linkage in CudaRuntimeWrappers.cpp (NFC)
Commit: a6643f27ecdaaff2945a1acd213a745c1526c525
https://github.com/llvm/llvm-project/commit/a6643f27ecdaaff2945a1acd213a745c1526c525
Author: Volodymyr Turanskyy <vturanskyy at gmail.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M libcxx/CMakeLists.txt
M libcxx/include/__config_site.in
M libcxx/include/__configuration/platform.h
M libcxx/include/__cxx03/__fwd/ios.h
M libcxx/include/__cxx03/__locale
M libcxx/include/__cxx03/__locale_dir/locale_base_api.h
M libcxx/include/__cxx03/fstream
M libcxx/include/__cxx03/locale
M libcxx/include/__cxx03/regex
M libcxx/include/__fwd/ios.h
M libcxx/include/__locale
M libcxx/include/__locale_dir/messages.h
M libcxx/include/fstream
M libcxx/include/regex
M libcxx/src/include/config_elast.h
M libcxx/src/locale.cpp
M libcxx/test/libcxx/system_reserved_names.gen.py
M libcxx/test/std/diagnostics/syserr/syserr.errcat/syserr.errcat.objects/generic_category.pass.cpp
M libcxx/test/std/diagnostics/syserr/syserr.errcat/syserr.errcat.objects/system_category.pass.cpp
M libcxx/test/support/platform_support.h
M libcxx/utils/ci/run-buildbot
M runtimes/cmake/Modules/HandleLibC.cmake
Log Message:
-----------
[libc++] Add support for picolibc and newlib in RUNTIMES_USE_LIBC (#147956)
This replaces detection of picolibc in libc++ (by checking for and
including picolibc.h) with using RUNTIMES_USE_LIBC build time option
intriduced in https://github.com/llvm/llvm-project/pull/134893
RUNTIMES_USE_LIBC is extended to accept picolibc and newlib.
Detection of picolibc via the header is kept as a deprecated feature to
avoid breaking builds.
libc++ is updated to use dedicated LIBCXX_LIBC_NEWLIB macro to check for
newlib specific conditions instead of less informative _NEWLIB_VERSION
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: b5a3b8b704cf7f54531f18966cdcc25f5c4e5044
https://github.com/llvm/llvm-project/commit/b5a3b8b704cf7f54531f18966cdcc25f5c4e5044
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rev.c
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/Bitcode/aarch64-sve-rev-upgrade.ll
Log Message:
-----------
[LLVM][SVE] Remove aarch64.sve.rev intrinsic, using vector.reverse instead. (#169654)
Commit: e16cc8ed4636c36fc6e4e95289faf94048ec79b2
https://github.com/llvm/llvm-project/commit/e16cc8ed4636c36fc6e4e95289faf94048ec79b2
Author: David Green <david.green at arm.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/neon-extadd-extract.ll
Log Message:
-----------
[AArch64] Guard for 128bit vectors in mull combine. (#169839)
The test case generates a extract_subvector(index) leading into a mul.
Make sure we don't try and treat the scalable vector extract as a 128bit
vector in the mull combine.
Fixes #168912
Commit: 14fb59a2c25d2b010ce7b88eb3d201de65e5afed
https://github.com/llvm/llvm-project/commit/14fb59a2c25d2b010ce7b88eb3d201de65e5afed
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
A lldb/test/API/commands/frame/var-dil/expr/PointerArithmetic/TestFrameVarDILExprPointerArithmetic.py
R lldb/test/API/commands/frame/var-dil/expr/PointerArithmetic/TestFrameVarDILPointerArithmetic.py
Log Message:
-----------
[lldb] Fix duplicate test class name causing lldb-dotest conflict (#169861)
Duplicate test class name `TestFrameVarDILPointerArithmetic` prevents
lldb-dotest from running any tests.
The conflict exists between:
- lldb/test/API/commands/frame/vardil/expr/PointerArithmetic/
- lldb/test/API/commands/frame/vardil/basics/PointerArithmetic/
Rename the expr variant to `TestFrameVarDILExprPointerArithmetic`.
Commit: e0c600779a742333c74c8603f311e4166d5b9afe
https://github.com/llvm/llvm-project/commit/e0c600779a742333c74c8603f311e4166d5b9afe
Author: Asher Dobrescu <asher.dobrescu at gmail.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN3.td
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-neon-instructions.s
Log Message:
-----------
[AArch64] Fix metrics of ASIMD instructions in Neoverse N3 (#169790)
Some ASIMD instructions in the Neoverse N3 scheduler model seem to have
been missed and have default definitions, which give them incorrect
latency and throughput. This patch fixes such instructions to match the
current N3 SWOG.
Commit: 9e25a423d07bdcc2686defedcd509fb405d250db
https://github.com/llvm/llvm-project/commit/9e25a423d07bdcc2686defedcd509fb405d250db
Author: Matthew Nagy <matthew.nagy at sony.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M clang/lib/Driver/SanitizerArgs.cpp
M compiler-rt/lib/tysan/CMakeLists.txt
M compiler-rt/test/ubsan/CMakeLists.txt
M compiler-rt/test/ubsan/TestCases/Misc/Posix/sigaction.cpp
M compiler-rt/test/ubsan/TestCases/Misc/coverage-levels.cpp
M compiler-rt/test/ubsan/lit.common.cfg.py
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[TySan] Make TySan compatible with UBSan (#169036)
Commit: 63163b4ceb2c642dfbcafa066dbef4db0c1a80ab
https://github.com/llvm/llvm-project/commit/63163b4ceb2c642dfbcafa066dbef4db0c1a80ab
Author: Dharuni R Acharya <125176188+DharuniRAcharya at users.noreply.github.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
A mlir/test/Target/LLVMIR/nvvm/permute_invalid.mlir
A mlir/test/Target/LLVMIR/nvvm/permute_valid.mlir
Log Message:
-----------
[MLIR][NVVM] Add Permute Op (#169793)
This patch adds the `permute` op.
Lit tests are added to verify the lowering to the intrinsics.
Negative tests are also added to check the error-handling of invalid
combinations.
PTX spec reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-prmt
Signed-off-by: Dharuni R Acharya <dharunira at nvidia.com>
Commit: 346f48ecbcd5a2ba63b3947f3593acce2867692b
https://github.com/llvm/llvm-project/commit/346f48ecbcd5a2ba63b3947f3593acce2867692b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M clang/lib/Headers/avx512bf16intrin.h
M clang/lib/Headers/avx512vlbf16intrin.h
M clang/test/CodeGen/X86/avx512bf16-builtins.c
M clang/test/CodeGen/X86/avx512vlbf16-builtins.c
Log Message:
-----------
[Headers][X86] Convert bf16 to f32 conversions to constexpr implementations (#169841)
Fixes #154911
Commit: 4e30dccd21716b901f91d425c52dc8422a26c6af
https://github.com/llvm/llvm-project/commit/4e30dccd21716b901f91d425c52dc8422a26c6af
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/GPU/SelectObjectAttr.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for llvm-else-after-return in SelectObjectAttr.cpp (NFC)
Commit: 4237ec343a7f0c0d3717972b14ae22ec10ff74cd
https://github.com/llvm/llvm-project/commit/4237ec343a7f0c0d3717972b14ae22ec10ff74cd
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M mlir/lib/Conversion/MPIToLLVM/MPIToLLVM.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for readability-avoid-const-params-in-decls in MPIToLLVM.cpp (NFC)
Commit: cc72171322a982b3d39a2688c45372ee7b5f8b67
https://github.com/llvm/llvm-project/commit/cc72171322a982b3d39a2688c45372ee7b5f8b67
Author: nerix <nerixdev at outlook.de>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
A lldb/test/Shell/SymbolFile/PDB/add-symbols.cpp
Log Message:
-----------
[LLDB][PDB] Access object file through module (#169728)
When a PDB is loaded through `target symbols add <pdb-path>`, its
`m_objectfile_sp` is an `ObjectFilePDB` instead of `ObjectFilePECOFF`
(the debugged module). In both the native and DIA plugin, some paths
assumed that `m_objectfile_sp` is the debugged module. With this PR,
they go through `m_objfile_sp->GetModule()->GetObjectFile()`.
For the DIA plugin, this lead to an assertion failure
(https://github.com/llvm/llvm-project/issues/169628#issuecomment-3582555277)
and for both plugins, it meant that the symbol table wasn't loaded.
Commit: d989ff93e2a073cb921cfcfeb9728a0b51892f1a
https://github.com/llvm/llvm-project/commit/d989ff93e2a073cb921cfcfeb9728a0b51892f1a
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
A flang/test/Lower/OpenMP/omp-declare-reduction-combsub.f90
Log Message:
-----------
[flang][OpenMP] Add lowering of subroutine calls in custom reduction combiners (#169808)
This patch adds support for lowering subroutine calls in custom
reduction combiners to MLIR.
Commit: 4769122b2253c069e38107e80120caa2f1674aad
https://github.com/llvm/llvm-project/commit/4769122b2253c069e38107e80120caa2f1674aad
Author: Shreeyash Pandey <shreeyash335 at gmail.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M libc/test/UnitTest/ExecuteFunctionUnix.cpp
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/stdlib/_Exit_test.cpp
A libc/test/src/stdlib/exit_test.cpp
Log Message:
-----------
[libc][test] split exit tests into two separate tests (#169820)
_Exit(3) is a fairly simple syscall wrapper whereas exit(3) calls
atexit-registered functions + whole lot of stuff that require support
for sync primitives.
Splitting the tests allows testing the former easily (especially for new
port projects)
---------
Signed-off-by: Shreeyash Pandey <shreeyash335 at gmail.com>
Commit: eb323d86561db72d6d71ce2c403da70f16ff7f17
https://github.com/llvm/llvm-project/commit/eb323d86561db72d6d71ce2c403da70f16ff7f17
Author: Shreeyash Pandey <shreeyash335 at gmail.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M libc/config/darwin/aarch64/entrypoints.txt
M libc/src/__support/OSUtil/darwin/CMakeLists.txt
M libc/src/__support/OSUtil/darwin/aarch64/CMakeLists.txt
A libc/src/__support/OSUtil/darwin/exit.cpp
Log Message:
-----------
[libc][darwin] add internal::exit (#166357)
Add internal::exit for MacOS/Darwin
Commit: 9999c316968ffdb77a69f883f8ddbdfe0b57a44b
https://github.com/llvm/llvm-project/commit/9999c316968ffdb77a69f883f8ddbdfe0b57a44b
Author: Charles Zablit <c_zablit at apple.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M lldb/include/lldb/Target/Process.h
Log Message:
-----------
[NFC][lldb] document Process::SetSTDIOFileDescriptor (#169849)
Commit: 7c36e1d424a782077ea22363e906367691676025
https://github.com/llvm/llvm-project/commit/7c36e1d424a782077ea22363e906367691676025
Author: Marco Elver <elver at google.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/include/llvm/IR/Argument.h
Log Message:
-----------
[NFC] Remove deprecated Argument::getParamAlignment() declaration (#169911)
The implementation of Argument::getParamAlignment() was removed in
commit b55f83d013eff244f7cf6bfcd06f06f7c894ff28, but the declaration in
Argument.h was left behind. Remove it.
NFC.
Commit: a3d772490885d60a371ad6a5db7573d664616cca
https://github.com/llvm/llvm-project/commit/a3d772490885d60a371ad6a5db7573d664616cca
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M flang/include/flang/Common/enum-set.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree-visitor.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Parser/OpenMP/allocate-align-tree.f90
M flang/test/Parser/OpenMP/allocate-tree-spec-part.f90
M flang/test/Parser/OpenMP/allocate-tree.f90
M flang/test/Parser/OpenMP/allocators-unparse.f90
M flang/test/Parser/OpenMP/assumption.f90
M flang/test/Parser/OpenMP/atomic-compare.f90
M flang/test/Parser/OpenMP/atomic-end.f90
M flang/test/Parser/OpenMP/atomic-label-do.f90
M flang/test/Parser/OpenMP/bind-clause.f90
M flang/test/Parser/OpenMP/construct-prefix-conflict.f90
M flang/test/Parser/OpenMP/cross-label-do.f90
M flang/test/Parser/OpenMP/declare-reduction-multi.f90
M flang/test/Parser/OpenMP/declare-reduction-operator.f90
M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
M flang/test/Parser/OpenMP/declare-target-indirect-tree.f90
M flang/test/Parser/OpenMP/declare-target-to-clause.f90
M flang/test/Parser/OpenMP/declare-variant.f90
M flang/test/Parser/OpenMP/declare_target-device_type.f90
M flang/test/Parser/OpenMP/dispatch.f90
M flang/test/Parser/OpenMP/dyn-groupprivate-clause.f90
M flang/test/Parser/OpenMP/enter-automap-modifier.f90
M flang/test/Parser/OpenMP/fuse02.f90
M flang/test/Parser/OpenMP/groupprivate.f90
M flang/test/Parser/OpenMP/in-reduction-clause.f90
M flang/test/Parser/OpenMP/interop-construct.f90
M flang/test/Parser/OpenMP/linear-clause.f90
M flang/test/Parser/OpenMP/loop-transformation-construct01.f90
M flang/test/Parser/OpenMP/loop-transformation-construct02.f90
M flang/test/Parser/OpenMP/loop-transformation-construct03.f90
M flang/test/Parser/OpenMP/loop-transformation-construct04.f90
M flang/test/Parser/OpenMP/loop-transformation-construct05.f90
M flang/test/Parser/OpenMP/map-modifiers-v61.f90
M flang/test/Parser/OpenMP/metadirective-dirspec.f90
M flang/test/Parser/OpenMP/metadirective-flush.f90
M flang/test/Parser/OpenMP/openmp6-directive-spellings.f90
M flang/test/Parser/OpenMP/order-clause01.f90
M flang/test/Parser/OpenMP/ordered-block-vs-standalone.f90
M flang/test/Parser/OpenMP/replayable-clause.f90
M flang/test/Parser/OpenMP/requires.f90
M flang/test/Parser/OpenMP/sections.f90
M flang/test/Parser/OpenMP/taskgraph.f90
M flang/test/Parser/OpenMP/threadprivate.f90
M flang/test/Parser/OpenMP/tile.f90
M flang/test/Parser/OpenMP/transparent-clause.f90
M flang/test/Parser/OpenMP/unroll-heuristic.f90
Log Message:
-----------
[flang][OpenMP] Make OmpDirectiveSpecification::Flags an EnumSet (#169713)
The idea is that there can be multiple flags on a given directive. When
"Flags" was a simple enum, only one flag could have been set at a time.
Commit: 80e4a3f7a6c3cad5ca5c1ed259c6d6813834c13f
https://github.com/llvm/llvm-project/commit/80e4a3f7a6c3cad5ca5c1ed259c6d6813834c13f
Author: Shreeyash Pandey <shreeyash335 at gmail.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
A libc/include/llvm-libc-macros/darwin/CMakeLists.txt
A libc/include/llvm-libc-macros/darwin/time-macros.h
M libc/include/llvm-libc-macros/time-macros.h
M libc/include/llvm-libc-types/clockid_t.h
M libc/include/llvm-libc-types/struct_timespec.h
M libc/include/llvm-libc-types/struct_timeval.h
M libc/include/llvm-libc-types/suseconds_t.h
M libc/include/llvm-libc-types/time_t_32.h
M libc/include/llvm-libc-types/time_t_64.h
M libc/src/__support/OSUtil/darwin/exit.cpp
A libc/src/__support/time/darwin/CMakeLists.txt
A libc/src/__support/time/darwin/clock_gettime.cpp
A libc/src/time/darwin/CMakeLists.txt
A libc/src/time/darwin/clock_gettime.cpp
A libc/test/src/__support/time/darwin/CMakeLists.txt
A libc/test/src/__support/time/darwin/clock_gettime.cpp
Log Message:
-----------
[libc] Add clock_gettime for Darwin (#167160)
This patch adds support for clock_gettime for Darwin. Darwin syscall
'gettimeofday' is used to query the time from the system.
Many headers in llvm-libc-types, namely clockid_t, struct_timespec,
struct_timeval, suseconds_t, time_t_32, time_t_64, are modified to
include
header guards as Darwin has its own implementation of primitive types.
Commit: 3a766dcbc462946ad34c1306be70cbbdc1dc868b
https://github.com/llvm/llvm-project/commit/3a766dcbc462946ad34c1306be70cbbdc1dc868b
Author: Asher Dobrescu <asher.dobrescu at gmail.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN3.td
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-sve-instructions.s
Log Message:
-----------
[AArch64] Fix throughout of 64-bit SVE gather loads (#168572)
In the Neoverse N3 Software Optimisation Guide, SVE non termporal gather
load, vector+scalar 64-bit element size and gather load, vector + imm,
64-bit element size both show throughput of 4/5. However, it currently
shows as 2/3. This patch adds a new resource group in order to show the
correct throughput.
Commit: 207627f20f06771edfbb1e779f94dfdc2ff7df26
https://github.com/llvm/llvm-project/commit/207627f20f06771edfbb1e779f94dfdc2ff7df26
Author: Sergei Druzhkov <serzhdruzhok at gmail.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/databreakpoint/TestDAP_setDataBreakpoints.py
M lldb/tools/lldb-dap/Handler/DataBreakpointInfoRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/Watchpoint.cpp
Log Message:
-----------
[lldb-dap] Add data breakpoints for bytes (#167237)
This patch adds support for `dataBreakpointInfoBytes` capability from
DAP. You can test this feature in VSCode (`Add data breakpoint at
address` button in breakpoints tab).
Commit: c2eb332331c4b1e065ff50e08fb038dc63eb754c
https://github.com/llvm/llvm-project/commit/c2eb332331c4b1e065ff50e08fb038dc63eb754c
Author: Charles Zablit <c_zablit at apple.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/dotest.py
Log Message:
-----------
[lldb][dotest] use unused variable (#169903)
Commit: 318236da1feb7e6a5030252e02853e6ed54b39ac
https://github.com/llvm/llvm-project/commit/318236da1feb7e6a5030252e02853e6ed54b39ac
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/SemaHIP/amdgpu-gfx950-load-to-lds.hip
Log Message:
-----------
[HIP][AMDGPU] Remove 't' from all __builtin_*_load_lds builtins (#165389)
Allows for type checking depending on the builtin signature.
Stacked on top of: https://github.com/llvm/llvm-project/pull/165387 and
https://github.com/llvm/llvm-project/pull/165388
Commit: 8c31b1214dd194f71a17a2457784699bb320f802
https://github.com/llvm/llvm-project/commit/8c31b1214dd194f71a17a2457784699bb320f802
Author: Matthew Nagy <matthew.nagy at sony.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M compiler-rt/test/ubsan/TestCases/Misc/Posix/print_stack_trace.cpp
Log Message:
-----------
[TySan](test-only) Mark ubsan-tysan test as unsupported for now (#169934)
Commit: 73d1602d0694671ac7f334635c8a5d1df0de1f0e
https://github.com/llvm/llvm-project/commit/73d1602d0694671ac7f334635c8a5d1df0de1f0e
Author: Eric Li <li.zhe.hua at gmail.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M clang/lib/Tooling/Transformer/SourceCode.cpp
M clang/unittests/Tooling/SourceCodeTest.cpp
Log Message:
-----------
[clang][Tooling] Fix `getFileRange` returning a range spanning macro invocation (#169842)
A followup to 40991215f4aba37fd43b65d96ad0a445dcd041b2.
When the start or end token is inside a macro argument and the other is
outside of the macro, we want to reject the range for a similar reason.
The range will include half of the macro call, either the closing paren
or the macro name and open paren.
Commit: a5dba76de49220246c2d787d29444ed226fbb472
https://github.com/llvm/llvm-project/commit/a5dba76de49220246c2d787d29444ed226fbb472
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
A llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vle-vse-vlm.s
A llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlse-vsse.s
A llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlseg-vsseg.s
A llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlxe-vsxe.s
Log Message:
-----------
Pre-commit tests for x60 vector ld/st latency PR
Signed-off-by: Mikhail R. Gadelha <mikhail at igalia.com>
Commit: 78defc820eef5185d50e9aa396fb5a4b5ed07f92
https://github.com/llvm/llvm-project/commit/78defc820eef5185d50e9aa396fb5a4b5ed07f92
Author: lancesix <lancelot.six at amd.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
M llvm/test/MC/AMDGPU/gfx12_asm_sopk.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopk.txt
Log Message:
-----------
[AMDGPU] Add support for HW_REG_WAVE_SCHED_MODE (#169840)
Expose HW_REG_WAVE_SCHED_MODE to the s_getreg_b32, s_setreg_b32,
s_setreg_imm32_b32 instructions.
Commit: b38ed00495002f4df8b29527fb1cf47317c39d36
https://github.com/llvm/llvm-project/commit/b38ed00495002f4df8b29527fb1cf47317c39d36
Author: nerix <nerixdev at outlook.de>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M lldb/test/Shell/SymbolFile/PDB/add-symbols.cpp
Log Message:
-----------
[LLDB][PDB] Relax check for resolving breakpoint (#169932)
The test was flaky, because it assumed that the breakpoint was always
resolved before `r` was executed
(https://github.com/llvm/llvm-project/pull/169728#issuecomment-3589799783).
This PR removes the check for this order. It still checks that the
breakpoint is resolved before it is hit.
Commit: 442f853e28135813695cc5139bcbe8de8900d43f
https://github.com/llvm/llvm-project/commit/442f853e28135813695cc5139bcbe8de8900d43f
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/x86.c
Log Message:
-----------
[compiler-rt] Add missing cpuid check for clflushopt (#169900)
As in title.
Commit: a941e150749650e6a75e948f10d46b0bedcc128b
https://github.com/llvm/llvm-project/commit/a941e150749650e6a75e948f10d46b0bedcc128b
Author: Alexandru Dura <alexandru.dura at inceptron.io>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
A mlir/test/Dialect/Transform/include-failure-propagation.mlir
Log Message:
-----------
[MLIR][Transform] Return empty handles when the included sequence fails (#169782)
This fixes a bug in the interpreter for transform.include op, which
crashes when attempting to copy out the handles from the yield op of a
failing sequence.
Commit: 4dc29b8a5d406aa74467d66150f0d0771b44ac28
https://github.com/llvm/llvm-project/commit/4dc29b8a5d406aa74467d66150f0d0771b44ac28
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll
A llvm/test/Transforms/LoopVectorize/select-fmax-last-index.ll
A llvm/test/Transforms/LoopVectorize/select-fmin-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-index-interleaving.ll
M llvm/test/Transforms/LoopVectorize/select-smax-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-smin-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-umax-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-umin-first-index.ll
M llvm/test/Transforms/LoopVectorize/select-umin-last-index.ll
Log Message:
-----------
[LV] Add additional argmin/argmax tests for #141431.
Apply suggestions for tests from
https://github.com/llvm/llvm-project/pull/141431 and add additional
missing coverage.
Commit: 8a2965dfa929b49ecc3ba7e508d2f6970ac418af
https://github.com/llvm/llvm-project/commit/8a2965dfa929b49ecc3ba7e508d2f6970ac418af
Author: Martin Storsjö <martin at martin.st>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp
Log Message:
-----------
[llvm-readobj] Remove a leftover comment from 6ad4fdacaeea4777e98a3ab41512c49d3d1b6151. NFC.
This case did get documented upstream, in
https://github.com/MicrosoftDocs/cpp-docs/pull/4202, and the
way that llvm-readobj prints it, implemented in that commit, is
correct.
Commit: e99d8adf8d34da521d9243ba225995ac543745df
https://github.com/llvm/llvm-project/commit/e99d8adf8d34da521d9243ba225995ac543745df
Author: Martin Storsjö <martin at martin.st>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/lib/MC/MCWin64EH.cpp
Log Message:
-----------
[MC] [Win64EH] Fix the operator ordering for UOP_SaveFPLRX. NFC.
The encoded offset should be (OffsetInBytes/8)-1 due to an
implicit offset of 1. Previously the operator ordering was
inverted. As the offset is a multiple of 8, the incorrect
operator ordering did produce the right result in all cases
anyway.
Commit: 99addbf73db596403a1702ac5c3f92e58f9e9f55
https://github.com/llvm/llvm-project/commit/99addbf73db596403a1702ac5c3f92e58f9e9f55
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-28 (Fri, 28 Nov 2025)
Changed paths:
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll
M llvm/test/Transforms/LoopVectorize/select-index-interleaving.ll
M llvm/test/Transforms/LoopVectorize/select-smax-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-smin-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-umax-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-umin-last-index.ll
Log Message:
-----------
[LV] Vectorize selecting last IV of min/max element. (#141431)
Add support for vectorizing loops that select the index of the minimum
or maximum element. The patch implements vectorizing those patterns by
combining Min/Max and FindFirstIV reductions.
It extends matching Min/Max reductions to allow in-loop users that are
FindLastIV reductions. It records a flag indicating that the Min/Max
reduction is used by another reduction. The extra user is then check as
part of the new `handleMultiUseReductions` VPlan transformation.
It processes any reduction that has other reduction users. The reduction
using the min/max reduction currently must be a FindLastIV reduction,
which needs adjusting to compute the correct result:
1. We need to find the last IV for which the condition based on the
min/max reduction is true,
2. Compare the partial min/max reduction result to its final value and,
3. Select the lanes of the partial FindLastIV reductions which
correspond to the lanes matching the min/max reduction result.
Depends on https://github.com/llvm/llvm-project/pull/140451
PR: https://github.com/llvm/llvm-project/pull/141431
Commit: 9bae84b01718e53495abf50958abc86ea45f16bb
https://github.com/llvm/llvm-project/commit/9bae84b01718e53495abf50958abc86ea45f16bb
Author: Luo Yuanke <lyk_03 at hotmail.com>
Date: 2025-11-29 (Sat, 29 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/SplitKit.cpp
M llvm/lib/CodeGen/SplitKit.h
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
M llvm/test/CodeGen/AMDGPU/spill-before-exec.mir
A llvm/test/CodeGen/AMDGPU/spill-before-exec2.mir
M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
M llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll
Log Message:
-----------
[RegAlloc] Relax the split constrain on MBB prolog (#168259)
https://reviews.llvm.org/D52052 is to prevent register split on the MBB
which have prolog instructions defining the exec register (or mask register
that activate the threads of a warp in GPU). The constrain seems too
strict, because 1) If the split is allowed, it may fit the free live range
of a physical register, and no spill will happen; 2) The register class of
register that is under splitting may not be the same to the register that
is defined in prolog, so there is no interference with the register being
defined in prolog.
The current code has another small issue. The MBB->getFirstNonDebugInstr()
just skip debug instructions, but SA->getFirstSplitPoint(Number) would skip
label and phi instructions. This cause some MBB with label instruction
being taken as prolog.
This patch is to relax the split constrain on MMB with prolog by checking
if the register defined in prolog has the common register class with the
register being split. It allow the split if the register defined in prolog
is physical register or there is no common register class.
---------
Co-authored-by: Yuanke Luo <ykluo at birentech.com>
Commit: 5dd2b06d60d3eb9b07c7513358ad8b04386f79bc
https://github.com/llvm/llvm-project/commit/5dd2b06d60d3eb9b07c7513358ad8b04386f79bc
Author: mitchell <mitchell.xu2 at gmail.com>
Date: 2025-11-29 (Sat, 29 Nov 2025)
Changed paths:
M clang-tools-extra/clang-tidy/utils/FormatStringConverter.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/check_clang_tidy.py
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-print.cpp
Log Message:
-----------
[clang-tidy] Fix OOB access in `FormatStringConverter` with signed chars (#169215)
`FormatStringConverter::appendFormatText` incorrectly treated non-ASCII
characters (e.g. UTF-8) as negative values when using signed chars. This
caused them to pass the `< 32` check for control characters.
The negative values were passed to `llvm::hexdigit`, resulting in an OOB
access and a crash.
This closes
[#169198](https://github.com/llvm/llvm-project/issues/169198)
Commit: f5742c4d540a20651a67de51e16242a52e5d4064
https://github.com/llvm/llvm-project/commit/f5742c4d540a20651a67de51e16242a52e5d4064
Author: Qihan Cai <caiqihan021 at hotmail.com>
Date: 2025-11-29 (Sat, 29 Nov 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsRISCVXCV.td
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
A llvm/test/CodeGen/RISCV/xcvelw.ll
A llvm/test/MC/RISCV/corev/XCVelw-pseudo.s
Log Message:
-----------
[RISCV] Intrinsic Support for XCVelw (#129168)
Commit: 66d33cec991c5526b4ec3bbfec741a2a9e78b21f
https://github.com/llvm/llvm-project/commit/66d33cec991c5526b4ec3bbfec741a2a9e78b21f
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-29 (Sat, 29 Nov 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/pr58811-scev-expansion.ll
Log Message:
-----------
[LV] Extend test coverage for inductions depending on complex SCEVs.
Re-generate check lines, add test with complex SCEV as induction start
value and add stores to existing loops to make them not trivial.
Commit: d3762edd5fc11e6ad670950d89d51edabf30f8b5
https://github.com/llvm/llvm-project/commit/d3762edd5fc11e6ad670950d89d51edabf30f8b5
Author: Tirthankar Mazumder <63574588+wermos at users.noreply.github.com>
Date: 2025-11-29 (Sat, 29 Nov 2025)
Changed paths:
M llvm/docs/InstCombineContributorGuide.md
M llvm/docs/KeyInstructionsDebugInfo.md
M llvm/docs/Telemetry.rst
Log Message:
-----------
[docs] Fix typos and remove redundant whitespace (#169981)
As the title says, I fixed some spelling mistakes I found in the docs.
Commit: 3a1079fa2514d16c51bfe53b3da8a8b8d78128c1
https://github.com/llvm/llvm-project/commit/3a1079fa2514d16c51bfe53b3da8a8b8d78128c1
Author: theRonShark <ron.lieberman at amd.com>
Date: 2025-11-29 (Sat, 29 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/SplitKit.cpp
M llvm/lib/CodeGen/SplitKit.h
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
M llvm/test/CodeGen/AMDGPU/spill-before-exec.mir
R llvm/test/CodeGen/AMDGPU/spill-before-exec2.mir
M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
M llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll
Log Message:
-----------
Revert "[RegAlloc] Relax the split constrain on MBB prolog" (#169990)
Reverts llvm/llvm-project#168259
breaks hip buildot
Commit: 3e16aef2a650a8c2da4ebd5c58c6a9e261361828
https://github.com/llvm/llvm-project/commit/3e16aef2a650a8c2da4ebd5c58c6a9e261361828
Author: Koakuma <koachan at protonmail.com>
Date: 2025-11-29 (Sat, 29 Nov 2025)
Changed paths:
M clang/lib/Basic/Targets/Sparc.cpp
M clang/lib/Basic/Targets/Sparc.h
M clang/lib/CodeGen/Targets/Sparc.cpp
M clang/test/CodeGen/Sparc/sparcv8-abi.c
M clang/test/Preprocessor/init.c
M clang/test/Preprocessor/predefined-arch-macros.c
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/test/builtins/CMakeLists.txt
M compiler-rt/test/sanitizer_common/TestCases/printf-ldbl.c
M compiler-rt/test/sanitizer_common/TestCases/scanf-ldbl.c
M compiler-rt/test/ubsan/TestCases/Float/cast-overflow.cpp
M compiler-rt/test/ubsan/TestCases/Misc/log-path_test.cpp
M llvm/lib/Target/Sparc/SparcCallingConv.td
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
A llvm/test/CodeGen/SPARC/fp128-abi.ll
M llvm/test/CodeGen/SPARC/fp16-promote.ll
M llvm/test/CodeGen/SPARC/llvm.sincos.ll
Log Message:
-----------
[SPARC] Properly handle CC for long double on sparc32 (#162226)
Pass and return `long double`s indirectly, as specified in the psABI.
This continues the patch at https://reviews.llvm.org/D89130.
This should fix the issue at https://github.com/llvm/llvm-project/issues/41838.
Commit: 7925a9ea1e63b5e7c1f57e467a05e819f6ef7c27
https://github.com/llvm/llvm-project/commit/7925a9ea1e63b5e7c1f57e467a05e819f6ef7c27
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-29 (Sat, 29 Nov 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/kmov.ll
Log Message:
-----------
[X86] combineConcatVectorOps - add handling for vXi1 concat(logicop(),logicop()) patterns. (#169998)
Commit: a09c5792ed3b6a0644c990060f890c53f042b267
https://github.com/llvm/llvm-project/commit/a09c5792ed3b6a0644c990060f890c53f042b267
Author: Abhishek Varma <avarma094 at gmail.com>
Date: 2025-11-29 (Sat, 29 Nov 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
Log Message:
-----------
[NFC][Linalg] Introduce ConvMatchBuilder + refactor Conv matchers (#169704)
-- This commit is a follow-up and third in the series of adding
matchers for conv/pool ops. Refer:
https://github.com/llvm/llvm-project/pull/163724
-- It introduces ConvMatchBuilder class in order to reduce the
repetitive code across Conv1D/2D/3D/Depthwise/Pooling variants.
-- Refer to [Conv2D
thread](https://github.com/llvm/llvm-project/pull/168362#issuecomment-3575972133)
for further context.
Signed-off-by: Abhishek Varma <abhvarma at amd.com>
Commit: 8462cff40daf40e58d705f5d86d4e91ef6e6294c
https://github.com/llvm/llvm-project/commit/8462cff40daf40e58d705f5d86d4e91ef6e6294c
Author: David Stone <davidfromonline at gmail.com>
Date: 2025-11-29 (Sat, 29 Nov 2025)
Changed paths:
M clang/include/clang/AST/CXXInheritance.h
M clang/lib/AST/CXXInheritance.cpp
Log Message:
-----------
[clang][NFC] Declare `CXXBasePaths::isAmbiguous` as `const` (#169944)
To make this change, we have to use `lookup` instead of `operator[]` on
a map. They both return the same thing: a default constructed value. The
difference is that `lookup` default constructs a value and then returns
it, whereas `operator[]` default constructs a value, inserts it into the
map, and then returns a reference to that. Given that we are using a
by-value return, the only way this is different is if a later use of the
map depends on a value being at that key.
The map is a private variable of the class, so the only possible users
are are other member functions. The only other use of the map that cares
about the contents of the map is in `lookupInBases`, and it accesses the
map with `operator[]`. This means that attempting to access the same
element in this function will default construct the value before doing
anything with it, which means it would do the exact thing it needs to do
in the case where we are looking up a non-existent key, therefore no
behavior has changed.
In terms of performance, this would either be a win or neutral. The
benefit is that in some cases, we can avoid a memory allocation just
read the contents of a 32-bit `0`. If a call to `isAmbiguous` is always
followed up with a call to `lookupInBases`, then we allocate the memory
just a little bit later for no difference in performance.
Commit: 246528cb3ad67ededee5f076fd1ef501af97f294
https://github.com/llvm/llvm-project/commit/246528cb3ad67ededee5f076fd1ef501af97f294
Author: Islam Imad <143586474+Islam-Imad at users.noreply.github.com>
Date: 2025-11-29 (Sat, 29 Nov 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
Log Message:
-----------
[clang][bytecode] Unify elementwise integer builtins using callback pattern (#169957)
This patch refactors the handling of elementwise integer unary
operations to use a unified callback-based approach, eliminating code
duplication.
Changes:
- Extended interp__builtin_elementwise_int_unaryop to handle vector types
- Replaced BI__builtin_elementwise_popcount with callback invocation
- Replaced BI__builtin_elementwise_bitreverse with callback invocation
- Removed interp__builtin_elementwise_popcount function
The new approach uses a lambda function to specify the operation
(popcount or reverseBits), which is applied uniformly to both scalar and
vector operands. This reduces code duplication and makes it easier to
add similar builtins in the future.
Fixes #169657
Commit: 435bafd0d534c8888783f0610afb86ed20d34fa7
https://github.com/llvm/llvm-project/commit/435bafd0d534c8888783f0610afb86ed20d34fa7
Author: AIT <45133884+GeneraluseAI at users.noreply.github.com>
Date: 2025-11-29 (Sat, 29 Nov 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/test/CIR/CodeGenBuiltins/X86/avx512bw-builtins.c
A clang/test/CIR/CodeGenBuiltins/X86/avx512dq-builtins.c
M clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c
Log Message:
-----------
[CIR][X86] Implement lowering for AVX512 mask builtins (#169774)
This patch adds CIR codegen support for AVX512 mask operations on X86,
including kadd, kand, kandn, kor, kxor, knot, and kmov in all supported
mask widths. Each builtin now lowers to the expected vector<i1> form and
bitcast representations in CIR, matching the semantics of the
corresponding LLVM intrinsics.
Commit: f57129312421b05eb2a46cf715f2c1db32f56c83
https://github.com/llvm/llvm-project/commit/f57129312421b05eb2a46cf715f2c1db32f56c83
Author: Fangrui Song <i at maskray.me>
Date: 2025-11-29 (Sat, 29 Nov 2025)
Changed paths:
M llvm/lib/Target/ARC/ARC.td
Log Message:
-----------
ARC: Override pseudos with pointers
This ports #159881 fix for other targets and fixes
```
error: missing target override for pseudoinstruction using PointerLikeRegClass
```
Commit: cd3192a2c9c422f41d517428afef0a2232b9db8f
https://github.com/llvm/llvm-project/commit/cd3192a2c9c422f41d517428afef0a2232b9db8f
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-29 (Sat, 29 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/test/Transforms/LoopVectorize/select-smax-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-smin-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-umax-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-umin-last-index.ll
Log Message:
-----------
[VPlan] Turn IVOp assertion into early exit.
Turn assertion added in 99addbf73 [0] into an early exit.
There are cases where the operand may not be a
VPWidenIntOrFpInductionRecipe, e.g. if the IV increment is selected,
as in the test cases.
[0] https://github.com/llvm/llvm-project/pull/141431
Commit: 9ffd2e40c1c469e3ccb0798fa15fc38d6df42652
https://github.com/llvm/llvm-project/commit/9ffd2e40c1c469e3ccb0798fa15fc38d6df42652
Author: Lucie Choi <clucie at google.com>
Date: 2025-11-30 (Sun, 30 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
A llvm/test/Transforms/SimplifyCFG/skip-merging-duplicate-convergence-instrinsics.ll
Log Message:
-----------
[SimplifyCFG] Fix `SimplifyCFG` pass to skip folding when both blocks contain convergence loop/entry intrinsics. (#166452)
Fixes a bug https://github.com/llvm/llvm-project/issues/165642. [Similar
fix](https://github.com/llvm/llvm-project/pull/165643) is being made in
`IndVarSimplify` pass to account for convergence tokens.
[LLVM
Spec](https://llvm.org/docs/ConvergentOperations.html#llvm-experimental-convergence-loop)
states that only a single loop / entry convergence token can be included
in a basic block.
This PR fixes the issue in `SimplifyCFG` pass so that when a basic block
and its predecessor both contain such convergence intrinsics, it skips
merging the two blocks.
Commit: 24b87b8d4891d90afd8c4033a4997dedecbdd107
https://github.com/llvm/llvm-project/commit/24b87b8d4891d90afd8c4033a4997dedecbdd107
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-29 (Sat, 29 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
Log Message:
-----------
[VPlan] Skip cost verification for loops with EVL gather/scatter.
The VPlan-based cost model use vp_gather/vp_scatter for gather/scatter
costs, which is different to the legacy cost model and cannot be matched
there. Don't verify the costs match for plans containing gather/scatters
with EVL.
Fixes https://github.com/llvm/llvm-project/issues/169948.
Commit: a8cffb82991f76c3a004820d94dd4e0853bce1db
https://github.com/llvm/llvm-project/commit/a8cffb82991f76c3a004820d94dd4e0853bce1db
Author: Fangrui Song <i at maskray.me>
Date: 2025-11-29 (Sat, 29 Nov 2025)
Changed paths:
M llvm/include/llvm/MC/MCObjectFileInfo.h
M llvm/lib/MC/MCObjectFileInfo.cpp
Log Message:
-----------
Remove unused MCObjectFileInfo::SupportsWeakOmittedEHFrame
The code is related to pre-AsmPrinter legacy code (see
9cb0e94dc79657144d639c722619e1e4fc19040e in 2008). The only caller has
been removed by bb237c72a69e6294258874a40aaaf14ad2747710 in 2011.
Commit: 3de11e9251bba9f974b99947662eea69329075b2
https://github.com/llvm/llvm-project/commit/3de11e9251bba9f974b99947662eea69329075b2
Author: Matthias Springer <me at m-sp.org>
Date: 2025-11-30 (Sun, 30 Nov 2025)
Changed paths:
M mlir/lib/Dialect/ControlFlow/IR/CMakeLists.txt
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/test/Dialect/ControlFlow/canonicalize.mlir
Log Message:
-----------
[mlir][CF] Add `ub.unreachable` canonicalization (#169873)
Basic blocks with only a `ub.unreachable` terminator are unreachable.
This commit adds a canonicalization pattern that folds to `cf.cond_br`
to `cf.br` if one of the destination branches is unreachable.
Commit: 70970d0a5bc07f5614cfdb3c224b1ee8bbd58546
https://github.com/llvm/llvm-project/commit/70970d0a5bc07f5614cfdb3c224b1ee8bbd58546
Author: sathvikreddy853 <157317970+sathvikreddy853 at users.noreply.github.com>
Date: 2025-11-29 (Sat, 29 Nov 2025)
Changed paths:
M flang/lib/Lower/Runtime.cpp
M flang/test/Lower/pause-statement.f90
Log Message:
-----------
[flang] Implement lowering for the PAUSE statement (Fixes #166821) (#167115)
Implements lowering for the Fortran `PAUSE` statement.
- Handles PAUSE with no operand.
- Handles PAUSE with integer argument.
- Handles PAUSE with character literal argument.
- Adds a new lowering test: flang/test/Lower/pause-statement.f90.
Unlike STOP, PAUSE does not unconditionally terminate control flow.
The lowering preserves labels and GOTOs, consistent with legacy Fortran
behavior.
Fixes: #166821
---------
Co-authored-by: aditya nath <adityanath5002 at gmail.com>
Co-authored-by: Eugene Epshteyn <eepshteyn at nvidia.com>
Commit: dda1fcf7b14cdcaeb39fc7aed377d8d4483ebcac
https://github.com/llvm/llvm-project/commit/dda1fcf7b14cdcaeb39fc7aed377d8d4483ebcac
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2025-11-30 (Sun, 30 Nov 2025)
Changed paths:
M llvm/tools/llc/llc.cpp
Log Message:
-----------
[llc][NFC] Remove unreachable return statement (#169915)
`reportError()` is a `[[noreturn]]` that calls `exit(1)`.
Commit: 22257e8d6ed5600d9c689fecbd17ea68e9d08a6f
https://github.com/llvm/llvm-project/commit/22257e8d6ed5600d9c689fecbd17ea68e9d08a6f
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-11-30 (Sun, 30 Nov 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Port #169873 (#170027)
A new dependency was added.
Commit: ce2c0813f0615084f387b31715ca0e1d8377134e
https://github.com/llvm/llvm-project/commit/ce2c0813f0615084f387b31715ca0e1d8377134e
Author: Jonas Hahnfeld <jonas.hahnfeld at cern.ch>
Date: 2025-11-30 (Sun, 30 Nov 2025)
Changed paths:
M clang/lib/AST/RecordLayoutBuilder.cpp
Log Message:
-----------
[clang] Move and update comment in getASTRecordLayout, NFC.
isDefinition was already renamed to isCompleteDefinition by commit
f937c023bf in 2011, later the day the comment was originally written.
Commit: b22825631293c19f70ca9969bd9de6094c688430
https://github.com/llvm/llvm-project/commit/b22825631293c19f70ca9969bd9de6094c688430
Author: David Green <david.green at arm.com>
Date: 2025-11-30 (Sun, 30 Nov 2025)
Changed paths:
M clang/include/clang/Basic/arm_mve.td
M clang/include/clang/Basic/arm_mve_defs.td
M clang/test/CodeGen/arm-mve-intrinsics/ternary.c
M clang/utils/TableGen/MveEmitter.cpp
M llvm/include/llvm/IR/IntrinsicsARM.td
M llvm/lib/Target/ARM/ARMInstrMVE.td
M llvm/test/CodeGen/Thumb2/mve-intrinsics/strict-intrinsics.ll
Log Message:
-----------
[ARM] Introduce intrinsics for MVE fma under strict-fp. (#169771)
Similar to #169156, this adds an @arm.mve.fma intrinsic for strict-fp. A
Builder class is added to act as the common subclass of IRBuilder and
IRInt.
Commit: 0bd2f12753604cd072ae0935820ba9a23bb17ccc
https://github.com/llvm/llvm-project/commit/0bd2f12753604cd072ae0935820ba9a23bb17ccc
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-11-30 (Sun, 30 Nov 2025)
Changed paths:
M mlir/docs/Dialects/Linalg/OpDSL.md
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
M mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
M mlir/test/Dialect/Affine/value-bounds-reification.mlir
M mlir/test/Dialect/Linalg/fusion-elementwise-ops.mlir
M mlir/test/Dialect/Linalg/generalize-named-polymorphic-ops.mlir
M mlir/test/Dialect/Linalg/invalid.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-matmul-masked-vec.mlir
M mlir/test/Integration/Dialect/Transform/match_matmul.mlir
M mlir/test/python/integration/dialects/linalg/opsrun.py
Log Message:
-----------
[mlir][linalg] Restrict fill initial value type to output element type (#169567)
Disallow implicit casting, which is surprising, and, IME, usually
indicative of copy-paste errors.
Because the initial value must be a scalar, I don't expect this to
affect any data movement.
Commit: 76d5dd5f9e9154a34dd6cfee232f322fc8112d63
https://github.com/llvm/llvm-project/commit/76d5dd5f9e9154a34dd6cfee232f322fc8112d63
Author: Shih-Po Hung <shihpo.hung at sifive.com>
Date: 2025-11-30 (Sun, 30 Nov 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
Log Message:
-----------
[TTI][RISCV] Add cost modelling for intrinsic vp.load.ff (#169890)
This patch is a rework of #160470 (which was reverted).
With getMemIntrinsicCost() now available, we can re‑land the change and
reduce vp_load_ff boilerplate.
Commit: 38678a91f3eb984a76db40b71d573e336194029a
https://github.com/llvm/llvm-project/commit/38678a91f3eb984a76db40b71d573e336194029a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-11-30 (Sun, 30 Nov 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/X86/addcarry.ll
Log Message:
-----------
[DAG] getCarry - always succeed if we encounter a i1 type during trunc/ext peeling (#169777)
If we are force reconstructing a carry from a raw MVT::i1 type, make
sure we don't miss any cases while peeling through trunc/ext chains -
check for i1 types at the start of the while loop
Fixes #169691
Commit: f42e58f61680e325555f382cab5115c54df6f6df
https://github.com/llvm/llvm-project/commit/f42e58f61680e325555f382cab5115c54df6f6df
Author: Nico Weber <thakis at chromium.org>
Date: 2025-11-30 (Sun, 30 Nov 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn] port a6643f27ecda (libc++ picolib/newlib)
Commit: 113e0c95a89ab3ce9f1ac4e2ba6351d957a64da9
https://github.com/llvm/llvm-project/commit/113e0c95a89ab3ce9f1ac4e2ba6351d957a64da9
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-30 (Sun, 30 Nov 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/select-umin-first-index.ll
Log Message:
-----------
[LV] Add additional tests for argmin with find-first wrapping IV ranges.
Add test cases for upcoming argmin vectorization changes that have
wrapping IV ranges.
Commit: c465a56e9d1f244a32ea00a426d449bc7f38a9b1
https://github.com/llvm/llvm-project/commit/c465a56e9d1f244a32ea00a426d449bc7f38a9b1
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-11-30 (Sun, 30 Nov 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
Log Message:
-----------
[VPlan] Handle canonical IVs in ::isSingleScalar. (NFCI)
The canonical IV is always a single scalar. They are already treated as
uniform-across-UF-and-VF.
This should currently be NFC.
Commit: ef3785887c7c306d1ea933430befb78fb17e1650
https://github.com/llvm/llvm-project/commit/ef3785887c7c306d1ea933430befb78fb17e1650
Author: Fangrui Song <i at maskray.me>
Date: 2025-11-30 (Sun, 30 Nov 2025)
Changed paths:
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
Log Message:
-----------
ELF: Move .eh_frame_hdr code closer to .eh_frame . NFC
... as they are closely related. Also improve the comments.
Commit: 75aa01b89553bf4213a3b0e83829b6d0689941b9
https://github.com/llvm/llvm-project/commit/75aa01b89553bf4213a3b0e83829b6d0689941b9
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/CodeGen/ISDOpcodes.h
Log Message:
-----------
Revert "LangRef: Clarify llvm.minnum and llvm.maxnum about sNaN and signed zero (#112852)" (#168838)
This reverts commit 363b05944f9212511ee6811d0eb1af841c177226.
This is a follow up of #166912. Sorry for not noticing the change at the
beginning, but I disagree with both sNaN and signed zero semantics
change.
I have 3 justifications:
- llvm.minnum and llvm.maxnum are common intrinsics, we cannot change
the definition just because "some architectures" support the changed
semantic. For example, X86 min/max instructions neither distinguish sNaN
nor signed zero. We have to add couples of extra instructions to match
with the new definition, which makes the intrinsics less efficient. But
efficient is not the reason for the objection. I object because such
cost is unnecessary;
- As the example ``minnum(fadd(sNaN, -0.0), 1.0)`` shows, minnum/maxnum
themself cannot guarantee consistent result if multiple FP arithmetic
operations involved. It makes the sacrifice of performance totally
unnecessary. `Behavior of Floating-Point NaN values` notes all NaNs can
be treated as quiet NaNs unless using Constrained Floating-Point
Intrinsics. So the cost is only worth for constrained minnum/maxnum ones
if we want to define them;
- Signed zero handling is unnecessary either, because even the C
functions don't require it. If any other front ends require, they can
use the existing fminnum_ieee/fmaxnum_ieee or define new intrinsics;
Fixes: https://github.com/llvm/llvm-project/issues/138303 and
https://github.com/llvm/llvm-project/issues/169122
Commit: e110abc3c65bb33f738738a9fa6e0f5b602ed97f
https://github.com/llvm/llvm-project/commit/e110abc3c65bb33f738738a9fa6e0f5b602ed97f
Author: lonely eagle <2020382038 at qq.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/test/Dialect/Affine/loop-coalescing.mlir
Log Message:
-----------
[mlir][affine] Use iter argument replace init when delete loop in the coalesceLoops function (#169514)
Fix https://github.com/llvm/llvm-project/issues/169483 by using iter
argument replace init when delete loop in the coalesceLoops function.
Commit: 2e21bb815d527ebbe4d53f0396d1e40aae9e2146
https://github.com/llvm/llvm-project/commit/2e21bb815d527ebbe4d53f0396d1e40aae9e2146
Author: fennecJ <hwahwa649 at gmail.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/zicond-fp-select-zfinx.ll
Log Message:
-----------
[RISCV][ISelLowering] Use Zicond for FP selects on Zfinx/Zdinx (#169299)
### Summary
This patch let RISCVTargetLowering::lowerSELECT to lower some
floating-point select operations through an integer zicond select when:
* Zicond is available, and
* FP values live in GPRs (Zfinx/Zdinx), and
* Select condition is an integer type.
In that scenario there is no extra cost for GPR <-> "FP GPR" moves, so
we can implement FP selects with a CZERO-based sequence instead of a
branch.
For example, for
```c
float foo(int cond, float x) {
return (cond != 0) ? x : 0.0f;
}
```
the current lowering produces:
```asm
foo:
mv a2, a0
li a0, 0
beqz a2, .LBB0_2
.LBB0_1:
mv a0, a1
.LBB0_2:
ret
```
With this patch, when targeting rv64ima_zicond_zfinx we instead get:
```asm
foo:
czero.nez a2, zero, a0
czero.eqz a0, a1, a0
or a0, a2, a0
ret
```
The existing branch-based lowering is preserved for:
* targets without Zicond
* targets where FP registers are separate (+f, +d without zfinx/zdinx)
### Testing
Adds llvm/test/CodeGen/RISCV/zicond-fp-select-zfinx.ll to cover:
* RV64 Zfinx/Zicond vs Zfinx without Zicond
* RV64 Zdinx/Zicond vs Zdinx without Zicond
* RV32 Zfinx/Zicond vs Zfinx without Zicond
Also adds baseline RV32F/RV64F/RV64D cases to ensure we still use
branches when FP registers are separate.
The tests check that:
* With Zicond + Zfinx/Zdinx, FP select lowers to a CZERO+OR sequence
with no conditional branches.
* Without Zicond (or without Zfinx/Zdinx), we still get branch-based
code and no czero.* instructions.
Commit: 7494f3df14e5d401b73f2f8ccbd811f3556c5be5
https://github.com/llvm/llvm-project/commit/7494f3df14e5d401b73f2f8ccbd811f3556c5be5
Author: Aadesh Premkumar <aadesh.premkumar at multicorewareinc.com>
Date: 2025-11-30 (Sun, 30 Nov 2025)
Changed paths:
M llvm/docs/SPIRVUsage.rst
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
A llvm/test/CodeGen/SPIRV/extensions/SPV_ALTERA_arbitrary_precision_fixed_point/capability-arbitrary-precision-fixed-point-numbers.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_arbitrary_precision_integers.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_int4/negative.ll
M llvm/test/CodeGen/SPIRV/extensions/both-allowed-disallowed-extension-error.ll
M llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions-but-one.ll
M llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions.ll
M llvm/test/CodeGen/SPIRV/extensions/unused-but-allowed-SPV_INTEL_arbitrary_precision_integers.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/bitreverse_small_type.ll
M llvm/test/CodeGen/SPIRV/trunc-nonstd-bitwidth.ll
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
Log Message:
-----------
[SPIRV] Added support for extension SPV_ALTERA_arbitrary_precision_fixed_point and name change of SPV_INTEL_arbitrary_precision_integers to SPV_ALTERA_arbitrary_precision_integers (#136085)
--Added support for extension SPV_ALTERA_arbitrary_precision_fixed_point
--Added test files for extension
SPV_ALTERA_arbitrary_precision_fixed_point
Commit: 6369279a0c4ca1a008241f171657c1db83cfe026
https://github.com/llvm/llvm-project/commit/6369279a0c4ca1a008241f171657c1db83cfe026
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/CodeGen/ISDOpcodes.h
Log Message:
-----------
Revert "Revert "LangRef: Clarify llvm.minnum and llvm.maxnum about sNaN and signed zero (#112852)"" (#170067)
Reverts llvm/llvm-project#168838
Justification is confused and this did not receive adequate discussion,
particularly during a holiday week
Commit: e2181400d70857bc5a212a4053d5d7940c84acaf
https://github.com/llvm/llvm-project/commit/e2181400d70857bc5a212a4053d5d7940c84acaf
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
Log Message:
-----------
[RISCV][llvm] Correct shamt in P extension EXTRACT_VECTOR_ELT lowering (#169823)
During operation legalization, element type should have been turn into
XLenVT which makes the SHL a no-op. We need to use exact vector element
type instead.
Commit: 81c5d468cf00d6e41112fba6c89d6c40013bcbda
https://github.com/llvm/llvm-project/commit/81c5d468cf00d6e41112fba6c89d6c40013bcbda
Author: Men-cotton <mencotton0410 at gmail.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
A mlir/test/Dialect/LLVMIR/nvvm-target-invalid.mlir
Log Message:
-----------
[MLIR][NVVM] Propagate verification failure for unsupported SM targets (#170001)
Fixes: https://github.com/llvm/llvm-project/issues/169113
Correctly propagate verification failure when
`NVVM::RequiresSMInterface` check fails during `gpu.module`
verification.
Previously, the walk was interrupted but the function returned
`success()`, causing a mismatch between the emitted diagnostic and the
return status. This led to assertion failures in Python bindings which
expect `failure()` when diagnostics are emitted.
CC: @grypp
Commit: 036279addf48cc5a5d7596f4abd06d33242f4f19
https://github.com/llvm/llvm-project/commit/036279addf48cc5a5d7596f4abd06d33242f4f19
Author: Jason Molenda <jmolenda at apple.com>
Date: 2025-11-30 (Sun, 30 Nov 2025)
Changed paths:
M lldb/tools/debugserver/source/DNB.cpp
M lldb/tools/debugserver/source/MacOSX/MachProcess.h
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
Log Message:
-----------
[lldb][debugserver] Return shared cache filepath in jGetSharedCacheInfo (#168474)
Add a "shared_cache_path" key-value to the jGetSharedCacheInfo response,
if we can fetch the shared cache path.
If debugserver and the inferior process are running with the same shared
cache UUID, there is a simple SPI to get debugserver's own shared cache
filepath and we will return that.
On newer OSes, there are SPI we can use to get the inferior process'
shared cache filepath, use that if necessary and the SPI are available.
The response for the jGetSharedCacheInfo packet will now look like
{"shared_cache_base_address":6609256448,"shared_cache_uuid":"B69FF43C-DBFD-3FB1-B4FE-A8FE32EA1062","no_shared_cache":false,"shared_cache_private_cache":false,"shared_cache_path":"/System/Volumes/Preboot/Cryptexes/OS/System/Library/dyld/dyld_shared_cache_arm64e"}
when we have the full information about the shared cache in the
inferior. There are three possible types of responses:
1. inferior has not yet mapped in a shared cache (read: when stopped at
dyld_start and dyld hasn't started executing yet). In this case, no
"shared_cache_path" is listed. ("shared_cache_base_address" will be 0,
"shared_cache_uuid" will be all-zeroes uuid)
2. inferior has a shared cache, but it is different than debugserver's
and we do not have the new SPI to query the shared cache filepath. No
"shared_cache_path" is listed.
3. We were able to find the shared cache filepath, and it is included in
the response, as above.
I'm not using this information in lldb yet, but changes that build on
this will be forthcoming.
rdar://148939795
Commit: 9416b19e4f3b471216dcc3fcabac98f2a430faea
https://github.com/llvm/llvm-project/commit/9416b19e4f3b471216dcc3fcabac98f2a430faea
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/saturating-add-sub.ll
Log Message:
-----------
[InstCombine] Add missing constant check (#170068)
`cast<Constant>` is not guarded by a type check during canonicalization
of predicates. This patch adds a type check in the outer if to avoid the
crash. `dyn_cast` may introduce another nested if, so I just use
`isa<Constant>` instead.
Address the crash reported in
https://github.com/llvm/llvm-project/pull/153053#issuecomment-3593914124.
Commit: dc5ce79cc143e2e33e9cabbaa41349199b919cda
https://github.com/llvm/llvm-project/commit/dc5ce79cc143e2e33e9cabbaa41349199b919cda
Author: Luke Lau <luke at igalia.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/struct-return.ll
Log Message:
-----------
[LV] Regenerate some check lines. NFC
The scalar loop doesn't exist anymore after 8907b6d39371d439461cdd3475d5590f87821377
Commit: bbb0dbadfaf292766922f5914f1c8946e2ef8519
https://github.com/llvm/llvm-project/commit/bbb0dbadfaf292766922f5914f1c8946e2ef8519
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M clang/include/clang/AST/Decl.h
M clang/lib/AST/ComparisonCategories.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/Sema/CodeCompleteConsumer.cpp
Log Message:
-----------
[clang][AST] Add `RecordDecl::getNumFields()` (#170022)
Not sure why that didn't exist yet, but we have quite a few places using
the same `std::distance` pattern.
Commit: a751ed97acf1ea760d6724bc6ea72b1b9b59a448
https://github.com/llvm/llvm-project/commit/a751ed97acf1ea760d6724bc6ea72b1b9b59a448
Author: Vasily Leonenko <vleonen at users.noreply.github.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M bolt/docs/CommandLineArgumentReference.md
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/test/AArch64/hook-fini.s
A bolt/test/AArch64/hook-init.s
A bolt/test/X86/hook-init.s
M bolt/test/X86/internal-call-instrument-so.s
M bolt/test/runtime/X86/instrument-wrong-target.s
Log Message:
-----------
[BOLT] Support runtime library hook via DT_INIT_ARRAY (#167467)
Major part of this PR is commit implementing support for DT_INIT_ARRAY
for BOLT runtime libraries initialization. Also, it adds related
hook-init test & fixes couple of X86 instrumentation tests.
This commit follows implementation of instrumentation hook via
DT_FINI_ARRAY (https://github.com/llvm/llvm-project/pull/67348) and
extends it for BOLT runtime libraries (including instrumentation
library) initialization hooking.
Initialization has has differences compared to finalization:
- Executables always use ELF entry point address. Update code checks it
and updates init_array entry if ELF is shared library (have no interp
entry) and have no DT_INIT entry. Also this commit introduces
"runtime-lib-init-hook" option to select primary initialization hook
(entry_point, init, init_array) with fall back to next available hook in
input binary. e.g. in case of libc we can explicitly set it to
init_array.
- Shared library init_array entries relocations usually has
R_AARCH64_ABS64 type on AArch64 binaries. We check relocation type and
adjust methods for reading init_array relocations in discovery and
update methods.
---------
Co-authored-by: Vasily Leonenko <vasily.leonenko at huawei.com>
Commit: 4d7abe535512e1076ff7e5fea14afde29615a8ed
https://github.com/llvm/llvm-project/commit/4d7abe535512e1076ff7e5fea14afde29615a8ed
Author: Matthias Springer <me at m-sp.org>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
M mlir/lib/ExecutionEngine/APFloatWrappers.cpp
M mlir/test/Conversion/ArithToApfloat/arith-to-apfloat.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-apfloat-emulation.mlir
Log Message:
-----------
[mlir][arith] Add support for `cmpf` to `ArithToAPFloat` (#169753)
Add support for `arith.cmpf`.
Commit: 17677ad7eb2b2391d61c976887bbd2616e7d6c3e
https://github.com/llvm/llvm-project/commit/17677ad7eb2b2391d61c976887bbd2616e7d6c3e
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
Log Message:
-----------
[LV] Don't create WidePtrAdd recipes for scalar VFs (#169344)
While attempting to remove the use of undef from more loop vectoriser
tests I discovered a bug where this assert was firing:
```
llvm::Constant* llvm::Constant::getSplatValue(bool) const: Assertion `this->getType()->isVectorTy() && "Only valid for vectors!"' failed.
...
#8 0x0000aaaab9e2fba4 llvm::Constant::getSplatValue
#9 0x0000aaaab9dfb844 llvm::ConstantFoldBinaryInstruction
```
This seems to be happening because we are incorrectly generating
WidePtrAdd recipes for scalar VFs. The PR fixes this by checking whether
a plan has a scalar VF only in legalizeAndOptimizeInductions.
This PR also removes the use of undef from the test `both` in
Transforms/LoopVectorize/iv_outside_user.ll, which is what started
triggering the assert.
Fixes #169334
Commit: 7ce71414ec3c7eebe77c1c248c119a7df5067369
https://github.com/llvm/llvm-project/commit/7ce71414ec3c7eebe77c1c248c119a7df5067369
Author: Abhishek Varma <avarma094 at gmail.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
Log Message:
-----------
[NFC][Linalg] Follow-up on ConvMatchBuilder (#170080)
-- This commit addresses [follow-up review comments on
169704](https://github.com/llvm/llvm-project/pull/169704#pullrequestreview-3521785548).
-- Contains NFC nit/minor changes.
Signed-off-by: Abhishek Varma <abhvarma at amd.com>
Commit: f67b01847031aadd4d9d9b90e82c99d0490c4287
https://github.com/llvm/llvm-project/commit/f67b01847031aadd4d9d9b90e82c99d0490c4287
Author: Matthias Springer <me at m-sp.org>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M mlir/test/Conversion/UBToSPIRV/ub-to-spirv.mlir
Log Message:
-----------
[mlir][SPIRV] Improve ub.unreachable lowering test case (#170083)
Addresses a comment on the PR that introduces the ub.reachable ->
spriv.Unreachable lowering
(https://github.com/llvm/llvm-project/pull/169872#discussion_r2573670611).
Commit: 05b19895510af314a78ed42c6a969c4478a8f496
https://github.com/llvm/llvm-project/commit/05b19895510af314a78ed42c6a969c4478a8f496
Author: Matthias Springer <me at m-sp.org>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
M mlir/lib/ExecutionEngine/APFloatWrappers.cpp
M mlir/test/Conversion/ArithToApfloat/arith-to-apfloat.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-apfloat-emulation.mlir
Log Message:
-----------
[mlir][arith] Add support for `negf` to `ArithToAPFloat` (#169759)
Add support for `arith.negf`.
Commit: 9afb651613a9383923b0f52885fb2221a5ec134f
https://github.com/llvm/llvm-project/commit/9afb651613a9383923b0f52885fb2221a5ec134f
Author: ShashwathiNavada <shashwathinavada at gmail.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M clang/docs/OpenMPSupport.rst
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/Basic/OpenMPKinds.def
M clang/include/clang/Sema/SemaOpenMP.h
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/OpenMP/target_update_codegen.cpp
A clang/test/OpenMP/target_update_iterator_ast_print.cpp
A clang/test/OpenMP/target_update_iterator_serialization.cpp
Log Message:
-----------
Adding support for iterator in motion clauses. (#159112)
As described in section 2.14.6 of openmp spec, the patch implements
support for iterator in motion clauses.
---------
Co-authored-by: Shashwathi N <nshashwa at pe31.hpc.amslabs.hpecorp.net>
Commit: 147c466bcd0efcd3efe7b403db441ec8d4912d6a
https://github.com/llvm/llvm-project/commit/147c466bcd0efcd3efe7b403db441ec8d4912d6a
Author: Matthias Springer <me at m-sp.org>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
M mlir/lib/ExecutionEngine/APFloatWrappers.cpp
M mlir/test/Conversion/ArithToApfloat/arith-to-apfloat.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-apfloat-emulation.mlir
Log Message:
-----------
[mlir][arith] Add support for min/max to `ArithToAPFloat` (#169760)
Add support for `arith.minnumf`, `arith.maxnumf`, `arith.minimumf`,
`arith.maximumf`.
Commit: eb711d8e142683e06ae14b652218b881896f5046
https://github.com/llvm/llvm-project/commit/eb711d8e142683e06ae14b652218b881896f5046
Author: Carlos Galvez <carlosgalvezp at gmail.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-bounds-avoid-unchecked-container-access.rst
Log Message:
-----------
[clang-tidy][doc] Fix incorrect link syntax in cppcoreguidelines-pro-… (#170088)
…bounds-avoid-unchecked-container-access
Missing a trailing underscore to render it as a link.
Co-authored-by: Carlos Gálvez <carlos.galvez at zenseact.com>
Commit: 8079d033c97f3ad8d289fa014b0f1c85cf3bbbad
https://github.com/llvm/llvm-project/commit/8079d033c97f3ad8d289fa014b0f1c85cf3bbbad
Author: Steven Wu <stevenwu at apple.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/unittests/CAS/CASTestConfig.h
Log Message:
-----------
[CAS] Temporarily skip tests on old windows version (#170063)
Commit: 8e6fb0ee84dcfba7e712f3ee4cc9d9819bc2a757
https://github.com/llvm/llvm-project/commit/8e6fb0ee84dcfba7e712f3ee4cc9d9819bc2a757
Author: Gergely Bálint <gergely.balint at arm.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M bolt/lib/Passes/Inliner.cpp
A bolt/test/AArch64/inline-bti-dbg.s
A bolt/test/AArch64/inline-bti.s
Log Message:
-----------
Reapply "[BOLT][BTI] Skip inlining BasicBlocks containing indirect tailcalls" (#169881) (#169929)
This reapplies commit 5d6d74359d69d3aada6a46c7cf51d84eb0848b70.
Fix: added assertions to the requirements of the test
--------
Original commit message:
In the Inliner pass, tailcalls are converted to calls in the inlined
BasicBlock. If the tailcall is indirect, the `BR` is converted to `BLR`.
These instructions require different BTI landing pads at their targets.
As the targets of indirect tailcalls are unknown, inlining such blocks
is unsound for BTI: they should be skipped instead.
Commit: dda15ad0aadf0bf485498e3d5f22e5caf94925e5
https://github.com/llvm/llvm-project/commit/dda15ad0aadf0bf485498e3d5f22e5caf94925e5
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.h
Log Message:
-----------
[mlir][spirv] Use MapVector for BlockMergeInfoMap (#169636)
This should ensure that the structurizer while loop is deterministic
across runs. Use of `MapVector` addresses the source of the
nondeterminism which is use of a `Block*` as a map key.
fixes #128547
Commit: 1317083530b95fcf052f3017394a7719a67546fa
https://github.com/llvm/llvm-project/commit/1317083530b95fcf052f3017394a7719a67546fa
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
M llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
M llvm/test/CodeGen/AArch64/sme-za-exceptions.ll
M llvm/test/CodeGen/AArch64/sme-zt0-state.ll
Log Message:
-----------
[AArch64][SME] Support saving/restoring ZT0 in the MachineSMEABIPass (#166362)
This patch extends the MachineSMEABIPass to support ZT0. This is done
with the addition of two new states:
- `ACTIVE_ZT0_SAVED`
* This is used when calling a function that shares ZA, but does not
share ZT0 (i.e., no ZT0 attributes)
* This state indicates ZT0 must be saved to the save slot, but ZA must
remain on, with no lazy save setup
- `LOCAL_COMMITTED`
* This is used for saving ZT0 in functions without ZA state
* This state indicates ZA is off and ZT0 has been saved
* This state is general enough to support ZA, but the required
transitions have not been implemented†
To aid with readability, the state transitions have been reworked to a
switch of `transitionFrom(<FromState>).to(<ToState>)`, rather than
nested ifs, which helps manage more transitions.
† This could be implemented to handle some cases of undefined behavior
better.
Commit: 34c44f21ae9bf5532e467fa2e942fe61715d1394
https://github.com/llvm/llvm-project/commit/34c44f21ae9bf5532e467fa2e942fe61715d1394
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M flang/include/flang/Optimizer/Analysis/TBAAForest.h
M flang/lib/Optimizer/Analysis/TBAAForest.cpp
M flang/lib/Optimizer/Transforms/AddAliasTags.cpp
M flang/test/Driver/tco-test-gen.fir
M flang/test/Fir/tbaa-codegen2.fir
M flang/test/Transforms/tbaa-for-common-vars.fir
M flang/test/Transforms/tbaa-for-global-equiv-vars.fir
M flang/test/Transforms/tbaa-for-local-vars.fir
M flang/test/Transforms/tbaa-with-dummy-scope.fir
M flang/test/Transforms/tbaa-with-dummy-scope2.fir
M flang/test/Transforms/tbaa2.fir
M flang/test/Transforms/tbaa3.fir
M flang/test/Transforms/tbaa4.fir
Log Message:
-----------
[flang][TBAA] refine TARGET/POINTER encoding (#169544)
Previously we were less specific for POINTER/TARGET: encoding that they
could alias with (almost) anything.
In the new system, the "target data" tree is now a sibling of the other
trees (e.g. "global data"). POITNTER variables go at the root of the
"target data" tree, whereas TARGET variables get their own nodes under
that tree. For example,
```
integer, pointer :: ip
real, pointer :: rp
integer, target :: it
integer, target :: it2(:)
real, target :: rt
integer :: i
real :: r
```
- `ip` and `rp` may alias with any variable except `i` and `r`.
- `it`, `it2`, and `rt` may alias only with `ip` or `rp`.
- `i` and `r` cannot alias with any other variable.
Fortran 2023 15.5.2.14 gives restrictions on entities associated with
dummy arguments. These do not allow non-target globals to be modified
through dummy arguments and therefore I don't think we need to make all
globals alias with dummy arguments.
I haven't implemented it in this patch, but I wonder whether it is ever
possible for `ip` to alias with `rt` or even `it2`.
While I was updating the tests I fixed up some tests that still assumed
that local alloc tbaa wasn't the default.
I found no functional regressions in the gfortran test suite, fujitsu
test suite, spec2017, or a selection of HPC apps we test internally.
Commit: 8ec2112ec8b43a0fdf8f5e000f0c6376b6105987
https://github.com/llvm/llvm-project/commit/8ec2112ec8b43a0fdf8f5e000f0c6376b6105987
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M clang/test/OpenMP/cancel_codegen.cpp
M clang/test/OpenMP/critical_codegen.cpp
M clang/test/OpenMP/critical_codegen_attr.cpp
M clang/test/OpenMP/irbuilder_nested_parallel_for.c
M clang/test/OpenMP/masked_codegen.cpp
M clang/test/OpenMP/master_codegen.cpp
M clang/test/OpenMP/nested_loop_codegen.cpp
M clang/test/OpenMP/ordered_codegen.cpp
M clang/test/OpenMP/parallel_codegen.cpp
M flang/test/Integration/OpenMP/parallel-private-reduction-worstcase.f90
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/test/Transforms/OpenMP/parallel_region_merging.ll
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-barrier-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-cancellation-point.mlir
M mlir/test/Target/LLVMIR/openmp-outline-infinite-loop.mlir
M mlir/test/Target/LLVMIR/openmp-parallel-reduction-multiblock.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-array-sections.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-init-arg.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-sections.mlir
Log Message:
-----------
[OMPIRBuilder] re-land cancel barriers patch #164586 (#169931)
A barrier will pause execution until all threads reach it. If some go to
a different barrier then we deadlock. This manifests in that the
finalization callback must only be run once. Fix by ensuring we always
go through the same finalization block whether the thread in cancelled
or not and no matter which cancellation point causes the cancellation.
The old callback only affected PARALLEL, so it has been moved into the
code generating PARALLEL. For this reason, we don't need similar changes
for other cancellable constructs. We need to create the barrier on the
shared exit from the outlined function instead of only on the cancelled
branch to make sure that threads exiting normally (without cancellation)
meet the same barriers as those which were cancelled. For example,
previously we might have generated code like
```
...
%ret = call i32 @__kmpc_cancel(...)
%cond = icmp eq i32 %ret, 0
br i1 %cond, label %continue, label %cancel
continue:
// do the rest of the callback, eventually branching to %fini
br label %fini
cancel:
// Populated by the callback:
// unsafe: if any thread makes it to the end without being cancelled
// it won't reach this barrier and then the program will deadlock
%unused = call i32 @__kmpc_cancel_barrier(...)
br label %fini
fini:
// run destructors etc
ret
```
In the new version the barrier is moved into fini. I generate it *after*
the destructors because the standard describes the barrier as occurring
after the end of the parallel region.
```
...
%ret = call i32 @__kmpc_cancel(...)
%cond = icmp eq i32 %ret, 0
br i1 %cond, label %continue, label %cancel
continue:
// do the rest of the callback, eventually branching to %fini
br label %fini
cancel:
br label %fini
fini:
// run destructors etc
// safe so long as every exit from the function happens via this block:
%unused = call i32 @__kmpc_cancel_barrier(...)
ret
```
To achieve this, the barrier is now generated alongside the finalization
code instead of in the callback. This is the reason for the changes to
the unit test.
I'm unsure if I should keep the incorrect barrier generation callback
only on the cancellation branch in clang with the OMPIRBuilder backend
because that would match clang's ordinary codegen. Right now I have
opted to remove it entirely because it is a deadlock waiting to happen.
---
This re-lands #164586 with a small fix for a failing buildbot running
address sanitizer on clang lit tests.
In the previous version of the patch I added an insertion point guard
"just to be safe" and never removed it. There isn't insertion point
guarding on the other route out of this function and we do not
preserve the insertion point around getFiniBB either so it is not
needed here.
The problem flagged by the sanitizers was because the saved insertion
point pointed to an instruction which was then removed inside the FiniCB
for some clang codegen functions. The instruction was freed when it was
removed. Then accessing it to restore the insertion point was a use
after free bug.
Commit: 2c9e9ffa77e37fa0ff5d15325dab5471636b8a44
https://github.com/llvm/llvm-project/commit/2c9e9ffa77e37fa0ff5d15325dab5471636b8a44
Author: Luke Lau <luke at igalia.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
A llvm/test/Transforms/SCCP/get_vector_length-intrinsic.ll
Log Message:
-----------
[SCCP] Handle llvm.experimental.get.vector.length calls (#169527)
As noted in the reproducer provided in
https://github.com/llvm/llvm-project/issues/164762#issuecomment-3554719231,
on RISC-V after LTO we sometimes have trip counts exposed to vectorized
loops. The loop vectorizer will have generated calls to
@llvm.experimental.get.vector.length, but there are [some
properties](https://llvm.org/docs/LangRef.html#id2399) about the
intrinsic we can use to simplify it:
- The result is always less than both Count and MaxLanes
- If Count <= MaxLanes, then the result is Count
This teaches SCCP to handle these cases with the intrinsic, which allows
some single-iteration-after-LTO loops to be unfolded.
#169293 is related and also simplifies the intrinsic in InstCombine via
computeKnownBits, but it can't fully remove the loop since
computeKnownBits only does limited reasoning on recurrences.
Commit: b1620996f49611767d1950927835fa20284355d5
https://github.com/llvm/llvm-project/commit/b1620996f49611767d1950927835fa20284355d5
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/c.c
Log Message:
-----------
[clang][bytecode] Fix discarding ImplitiValueInitExprs (#170089)
They don't have side-effects, so this should be fine.
Fixes https://github.com/llvm/llvm-project/issues/170064
Commit: d1500d12be60f21f9a80fdbfb3cfa24b8f20a0c9
https://github.com/llvm/llvm-project/commit/d1500d12be60f21f9a80fdbfb3cfa24b8f20a0c9
Author: Luke Lau <luke at igalia.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[SelectionDAG] Add SelectionDAG::getTypeSize. NFC (#169764)
Similar to how getElementCount avoids the need to reason about fixed and
scalable ElementCounts separately, this patch adds getTypeSize to do the
same for TypeSize.
It also goes through and replaces some of the manual uses of getVScale
with getTypeSize/getElementCount where possible.
Commit: b7721c55fc09616d186bbe1f9e3e4b9df8fb4009
https://github.com/llvm/llvm-project/commit/b7721c55fc09616d186bbe1f9e3e4b9df8fb4009
Author: Jim Lin <jim at andestech.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/zicond-fp-select-zfinx.ll
Log Message:
-----------
[RISCV] Remove the duplicate for RV32/RV64 in zicond-fp-select-zfinx.ll. NFC.
Commit: 8ceeba83812d551423a9e50f600cc77ea4718ca2
https://github.com/llvm/llvm-project/commit/8ceeba83812d551423a9e50f600cc77ea4718ca2
Author: Ming Yan <ming.yan at terapines.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/test/Dialect/SCF/canonicalize.mlir
Log Message:
-----------
[MLIR][SCF] Canonicalize redundant scf.if from scf.while before region into after region (#169892)
When a `scf.if` directly precedes a `scf.condition` in the before region
of a `scf.while` and both share the same condition, move the if into the
after region of the loop. This helps simplify the control flow to enable
uplifting `scf.while` to `scf.for`.
Commit: 29fef3a51e6dcc5e6b5683c281ce7c19b19f0bbf
https://github.com/llvm/llvm-project/commit/29fef3a51e6dcc5e6b5683c281ce7c19b19f0bbf
Author: Gergely Bálint <gergely.balint at arm.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M bolt/docs/PacRetDesign.md
M bolt/include/bolt/Passes/InsertNegateRAStatePass.h
M bolt/lib/Passes/InsertNegateRAStatePass.cpp
M bolt/unittests/CMakeLists.txt
A bolt/unittests/Passes/CMakeLists.txt
A bolt/unittests/Passes/InsertNegateRAState.cpp
Log Message:
-----------
[BOLT] Improve DWARF CFI generation for pac-ret binaries (#163381)
During InsertNegateRAState pass we check the annotations on
instructions,
to decide where to generate the OpNegateRAState CFIs in the output
binary.
As only instructions in the input binary were annotated, we have to make
a judgement on instructions generated by other BOLT passes.
Incorrect placement may cause issues when an (async) unwind request
is received during the new "unknown" instructions.
This patch adds more logic to make a more informed decision on by taking
into account:
- unknown instructions in a BasicBlock with other instruction have the
same RAState. Previously, if the BasicBlock started with an unknown
instruction,
the RAState was copied from the preceding block. Now, the RAState is
copied from
the succeeding instructions in the same block.
- Some BasicBlocks may only contain instructions with unknown RAState,
As explained in issue #160989, these blocks already have incorrect
unwind info. Because of this, the last known RAState based on the layout order
is copied.
Updated bolt/docs/PacRetDesign.md to reflect changes.
Commit: 2c217909839b345760de964cf87bf1045c9ff784
https://github.com/llvm/llvm-project/commit/2c217909839b345760de964cf87bf1045c9ff784
Author: Ming Yan <ming.yan at terapines.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/UpliftWhileToFor.cpp
M mlir/test/Dialect/SCF/uplift-while.mlir
Log Message:
-----------
Revert "[MLIR][SCF] Sink scf.if from scf.while before region into after region in scf-uplift-while-to-for" (#169888)
Reverts llvm/llvm-project#165216
It is implemented in #169892 .
Commit: b60a84a46fa558dd14497f53fc8ad6f7ff505aaa
https://github.com/llvm/llvm-project/commit/b60a84a46fa558dd14497f53fc8ad6f7ff505aaa
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M flang/include/flang/Optimizer/Analysis/TBAAForest.h
M flang/lib/Optimizer/Analysis/TBAAForest.cpp
M flang/lib/Optimizer/Transforms/AddAliasTags.cpp
M flang/test/Driver/tco-test-gen.fir
M flang/test/Fir/tbaa-codegen2.fir
M flang/test/Transforms/tbaa-for-common-vars.fir
M flang/test/Transforms/tbaa-for-global-equiv-vars.fir
M flang/test/Transforms/tbaa-for-local-vars.fir
M flang/test/Transforms/tbaa-with-dummy-scope.fir
M flang/test/Transforms/tbaa-with-dummy-scope2.fir
M flang/test/Transforms/tbaa2.fir
M flang/test/Transforms/tbaa3.fir
M flang/test/Transforms/tbaa4.fir
Log Message:
-----------
Revert "[flang][TBAA] refine TARGET/POINTER encoding" (#170105)
Reverts llvm/llvm-project#169544
[Regressed](https://lab.llvm.org/buildbot/#/builders/143/builds/12956)
gfortran test suite
Commit: bf22687c4842fe4f78cee34ec4e5e2d3e6e1fb59
https://github.com/llvm/llvm-project/commit/bf22687c4842fe4f78cee34ec4e5e2d3e6e1fb59
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M clang/test/OpenMP/cancel_codegen.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M mlir/test/Target/LLVMIR/openmp-cancel.mlir
Log Message:
-----------
[OMPIRBuilder] CANCEL IF(FALSE) is still a cancellation point (#170095)
>From OpenMP 4.0:
> When an if clause is present on a cancel construct and the if
expression
> evaluates to false, the cancel construct does not activate
cancellation.
> The cancellation point associated with the cancel construct is always
> encountered regardless of the value of the if expression.
This wording is retained unmodified in OpenMP 6.0.
This re-opens the already approved PR #164587, which was closed by
accident. The only changes are a rebase.
Commit: 6c0a02f2adb4dd92c965bd5a70f19d59d4c597a5
https://github.com/llvm/llvm-project/commit/6c0a02f2adb4dd92c965bd5a70f19d59d4c597a5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
A llvm/test/CodeGen/X86/combine-fsqrt.ll
Log Message:
-----------
[X86] Add tests showing failure to concat sqrt intrinsics together. (#170096)
Similar to fdiv, we should be trying to concat these high latency instructions together
Commit: 0e721b75aaa39181c71e798d5a95102eb349bf1c
https://github.com/llvm/llvm-project/commit/0e721b75aaa39181c71e798d5a95102eb349bf1c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
A llvm/test/CodeGen/X86/combine-rcp.ll
A llvm/test/CodeGen/X86/combine-rsqrt.ll
Log Message:
-----------
[X86] Add tests showing failure to concat RCPPS + RSQRTPS intrinsics together. (#170098)
Can only do this for 128->256 cases as we can't safely convert to the RCP14/RSQRT14 variants
Commit: edd1856686a44db896d64a3083619dfcc473a65f
https://github.com/llvm/llvm-project/commit/edd1856686a44db896d64a3083619dfcc473a65f
Author: Jasmine Tang <jjasmine at igalia.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
M llvm/lib/Target/WebAssembly/WebAssemblyInstrInteger.td
M llvm/test/CodeGen/WebAssembly/masked-shifts.ll
Log Message:
-----------
[WebAssembly] Optimize away mask of 63 for shl ( zext (and i32 63))) (#152397)
Fixes https://github.com/llvm/llvm-project/issues/71844
Commit: 130746addfed03e9a53b62dfc0da47e2c18ee959
https://github.com/llvm/llvm-project/commit/130746addfed03e9a53b62dfc0da47e2c18ee959
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M mlir/lib/Dialect/SCF/IR/CMakeLists.txt
Log Message:
-----------
[MLIR] Fix build after #169982 (#170107)
Commit: 577cd6fb02959270dcdc48864ea0fba1d540cef4
https://github.com/llvm/llvm-project/commit/577cd6fb02959270dcdc48864ea0fba1d540cef4
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/utils/lit/lit/run.py
M llvm/utils/lit/lit/util.py
A llvm/utils/lit/tests/windows-pools.py
Log Message:
-----------
[LIT] Workaround the 60 processed limit on Windows (#157759)
Python multiprocessing is limited to 60 workers at most:
https://github.com/python/cpython/blob/6bc65c30ff1fd0b581a2c93416496fc720bc442c/Lib/concurrent/futures/process.py#L669-L672
The limit being per thread pool, we can work around it by using multiple
pools on windows when we want to actually use more workers.
Commit: 48931e5e5942304afd1c0a493be91b662ffd221b
https://github.com/llvm/llvm-project/commit/48931e5e5942304afd1c0a493be91b662ffd221b
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Check memcmp builtin for one-past-the-end pointers (#170097)
We can't read from those and will run into an assertion sooner or later.
Fixes https://github.com/llvm/llvm-project/issues/170031
Commit: d0df51bc93fb5a254dd8a05752b782a13dc1f64d
https://github.com/llvm/llvm-project/commit/d0df51bc93fb5a254dd8a05752b782a13dc1f64d
Author: Luke Lau <luke at igalia.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/IR/ConstantRange.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/unittests/IR/ConstantRangeTest.cpp
Log Message:
-----------
[ConstantRange] Allow casting to the same bitwidth. NFC (#170102)
>From the review in
https://github.com/llvm/llvm-project/pull/169527#discussion_r2567122387,
there are some users where we want to extend or truncate a ConstantRange
only if it's not already the destination bitwidth. Previously this
asserted, so this PR relaxes it to just be a no-op, similar to
IRBuilder::createZExt and friends.
Commit: 58770200a7045dd46dfb8c85299eee504d95026c
https://github.com/llvm/llvm-project/commit/58770200a7045dd46dfb8c85299eee504d95026c
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/include/llvm/Analysis/DependenceAnalysis.h
Log Message:
-----------
[DA] Clean up unnecessary member function declarations (#170106)
Follow-up for #169047. The previous PR moved some functions from DA to
Delinearization, but the member function declarations were not updated
accordingly. This patch removes them.
Commit: 6157d4625941870392a0f5377b8ab08c4c204ce4
https://github.com/llvm/llvm-project/commit/6157d4625941870392a0f5377b8ab08c4c204ce4
Author: Sohaib Iftikhar <sohaibiftikhar at google.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[MLIR|BUILD]: Fix for 8ceeba838 (#170110)
Commit: 989ac4c9db3aaa660dcfd0d1d5683b4c07dffaec
https://github.com/llvm/llvm-project/commit/989ac4c9db3aaa660dcfd0d1d5683b4c07dffaec
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
A llvm/test/CodeGen/X86/combine-fceil.ll
A llvm/test/CodeGen/X86/combine-fnearbyint.ll
A llvm/test/CodeGen/X86/combine-frint.ll
A llvm/test/CodeGen/X86/combine-froundeven.ll
A llvm/test/CodeGen/X86/combine-ftrunc.ll
A llvm/test/CodeGen/X86/combine-rndscale.ll
Log Message:
-----------
[X86] Add tests showing failure to concat fp rounding intrinsics together. (#170108)
Commit: 8478de3d00a7a16b532b3902d5d9794405ae2379
https://github.com/llvm/llvm-project/commit/8478de3d00a7a16b532b3902d5d9794405ae2379
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AArch64/sve-extract-scalable-vector.ll
M llvm/test/CodeGen/AArch64/sve-insert-vector.ll
Log Message:
-----------
[LLVM][CodeGen] Remove failure cases when widening EXTRACT/INSERT_SUBVECTOR. (#162308)
This PR implements catch all handling for widening the scalable
subvector operand (INSERT_SUBVECTOR) or result (EXTRACT_SUBVECTOR). It
does this via the stack using masked memory operations. With general
handling available we can add optimiations for specific cases.
Commit: d3edc94d113d2d30a7a26fa4d72496ac0b9256b8
https://github.com/llvm/llvm-project/commit/d3edc94d113d2d30a7a26fa4d72496ac0b9256b8
Author: Giacomo Castiglioni <giacastiglioni at gmail.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M mlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h
M mlir/include/mlir/Dialect/GPU/IR/GPUBase.td
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/lib/Conversion/GPUToNVVM/WmmaOpsToNvvm.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/test/Conversion/GPUToNVVM/wmma-ops-to-nvvm.mlir
M mlir/test/Dialect/GPU/invalid.mlir
A mlir/test/Integration/GPU/CUDA/TensorCore/sm80/wmma-matmul-f64.mlir
Log Message:
-----------
[MLIR][GPU] subgroup_mma fp64 extension - take 2 (#169061)
This PR re-lands #165873.
This PR extends the gpu.subgroup_mma_* ops to support fp64 type.
The extension requires special handling during the lowering to nvvm due
to the return type for load ops for fragment a and b (they return a
scalar instead of a struct).
The original PR did not guard the new test based on the required
architecture (sm80) which lead to a failure on the cuda runners with T4
GPUs.
Commit: 05ad84095a04adba2a0d8699629fc3db705b23f6
https://github.com/llvm/llvm-project/commit/05ad84095a04adba2a0d8699629fc3db705b23f6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-fsqrt.ll
Log Message:
-----------
[X86] combineConcatVectorOps - add handling to concat sqrt intrinsics together (#170113)
Similar to fdiv, we should be trying to concat these high latency instructions together
Commit: 4a6451af7b945bb8283ee71bf9628b385bd69ec0
https://github.com/llvm/llvm-project/commit/4a6451af7b945bb8283ee71bf9628b385bd69ec0
Author: Jasmine Tang <jjasmine at igalia.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M clang/include/clang/Basic/Attr.td
Log Message:
-----------
Fix typo in attr.td: Avaiable -> Available (#170116)
Follow up to #163618
Commit: 8808beeb1a35c8f2ffe228b9e91af5067388f909
https://github.com/llvm/llvm-project/commit/8808beeb1a35c8f2ffe228b9e91af5067388f909
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M offload/include/OpenMP/omp.h
M offload/include/omptarget.h
M offload/libomptarget/OpenMP/API.cpp
M offload/libomptarget/exports
A offload/test/api/omp_device_uid.c
M openmp/device/include/DeviceTypes.h
M openmp/device/include/Interface.h
M openmp/device/src/State.cpp
M openmp/runtime/src/dllexports
M openmp/runtime/src/include/omp.h.var
M openmp/runtime/src/kmp_ftn_cdecl.cpp
A openmp/runtime/test/api/omp_device_uid.c
Log Message:
-----------
Reland: [OpenMP] Implement omp_get_uid_from_device() / omp_get_device_from_uid() (#168554)
Reland https://github.com/llvm/llvm-project/pull/164392 with Fortran support moved to follow-up PR
Commit: d431f38860ff6759bb9648e5620d587c6581b951
https://github.com/llvm/llvm-project/commit/d431f38860ff6759bb9648e5620d587c6581b951
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/test/Analysis/DependenceAnalysis/gcd-miv-overflow.ll
Log Message:
-----------
[DA] Add tests for GCD MIV misses dependency due to overflow (NFC) (#169926)
Add two test cases where dependencies are missed due to overflows. These
will be fixed by #169927 and #169928, respectively.
Commit: c25ad27174c47f01c7bd542fac55e8a7cdec5b73
https://github.com/llvm/llvm-project/commit/c25ad27174c47f01c7bd542fac55e8a7cdec5b73
Author: David Green <david.green at arm.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] Remove unused references to MVT::f80. (#169545)
These f80 fp types are only supported on X86 and can be removed from
AArch64. It looks like they were copied from another backend by mistake.
Commit: b27301ff5d9ab39ab4dfc5d0041273cdd80546a4
https://github.com/llvm/llvm-project/commit/b27301ff5d9ab39ab4dfc5d0041273cdd80546a4
Author: Ryan Holt <ryanholt at mathworks.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M mlir/test/Integration/Dialect/Linalg/CPU/runtime-verification.mlir
Log Message:
-----------
[mlir][linalg] Re-enable linalg runtime verification test (#170129)
Test seems to pass after re-enabling without any additional changes.
Commit: b4c30b0e1ece2bc97ef91e4bbed422c2e620be05
https://github.com/llvm/llvm-project/commit/b4c30b0e1ece2bc97ef91e4bbed422c2e620be05
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/utils/lit/tests/windows-pools.py
Log Message:
-----------
Fix LLVM test to use %python instead of python
This uses lit substitution, which fixes running this test on
some environment where 'python' isn't in the path.
Commit: 461433fea23d18d6a9da73bf09698bd4b3c68ef6
https://github.com/llvm/llvm-project/commit/461433fea23d18d6a9da73bf09698bd4b3c68ef6
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/gcd-miv-overflow.ll
Log Message:
-----------
[DA] Add overflow check when calculating Delta in GCD MIV (#169928)
Add overflow check when computing `Delta` in `gcdMIVtest`.
Fix one of the tests added by #169926.
Commit: aaa59e34894d3d0648631776afe2b297e2ad0895
https://github.com/llvm/llvm-project/commit/aaa59e34894d3d0648631776afe2b297e2ad0895
Author: Nico Weber <thakis at chromium.org>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/utils/gn/secondary/bolt/unittests/BUILD.gn
A llvm/utils/gn/secondary/bolt/unittests/Passes/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
Log Message:
-----------
[gn] port 29fef3a51e6d (bolt PassTests)
Commit: 4978cd3cdf64fb1cd87f1ddf73fc44bb8ca223c2
https://github.com/llvm/llvm-project/commit/4978cd3cdf64fb1cd87f1ddf73fc44bb8ca223c2
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/utils/lit/tests/windows-pools.py
Log Message:
-----------
Revert "Fix LLVM test to use %python instead of python"
This reverts commit b4c30b0e1ece2bc97ef91e4bbed422c2e620be05.
This substitution is not available from within these tests.
Commit: 2538f6382a10af359c05a07738a0021f9eae221a
https://github.com/llvm/llvm-project/commit/2538f6382a10af359c05a07738a0021f9eae221a
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/test/Target/SPIRV/selection.mlir
Log Message:
-----------
[mlir][spirv] Support (de)serialization of block operands in `spirv.Switch` (#168899)
Commit: ad656d3a1954dd6157ba689b3003b6fbb97a0833
https://github.com/llvm/llvm-project/commit/ad656d3a1954dd6157ba689b3003b6fbb97a0833
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul-transpose-a.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul.mlir
Log Message:
-----------
[mlir][linalg][arm] Fix use of fill in arm integration tests (#170143)
Follow up to
https://github.com/llvm/llvm-project/pull/169567#issuecomment-3596220014
Commit: 1ced99aa4a989b54bda8a68f0f39ecd9004afd81
https://github.com/llvm/llvm-project/commit/1ced99aa4a989b54bda8a68f0f39ecd9004afd81
Author: Mend Renovate <bot at renovateapp.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
[Github] Update actions/upload-artifact action to v5 (#170058)
This PR contains the following updates:
| Package | Type | Update | Change |
|---|---|---|---|
|
[actions/upload-artifact](https://redirect.github.com/actions/upload-artifact)
| action | major | `v4.6.2` -> `v5.0.0` |
Commit: aa04b654b4113d3e2c1a36baf769d601ab378096
https://github.com/llvm/llvm-project/commit/aa04b654b4113d3e2c1a36baf769d601ab378096
Author: Mend Renovate <bot at renovateapp.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M .github/workflows/check-ci.yml
M .github/workflows/ci-post-commit-analyzer.yml
M .github/workflows/docs.yml
M .github/workflows/gha-codeql.yml
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
M .github/workflows/libclang-python-tests.yml
M .github/workflows/libcxx-run-benchmarks.yml
M .github/workflows/mlir-spirv-tests.yml
M .github/workflows/premerge.yaml
M .github/workflows/release-binaries.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-doxygen.yml
M .github/workflows/scorecard.yml
M .github/workflows/spirv-tests.yml
Log Message:
-----------
[Github] Update GHA Dependencies (#170057)
This PR contains the following updates:
| Package | Type | Update | Change | Pending |
|---|---|---|---|---|
|
[actions/setup-python](https://redirect.github.com/actions/setup-python)
| action | minor | `v6.0.0` -> `v6.1.0` | |
|
[github/codeql-action](https://redirect.github.com/github/codeql-action)
| action | patch | `v4.31.4` -> `v4.31.5` | `v4.31.6` |
|
[hendrikmuhs/ccache-action](https://redirect.github.com/hendrikmuhs/ccache-action)
| action | patch | `v1.2.19` -> `v1.2.20` | |
Commit: 235d44d8b6f40b8804537d950d5655fcfe80d9c7
https://github.com/llvm/llvm-project/commit/235d44d8b6f40b8804537d950d5655fcfe80d9c7
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/utils/lit/tests/lit.cfg
M llvm/utils/lit/tests/windows-pools.py
Log Message:
-----------
Fix LLVM test to use %python instead of python
This uses lit substitution, which fixes running this test on
some environment where 'python' isn't in the path.
Commit: fa6d611f0a352967eefb8a8175f1556241cacc17
https://github.com/llvm/llvm-project/commit/fa6d611f0a352967eefb8a8175f1556241cacc17
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/test/Analysis/DependenceAnalysis/gcd-miv-overflow.ll
Log Message:
-----------
[DA] Remove special handling for SCEVAddExpr in GCD MIV (#169927)
In `gcdMIVtest`, there is logic that assumes the addition(s) of
`SCEVAddExpr` don't overflow without any checks. Adding overflow checks
would be fine, but this part appeart to be less useful. So this patch
removes it.
Fix one of the tests added in #169926.
Commit: 3b9e203364dcd8234b12eb447ddbcf97a877558c
https://github.com/llvm/llvm-project/commit/3b9e203364dcd8234b12eb447ddbcf97a877558c
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/include/clang/Basic/BuiltinTemplates.td
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/SemaTypeTraits.cpp
A clang/test/SemaCXX/type-trait-common-reference.cpp
M libcxx/include/__type_traits/common_reference.h
M libcxx/include/module.modulemap.in
Log Message:
-----------
[Clang] Add __builtin_common_reference (#121199)
Commit: 97e0573f9e16fb6b7970130ff24e5c9eba98e164
https://github.com/llvm/llvm-project/commit/97e0573f9e16fb6b7970130ff24e5c9eba98e164
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/test/CIR/IR/func.cir
A clang/test/CIR/IR/invalid-func-attr.cir
Log Message:
-----------
[CIR] Start printing/parsing func 'attributes' (#169674)
This patch adds a print and parse ability for the func to have
MLIR-standard 'attributes' printed along side the standard function.
This patch also seeds the initial "disallowed" list so that we don't
print things that we have custom printing for, AND will disallow them
from being parsed. I believe this list to be complete, and it passes all
tests.
This printing of attributes is necessary for testing some OpenACC things
that putting into the normal func-printing seems unnecessary.
Commit: c7c6c0a45c1d840d05b414d73f7bab5136dcb8c2
https://github.com/llvm/llvm-project/commit/c7c6c0a45c1d840d05b414d73f7bab5136dcb8c2
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/X86/or-load.ll
Log Message:
-----------
[AggressiveInstCombine] Fix memory location for alias analysis (#169953)
When LOps.RootInsert comes after LI2, since we use LI2 as the new insert
point, we should make sure the memory region accessed by LOps isn't
modified. However, the original implementation passes the bit width
`LOps.LoadSize` as the number of bytes to be accessed, causing BasicAA
to return NoAlias:
https://github.com/llvm/llvm-project/blob/a941e150749650e6a75e948f10d46b0bedcc128b/llvm/lib/Analysis/BasicAliasAnalysis.cpp#L1658-L1667
With `-aa-trace`, we get:
```
End ptr getelementptr inbounds nuw (i8, ptr @g, i64 4) @ LocationSize::precise(1), %gep1 = getelementptr i8, ptr %p, i64 4 @ LocationSize::precise(32) = NoAlias
```
This patch uses `getTypeStoreSize` to compute the correct access size
for LOps. Instead of modifying the MemoryLocation for End (i.e.,
`LOps.RootInsert`), it also uses the computed base and AATag for
correctness.
Closes https://github.com/llvm/llvm-project/issues/169921.
Commit: 7b6bf8b060f74669d7027d33f488a35cfb448b29
https://github.com/llvm/llvm-project/commit/7b6bf8b060f74669d7027d33f488a35cfb448b29
Author: Arseniy Zaostrovnykh <necto.ne at gmail.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
Log Message:
-----------
[NFC][analyzer] const ptr param in AnalysisConsumer::getModeForDecl (#170145)
This is a tiny change that would make the function contract more clear
and our work downstream easier.
Commit: 10ceca8a9661fb700dc1288ba0cc21188663b2b9
https://github.com/llvm/llvm-project/commit/10ceca8a9661fb700dc1288ba0cc21188663b2b9
Author: Aaron <aaron at tinyblob.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M lldb/tools/lldb-dap/Handler/CompileUnitsRequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
Log Message:
-----------
[lldb-dap] Fix segfault in JSONUtils.cpp when GetUUIDString() returns nullptr (#169844)
When creating a stack frame in JSONUtils.cpp CreateStackFrame() the code
constructs a std::string from module.GetUUIDString(), which can return
nullptr in some cases (as documented in the implementation of
SBModule::GetUUIDString()). This causes a segmentation fault when passed
to the std::string constructor.
This fix adds a null check before constructing the UUID string, falling
back to an empty string if nullptr is returned. The existing empty check
ensures the moduleId field is omitted from the JSON when no UUID exists.
rdar://163811812
---------
Co-authored-by: Ebuka Ezike <yerimyah1 at gmail.com>
Commit: 73889c35713ecc659935445ef066fa74ae62f3fa
https://github.com/llvm/llvm-project/commit/73889c35713ecc659935445ef066fa74ae62f3fa
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
A llvm/test/tools/llvm-exegesis/X86/snippet-generator-seed.test
M llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
Log Message:
-----------
[llvm-exegesis] Add CLI Option to set Fixed RNG seed
The primary motivation for this is to set a fixed RNG seed for flaky
tests. This also has the bonus of adding debug logging for what seed
gets used which can make it much easier to reproduce issues that only
happen occasionally and are seed-dependent.
Reviewers: sjoerdmeijer, davemgreen, mshockwave
Reviewed By: davemgreen
Pull Request: https://github.com/llvm/llvm-project/pull/170013
Commit: 37858b087a00e4cd7dd6e9983d4f45b015e9e3a1
https://github.com/llvm/llvm-project/commit/37858b087a00e4cd7dd6e9983d4f45b015e9e3a1
Author: Yu Hao <yuhaoyu at google.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M clang/docs/LibASTMatchersReference.html
M clang/docs/ReleaseNotes.rst
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/lib/ASTMatchers/ASTMatchersInternal.cpp
M clang/lib/ASTMatchers/Dynamic/Registry.cpp
M clang/unittests/ASTMatchers/ASTMatchersNodeTest.cpp
Log Message:
-----------
[clang][ASTMatchers] Add `arrayTypeLoc` ast matcher for ArrayTypeLoc (#168990)
There's `arrayType` matcher for matching `ArrayType`, but no matcher for
`ArrayTypeLoc`. This change complements it.
Note that there's already `hasElementTypeLoc` matcher, which was
declared together with the `hasElementType` matcher.
Commit: b76cada909cff3c63a454a97fd247388a3650b4c
https://github.com/llvm/llvm-project/commit/b76cada909cff3c63a454a97fd247388a3650b4c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-rcp.ll
M llvm/test/CodeGen/X86/combine-rsqrt.ll
Log Message:
-----------
[X86] combineConcatVectorOps - add handling to concat RCPPS/RSQRTPS intrinsics together (#170148)
Limited to 128->256 cases as we can't safely convert to the RCP14/RSQRT14 variants
Commit: 979a987d3ad51d421f091730a5a1cf9326b47bbc
https://github.com/llvm/llvm-project/commit/979a987d3ad51d421f091730a5a1cf9326b47bbc
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
A llvm/test/Transforms/WholeProgramDevirt/calls-to-devirt.ll
M llvm/test/Transforms/WholeProgramDevirt/import.ll
Log Message:
-----------
[WPD] Change Devirt Cutoff to use DebugCounter (#170009)
This removes the presence of global state from within the pass which is
blocking some efforts around test daemonization and is not good design
practice in general for LLVM. See
https://discourse.llvm.org/t/rfc-reducing-process-creation-overhead-in-llvm-regression-tests/88612/11
for more discussion.
This patch replaces the usage of global state with a DebugCounter, which
helps fix the global state problem and also increases the flexibility of
the option as now an explicit range can be passed.
Co-authored-by: Mingming Liu <mingmingl at google.com>
Commit: 46c34bec134be0cb606fba1affbc70920b4fc266
https://github.com/llvm/llvm-project/commit/46c34bec134be0cb606fba1affbc70920b4fc266
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M third-party/benchmark/bindings/python/build_defs.bzl
Log Message:
-----------
[benchmark][NFC] Update cc_binary load (#169710)
cc_binary now needs to be loaded from the rules_cc repo
I don't think this file is actually used, but updating it to be more
syntactically correct anyway.
Commit: 9f54c2a6743ed4770c2453bb3a8b4d7ee8e2b152
https://github.com/llvm/llvm-project/commit/9f54c2a6743ed4770c2453bb3a8b4d7ee8e2b152
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/test/CodeGen/X86/combine-fsqrt.ll
Log Message:
-----------
[X86] Add test coverage for the concatenation of vXf64 sqrt intrinsics (#170158)
Commit: 318d932ca028830625290227004180c6d9c776f9
https://github.com/llvm/llvm-project/commit/318d932ca028830625290227004180c6d9c776f9
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-fceil.ll
M llvm/test/CodeGen/X86/combine-fnearbyint.ll
M llvm/test/CodeGen/X86/combine-frint.ll
M llvm/test/CodeGen/X86/combine-froundeven.ll
M llvm/test/CodeGen/X86/combine-ftrunc.ll
M llvm/test/CodeGen/X86/combine-rndscale.ll
Log Message:
-----------
[X86] combineConcatVectorOps - add handling to concat fp rounding intrinsics together (#170160)
Commit: 9438b741d4491b400cb04b4ec47aae0936e2e954
https://github.com/llvm/llvm-project/commit/9438b741d4491b400cb04b4ec47aae0936e2e954
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M lldb/include/lldb/Utility/DataExtractor.h
M lldb/include/lldb/Utility/RangeMap.h
A lldb/include/lldb/Utility/VirtualDataExtractor.h
M lldb/source/Utility/CMakeLists.txt
A lldb/source/Utility/VirtualDataExtractor.cpp
M lldb/unittests/Utility/CMakeLists.txt
A lldb/unittests/Utility/VirtualDataExtractorTest.cpp
Log Message:
-----------
[lldb] Add VirtualDataExtractor for virtual address translation (#168802)
Introduce VirtualDataExtractor, a DataExtractor subclass that enables
reading data at virtual addresses by translating them to physical buffer
offsets using a lookup table. The lookup table maps virtual address
ranges to physical offsets and enforces boundaries to prevent reads from
crossing entry limits.
The new class inherits from DataExtractor, overriding GetData and
PeekData to provide transparent virtual address translation for most of
the DataExtractor methods. The exception are the unchecked methods, that
bypass those methods and are overloaded as well.
Commit: bb06f909433dc053166c0f02d4f5164b83b5b39f
https://github.com/llvm/llvm-project/commit/bb06f909433dc053166c0f02d4f5164b83b5b39f
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Utility/BUILD.gn
Log Message:
-----------
[gn build] Port 9438b741d449
Commit: f3cce97ba79ee507adfe4069ba907dcc842def31
https://github.com/llvm/llvm-project/commit/f3cce97ba79ee507adfe4069ba907dcc842def31
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M flang/include/flang/Parser/openmp-utils.h
Log Message:
-----------
[flang][OpenMP] Remove directive-specific code from GetOmpDirectiveNa… (#170157)
…me, NFC
It is unnecessary, existing overloads handle these cases already.
Commit: fddf7b0510e5df7a08c512a177ea9c1ec4307718
https://github.com/llvm/llvm-project/commit/fddf7b0510e5df7a08c512a177ea9c1ec4307718
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
A mlir/test/Target/LLVMIR/nvvm/mbar_arr_drop_expect_tx.mlir
A mlir/test/Target/LLVMIR/nvvm/mbar_arr_expect_tx.mlir
M mlir/test/Target/LLVMIR/nvvm/mbar_invalid.mlir
Log Message:
-----------
[MLIR][NVVM] Update mbarrier.arrive.expect_tx Op (#169922)
This patch updates the mbarrier.arrive.expect_tx Op.
It also adds an Op for its arrive_drop version.
* No change in the existing inline-asm lowering.
This functionality continues to work as is.
* An optional return value is added for shared_cta space.
* The scope and semantics are added as attributes.
* Inline-PTX lowering is available when `predicate` is provided.
Otherwise, the Op lowers to intrinsics.
* lit tests are added to verify the lowering to intrinsics.
* Specific negative tests are added to check the invalid cases for
inline-ptx lowering.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 40aa91f12a498b42be4eabbdacfb4c5e25a77be1
https://github.com/llvm/llvm-project/commit/40aa91f12a498b42be4eabbdacfb4c5e25a77be1
Author: anoopkg6 <anoop.kumar6 at ibm.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Linux.cpp
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/tysan/tysan_platform.h
Log Message:
-----------
[TySan] TySan support for SystemZ - Re-submission of original pr#162396 (#169850)
This is a re-submission of original reverted patch [(#162396)
](https://github.com/llvm/llvm-project/pull/162396url)for adding TySan
support for systemzZ along with build failure patch
[#169746](https://github.com/llvm/llvm-project/pull/169746).
See conversations in #169746.
Co-authored-by: anoopkg6 <anoopkg6 at github.com>
Commit: 5c2601563789a232a9d0575c95edacdc2c25a97d
https://github.com/llvm/llvm-project/commit/5c2601563789a232a9d0575c95edacdc2c25a97d
Author: David Green <david.green at arm.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/lrint-conv-fp16-win.ll
M llvm/test/CodeGen/AArch64/lrint-conv-win.ll
M llvm/test/CodeGen/AArch64/lround-conv-fp16-win.ll
M llvm/test/CodeGen/AArch64/lround-conv-win.ll
Log Message:
-----------
[AArch64][GlobalISel] Add GISel coverage for i32 lround and lrint. NFC
Commit: 65666b2586383c34a4cdc3f324836192258dddc3
https://github.com/llvm/llvm-project/commit/65666b2586383c34a4cdc3f324836192258dddc3
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
R mlir/test/Target/SPIRV/consecutive-selection.spv
A mlir/test/Target/SPIRV/consecutive-selection.spvasm
R mlir/test/Target/SPIRV/selection.spv
A mlir/test/Target/SPIRV/selection.spvasm
M mlir/test/lit.cfg.py
Log Message:
-----------
[mlir][spirv] Rename `*.spv` tests to `*.spvasm`. (#170161)
This patch renames two of the SPIR-V tests to `*.spvasm` since both
files are assembly files, rather than SPIR-V binaries. The `lit.cfg.py`
is adjusted and we no longer need to run `*.spv` tests since none are
present.
Commit: a15a6c870b9cf34340c3332b586beff6bdf15424
https://github.com/llvm/llvm-project/commit/a15a6c870b9cf34340c3332b586beff6bdf15424
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoSFB.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/test/Analysis/CostModel/RISCV/cmp-select.ll
M llvm/test/CodeGen/RISCV/cmov-branch-opt.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/min-max.ll
M llvm/test/CodeGen/RISCV/select-bare.ll
M llvm/test/CodeGen/RISCV/select-cc.ll
M llvm/test/CodeGen/RISCV/select-cond.ll
M llvm/test/CodeGen/RISCV/select-const.ll
M llvm/test/CodeGen/RISCV/select.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-load-imm.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-min-max.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-mul.ll
M llvm/test/CodeGen/RISCV/xqcicli.ll
M llvm/test/CodeGen/RISCV/xqcicm.ll
M llvm/test/CodeGen/RISCV/xqcics.ll
Log Message:
-----------
[RISCV] Rename SFB Base Feature (#169607)
New SFB subsets are being added with the scheduler class name as a
suffix, so now is the time to go back to the base extension and add IALU
to its name.
This also:
- Drops a hyphen from the other SFB features for mul and minmax, to more
closely match their scheduling classes.
- Updates the predicates on specific SFB pseudos so we get verifier
errors if we introduce the pseudos when we don't have the right
subtarget feature.
- Updates the SFB Documentation comment to make it no longer
SiFive-specific.
Commit: 8ccdb3540b6d9085bf2112aa7cbed4a292837c01
https://github.com/llvm/llvm-project/commit/8ccdb3540b6d9085bf2112aa7cbed4a292837c01
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
A llvm/test/CodeGen/X86/combine-ffloor.ll
Log Message:
-----------
[X86] Add test coverage for the concatenation of ISD::FFLOOR intrinsics (#170168)
These were missed in #170160
Commit: 4e316d7e81a3e481dc55804a662e6204ec6a62a6
https://github.com/llvm/llvm-project/commit/4e316d7e81a3e481dc55804a662e6204ec6a62a6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
A llvm/test/CodeGen/X86/combine-fround.ll
Log Message:
-----------
[X86] Add test coverage for the concatenation of ISD::FROUND intrinsics (#170166)
These were missed in #170160
Commit: dae9139d8fecf09d975f59b012646bc04f694c35
https://github.com/llvm/llvm-project/commit/dae9139d8fecf09d975f59b012646bc04f694c35
Author: Muhammad Abdul <alilo.ghazali at gmail.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Headers/avx512bwintrin.h
M clang/lib/Headers/avx512dqintrin.h
M clang/lib/Headers/avx512fintrin.h
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512dq-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
Log Message:
-----------
[X86][Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - allow AVX512 kmov intrinsics to be used in constexp (#169895)
Resolves #166975
Commit: 8a3891ceadad3a156b8fbcdccd82f0aa7dece982
https://github.com/llvm/llvm-project/commit/8a3891ceadad3a156b8fbcdccd82f0aa7dece982
Author: Prasoon Mishra <Prasoon.Mishra at amd.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
Log Message:
-----------
[AMDGPU][NPM] Preserve analyses in AMDGPURewriteAGPRCopyMFMA for NPM (#170130)
The pass preserved LiveStacksAnalysis but failed to preserve
LiveIntervalsAnalysis, LiveRegMatrixAnalysis, VirtRegMapAnalysis, and
SlotIndexesAnalysis under NPM. This caused these analyses to be
invalidated and recomputed, leading to incorrect behavior in subsequent
passes like VirtRegRewriter.
Fix by explicitly preserving all required analyses in the NPM version,
matching the legacy pass manager behavior.
---------
Co-authored-by: vikhegde <vikram.hegde at amd.com>
Commit: 3d862cfcea9bba5fe04d22beaa6c46f850a76a73
https://github.com/llvm/llvm-project/commit/3d862cfcea9bba5fe04d22beaa6c46f850a76a73
Author: Steven Perron <stevenperron at google.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
M llvm/lib/CodeGen/GlobalISel/LegalityPredicates.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.h
A llvm/test/CodeGen/SPIRV/legalization/vector-legalization-kernel.ll
A llvm/test/CodeGen/SPIRV/legalization/vector-legalization-shader.ll
Log Message:
-----------
[SPIRV] Add legalization for long vectors (#169665)
This patch introduces the necessary infrastructure to legalize vector
operations on vectors that are longer than what the SPIR-V target
supports. For instance, shaders only support vectors up to 4 elements.
The legalization is done by splitting the long vectors into smaller
vectors of a legal size.
Specifically, this patch does the following:
- Introduces `vectorElementCountIsGreaterThan` and
`vectorElementCountIsLessThanOrEqualTo` legality predicates.
- Adds legalization rules for `G_SHUFFLE_VECTOR`,
`G_EXTRACT_VECTOR_ELT`,
`G_BUILD_VECTOR`, `G_CONCAT_VECTORS`, `G_SPLAT_VECTOR`, and
`G_UNMERGE_VALUES`.
- Handles `G_BITCAST` of long vectors by converting them to
`@llvm.spv.bitcast` intrinsics which are then legalized.
- Updates `selectUnmergeValues` to handle extraction of both scalars
and vectors from a larger vector, using `OpCompositeExtract` and
`OpVectorShuffle` respectively.
Fixes https://github.com/llvm/llvm-project/pull/165444
Commit: 25ab47bd407d6d92e587e2d545081ab25c909d86
https://github.com/llvm/llvm-project/commit/25ab47bd407d6d92e587e2d545081ab25c909d86
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
Log Message:
-----------
[VPlan] Use wide IV if scalar lanes > 0 are used with scalable vectors. (#169796)
For scalable vectors, VPScsalarIVStepsRecipe cannot create all scalar
step values. At the moment, it creates a vector, in addition to to the
first lane. The only supported case for this is when only the last lane
is used. A recipe should not set both scalar and vector values.
Instead, we can simply use a vector induction. It would also be possible
to preserve the current vector code-gen, by creating VPInstructions
based on the first lane of VPScalarIVStepsRecipe, but using a vector
induction seems simpler.
PR: https://github.com/llvm/llvm-project/pull/169796
Commit: a7c1f467339abd1942c89f2ef8b79083e89e7dad
https://github.com/llvm/llvm-project/commit/a7c1f467339abd1942c89f2ef8b79083e89e7dad
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.h
A mlir/test/Target/SPIRV/selection_switch.spvasm
Log Message:
-----------
[mlir][spirv] Enable block splitting for `spirv.Switch` (#170147)
This is not strictly necessary as now selection regions can yield
values, however splitting the block simplifies the code as it avoids
unnecessary values being sunk just to be later yielded.
Commit: 61881c307c059a43ec04b2f9a9923c57d9a38f23
https://github.com/llvm/llvm-project/commit/61881c307c059a43ec04b2f9a9923c57d9a38f23
Author: darkbuck <michael.hliao at gmail.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/SemaCUDA.h
M clang/include/clang/Serialization/ASTReader.h
M clang/lib/CodeGen/CGCUDARuntime.cpp
M clang/lib/CodeGen/CGCUDARuntime.h
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/CodeGenCUDA/Inputs/cuda.h
A clang/test/CodeGenCUDA/device-kernel-call.cu
M clang/test/Driver/nvlink-wrapper.c
M clang/test/SemaCUDA/Inputs/cuda.h
M clang/test/SemaCUDA/call-kernel-from-kernel.cu
A clang/test/SemaCUDA/device-kernel-call.cu
M clang/test/SemaCUDA/function-overload.cu
M clang/test/SemaCUDA/function-target.cu
M clang/test/SemaCUDA/reference-to-kernel-fn.cu
M clang/tools/clang-nvlink-wrapper/ClangNVLinkWrapper.cpp
M clang/tools/clang-nvlink-wrapper/NVLinkOpts.td
Log Message:
-----------
[CUDA] Add device-side kernel launch support (#165519)
- CUDA's dynamic parallelism extension allows device-side kernel
launches, which share the identical syntax to host-side launches, e.g.,
kernel<<<Dg, Db, Ns, S>>>(arguments);
but differ from the code generation. That device-side kernel launches is
eventually translated into the following sequence
config = cudaGetParameterBuffer(alignment, size);
// setup arguments by copying them into `config`.
cudaLaunchDevice(func, config, Dg, Db, Ns, S);
- To support the device-side kernel launch, 'CUDAKernelCallExpr' is
reused but its config expr is set to a call to 'cudaLaunchDevice'.
During the code generation, 'CUDAKernelCallExpr' is expanded into the
sequence aforementioned.
- As the device-side kernel launch requires the source to be compiled as
relocatable device code and linked with '-lcudadevrt'. Linkers are
changed to pass relevant link options to 'nvlink'.
Commit: dec77e4f878cd4a530aa0be6106859fc69726928
https://github.com/llvm/llvm-project/commit/dec77e4f878cd4a530aa0be6106859fc69726928
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Improve code in VPInstruction::generate (NFC) (#169470)
Make miscellaneous improvements including inlining some expressions and
re-using the existing State.Builder reference.
Commit: d1899acd08d3eb876de0e5394f6c3a2441e04756
https://github.com/llvm/llvm-project/commit/d1899acd08d3eb876de0e5394f6c3a2441e04756
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-ffloor.ll
M llvm/test/CodeGen/X86/combine-fround.ll
Log Message:
-----------
[X86] combineConcatVectorOps - add handling to concat ISD::FROUND/FFLOOR intrinsics together (#170176)
These were missed in #170160
Commit: 21e64d1f5a3dbf539eaf9c7ac160469e60222ba2
https://github.com/llvm/llvm-project/commit/21e64d1f5a3dbf539eaf9c7ac160469e60222ba2
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
A flang/include/flang/Optimizer/Transforms/CUDA/CUFAllocationConversion.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/CUDA/CUFAllocationConversion.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
Log Message:
-----------
[flang][cuda][NFC] Split allocation related operation conversion from other cuf operations (#169740)
Split AllocOp, FreeOp, AllocateOp and DeallocateOp from other
conversion. Patterns are currently added to the base CUFOpConversion
when the option is enabled.
This split is a pre-requisite to be more flexible where we do the
allocation related operations conversion in the pipeline.
Commit: c9d9dddc1c5e9f203f5db890f383b956c5b2d295
https://github.com/llvm/llvm-project/commit/c9d9dddc1c5e9f203f5db890f383b956c5b2d295
Author: nerix <nerixdev at outlook.de>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
A lldb/test/Shell/SymbolFile/NativePDB/find-pdb-next-to-exe.test
Log Message:
-----------
[LLDB][NativePDB] Look for PDBs in `target.debug-file-search-paths` (#169719)
Similar to DWARF's DWO, we should look for PDBs in
`target.debug-file-search-paths` if the PDB isn't at the original
location or next to the executable.
With this PR, the search order is as follows:
1. PDB path specified in the PE/COFF file
2. Next to the executable
3. In `target.debug-file-search-paths`
This roughly matches [the order Visual Studio
uses](https://learn.microsoft.com/en-us/visualstudio/debugger/specify-symbol-dot-pdb-and-source-files-in-the-visual-studio-debugger?view=vs-2022#where-the-debugger-looks-for-symbols),
except that we don't have a project folder and don't support symbol
servers.
Closes #125355 (though I think this is already fixed in the native
plugin).
Commit: c103d61758e61a9fe4c1963b29d602ffe2c22427
https://github.com/llvm/llvm-project/commit/c103d61758e61a9fe4c1963b29d602ffe2c22427
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M lldb/source/Core/Statusline.cpp
M lldb/test/API/functionalities/statusline/TestStatusline.py
Log Message:
-----------
[lldb] Fix a bug when disabling the statusline. (#169127)
Currently, disabling the statusline with `settings set show-statusline
false` leaves LLDB in a broken state. The same is true when trying to
toggle the setting again.
The issue was that setting the scroll window to 0 is apparently not
identical to setting it to the correct number of rows, even though some
documentation online incorrectly claims so.
Fixes #166608
Commit: 56d061ccc5afb07e8d9a4d2c501bbcb56031ccc9
https://github.com/llvm/llvm-project/commit/56d061ccc5afb07e8d9a4d2c501bbcb56031ccc9
Author: William Tran-Viet <wtranviet at proton.me>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M libcxx/include/optional
Log Message:
-----------
[libc++][NFC] Add optional<T&> synopsis (#170043)
Commit: 4a48740831d0f0779780e0bea64ec4a16d9f6d97
https://github.com/llvm/llvm-project/commit/4a48740831d0f0779780e0bea64ec4a16d9f6d97
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/test/CodeGenHLSL/BoolVector.hlsl
A clang/test/CodeGenHLSL/builtins/VectorElementStore.hlsl
M clang/test/CodeGenHLSL/builtins/lit.hlsl
Log Message:
-----------
[HLSL] Update indexed vector elements individually (#169144)
When an individual element of a vector is updated via indexing into the vector, it needs to be handled as a store operation on that one vector element.
Clang treats vectors as one unit, so a vector element needs to be updated, the whole vector is loaded, the element is modified, and then the whole vector is stored. In HLSL vector elements are handled individually. We need to avoid this load/modify/store sequence to prevent overwriting other vector elements that might be getting updated in parallel.
Fixes #167729
Contributes to #160208.
Commit: f65c19982d2af7f791115e0b51c095a52ad5da4a
https://github.com/llvm/llvm-project/commit/f65c19982d2af7f791115e0b51c095a52ad5da4a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M clang-tools-extra/clangd/test/CMakeLists.txt
M clang-tools-extra/clangd/test/include-cleaner-batch-fix.test
M clang-tools-extra/clangd/test/index-tools.test
M clang-tools-extra/clangd/test/lit.cfg.py
M clang-tools-extra/clangd/test/lit.site.cfg.py.in
M clang-tools-extra/clangd/test/system-include-extractor.test
Log Message:
-----------
Reapply "[clangd] Make lit tests work with the internal shell" (#169972)
This reverts commit bd04ef6df50e8e6e5212762fc798ea9fbdcfc897.
This reapply fixes the broken case where we would fail at CMake
configuration time if LLVM_INCLUDE_BENCHMARKS was explicitly turned off.
Commit: b73385dda5caa21570ddc6d7277c22aca8f2de1e
https://github.com/llvm/llvm-project/commit/b73385dda5caa21570ddc6d7277c22aca8f2de1e
Author: Nico Weber <thakis at chromium.org>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M compiler-rt/cmake/config-ix.cmake
Log Message:
-----------
[TySan] Attempt to unbreak build after #169036
If tysan was not in COMPILER_RT_SANITIZERS_TO_BUILD, we used to
get an error after #169036, see comments there for details.
Commit: 9edbf83667821e3154446d5e2429e41bf261e26f
https://github.com/llvm/llvm-project/commit/9edbf83667821e3154446d5e2429e41bf261e26f
Author: Charles Zablit <c_zablit at apple.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M lldb/source/Host/windows/ProcessLauncherWindows.cpp
Log Message:
-----------
[lldb][windows] fix environment handling in CreateProcessW setup (#168733)
This patch refactors and documents the setup of the `CreateProcessW`
invocation in `ProcessLauncherWindows`. It's a dependency of
https://github.com/llvm/llvm-project/pull/168729.
`CreateEnvironmentBufferW` now sorts the environment variable keys
before concatenating them into a string. From [the `CreateProcess`
documentation](https://learn.microsoft.com/en-us/windows/win32/api/processthreadsapi/nf-processthreadsapi-createprocessw):
> An application must manually pass the current directory information to
the new process. To do so, the application must explicitly create these
environment variable strings, sort them alphabetically (because the
system uses a sorted environment), and put them into the environment
block. Typically, they will go at the front of the environment block,
due to the environment block sort order.
`GetFlattenedWindowsCommandStringW` now returns an error which will be
surfaced, instead of failing silently.
Types were converted to their wide equivalent (i.e appending `W` to
them, see `STARTUPINFOEX`) since we are calling the `W` variant of
`CreateProcess`.
Commit: 0ff0f52460531c0bfa213d0dcfa0cfb4ba61e934
https://github.com/llvm/llvm-project/commit/0ff0f52460531c0bfa213d0dcfa0cfb4ba61e934
Author: Greg Clayton <gclayton at fb.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/DWARF/DWARFAcceleratorTable.h
M llvm/lib/DebugInfo/DWARF/DWARFAcceleratorTable.cpp
Log Message:
-----------
Fix __apple_XXX iterator that iterates over all entries. (#157538)
The previous iterator for __apple_XXX sections was assuming that all
entries in the table would be contiguous and it wasn't using the offsets
table to access each chain of entries for a given name. This patch fixes
it so the iterator does the right thing.
This issue became apparent after a modification to strip template names
from DW_AT_name entries to allow adding both the template class base
name as an entry and also include the name with template names. The
commit hash is 2e7ee4dc21430b0fe4c9ee306dc1d8c7986a6646. The problem is
if the name starts with a "<" it will try and split the name. So if the
name is `"<get-size>"` it will return an empty string as the function
name, and this empty string gets added to the __apple_names table and
causes large delays when using the iterators.
Commit: e6ae2462bd6dcf583ccd13c6627fe3ffe8a17f2c
https://github.com/llvm/llvm-project/commit/e6ae2462bd6dcf583ccd13c6627fe3ffe8a17f2c
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
Log Message:
-----------
[AMDGPU] Refactor hazard recognizer for VALU-pipeline hazards. NFCI. (#168801)
This is in preparation of handling these in scheduler. I do not expect
any changes to the produced code here, it is just an infrastructure.
Our current problem with the VALU pipeline hazards is that we only
insert V_NOP instructions in the hazard recognizer mode, but ignore
it during scheduling. This patch is meant to create a mechanism to
actually account for that during scheduling.
Commit: 6397e2f59ee06814693016bea181fce9480622d2
https://github.com/llvm/llvm-project/commit/6397e2f59ee06814693016bea181fce9480622d2
Author: Lucas Ste <38472950+LucasSte at users.noreply.github.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Target/BPF/BPF.td
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelLowering.h
M llvm/lib/Target/BPF/BPFSubtarget.cpp
M llvm/lib/Target/BPF/BPFSubtarget.h
M llvm/test/CodeGen/BPF/atomic-oversize.ll
R llvm/test/CodeGen/BPF/builtin_calls.ll
M llvm/test/CodeGen/BPF/struct_ret1.ll
M llvm/test/CodeGen/BPF/struct_ret2.ll
Log Message:
-----------
Revert "[BPF] Allow libcalls behind a feature gate (#168442)" (#169733)
**Problem**
As mentioned in
https://github.com/llvm/llvm-project/pull/168442#pullrequestreview-3501502448
#168442, is not the right solution for the problem.
I'll follow @arsenm suggestions starting with
https://github.com/llvm/llvm-project/pull/169537 to properly allow safe
math operations and i128 support in BPF.
**Solution**
Revert #168442.
Commit: fd8bf3c69a10cfe60f89799710c60c4f5dd4e22d
https://github.com/llvm/llvm-project/commit/fd8bf3c69a10cfe60f89799710c60c4f5dd4e22d
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
Log Message:
-----------
[lldb/ScriptInterpreter] Fix typo in AbstractMethodCheckerPayload (NFC) (#170187)
This fixes a typo in ScriptedPythonInterface and changes
`AbstrackMethodCheckerPayload` to `AbstractMethodCheckerPayload`.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 281f4ea58e4684e0817e15a7284c42fb29e37704
https://github.com/llvm/llvm-project/commit/281f4ea58e4684e0817e15a7284c42fb29e37704
Author: Nico Weber <thakis at chromium.org>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clangd/test/BUILD.gn
Log Message:
-----------
[gn] port f65c19982d2a
Commit: 00276b67d36a665119a6a7b39dbba69f45c44e58
https://github.com/llvm/llvm-project/commit/00276b67d36a665119a6a7b39dbba69f45c44e58
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/test/Transforms/WholeProgramDevirt/calls-to-devirt.ll
M llvm/test/Transforms/WholeProgramDevirt/import-indir.ll
M llvm/test/Transforms/WholeProgramDevirt/import.ll
M llvm/test/Transforms/WholeProgramDevirt/uniform-retval-invoke.ll
Log Message:
-----------
[WPD] Remove undef from tests (#170179)
Commit: fffe9bcbc7d5d93872ad00a7f212483d749ae71d
https://github.com/llvm/llvm-project/commit/fffe9bcbc7d5d93872ad00a7f212483d749ae71d
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
A llvm/test/CodeGen/AMDGPU/misched-into-wmma-hazard-shadow.mir
Log Message:
-----------
[AMDGPU] Allow hazard checks for WMMA co-exec (#168805)
Now we are just inserting V_NOP instrtuctions, try to schedule
something into the shadow.
It is still somewhat imprecise, for example AdvanceCycle() will
use TII.getNumWaitStates() anyway, but in a scheduling mode
we are not required to be precise. We must be finally precise
in the hazard recognizer mode. Then EmittedInstrs buffer is also
limited to MaxLookAhead even though VALU only hazards may actually
never expire and require an endless buffer. But that's OK, we can
at least mitigate what the buffer can hold. The buffer is also
currently much bigger than any of VALU hazards may need.
That said the rest of the 'fix*' functions here can be changed
the same way, these which are using V_NOPs. This one is just the
worst because it may require up to 9 nops.
Commit: 28ac6b36c14376f5a80b974d6b1c49a89201b594
https://github.com/llvm/llvm-project/commit/28ac6b36c14376f5a80b974d6b1c49a89201b594
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
Log Message:
-----------
[flang][cuda] Use the option to populate conversion patterns (#170190)
#169740 split the conversion patterns but the option was not use when
populating them.
Commit: df3e1b59d85b153a369d344f9ef335f5315d84a5
https://github.com/llvm/llvm-project/commit/df3e1b59d85b153a369d344f9ef335f5315d84a5
Author: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[mlir][amdgpu] Add amdgpu.make_dma_descriptor (#169407)
Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>
Commit: 33bcde0678707ffffb7f01188d530da05bed47b8
https://github.com/llvm/llvm-project/commit/33bcde0678707ffffb7f01188d530da05bed47b8
Author: Gleb Popov <6yearold at gmail.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M libunwind/test/aarch64_vg_unwind.pass.cpp
M libunwind/test/aarch64_za_unwind.pass.cpp
M libunwind/test/bad_unwind_info.pass.cpp
M libunwind/test/eh_frame_fde_pc_range.pass.cpp
M libunwind/test/floatregister.pass.cpp
M libunwind/test/forceunwind.pass.cpp
M libunwind/test/remember_state_leak.pass.sh.s
M libunwind/test/signal_unwind.pass.cpp
M libunwind/test/unwind_leaffunction.pass.cpp
M libunwind/test/unwind_scalable_vectors.pass.cpp
Log Message:
-----------
libunwind: Remove OS requirements from tests to make them run on more OSes (#167642)
There might be a cleaner way to enable these tests running on FreeBSD,
I'm open to suggestions.
Co-authored-by: Alexander Richardson <mail at alexrichardson.me>
Commit: c8031c3dd7434635dd64ad8a4abe9a96f86a384b
https://github.com/llvm/llvm-project/commit/c8031c3dd7434635dd64ad8a4abe9a96f86a384b
Author: Tomohiro Kashiwada <kikairoya at gmail.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M libcxx/test/selftest/dsl/lit.local.cfg
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/builtin_commands/diff.py
M llvm/utils/lit/lit/formats/googletest.py
M llvm/utils/lit/lit/llvm/config.py
M llvm/utils/lit/lit/reports.py
M llvm/utils/lit/lit/util.py
Log Message:
-----------
[LIT] remove `to_unicode`, `to_string`, and `to_bytes` helpers (#165950)
These helpers, which handle the difference between Python 2.x and Python
3.x, are no longer required.
Co-authored-by: Alexander Richardson <mail at alexrichardson.me>
Commit: 860146c4b6856e5c2a57218fd9e70f131280b00f
https://github.com/llvm/llvm-project/commit/860146c4b6856e5c2a57218fd9e70f131280b00f
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M libcxx/src/include/from_chars_floating_point.h
Log Message:
-----------
[libc++] Make sure the LLVM libc shared utilities use libc++'s assertion mechanism (#170149)
Otherwise, they would use their own mechanism based on C assert. It's
better to use the same assertion mechanism consistently everywhere since
this code is considered an implementation detail of libc++.
Commit: 1d3384e5d4c6bd1b297110b2de8a79d8a4b274e2
https://github.com/llvm/llvm-project/commit/1d3384e5d4c6bd1b297110b2de8a79d8a4b274e2
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M libcxx/docs/Contributing.rst
M libcxx/utils/ci/run-buildbot-container
Log Message:
-----------
[libc++] Update the Docker image hash in run-buildbot-container (#170165)
The current Docker image used by our CI is d6b22a347f813cf4a983, but we
forgot to synchronize the value in run-buildbot-container.
Commit: b9b9a239df4785b42b050b128eff18694871bc14
https://github.com/llvm/llvm-project/commit/b9b9a239df4785b42b050b128eff18694871bc14
Author: Max <628527+mxms0 at users.noreply.github.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/lib/ProfileData/SampleProf.cpp
Log Message:
-----------
[ProfData] Improve efficiency of reader (#169730)
Pre-reserve space in the map before inserting. In release builds, 9.4%
of all CPU time is spent in llvm::sampleprof::ProfileSymbolList::add. Of
that 9.4%, roughly half is in llvm::DenseMapBase::grow.
---------
Co-authored-by: mxms <mxms at google.com>
Co-authored-by: Vitaly Buka <vitalybuka at gmail.com>
Commit: da76a48943f090bc6d5aa8b462d07d361f401d37
https://github.com/llvm/llvm-project/commit/da76a48943f090bc6d5aa8b462d07d361f401d37
Author: Yu Hao <yuhaoyu at google.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M clang/include/clang/Tooling/Transformer/RangeSelector.h
M clang/lib/Tooling/Transformer/Parsing.cpp
M clang/lib/Tooling/Transformer/RangeSelector.cpp
M clang/unittests/Tooling/RangeSelectorTest.cpp
Log Message:
-----------
[clang][transformer] Add `merge` range-selector for selecting the merge of two ranges. (#169560)
This new range-selector `merge` takes in two ranges and selects from
min(begin locs of input ranges) to max(end locs of input ranges). This
is useful for when the user needs to select a range that is a merge of
two arbitrary ranges (potentially overlapped and out of order).
The existing `enclose` range-selector does something similar but it
requires the first range's begin loc appears before the second range's
end loc. The `merge` range-selector complements `enclose`.
---------
Co-authored-by: Yitzhak Mandelbaum <ymand at users.noreply.github.com>
Commit: a68cea56a0791d84908f5e486e607e147e3a55a9
https://github.com/llvm/llvm-project/commit/a68cea56a0791d84908f5e486e607e147e3a55a9
Author: Marco Elver <elver at google.com>
Date: 2025-12-01 (Mon, 01 Dec 2025)
Changed paths:
M .github/workflows/check-ci.yml
M .github/workflows/ci-post-commit-analyzer.yml
M .github/workflows/docs.yml
M .github/workflows/gha-codeql.yml
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
M .github/workflows/libclang-python-tests.yml
M .github/workflows/libcxx-run-benchmarks.yml
M .github/workflows/mlir-spirv-tests.yml
M .github/workflows/premerge.yaml
M .github/workflows/release-binaries.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-doxygen.yml
M .github/workflows/scorecard.yml
M .github/workflows/spirv-tests.yml
M bolt/docs/CommandLineArgumentReference.md
M bolt/docs/PacRetDesign.md
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/include/bolt/Passes/InsertNegateRAStatePass.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Passes/Inliner.cpp
M bolt/lib/Passes/InsertNegateRAStatePass.cpp
M bolt/lib/Passes/Instrumentation.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/runtime/instr.cpp
M bolt/runtime/sys_aarch64.h
M bolt/test/AArch64/hook-fini.s
A bolt/test/AArch64/hook-init.s
A bolt/test/AArch64/inline-bti-dbg.s
A bolt/test/AArch64/inline-bti.s
A bolt/test/X86/hook-init.s
M bolt/test/X86/internal-call-instrument-so.s
M bolt/test/runtime/AArch64/instrumentation-ind-call.c
M bolt/test/runtime/X86/instrument-wrong-target.s
M bolt/unittests/CMakeLists.txt
M bolt/unittests/Core/MCPlusBuilder.cpp
A bolt/unittests/Passes/CMakeLists.txt
A bolt/unittests/Passes/InsertNegateRAState.cpp
M clang-tools-extra/clang-tidy/utils/FormatStringConverter.cpp
M clang-tools-extra/clangd/test/CMakeLists.txt
M clang-tools-extra/clangd/test/include-cleaner-batch-fix.test
M clang-tools-extra/clangd/test/index-tools.test
M clang-tools-extra/clangd/test/lit.cfg.py
M clang-tools-extra/clangd/test/lit.site.cfg.py.in
M clang-tools-extra/clangd/test/system-include-extractor.test
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/signal-handler.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/switch-missing-default-case.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-capturing-lambda-coroutines.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-const-or-ref-data-members.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-do-while.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-non-const-global-variables.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/avoid-reference-coroutine-parameters.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/init-variables.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/interfaces-global-init.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/missing-std-forward.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/no-malloc.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/no-suspend-with-lock.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/owning-memory.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-bounds-array-to-pointer-decay.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-bounds-avoid-unchecked-container-access.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-bounds-constant-array-index.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-bounds-pointer-arithmetic.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-const-cast.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-cstyle-cast.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-member-init.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-reinterpret-cast.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-static-cast-downcast.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-union-access.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/pro-type-vararg.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/special-member-functions.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/use-default-member-init.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/use-enum-class.rst
M clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/virtual-class-destructor.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/use-internal-linkage.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/magic-numbers.rst
M clang-tools-extra/test/clang-tidy/check_clang_tidy.py
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-std-print.cpp
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/ClangStaticAnalyzer.rst
M clang/docs/HIPSupport.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/LibASTMatchersReference.html
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/user-docs.rst
M clang/docs/analyzer/user-docs/CommandLineUsage.rst
M clang/docs/analyzer/user-docs/Installation.rst
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/CXXInheritance.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/BuiltinTemplates.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/BuiltinsX86.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenMPKinds.def
M clang/include/clang/Basic/arm_mve.td
M clang/include/clang/Basic/arm_mve_defs.td
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/Format/Format.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaCUDA.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Tooling/Transformer/RangeSelector.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/CXXInheritance.cpp
M clang/lib/AST/ComparisonCategories.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/lib/ASTMatchers/ASTMatchersInternal.cpp
M clang/lib/ASTMatchers/Dynamic/Registry.cpp
M clang/lib/Basic/Targets/Sparc.cpp
M clang/lib/Basic/Targets/Sparc.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGCUDARuntime.cpp
M clang/lib/CodeGen/CGCUDARuntime.h
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGPointerAuth.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/SanitizerHandler.h
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
M clang/lib/CodeGen/Targets/Sparc.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/IntegerLiteralSeparatorFixer.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/UnwrappedLineParser.h
M clang/lib/Headers/avx10_2_512bf16intrin.h
M clang/lib/Headers/avx10_2bf16intrin.h
M clang/lib/Headers/avx2intrin.h
M clang/lib/Headers/avx512bf16intrin.h
M clang/lib/Headers/avx512bwintrin.h
M clang/lib/Headers/avx512dqintrin.h
M clang/lib/Headers/avx512fintrin.h
M clang/lib/Headers/avx512vbmiintrin.h
M clang/lib/Headers/avx512vbmivlintrin.h
M clang/lib/Headers/avx512vlbf16intrin.h
M clang/lib/Headers/avx512vlfp16intrin.h
M clang/lib/Headers/avx512vlintrin.h
M clang/lib/Headers/avxintrin.h
M clang/lib/Headers/emmintrin.h
M clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
M clang/lib/Headers/mmintrin.h
M clang/lib/Headers/xmmintrin.h
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/CodeCompleteConsumer.cpp
M clang/lib/Sema/SemaCUDA.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/SemaTypeTraits.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
M clang/lib/Tooling/Transformer/Parsing.cpp
M clang/lib/Tooling/Transformer/RangeSelector.cpp
M clang/lib/Tooling/Transformer/SourceCode.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/c.c
M clang/test/AST/ByteCode/invalid.cpp
R clang/test/CIR/CodeGen/X86/avx-builtins.c
R clang/test/CIR/CodeGen/X86/avx10_2_512bf16-builtins.c
R clang/test/CIR/CodeGen/X86/avx10_2bf16-builtins.c
R clang/test/CIR/CodeGen/X86/avx512bw-builtins.c
R clang/test/CIR/CodeGen/X86/avx512f-builtins.c
R clang/test/CIR/CodeGen/X86/avx512fp16-builtins.c
R clang/test/CIR/CodeGen/X86/bmi-builtins.c
R clang/test/CIR/CodeGen/X86/lzcnt-builtins.c
R clang/test/CIR/CodeGen/X86/sse-builtins.c
R clang/test/CIR/CodeGen/X86/sse2-builtins.c
R clang/test/CIR/CodeGen/builtin-fcmp-sse.c
R clang/test/CIR/CodeGen/builtin-isfpclass.c
R clang/test/CIR/CodeGen/builtin_bit.cpp
R clang/test/CIR/CodeGen/builtin_call.cpp
R clang/test/CIR/CodeGen/builtin_inline.c
R clang/test/CIR/CodeGen/builtin_new_delete.cpp
R clang/test/CIR/CodeGen/builtin_prefetch.c
R clang/test/CIR/CodeGen/builtin_printf.cpp
R clang/test/CIR/CodeGen/builtins-elementwise.c
R clang/test/CIR/CodeGen/builtins-floating-point.c
R clang/test/CIR/CodeGen/builtins-overflow.cpp
R clang/test/CIR/CodeGen/builtins.cpp
A clang/test/CIR/CodeGen/count-of.c
M clang/test/CIR/CodeGen/lambda.cpp
A clang/test/CIR/CodeGenBuiltins/X86/avx-builtins.c
A clang/test/CIR/CodeGenBuiltins/X86/avx10_2_512bf16-builtins.c
A clang/test/CIR/CodeGenBuiltins/X86/avx10_2bf16-builtins.c
A clang/test/CIR/CodeGenBuiltins/X86/avx512bw-builtins.c
A clang/test/CIR/CodeGenBuiltins/X86/avx512dq-builtins.c
A clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c
A clang/test/CIR/CodeGenBuiltins/X86/avx512fp16-builtins.c
A clang/test/CIR/CodeGenBuiltins/X86/bmi-builtins.c
A clang/test/CIR/CodeGenBuiltins/X86/lzcnt-builtins.c
A clang/test/CIR/CodeGenBuiltins/X86/sse-builtins.c
A clang/test/CIR/CodeGenBuiltins/X86/sse2-builtins.c
A clang/test/CIR/CodeGenBuiltins/builtin-fcmp-sse.c
A clang/test/CIR/CodeGenBuiltins/builtin-isfpclass.c
A clang/test/CIR/CodeGenBuiltins/builtin_bit.cpp
A clang/test/CIR/CodeGenBuiltins/builtin_call.cpp
A clang/test/CIR/CodeGenBuiltins/builtin_inline.c
A clang/test/CIR/CodeGenBuiltins/builtin_new_delete.cpp
A clang/test/CIR/CodeGenBuiltins/builtin_prefetch.c
A clang/test/CIR/CodeGenBuiltins/builtin_printf.cpp
A clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c
A clang/test/CIR/CodeGenBuiltins/builtins-floating-point.c
A clang/test/CIR/CodeGenBuiltins/builtins-overflow.cpp
A clang/test/CIR/CodeGenBuiltins/builtins.cpp
M clang/test/CIR/IR/func.cir
A clang/test/CIR/IR/invalid-func-attr.cir
A clang/test/CIR/IR/try-call.cir
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_rev.c
M clang/test/CodeGen/Sparc/sparcv8-abi.c
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512bf16-builtins.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512dq-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vbmi-builtins.c
M clang/test/CodeGen/X86/avx512vbmivl-builtin.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/avx512vlbf16-builtins.c
M clang/test/CodeGen/X86/avx512vlbw-builtins.c
M clang/test/CodeGen/X86/f16c-builtins.c
M clang/test/CodeGen/X86/mmx-builtins.c
M clang/test/CodeGen/X86/sse-builtins-constrained.c
M clang/test/CodeGen/X86/sse-builtins.c
M clang/test/CodeGen/X86/sse2-builtins-constrained.c
M clang/test/CodeGen/X86/sse2-builtins.c
M clang/test/CodeGen/arm-mve-intrinsics/ternary.c
M clang/test/CodeGen/builtins-x86.c
M clang/test/CodeGen/cfi-icall-trap-recover-runtime.c
M clang/test/CodeGenCUDA/Inputs/cuda.h
A clang/test/CodeGenCUDA/cuda_weak_alias.cu
A clang/test/CodeGenCUDA/device-kernel-call.cu
M clang/test/CodeGenCXX/cfi-vcall-trap-recover-runtime.cpp
A clang/test/CodeGenHIP/hip_weak_alias.cpp
M clang/test/CodeGenHLSL/BoolVector.hlsl
A clang/test/CodeGenHLSL/builtins/VectorElementStore.hlsl
M clang/test/CodeGenHLSL/builtins/faceforward.hlsl
M clang/test/CodeGenHLSL/builtins/lit.hlsl
M clang/test/DebugInfo/Generic/ubsan-trap-reason-type-mismatch.c
M clang/test/Driver/fsanitize.c
M clang/test/Driver/hip-spirv-backend-opt.c
M clang/test/Driver/nvlink-wrapper.c
M clang/test/Driver/riscv-features.c
A clang/test/OpenMP/amdgcn_weak_alias.c
A clang/test/OpenMP/amdgcn_weak_alias.cpp
M clang/test/OpenMP/cancel_codegen.cpp
M clang/test/OpenMP/critical_codegen.cpp
M clang/test/OpenMP/critical_codegen_attr.cpp
M clang/test/OpenMP/irbuilder_nested_parallel_for.c
M clang/test/OpenMP/masked_codegen.cpp
M clang/test/OpenMP/master_codegen.cpp
M clang/test/OpenMP/nested_loop_codegen.cpp
A clang/test/OpenMP/nvptx_weak_alias.c
M clang/test/OpenMP/ordered_codegen.cpp
M clang/test/OpenMP/parallel_codegen.cpp
M clang/test/OpenMP/target_update_codegen.cpp
A clang/test/OpenMP/target_update_iterator_ast_print.cpp
A clang/test/OpenMP/target_update_iterator_serialization.cpp
M clang/test/Preprocessor/init.c
M clang/test/Preprocessor/predefined-arch-macros.c
M clang/test/SemaCUDA/Inputs/cuda.h
M clang/test/SemaCUDA/call-kernel-from-kernel.cu
A clang/test/SemaCUDA/device-kernel-call.cu
M clang/test/SemaCUDA/function-overload.cu
M clang/test/SemaCUDA/function-target.cu
M clang/test/SemaCUDA/reference-to-kernel-fn.cu
M clang/test/SemaCXX/return.cpp
A clang/test/SemaCXX/type-trait-common-reference.cpp
M clang/test/SemaHIP/amdgpu-gfx950-load-to-lds.hip
M clang/test/SemaTemplate/attributes.cpp
M clang/tools/clang-nvlink-wrapper/ClangNVLinkWrapper.cpp
M clang/tools/clang-nvlink-wrapper/NVLinkOpts.td
M clang/unittests/ASTMatchers/ASTMatchersNodeTest.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/IntegerLiteralSeparatorTest.cpp
M clang/unittests/Tooling/RangeSelectorTest.cpp
M clang/unittests/Tooling/SourceCodeTest.cpp
M clang/utils/TableGen/MveEmitter.cpp
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/builtins/cpu_model/x86.c
M compiler-rt/lib/tysan/CMakeLists.txt
M compiler-rt/lib/tysan/tysan_platform.h
M compiler-rt/test/builtins/CMakeLists.txt
M compiler-rt/test/sanitizer_common/TestCases/printf-ldbl.c
M compiler-rt/test/sanitizer_common/TestCases/scanf-ldbl.c
M compiler-rt/test/ubsan/CMakeLists.txt
M compiler-rt/test/ubsan/TestCases/Float/cast-overflow.cpp
M compiler-rt/test/ubsan/TestCases/Misc/Posix/print_stack_trace.cpp
M compiler-rt/test/ubsan/TestCases/Misc/Posix/sigaction.cpp
M compiler-rt/test/ubsan/TestCases/Misc/coverage-levels.cpp
M compiler-rt/test/ubsan/TestCases/Misc/log-path_test.cpp
M compiler-rt/test/ubsan/lit.common.cfg.py
M compiler-rt/test/ubsan_minimal/TestCases/override-callback.c
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/DAP.py
M flang-rt/lib/cuda/allocator.cpp
M flang-rt/lib/runtime/extensions.cpp
M flang-rt/unittests/Runtime/CUDA/Allocatable.cpp
M flang/docs/Intrinsics.md
M flang/docs/OpenMPSupport.md
M flang/include/flang/Common/enum-set.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Intrinsics.h
A flang/include/flang/Optimizer/Transforms/CUDA/CUFAllocationConversion.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/openmp-utils.h
M flang/include/flang/Parser/parse-tree-visitor.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Runtime/CUDA/allocator.h
M flang/include/flang/Runtime/extensions.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/Runtime.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Intrinsics.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/CUDA/CUFAllocationConversion.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/FIRToSCF.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Integration/OpenMP/parallel-private-reduction-worstcase.f90
A flang/test/Lower/Intrinsics/flush.f90
A flang/test/Lower/OpenMP/omp-declare-reduction-combsub.f90
M flang/test/Lower/pause-statement.f90
M flang/test/Parser/OpenMP/allocate-align-tree.f90
M flang/test/Parser/OpenMP/allocate-tree-spec-part.f90
M flang/test/Parser/OpenMP/allocate-tree.f90
M flang/test/Parser/OpenMP/allocators-unparse.f90
M flang/test/Parser/OpenMP/assumption.f90
M flang/test/Parser/OpenMP/atomic-compare.f90
M flang/test/Parser/OpenMP/atomic-end.f90
M flang/test/Parser/OpenMP/atomic-label-do.f90
M flang/test/Parser/OpenMP/bind-clause.f90
M flang/test/Parser/OpenMP/construct-prefix-conflict.f90
M flang/test/Parser/OpenMP/cross-label-do.f90
M flang/test/Parser/OpenMP/declare-reduction-multi.f90
M flang/test/Parser/OpenMP/declare-reduction-operator.f90
M flang/test/Parser/OpenMP/declare-reduction-unparse.f90
M flang/test/Parser/OpenMP/declare-target-indirect-tree.f90
M flang/test/Parser/OpenMP/declare-target-to-clause.f90
M flang/test/Parser/OpenMP/declare-variant.f90
M flang/test/Parser/OpenMP/declare_target-device_type.f90
M flang/test/Parser/OpenMP/dispatch.f90
M flang/test/Parser/OpenMP/dyn-groupprivate-clause.f90
M flang/test/Parser/OpenMP/enter-automap-modifier.f90
M flang/test/Parser/OpenMP/fuse02.f90
M flang/test/Parser/OpenMP/groupprivate.f90
M flang/test/Parser/OpenMP/in-reduction-clause.f90
M flang/test/Parser/OpenMP/interop-construct.f90
M flang/test/Parser/OpenMP/linear-clause.f90
M flang/test/Parser/OpenMP/loop-transformation-construct01.f90
M flang/test/Parser/OpenMP/loop-transformation-construct02.f90
M flang/test/Parser/OpenMP/loop-transformation-construct03.f90
M flang/test/Parser/OpenMP/loop-transformation-construct04.f90
M flang/test/Parser/OpenMP/loop-transformation-construct05.f90
M flang/test/Parser/OpenMP/map-modifiers-v61.f90
M flang/test/Parser/OpenMP/metadirective-dirspec.f90
M flang/test/Parser/OpenMP/metadirective-flush.f90
M flang/test/Parser/OpenMP/openmp6-directive-spellings.f90
M flang/test/Parser/OpenMP/order-clause01.f90
M flang/test/Parser/OpenMP/ordered-block-vs-standalone.f90
M flang/test/Parser/OpenMP/replayable-clause.f90
M flang/test/Parser/OpenMP/requires.f90
M flang/test/Parser/OpenMP/sections.f90
M flang/test/Parser/OpenMP/taskgraph.f90
M flang/test/Parser/OpenMP/threadprivate.f90
M flang/test/Parser/OpenMP/tile.f90
M flang/test/Parser/OpenMP/transparent-clause.f90
M flang/test/Parser/OpenMP/unroll-heuristic.f90
M libc/cmake/modules/LLVMLibCArchitectures.cmake
M libc/config/darwin/aarch64/entrypoints.txt
A libc/include/llvm-libc-macros/darwin/CMakeLists.txt
A libc/include/llvm-libc-macros/darwin/time-macros.h
M libc/include/llvm-libc-macros/time-macros.h
M libc/include/llvm-libc-types/clockid_t.h
M libc/include/llvm-libc-types/struct_timespec.h
M libc/include/llvm-libc-types/struct_timeval.h
M libc/include/llvm-libc-types/suseconds_t.h
M libc/include/llvm-libc-types/time_t_32.h
M libc/include/llvm-libc-types/time_t_64.h
M libc/include/sys/syscall.h.def
M libc/src/__support/OSUtil/darwin/CMakeLists.txt
M libc/src/__support/OSUtil/darwin/aarch64/CMakeLists.txt
A libc/src/__support/OSUtil/darwin/exit.cpp
A libc/src/__support/time/darwin/CMakeLists.txt
A libc/src/__support/time/darwin/clock_gettime.cpp
A libc/src/time/darwin/CMakeLists.txt
A libc/src/time/darwin/clock_gettime.cpp
M libc/test/UnitTest/ExecuteFunctionUnix.cpp
A libc/test/src/__support/time/darwin/CMakeLists.txt
A libc/test/src/__support/time/darwin/clock_gettime.cpp
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/stdlib/_Exit_test.cpp
A libc/test/src/stdlib/exit_test.cpp
M libcxx/CMakeLists.txt
M libcxx/docs/Contributing.rst
M libcxx/include/__algorithm/copy_n.h
M libcxx/include/__algorithm/find.h
M libcxx/include/__algorithm/iterator_operations.h
M libcxx/include/__algorithm/ranges_copy_n.h
M libcxx/include/__compare/is_eq.h
M libcxx/include/__condition_variable/condition_variable.h
M libcxx/include/__config_site.in
M libcxx/include/__configuration/platform.h
M libcxx/include/__coroutine/coroutine_handle.h
M libcxx/include/__coroutine/noop_coroutine_handle.h
M libcxx/include/__cxx03/__fwd/ios.h
M libcxx/include/__cxx03/__locale
M libcxx/include/__cxx03/__locale_dir/locale_base_api.h
M libcxx/include/__cxx03/fstream
M libcxx/include/__cxx03/locale
M libcxx/include/__cxx03/regex
M libcxx/include/__flat_map/flat_map.h
M libcxx/include/__flat_map/utils.h
M libcxx/include/__flat_set/flat_set.h
M libcxx/include/__functional/weak_result_type.h
M libcxx/include/__fwd/ios.h
M libcxx/include/__locale
M libcxx/include/__locale_dir/messages.h
M libcxx/include/__mdspan/extents.h
M libcxx/include/__mdspan/mdspan.h
M libcxx/include/__mutex/mutex.h
M libcxx/include/__thread/thread.h
M libcxx/include/__type_traits/common_reference.h
M libcxx/include/__utility/cmp.h
M libcxx/include/__vector/vector.h
M libcxx/include/barrier
M libcxx/include/deque
M libcxx/include/fstream
M libcxx/include/initializer_list
M libcxx/include/latch
M libcxx/include/module.modulemap.in
M libcxx/include/mutex
M libcxx/include/optional
M libcxx/include/queue
M libcxx/include/regex
M libcxx/include/semaphore
M libcxx/src/include/config_elast.h
M libcxx/src/include/from_chars_floating_point.h
M libcxx/src/locale.cpp
M libcxx/test/benchmarks/algorithms/nonmodifying/find.bench.cpp
M libcxx/test/benchmarks/containers/string.bench.cpp
M libcxx/test/libcxx-03/algorithms/half_positive.pass.cpp
M libcxx/test/libcxx-03/algorithms/robust_against_copying_comparators.pass.cpp
M libcxx/test/libcxx-03/algorithms/robust_against_cpp20_hostile_iterators.compile.pass.cpp
M libcxx/test/libcxx-03/containers/sequences/vector/asan.pass.cpp
M libcxx/test/libcxx-03/containers/sequences/vector/asan_throw.pass.cpp
M libcxx/test/libcxx-03/depr/depr.default.allocator/allocator.members/construct.cxx20.pass.cpp
M libcxx/test/libcxx-03/input.output/string.streams/stringbuf/const_sso_buffer.pass.cpp
M libcxx/test/libcxx-03/iterators/bounded_iter/arithmetic.pass.cpp
M libcxx/test/libcxx-03/iterators/bounded_iter/comparison.pass.cpp
M libcxx/test/libcxx-03/iterators/bounded_iter/pointer_traits.pass.cpp
M libcxx/test/libcxx-03/iterators/bounded_iter/types.compile.pass.cpp
M libcxx/test/libcxx-03/iterators/contiguous_iterators.conv.compile.pass.cpp
M libcxx/test/libcxx-03/iterators/contiguous_iterators.pass.cpp
M libcxx/test/libcxx-03/iterators/predef.iterators/insert.iterators/back.insert.iter.ops/get_container.pass.cpp
M libcxx/test/libcxx-03/iterators/unwrap_iter.pass.cpp
M libcxx/test/libcxx-03/language.support/support.dynamic/libcpp_deallocate.sh.cpp
M libcxx/test/libcxx-03/libcpp_alignof.pass.cpp
M libcxx/test/libcxx-03/memory/allocation_guard.pass.cpp
M libcxx/test/libcxx-03/memory/swap_allocator.pass.cpp
M libcxx/test/libcxx-03/numerics/bit.ops.pass.cpp
M libcxx/test/libcxx-03/strings/basic.string/string.capacity/max_size.pass.cpp
M libcxx/test/libcxx-03/strings/basic.string/string.cons/copy_shrunk_long.pass.cpp
M libcxx/test/libcxx-03/strings/c.strings/constexpr_memmove.pass.cpp
M libcxx/test/libcxx-03/type_traits/is_trivially_relocatable.compile.pass.cpp
M libcxx/test/libcxx-03/utilities/function.objects/func.require/bullet_1_2_3.pass.cpp
M libcxx/test/libcxx-03/utilities/function.objects/func.require/bullet_4_5_6.pass.cpp
M libcxx/test/libcxx-03/utilities/function.objects/func.require/bullet_7.pass.cpp
M libcxx/test/libcxx-03/utilities/function.objects/func.require/invoke.pass.cpp
M libcxx/test/libcxx-03/utilities/function.objects/func.require/invoke_helpers.h
M libcxx/test/libcxx-03/utilities/is_pointer_in_range.pass.cpp
M libcxx/test/libcxx-03/utilities/is_valid_range.pass.cpp
M libcxx/test/libcxx-03/utilities/memory/pointer.conversion/to_address.pass.cpp
M libcxx/test/libcxx-03/utilities/memory/pointer.conversion/to_address_std_iterators.pass.cpp
M libcxx/test/libcxx-03/utilities/meta/is_referenceable.compile.pass.cpp
M libcxx/test/libcxx-03/utilities/no_destroy.pass.cpp
M libcxx/test/libcxx-03/utilities/utility/pairs/pairs.pair/abi.non_trivial_copy_move.pass.cpp
M libcxx/test/libcxx-03/utilities/utility/pairs/pairs.pair/abi.trivial_copy_move.pass.cpp
M libcxx/test/libcxx-03/utilities/utility/pairs/pairs.pair/abi.trivially_copyable.compile.pass.cpp
M libcxx/test/libcxx/containers/views/mdspan/extents/assert.obs.pass.cpp
A libcxx/test/libcxx/containers/views/mdspan/nodiscard.verify.cpp
M libcxx/test/libcxx/diagnostics/deque.nodiscard.verify.cpp
M libcxx/test/libcxx/diagnostics/flat_map.nodiscard.verify.cpp
M libcxx/test/libcxx/diagnostics/flat_set.nodiscard.verify.cpp
M libcxx/test/libcxx/diagnostics/queue.nodiscard.verify.cpp
M libcxx/test/libcxx/diagnostics/utility.nodiscard.verify.cpp
A libcxx/test/libcxx/language.support/nodiscard.verify.cpp
M libcxx/test/libcxx/system_reserved_names.gen.py
A libcxx/test/libcxx/thread/nodiscard.verify.cpp
M libcxx/test/selftest/dsl/lit.local.cfg
M libcxx/test/std/containers/container.adaptors/flat.map/flat.map.access/index_transparent.pass.cpp
M libcxx/test/std/diagnostics/syserr/syserr.errcat/syserr.errcat.objects/generic_category.pass.cpp
M libcxx/test/std/diagnostics/syserr/syserr.errcat/syserr.errcat.objects/system_category.pass.cpp
R libcxx/test/std/thread/thread.jthread/nodiscard.verify.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/U.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/const_T.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/const_optional_U.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/copy.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/ctor.verify.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/deduct.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/deduct.verify.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/default.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/empty_in_place_t_does_not_clobber.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/explicit_const_optional_U.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/explicit_optional_U.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/in_place_t.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/initializer_list.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/move.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/nullopt_t.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/optional_U.pass.cpp
M libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/rvalue_T.pass.cpp
M libcxx/test/support/platform_support.h
M libcxx/utils/ci/run-buildbot
M libcxx/utils/ci/run-buildbot-container
M libunwind/test/aarch64_vg_unwind.pass.cpp
M libunwind/test/aarch64_za_unwind.pass.cpp
M libunwind/test/bad_unwind_info.pass.cpp
M libunwind/test/eh_frame_fde_pc_range.pass.cpp
M libunwind/test/floatregister.pass.cpp
M libunwind/test/forceunwind.pass.cpp
M libunwind/test/remember_state_leak.pass.sh.s
M libunwind/test/signal_unwind.pass.cpp
M libunwind/test/unwind_leaffunction.pass.cpp
M libunwind/test/unwind_scalable_vectors.pass.cpp
M lld/ELF/Arch/RISCV.cpp
A lld/ELF/Arch/RISCVInternalRelocations.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Target.cpp
M lld/MachO/Driver.cpp
M lld/MachO/InputFiles.cpp
M lld/test/ELF/riscv-vendor-relocations.s
M lld/test/MachO/read-workers.s
A lld/test/wasm/wrap_import.s
M lld/wasm/Driver.cpp
M lld/wasm/SyntheticSections.cpp
M lldb/bindings/interface/SBTargetExtensions.i
M lldb/examples/python/templates/scripted_process.py
M lldb/include/lldb/API/SBTarget.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Utility/DataExtractor.h
M lldb/include/lldb/Utility/RangeMap.h
A lldb/include/lldb/Utility/VirtualDataExtractor.h
M lldb/packages/Python/lldbsuite/test/builders/darwin.py
M lldb/packages/Python/lldbsuite/test/dotest.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/source/API/SBTarget.cpp
M lldb/source/Core/Statusline.cpp
M lldb/source/Host/windows/ProcessLauncherWindows.cpp
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Utility/CMakeLists.txt
M lldb/source/Utility/RegisterValue.cpp
A lldb/source/Utility/VirtualDataExtractor.cpp
A lldb/test/API/commands/frame/var-dil/expr/PointerArithmetic/TestFrameVarDILExprPointerArithmetic.py
R lldb/test/API/commands/frame/var-dil/expr/PointerArithmetic/TestFrameVarDILPointerArithmetic.py
M lldb/test/API/functionalities/statusline/TestStatusline.py
M lldb/test/API/python_api/target/TestTargetAPI.py
M lldb/test/API/tools/lldb-dap/attach/TestDAP_attach.py
M lldb/test/API/tools/lldb-dap/databreakpoint/TestDAP_setDataBreakpoints.py
M lldb/test/API/tools/lldb-dap/startDebugging/TestDAP_startDebugging.py
A lldb/test/Shell/SymbolFile/NativePDB/find-pdb-next-to-exe.test
A lldb/test/Shell/SymbolFile/PDB/add-symbols.cpp
M lldb/tools/debugserver/source/DNB.cpp
M lldb/tools/debugserver/source/MacOSX/MachProcess.h
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
M lldb/tools/lldb-dap/CMakeLists.txt
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/DAPForward.h
A lldb/tools/lldb-dap/DAPSessionManager.cpp
A lldb/tools/lldb-dap/DAPSessionManager.h
M lldb/tools/lldb-dap/EventHelper.cpp
M lldb/tools/lldb-dap/EventHelper.h
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/CompileUnitsRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/DataBreakpointInfoRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/InitializeRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/LaunchRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/Watchpoint.cpp
M lldb/tools/lldb-dap/package.json
M lldb/tools/lldb-dap/tool/lldb-dap.cpp
M lldb/unittests/DAP/CMakeLists.txt
A lldb/unittests/DAP/DAPSessionManagerTest.cpp
M lldb/unittests/Language/CPlusPlus/CPlusPlusLanguageTest.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationClientTest.cpp
M lldb/unittests/Target/MemoryTest.cpp
M lldb/unittests/Utility/CMakeLists.txt
A lldb/unittests/Utility/VirtualDataExtractorTest.cpp
M llvm/docs/GettingInvolved.rst
M llvm/docs/InstCombineContributorGuide.md
M llvm/docs/KeyInstructionsDebugInfo.md
M llvm/docs/LangRef.rst
M llvm/docs/QualGroup.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/SPIRVUsage.rst
M llvm/docs/Telemetry.rst
M llvm/include/llvm/Analysis/Delinearization.h
M llvm/include/llvm/Analysis/DependenceAnalysis.h
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/MachineInstrBuilder.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/ValueTypes.td
M llvm/include/llvm/CodeGenTypes/MachineValueType.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFAcceleratorTable.h
M llvm/include/llvm/ExecutionEngine/Orc/WaitingOnGraph.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/Argument.h
M llvm/include/llvm/IR/Constants.h
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/IR/IntrinsicsARM.td
M llvm/include/llvm/IR/IntrinsicsRISCVXCV.td
M llvm/include/llvm/IR/LLVMContext.h
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/MC/MCInstrDesc.h
M llvm/include/llvm/MC/MCObjectFileInfo.h
M llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/SandboxIR/Constant.h
M llvm/include/llvm/Target/Target.td
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/TargetParser/X86TargetParser.h
M llvm/include/llvm/Transforms/Instrumentation/BoundsChecking.h
M llvm/lib/Analysis/Delinearization.cpp
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalityPredicates.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.h
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/DebugInfo/DWARF/DWARFAcceleratorTable.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/ConstantRange.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/ConstantsContext.h
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/LLVMContext.cpp
M llvm/lib/IR/LLVMContextImpl.cpp
M llvm/lib/IR/ReplaceConstant.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
M llvm/lib/MC/MCWin64EH.cpp
M llvm/lib/Object/Archive.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/ProfileData/SampleProf.cpp
M llvm/lib/SandboxIR/Constant.cpp
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrGISel.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64PerfectShuffle.h
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseN3.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.h
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
M llvm/lib/Target/AMDGPU/R600.td
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
M llvm/lib/Target/ARC/ARC.td
M llvm/lib/Target/ARM/ARM.td
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMAsmPrinter.h
M llvm/lib/Target/ARM/ARMInstrCDE.td
M llvm/lib/Target/ARM/ARMInstrFormats.td
M llvm/lib/Target/ARM/ARMInstrMVE.td
M llvm/lib/Target/ARM/ARMInstrThumb.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/ARM/ARMMCInstLower.cpp
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/CMakeLists.txt
M llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
M llvm/lib/Target/AVR/AVR.td
M llvm/lib/Target/BPF/BPF.td
M llvm/lib/Target/BPF/BPFISelLowering.cpp
M llvm/lib/Target/BPF/BPFISelLowering.h
M llvm/lib/Target/BPF/BPFSubtarget.cpp
M llvm/lib/Target/BPF/BPFSubtarget.h
M llvm/lib/Target/CSKY/CSKY.td
M llvm/lib/Target/DirectX/DirectX.td
M llvm/lib/Target/Hexagon/Hexagon.td
M llvm/lib/Target/Lanai/Lanai.td
M llvm/lib/Target/LoongArch/LoongArch.td
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/M68k/M68k.td
M llvm/lib/Target/MSP430/MSP430.td
M llvm/lib/Target/Mips/Mips.td
M llvm/lib/Target/NVPTX/NVPTX.td
M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCFixupKinds.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
M llvm/lib/Target/PowerPC/PPC.td
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCV.td
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoSFB.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SPIRV/SPIRV.td
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/lib/Target/SPIRV/SPIRVCBufferAccess.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVIRMapping.h
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.h
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVRegisterInfo.td
M llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/Sparc/Sparc.td
M llvm/lib/Target/Sparc/SparcCallingConv.td
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZ.td
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
M llvm/lib/Target/VE/VE.td
M llvm/lib/Target/WebAssembly/WebAssembly.td
M llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
M llvm/lib/Target/WebAssembly/WebAssemblyInstrInteger.td
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrAMX.td
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/lib/Target/X86/X86InstrSSE.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/lib/Target/XCore/XCore.td
M llvm/lib/Target/Xtensa/Xtensa.td
M llvm/lib/TargetParser/X86TargetParser.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
M llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Analysis/CostModel/AArch64/fshl.ll
M llvm/test/Analysis/CostModel/AArch64/fshr.ll
M llvm/test/Analysis/CostModel/RISCV/cmp-select.ll
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
M llvm/test/Analysis/Delinearization/a.ll
M llvm/test/Analysis/Delinearization/constant_functions_multi_dim.ll
M llvm/test/Analysis/Delinearization/divide_by_one.ll
M llvm/test/Analysis/Delinearization/fixed_size_array.ll
M llvm/test/Analysis/Delinearization/himeno_1.ll
M llvm/test/Analysis/Delinearization/himeno_2.ll
M llvm/test/Analysis/Delinearization/iv_times_constant_in_subscript.ll
M llvm/test/Analysis/Delinearization/multidim_ivs_and_integer_offsets_3d.ll
M llvm/test/Analysis/Delinearization/multidim_ivs_and_integer_offsets_nts_3d.ll
M llvm/test/Analysis/Delinearization/multidim_ivs_and_parameteric_offsets_3d.ll
M llvm/test/Analysis/Delinearization/multidim_only_ivs_2d.ll
M llvm/test/Analysis/Delinearization/multidim_only_ivs_3d.ll
M llvm/test/Analysis/Delinearization/multidim_only_ivs_3d_cast.ll
M llvm/test/Analysis/Delinearization/multidim_two_accesses_different_delinearization.ll
M llvm/test/Analysis/Delinearization/parameter_addrec_product.ll
M llvm/test/Analysis/Delinearization/terms_with_identity_factor.ll
M llvm/test/Analysis/DependenceAnalysis/DifferentOffsets.ll
M llvm/test/Analysis/DependenceAnalysis/MIVCheckConst.ll
M llvm/test/Analysis/DependenceAnalysis/gcd-miv-overflow.ll
A llvm/test/Assembler/invalid-ptrauth-const6.ll
A llvm/test/Bitcode/aarch64-sve-rev-upgrade.ll
A llvm/test/Bitcode/aarch64-sve-rev-upgrade.ll.bc
M llvm/test/Bitcode/compatibility.ll
M llvm/test/Bitcode/operand-bundles-bc-analyzer.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/AArch64/aarch64-isel-umin.ll
M llvm/test/CodeGen/AArch64/addtruncshift.ll
M llvm/test/CodeGen/AArch64/arm64-fp128.ll
M llvm/test/CodeGen/AArch64/arm64-popcnt.ll
M llvm/test/CodeGen/AArch64/arm64-zip.ll
A llvm/test/CodeGen/AArch64/deactivation-symbols.ll
A llvm/test/CodeGen/AArch64/fixed-length-bf16-arith.ll
M llvm/test/CodeGen/AArch64/fixed-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/fp16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/fp16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/fptrunc.ll
M llvm/test/CodeGen/AArch64/insert-extend.ll
M llvm/test/CodeGen/AArch64/insert-subvector.ll
M llvm/test/CodeGen/AArch64/lrint-conv-fp16-win.ll
M llvm/test/CodeGen/AArch64/lrint-conv-win.ll
M llvm/test/CodeGen/AArch64/lround-conv-fp16-win.ll
M llvm/test/CodeGen/AArch64/lround-conv-win.ll
M llvm/test/CodeGen/AArch64/neon-extadd-extract.ll
M llvm/test/CodeGen/AArch64/neon-widen-shuffle.ll
A llvm/test/CodeGen/AArch64/ptrauth-irelative.ll
M llvm/test/CodeGen/AArch64/ptrauth-type-info-vptr-discr.ll
M llvm/test/CodeGen/AArch64/reduce-shuffle.ll
M llvm/test/CodeGen/AArch64/sme-peephole-opts.ll
M llvm/test/CodeGen/AArch64/sme-za-exceptions.ll
M llvm/test/CodeGen/AArch64/sme-zt0-state.ll
M llvm/test/CodeGen/AArch64/sve-extract-scalable-vector.ll
M llvm/test/CodeGen/AArch64/sve-indexed-arithmetic.ll
M llvm/test/CodeGen/AArch64/sve-insert-vector.ll
A llvm/test/CodeGen/AArch64/sve-masked-compressstore-sve2p2.ll
A llvm/test/CodeGen/AArch64/sve-masked-compressstore.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/global-address.ll
M llvm/test/CodeGen/AMDGPU/lower-kernel-lds-constexpr.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-constantexpr.ll
A llvm/test/CodeGen/AMDGPU/misched-into-wmma-hazard-shadow.mir
A llvm/test/CodeGen/AMDGPU/same-lds-variable-multiple-use-in-one-phi-node.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll
M llvm/test/CodeGen/BPF/atomic-oversize.ll
R llvm/test/CodeGen/BPF/builtin_calls.ll
M llvm/test/CodeGen/BPF/struct_ret1.ll
M llvm/test/CodeGen/BPF/struct_ret2.ll
M llvm/test/CodeGen/DirectX/CBufferAccess/gep-ce-two-uses.ll
A llvm/test/CodeGen/LoongArch/lasx/rotl-rotr.ll
A llvm/test/CodeGen/LoongArch/lsx/rotl-rotr.ll
A llvm/test/CodeGen/MIR/AArch64/deactivation-symbols.mir
M llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_print.txt
M llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_wo=0.5_print.txt
M llvm/test/CodeGen/RISCV/cmov-branch-opt.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/min-max.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
M llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
M llvm/test/CodeGen/RISCV/select-bare.ll
M llvm/test/CodeGen/RISCV/select-cc.ll
M llvm/test/CodeGen/RISCV/select-cond.ll
M llvm/test/CodeGen/RISCV/select-const.ll
M llvm/test/CodeGen/RISCV/select.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-load-imm.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-min-max.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-mul.ll
A llvm/test/CodeGen/RISCV/xcvelw.ll
M llvm/test/CodeGen/RISCV/xqcicli.ll
M llvm/test/CodeGen/RISCV/xqcicm.ll
M llvm/test/CodeGen/RISCV/xqcics.ll
A llvm/test/CodeGen/RISCV/zicond-fp-select-zfinx.ll
A llvm/test/CodeGen/SPARC/fp128-abi.ll
M llvm/test/CodeGen/SPARC/fp16-promote.ll
M llvm/test/CodeGen/SPARC/llvm.sincos.ll
M llvm/test/CodeGen/SPIRV/OpVariable_order.ll
M llvm/test/CodeGen/SPIRV/SpecConstants/restore-spec-type.ll
M llvm/test/CodeGen/SPIRV/basic_float_types.ll
M llvm/test/CodeGen/SPIRV/basic_int_types.ll
M llvm/test/CodeGen/SPIRV/basic_int_types_spirvdis.ll
M llvm/test/CodeGen/SPIRV/builtin_intrinsics_32.ll
M llvm/test/CodeGen/SPIRV/builtin_intrinsics_64.ll
M llvm/test/CodeGen/SPIRV/builtin_vars-decorate.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
M llvm/test/CodeGen/SPIRV/event-zero-const.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_ALTERA_arbitrary_precision_fixed_point/capability-arbitrary-precision-fixed-point-numbers.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_arbitrary_precision_integers.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fun-ptr-addrcast.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_int4/negative.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bfloat16/bfloat16.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_float_controls2/decoration.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_float_controls2/disabled-on-amd.ll
M llvm/test/CodeGen/SPIRV/extensions/both-allowed-disallowed-extension-error.ll
M llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions-but-one.ll
M llvm/test/CodeGen/SPIRV/extensions/enable-all-extensions.ll
M llvm/test/CodeGen/SPIRV/extensions/unused-but-allowed-SPV_INTEL_arbitrary_precision_integers.ll
M llvm/test/CodeGen/SPIRV/freeze.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/AddUint64.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/abs.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/log10.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer-peeled-array-minimal.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/cbuffer-peeled-array.ll
M llvm/test/CodeGen/SPIRV/instructions/insertvalue-undef-ptr.ll
M llvm/test/CodeGen/SPIRV/instructions/select-ptr-load.ll
R llvm/test/CodeGen/SPIRV/keep-tracked-const.ll
A llvm/test/CodeGen/SPIRV/legalization/vector-legalization-kernel.ll
A llvm/test/CodeGen/SPIRV/legalization/vector-legalization-shader.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/assume.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/bitreverse_small_type.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/constrained-arithmetic.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/lifetime.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/logical-memcpy.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/satur-arith.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/uadd.with.overflow.ll
M llvm/test/CodeGen/SPIRV/logical-access-chain.ll
M llvm/test/CodeGen/SPIRV/logical-struct-access.ll
M llvm/test/CodeGen/SPIRV/phi-insert-point.ll
M llvm/test/CodeGen/SPIRV/phi-ptrcast-dominate.ll
M llvm/test/CodeGen/SPIRV/pointers/bitcast-fix-accesschain.ll
M llvm/test/CodeGen/SPIRV/pointers/bitcast-fix-load.ll
M llvm/test/CodeGen/SPIRV/pointers/gep-types-1.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-addressspace.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-base-type.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-bitcast-load.ll
M llvm/test/CodeGen/SPIRV/pointers/getelementptr-kernel-arg-char.ll
M llvm/test/CodeGen/SPIRV/pointers/global-addrspacecast.ll
M llvm/test/CodeGen/SPIRV/pointers/load-addressspace.ll
M llvm/test/CodeGen/SPIRV/pointers/phi-chain-types.ll
M llvm/test/CodeGen/SPIRV/pointers/pointer-addrspacecast.ll
M llvm/test/CodeGen/SPIRV/pointers/ptr-eq-types.ll
M llvm/test/CodeGen/SPIRV/pointers/resource-vector-load-store.ll
M llvm/test/CodeGen/SPIRV/pointers/type-deduce-call-no-bitcast.ll
A llvm/test/CodeGen/SPIRV/remove-dead-type-intrinsics.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpBitReverse-subbyte.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpGenericCastToPtr.ll
M llvm/test/CodeGen/SPIRV/transcoding/OpPtrCastToGeneric.ll
M llvm/test/CodeGen/SPIRV/transcoding/fcmp.ll
M llvm/test/CodeGen/SPIRV/transcoding/spirv-event-null.ll
M llvm/test/CodeGen/SPIRV/trunc-nonstd-bitwidth.ll
M llvm/test/CodeGen/SPIRV/uitofp-with-bool.ll
A llvm/test/CodeGen/SystemZ/zos-ppa1-argarea.ll
A llvm/test/CodeGen/SystemZ/zos-target-flags.ll
M llvm/test/CodeGen/Thumb2/mve-intrinsics/strict-intrinsics.ll
M llvm/test/CodeGen/Thumb2/mve-vpt-2-blocks-2-preds.mir
M llvm/test/CodeGen/Thumb2/mve-vpt-2-blocks-ctrl-flow.mir
M llvm/test/CodeGen/Thumb2/mve-vpt-2-blocks-non-consecutive-ins.mir
M llvm/test/CodeGen/Thumb2/mve-vpt-2-blocks.mir
M llvm/test/CodeGen/Thumb2/mve-vpt-3-blocks-kill-vpr.mir
M llvm/test/CodeGen/Thumb2/mve-vpt-block-1-ins.mir
M llvm/test/CodeGen/Thumb2/mve-vpt-block-2-ins.mir
M llvm/test/CodeGen/Thumb2/mve-vpt-block-4-ins.mir
M llvm/test/CodeGen/Thumb2/mve-vpt-block-elses.mir
M llvm/test/CodeGen/Thumb2/mve-vpt-block-optnone.mir
M llvm/test/CodeGen/WebAssembly/masked-shifts.ll
M llvm/test/CodeGen/X86/addcarry.ll
A llvm/test/CodeGen/X86/combine-fceil.ll
A llvm/test/CodeGen/X86/combine-ffloor.ll
A llvm/test/CodeGen/X86/combine-fnearbyint.ll
A llvm/test/CodeGen/X86/combine-frint.ll
A llvm/test/CodeGen/X86/combine-fround.ll
A llvm/test/CodeGen/X86/combine-froundeven.ll
A llvm/test/CodeGen/X86/combine-fsqrt.ll
A llvm/test/CodeGen/X86/combine-ftrunc.ll
A llvm/test/CodeGen/X86/combine-rcp.ll
A llvm/test/CodeGen/X86/combine-rndscale.ll
A llvm/test/CodeGen/X86/combine-rsqrt.ll
A llvm/test/CodeGen/X86/haddsubsat.ll
M llvm/test/CodeGen/X86/kmov.ll
M llvm/test/CodeGen/X86/srem-vector-lkk.ll
M llvm/test/CodeGen/X86/urem-vector-lkk.ll
M llvm/test/Instrumentation/BoundsChecking/runtimes.ll
M llvm/test/MC/AMDGPU/gfx12_asm_sopk.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopk.txt
M llvm/test/MC/Disassembler/PowerPC/ppc-encoding-ISAFuture.txt
M llvm/test/MC/Disassembler/PowerPC/ppc64le-encoding-ISAFuture.txt
M llvm/test/MC/PowerPC/ppc-encoding-ISAFuture.s
R llvm/test/MC/PowerPC/ppc64-encoding-ISA31-errors.s
M llvm/test/MC/PowerPC/ppc64-errors.s
A llvm/test/MC/RISCV/corev/XCVelw-pseudo.s
M llvm/test/TableGen/DuplicateFieldValues.td
M llvm/test/TableGen/RegClassByHwMode.td
M llvm/test/TableGen/def-multiple-operands.td
M llvm/test/TableGen/get-named-operand-idx.td
M llvm/test/TableGen/get-operand-type-no-expand.td
M llvm/test/TableGen/get-operand-type.td
M llvm/test/TableGen/target-specialized-pseudos.td
M llvm/test/Transforms/AggressiveInstCombine/X86/or-load.ll
A llvm/test/Transforms/AggressiveInstCombine/umulh_carry.ll
A llvm/test/Transforms/AggressiveInstCombine/umulh_carry4.ll
A llvm/test/Transforms/AggressiveInstCombine/umulh_ladder.ll
A llvm/test/Transforms/AggressiveInstCombine/umulh_ladder4.ll
M llvm/test/Transforms/IndVarSimplify/floating-point-iv.ll
A llvm/test/Transforms/IndVarSimplify/skip-predication-convergence.ll
A llvm/test/Transforms/IndVarSimplify/skip-predication-nested-convergence.ll
A llvm/test/Transforms/InstCombine/get_vector_length.ll
M llvm/test/Transforms/InstCombine/icmp-select.ll
M llvm/test/Transforms/InstCombine/ptrauth-intrinsics.ll
M llvm/test/Transforms/InstCombine/saturating-add-sub.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/vectorize-redund-loads.ll
M llvm/test/Transforms/LoopUnroll/partial-unroll-reductions.ll
M llvm/test/Transforms/LoopUnroll/runtime-unroll-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fully-unrolled-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization.ll
M llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-zext-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vplan-printing.ll
A llvm/test/Transforms/LoopVectorize/AArch64/widen-gep-all-indices-invariant.ll
M llvm/test/Transforms/LoopVectorize/AArch64/wider-VF-for-callinst.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
M llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-conditional-branches.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/cse-casts.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-chains-vplan.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll
M llvm/test/Transforms/LoopVectorize/narrow-to-single-scalar.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/pr43166-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/pr58811-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/predicatedinst-loop-invariant.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
A llvm/test/Transforms/LoopVectorize/select-fmax-last-index.ll
A llvm/test/Transforms/LoopVectorize/select-fmin-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-index-interleaving.ll
M llvm/test/Transforms/LoopVectorize/select-smax-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-smin-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-umax-last-index.ll
M llvm/test/Transforms/LoopVectorize/select-umin-first-index.ll
M llvm/test/Transforms/LoopVectorize/select-umin-last-index.ll
M llvm/test/Transforms/LoopVectorize/struct-return.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
M llvm/test/Transforms/LoopVectorize/trunc-shifts.ll
M llvm/test/Transforms/LoopVectorize/use-scalar-epilogue-if-tp-fails.ll
M llvm/test/Transforms/OpenMP/parallel_region_merging.ll
A llvm/test/Transforms/SCCP/get_vector_length-intrinsic.ll
A llvm/test/Transforms/SLPVectorizer/X86/multi-node-user-with-copyable-ops.ll
A llvm/test/Transforms/SLPVectorizer/X86/user-with-multi-copyable-ops.ll
A llvm/test/Transforms/SimplifyCFG/skip-merging-duplicate-convergence-instrinsics.ll
M llvm/test/Transforms/Util/DeclareRuntimeLibcalls/basic.ll
A llvm/test/Transforms/Util/DeclareRuntimeLibcalls/darwin.ll
A llvm/test/Transforms/Util/DeclareRuntimeLibcalls/emscripten.ll
A llvm/test/Transforms/Util/DeclareRuntimeLibcalls/xcore.ll
A llvm/test/Transforms/WholeProgramDevirt/calls-to-devirt.ll
M llvm/test/Transforms/WholeProgramDevirt/import-indir.ll
M llvm/test/Transforms/WholeProgramDevirt/import.ll
M llvm/test/Transforms/WholeProgramDevirt/uniform-retval-invoke.ll
A llvm/test/Verifier/ptrauth-constant.ll
A llvm/test/tools/llvm-exegesis/X86/snippet-generator-seed.test
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-sve-instructions.s
A llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vle-vse-vlm.s
A llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlse-vsse.s
A llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlseg-vsseg.s
A llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlxe-vsxe.s
A llvm/test/tools/opt/infer-data-layout-target-abi.ll
M llvm/tools/llc/llc.cpp
M llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp
M llvm/tools/llvm-exegesis/lib/SnippetGenerator.cpp
M llvm/tools/llvm-objdump/SourcePrinter.cpp
M llvm/tools/llvm-objdump/SourcePrinter.h
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp
M llvm/tools/opt/optdriver.cpp
M llvm/unittests/CAS/CASTestConfig.h
M llvm/unittests/ExecutionEngine/Orc/WaitingOnGraphTest.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/IR/ConstantRangeTest.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/Support/JobserverTest.cpp
M llvm/unittests/Transforms/Utils/ValueMapperTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M llvm/utils/TableGen/Basic/VTEmitter.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenTarget.cpp
M llvm/utils/TableGen/Common/InstructionEncoding.cpp
M llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
M llvm/utils/TableGen/DAGISelMatcherGen.cpp
M llvm/utils/TableGen/InstrInfoEmitter.cpp
M llvm/utils/TableGen/README.md
A llvm/utils/git/requirements_upload_release.txt
A llvm/utils/git/requirements_upload_release.txt.in
M llvm/utils/gn/secondary/bolt/unittests/BUILD.gn
A llvm/utils/gn/secondary/bolt/unittests/Passes/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clangd/test/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Utility/BUILD.gn
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/ARM/Disassembler/BUILD.gn
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/lit/builtin_commands/diff.py
M llvm/utils/lit/lit/formats/googletest.py
M llvm/utils/lit/lit/llvm/config.py
M llvm/utils/lit/lit/reports.py
M llvm/utils/lit/lit/run.py
M llvm/utils/lit/lit/util.py
M llvm/utils/lit/tests/lit.cfg
A llvm/utils/lit/tests/windows-pools.py
M llvm/utils/release/github-upload-release.py
M mlir/docs/Dialects/Linalg/OpDSL.md
M mlir/docs/Dialects/NVVMDialect.md
M mlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h
M mlir/include/mlir/Conversion/LLVMCommon/VectorPattern.h
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h
M mlir/include/mlir/Dialect/GPU/IR/GPUBase.td
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/Tosa/Transforms/Passes.td
M mlir/include/mlir/Dialect/UB/IR/UBOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/IR/PatternMatch.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Conversion/GPUToNVVM/WmmaOpsToNvvm.cpp
M mlir/lib/Conversion/LLVMCommon/VectorPattern.cpp
M mlir/lib/Conversion/MPIToLLVM/MPIToLLVM.cpp
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Conversion/UBToLLVM/UBToLLVM.cpp
M mlir/lib/Conversion/UBToSPIRV/UBToSPIRV.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/ControlFlow/IR/CMakeLists.txt
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
A mlir/lib/Dialect/OpenACC/Transforms/ACCImplicitDeclare.cpp
M mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/SCF/IR/CMakeLists.txt
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/Tosa/Transforms/CMakeLists.txt
A mlir/lib/Dialect/Tosa/Transforms/TosaArithConstantToConst.cpp
M mlir/lib/Dialect/Transform/IR/TransformOps.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/lib/ExecutionEngine/APFloatWrappers.cpp
M mlir/lib/ExecutionEngine/CudaRuntimeWrappers.cpp
M mlir/lib/Target/LLVMIR/Dialect/GPU/SelectObjectAttr.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMIRToLLVMTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.h
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
M mlir/test/Analysis/DataFlow/test-liveness-analysis.mlir
M mlir/test/Conversion/ArithToApfloat/arith-to-apfloat.mlir
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Conversion/GPUToNVVM/wmma-ops-to-nvvm.mlir
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
M mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
M mlir/test/Conversion/UBToLLVM/ub-to-llvm.mlir
M mlir/test/Conversion/UBToSPIRV/ub-to-spirv.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
M mlir/test/Dialect/Affine/loop-coalescing.mlir
M mlir/test/Dialect/Affine/value-bounds-reification.mlir
M mlir/test/Dialect/ControlFlow/canonicalize.mlir
M mlir/test/Dialect/GPU/invalid.mlir
A mlir/test/Dialect/LLVMIR/invalid-cg-profile.mlir
A mlir/test/Dialect/LLVMIR/nvvm-mma-sp-kind.mlir
A mlir/test/Dialect/LLVMIR/nvvm-mma-sp-ordered.mlir
A mlir/test/Dialect/LLVMIR/nvvm-mma-sp.mlir
A mlir/test/Dialect/LLVMIR/nvvm-target-invalid.mlir
M mlir/test/Dialect/LLVMIR/nvvm/invalid-convert-stochastic-rounding.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Dialect/Linalg/fusion-elementwise-ops.mlir
M mlir/test/Dialect/Linalg/generalize-named-polymorphic-ops.mlir
M mlir/test/Dialect/Linalg/invalid.mlir
A mlir/test/Dialect/OpenACC/acc-implicit-declare.mlir
M mlir/test/Dialect/SCF/canonicalize.mlir
A mlir/test/Dialect/Tosa/tosa-arith-const-to-tosa-const.mlir
A mlir/test/Dialect/Transform/include-failure-propagation.mlir
M mlir/test/Dialect/UB/ops.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Dialect/XeGPU/subgroup-distribute-unit.mlir
M mlir/test/Integration/Dialect/Arith/CPU/test-apfloat-emulation.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul-transpose-a.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/runtime-verification.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/test-matmul-masked-vec.mlir
M mlir/test/Integration/Dialect/Transform/match_matmul.mlir
A mlir/test/Integration/GPU/CUDA/TensorCore/sm80/wmma-matmul-f64.mlir
M mlir/test/Target/LLVMIR/Import/metadata-profiling.ll
A mlir/test/Target/LLVMIR/nvvm/convert_fp16x2.mlir
M mlir/test/Target/LLVMIR/nvvm/convert_stochastic_rounding.mlir
A mlir/test/Target/LLVMIR/nvvm/invalid_convert_fp16x2.mlir
A mlir/test/Target/LLVMIR/nvvm/mbar_arr_drop_expect_tx.mlir
A mlir/test/Target/LLVMIR/nvvm/mbar_arr_expect_tx.mlir
M mlir/test/Target/LLVMIR/nvvm/mbar_invalid.mlir
A mlir/test/Target/LLVMIR/nvvm/permute_invalid.mlir
A mlir/test/Target/LLVMIR/nvvm/permute_valid.mlir
M mlir/test/Target/LLVMIR/openmp-barrier-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-cancel.mlir
M mlir/test/Target/LLVMIR/openmp-cancellation-point.mlir
A mlir/test/Target/LLVMIR/openmp-dist_schedule.mlir
A mlir/test/Target/LLVMIR/openmp-dist_schedule_with_wsloop.mlir
M mlir/test/Target/LLVMIR/openmp-outline-infinite-loop.mlir
M mlir/test/Target/LLVMIR/openmp-parallel-reduction-multiblock.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-array-sections.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-init-arg.mlir
M mlir/test/Target/LLVMIR/openmp-reduction-sections.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
R mlir/test/Target/SPIRV/consecutive-selection.spv
A mlir/test/Target/SPIRV/consecutive-selection.spvasm
M mlir/test/Target/SPIRV/selection.mlir
R mlir/test/Target/SPIRV/selection.spv
A mlir/test/Target/SPIRV/selection.spvasm
A mlir/test/Target/SPIRV/selection_switch.spvasm
A mlir/test/Transforms/test-legalizer-no-rollback.mlir
M mlir/test/lib/Analysis/DataFlow/TestLivenessAnalysis.cpp
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
M mlir/test/lit.cfg.py
M mlir/test/python/integration/dialects/linalg/opsrun.py
M mlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp
M offload/include/OpenMP/omp.h
M offload/include/omptarget.h
M offload/libomptarget/OpenMP/API.cpp
M offload/libomptarget/PluginManager.cpp
M offload/libomptarget/device.cpp
M offload/libomptarget/exports
A offload/test/api/omp_device_uid.c
A offload/test/api/omp_indirect_call_table_manual.c
M openmp/device/include/DeviceTypes.h
M openmp/device/include/Interface.h
M openmp/device/src/State.cpp
M openmp/runtime/src/dllexports
M openmp/runtime/src/include/omp.h.var
M openmp/runtime/src/kmp_ftn_cdecl.cpp
A openmp/runtime/test/api/omp_device_uid.c
M runtimes/cmake/Modules/HandleLibC.cmake
M third-party/benchmark/bindings/python/build_defs.bzl
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.8-beta.1
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/25ba298f58cf...a68cea56a079
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