[all-commits] [llvm/llvm-project] 9bd30e: [AArch64] Enable maximising scalable vector bandwi...

[Sam Tebbs via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9bd30e2f272536e82730b115720fa807d7be9be9
      https://github.com/llvm/llvm-project/commit/9bd30e2f272536e82730b115720fa807d7be9be9
  Author: Sam Tebbs <samuel.tebbs at arm.com>
  Date:   2025-11-26 (Wed, 26 Nov 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64Features.td
    M llvm/lib/Target/AArch64/AArch64Processors.td
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/fully-unrolled-cost.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-scalable.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/type-shrinkage-zext-costs.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/wider-VF-for-callinst.ll

  Log Message:
  -----------
  [AArch64] Enable maximising scalable vector bandwidth (#166748)

This PR enables maximising scalable vector bandwidth for all AArch64
cores other than the V1 and N2. Those two have shown small regressions
that we'll investigate, fix and then enable.



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