[all-commits] [llvm/llvm-project] 0c2701: CodeGen: Make all targets override pseudos with po...
Matt Arsenault via All-commits
all-commits at lists.llvm.org
Wed Nov 26 06:57:35 PST 2025
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 0c2701fe7fa002e1befc5f86c268a7964f96d286
https://github.com/llvm/llvm-project/commit/0c2701fe7fa002e1befc5f86c268a7964f96d286
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-11-26 (Wed, 26 Nov 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AMDGPU/R600.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/ARM/ARM.td
M llvm/lib/Target/AVR/AVR.td
M llvm/lib/Target/BPF/BPF.td
M llvm/lib/Target/CSKY/CSKY.td
M llvm/lib/Target/DirectX/DirectX.td
M llvm/lib/Target/Hexagon/Hexagon.td
M llvm/lib/Target/Lanai/Lanai.td
M llvm/lib/Target/LoongArch/LoongArch.td
M llvm/lib/Target/M68k/M68k.td
M llvm/lib/Target/MSP430/MSP430.td
M llvm/lib/Target/Mips/Mips.td
M llvm/lib/Target/NVPTX/NVPTX.td
M llvm/lib/Target/PowerPC/PPC.td
M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
M llvm/lib/Target/RISCV/RISCV.td
M llvm/lib/Target/SPIRV/SPIRV.td
M llvm/lib/Target/Sparc/Sparc.td
M llvm/lib/Target/SystemZ/SystemZ.td
M llvm/lib/Target/VE/VE.td
M llvm/lib/Target/WebAssembly/WebAssembly.td
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/XCore/XCore.td
M llvm/lib/Target/Xtensa/Xtensa.td
Log Message:
-----------
CodeGen: Make all targets override pseudos with pointers (#159881)
This eliminates the need to have PointerLikeRegClass handling in
codegen.
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