[all-commits] [llvm/llvm-project] ad3d9f: [RISCV] tt-ascalon-d8 vector scheduling (#167066)

[Petr Penzin via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ad3d9fb3cab7f2e9a7337ca3c1bd0018ff6c6158
      https://github.com/llvm/llvm-project/commit/ad3d9fb3cab7f2e9a7337ca3c1bd0018ff6c6158
  Author: Petr Penzin <ppenzin at tenstorrent.com>
  Date:   2025-11-25 (Tue, 25 Nov 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVSchedTTAscalonD8.td
    M llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/fp.s
    M llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/fx.s
    A llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/vdiv_vsqrt.s
    A llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/vislide-vx.s
    A llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/vle-vse-vlm.s
    A llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/vlse-vsse.s
    A llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/vlseg-vsseg.s
    A llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/vlxe-vsxe.s
    A llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/vmv.s
    A llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/vreduce.s
    A llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/vrgather-vcompress.s
    A llvm/test/tools/llvm-mca/RISCV/tt-ascalon-d8/vshift-vmul.s

  Log Message:
  -----------
  [RISCV] tt-ascalon-d8 vector scheduling (#167066)

Add the vector scheduling model for tt-ascalon-d8 and corresponding
llvm-mca tests.

---------

Co-authored-by: Craig Topper <craig.topper at sifive.com>



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